diff options
Diffstat (limited to 'include/asm-arm')
29 files changed, 470 insertions, 184 deletions
diff --git a/include/asm-arm/arch-at91rm9200/board.h b/include/asm-arm/arch-at91rm9200/board.h index 1fdd70b23809..c1ca9a4658ec 100644 --- a/include/asm-arm/arch-at91rm9200/board.h +++ b/include/asm-arm/arch-at91rm9200/board.h @@ -20,7 +20,7 @@ /* * These are data structures found in platform_device.dev.platform_data, - * and describing board-specfic data needed by drivers. For example, + * and describing board-specific data needed by drivers. For example, * which pin is used for a given GPIO role. * * In 2.6, drivers should strongly avoid board-specific knowledge so diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h index b59520e56fc7..0d517267fb63 100644 --- a/include/asm-arm/arch-ixp4xx/io.h +++ b/include/asm-arm/arch-ixp4xx/io.h @@ -38,7 +38,7 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data); * 2) If > 64MB of memory space is required, the IXP4xx can be configured * to use indirect registers to access PCI (as we do below for I/O * transactions). This allows for up to 128MB (0x48000000 to 0x4fffffff) - * of memory on the bus. The disadvantadge of this is that every + * of memory on the bus. The disadvantage of this is that every * PCI access requires three local register accesses plus a spinlock, * but in some cases the performance hit is acceptable. In addition, * you cannot mmap() PCI devices in this case. diff --git a/include/asm-arm/arch-omap/board-fsample.h b/include/asm-arm/arch-omap/board-fsample.h new file mode 100644 index 000000000000..89a1e529fb6f --- /dev/null +++ b/include/asm-arm/arch-omap/board-fsample.h @@ -0,0 +1,51 @@ +/* + * linux/include/asm-arm/arch-omap/board-fsample.h + * + * Board-specific goodies for TI F-Sample. + * + * Copyright (C) 2006 Google, Inc. + * Author: Brian Swetland <swetland@google.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_OMAP_FSAMPLE_H +#define __ASM_ARCH_OMAP_FSAMPLE_H + +/* fsample is pretty close to p2-sample */ +#include <asm/arch/board-perseus2.h> + +#define fsample_cpld_read(reg) __raw_readb(reg) +#define fsample_cpld_write(val, reg) __raw_writeb(val, reg) + +#define FSAMPLE_CPLD_BASE 0xE8100000 +#define FSAMPLE_CPLD_SIZE SZ_4K +#define FSAMPLE_CPLD_START 0x05080000 + +#define FSAMPLE_CPLD_REG_A (FSAMPLE_CPLD_BASE + 0x00) +#define FSAMPLE_CPLD_SWITCH (FSAMPLE_CPLD_BASE + 0x02) +#define FSAMPLE_CPLD_UART (FSAMPLE_CPLD_BASE + 0x02) +#define FSAMPLE_CPLD_REG_B (FSAMPLE_CPLD_BASE + 0x04) +#define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06) +#define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06) + +#define FSAMPLE_CPLD_BIT_BT_RESET 0 +#define FSAMPLE_CPLD_BIT_LCD_RESET 1 +#define FSAMPLE_CPLD_BIT_CAM_PWDN 2 +#define FSAMPLE_CPLD_BIT_CHARGER_ENABLE 3 +#define FSAMPLE_CPLD_BIT_SD_MMC_EN 4 +#define FSAMPLE_CPLD_BIT_aGPS_PWREN 5 +#define FSAMPLE_CPLD_BIT_BACKLIGHT 6 +#define FSAMPLE_CPLD_BIT_aGPS_EN_RESET 7 +#define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N 8 +#define FSAMPLE_CPLD_BIT_OTG_RESET 9 + +#define fsample_cpld_set(bit) \ + fsample_cpld_write((((bit) & 15) << 4) | 0x0f, FSAMPLE_CPLD_SET_CLR) + +#define fsample_cpld_clear(bit) \ + fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR) + +#endif diff --git a/include/asm-arm/arch-omap/board.h b/include/asm-arm/arch-omap/board.h index dfdbf06fd646..edf1dc6ad919 100644 --- a/include/asm-arm/arch-omap/board.h +++ b/include/asm-arm/arch-omap/board.h @@ -22,6 +22,7 @@ #define OMAP_TAG_UART 0x4f07 #define OMAP_TAG_FBMEM 0x4f08 #define OMAP_TAG_STI_CONSOLE 0x4f09 +#define OMAP_TAG_CAMERA_SENSOR 0x4f0a #define OMAP_TAG_BOOT_REASON 0x4f80 #define OMAP_TAG_FLASH_PART 0x4f81 @@ -61,6 +62,12 @@ struct omap_sti_console_config { u8 channel; }; +struct omap_camera_sensor_config { + u16 reset_gpio; + int (*power_on)(void * data); + int (*power_off)(void * data); +}; + struct omap_usb_config { /* Configure drivers according to the connectors on your board: * - "A" connector (rectagular) diff --git a/include/asm-arm/arch-omap/dma.h b/include/asm-arm/arch-omap/dma.h index ca1202312a45..1b1b02307e77 100644 --- a/include/asm-arm/arch-omap/dma.h +++ b/include/asm-arm/arch-omap/dma.h @@ -185,8 +185,8 @@ /* DMA channels for 24xx */ #define OMAP24XX_DMA_NO_DEVICE 0 #define OMAP24XX_DMA_XTI_DMA 1 /* S_DMA_0 */ -#define OMAP24XX_DMA_EXT_NDMA_REQ0 2 /* S_DMA_1 */ -#define OMAP24XX_DMA_EXT_NDMA_REQ1 3 /* S_DMA_2 */ +#define OMAP24XX_DMA_EXT_DMAREQ0 2 /* S_DMA_1 */ +#define OMAP24XX_DMA_EXT_DMAREQ1 3 /* S_DMA_2 */ #define OMAP24XX_DMA_GPMC 4 /* S_DMA_3 */ #define OMAP24XX_DMA_GFX 5 /* S_DMA_4 */ #define OMAP24XX_DMA_DSS 6 /* S_DMA_5 */ @@ -197,7 +197,9 @@ #define OMAP24XX_DMA_DES_TX 11 /* S_DMA_10 */ #define OMAP24XX_DMA_DES_RX 12 /* S_DMA_11 */ #define OMAP24XX_DMA_SHA1MD5_RX 13 /* S_DMA_12 */ - +#define OMAP24XX_DMA_EXT_DMAREQ2 14 /* S_DMA_13 */ +#define OMAP24XX_DMA_EXT_DMAREQ3 15 /* S_DMA_14 */ +#define OMAP24XX_DMA_EXT_DMAREQ4 16 /* S_DMA_15 */ #define OMAP24XX_DMA_EAC_AC_RD 17 /* S_DMA_16 */ #define OMAP24XX_DMA_EAC_AC_WR 18 /* S_DMA_17 */ #define OMAP24XX_DMA_EAC_MD_UL_RD 19 /* S_DMA_18 */ @@ -244,6 +246,7 @@ #define OMAP24XX_DMA_MMC1_TX 61 /* SDMA_60 */ #define OMAP24XX_DMA_MMC1_RX 62 /* SDMA_61 */ #define OMAP24XX_DMA_MS 63 /* SDMA_62 */ +#define OMAP24XX_DMA_EXT_DMAREQ5 64 /* S_DMA_63 */ /*----------------------------------------------------------------------------*/ @@ -274,7 +277,7 @@ #define OMAP1610_DMA_LCD_LCH_CTRL (OMAP1610_DMA_LCD_BASE + 0xea) #define OMAP1610_DMA_LCD_SRC_FI_B1_U (OMAP1610_DMA_LCD_BASE + 0xf4) -#define OMAP_DMA_TOUT_IRQ (1 << 0) /* Only on omap1 */ +#define OMAP1_DMA_TOUT_IRQ (1 << 0) #define OMAP_DMA_DROP_IRQ (1 << 1) #define OMAP_DMA_HALF_IRQ (1 << 2) #define OMAP_DMA_FRAME_IRQ (1 << 3) @@ -315,11 +318,11 @@ enum { OMAP_LCD_DMA_B2_BOTTOM }; -/* REVISIT: Check if BURST_4 is really 1 (or 2) */ enum omap_dma_burst_mode { OMAP_DMA_DATA_BURST_DIS = 0, OMAP_DMA_DATA_BURST_4, - OMAP_DMA_DATA_BURST_8 + OMAP_DMA_DATA_BURST_8, + OMAP_DMA_DATA_BURST_16, }; enum omap_dma_color_mode { diff --git a/include/asm-arm/arch-omap/dmtimer.h b/include/asm-arm/arch-omap/dmtimer.h index e6522e6a3834..7a289ff07404 100644 --- a/include/asm-arm/arch-omap/dmtimer.h +++ b/include/asm-arm/arch-omap/dmtimer.h @@ -5,6 +5,7 @@ * * Copyright (C) 2005 Nokia Corporation * Author: Lauri Leukkunen <lauri.leukkunen@nokia.com> + * PWM and clock framwork support by Timo Teras. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -25,69 +26,56 @@ * 675 Mass Ave, Cambridge, MA 02139, USA. */ -#ifndef __ASM_ARCH_TIMER_H -#define __ASM_ARCH_TIMER_H - -#include <linux/list.h> - -#define OMAP_TIMER_SRC_ARMXOR 0x00 -#define OMAP_TIMER_SRC_32_KHZ 0x01 -#define OMAP_TIMER_SRC_EXT_CLK 0x02 - -/* timer control reg bits */ -#define OMAP_TIMER_CTRL_CAPTMODE (1 << 13) -#define OMAP_TIMER_CTRL_PT (1 << 12) -#define OMAP_TIMER_CTRL_TRG_OVERFLOW (0x1 << 10) -#define OMAP_TIMER_CTRL_TRG_OFANDMATCH (0x2 << 10) -#define OMAP_TIMER_CTRL_TCM_LOWTOHIGH (0x1 << 8) -#define OMAP_TIMER_CTRL_TCM_HIGHTOLOW (0x2 << 8) -#define OMAP_TIMER_CTRL_TCM_BOTHEDGES (0x3 << 8) -#define OMAP_TIMER_CTRL_SCPWM (1 << 7) -#define OMAP_TIMER_CTRL_CE (1 << 6) /* compare enable */ -#define OMAP_TIMER_CTRL_PRE (1 << 5) /* prescaler enable */ -#define OMAP_TIMER_CTRL_PTV_SHIFT 2 /* how much to shift the prescaler value */ -#define OMAP_TIMER_CTRL_AR (1 << 1) /* auto-reload enable */ -#define OMAP_TIMER_CTRL_ST (1 << 0) /* start timer */ +#ifndef __ASM_ARCH_DMTIMER_H +#define __ASM_ARCH_DMTIMER_H -/* timer interrupt enable bits */ -#define OMAP_TIMER_INT_CAPTURE (1 << 2) -#define OMAP_TIMER_INT_OVERFLOW (1 << 1) -#define OMAP_TIMER_INT_MATCH (1 << 0) +/* clock sources */ +#define OMAP_TIMER_SRC_SYS_CLK 0x00 +#define OMAP_TIMER_SRC_32_KHZ 0x01 +#define OMAP_TIMER_SRC_EXT_CLK 0x02 +/* timer interrupt enable bits */ +#define OMAP_TIMER_INT_CAPTURE (1 << 2) +#define OMAP_TIMER_INT_OVERFLOW (1 << 1) +#define OMAP_TIMER_INT_MATCH (1 << 0) -struct omap_dm_timer { - struct list_head timer_list; +/* trigger types */ +#define OMAP_TIMER_TRIGGER_NONE 0x00 +#define OMAP_TIMER_TRIGGER_OVERFLOW 0x01 +#define OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE 0x02 - u32 base; - unsigned int irq; -}; +struct omap_dm_timer; +struct clk; -u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, int reg); -void omap_dm_timer_write_reg(struct omap_dm_timer *timer, int reg, u32 value); +int omap_dm_timer_init(void); -struct omap_dm_timer * omap_dm_timer_request(void); +struct omap_dm_timer *omap_dm_timer_request(void); +struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id); void omap_dm_timer_free(struct omap_dm_timer *timer); -void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source); -void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value); -void omap_dm_timer_set_trigger(struct omap_dm_timer *timer, unsigned int value); -void omap_dm_timer_enable_compare(struct omap_dm_timer *timer); -void omap_dm_timer_enable_autoreload(struct omap_dm_timer *timer); +int omap_dm_timer_get_irq(struct omap_dm_timer *timer); + +u32 omap_dm_timer_modify_idlect_mask(u32 inputmask); +struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer); void omap_dm_timer_trigger(struct omap_dm_timer *timer); void omap_dm_timer_start(struct omap_dm_timer *timer); void omap_dm_timer_stop(struct omap_dm_timer *timer); -void omap_dm_timer_set_load(struct omap_dm_timer *timer, unsigned int load); -void omap_dm_timer_set_match(struct omap_dm_timer *timer, unsigned int match); +void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source); +void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value); +void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match); +void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, int trigger); +void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler); + +void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value); unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer); void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value); - unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer); -void omap_dm_timer_reset_counter(struct omap_dm_timer *timer); +void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value); int omap_dm_timers_active(void); -u32 omap_dm_timer_modify_idlect_mask(u32 inputmask); -#endif /* __ASM_ARCH_TIMER_H */ + +#endif /* __ASM_ARCH_DMTIMER_H */ diff --git a/include/asm-arm/arch-omap/gpmc.h b/include/asm-arm/arch-omap/gpmc.h new file mode 100644 index 000000000000..1a0a5207822d --- /dev/null +++ b/include/asm-arm/arch-omap/gpmc.h @@ -0,0 +1,91 @@ +/* + * General-Purpose Memory Controller for OMAP2 + * + * Copyright (C) 2005-2006 Nokia Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __OMAP2_GPMC_H +#define __OMAP2_GPMC_H + +#define GPMC_CS_CONFIG1 0x00 +#define GPMC_CS_CONFIG2 0x04 +#define GPMC_CS_CONFIG3 0x08 +#define GPMC_CS_CONFIG4 0x0c +#define GPMC_CS_CONFIG5 0x10 +#define GPMC_CS_CONFIG6 0x14 +#define GPMC_CS_CONFIG7 0x18 +#define GPMC_CS_NAND_COMMAND 0x1c +#define GPMC_CS_NAND_ADDRESS 0x20 +#define GPMC_CS_NAND_DATA 0x24 + +#define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31) +#define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 20) +#define GPMC_CONFIG1_READTYPE_ASYNC (0 << 29) +#define GPMC_CONFIG1_READTYPE_SYNC (1 << 29) +#define GPMC_CONFIG1_WRITETYPE_ASYNC (0 << 27) +#define GPMC_CONFIG1_WRITETYPE_SYNC (1 << 27) +#define GPMC_CONFIG1_CLKACTIVATIONTIME(val) ((val & 3) << 25) +#define GPMC_CONFIG1_PAGE_LEN(val) ((val & 3) << 23) +#define GPMC_CONFIG1_WAIT_READ_MON (1 << 22) +#define GPMC_CONFIG1_WAIT_WRITE_MON (1 << 21) +#define GPMC_CONFIG1_WAIT_MON_IIME(val) ((val & 3) << 18) +#define GPMC_CONFIG1_WAIT_PIN_SEL(val) ((val & 3) << 16) +#define GPMC_CONFIG1_DEVICESIZE(val) ((val & 3) << 12) +#define GPMC_CONFIG1_DEVICESIZE_16 GPMC_CONFIG1_DEVICESIZE(1) +#define GPMC_CONFIG1_DEVICETYPE(val) ((val & 3) << 10) +#define GPMC_CONFIG1_DEVICETYPE_NOR GPMC_CONFIG1_DEVICETYPE(0) +#define GPMC_CONFIG1_DEVICETYPE_NAND GPMC_CONFIG1_DEVICETYPE(1) +#define GPMC_CONFIG1_MUXADDDATA (1 << 9) +#define GPMC_CONFIG1_TIME_PARA_GRAN (1 << 4) +#define GPMC_CONFIG1_FCLK_DIV(val) (val & 3) +#define GPMC_CONFIG1_FCLK_DIV2 (GPMC_CONFIG1_FCLK_DIV(1)) +#define GPMC_CONFIG1_FCLK_DIV3 (GPMC_CONFIG1_FCLK_DIV(2)) +#define GPMC_CONFIG1_FCLK_DIV4 (GPMC_CONFIG1_FCLK_DIV(3)) + +/* + * Note that all values in this struct are in nanoseconds, while + * the register values are in gpmc_fck cycles. + */ +struct gpmc_timings { + /* Minimum clock period for synchronous mode */ + u16 sync_clk; + + /* Chip-select signal timings corresponding to GPMC_CS_CONFIG2 */ + u16 cs_on; /* Assertion time */ + u16 cs_rd_off; /* Read deassertion time */ + u16 cs_wr_off; /* Write deassertion time */ + + /* ADV signal timings corresponding to GPMC_CONFIG3 */ + u16 adv_on; /* Assertion time */ + u16 adv_rd_off; /* Read deassertion time */ + u16 adv_wr_off; /* Write deassertion time */ + + /* WE signals timings corresponding to GPMC_CONFIG4 */ + u16 we_on; /* WE assertion time */ + u16 we_off; /* WE deassertion time */ + + /* OE signals timings corresponding to GPMC_CONFIG4 */ + u16 oe_on; /* OE assertion time */ + u16 oe_off; /* OE deassertion time */ + + /* Access time and cycle time timings corresponding to GPMC_CONFIG5 */ + u16 page_burst_access; /* Multiple access word delay */ + u16 access; /* Start-cycle to first data valid delay */ + u16 rd_cycle; /* Total read cycle time */ + u16 wr_cycle; /* Total write cycle time */ +}; + +extern unsigned int gpmc_ns_to_ticks(unsigned int time_ns); + +extern void gpmc_cs_write_reg(int cs, int idx, u32 val); +extern u32 gpmc_cs_read_reg(int cs, int idx); +extern int gpmc_cs_calc_divider(int cs, unsigned int sync_clk); +extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t); +extern unsigned long gpmc_cs_get_base_addr(int cs); + + +#endif diff --git a/include/asm-arm/arch-omap/hardware.h b/include/asm-arm/arch-omap/hardware.h index c7d9e857795d..481048d65214 100644 --- a/include/asm-arm/arch-omap/hardware.h +++ b/include/asm-arm/arch-omap/hardware.h @@ -297,6 +297,10 @@ #include "board-perseus2.h" #endif +#ifdef CONFIG_MACH_OMAP_FSAMPLE +#include "board-fsample.h" +#endif + #ifdef CONFIG_MACH_OMAP_H3 #include "board-h3.h" #endif diff --git a/include/asm-arm/arch-omap/irqs.h b/include/asm-arm/arch-omap/irqs.h index 42098d99f302..2542495d8a43 100644 --- a/include/asm-arm/arch-omap/irqs.h +++ b/include/asm-arm/arch-omap/irqs.h @@ -242,10 +242,24 @@ #define INT_24XX_GPIO_BANK2 30 #define INT_24XX_GPIO_BANK3 31 #define INT_24XX_GPIO_BANK4 32 +#define INT_24XX_GPTIMER1 37 +#define INT_24XX_GPTIMER2 38 +#define INT_24XX_GPTIMER3 39 +#define INT_24XX_GPTIMER4 40 +#define INT_24XX_GPTIMER5 41 +#define INT_24XX_GPTIMER6 42 +#define INT_24XX_GPTIMER7 43 +#define INT_24XX_GPTIMER8 44 +#define INT_24XX_GPTIMER9 45 +#define INT_24XX_GPTIMER10 46 +#define INT_24XX_GPTIMER11 47 +#define INT_24XX_GPTIMER12 48 #define INT_24XX_MCBSP1_IRQ_TX 59 #define INT_24XX_MCBSP1_IRQ_RX 60 #define INT_24XX_MCBSP2_IRQ_TX 62 #define INT_24XX_MCBSP2_IRQ_RX 63 +#define INT_24XX_UART1_IRQ 72 +#define INT_24XX_UART2_IRQ 73 #define INT_24XX_UART3_IRQ 74 /* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and diff --git a/include/asm-arm/arch-omap/mux.h b/include/asm-arm/arch-omap/mux.h index 0dc24d4ba59c..679869c5e68f 100644 --- a/include/asm-arm/arch-omap/mux.h +++ b/include/asm-arm/arch-omap/mux.h @@ -410,6 +410,12 @@ enum omap24xx_index { /* 24xx clock */ W14_24XX_SYS_CLKOUT, + /* 24xx GPMC wait pin monitoring */ + L3_GPMC_WAIT0, + N7_GPMC_WAIT1, + M1_GPMC_WAIT2, + P1_GPMC_WAIT3, + /* 242X McBSP */ Y15_24XX_MCBSP2_CLKX, R14_24XX_MCBSP2_FSX, @@ -429,6 +435,26 @@ enum omap24xx_index { M15_24XX_GPIO92, V14_24XX_GPIO117, + /* 242x DBG GPIO */ + V4_242X_GPIO49, + W2_242X_GPIO50, + U4_242X_GPIO51, + V3_242X_GPIO52, + V2_242X_GPIO53, + V6_242X_GPIO53, + T4_242X_GPIO54, + Y4_242X_GPIO54, + T3_242X_GPIO55, + U2_242X_GPIO56, + + /* 24xx external DMA requests */ + AA10_242X_DMAREQ0, + AA6_242X_DMAREQ1, + E4_242X_DMAREQ2, + G4_242X_DMAREQ3, + D3_242X_DMAREQ4, + E3_242X_DMAREQ5, + P20_24XX_TSC_IRQ, /* UART3 */ diff --git a/include/asm-arm/arch-omap/pm.h b/include/asm-arm/arch-omap/pm.h index 05b003f3a94c..e46623c61a72 100644 --- a/include/asm-arm/arch-omap/pm.h +++ b/include/asm-arm/arch-omap/pm.h @@ -299,10 +299,43 @@ enum omap24xx_save_state { OMAP24XX_SLEEP_SAVE_INTC_MIR0, OMAP24XX_SLEEP_SAVE_INTC_MIR1, OMAP24XX_SLEEP_SAVE_INTC_MIR2, + + OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_MPU, + OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_CORE, + OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_GFX, + OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_DSP, + OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_MDM, + + OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_MPU, + OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_CORE, + OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_GFX, + OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_DSP, + OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_MDM, + + OMAP24XX_SLEEP_SAVE_CM_IDLEST1_CORE, + OMAP24XX_SLEEP_SAVE_CM_IDLEST2_CORE, + OMAP24XX_SLEEP_SAVE_CM_IDLEST3_CORE, + OMAP24XX_SLEEP_SAVE_CM_IDLEST4_CORE, + OMAP24XX_SLEEP_SAVE_CM_IDLEST_GFX, + OMAP24XX_SLEEP_SAVE_CM_IDLEST_WKUP, + OMAP24XX_SLEEP_SAVE_CM_IDLEST_CKGEN, + OMAP24XX_SLEEP_SAVE_CM_IDLEST_DSP, + OMAP24XX_SLEEP_SAVE_CM_IDLEST_MDM, + + OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE1_CORE, + OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE2_CORE, + OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE3_CORE, + OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE4_CORE, + OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_WKUP, + OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_PLL, + OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_DSP, + OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_MDM, + OMAP24XX_SLEEP_SAVE_CM_FCLKEN1_CORE, OMAP24XX_SLEEP_SAVE_CM_FCLKEN2_CORE, OMAP24XX_SLEEP_SAVE_CM_ICLKEN1_CORE, OMAP24XX_SLEEP_SAVE_CM_ICLKEN2_CORE, + OMAP24XX_SLEEP_SAVE_CM_ICLKEN3_CORE, OMAP24XX_SLEEP_SAVE_CM_ICLKEN4_CORE, OMAP24XX_SLEEP_SAVE_GPIO1_IRQENABLE1, OMAP24XX_SLEEP_SAVE_GPIO2_IRQENABLE1, diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index 9f83f4adfbf3..f5cc65dd7d0d 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -1329,6 +1329,7 @@ #define GPIO84_NSRXD 84 /* NSSP receive */ #define GPIO85_nPCE_1 85 /* Card Enable for Card Space (PXA27x) */ #define GPIO92_MMCDAT0 92 /* MMC DAT0 (PXA27x) */ +#define GPIO102_nPCE_1 102 /* PCMCIA (PXA27x) */ #define GPIO109_MMCDAT1 109 /* MMC DAT1 (PXA27x) */ #define GPIO110_MMCDAT2 110 /* MMC DAT2 (PXA27x) */ #define GPIO110_MMCCS0 110 /* MMC Chip Select 0 (PXA27x) */ @@ -1471,6 +1472,7 @@ #define GPIO84_NSSP_RX (84 | GPIO_ALT_FN_2_IN) #define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT) #define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT) +#define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT) #define GPIO104_pSKTSEL_MD (104 | GPIO_ALT_FN_1_OUT) #define GPIO109_MMCDAT1_MD (109 | GPIO_ALT_FN_1_OUT) #define GPIO110_MMCDAT2_MD (110 | GPIO_ALT_FN_1_OUT) diff --git a/include/asm-arm/arch-pxa/trizeps4.h b/include/asm-arm/arch-pxa/trizeps4.h new file mode 100644 index 000000000000..641d0ec110bb --- /dev/null +++ b/include/asm-arm/arch-pxa/trizeps4.h @@ -0,0 +1,106 @@ +/************************************************************************ + * Include file for TRIZEPS4 SoM and ConXS eval-board + * Copyright (c) Jürgen Schindele + * 2006 + ************************************************************************/ + +/* + * Includes/Defines + */ +#ifndef _TRIPEPS4_H_ +#define _TRIPEPS4_H_ + +/* physical memory regions */ +#define TRIZEPS4_FLASH_PHYS (PXA_CS0_PHYS) /* Flash region */ +#define TRIZEPS4_DISK_PHYS (PXA_CS1_PHYS) /* Disk On Chip region */ +#define TRIZEPS4_ETH_PHYS (PXA_CS2_PHYS) /* Ethernet DM9000 region */ +#define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */ +#define TRIZEPS4_SDRAM_BASE 0xa0000000 /* SDRAM region */ + +#define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board CSFR register */ +#define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000) /* Logic chip on ConXS-Board BOCR register */ +#define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000) /* Logic chip on ConXS-Board IRCR register*/ +#define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000) /* Logic chip on ConXS-Board UPSR register*/ +#define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000) /* Logic chip on ConXS-Board DICR register*/ + +/* virtual memory regions */ +#define TRIZEPS4_DISK_VIRT 0xF0000000 /* Disk On Chip region */ + +#define TRIZEPS4_PIC_VIRT 0xF0100000 /* not used */ +#define TRIZEPS4_CFSR_VIRT 0xF0100000 +#define TRIZEPS4_BOCR_VIRT 0xF0200000 +#define TRIZEPS4_DICR_VIRT 0xF0300000 +#define TRIZEPS4_IRCR_VIRT 0xF0400000 +#define TRIZEPS4_UPSR_VIRT 0xF0500000 + +/* size of flash */ +#define TRIZEPS4_FLASH_SIZE 0x02000000 /* Flash size 32 MB */ + +/* Ethernet Controller Davicom DM9000 */ +#define GPIO_DM9000 101 +#define TRIZEPS4_ETH_IRQ IRQ_GPIO(GPIO_DM9000) + +/* UCB1400 audio / TS-controller */ +#define GPIO_UCB1400 1 +#define TRIZEPS4_UCB1400_IRQ IRQ_GPIO(GPIO_UCB1400) + +/* PCMCIA socket Compact Flash */ +#define GPIO_PCD 11 /* PCMCIA Card Detect */ +#define TRIZEPS4_CD_IRQ IRQ_GPIO(GPIO_PCD) +#define GPIO_PRDY 13 /* READY / nINT */ +#define TRIZEPS4_READY_NINT IRQ_GPIO(GPIO_PRDY) + +/* MMC socket */ +#define GPIO_MMC_DET 12 +#define TRIZEPS4_MMC_IRQ IRQ_GPIO(GPIO_MMC_DET) + +/* LEDS using tx2 / rx2 */ +#define GPIO_SYS_BUSY_LED 46 +#define GPIO_HEARTBEAT_LED 47 + +/* Off-module PIC on ConXS board */ +#define GPIO_PIC 0 +#define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC) + +#define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT) +#define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS) + +#define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT) +#define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS) + +#define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT) +#define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS) + +#ifndef __ASSEMBLY__ +#define ConXS_CFSR (*((volatile unsigned short *)CFSR_P2V(0x0C000000))) +#define ConXS_BCR (*((volatile unsigned short *)BCR_P2V(0x0E000000))) +#define ConXS_DCR (*((volatile unsigned short *)DCR_P2V(0x0F800000))) +#else +#define ConXS_CFSR CFSR_P2V(0x0C000000) +#define ConXS_BCR BCR_P2V(0x0E000000) +#define ConXS_DCR DCR_P2V(0x0F800000) +#endif + +#define ConXS_CFSR_BVD_MASK 0x0003 +#define ConXS_CFSR_BVD1 (1 << 0) +#define ConXS_CFSR_BVD2 (1 << 1) +#define ConXS_CFSR_VS_MASK 0x000C +#define ConXS_CFSR_VS1 (1 << 2) +#define ConXS_CFSR_VS2 (1 << 3) +#define ConXS_CFSR_VS_5V (0x3 << 2) +#define ConXS_CFSR_VS_3V3 0x0 + +#define ConXS_BCR_S0_POW_EN0 (1 << 0) +#define ConXS_BCR_S0_POW_EN1 (1 << 1) +#define ConXS_BCR_L_DISP (1 << 4) +#define ConXS_BCR_CF_BUF_EN (1 << 5) +#define ConXS_BCR_CF_RESET (1 << 7) +#define ConXS_BCR_S0_VCC_3V3 0x1 +#define ConXS_BCR_S0_VCC_5V0 0x2 +#define ConXS_BCR_S0_VPP_12V 0x4 +#define ConXS_BCR_S0_VPP_3V3 0x8 + +#define ConXS_IRCR_MODE (1 << 0) +#define ConXS_IRCR_SD (1 << 1) + +#endif /* _TRIPEPS4_H_ */ diff --git a/include/asm-arm/bug.h b/include/asm-arm/bug.h index 7fb02138f585..0e36fd5d87df 100644 --- a/include/asm-arm/bug.h +++ b/include/asm-arm/bug.h @@ -1,7 +1,6 @@ #ifndef _ASMARM_BUG_H #define _ASMARM_BUG_H -#include <linux/config.h> #ifdef CONFIG_BUG #ifdef CONFIG_DEBUG_BUGVERBOSE diff --git a/include/asm-arm/dyntick.h b/include/asm-arm/dyntick.h new file mode 100644 index 000000000000..19fab2d2b760 --- /dev/null +++ b/include/asm-arm/dyntick.h @@ -0,0 +1,6 @@ +#ifndef _ASMARM_DYNTICK_H +#define _ASMARM_DYNTICK_H + +#include <asm/mach/time.h> + +#endif /* _ASMARM_DYNTICK_H */ diff --git a/include/asm-arm/floppy.h b/include/asm-arm/floppy.h index aa0c8d28d8d9..54b5ae44ed94 100644 --- a/include/asm-arm/floppy.h +++ b/include/asm-arm/floppy.h @@ -25,7 +25,7 @@ #define fd_inb(port) inb((port)) #define fd_request_irq() request_irq(IRQ_FLOPPYDISK,floppy_interrupt,\ - SA_INTERRUPT,"floppy",NULL) + IRQF_DISABLED,"floppy",NULL) #define fd_free_irq() free_irq(IRQ_FLOPPYDISK,NULL) #define fd_disable_irq() disable_irq(IRQ_FLOPPYDISK) #define fd_enable_irq() enable_irq(IRQ_FLOPPYDISK) diff --git a/include/asm-arm/hw_irq.h b/include/asm-arm/hw_irq.h new file mode 100644 index 000000000000..ea856971989a --- /dev/null +++ b/include/asm-arm/hw_irq.h @@ -0,0 +1,20 @@ +/* + * Nothing to see here yet + */ +#ifndef _ARCH_ARM_HW_IRQ_H +#define _ARCH_ARM_HW_IRQ_H + +#include <asm/mach/irq.h> + +#if defined(CONFIG_NO_IDLE_HZ) +# include <asm/dyntick.h> +# define handle_dynamic_tick(action) \ + if (!(action->flags & IRQF_TIMER) && system_timer->dyn_tick) { \ + write_seqlock(&xtime_lock); \ + if (system_timer->dyn_tick->state & DYN_TICK_ENABLED) \ + system_timer->dyn_tick->handler(irq, 0, regs); \ + write_sequnlock(&xtime_lock); \ + } +#endif + +#endif diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h index 66e67e60bc56..283af50a16cb 100644 --- a/include/asm-arm/irq.h +++ b/include/asm-arm/irq.h @@ -21,18 +21,13 @@ struct irqaction; -extern void disable_irq_nosync(unsigned int); -extern void disable_irq(unsigned int); -extern void enable_irq(unsigned int); - /* - * These correspond with the SA_TRIGGER_* defines, and therefore the - * IORESOURCE_IRQ_* defines. + * Migration helpers */ -#define __IRQT_RISEDGE (1 << 0) -#define __IRQT_FALEDGE (1 << 1) -#define __IRQT_HIGHLVL (1 << 2) -#define __IRQT_LOWLVL (1 << 3) +#define __IRQT_FALEDGE IRQ_TYPE_EDGE_FALLING +#define __IRQT_RISEDGE IRQ_TYPE_EDGE_RISING +#define __IRQT_LOWLVL IRQ_TYPE_LEVEL_LOW +#define __IRQT_HIGHLVL IRQ_TYPE_LEVEL_HIGH #define IRQT_NOEDGE (0) #define IRQT_RISING (__IRQT_RISEDGE) @@ -40,12 +35,7 @@ extern void enable_irq(unsigned int); #define IRQT_BOTHEDGE (__IRQT_RISEDGE|__IRQT_FALEDGE) #define IRQT_LOW (__IRQT_LOWLVL) #define IRQT_HIGH (__IRQT_HIGHLVL) -#define IRQT_PROBE (1 << 4) - -int set_irq_type(unsigned int irq, unsigned int type); -void disable_irq_wake(unsigned int irq); -void enable_irq_wake(unsigned int irq); -int setup_irq(unsigned int, struct irqaction *); +#define IRQT_PROBE IRQ_TYPE_PROBE extern void migrate_irqs(void); #endif diff --git a/include/asm-arm/mach/irq.h b/include/asm-arm/mach/irq.h index d4d420ecf3a8..131f33733d25 100644 --- a/include/asm-arm/mach/irq.h +++ b/include/asm-arm/mach/irq.h @@ -10,95 +10,9 @@ #ifndef __ASM_ARM_MACH_IRQ_H #define __ASM_ARM_MACH_IRQ_H -struct irqdesc; -struct pt_regs; -struct seq_file; - -typedef void (*irq_handler_t)(unsigned int, struct irqdesc *, struct pt_regs *); -typedef void (*irq_control_t)(unsigned int); - -struct irqchip { - /* - * Acknowledge the IRQ. - * If this is a level-based IRQ, then it is expected to mask the IRQ - * as well. - */ - void (*ack)(unsigned int); - /* - * Mask the IRQ in hardware. - */ - void (*mask)(unsigned int); - /* - * Unmask the IRQ in hardware. - */ - void (*unmask)(unsigned int); - /* - * Ask the hardware to re-trigger the IRQ. - * Note: This method _must_ _not_ call the interrupt handler. - * If you are unable to retrigger the interrupt, do not - * provide a function, or if you do, return non-zero. - */ - int (*retrigger)(unsigned int); - /* - * Set the type of the IRQ. - */ - int (*set_type)(unsigned int, unsigned int); - /* - * Set wakeup-enable on the selected IRQ - */ - int (*set_wake)(unsigned int, unsigned int); - -#ifdef CONFIG_SMP - /* - * Route an interrupt to a CPU - */ - void (*set_cpu)(struct irqdesc *desc, unsigned int irq, unsigned int cpu); -#endif -}; - -struct irqdesc { - irq_handler_t handle; - struct irqchip *chip; - struct irqaction *action; - struct list_head pend; - void __iomem *base; - void *data; - unsigned int disable_depth; - - unsigned int triggered: 1; /* IRQ has occurred */ - unsigned int running : 1; /* IRQ is running */ - unsigned int pending : 1; /* IRQ is pending */ - unsigned int probing : 1; /* IRQ in use for a probe */ - unsigned int probe_ok : 1; /* IRQ can be used for probe */ - unsigned int valid : 1; /* IRQ claimable */ - unsigned int noautoenable : 1; /* don't automatically enable IRQ */ - unsigned int unused :25; - - unsigned int irqs_unhandled; - struct proc_dir_entry *procdir; - -#ifdef CONFIG_SMP - cpumask_t affinity; - unsigned int cpu; -#endif - - /* - * IRQ lock detection - */ - unsigned int lck_cnt; - unsigned int lck_pc; - unsigned int lck_jif; -}; - -extern struct irqdesc irq_desc[]; +#include <linux/irq.h> -/* - * Helpful inline function for calling irq descriptor handlers. - */ -static inline void desc_handle_irq(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) -{ - desc->handle(irq, desc, regs); -} +struct seq_file; /* * This is internal. Do not use it. @@ -106,18 +20,22 @@ static inline void desc_handle_irq(unsigned int irq, struct irqdesc *desc, struc extern void (*init_arch_irq)(void); extern void init_FIQ(void); extern int show_fiq_list(struct seq_file *, void *); -void __set_irq_handler(unsigned int irq, irq_handler_t, int); /* - * External stuff. + * Function wrappers + */ +#define set_irq_chipdata(irq, d) set_irq_chip_data(irq, d) +#define get_irq_chipdata(irq) get_irq_chip_data(irq) + +/* + * Obsolete inline function for calling irq descriptor handlers. */ -#define set_irq_handler(irq,handler) __set_irq_handler(irq,handler,0) -#define set_irq_chained_handler(irq,handler) __set_irq_handler(irq,handler,1) -#define set_irq_data(irq,d) do { irq_desc[irq].data = d; } while (0) -#define set_irq_chipdata(irq,d) do { irq_desc[irq].base = d; } while (0) -#define get_irq_chipdata(irq) (irq_desc[irq].base) +static inline void desc_handle_irq(unsigned int irq, struct irq_desc *desc, + struct pt_regs *regs) +{ + desc->handle_irq(irq, desc, regs); +} -void set_irq_chip(unsigned int irq, struct irqchip *); void set_irq_flags(unsigned int irq, unsigned int flags); #define IRQF_VALID (1 << 0) @@ -125,12 +43,25 @@ void set_irq_flags(unsigned int irq, unsigned int flags); #define IRQF_NOAUTOEN (1 << 2) /* - * Built-in IRQ handlers. + * This is for easy migration, but should be changed in the source */ -void do_level_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs); -void do_edge_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs); -void do_simple_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs); -void do_bad_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs); -void dummy_mask_unmask_irq(unsigned int irq); +#define do_level_IRQ handle_level_irq +#define do_edge_IRQ handle_edge_irq +#define do_simple_IRQ handle_simple_irq +#define irqdesc irq_desc +#define irqchip irq_chip + +#define do_bad_IRQ(irq,desc,regs) \ +do { \ + spin_lock(&desc->lock); \ + handle_bad_irq(irq, desc, regs); \ + spin_unlock(&desc->lock); \ +} while(0) + +extern unsigned long irq_err_count; +static inline void ack_bad_irq(int irq) +{ + irq_err_count++; +} #endif diff --git a/include/asm-arm/mach/pci.h b/include/asm-arm/mach/pci.h index 25d540ed0079..923e0ca66200 100644 --- a/include/asm-arm/mach/pci.h +++ b/include/asm-arm/mach/pci.h @@ -28,7 +28,7 @@ struct hw_pci { struct pci_sys_data { struct list_head node; int busnr; /* primary bus number */ - unsigned long mem_offset; /* bus->cpu memory mapping offset */ + u64 mem_offset; /* bus->cpu memory mapping offset */ unsigned long io_offset; /* bus->cpu IO mapping offset */ struct pci_bus *bus; /* PCI bus */ struct resource *resource[3]; /* Primary PCI bus resources */ diff --git a/include/asm-arm/mach/time.h b/include/asm-arm/mach/time.h index 9f28073559e8..dee0bc336fe8 100644 --- a/include/asm-arm/mach/time.h +++ b/include/asm-arm/mach/time.h @@ -69,6 +69,7 @@ extern void timer_tick(struct pt_regs *); /* * Kernel time keeping support. */ +struct timespec; extern int (*set_rtc)(void); extern void save_time_delta(struct timespec *delta, struct timespec *rtc); extern void restore_time_delta(struct timespec *delta, struct timespec *rtc); diff --git a/include/asm-arm/memory.h b/include/asm-arm/memory.h index 94f973b704f1..91d536c215d7 100644 --- a/include/asm-arm/memory.h +++ b/include/asm-arm/memory.h @@ -68,6 +68,11 @@ */ #define XIP_VIRT_ADDR(physaddr) (MODULE_START + ((physaddr) & 0x000fffff)) +/* + * Allow 16MB-aligned ioremap pages + */ +#define IOREMAP_MAX_ORDER 24 + #else /* CONFIG_MMU */ /* diff --git a/include/asm-arm/mmu.h b/include/asm-arm/mmu.h index 23dde52e0945..fe2a23b5627b 100644 --- a/include/asm-arm/mmu.h +++ b/include/asm-arm/mmu.h @@ -7,6 +7,7 @@ typedef struct { #if __LINUX_ARM_ARCH__ >= 6 unsigned int id; #endif + unsigned int kvm_seq; } mm_context_t; #if __LINUX_ARM_ARCH__ >= 6 diff --git a/include/asm-arm/mmu_context.h b/include/asm-arm/mmu_context.h index 9fadb01e030d..d1a65b1edcaa 100644 --- a/include/asm-arm/mmu_context.h +++ b/include/asm-arm/mmu_context.h @@ -17,6 +17,8 @@ #include <asm/cacheflush.h> #include <asm/proc-fns.h> +void __check_kvm_seq(struct mm_struct *mm); + #if __LINUX_ARM_ARCH__ >= 6 /* @@ -45,13 +47,21 @@ static inline void check_context(struct mm_struct *mm) { if (unlikely((mm->context.id ^ cpu_last_asid) >> ASID_BITS)) __new_context(mm); + + if (unlikely(mm->context.kvm_seq != init_mm.context.kvm_seq)) + __check_kvm_seq(mm); } #define init_new_context(tsk,mm) (__init_new_context(tsk,mm),0) #else -#define check_context(mm) do { } while (0) +static inline void check_context(struct mm_struct *mm) +{ + if (unlikely(mm->context.kvm_seq != init_mm.context.kvm_seq)) + __check_kvm_seq(mm); +} + #define init_new_context(tsk,mm) 0 #endif diff --git a/include/asm-arm/pgtable-hwdef.h b/include/asm-arm/pgtable-hwdef.h index 1bc1f997bda2..f3b5120c99fe 100644 --- a/include/asm-arm/pgtable-hwdef.h +++ b/include/asm-arm/pgtable-hwdef.h @@ -28,6 +28,7 @@ */ #define PMD_SECT_BUFFERABLE (1 << 2) #define PMD_SECT_CACHEABLE (1 << 3) +#define PMD_SECT_XN (1 << 4) /* v6 */ #define PMD_SECT_AP_WRITE (1 << 10) #define PMD_SECT_AP_READ (1 << 11) #define PMD_SECT_TEX(x) ((x) << 12) /* v5 */ diff --git a/include/asm-arm/procinfo.h b/include/asm-arm/procinfo.h index 842526055225..edb7b6502fcf 100644 --- a/include/asm-arm/procinfo.h +++ b/include/asm-arm/procinfo.h @@ -29,7 +29,8 @@ struct processor; struct proc_info_list { unsigned int cpu_val; unsigned int cpu_mask; - unsigned long __cpu_mmu_flags; /* used by head.S */ + unsigned long __cpu_mm_mmu_flags; /* used by head.S */ + unsigned long __cpu_io_mmu_flags; /* used by head.S */ unsigned long __cpu_flush; /* used by head.S */ const char *arch_name; const char *elf_name; diff --git a/include/asm-arm/signal.h b/include/asm-arm/signal.h index ced69161917b..d0fb487aba4f 100644 --- a/include/asm-arm/signal.h +++ b/include/asm-arm/signal.h @@ -82,7 +82,6 @@ typedef unsigned long sigset_t; * is running in 26-bit. * SA_ONSTACK allows alternate signal stacks (see sigaltstack(2)). * SA_RESTART flag to get restarting signals (which were the default long ago) - * SA_INTERRUPT is a no-op, but left due to historical reasons. Use the * SA_NODEFER prevents the current signal from being masked in the handler. * SA_RESETHAND clears the handler when the signal is delivered. * @@ -101,7 +100,6 @@ typedef unsigned long sigset_t; #define SA_NOMASK SA_NODEFER #define SA_ONESHOT SA_RESETHAND -#define SA_INTERRUPT 0x20000000 /* dummy -- ignored */ /* @@ -113,10 +111,6 @@ typedef unsigned long sigset_t; #define MINSIGSTKSZ 2048 #define SIGSTKSZ 8192 -#ifdef __KERNEL__ -#define SA_TIMER 0x40000000 -#endif - #include <asm-generic/signal.h> #ifdef __KERNEL__ diff --git a/include/asm-arm/socket.h b/include/asm-arm/socket.h index 3c51da6438c9..19f7df702b06 100644 --- a/include/asm-arm/socket.h +++ b/include/asm-arm/socket.h @@ -48,5 +48,6 @@ #define SO_ACCEPTCONN 30 #define SO_PEERSEC 31 +#define SO_PASSSEC 34 #endif /* _ASM_SOCKET_H */ diff --git a/include/asm-arm/thread_info.h b/include/asm-arm/thread_info.h index c46b5c84275f..f28b236139ed 100644 --- a/include/asm-arm/thread_info.h +++ b/include/asm-arm/thread_info.h @@ -111,12 +111,13 @@ extern void iwmmxt_task_disable(struct thread_info *); extern void iwmmxt_task_copy(struct thread_info *, void *); extern void iwmmxt_task_restore(struct thread_info *, void *); extern void iwmmxt_task_release(struct thread_info *); +extern void iwmmxt_task_switch(struct thread_info *); #endif /* * We use bit 30 of the preempt_count to indicate that kernel - * preemption is occuring. See include/asm-arm/hardirq.h. + * preemption is occurring. See include/asm-arm/hardirq.h. */ #define PREEMPT_ACTIVE 0x40000000 |
