diff options
Diffstat (limited to 'drivers/video')
34 files changed, 3242 insertions, 675 deletions
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index a576dc261732..002b61b4f0f6 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -171,7 +171,6 @@ config FB_SYS_FOPS config FB_DEFERRED_IO bool depends on FB - default y config FB_METRONOME tristate @@ -628,11 +627,9 @@ config FB_MAC select FB_CFB_IMAGEBLIT select FB_MACMODES -# bool ' Apple DAFB display support' CONFIG_FB_DAFB config FB_HP300 bool - depends on (FB = y) && HP300 - select FB_CFB_FILLRECT + depends on (FB = y) && DIO select FB_CFB_IMAGEBLIT default y @@ -1774,6 +1771,11 @@ config FB_PXA If unsure, say N. +config FB_PXA_SMARTPANEL + bool "PXA Smartpanel LCD support" + default n + depends on FB_PXA + config FB_PXA_PARAMETERS bool "PXA LCD command line parameters" default n diff --git a/drivers/video/amifb.c b/drivers/video/amifb.c index e6492c1048bf..05a328c11a8b 100644 --- a/drivers/video/amifb.c +++ b/drivers/video/amifb.c @@ -2261,7 +2261,7 @@ int __init amifb_init(void) amifb_setup(option); #endif if (!MACH_IS_AMIGA || !AMIGAHW_PRESENT(AMI_VIDEO)) - return -ENXIO; + return -ENODEV; /* * We request all registers starting from bplpt[0] @@ -2333,7 +2333,7 @@ default_chipset: strcat(fb_info.fix.id, "Unknown"); goto default_chipset; #else /* CONFIG_FB_AMIGA_OCS */ - err = -ENXIO; + err = -ENODEV; goto amifb_error; #endif /* CONFIG_FB_AMIGA_OCS */ break; diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c index 8ffdf3578768..b004036d4087 100644 --- a/drivers/video/atmel_lcdfb.c +++ b/drivers/video/atmel_lcdfb.c @@ -441,14 +441,15 @@ static int atmel_lcdfb_set_par(struct fb_info *info) value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock)); - value = (value / 2) - 1; - dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", value); - - if (value <= 0) { + if (value < 2) { dev_notice(info->device, "Bypassing pixel clock divider\n"); lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS); } else { - lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET); + value = (value / 2) - 1; + dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", + value); + lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, + value << ATMEL_LCDC_CLKVAL_OFFSET); info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1))); dev_dbg(info->device, " updated pixclk: %lu KHz\n", PICOS2KHZ(info->var.pixclock)); diff --git a/drivers/video/bw2.c b/drivers/video/bw2.c index 275d9dab0c61..e721644bad74 100644 --- a/drivers/video/bw2.c +++ b/drivers/video/bw2.c @@ -17,11 +17,9 @@ #include <linux/init.h> #include <linux/fb.h> #include <linux/mm.h> +#include <linux/of_device.h> #include <asm/io.h> -#include <asm/oplib.h> -#include <asm/prom.h> -#include <asm/of_device.h> #include <asm/fbio.h> #include "sbuslib.h" @@ -299,7 +297,7 @@ static int __devinit bw2_probe(struct of_device *op, const struct of_device_id * par->physbase = op->resource[0].start; par->which_io = op->resource[0].flags & IORESOURCE_BITS; - sbusfb_fill_var(&info->var, dp->node, 1); + sbusfb_fill_var(&info->var, dp, 1); linebytes = of_getintprop_default(dp, "linebytes", info->var.xres); @@ -329,7 +327,7 @@ static int __devinit bw2_probe(struct of_device *op, const struct of_device_id * if (!info->screen_base) goto out_unmap_regs; - bw2_blank(0, info); + bw2_blank(FB_BLANK_UNBLANK, info); bw2_init_fix(info, linebytes); diff --git a/drivers/video/cg14.c b/drivers/video/cg14.c index 0db0fecba93b..b17e74671779 100644 --- a/drivers/video/cg14.c +++ b/drivers/video/cg14.c @@ -17,10 +17,9 @@ #include <linux/fb.h> #include <linux/mm.h> #include <linux/uaccess.h> +#include <linux/of_device.h> #include <asm/io.h> -#include <asm/prom.h> -#include <asm/of_device.h> #include <asm/fbio.h> #include "sbuslib.h" @@ -482,7 +481,7 @@ static int __devinit cg14_probe(struct of_device *op, const struct of_device_id spin_lock_init(&par->lock); - sbusfb_fill_var(&info->var, dp->node, 8); + sbusfb_fill_var(&info->var, dp, 8); info->var.red.length = 8; info->var.green.length = 8; info->var.blue.length = 8; diff --git a/drivers/video/cg3.c b/drivers/video/cg3.c index 010ea53978f8..3aa7b6cb0268 100644 --- a/drivers/video/cg3.c +++ b/drivers/video/cg3.c @@ -17,11 +17,9 @@ #include <linux/init.h> #include <linux/fb.h> #include <linux/mm.h> +#include <linux/of_device.h> #include <asm/io.h> -#include <asm/oplib.h> -#include <asm/prom.h> -#include <asm/of_device.h> #include <asm/fbio.h> #include "sbuslib.h" @@ -373,7 +371,7 @@ static int __devinit cg3_probe(struct of_device *op, par->physbase = op->resource[0].start; par->which_io = op->resource[0].flags & IORESOURCE_BITS; - sbusfb_fill_var(&info->var, dp->node, 8); + sbusfb_fill_var(&info->var, dp, 8); info->var.red.length = 8; info->var.green.length = 8; info->var.blue.length = 8; @@ -398,7 +396,7 @@ static int __devinit cg3_probe(struct of_device *op, if (!info->screen_base) goto out_unmap_regs; - cg3_blank(0, info); + cg3_blank(FB_BLANK_UNBLANK, info); if (!of_find_property(dp, "width", NULL)) { err = cg3_do_default_mode(par); diff --git a/drivers/video/cg6.c b/drivers/video/cg6.c index fc90db6da65a..2f64bb3bd254 100644 --- a/drivers/video/cg6.c +++ b/drivers/video/cg6.c @@ -17,9 +17,9 @@ #include <linux/init.h> #include <linux/fb.h> #include <linux/mm.h> +#include <linux/of_device.h> #include <asm/io.h> -#include <asm/of_device.h> #include <asm/fbio.h> #include "sbuslib.h" @@ -728,7 +728,7 @@ static int __devinit cg6_probe(struct of_device *op, par->physbase = op->resource[0].start; par->which_io = op->resource[0].flags & IORESOURCE_BITS; - sbusfb_fill_var(&info->var, dp->node, 8); + sbusfb_fill_var(&info->var, dp, 8); info->var.red.length = 8; info->var.green.length = 8; info->var.blue.length = 8; @@ -767,7 +767,7 @@ static int __devinit cg6_probe(struct of_device *op, cg6_bt_init(par); cg6_chip_init(info); - cg6_blank(0, info); + cg6_blank(FB_BLANK_UNBLANK, info); if (fb_alloc_cmap(&info->cmap, 256, 0)) goto out_unmap_regs; diff --git a/drivers/video/clps711xfb.c b/drivers/video/clps711xfb.c index 17b5267f44d7..9f8a389dc7ae 100644 --- a/drivers/video/clps711xfb.c +++ b/drivers/video/clps711xfb.c @@ -381,7 +381,7 @@ int __init clps711xfb_init(void) /* Register the /proc entries. */ clps7111fb_backlight_proc_entry = create_proc_entry("backlight", 0444, - &proc_root); + NULL); if (clps7111fb_backlight_proc_entry == NULL) { printk("Couldn't create the /proc entry for the backlight.\n"); return -EINVAL; diff --git a/drivers/video/console/fbcon.c b/drivers/video/console/fbcon.c index 8eda7b60df8f..5fa8b76673cb 100644 --- a/drivers/video/console/fbcon.c +++ b/drivers/video/console/fbcon.c @@ -1853,6 +1853,8 @@ static int fbcon_scroll(struct vc_data *vc, int t, int b, int dir, struct fb_info *info = registered_fb[con2fb_map[vc->vc_num]]; struct display *p = &fb_display[vc->vc_num]; int scroll_partial = info->flags & FBINFO_PARTIAL_PAN_OK; + unsigned short saved_ec; + int ret; if (fbcon_is_inactive(vc, info)) return -EINVAL; @@ -1865,6 +1867,11 @@ static int fbcon_scroll(struct vc_data *vc, int t, int b, int dir, * whole screen (prevents flicker). */ + saved_ec = vc->vc_video_erase_char; + vc->vc_video_erase_char = vc->vc_scrl_erase_char; + + ret = 0; + switch (dir) { case SM_UP: if (count > vc->vc_rows) /* Maximum realistic size */ @@ -1881,9 +1888,9 @@ static int fbcon_scroll(struct vc_data *vc, int t, int b, int dir, scr_memsetw((unsigned short *) (vc->vc_origin + vc->vc_size_row * (b - count)), - vc->vc_video_erase_char, + vc->vc_scrl_erase_char, vc->vc_size_row * count); - return 1; + ret = 1; break; case SCROLL_WRAP_MOVE: @@ -1953,9 +1960,10 @@ static int fbcon_scroll(struct vc_data *vc, int t, int b, int dir, scr_memsetw((unsigned short *) (vc->vc_origin + vc->vc_size_row * (b - count)), - vc->vc_video_erase_char, + vc->vc_scrl_erase_char, vc->vc_size_row * count); - return 1; + ret = 1; + break; } break; @@ -1972,9 +1980,9 @@ static int fbcon_scroll(struct vc_data *vc, int t, int b, int dir, scr_memsetw((unsigned short *) (vc->vc_origin + vc->vc_size_row * t), - vc->vc_video_erase_char, + vc->vc_scrl_erase_char, vc->vc_size_row * count); - return 1; + ret = 1; break; case SCROLL_WRAP_MOVE: @@ -2042,12 +2050,15 @@ static int fbcon_scroll(struct vc_data *vc, int t, int b, int dir, scr_memsetw((unsigned short *) (vc->vc_origin + vc->vc_size_row * t), - vc->vc_video_erase_char, + vc->vc_scrl_erase_char, vc->vc_size_row * count); - return 1; + ret = 1; + break; } + break; } - return 0; + vc->vc_video_erase_char = saved_ec; + return ret; } @@ -2507,6 +2518,9 @@ static int fbcon_do_set_font(struct vc_data *vc, int w, int h, c = vc->vc_video_erase_char; vc->vc_video_erase_char = ((c & 0xfe00) >> 1) | (c & 0xff); + c = vc->vc_def_color; + vc->vc_scrl_erase_char = + ((c & 0xFE00) >> 1) | (c & 0xFF); vc->vc_attr >>= 1; } } else if (!vc->vc_hi_font_mask && cnt == 512) { @@ -2537,9 +2551,14 @@ static int fbcon_do_set_font(struct vc_data *vc, int w, int h, if (vc->vc_can_do_color) { vc->vc_video_erase_char = ((c & 0xff00) << 1) | (c & 0xff); + c = vc->vc_def_color; + vc->vc_scrl_erase_char = + ((c & 0xFF00) << 1) | (c & 0xFF); vc->vc_attr <<= 1; - } else + } else { vc->vc_video_erase_char = c & ~0x100; + vc->vc_scrl_erase_char = c & ~0x100; + } } } diff --git a/drivers/video/console/mdacon.c b/drivers/video/console/mdacon.c index bd8d995fe25d..38a296bbdfc9 100644 --- a/drivers/video/console/mdacon.c +++ b/drivers/video/console/mdacon.c @@ -531,7 +531,7 @@ static void mdacon_cursor(struct vc_data *c, int mode) static int mdacon_scroll(struct vc_data *c, int t, int b, int dir, int lines) { - u16 eattr = mda_convert_attr(c->vc_video_erase_char); + u16 eattr = mda_convert_attr(c->vc_scrl_erase_char); if (!lines) return 0; diff --git a/drivers/video/console/sticon.c b/drivers/video/console/sticon.c index 67a682d6cc7b..a11cc2fdd4cd 100644 --- a/drivers/video/console/sticon.c +++ b/drivers/video/console/sticon.c @@ -170,12 +170,12 @@ static int sticon_scroll(struct vc_data *conp, int t, int b, int dir, int count) switch (dir) { case SM_UP: sti_bmove(sti, t + count, 0, t, 0, b - t - count, conp->vc_cols); - sti_clear(sti, b - count, 0, count, conp->vc_cols, conp->vc_video_erase_char); + sti_clear(sti, b - count, 0, count, conp->vc_cols, conp->vc_scrl_erase_char); break; case SM_DOWN: sti_bmove(sti, t, 0, t + count, 0, b - t - count, conp->vc_cols); - sti_clear(sti, t, 0, count, conp->vc_cols, conp->vc_video_erase_char); + sti_clear(sti, t, 0, count, conp->vc_cols, conp->vc_scrl_erase_char); break; } diff --git a/drivers/video/console/vgacon.c b/drivers/video/console/vgacon.c index 6df29a62d720..bd1f57b259d9 100644 --- a/drivers/video/console/vgacon.c +++ b/drivers/video/console/vgacon.c @@ -1350,7 +1350,7 @@ static int vgacon_scroll(struct vc_data *c, int t, int b, int dir, } else c->vc_origin += delta; scr_memsetw((u16 *) (c->vc_origin + c->vc_screenbuf_size - - delta), c->vc_video_erase_char, + delta), c->vc_scrl_erase_char, delta); } else { if (oldo - delta < vga_vram_base) { @@ -1363,7 +1363,7 @@ static int vgacon_scroll(struct vc_data *c, int t, int b, int dir, } else c->vc_origin -= delta; c->vc_scr_end = c->vc_origin + c->vc_screenbuf_size; - scr_memsetw((u16 *) (c->vc_origin), c->vc_video_erase_char, + scr_memsetw((u16 *) (c->vc_origin), c->vc_scrl_erase_char, delta); } c->vc_scr_end = c->vc_origin + c->vc_screenbuf_size; diff --git a/drivers/video/dnfb.c b/drivers/video/dnfb.c index b083ea7e9c69..606da043f4b4 100644 --- a/drivers/video/dnfb.c +++ b/drivers/video/dnfb.c @@ -284,6 +284,9 @@ int __init dnfb_init(void) { int ret; + if (!MACH_IS_APOLLO) + return -ENODEV; + if (fb_get_options("dnfb", NULL)) return -ENODEV; diff --git a/drivers/video/ffb.c b/drivers/video/ffb.c index 93dca3e2aa50..7992b13ee68f 100644 --- a/drivers/video/ffb.c +++ b/drivers/video/ffb.c @@ -16,11 +16,10 @@ #include <linux/fb.h> #include <linux/mm.h> #include <linux/timer.h> +#include <linux/of_device.h> #include <asm/io.h> #include <asm/upa.h> -#include <asm/prom.h> -#include <asm/of_device.h> #include <asm/fbio.h> #include "sbuslib.h" @@ -941,7 +940,7 @@ static int __devinit ffb_probe(struct of_device *op, info->screen_base = (char *) par->physbase + FFB_DFB24_POFF; info->pseudo_palette = par->pseudo_palette; - sbusfb_fill_var(&info->var, dp->node, 32); + sbusfb_fill_var(&info->var, dp, 32); par->fbsize = PAGE_ALIGN(info->var.xres * info->var.yres * 4); ffb_fixup_var_rgb(&info->var); @@ -987,7 +986,7 @@ static int __devinit ffb_probe(struct of_device *op, * chosen console, it will have video outputs off in * the DAC. */ - ffb_blank(0, info); + ffb_blank(FB_BLANK_UNBLANK, info); if (fb_alloc_cmap(&info->cmap, 256, 0)) goto out_unmap_dac; diff --git a/drivers/video/geode/lxfb_ops.c b/drivers/video/geode/lxfb_ops.c index cd9d4cc26954..aaef9165ec9b 100644 --- a/drivers/video/geode/lxfb_ops.c +++ b/drivers/video/geode/lxfb_ops.c @@ -63,54 +63,32 @@ static const struct { { 0x00014284, 19688 }, { 0x00011104, 20400 }, { 0x00016363, 23625 }, - { 0x00015303, 24380 }, { 0x000031AC, 24923 }, { 0x0000215D, 25175 }, { 0x00001087, 27000 }, { 0x0000216C, 28322 }, { 0x0000218D, 28560 }, - { 0x00010041, 29913 }, { 0x000010C9, 31200 }, { 0x00003147, 31500 }, - { 0x000141A1, 32400 }, { 0x000010A7, 33032 }, - { 0x00012182, 33375 }, - { 0x000141B1, 33750 }, { 0x00002159, 35112 }, { 0x00004249, 35500 }, { 0x00000057, 36000 }, - { 0x000141E1, 37125 }, { 0x0000219A, 37889 }, { 0x00002158, 39168 }, { 0x00000045, 40000 }, - { 0x000131A1, 40500 }, - { 0x00010061, 42301 }, { 0x00000089, 43163 }, - { 0x00012151, 43875 }, { 0x000010E7, 44900 }, { 0x00002136, 45720 }, - { 0x000152E1, 47250 }, - { 0x00010071, 48000 }, { 0x00003207, 49500 }, { 0x00002187, 50000 }, - { 0x00014291, 50625 }, - { 0x00011101, 51188 }, - { 0x00017481, 54563 }, { 0x00004286, 56250 }, - { 0x00014170, 57375 }, - { 0x00016210, 58500 }, { 0x000010E5, 60065 }, - { 0x00013140, 62796 }, { 0x00004214, 65000 }, - { 0x00016250, 65250 }, { 0x00001105, 68179 }, - { 0x000141C0, 69600 }, - { 0x00015220, 70160 }, - { 0x00010050, 72000 }, { 0x000031E4, 74250 }, { 0x00003183, 75000 }, { 0x00004284, 78750 }, - { 0x00012130, 80052 }, { 0x00001104, 81600 }, { 0x00006363, 94500 }, { 0x00005303, 97520 }, diff --git a/drivers/video/hpfb.c b/drivers/video/hpfb.c index 2eb4fb159084..b8ebff1e8493 100644 --- a/drivers/video/hpfb.c +++ b/drivers/video/hpfb.c @@ -382,7 +382,7 @@ int __init hpfb_init(void) #define INTFBPADDR 0x560000 if (!MACH_IS_HP300) - return -ENXIO; + return -ENODEV; if (fb_get_options("hpfb", NULL)) return -ENODEV; diff --git a/drivers/video/leo.c b/drivers/video/leo.c index f3160fc29795..8bc46e930340 100644 --- a/drivers/video/leo.c +++ b/drivers/video/leo.c @@ -16,10 +16,9 @@ #include <linux/init.h> #include <linux/fb.h> #include <linux/mm.h> +#include <linux/of_device.h> #include <asm/io.h> -#include <asm/prom.h> -#include <asm/of_device.h> #include <asm/fbio.h> #include "sbuslib.h" @@ -562,7 +561,7 @@ static int __devinit leo_probe(struct of_device *op, const struct of_device_id * par->physbase = op->resource[0].start; par->which_io = op->resource[0].flags & IORESOURCE_BITS; - sbusfb_fill_var(&info->var, dp->node, 32); + sbusfb_fill_var(&info->var, dp, 32); leo_fixup_var_rgb(&info->var); linebytes = of_getintprop_default(dp, "linebytes", @@ -601,7 +600,7 @@ static int __devinit leo_probe(struct of_device *op, const struct of_device_id * leo_init_wids(info); leo_init_hw(info); - leo_blank(0, info); + leo_blank(FB_BLANK_UNBLANK, info); if (fb_alloc_cmap(&info->cmap, 256, 0)) goto out_unmap_regs; diff --git a/drivers/video/logo/Kconfig b/drivers/video/logo/Kconfig index 9de1c114f809..39ac49e0682c 100644 --- a/drivers/video/logo/Kconfig +++ b/drivers/video/logo/Kconfig @@ -27,6 +27,16 @@ config LOGO_LINUX_CLUT224 bool "Standard 224-color Linux logo" default y +config LOGO_BLACKFIN_VGA16 + bool "16-colour Blackfin Processor Linux logo" + depends on BLACKFIN + default y + +config LOGO_BLACKFIN_CLUT224 + bool "224-colour Blackfin Processor Linux logo" + depends on BLACKFIN + default y + config LOGO_DEC_CLUT224 bool "224-color Digital Equipment Corporation Linux logo" depends on MACH_DECSTATION || ALPHA diff --git a/drivers/video/logo/Makefile b/drivers/video/logo/Makefile index a5fc4edf84e6..b91251d1fe41 100644 --- a/drivers/video/logo/Makefile +++ b/drivers/video/logo/Makefile @@ -4,6 +4,8 @@ obj-$(CONFIG_LOGO) += logo.o obj-$(CONFIG_LOGO_LINUX_MONO) += logo_linux_mono.o obj-$(CONFIG_LOGO_LINUX_VGA16) += logo_linux_vga16.o obj-$(CONFIG_LOGO_LINUX_CLUT224) += logo_linux_clut224.o +obj-$(CONFIG_LOGO_BLACKFIN_CLUT224) += logo_blackfin_clut224.o +obj-$(CONFIG_LOGO_BLACKFIN_VGA16) += logo_blackfin_vga16.o obj-$(CONFIG_LOGO_DEC_CLUT224) += logo_dec_clut224.o obj-$(CONFIG_LOGO_MAC_CLUT224) += logo_mac_clut224.o obj-$(CONFIG_LOGO_PARISC_CLUT224) += logo_parisc_clut224.o diff --git a/drivers/video/logo/logo.c b/drivers/video/logo/logo.c index fc72684aae5a..2e85a2b52d05 100644 --- a/drivers/video/logo/logo.c +++ b/drivers/video/logo/logo.c @@ -24,6 +24,8 @@ extern const struct linux_logo logo_linux_mono; extern const struct linux_logo logo_linux_vga16; extern const struct linux_logo logo_linux_clut224; +extern const struct linux_logo logo_blackfin_vga16; +extern const struct linux_logo logo_blackfin_clut224; extern const struct linux_logo logo_dec_clut224; extern const struct linux_logo logo_mac_clut224; extern const struct linux_logo logo_parisc_clut224; @@ -65,6 +67,10 @@ const struct linux_logo * __init_refok fb_find_logo(int depth) /* Generic Linux logo */ logo = &logo_linux_vga16; #endif +#ifdef CONFIG_LOGO_BLACKFIN_VGA16 + /* Blackfin processor logo */ + logo = &logo_blackfin_vga16; +#endif #ifdef CONFIG_LOGO_SUPERH_VGA16 /* SuperH Linux logo */ logo = &logo_superh_vga16; @@ -76,6 +82,10 @@ const struct linux_logo * __init_refok fb_find_logo(int depth) /* Generic Linux logo */ logo = &logo_linux_clut224; #endif +#ifdef CONFIG_LOGO_BLACKFIN_CLUT224 + /* Blackfin Linux logo */ + logo = &logo_blackfin_clut224; +#endif #ifdef CONFIG_LOGO_DEC_CLUT224 /* DEC Linux logo on MIPS/MIPS64 or ALPHA */ logo = &logo_dec_clut224; diff --git a/drivers/video/logo/logo_blackfin_clut224.ppm b/drivers/video/logo/logo_blackfin_clut224.ppm new file mode 100644 index 000000000000..dc9a50a14477 --- /dev/null +++ b/drivers/video/logo/logo_blackfin_clut224.ppm @@ -0,0 +1,1127 @@ +P3 +# This was generated by the GIMP & Netpbm tools +# gimp linux_bf.svg (create 80x80 save as linux_bf.ppm) +# pnmquant 224 linux_bf.ppm | pnmnoraw > logo_blackfin_clut224.ppm +# +80 80 +255 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +1 1 1 3 3 3 4 6 6 6 6 6 4 6 6 3 3 3 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 2 2 2 10 10 10 26 26 27 +44 44 45 66 66 66 78 81 81 78 81 81 75 75 76 60 60 60 +39 39 39 20 20 20 6 6 6 1 1 1 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 2 2 2 14 14 14 47 47 47 84 84 84 75 75 76 +47 47 47 12 12 12 0 0 0 0 0 0 0 0 0 20 20 20 +53 54 54 81 81 82 74 74 74 31 31 31 6 6 6 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +4 4 4 34 34 35 84 84 84 60 60 60 4 4 4 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 17 18 18 75 75 76 66 66 66 17 18 18 +1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 3 3 +42 42 43 84 84 84 8 8 8 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 3 3 36 40 40 10 16 16 0 0 0 31 31 31 84 84 84 +29 29 30 2 2 2 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 26 27 27 +84 84 84 3 3 3 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +15 19 19 114 115 115 110 114 114 44 46 46 0 0 0 12 12 12 +90 87 86 24 24 24 1 1 1 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 8 8 8 75 75 76 +14 14 14 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +30 40 40 133 133 133 129 130 130 78 85 85 23 31 30 0 0 0 +19 19 19 78 81 81 13 13 13 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 26 27 27 81 81 82 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +36 40 40 89 90 91 55 63 63 23 31 30 4 6 6 0 0 0 +0 0 0 60 60 60 47 47 47 2 2 2 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 2 2 2 53 54 54 34 34 35 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +4 10 10 7 9 9 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 1 1 1 84 84 84 13 13 13 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 4 6 6 78 81 81 2 2 2 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 65 64 64 36 36 36 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 10 11 11 81 81 82 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 12 12 12 67 70 70 4 4 4 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 16 16 16 81 81 82 0 0 0 +0 0 0 0 0 0 4 10 10 44 50 50 18 21 21 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 1 1 78 85 85 120 121 122 7 9 9 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 82 82 81 12 12 12 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 19 19 19 81 81 82 0 0 0 +0 0 0 2 2 2 8 8 8 55 63 63 108 110 110 52 58 58 +0 0 0 0 0 0 0 0 0 0 0 0 42 42 43 129 130 130 +140 142 143 114 115 115 110 114 114 129 130 130 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 75 75 76 24 24 24 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 19 19 19 74 74 74 0 0 0 +4 6 6 167 168 167 196 196 197 196 196 197 61 65 66 78 85 85 +0 0 0 0 0 0 0 0 0 118 118 118 202 202 203 219 219 219 +219 219 219 214 214 215 187 187 188 78 85 85 29 33 34 0 0 0 +0 0 0 0 0 0 0 0 0 60 60 60 39 39 39 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 19 19 19 72 71 71 0 0 0 +185 185 184 244 245 245 250 251 252 251 251 252 247 248 249 36 36 36 +0 0 0 0 0 0 13 13 13 243 243 241 252 252 252 253 253 253 +253 253 253 252 252 252 247 247 246 193 193 194 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 42 42 43 50 51 51 1 1 1 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 19 19 19 78 81 81 0 0 0 +247 247 246 193 193 194 95 97 97 193 193 194 255 255 255 237 237 238 +0 0 0 0 0 0 202 202 203 255 255 255 247 247 246 108 107 107 +82 85 86 167 168 167 255 255 255 248 248 249 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 34 34 35 56 56 56 2 2 2 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 19 19 19 78 81 81 0 0 0 +250 250 251 50 51 51 153 154 155 150 151 151 244 245 245 244 245 245 +44 50 50 84 89 89 153 154 155 255 255 255 140 142 143 0 0 0 +149 149 150 156 155 156 237 237 238 254 254 254 67 70 70 0 0 0 +0 0 0 0 0 0 0 0 0 39 39 39 47 47 47 1 1 1 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 19 19 19 81 81 82 0 0 0 +248 248 249 34 34 35 72 71 71 165 165 165 202 202 203 244 245 245 +10 16 16 82 85 86 89 90 91 255 255 255 95 97 97 0 0 0 +0 0 0 53 54 54 177 177 174 255 255 255 127 127 126 0 0 0 +0 0 0 0 0 0 0 0 0 39 39 39 36 36 36 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 14 14 14 78 81 81 0 0 0 +243 243 243 89 90 91 0 0 0 36 40 40 201 147 55 241 205 27 +241 205 27 241 205 27 241 205 27 238 192 33 108 110 110 0 0 0 +0 0 0 0 0 0 191 190 190 254 254 254 34 34 35 0 0 0 +0 0 0 0 0 0 0 0 0 42 42 43 42 42 43 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 10 10 10 75 75 76 0 0 0 +202 202 203 218 217 217 21 19 17 230 165 41 199 129 48 213 157 40 +244 212 23 243 206 27 180 121 62 243 206 27 244 209 25 226 179 40 +15 10 7 103 103 103 254 254 254 251 251 252 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 17 18 18 58 58 58 2 2 2 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 9 9 9 84 84 84 0 0 0 +0 0 0 226 226 219 213 157 40 244 209 25 245 211 23 245 211 23 +245 214 38 245 214 38 245 211 23 245 211 23 245 211 23 244 212 23 +244 212 23 241 205 27 226 179 40 196 196 197 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 74 74 74 4 6 6 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 7 7 7 84 84 84 0 0 0 +54 42 32 213 157 40 243 206 27 245 211 23 245 211 23 245 211 23 +245 215 41 245 214 35 245 211 23 245 211 23 245 214 35 245 215 41 +245 214 35 245 211 23 245 211 23 238 204 29 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 81 81 82 12 12 12 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 4 6 6 74 74 74 0 0 0 +201 147 55 241 205 27 245 211 23 245 211 23 245 211 23 245 213 29 +245 214 38 245 211 23 245 211 23 245 214 35 245 215 41 245 215 41 +245 213 29 142 83 36 142 83 36 244 209 25 1 1 1 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 74 74 74 25 25 26 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 4 4 4 72 71 71 6 6 6 +213 157 40 244 209 25 245 211 23 245 211 23 245 211 23 245 213 29 +244 212 23 245 211 23 245 214 35 245 215 41 245 215 41 245 213 29 +142 83 36 142 83 36 238 192 33 241 205 27 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 44 44 44 49 50 50 +2 2 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 3 3 3 65 64 64 17 18 18 +199 129 48 199 129 48 245 211 23 245 211 23 245 211 23 245 211 23 +245 211 23 244 212 23 245 214 38 245 214 38 142 83 36 142 83 36 +142 83 36 245 211 23 244 210 23 230 165 41 0 0 0 0 0 0 +78 81 81 114 115 115 73 79 79 0 0 0 3 3 3 81 81 82 +9 9 9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 1 1 1 49 50 50 29 29 30 +90 87 86 199 129 48 173 101 51 173 101 51 245 211 23 245 211 23 +245 211 23 230 165 41 142 83 36 142 83 36 142 83 36 245 211 23 +244 210 23 241 205 27 230 165 41 175 173 165 3 3 3 0 0 0 +44 46 46 118 118 118 118 118 118 108 110 110 0 0 0 75 75 76 +28 28 28 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 1 1 1 52 53 53 26 26 27 +118 118 118 175 173 165 199 129 48 173 101 51 173 101 51 173 101 51 +173 101 51 142 83 36 173 101 51 245 211 23 244 209 25 238 204 29 +213 157 40 214 196 166 227 227 227 214 214 215 120 121 122 0 0 0 +0 0 0 108 110 110 118 118 118 118 118 118 0 0 0 23 23 23 +66 66 66 4 6 6 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 7 7 7 75 75 76 4 4 4 +127 127 126 205 205 205 181 181 181 199 129 48 226 179 40 244 209 25 +244 209 25 244 209 25 243 206 27 238 192 33 213 157 40 187 166 103 +234 234 234 248 248 249 251 252 252 248 248 249 214 214 215 0 0 0 +0 0 0 0 0 0 103 103 103 100 103 103 0 0 0 0 0 0 +78 81 81 24 24 24 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 26 27 27 82 82 81 0 0 0 +146 146 147 234 234 234 222 221 221 178 178 179 180 121 62 213 157 40 +213 157 40 213 157 40 201 147 55 180 121 62 219 219 219 243 243 241 +253 253 253 255 255 255 255 255 255 255 255 255 250 250 251 120 121 122 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +20 20 20 72 71 71 8 8 8 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 10 10 10 75 75 76 22 22 22 0 0 0 +205 205 205 253 253 253 247 248 249 212 211 212 178 178 179 161 161 162 +165 165 165 181 181 181 205 205 205 227 227 227 244 245 245 254 254 254 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 239 239 240 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 67 70 70 39 39 39 2 2 2 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 4 4 4 50 51 51 60 60 60 0 0 0 16 16 16 +249 250 251 255 255 255 255 255 255 240 240 240 209 210 210 193 193 194 +200 200 197 212 211 212 231 231 231 246 247 248 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 253 253 253 +153 154 155 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 3 3 3 84 84 84 20 20 20 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +2 2 2 33 33 34 81 81 82 0 0 0 0 0 0 231 231 231 +255 255 255 255 255 255 255 255 255 253 253 253 234 234 234 222 221 221 +227 227 227 237 237 238 250 250 251 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +240 240 240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 26 27 27 72 71 71 8 8 8 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 +21 21 22 84 84 84 7 7 7 0 0 0 150 151 151 252 252 252 +255 255 255 255 255 255 255 255 255 255 255 255 252 252 252 244 245 245 +246 247 248 253 253 253 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +251 251 252 9 9 9 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 65 64 64 47 47 47 3 3 3 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12 12 12 +75 75 76 26 26 27 0 0 0 1 1 1 239 239 240 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 202 202 203 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 84 84 84 28 28 29 +1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 4 4 4 55 55 55 +60 60 60 0 0 0 0 0 0 95 97 97 248 248 249 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 244 245 245 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 14 14 14 82 82 81 +15 15 15 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 1 1 1 29 29 30 84 84 84 +0 0 0 0 0 0 0 0 0 156 155 156 247 247 246 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 247 247 246 240 240 240 232 232 233 232 232 233 +243 243 243 253 253 253 53 54 54 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 44 44 44 +60 60 60 6 6 6 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 10 10 10 81 81 82 14 14 14 +0 0 0 0 0 0 6 6 6 150 151 151 214 214 215 250 251 252 +255 255 255 255 255 255 255 255 255 246 247 248 218 217 217 214 214 215 +218 217 217 244 245 245 255 255 255 255 255 255 255 255 255 250 248 249 +232 232 233 214 214 215 196 196 197 182 183 184 181 181 181 181 181 181 +187 187 188 240 240 240 232 232 233 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +78 81 81 34 34 35 1 1 1 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 1 1 1 39 39 39 74 74 74 0 0 0 +0 0 0 0 0 0 60 60 60 161 161 162 200 200 197 229 229 230 +251 251 252 255 255 255 255 255 255 255 255 255 243 243 241 214 214 215 +248 248 249 255 255 255 255 255 255 255 255 255 255 255 255 254 254 254 +239 239 240 214 214 215 193 193 194 182 183 184 178 178 179 176 177 177 +176 177 177 182 183 184 248 248 249 14 14 14 0 0 0 61 65 66 +10 16 16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +10 10 10 84 84 84 13 13 13 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 10 11 11 82 82 81 7 7 7 0 0 0 +0 0 0 0 0 0 165 165 165 229 229 230 249 250 251 254 254 254 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 253 253 253 240 240 240 227 227 227 205 205 205 +181 181 181 176 177 177 191 190 190 227 227 227 0 0 0 44 50 50 +84 89 89 61 65 66 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 58 58 58 49 50 50 3 3 3 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 1 1 1 36 36 36 66 66 66 0 0 0 29 33 34 +0 3 3 26 27 27 234 234 234 254 254 254 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +254 254 254 253 253 254 252 253 253 253 253 254 253 254 254 253 254 254 +254 254 254 255 255 255 255 255 255 255 255 255 255 255 255 251 251 252 +227 227 227 187 187 188 176 177 177 222 221 221 13 13 13 0 0 0 +12 15 14 73 79 79 36 40 40 0 0 0 0 0 0 0 0 0 +0 0 0 1 1 1 90 87 86 17 18 18 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 7 7 7 78 81 81 12 12 12 23 31 30 52 58 58 +0 0 0 209 210 210 253 253 253 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 254 254 254 +251 251 252 150 151 151 103 103 103 129 130 130 196 196 197 250 250 251 +252 252 253 254 254 254 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 240 240 240 193 193 194 196 196 197 229 229 230 0 0 0 +0 0 0 4 10 10 30 40 40 0 3 3 0 0 0 0 0 0 +0 0 0 0 0 0 47 47 47 53 54 54 3 3 3 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 23 23 23 81 81 82 0 0 0 52 58 58 36 40 40 +42 42 43 250 250 251 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 254 254 254 +227 227 227 7 7 7 7 7 7 7 7 7 7 7 7 44 44 45 +156 155 156 249 250 251 253 253 253 254 254 254 255 255 255 255 255 255 +255 255 255 255 255 255 247 247 246 222 221 221 239 239 240 0 0 0 +30 40 40 44 50 50 23 31 30 29 33 34 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 90 87 86 16 16 16 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +2 2 2 50 51 51 42 42 43 29 33 34 52 58 58 0 0 0 +232 232 233 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 254 254 254 +250 251 252 44 44 44 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 56 56 56 209 210 210 252 252 253 254 254 254 255 255 255 +255 255 255 255 255 255 255 255 255 254 253 253 249 250 251 146 146 147 +36 40 40 44 50 50 36 40 40 67 70 70 61 65 66 0 0 0 +0 0 0 0 0 0 0 0 0 55 55 55 44 44 45 1 1 1 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +10 10 10 81 81 82 1 1 1 52 58 58 44 50 50 52 53 53 +251 251 252 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 254 254 254 +253 253 253 187 187 188 8 8 8 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 19 19 19 178 178 179 252 252 253 254 254 254 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 237 237 238 +10 16 16 30 40 40 0 3 3 23 31 30 84 89 89 0 0 0 +0 0 0 0 0 0 0 0 0 3 3 3 81 81 82 9 9 9 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +29 29 30 72 71 71 10 16 16 52 58 58 0 0 0 222 221 221 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +254 254 254 251 251 252 95 97 97 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 10 10 10 161 161 162 251 252 252 +254 254 254 255 255 255 255 255 255 255 255 255 255 255 255 248 248 249 +0 0 0 0 0 0 0 0 0 0 0 0 84 89 89 0 3 3 +0 0 0 0 0 0 0 0 0 0 0 0 74 74 74 26 27 27 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4 4 4 +65 64 64 20 20 20 20 25 25 30 40 40 0 0 0 247 247 246 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 253 253 254 222 221 221 9 9 9 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 8 8 8 149 149 150 +252 252 253 254 254 254 255 255 255 255 255 255 255 255 255 252 252 252 +0 0 0 0 0 0 0 0 0 0 0 0 73 79 79 12 15 14 +0 0 0 0 0 0 0 0 0 0 0 0 36 36 36 58 58 58 +3 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 20 20 20 +74 74 74 0 0 0 4 10 10 4 10 10 36 36 36 252 252 252 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 227 227 227 253 253 253 255 255 255 +255 255 255 254 254 254 250 251 252 65 64 64 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 8 8 8 +146 146 147 251 252 252 254 254 254 255 255 255 255 255 255 253 254 254 +0 0 0 0 0 0 0 0 0 0 0 0 52 58 58 10 16 16 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 82 82 81 +9 9 9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 4 6 6 65 64 64 +25 25 25 0 3 3 30 40 40 0 0 0 187 187 188 254 254 254 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 193 193 194 253 252 252 255 255 255 +255 255 255 255 255 255 252 253 253 129 130 130 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +8 8 8 149 149 150 252 252 253 254 254 254 255 255 255 254 254 254 +52 53 53 0 0 0 0 0 0 0 0 0 20 25 25 2 5 4 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 81 81 82 +20 20 20 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 26 26 27 81 81 82 +0 0 0 18 21 21 73 79 79 0 0 0 237 237 238 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 182 183 184 255 255 255 255 255 255 +255 255 255 255 255 255 253 253 253 176 177 177 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 8 8 8 153 154 155 251 252 252 254 254 254 255 255 255 +150 151 151 0 0 0 0 0 0 0 0 0 20 25 25 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 65 64 64 +33 33 34 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 6 6 6 67 70 70 20 20 20 +0 0 0 23 31 30 82 85 86 0 0 0 247 247 246 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 182 183 184 255 255 255 255 255 255 +255 255 255 255 255 255 253 254 254 214 214 215 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 8 8 8 156 155 156 252 252 253 254 254 254 +167 168 167 0 0 0 0 0 0 0 0 0 67 70 70 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 47 47 47 +44 44 44 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 21 21 22 75 75 76 0 0 0 +0 0 0 29 33 34 84 89 89 0 0 0 248 248 249 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 248 248 249 181 181 181 255 255 255 255 255 255 +255 255 255 255 255 255 254 254 254 240 240 240 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 8 8 8 161 161 162 251 252 252 +185 185 184 4 4 4 0 0 0 10 11 11 100 103 103 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 36 36 36 +55 55 55 2 2 2 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 33 33 34 50 51 51 0 0 0 +0 0 0 9 11 11 82 85 86 10 16 16 248 248 249 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 245 244 245 179 180 181 255 255 255 255 255 255 +255 255 255 255 255 255 254 254 254 251 252 252 20 20 20 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 10 10 10 161 161 162 +205 205 205 17 18 18 0 0 0 95 97 97 78 81 81 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 36 36 36 +53 54 54 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 31 31 31 58 58 58 0 0 0 +0 0 0 0 0 0 67 70 70 78 81 81 248 248 249 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 234 234 234 179 180 181 255 255 255 255 255 255 +255 255 255 255 255 255 254 254 254 251 252 252 23 23 23 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +10 11 11 84 84 84 161 161 162 209 210 210 229 229 230 237 237 238 +202 202 203 26 26 27 9 11 11 44 50 50 0 0 0 4 6 6 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 52 53 53 +39 39 39 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 23 23 23 78 81 81 213 157 40 +243 206 27 243 206 27 54 42 32 73 79 79 222 221 221 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 238 238 236 178 178 179 255 255 255 255 255 255 +255 255 255 255 255 255 254 254 254 251 252 253 36 36 36 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 84 84 84 +222 221 221 251 252 252 252 253 253 253 253 253 253 254 254 252 252 253 +146 146 147 140 142 143 156 155 156 110 114 114 26 27 27 82 85 86 +84 89 89 95 97 97 36 40 40 0 0 0 0 0 0 74 74 74 +23 23 23 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 2 2 2 14 14 14 +24 24 24 26 26 27 26 26 27 26 26 27 25 25 26 21 21 22 +7 7 7 0 0 0 1 1 1 34 34 35 238 192 33 244 210 23 +244 212 23 244 212 23 244 210 23 88 79 47 200 200 197 254 254 254 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 244 245 245 179 180 181 255 255 255 255 255 255 +255 255 255 255 255 255 254 254 254 252 252 253 36 36 36 7 7 7 +7 7 7 7 7 7 7 7 7 8 8 8 149 149 150 251 251 252 +252 252 253 253 253 253 253 253 253 250 248 249 239 223 156 239 223 156 +120 121 122 182 183 184 176 177 177 120 121 122 33 33 34 3 3 3 +0 0 0 67 70 70 146 146 147 20 25 25 1 1 1 82 82 81 +9 9 9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 19 19 19 89 90 91 +146 146 147 150 151 151 150 151 151 150 151 151 150 151 151 129 130 130 +58 58 58 6 6 6 14 14 14 201 147 55 245 211 23 245 213 29 +245 214 35 245 215 41 245 213 29 244 210 23 142 83 36 232 232 233 +254 254 254 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 185 185 184 255 255 255 255 255 255 +255 255 255 255 255 255 254 254 254 251 252 252 50 51 51 7 7 7 +7 7 7 7 7 7 7 7 7 146 146 147 251 252 252 252 253 253 +251 252 253 239 239 240 171 168 154 129 130 130 137 136 134 175 173 165 +221 218 200 65 64 64 22 22 22 186 186 187 114 115 115 26 26 27 +2 2 2 0 0 0 61 65 66 31 33 27 238 192 33 108 96 91 +9 9 9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 2 2 2 52 53 53 178 178 179 +21 21 22 7 7 7 7 7 7 7 7 7 7 7 7 118 118 118 +137 136 134 36 36 36 65 64 64 243 206 27 244 212 23 245 215 41 +245 215 41 245 215 41 245 215 41 244 209 25 244 209 25 1 1 1 +219 219 219 253 253 253 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 214 214 215 255 255 255 255 255 255 +255 255 255 255 255 255 254 254 254 252 252 253 50 51 51 7 7 7 +7 7 7 7 7 7 84 84 84 250 251 252 252 253 253 251 251 252 +167 168 167 22 22 22 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 34 34 35 187 187 188 103 103 103 +29 29 30 3 3 3 7 9 9 238 204 29 245 215 41 245 214 35 +28 28 28 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 7 7 7 90 87 86 178 178 179 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 16 16 16 +193 193 194 133 133 133 187 166 103 245 218 76 245 218 76 245 216 51 +245 216 51 245 218 76 246 224 96 245 218 76 245 218 76 245 218 76 +25 25 25 186 186 187 252 252 252 254 254 254 254 254 254 253 254 254 +254 254 254 254 254 254 254 254 254 246 247 248 254 254 254 253 254 254 +254 254 254 254 254 254 253 254 254 251 252 252 36 36 36 7 7 7 +7 7 7 20 20 20 229 229 230 253 253 253 252 253 253 178 178 179 +10 10 10 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 42 42 43 196 196 197 +118 118 118 33 33 34 238 204 29 245 215 41 245 215 41 245 215 41 +49 50 50 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 17 18 18 120 121 122 137 136 134 +7 7 7 7 7 7 34 34 35 20 20 20 7 7 7 7 7 7 +202 202 203 209 206 202 193 187 162 193 187 162 248 234 156 245 218 76 +245 218 76 248 234 156 193 187 162 193 187 162 193 187 162 214 196 166 +240 219 129 95 97 97 196 196 197 186 186 187 187 187 188 196 196 197 +252 252 253 251 252 253 212 211 212 187 187 188 196 196 197 251 252 252 +218 217 217 187 187 188 191 190 190 250 251 252 24 24 24 7 7 7 +7 7 7 110 114 114 252 252 253 253 254 254 250 251 252 89 90 91 +89 90 91 129 130 130 127 127 126 44 44 44 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 49 50 50 +202 202 203 214 196 166 245 216 51 245 214 38 245 214 35 245 214 38 +58 58 58 2 2 2 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 31 31 31 156 155 156 82 82 81 +7 7 7 10 10 10 237 237 238 66 66 66 7 7 7 25 25 25 +247 248 249 81 81 82 7 7 7 31 31 31 247 237 174 245 218 76 +246 226 108 200 200 197 7 7 7 7 7 7 7 7 7 137 136 134 +247 237 174 193 193 194 72 71 71 7 7 7 7 7 7 8 8 8 +196 196 197 250 251 252 67 70 70 7 7 7 84 84 84 244 245 245 +47 47 47 7 7 7 118 118 118 249 250 251 12 12 12 7 7 7 +9 9 9 218 217 217 253 253 253 254 254 254 252 253 253 251 251 252 +249 250 251 237 237 238 95 97 97 9 9 9 15 15 15 95 97 97 +47 47 47 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +66 66 66 240 230 197 246 226 108 245 214 38 245 211 23 244 212 23 +65 64 64 3 3 3 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 2 2 2 52 53 53 185 185 184 25 25 25 +7 7 7 60 60 60 240 240 240 14 14 14 7 7 7 84 84 84 +247 248 249 23 23 23 7 7 7 94 91 88 248 234 156 245 218 76 +248 234 156 127 127 126 7 7 7 7 7 7 7 7 7 167 168 167 +251 248 240 65 64 64 7 7 7 7 7 7 7 7 7 7 7 7 +84 84 84 243 243 243 15 15 15 7 7 7 140 142 143 146 146 147 +7 7 7 33 33 34 237 237 238 243 243 243 21 21 22 120 121 122 +218 217 217 252 252 253 254 254 254 253 253 254 252 253 253 251 252 252 +247 248 249 72 71 71 7 7 7 58 58 58 222 221 221 248 248 249 +75 75 76 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 82 82 81 246 239 193 246 226 108 245 216 51 245 214 38 +238 192 33 21 21 22 1 1 1 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 8 8 8 90 87 86 182 183 184 7 7 7 +7 7 7 120 121 122 187 187 188 7 7 7 7 7 7 146 146 147 +205 205 205 7 7 7 7 7 7 153 153 148 240 219 129 246 224 96 +246 239 193 39 39 39 60 60 60 108 110 110 7 7 7 202 202 203 +227 227 227 7 7 7 7 7 7 205 205 205 89 90 91 7 7 7 +120 121 122 193 193 194 7 7 7 7 7 7 186 186 187 25 25 25 +7 7 7 167 168 167 251 251 252 243 243 243 214 214 215 250 251 252 +251 252 253 254 254 254 253 253 253 219 219 219 140 140 139 140 140 139 +118 118 118 7 7 7 52 53 53 237 237 238 247 247 246 176 177 177 +8 8 8 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 95 97 97 246 239 193 246 226 108 245 216 51 +245 214 38 201 147 55 31 31 31 103 103 103 103 103 103 72 71 71 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 17 18 18 127 127 126 140 140 139 7 7 7 +7 7 7 17 18 18 17 18 18 7 7 7 95 97 97 244 245 245 +146 146 147 7 7 7 7 7 7 200 200 197 246 226 108 240 219 129 +194 194 184 7 7 7 140 140 139 89 90 91 7 7 7 232 232 233 +165 165 165 7 7 7 31 31 31 249 250 251 39 39 39 7 7 7 +176 177 177 133 133 133 7 7 7 22 22 22 108 110 110 7 7 7 +72 71 71 251 252 252 252 253 253 250 251 252 247 248 249 205 205 205 +251 252 253 254 254 254 252 252 253 84 84 84 7 7 7 7 7 7 +7 7 7 7 7 7 140 142 143 247 248 249 140 140 139 14 14 14 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 16 16 16 +14 14 14 7 7 7 7 7 7 114 115 115 246 239 193 246 224 96 +245 216 51 245 216 51 243 235 220 176 177 177 185 185 184 229 229 230 +47 47 47 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 31 31 31 156 155 156 90 87 86 7 7 7 +7 7 7 7 7 7 7 7 7 31 31 31 243 243 241 247 247 246 +84 84 84 7 7 7 26 27 27 246 239 193 246 226 108 248 234 156 +108 110 110 7 7 7 212 211 212 44 44 44 22 22 22 249 250 251 +108 107 107 7 7 7 89 90 91 238 238 236 114 115 115 118 118 118 +231 231 231 75 75 76 7 7 7 34 34 35 10 11 11 12 12 12 +214 214 215 253 253 253 253 253 253 200 200 197 31 31 31 103 103 103 +252 252 253 252 253 253 218 217 217 9 9 9 7 7 7 7 7 7 +7 7 7 7 7 7 25 25 25 39 39 39 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 103 103 103 234 234 234 +181 181 181 7 7 7 7 7 7 7 7 7 133 133 133 247 237 174 +246 224 96 246 226 108 185 185 184 177 177 174 153 154 155 181 181 181 +140 140 139 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 1 1 1 49 50 50 186 186 187 28 28 28 7 7 7 +12 12 12 22 22 22 7 7 7 7 7 7 108 107 107 247 247 246 +25 25 25 7 7 7 90 87 86 247 237 174 246 226 108 246 239 193 +28 28 28 44 44 44 237 237 238 9 9 9 53 54 54 249 250 251 +49 50 50 7 7 7 153 153 148 249 241 199 214 196 166 185 185 184 +229 229 230 19 19 19 7 7 7 7 7 7 7 7 7 103 103 103 +251 252 253 254 254 254 253 253 253 150 151 151 7 7 7 187 187 188 +252 252 253 251 251 252 103 103 103 7 7 7 7 7 7 7 7 7 +7 7 7 23 23 23 17 18 18 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 12 12 12 153 153 148 246 239 193 249 241 199 +161 161 162 9 9 9 84 84 84 108 110 110 25 25 25 153 153 148 +247 237 174 246 224 96 218 217 217 165 165 165 182 183 184 193 193 194 +114 115 115 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 4 4 4 74 74 74 181 181 181 7 7 7 7 7 7 +110 114 114 200 200 197 7 7 7 7 7 7 60 60 60 209 210 210 +7 7 7 7 7 7 146 146 147 248 234 156 248 234 156 177 177 174 +7 7 7 118 118 118 193 193 194 7 7 7 84 84 84 232 232 233 +8 8 8 7 7 7 209 210 210 221 218 200 193 187 162 219 219 219 +200 200 197 7 7 7 7 7 7 7 7 7 7 7 7 95 97 97 +251 252 252 254 254 254 252 253 253 118 118 118 29 29 30 247 248 249 +252 252 253 227 227 227 16 16 16 7 7 7 7 7 7 7 7 7 +100 103 103 218 217 217 219 218 214 7 7 7 7 7 7 7 7 7 +7 7 7 21 21 22 185 185 184 246 239 193 248 234 156 240 230 197 +60 60 60 194 194 184 246 239 193 249 241 199 137 136 134 10 10 10 +171 168 154 248 234 156 248 234 156 226 226 219 209 210 210 249 241 199 +28 28 28 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 13 13 13 108 110 110 146 146 147 7 7 7 7 7 7 +167 168 167 140 140 139 7 7 7 7 7 7 120 121 122 146 146 147 +7 7 7 7 7 7 194 194 184 240 219 129 247 237 174 95 97 97 +7 7 7 95 97 97 90 87 86 7 7 7 118 118 118 176 177 177 +7 7 7 28 28 28 248 248 249 44 44 45 7 7 7 167 168 167 +140 140 139 7 7 7 36 36 36 74 74 74 7 7 7 65 64 64 +251 252 253 254 254 254 251 252 252 81 81 82 108 110 110 251 252 252 +251 251 252 127 127 126 7 7 7 7 7 7 8 8 8 140 140 139 +181 181 181 140 140 139 221 218 200 7 7 7 7 7 7 7 7 7 +34 34 35 209 210 210 231 231 231 246 239 193 247 237 174 194 194 184 +227 227 227 249 241 199 240 219 129 248 234 156 153 153 148 7 7 7 +13 13 13 185 185 184 248 234 156 245 218 76 245 216 51 245 214 38 +31 31 31 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 31 31 31 153 154 155 89 90 91 7 7 7 8 8 8 +232 232 233 82 82 81 7 7 7 7 7 7 179 180 181 89 90 91 +7 7 7 24 24 24 243 235 220 248 234 156 240 230 197 20 20 20 +7 7 7 7 7 7 7 7 7 7 7 7 149 149 150 118 118 118 +7 7 7 90 87 86 229 229 230 7 7 7 7 7 7 229 229 230 +82 82 81 7 7 7 95 97 97 100 103 103 7 7 7 34 34 35 +251 252 252 253 253 254 251 251 252 47 47 47 193 193 194 251 252 252 +239 239 240 23 23 23 7 7 7 13 13 13 165 165 165 234 234 234 +149 149 150 146 114 101 200 200 197 7 7 7 7 7 7 52 53 53 +227 227 227 167 168 167 16 16 16 214 196 166 248 234 156 243 235 220 +219 219 219 156 155 156 247 237 174 246 239 193 75 75 76 7 7 7 +60 60 60 227 227 227 243 235 220 240 219 129 245 218 76 245 213 29 +16 16 16 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +1 1 1 49 50 50 185 185 184 33 33 34 7 7 7 10 11 11 +56 56 56 16 16 16 7 7 7 10 10 10 237 237 238 26 27 27 +7 7 7 55 55 55 185 185 184 221 218 200 167 168 167 7 7 7 +20 20 20 39 39 39 10 11 11 7 7 7 181 181 181 58 58 58 +7 7 7 103 103 103 133 133 133 7 7 7 44 44 44 247 248 249 +24 24 24 7 7 7 156 155 156 129 130 130 7 7 7 9 9 9 +244 245 245 252 253 253 237 237 238 34 34 35 248 248 249 251 251 252 +161 161 162 7 7 7 24 24 24 187 187 188 212 211 212 67 70 70 +187 187 188 173 170 143 209 206 202 10 10 10 95 97 97 237 237 238 +129 130 130 8 8 8 89 90 91 246 239 193 247 237 174 177 177 174 +17 18 18 137 136 134 249 241 199 219 218 214 10 10 10 95 97 97 +243 243 243 150 151 151 31 31 31 221 218 200 240 219 129 53 54 54 +3 3 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +4 4 4 72 71 71 182 183 184 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 12 12 12 161 161 162 209 210 210 7 7 7 +7 7 7 7 7 7 7 7 7 187 187 188 82 82 81 7 7 7 +146 146 147 247 248 249 17 18 18 7 7 7 212 211 212 47 47 47 +7 7 7 7 7 7 7 7 7 8 8 8 146 146 147 205 205 205 +7 7 7 7 7 7 214 214 215 156 155 156 7 7 7 7 7 7 +218 217 217 251 252 252 186 186 187 110 114 114 249 250 251 248 248 249 +75 75 76 34 34 35 205 205 205 129 130 130 16 16 16 7 7 7 +156 155 156 214 196 166 240 230 197 243 243 241 227 227 227 74 74 74 +7 7 7 29 29 30 226 226 219 249 241 199 175 173 165 14 14 14 +9 9 9 221 218 200 246 239 193 153 153 148 146 146 147 246 247 248 +110 114 114 7 7 7 7 7 7 42 42 43 193 193 194 95 97 97 +19 19 19 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +6 6 6 84 84 84 140 142 143 7 7 7 7 7 7 7 7 7 +7 7 7 20 20 20 177 177 174 249 241 199 149 149 150 7 7 7 +7 7 7 7 7 7 10 11 11 226 226 219 13 13 13 8 8 8 +219 218 214 219 218 214 7 7 7 8 8 8 238 238 236 200 200 197 +13 13 13 7 7 7 13 13 13 161 161 162 243 235 220 146 146 147 +7 7 7 29 29 30 232 232 233 176 177 177 7 7 7 7 7 7 +182 183 184 237 237 238 129 130 130 167 168 167 176 177 177 202 202 203 +10 11 11 95 97 97 44 44 45 7 7 7 7 7 7 7 7 7 +75 75 76 226 226 219 243 235 220 156 155 156 24 24 24 7 7 7 +7 7 7 176 177 177 247 247 246 200 200 197 17 18 18 7 7 7 +49 50 50 246 239 193 248 234 156 251 248 240 239 239 240 84 84 84 +7 7 7 7 7 7 7 7 7 7 7 7 60 60 60 187 187 188 +84 84 84 14 14 14 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +4 4 4 53 54 54 137 136 134 156 155 156 161 161 162 161 161 162 +167 168 167 239 223 156 240 219 129 246 226 108 239 223 156 239 223 156 +239 223 156 239 223 156 214 196 166 239 223 156 193 187 162 193 187 162 +248 234 156 239 223 156 193 187 162 193 187 162 248 234 156 248 234 156 +214 196 166 193 187 162 214 196 166 248 234 156 240 219 129 214 196 166 +193 187 162 193 187 162 171 168 154 146 146 147 137 136 134 137 136 134 +161 161 162 209 210 210 65 64 64 202 202 203 179 180 181 140 140 139 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 60 60 60 39 39 39 7 7 7 7 7 7 7 7 7 +66 66 66 249 250 251 202 202 203 16 16 16 7 7 7 7 7 7 +23 23 23 243 235 220 246 239 193 226 226 219 52 53 53 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 75 75 76 +176 177 177 66 66 66 9 9 9 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 10 10 10 28 28 29 34 34 35 36 36 36 36 36 36 +44 44 45 146 114 101 241 207 50 241 207 50 241 207 50 241 211 63 +241 211 63 241 211 63 241 211 63 241 211 63 241 211 63 245 216 51 +245 216 51 245 216 51 241 211 63 241 211 63 245 216 51 241 211 63 +245 218 76 245 218 76 245 216 51 245 215 41 245 214 38 241 207 50 +241 211 63 201 147 55 88 79 47 29 29 30 34 34 35 42 42 43 +103 103 103 191 190 190 75 75 76 196 196 197 200 200 197 65 64 64 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +90 87 86 146 146 147 19 19 19 7 7 7 7 7 7 7 7 7 +7 7 7 90 87 86 140 140 139 31 31 31 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +103 103 103 161 161 162 53 54 54 7 7 7 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 12 12 12 50 51 51 146 114 101 180 121 62 199 129 48 +201 147 55 213 157 40 213 157 40 230 165 41 226 179 40 226 179 40 +238 192 33 241 205 27 244 209 25 244 210 23 244 212 23 245 211 23 +245 211 23 245 211 23 245 211 23 244 209 25 238 204 29 226 179 40 +213 157 40 199 129 48 54 42 32 0 0 0 4 6 6 44 44 45 +150 151 151 129 130 130 137 136 134 205 205 205 202 202 203 8 8 8 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 129 130 130 146 146 147 47 47 47 4 4 4 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 2 2 2 12 12 12 28 28 29 49 50 50 +74 74 74 108 96 91 180 121 62 180 121 62 199 129 48 201 147 55 +213 157 40 230 165 41 226 179 40 238 192 33 241 205 27 241 205 27 +243 206 27 243 206 27 241 205 27 238 204 29 226 179 40 213 157 40 +199 129 48 199 129 48 21 19 17 65 64 64 103 103 103 167 168 167 +202 202 203 24 24 24 193 193 194 229 229 230 140 140 139 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 8 8 8 156 155 156 133 133 133 36 36 36 3 3 3 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 +4 4 4 10 11 11 21 21 22 39 39 39 60 60 60 108 96 91 +180 121 62 199 129 48 199 129 48 213 157 40 230 165 41 226 179 40 +226 179 40 226 179 40 226 179 40 226 179 40 213 157 40 199 129 48 +180 121 62 99 91 79 72 71 71 56 56 56 129 130 130 167 168 167 +21 21 22 17 18 18 231 231 231 229 229 230 52 53 53 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 13 13 13 176 177 177 120 121 122 33 33 34 +2 2 2 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 2 2 2 8 8 8 +21 21 22 47 47 47 99 91 79 180 121 62 199 129 48 199 129 48 +201 147 55 213 157 40 213 157 40 201 147 55 199 129 48 180 121 62 +99 91 79 26 26 27 9 9 9 60 60 60 186 186 187 31 31 31 +7 7 7 60 60 60 243 243 243 209 210 210 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 +7 7 7 7 7 7 7 7 7 26 27 27 193 193 194 108 110 110 +22 22 22 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 1 1 1 8 8 8 24 24 24 58 58 58 108 96 91 +180 121 62 180 121 62 180 121 62 180 121 62 180 121 62 72 71 71 +15 15 15 0 0 0 4 6 6 75 75 76 156 155 156 24 24 24 +24 24 24 108 107 107 232 232 233 137 136 134 24 24 24 24 24 24 +24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 +24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 +24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 +24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 +24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 +24 24 24 24 24 24 24 24 24 24 24 24 58 58 58 176 177 177 +60 60 60 3 3 3 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 2 2 2 12 12 12 +26 27 27 44 44 44 55 55 55 50 51 51 29 29 30 8 8 8 +0 0 0 0 0 0 3 3 3 47 47 47 127 127 126 150 151 151 +150 151 151 140 142 143 129 130 130 140 142 143 150 151 151 150 151 151 +150 151 151 150 151 151 150 151 151 150 151 151 150 151 151 150 151 151 +150 151 151 150 151 151 153 154 155 161 161 162 165 165 165 167 168 167 +177 177 174 167 168 167 161 161 162 156 155 156 150 151 151 150 151 151 +150 151 151 150 151 151 150 151 151 150 151 151 150 151 151 150 151 151 +150 151 151 150 151 151 150 151 151 150 151 151 150 151 151 150 151 151 +150 151 151 150 151 151 150 151 151 150 151 151 149 149 150 127 127 126 +44 44 45 2 2 2 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 2 2 2 1 1 1 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 7 7 7 21 21 22 25 25 26 +25 25 26 24 24 24 20 20 20 23 23 24 25 25 26 26 26 27 +26 26 27 26 26 27 26 26 27 26 26 27 26 26 27 26 26 27 +26 26 27 26 26 27 26 26 27 26 26 27 26 26 27 26 27 27 +28 28 29 26 27 27 26 26 27 26 26 27 26 26 27 26 26 27 +26 26 27 26 26 27 26 26 27 26 26 27 26 26 27 26 26 27 +26 26 27 26 26 27 26 26 27 26 26 27 26 26 27 26 26 27 +26 26 27 26 26 27 26 26 27 26 26 27 25 25 26 21 21 22 +7 7 7 0 0 0 diff --git a/drivers/video/logo/logo_blackfin_vga16.ppm b/drivers/video/logo/logo_blackfin_vga16.ppm new file mode 100644 index 000000000000..1352b02a9d93 --- /dev/null +++ b/drivers/video/logo/logo_blackfin_vga16.ppm @@ -0,0 +1,1127 @@ +P3 +# This was generated by the GIMP & Netpbm tools +# gimp linux_bf.svg (create 80x80 save as linux_bf.ppm) +# ppmquant -mapfile clut_vga16.ppm linux_bf.ppm | pnmnoraw > logo_blackfin_vga16.ppm +# +80 80 +255 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85 +85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +85 85 85 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 85 85 85 85 85 85 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 85 85 85 85 85 85 85 85 85 0 0 0 0 0 0 +85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 170 170 170 170 170 170 85 85 85 0 0 0 0 0 0 +0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0 +0 0 0 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170 +170 170 170 85 85 85 85 85 85 170 170 170 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 170 170 170 170 170 170 170 170 170 85 85 85 85 85 85 +0 0 0 0 0 0 0 0 0 85 85 85 170 170 170 255 255 255 +255 255 255 255 255 255 170 170 170 85 85 85 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +170 170 170 255 255 255 255 255 255 255 255 255 255 255 255 0 0 0 +0 0 0 0 0 0 0 0 0 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 170 170 170 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +255 255 255 170 170 170 85 85 85 170 170 170 255 255 255 255 255 255 +0 0 0 0 0 0 170 170 170 255 255 255 255 255 255 85 85 85 +85 85 85 170 170 170 255 255 255 255 255 255 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +255 255 255 85 85 85 170 170 170 170 170 170 255 255 255 255 255 255 +85 85 85 85 85 85 170 170 170 255 255 255 170 170 170 0 0 0 +170 170 170 170 170 170 255 255 255 255 255 255 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +255 255 255 0 0 0 85 85 85 170 170 170 170 170 170 255 255 255 +0 0 0 85 85 85 85 85 85 255 255 255 85 85 85 0 0 0 +0 0 0 85 85 85 170 170 170 255 255 255 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +255 255 255 85 85 85 0 0 0 0 0 0 255 85 85 255 255 85 +255 255 85 255 255 85 255 255 85 255 255 85 85 85 85 0 0 0 +0 0 0 0 0 0 170 170 170 255 255 255 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +170 170 170 255 255 255 0 0 0 255 85 85 170 85 0 170 85 0 +255 255 85 255 255 85 170 85 0 255 255 85 255 255 85 255 255 85 +0 0 0 85 85 85 255 255 255 255 255 255 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 255 255 255 255 85 85 255 255 85 255 255 85 255 255 85 +255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 +255 255 85 255 255 85 255 255 85 170 170 170 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 255 85 85 255 255 85 255 255 85 255 255 85 255 255 85 +255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 +255 255 85 255 255 85 255 255 85 255 255 85 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +170 85 0 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 +255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 +255 255 85 170 85 0 85 85 85 255 255 85 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +255 85 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 +255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 +170 85 0 85 85 85 255 255 85 255 255 85 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +170 85 0 170 85 0 255 255 85 255 255 85 255 255 85 255 255 85 +255 255 85 255 255 85 255 255 85 255 255 85 170 85 0 170 85 0 +170 85 0 255 255 85 255 255 85 255 85 85 0 0 0 0 0 0 +85 85 85 85 85 85 85 85 85 0 0 0 0 0 0 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +85 85 85 170 85 0 170 85 0 170 85 0 255 255 85 255 255 85 +255 255 85 255 85 85 170 85 0 170 85 0 170 85 0 255 255 85 +255 255 85 255 255 85 255 85 85 170 170 170 0 0 0 0 0 0 +85 85 85 85 85 85 85 85 85 85 85 85 0 0 0 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +85 85 85 170 170 170 170 85 0 170 85 0 170 85 0 170 85 0 +170 85 0 170 85 0 170 85 0 255 255 85 255 255 85 255 255 85 +255 85 85 170 170 170 255 255 255 255 255 255 85 85 85 0 0 0 +0 0 0 85 85 85 85 85 85 85 85 85 0 0 0 0 0 0 +85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +170 170 170 170 170 170 170 170 170 170 85 0 255 255 85 255 255 85 +255 255 85 255 255 85 255 255 85 255 255 85 255 85 85 170 170 170 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 0 0 0 +0 0 0 0 0 0 85 85 85 85 85 85 0 0 0 0 0 0 +85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +170 170 170 255 255 255 255 255 255 170 170 170 170 85 0 255 85 85 +255 85 85 255 85 85 255 85 85 255 85 85 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 +170 170 170 255 255 255 255 255 255 170 170 170 170 170 170 170 170 170 +170 170 170 170 170 170 170 170 170 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 85 85 85 85 85 85 0 0 0 0 0 0 +255 255 255 255 255 255 255 255 255 255 255 255 170 170 170 170 170 170 +170 170 170 170 170 170 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 85 85 85 0 0 0 0 0 0 170 170 170 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +85 85 85 0 0 0 0 0 0 0 0 0 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +85 85 85 0 0 0 0 0 0 85 85 85 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +0 0 0 0 0 0 0 0 0 170 170 170 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 85 85 85 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 170 170 170 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 170 170 170 170 170 170 170 170 170 170 170 170 +170 170 170 255 255 255 255 255 255 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 85 85 85 170 170 170 170 170 170 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 170 170 170 170 170 170 170 170 170 170 170 170 +170 170 170 170 170 170 255 255 255 0 0 0 0 0 0 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 +0 0 0 0 0 0 170 170 170 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 170 170 170 +170 170 170 170 170 170 170 170 170 255 255 255 0 0 0 85 85 85 +85 85 85 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 +0 0 0 0 0 0 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 170 170 170 170 170 170 255 255 255 0 0 0 0 0 0 +0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 +0 0 0 170 170 170 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 170 170 170 85 85 85 170 170 170 170 170 170 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 170 170 170 170 170 170 255 255 255 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 85 85 85 85 85 85 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 +0 0 0 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +170 170 170 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 0 0 0 +0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 85 85 85 0 0 0 0 0 0 85 85 85 0 0 0 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 85 85 85 170 170 170 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 170 170 170 +0 0 0 85 85 85 0 0 0 85 85 85 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 85 85 85 0 0 0 85 85 85 85 85 85 85 85 85 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 170 170 170 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 85 85 85 0 0 0 85 85 85 0 0 0 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 85 85 85 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 85 85 85 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +170 170 170 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 170 170 170 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 170 170 170 255 255 255 255 255 255 255 255 255 255 255 255 +85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +0 0 0 0 0 0 85 85 85 0 0 0 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 170 170 170 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 170 170 170 255 255 255 255 255 255 255 255 255 +170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 85 85 85 0 0 0 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 170 170 170 255 255 255 255 255 255 +170 170 170 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 85 85 85 0 0 0 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 255 255 255 +170 170 170 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 85 85 85 0 0 0 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 +170 170 170 0 0 0 0 0 0 85 85 85 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 0 0 0 +0 0 0 0 0 0 85 85 85 85 85 85 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 85 85 85 170 170 170 170 170 170 255 255 255 255 255 255 +170 170 170 0 0 0 0 0 0 85 85 85 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 85 0 +255 255 85 255 255 85 0 0 0 85 85 85 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +170 170 170 170 170 170 170 170 170 85 85 85 0 0 0 85 85 85 +85 85 85 85 85 85 0 0 0 0 0 0 0 0 0 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 255 255 85 255 255 85 +255 255 85 255 255 85 255 255 85 85 85 85 170 170 170 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 85 170 170 170 +85 85 85 170 170 170 170 170 170 85 85 85 0 0 0 0 0 0 +0 0 0 85 85 85 170 170 170 0 0 0 0 0 0 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 +85 85 85 0 0 0 0 0 0 170 85 0 255 255 85 255 255 85 +255 255 85 255 255 85 255 255 85 255 255 85 170 85 0 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 170 170 170 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 170 170 170 255 255 255 255 255 255 +255 255 255 255 255 255 170 170 170 170 170 170 170 170 170 170 170 170 +255 255 255 85 85 85 0 0 0 170 170 170 85 85 85 0 0 0 +0 0 0 0 0 0 85 85 85 0 0 0 255 255 85 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +170 170 170 0 0 0 85 85 85 255 255 85 255 255 85 255 255 85 +255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 0 0 0 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 85 85 85 0 0 0 +0 0 0 0 0 0 85 85 85 255 255 255 255 255 255 255 255 255 +170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 85 85 85 +0 0 0 0 0 0 0 0 0 255 255 85 255 255 85 255 255 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +170 170 170 170 170 170 255 255 85 255 255 85 255 255 85 255 255 85 +255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 +0 0 0 170 170 170 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 0 0 0 0 0 0 +0 0 0 0 0 0 255 255 255 255 255 255 255 255 255 170 170 170 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 +85 85 85 0 0 0 255 255 85 255 255 85 255 255 85 255 255 85 +85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +170 170 170 170 170 170 170 170 170 170 170 170 255 255 85 255 255 85 +255 255 85 255 255 85 170 170 170 170 170 170 170 170 170 170 170 170 +255 255 85 85 85 85 170 170 170 170 170 170 170 170 170 170 170 170 +255 255 255 255 255 255 170 170 170 170 170 170 170 170 170 255 255 255 +255 255 255 170 170 170 170 170 170 255 255 255 0 0 0 0 0 0 +0 0 0 85 85 85 255 255 255 255 255 255 255 255 255 85 85 85 +85 85 85 170 170 170 170 170 170 85 85 85 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +170 170 170 170 170 170 255 255 85 255 255 85 255 255 85 255 255 85 +85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 85 85 85 +0 0 0 0 0 0 255 255 255 85 85 85 0 0 0 0 0 0 +255 255 255 85 85 85 0 0 0 0 0 0 255 255 255 255 255 85 +255 255 85 170 170 170 0 0 0 0 0 0 0 0 0 170 170 170 +255 255 255 170 170 170 85 85 85 0 0 0 0 0 0 0 0 0 +170 170 170 255 255 255 85 85 85 0 0 0 85 85 85 255 255 255 +85 85 85 0 0 0 85 85 85 255 255 255 0 0 0 0 0 0 +0 0 0 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 85 85 85 0 0 0 0 0 0 85 85 85 +85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +85 85 85 255 255 255 255 255 85 255 255 85 255 255 85 255 255 85 +85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 85 85 85 170 170 170 0 0 0 +0 0 0 85 85 85 255 255 255 0 0 0 0 0 0 85 85 85 +255 255 255 0 0 0 0 0 0 85 85 85 255 255 85 255 255 85 +255 255 85 85 85 85 0 0 0 0 0 0 0 0 0 170 170 170 +255 255 255 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 +85 85 85 255 255 255 0 0 0 0 0 0 170 170 170 170 170 170 +0 0 0 0 0 0 255 255 255 255 255 255 0 0 0 85 85 85 +255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 85 85 85 0 0 0 85 85 85 255 255 255 255 255 255 +85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 85 85 85 255 255 255 255 255 85 255 255 85 255 255 85 +255 255 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 85 85 85 170 170 170 0 0 0 +0 0 0 85 85 85 170 170 170 0 0 0 0 0 0 170 170 170 +170 170 170 0 0 0 0 0 0 170 170 170 255 255 85 255 255 85 +255 255 255 0 0 0 85 85 85 85 85 85 0 0 0 170 170 170 +255 255 255 0 0 0 0 0 0 170 170 170 85 85 85 0 0 0 +85 85 85 170 170 170 0 0 0 0 0 0 170 170 170 0 0 0 +0 0 0 170 170 170 255 255 255 255 255 255 255 255 255 255 255 255 +255 255 255 255 255 255 255 255 255 255 255 255 170 170 170 170 170 170 +85 85 85 0 0 0 85 85 85 255 255 255 255 255 255 170 170 170 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 85 85 85 255 255 255 255 255 85 255 255 85 +255 255 85 170 85 0 0 0 0 85 85 85 85 85 85 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 85 85 85 170 170 170 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 255 255 255 +170 170 170 0 0 0 0 0 0 170 170 170 255 255 85 255 255 85 +170 170 170 0 0 0 170 170 170 85 85 85 0 0 0 255 255 255 +170 170 170 0 0 0 0 0 0 255 255 255 0 0 0 0 0 0 +170 170 170 170 170 170 0 0 0 0 0 0 85 85 85 0 0 0 +85 85 85 255 255 255 255 255 255 255 255 255 255 255 255 170 170 170 +255 255 255 255 255 255 255 255 255 85 85 85 0 0 0 0 0 0 +0 0 0 0 0 0 170 170 170 255 255 255 170 170 170 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 85 85 85 255 255 255 255 255 85 +255 255 85 255 255 85 255 255 255 170 170 170 170 170 170 255 255 255 +85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 170 170 170 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 255 255 255 255 255 255 +85 85 85 0 0 0 0 0 0 255 255 255 255 255 85 255 255 85 +85 85 85 0 0 0 255 255 255 85 85 85 0 0 0 255 255 255 +85 85 85 0 0 0 85 85 85 255 255 255 85 85 85 85 85 85 +255 255 255 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 +255 255 255 255 255 255 255 255 255 170 170 170 0 0 0 85 85 85 +255 255 255 255 255 255 255 255 255 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 255 255 255 +170 170 170 0 0 0 0 0 0 0 0 0 170 170 170 255 255 255 +255 255 85 255 255 85 170 170 170 170 170 170 170 170 170 170 170 170 +170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 85 85 85 170 170 170 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 255 255 255 +0 0 0 0 0 0 85 85 85 255 255 85 255 255 85 255 255 255 +0 0 0 85 85 85 255 255 255 0 0 0 85 85 85 255 255 255 +85 85 85 0 0 0 170 170 170 255 255 255 170 170 170 170 170 170 +255 255 255 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +255 255 255 255 255 255 255 255 255 170 170 170 0 0 0 170 170 170 +255 255 255 255 255 255 85 85 85 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 170 170 170 255 255 255 255 255 255 +170 170 170 0 0 0 85 85 85 85 85 85 0 0 0 170 170 170 +255 255 85 255 255 85 255 255 255 170 170 170 170 170 170 170 170 170 +85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 85 85 85 170 170 170 0 0 0 0 0 0 +85 85 85 170 170 170 0 0 0 0 0 0 85 85 85 170 170 170 +0 0 0 0 0 0 170 170 170 255 255 85 255 255 85 170 170 170 +0 0 0 85 85 85 170 170 170 0 0 0 85 85 85 255 255 255 +0 0 0 0 0 0 170 170 170 170 170 170 170 170 170 255 255 255 +170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +255 255 255 255 255 255 255 255 255 85 85 85 0 0 0 255 255 255 +255 255 255 255 255 255 0 0 0 0 0 0 0 0 0 0 0 0 +85 85 85 255 255 255 255 255 255 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 170 170 170 255 255 255 255 255 85 255 255 255 +85 85 85 170 170 170 255 255 255 255 255 255 170 170 170 0 0 0 +170 170 170 255 255 85 255 255 85 255 255 255 170 170 170 255 255 255 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 85 85 85 170 170 170 0 0 0 0 0 0 +170 170 170 170 170 170 0 0 0 0 0 0 85 85 85 170 170 170 +0 0 0 0 0 0 170 170 170 255 255 85 255 255 255 85 85 85 +0 0 0 85 85 85 85 85 85 0 0 0 85 85 85 170 170 170 +0 0 0 0 0 0 255 255 255 85 85 85 0 0 0 170 170 170 +170 170 170 0 0 0 0 0 0 85 85 85 0 0 0 85 85 85 +255 255 255 255 255 255 255 255 255 85 85 85 85 85 85 255 255 255 +255 255 255 85 85 85 0 0 0 0 0 0 0 0 0 170 170 170 +170 170 170 170 170 170 255 255 255 0 0 0 0 0 0 0 0 0 +0 0 0 170 170 170 255 255 255 255 255 255 255 255 85 170 170 170 +255 255 255 255 255 255 255 255 85 255 255 85 170 170 170 0 0 0 +0 0 0 170 170 170 255 255 85 255 255 85 255 255 85 255 255 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 170 170 170 85 85 85 0 0 0 0 0 0 +255 255 255 85 85 85 0 0 0 0 0 0 170 170 170 85 85 85 +0 0 0 0 0 0 255 255 255 255 255 85 255 255 255 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 85 85 85 +0 0 0 85 85 85 255 255 255 0 0 0 0 0 0 255 255 255 +85 85 85 0 0 0 85 85 85 85 85 85 0 0 0 0 0 0 +255 255 255 255 255 255 255 255 255 85 85 85 170 170 170 255 255 255 +255 255 255 0 0 0 0 0 0 0 0 0 170 170 170 255 255 255 +170 170 170 85 85 85 170 170 170 0 0 0 0 0 0 85 85 85 +255 255 255 170 170 170 0 0 0 170 170 170 255 255 85 255 255 255 +255 255 255 170 170 170 255 255 255 255 255 255 85 85 85 0 0 0 +85 85 85 255 255 255 255 255 255 255 255 85 255 255 85 255 255 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 85 85 85 170 170 170 0 0 0 0 0 0 0 0 0 +85 85 85 0 0 0 0 0 0 0 0 0 255 255 255 0 0 0 +0 0 0 85 85 85 170 170 170 255 255 255 170 170 170 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 85 85 85 +0 0 0 85 85 85 170 170 170 0 0 0 85 85 85 255 255 255 +0 0 0 0 0 0 170 170 170 170 170 170 0 0 0 0 0 0 +255 255 255 255 255 255 255 255 255 0 0 0 255 255 255 255 255 255 +170 170 170 0 0 0 0 0 0 170 170 170 255 255 255 85 85 85 +170 170 170 170 170 170 170 170 170 0 0 0 85 85 85 255 255 255 +170 170 170 0 0 0 85 85 85 255 255 255 255 255 85 170 170 170 +0 0 0 170 170 170 255 255 255 255 255 255 0 0 0 85 85 85 +255 255 255 170 170 170 0 0 0 170 170 170 255 255 85 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 85 85 85 170 170 170 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 170 170 170 170 170 170 0 0 0 +0 0 0 0 0 0 0 0 0 170 170 170 85 85 85 0 0 0 +170 170 170 255 255 255 0 0 0 0 0 0 170 170 170 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 170 170 170 +0 0 0 0 0 0 255 255 255 170 170 170 0 0 0 0 0 0 +255 255 255 255 255 255 170 170 170 85 85 85 255 255 255 255 255 255 +85 85 85 0 0 0 170 170 170 170 170 170 0 0 0 0 0 0 +170 170 170 170 170 170 255 255 255 255 255 255 255 255 255 85 85 85 +0 0 0 0 0 0 255 255 255 255 255 255 170 170 170 0 0 0 +0 0 0 170 170 170 255 255 255 170 170 170 170 170 170 255 255 255 +85 85 85 0 0 0 0 0 0 0 0 0 170 170 170 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 85 85 85 170 170 170 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 170 170 170 255 255 255 170 170 170 0 0 0 +0 0 0 0 0 0 0 0 0 255 255 255 0 0 0 0 0 0 +255 255 255 255 255 255 0 0 0 0 0 0 255 255 255 170 170 170 +0 0 0 0 0 0 0 0 0 170 170 170 255 255 255 170 170 170 +0 0 0 0 0 0 255 255 255 170 170 170 0 0 0 0 0 0 +170 170 170 255 255 255 170 170 170 170 170 170 170 170 170 170 170 170 +0 0 0 85 85 85 85 85 85 0 0 0 0 0 0 0 0 0 +85 85 85 255 255 255 255 255 255 170 170 170 0 0 0 0 0 0 +0 0 0 170 170 170 255 255 255 170 170 170 0 0 0 0 0 0 +85 85 85 255 255 255 255 255 85 255 255 255 255 255 255 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170 +85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 85 85 85 170 170 170 170 170 170 170 170 170 170 170 170 +170 170 170 170 170 170 255 255 85 255 255 85 255 255 85 170 170 170 +170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 +255 255 85 170 170 170 170 170 170 170 170 170 255 255 85 255 255 85 +170 170 170 170 170 170 170 170 170 255 255 85 255 255 85 170 170 170 +170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 +170 170 170 170 170 170 85 85 85 170 170 170 170 170 170 170 170 170 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 +85 85 85 255 255 255 170 170 170 0 0 0 0 0 0 0 0 0 +0 0 0 255 255 255 255 255 255 255 255 255 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +170 170 170 85 85 85 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +85 85 85 85 85 85 255 255 85 255 255 85 255 255 85 255 255 85 +255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 +255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 +255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 +255 255 85 255 85 85 85 85 85 0 0 0 0 0 0 0 0 0 +85 85 85 170 170 170 85 85 85 170 170 170 170 170 170 85 85 85 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +85 85 85 170 170 170 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 85 85 85 170 170 170 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +85 85 85 170 170 170 85 85 85 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 85 85 85 85 85 85 170 85 0 170 85 0 +170 85 0 255 85 85 255 85 85 255 85 85 255 255 85 255 255 85 +255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 +255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 +255 85 85 170 85 0 85 85 85 0 0 0 0 0 0 85 85 85 +170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 170 170 170 170 170 170 85 85 85 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 +85 85 85 85 85 85 170 85 0 170 85 0 170 85 0 170 85 0 +255 85 85 255 85 85 255 255 85 255 255 85 255 255 85 255 255 85 +255 255 85 255 255 85 255 255 85 255 255 85 255 255 85 255 85 85 +170 85 0 170 85 0 0 0 0 85 85 85 85 85 85 170 170 170 +170 170 170 0 0 0 170 170 170 255 255 255 170 170 170 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 170 170 170 170 170 170 0 0 0 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 +170 85 0 170 85 0 170 85 0 255 85 85 255 85 85 255 255 85 +255 255 85 255 255 85 255 255 85 255 255 85 255 85 85 170 85 0 +170 85 0 85 85 85 85 85 85 85 85 85 170 170 170 170 170 170 +0 0 0 0 0 0 255 255 255 255 255 255 85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 170 170 170 85 85 85 0 0 0 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 85 85 85 85 85 85 170 85 0 170 85 0 170 85 0 +170 85 0 255 85 85 255 85 85 255 85 85 170 85 0 170 85 0 +85 85 85 0 0 0 0 0 0 85 85 85 170 170 170 0 0 0 +0 0 0 85 85 85 255 255 255 170 170 170 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 170 170 170 85 85 85 +0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 +170 85 0 170 85 0 170 85 0 170 85 0 170 85 0 85 85 85 +0 0 0 0 0 0 0 0 0 85 85 85 170 170 170 0 0 0 +0 0 0 85 85 85 255 255 255 170 170 170 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 85 85 85 170 170 170 +85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 85 85 85 85 85 85 85 85 85 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 85 85 85 85 85 85 170 170 170 +170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 +170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 +170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 +170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 +170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 +170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 +170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 85 85 85 +85 85 85 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +0 0 0 0 0 0 diff --git a/drivers/video/matrox/matroxfb_misc.c b/drivers/video/matrox/matroxfb_misc.c index aaa3e538e5da..5b5f072fc1a8 100644 --- a/drivers/video/matrox/matroxfb_misc.c +++ b/drivers/video/matrox/matroxfb_misc.c @@ -522,8 +522,6 @@ static void parse_bios(unsigned char __iomem* vbios, struct matrox_bios* bd) { #endif } -#define get_u16(x) (le16_to_cpu(get_unaligned((__u16*)(x)))) -#define get_u32(x) (le32_to_cpu(get_unaligned((__u32*)(x)))) static int parse_pins1(WPMINFO const struct matrox_bios* bd) { unsigned int maxdac; @@ -532,11 +530,12 @@ static int parse_pins1(WPMINFO const struct matrox_bios* bd) { case 1: maxdac = 220000; break; default: maxdac = 240000; break; } - if (get_u16(bd->pins + 24)) { - maxdac = get_u16(bd->pins + 24) * 10; + if (get_unaligned_le16(bd->pins + 24)) { + maxdac = get_unaligned_le16(bd->pins + 24) * 10; } MINFO->limits.pixel.vcomax = maxdac; - MINFO->values.pll.system = get_u16(bd->pins + 28) ? get_u16(bd->pins + 28) * 10 : 50000; + MINFO->values.pll.system = get_unaligned_le16(bd->pins + 28) ? + get_unaligned_le16(bd->pins + 28) * 10 : 50000; /* ignore 4MB, 8MB, module clocks */ MINFO->features.pll.ref_freq = 14318; MINFO->values.reg.mctlwtst = 0x00030101; @@ -575,7 +574,8 @@ static void default_pins2(WPMINFO2) { static int parse_pins3(WPMINFO const struct matrox_bios* bd) { MINFO->limits.pixel.vcomax = MINFO->limits.system.vcomax = (bd->pins[36] == 0xFF) ? 230000 : ((bd->pins[36] + 100) * 1000); - MINFO->values.reg.mctlwtst = get_u32(bd->pins + 48) == 0xFFFFFFFF ? 0x01250A21 : get_u32(bd->pins + 48); + MINFO->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 48) == 0xFFFFFFFF ? + 0x01250A21 : get_unaligned_le32(bd->pins + 48); /* memory config */ MINFO->values.reg.memrdbk = ((bd->pins[57] << 21) & 0x1E000000) | ((bd->pins[57] << 22) & 0x00C00000) | @@ -601,7 +601,7 @@ static void default_pins3(WPMINFO2) { static int parse_pins4(WPMINFO const struct matrox_bios* bd) { MINFO->limits.pixel.vcomax = (bd->pins[ 39] == 0xFF) ? 230000 : bd->pins[ 39] * 4000; MINFO->limits.system.vcomax = (bd->pins[ 38] == 0xFF) ? MINFO->limits.pixel.vcomax : bd->pins[ 38] * 4000; - MINFO->values.reg.mctlwtst = get_u32(bd->pins + 71); + MINFO->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 71); MINFO->values.reg.memrdbk = ((bd->pins[87] << 21) & 0x1E000000) | ((bd->pins[87] << 22) & 0x00C00000) | ((bd->pins[86] << 1) & 0x000001E0) | @@ -609,7 +609,7 @@ static int parse_pins4(WPMINFO const struct matrox_bios* bd) { MINFO->values.reg.opt = ((bd->pins[53] << 15) & 0x00400000) | ((bd->pins[53] << 22) & 0x10000000) | ((bd->pins[53] << 7) & 0x00001C00); - MINFO->values.reg.opt3 = get_u32(bd->pins + 67); + MINFO->values.reg.opt3 = get_unaligned_le32(bd->pins + 67); MINFO->values.pll.system = (bd->pins[ 65] == 0xFF) ? 200000 : bd->pins[ 65] * 4000; MINFO->features.pll.ref_freq = (bd->pins[ 92] & 0x01) ? 14318 : 27000; return 0; @@ -640,12 +640,12 @@ static int parse_pins5(WPMINFO const struct matrox_bios* bd) { MINFO->limits.video.vcomin = (bd->pins[122] == 0xFF) ? MINFO->limits.system.vcomin : bd->pins[122] * mult; MINFO->values.pll.system = MINFO->values.pll.video = (bd->pins[ 92] == 0xFF) ? 284000 : bd->pins[ 92] * 4000; - MINFO->values.reg.opt = get_u32(bd->pins+ 48); - MINFO->values.reg.opt2 = get_u32(bd->pins+ 52); - MINFO->values.reg.opt3 = get_u32(bd->pins+ 94); - MINFO->values.reg.mctlwtst = get_u32(bd->pins+ 98); - MINFO->values.reg.memmisc = get_u32(bd->pins+102); - MINFO->values.reg.memrdbk = get_u32(bd->pins+106); + MINFO->values.reg.opt = get_unaligned_le32(bd->pins + 48); + MINFO->values.reg.opt2 = get_unaligned_le32(bd->pins + 52); + MINFO->values.reg.opt3 = get_unaligned_le32(bd->pins + 94); + MINFO->values.reg.mctlwtst = get_unaligned_le32(bd->pins + 98); + MINFO->values.reg.memmisc = get_unaligned_le32(bd->pins + 102); + MINFO->values.reg.memrdbk = get_unaligned_le32(bd->pins + 106); MINFO->features.pll.ref_freq = (bd->pins[110] & 0x01) ? 14318 : 27000; MINFO->values.memory.ddr = (bd->pins[114] & 0x60) == 0x20; MINFO->values.memory.dll = (bd->pins[115] & 0x02) != 0; diff --git a/drivers/video/metronomefb.c b/drivers/video/metronomefb.c index 249791286367..cc4c038a1b3f 100644 --- a/drivers/video/metronomefb.c +++ b/drivers/video/metronomefb.c @@ -206,8 +206,7 @@ static int load_waveform(u8 *mem, size_t size, u8 *metromem, int m, int t, } /* check waveform mode table address checksum */ - wmta = le32_to_cpu(get_unaligned((__le32 *) wfm_hdr->wmta)); - wmta &= 0x00FFFFFF; + wmta = get_unaligned_le32(wfm_hdr->wmta) & 0x00FFFFFF; cksum_idx = wmta + m*4 + 3; if (cksum_idx > size) return -EINVAL; @@ -219,8 +218,7 @@ static int load_waveform(u8 *mem, size_t size, u8 *metromem, int m, int t, } /* check waveform temperature table address checksum */ - tta = le32_to_cpu(get_unaligned((int *) (mem + wmta + m*4))); - tta &= 0x00FFFFFF; + tta = get_unaligned_le32(mem + wmta + m * 4) & 0x00FFFFFF; cksum_idx = tta + trn*4 + 3; if (cksum_idx > size) return -EINVAL; @@ -233,8 +231,7 @@ static int load_waveform(u8 *mem, size_t size, u8 *metromem, int m, int t, /* here we do the real work of putting the waveform into the metromem buffer. this does runlength decoding of the waveform */ - wfm_idx = le32_to_cpu(get_unaligned((__le32 *) (mem + tta + trn*4))); - wfm_idx &= 0x00FFFFFF; + wfm_idx = get_unaligned_le32(mem + tta + trn * 4) & 0x00FFFFFF; owfm_idx = wfm_idx; if (wfm_idx > size) return -EINVAL; diff --git a/drivers/video/p9100.c b/drivers/video/p9100.c index c95874fe9076..9e903454ffc1 100644 --- a/drivers/video/p9100.c +++ b/drivers/video/p9100.c @@ -15,10 +15,9 @@ #include <linux/init.h> #include <linux/fb.h> #include <linux/mm.h> +#include <linux/of_device.h> #include <asm/io.h> -#include <asm/prom.h> -#include <asm/of_device.h> #include <asm/fbio.h> #include "sbuslib.h" @@ -275,7 +274,7 @@ static int __devinit p9100_probe(struct of_device *op, const struct of_device_id par->physbase = op->resource[2].start; par->which_io = op->resource[2].flags & IORESOURCE_BITS; - sbusfb_fill_var(&info->var, dp->node, 8); + sbusfb_fill_var(&info->var, dp, 8); info->var.red.length = 8; info->var.green.length = 8; info->var.blue.length = 8; @@ -295,7 +294,7 @@ static int __devinit p9100_probe(struct of_device *op, const struct of_device_id if (!info->screen_base) goto out_unmap_regs; - p9100_blank(0, info); + p9100_blank(FB_BLANK_UNBLANK, info); if (fb_alloc_cmap(&info->cmap, 256, 0)) goto out_unmap_screen; diff --git a/drivers/video/pnx4008/pnxrgbfb.c b/drivers/video/pnx4008/pnxrgbfb.c index 685761a0732c..4db6b48a8715 100644 --- a/drivers/video/pnx4008/pnxrgbfb.c +++ b/drivers/video/pnx4008/pnxrgbfb.c @@ -100,7 +100,6 @@ static int rgbfb_remove(struct platform_device *pdev) fb_dealloc_cmap(&info->cmap); framebuffer_release(info); platform_set_drvdata(pdev, NULL); - kfree(info); } pnx4008_free_dum_channel(channel_owned, pdev->id); @@ -168,23 +167,21 @@ static int __devinit rgbfb_probe(struct platform_device *pdev) ret = fb_alloc_cmap(&info->cmap, 256, 0); if (ret < 0) - goto err2; + goto err1; ret = register_framebuffer(info); if (ret < 0) - goto err3; + goto err2; platform_set_drvdata(pdev, info); return 0; -err3: - fb_dealloc_cmap(&info->cmap); err2: - framebuffer_release(info); + fb_dealloc_cmap(&info->cmap); err1: pnx4008_free_dum_channel(channel_owned, pdev->id); err0: - kfree(info); + framebuffer_release(info); err: return ret; } diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c index 757651954e6c..3ee314beacc1 100644 --- a/drivers/video/pxafb.c +++ b/drivers/video/pxafb.c @@ -39,6 +39,9 @@ #include <linux/dma-mapping.h> #include <linux/clk.h> #include <linux/err.h> +#include <linux/completion.h> +#include <linux/kthread.h> +#include <linux/freezer.h> #include <asm/hardware.h> #include <asm/io.h> @@ -57,19 +60,31 @@ #include "pxafb.h" /* Bits which should not be set in machine configuration structures */ -#define LCCR0_INVALID_CONFIG_MASK (LCCR0_OUM|LCCR0_BM|LCCR0_QDM|LCCR0_DIS|LCCR0_EFM|LCCR0_IUM|LCCR0_SFM|LCCR0_LDM|LCCR0_ENB) -#define LCCR3_INVALID_CONFIG_MASK (LCCR3_HSP|LCCR3_VSP|LCCR3_PCD|LCCR3_BPP) +#define LCCR0_INVALID_CONFIG_MASK (LCCR0_OUM | LCCR0_BM | LCCR0_QDM |\ + LCCR0_DIS | LCCR0_EFM | LCCR0_IUM |\ + LCCR0_SFM | LCCR0_LDM | LCCR0_ENB) + +#define LCCR3_INVALID_CONFIG_MASK (LCCR3_HSP | LCCR3_VSP |\ + LCCR3_PCD | LCCR3_BPP) static void (*pxafb_backlight_power)(int); static void (*pxafb_lcd_power)(int, struct fb_var_screeninfo *); -static int pxafb_activate_var(struct fb_var_screeninfo *var, struct pxafb_info *); +static int pxafb_activate_var(struct fb_var_screeninfo *var, + struct pxafb_info *); static void set_ctrlr_state(struct pxafb_info *fbi, u_int state); -#ifdef CONFIG_FB_PXA_PARAMETERS -#define PXAFB_OPTIONS_SIZE 256 -static char g_options[PXAFB_OPTIONS_SIZE] __devinitdata = ""; -#endif +static inline unsigned long +lcd_readl(struct pxafb_info *fbi, unsigned int off) +{ + return __raw_readl(fbi->mmio_base + off); +} + +static inline void +lcd_writel(struct pxafb_info *fbi, unsigned int off, unsigned long val) +{ + __raw_writel(val, fbi->mmio_base + off); +} static inline void pxafb_schedule_work(struct pxafb_info *fbi, u_int state) { @@ -79,10 +94,12 @@ static inline void pxafb_schedule_work(struct pxafb_info *fbi, u_int state) /* * We need to handle two requests being made at the same time. * There are two important cases: - * 1. When we are changing VT (C_REENABLE) while unblanking (C_ENABLE) - * We must perform the unblanking, which will do our REENABLE for us. - * 2. When we are blanking, but immediately unblank before we have - * blanked. We do the "REENABLE" thing here as well, just to be sure. + * 1. When we are changing VT (C_REENABLE) while unblanking + * (C_ENABLE) We must perform the unblanking, which will + * do our REENABLE for us. + * 2. When we are blanking, but immediately unblank before + * we have blanked. We do the "REENABLE" thing here as + * well, just to be sure. */ if (fbi->task_state == C_ENABLE && state == C_REENABLE) state = (u_int) -1; @@ -129,13 +146,13 @@ pxafb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, val = ((red << 8) & 0x00f80000); val |= ((green >> 0) & 0x0000fc00); val |= ((blue >> 8) & 0x000000f8); - ((u32*)(fbi->palette_cpu))[regno] = val; + ((u32 *)(fbi->palette_cpu))[regno] = val; break; case LCCR4_PAL_FOR_2: val = ((red << 8) & 0x00fc0000); val |= ((green >> 0) & 0x0000fc00); val |= ((blue >> 8) & 0x000000fc); - ((u32*)(fbi->palette_cpu))[regno] = val; + ((u32 *)(fbi->palette_cpu))[regno] = val; break; } @@ -203,15 +220,15 @@ pxafb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, */ static int pxafb_bpp_to_lccr3(struct fb_var_screeninfo *var) { - int ret = 0; - switch (var->bits_per_pixel) { - case 1: ret = LCCR3_1BPP; break; - case 2: ret = LCCR3_2BPP; break; - case 4: ret = LCCR3_4BPP; break; - case 8: ret = LCCR3_8BPP; break; - case 16: ret = LCCR3_16BPP; break; - } - return ret; + int ret = 0; + switch (var->bits_per_pixel) { + case 1: ret = LCCR3_1BPP; break; + case 2: ret = LCCR3_2BPP; break; + case 4: ret = LCCR3_4BPP; break; + case 8: ret = LCCR3_8BPP; break; + case 16: ret = LCCR3_16BPP; break; + } + return ret; } #ifdef CONFIG_CPU_FREQ @@ -223,31 +240,32 @@ static int pxafb_bpp_to_lccr3(struct fb_var_screeninfo *var) */ static unsigned int pxafb_display_dma_period(struct fb_var_screeninfo *var) { - /* - * Period = pixclock * bits_per_byte * bytes_per_transfer - * / memory_bits_per_pixel; - */ - return var->pixclock * 8 * 16 / var->bits_per_pixel; + /* + * Period = pixclock * bits_per_byte * bytes_per_transfer + * / memory_bits_per_pixel; + */ + return var->pixclock * 8 * 16 / var->bits_per_pixel; } - -extern unsigned int get_clk_frequency_khz(int info); #endif /* * Select the smallest mode that allows the desired resolution to be * displayed. If desired parameters can be rounded up. */ -static struct pxafb_mode_info *pxafb_getmode(struct pxafb_mach_info *mach, struct fb_var_screeninfo *var) +static struct pxafb_mode_info *pxafb_getmode(struct pxafb_mach_info *mach, + struct fb_var_screeninfo *var) { struct pxafb_mode_info *mode = NULL; struct pxafb_mode_info *modelist = mach->modes; unsigned int best_x = 0xffffffff, best_y = 0xffffffff; unsigned int i; - for (i = 0 ; i < mach->num_modes ; i++) { - if (modelist[i].xres >= var->xres && modelist[i].yres >= var->yres && - modelist[i].xres < best_x && modelist[i].yres < best_y && - modelist[i].bpp >= var->bits_per_pixel ) { + for (i = 0; i < mach->num_modes; i++) { + if (modelist[i].xres >= var->xres && + modelist[i].yres >= var->yres && + modelist[i].xres < best_x && + modelist[i].yres < best_y && + modelist[i].bpp >= var->bits_per_pixel) { best_x = modelist[i].xres; best_y = modelist[i].yres; mode = &modelist[i]; @@ -257,7 +275,8 @@ static struct pxafb_mode_info *pxafb_getmode(struct pxafb_mach_info *mach, struc return mode; } -static void pxafb_setmode(struct fb_var_screeninfo *var, struct pxafb_mode_info *mode) +static void pxafb_setmode(struct fb_var_screeninfo *var, + struct pxafb_mode_info *mode) { var->xres = mode->xres; var->yres = mode->yres; @@ -315,19 +334,20 @@ static int pxafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) var->yres_virtual = max(var->yres_virtual, var->yres); - /* + /* * Setup the RGB parameters for this display. * * The pixel packing format is described on page 7-11 of the * PXA2XX Developer's Manual. - */ + */ if (var->bits_per_pixel == 16) { var->red.offset = 11; var->red.length = 5; var->green.offset = 5; var->green.length = 6; var->blue.offset = 0; var->blue.length = 5; var->transp.offset = var->transp.length = 0; } else { - var->red.offset = var->green.offset = var->blue.offset = var->transp.offset = 0; + var->red.offset = var->green.offset = 0; + var->blue.offset = var->transp.offset = 0; var->red.length = 8; var->green.length = 8; var->blue.length = 8; @@ -335,9 +355,8 @@ static int pxafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) } #ifdef CONFIG_CPU_FREQ - pr_debug("pxafb: dma period = %d ps, clock = %d kHz\n", - pxafb_display_dma_period(var), - get_clk_frequency_khz(0)); + pr_debug("pxafb: dma period = %d ps\n", + pxafb_display_dma_period(var)); #endif return 0; @@ -345,8 +364,7 @@ static int pxafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) static inline void pxafb_set_truecolor(u_int is_true_color) { - pr_debug("pxafb: true_color = %d\n", is_true_color); - // do your machine-specific setup if needed + /* do your machine-specific setup if needed */ } /* @@ -357,9 +375,6 @@ static int pxafb_set_par(struct fb_info *info) { struct pxafb_info *fbi = (struct pxafb_info *)info; struct fb_var_screeninfo *var = &info->var; - unsigned long palette_mem_size; - - pr_debug("pxafb: set_par\n"); if (var->bits_per_pixel == 16) fbi->fb.fix.visual = FB_VISUAL_TRUECOLOR; @@ -379,17 +394,10 @@ static int pxafb_set_par(struct fb_info *info) if (var->bits_per_pixel == 16) fbi->palette_size = 0; else - fbi->palette_size = var->bits_per_pixel == 1 ? 4 : 1 << var->bits_per_pixel; - - if ((fbi->lccr4 & LCCR4_PAL_FOR_MASK) == LCCR4_PAL_FOR_0) - palette_mem_size = fbi->palette_size * sizeof(u16); - else - palette_mem_size = fbi->palette_size * sizeof(u32); - - pr_debug("pxafb: palette_mem_size = 0x%08lx\n", palette_mem_size); + fbi->palette_size = var->bits_per_pixel == 1 ? + 4 : 1 << var->bits_per_pixel; - fbi->palette_cpu = (u16 *)(fbi->map_cpu + PAGE_SIZE - palette_mem_size); - fbi->palette_dma = fbi->map_dma + PAGE_SIZE - palette_mem_size; + fbi->palette_cpu = (u16 *)&fbi->dma_buff->palette[0]; /* * Set (any) board control register to handle new color depth @@ -407,36 +415,6 @@ static int pxafb_set_par(struct fb_info *info) } /* - * Formal definition of the VESA spec: - * On - * This refers to the state of the display when it is in full operation - * Stand-By - * This defines an optional operating state of minimal power reduction with - * the shortest recovery time - * Suspend - * This refers to a level of power management in which substantial power - * reduction is achieved by the display. The display can have a longer - * recovery time from this state than from the Stand-by state - * Off - * This indicates that the display is consuming the lowest level of power - * and is non-operational. Recovery from this state may optionally require - * the user to manually power on the monitor - * - * Now, the fbdev driver adds an additional state, (blank), where they - * turn off the video (maybe by colormap tricks), but don't mess with the - * video itself: think of it semantically between on and Stand-By. - * - * So here's what we should do in our fbdev blank routine: - * - * VESA_NO_BLANKING (mode 0) Video on, front/back light on - * VESA_VSYNC_SUSPEND (mode 1) Video on, front/back light off - * VESA_HSYNC_SUSPEND (mode 2) Video on, front/back light off - * VESA_POWERDOWN (mode 3) Video off, front/back light off - * - * This will match the matrox implementation. - */ - -/* * pxafb_blank(): * Blank the display by setting all palette values to zero. Note, the * 16 bpp mode does not really use the palette, so this will not @@ -447,8 +425,6 @@ static int pxafb_blank(int blank, struct fb_info *info) struct pxafb_info *fbi = (struct pxafb_info *)info; int i; - pr_debug("pxafb: blank=%d\n", blank); - switch (blank) { case FB_BLANK_POWERDOWN: case FB_BLANK_VSYNC_SUSPEND: @@ -460,11 +436,11 @@ static int pxafb_blank(int blank, struct fb_info *info) pxafb_setpalettereg(i, 0, 0, 0, 0, info); pxafb_schedule_work(fbi, C_DISABLE); - //TODO if (pxafb_blank_helper) pxafb_blank_helper(blank); + /* TODO if (pxafb_blank_helper) pxafb_blank_helper(blank); */ break; case FB_BLANK_UNBLANK: - //TODO if (pxafb_blank_helper) pxafb_blank_helper(blank); + /* TODO if (pxafb_blank_helper) pxafb_blank_helper(blank); */ if (fbi->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR || fbi->fb.fix.visual == FB_VISUAL_STATIC_PSEUDOCOLOR) fb_set_cmap(&fbi->fb.cmap, info); @@ -480,7 +456,7 @@ static int pxafb_mmap(struct fb_info *info, unsigned long off = vma->vm_pgoff << PAGE_SHIFT; if (off < info->fix.smem_len) { - vma->vm_pgoff += 1; + vma->vm_pgoff += fbi->video_offset / PAGE_SIZE; return dma_mmap_writecombine(fbi->dev, vma, fbi->map_cpu, fbi->map_dma, fbi->map_size); } @@ -529,7 +505,8 @@ static struct fb_ops pxafb_ops = { * * Factoring the 10^4 and 10^-12 out gives 10^-8 == 1 / 100000000 as used below. */ -static inline unsigned int get_pcd(struct pxafb_info *fbi, unsigned int pixclock) +static inline unsigned int get_pcd(struct pxafb_info *fbi, + unsigned int pixclock) { unsigned long long pcd; @@ -555,7 +532,7 @@ static inline void set_hsync_time(struct pxafb_info *fbi, unsigned int pcd) unsigned long htime; if ((pcd == 0) || (fbi->fb.var.hsync_len == 0)) { - fbi->hsync_time=0; + fbi->hsync_time = 0; return; } @@ -576,71 +553,231 @@ unsigned long pxafb_get_hsync_time(struct device *dev) } EXPORT_SYMBOL(pxafb_get_hsync_time); -/* - * pxafb_activate_var(): - * Configures LCD Controller based on entries in var parameter. Settings are - * only written to the controller if changes were made. - */ -static int pxafb_activate_var(struct fb_var_screeninfo *var, struct pxafb_info *fbi) +static int setup_frame_dma(struct pxafb_info *fbi, int dma, int pal, + unsigned int offset, size_t size) { - struct pxafb_lcd_reg new_regs; - u_long flags; - u_int lines_per_panel, pcd = get_pcd(fbi, var->pixclock); + struct pxafb_dma_descriptor *dma_desc, *pal_desc; + unsigned int dma_desc_off, pal_desc_off; - pr_debug("pxafb: Configuring PXA LCD\n"); + if (dma < 0 || dma >= DMA_MAX) + return -EINVAL; - pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n", - var->xres, var->hsync_len, - var->left_margin, var->right_margin); - pr_debug("var: yres=%d vslen=%d um=%d bm=%d\n", - var->yres, var->vsync_len, - var->upper_margin, var->lower_margin); - pr_debug("var: pixclock=%d pcd=%d\n", var->pixclock, pcd); + dma_desc = &fbi->dma_buff->dma_desc[dma]; + dma_desc_off = offsetof(struct pxafb_dma_buff, dma_desc[dma]); -#if DEBUG_VAR - if (var->xres < 16 || var->xres > 1024) - printk(KERN_ERR "%s: invalid xres %d\n", - fbi->fb.fix.id, var->xres); - switch(var->bits_per_pixel) { - case 1: - case 2: - case 4: - case 8: - case 16: - break; - default: - printk(KERN_ERR "%s: invalid bit depth %d\n", - fbi->fb.fix.id, var->bits_per_pixel); - break; + dma_desc->fsadr = fbi->screen_dma + offset; + dma_desc->fidr = 0; + dma_desc->ldcmd = size; + + if (pal < 0 || pal >= PAL_MAX) { + dma_desc->fdadr = fbi->dma_buff_phys + dma_desc_off; + fbi->fdadr[dma] = fbi->dma_buff_phys + dma_desc_off; + } else { + pal_desc = &fbi->dma_buff->pal_desc[dma]; + pal_desc_off = offsetof(struct pxafb_dma_buff, dma_desc[pal]); + + pal_desc->fsadr = fbi->dma_buff_phys + pal * PALETTE_SIZE; + pal_desc->fidr = 0; + + if ((fbi->lccr4 & LCCR4_PAL_FOR_MASK) == LCCR4_PAL_FOR_0) + pal_desc->ldcmd = fbi->palette_size * sizeof(u16); + else + pal_desc->ldcmd = fbi->palette_size * sizeof(u32); + + pal_desc->ldcmd |= LDCMD_PAL; + + /* flip back and forth between palette and frame buffer */ + pal_desc->fdadr = fbi->dma_buff_phys + dma_desc_off; + dma_desc->fdadr = fbi->dma_buff_phys + pal_desc_off; + fbi->fdadr[dma] = fbi->dma_buff_phys + dma_desc_off; } - if (var->hsync_len < 1 || var->hsync_len > 64) - printk(KERN_ERR "%s: invalid hsync_len %d\n", - fbi->fb.fix.id, var->hsync_len); - if (var->left_margin < 1 || var->left_margin > 255) - printk(KERN_ERR "%s: invalid left_margin %d\n", - fbi->fb.fix.id, var->left_margin); - if (var->right_margin < 1 || var->right_margin > 255) - printk(KERN_ERR "%s: invalid right_margin %d\n", - fbi->fb.fix.id, var->right_margin); - if (var->yres < 1 || var->yres > 1024) - printk(KERN_ERR "%s: invalid yres %d\n", - fbi->fb.fix.id, var->yres); - if (var->vsync_len < 1 || var->vsync_len > 64) - printk(KERN_ERR "%s: invalid vsync_len %d\n", - fbi->fb.fix.id, var->vsync_len); - if (var->upper_margin < 0 || var->upper_margin > 255) - printk(KERN_ERR "%s: invalid upper_margin %d\n", - fbi->fb.fix.id, var->upper_margin); - if (var->lower_margin < 0 || var->lower_margin > 255) - printk(KERN_ERR "%s: invalid lower_margin %d\n", - fbi->fb.fix.id, var->lower_margin); -#endif - new_regs.lccr0 = fbi->lccr0 | - (LCCR0_LDM | LCCR0_SFM | LCCR0_IUM | LCCR0_EFM | - LCCR0_QDM | LCCR0_BM | LCCR0_OUM); + return 0; +} + +#ifdef CONFIG_FB_PXA_SMARTPANEL +static int setup_smart_dma(struct pxafb_info *fbi) +{ + struct pxafb_dma_descriptor *dma_desc; + unsigned long dma_desc_off, cmd_buff_off; + + dma_desc = &fbi->dma_buff->dma_desc[DMA_CMD]; + dma_desc_off = offsetof(struct pxafb_dma_buff, dma_desc[DMA_CMD]); + cmd_buff_off = offsetof(struct pxafb_dma_buff, cmd_buff); + + dma_desc->fdadr = fbi->dma_buff_phys + dma_desc_off; + dma_desc->fsadr = fbi->dma_buff_phys + cmd_buff_off; + dma_desc->fidr = 0; + dma_desc->ldcmd = fbi->n_smart_cmds * sizeof(uint16_t); + + fbi->fdadr[DMA_CMD] = dma_desc->fdadr; + return 0; +} + +int pxafb_smart_flush(struct fb_info *info) +{ + struct pxafb_info *fbi = container_of(info, struct pxafb_info, fb); + uint32_t prsr; + int ret = 0; + + /* disable controller until all registers are set up */ + lcd_writel(fbi, LCCR0, fbi->reg_lccr0 & ~LCCR0_ENB); + + /* 1. make it an even number of commands to align on 32-bit boundary + * 2. add the interrupt command to the end of the chain so we can + * keep track of the end of the transfer + */ + + while (fbi->n_smart_cmds & 1) + fbi->smart_cmds[fbi->n_smart_cmds++] = SMART_CMD_NOOP; + + fbi->smart_cmds[fbi->n_smart_cmds++] = SMART_CMD_INTERRUPT; + fbi->smart_cmds[fbi->n_smart_cmds++] = SMART_CMD_WAIT_FOR_VSYNC; + setup_smart_dma(fbi); + + /* continue to execute next command */ + prsr = lcd_readl(fbi, PRSR) | PRSR_ST_OK | PRSR_CON_NT; + lcd_writel(fbi, PRSR, prsr); + + /* stop the processor in case it executed "wait for sync" cmd */ + lcd_writel(fbi, CMDCR, 0x0001); + + /* don't send interrupts for fifo underruns on channel 6 */ + lcd_writel(fbi, LCCR5, LCCR5_IUM(6)); + + lcd_writel(fbi, LCCR1, fbi->reg_lccr1); + lcd_writel(fbi, LCCR2, fbi->reg_lccr2); + lcd_writel(fbi, LCCR3, fbi->reg_lccr3); + lcd_writel(fbi, FDADR0, fbi->fdadr[0]); + lcd_writel(fbi, FDADR6, fbi->fdadr[6]); + + /* begin sending */ + lcd_writel(fbi, LCCR0, fbi->reg_lccr0 | LCCR0_ENB); + + if (wait_for_completion_timeout(&fbi->command_done, HZ/2) == 0) { + pr_warning("%s: timeout waiting for command done\n", + __func__); + ret = -ETIMEDOUT; + } + + /* quick disable */ + prsr = lcd_readl(fbi, PRSR) & ~(PRSR_ST_OK | PRSR_CON_NT); + lcd_writel(fbi, PRSR, prsr); + lcd_writel(fbi, LCCR0, fbi->reg_lccr0 & ~LCCR0_ENB); + lcd_writel(fbi, FDADR6, 0); + fbi->n_smart_cmds = 0; + return ret; +} + +int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int n_cmds) +{ + int i; + struct pxafb_info *fbi = container_of(info, struct pxafb_info, fb); + + /* leave 2 commands for INTERRUPT and WAIT_FOR_SYNC */ + for (i = 0; i < n_cmds; i++) { + if (fbi->n_smart_cmds == CMD_BUFF_SIZE - 8) + pxafb_smart_flush(info); + + fbi->smart_cmds[fbi->n_smart_cmds++] = *cmds++; + } + + return 0; +} + +static unsigned int __smart_timing(unsigned time_ns, unsigned long lcd_clk) +{ + unsigned int t = (time_ns * (lcd_clk / 1000000) / 1000); + return (t == 0) ? 1 : t; +} + +static void setup_smart_timing(struct pxafb_info *fbi, + struct fb_var_screeninfo *var) +{ + struct pxafb_mach_info *inf = fbi->dev->platform_data; + struct pxafb_mode_info *mode = &inf->modes[0]; + unsigned long lclk = clk_get_rate(fbi->clk); + unsigned t1, t2, t3, t4; + + t1 = max(mode->a0csrd_set_hld, mode->a0cswr_set_hld); + t2 = max(mode->rd_pulse_width, mode->wr_pulse_width); + t3 = mode->op_hold_time; + t4 = mode->cmd_inh_time; + + fbi->reg_lccr1 = + LCCR1_DisWdth(var->xres) | + LCCR1_BegLnDel(__smart_timing(t1, lclk)) | + LCCR1_EndLnDel(__smart_timing(t2, lclk)) | + LCCR1_HorSnchWdth(__smart_timing(t3, lclk)); + + fbi->reg_lccr2 = LCCR2_DisHght(var->yres); + fbi->reg_lccr3 = LCCR3_PixClkDiv(__smart_timing(t4, lclk)); + + /* FIXME: make this configurable */ + fbi->reg_cmdcr = 1; +} + +static int pxafb_smart_thread(void *arg) +{ + struct pxafb_info *fbi = arg; + struct pxafb_mach_info *inf = fbi->dev->platform_data; + + if (!fbi || !inf->smart_update) { + pr_err("%s: not properly initialized, thread terminated\n", + __func__); + return -EINVAL; + } - new_regs.lccr1 = + pr_debug("%s(): task starting\n", __func__); + + set_freezable(); + while (!kthread_should_stop()) { + + if (try_to_freeze()) + continue; + + if (fbi->state == C_ENABLE) { + inf->smart_update(&fbi->fb); + complete(&fbi->refresh_done); + } + + set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout(30 * HZ / 1000); + } + + pr_debug("%s(): task ending\n", __func__); + return 0; +} + +static int pxafb_smart_init(struct pxafb_info *fbi) +{ + fbi->smart_thread = kthread_run(pxafb_smart_thread, fbi, + "lcd_refresh"); + if (IS_ERR(fbi->smart_thread)) { + printk(KERN_ERR "%s: unable to create kernel thread\n", + __func__); + return PTR_ERR(fbi->smart_thread); + } + return 0; +} +#else +int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int n_cmds) +{ + return 0; +} + +int pxafb_smart_flush(struct fb_info *info) +{ + return 0; +} +#endif /* CONFIG_FB_SMART_PANEL */ + +static void setup_parallel_timing(struct pxafb_info *fbi, + struct fb_var_screeninfo *var) +{ + unsigned int lines_per_panel, pcd = get_pcd(fbi, var->pixclock); + + fbi->reg_lccr1 = LCCR1_DisWdth(var->xres) + LCCR1_HorSnchWdth(var->hsync_len) + LCCR1_BegLnDel(var->left_margin) + @@ -654,110 +791,118 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var, struct pxafb_info * if ((fbi->lccr0 & LCCR0_SDS) == LCCR0_Dual) lines_per_panel /= 2; - new_regs.lccr2 = + fbi->reg_lccr2 = LCCR2_DisHght(lines_per_panel) + LCCR2_VrtSnchWdth(var->vsync_len) + LCCR2_BegFrmDel(var->upper_margin) + LCCR2_EndFrmDel(var->lower_margin); - new_regs.lccr3 = fbi->lccr3 | - pxafb_bpp_to_lccr3(var) | - (var->sync & FB_SYNC_HOR_HIGH_ACT ? LCCR3_HorSnchH : LCCR3_HorSnchL) | - (var->sync & FB_SYNC_VERT_HIGH_ACT ? LCCR3_VrtSnchH : LCCR3_VrtSnchL); + fbi->reg_lccr3 = fbi->lccr3 | + (var->sync & FB_SYNC_HOR_HIGH_ACT ? + LCCR3_HorSnchH : LCCR3_HorSnchL) | + (var->sync & FB_SYNC_VERT_HIGH_ACT ? + LCCR3_VrtSnchH : LCCR3_VrtSnchL); + + if (pcd) { + fbi->reg_lccr3 |= LCCR3_PixClkDiv(pcd); + set_hsync_time(fbi, pcd); + } +} - if (pcd) - new_regs.lccr3 |= LCCR3_PixClkDiv(pcd); +/* + * pxafb_activate_var(): + * Configures LCD Controller based on entries in var parameter. + * Settings are only written to the controller if changes were made. + */ +static int pxafb_activate_var(struct fb_var_screeninfo *var, + struct pxafb_info *fbi) +{ + u_long flags; + size_t nbytes; - pr_debug("nlccr0 = 0x%08x\n", new_regs.lccr0); - pr_debug("nlccr1 = 0x%08x\n", new_regs.lccr1); - pr_debug("nlccr2 = 0x%08x\n", new_regs.lccr2); - pr_debug("nlccr3 = 0x%08x\n", new_regs.lccr3); +#if DEBUG_VAR + if (!(fbi->lccr0 & LCCR0_LCDT)) { + if (var->xres < 16 || var->xres > 1024) + printk(KERN_ERR "%s: invalid xres %d\n", + fbi->fb.fix.id, var->xres); + switch (var->bits_per_pixel) { + case 1: + case 2: + case 4: + case 8: + case 16: + break; + default: + printk(KERN_ERR "%s: invalid bit depth %d\n", + fbi->fb.fix.id, var->bits_per_pixel); + break; + } + if (var->hsync_len < 1 || var->hsync_len > 64) + printk(KERN_ERR "%s: invalid hsync_len %d\n", + fbi->fb.fix.id, var->hsync_len); + if (var->left_margin < 1 || var->left_margin > 255) + printk(KERN_ERR "%s: invalid left_margin %d\n", + fbi->fb.fix.id, var->left_margin); + if (var->right_margin < 1 || var->right_margin > 255) + printk(KERN_ERR "%s: invalid right_margin %d\n", + fbi->fb.fix.id, var->right_margin); + if (var->yres < 1 || var->yres > 1024) + printk(KERN_ERR "%s: invalid yres %d\n", + fbi->fb.fix.id, var->yres); + if (var->vsync_len < 1 || var->vsync_len > 64) + printk(KERN_ERR "%s: invalid vsync_len %d\n", + fbi->fb.fix.id, var->vsync_len); + if (var->upper_margin < 0 || var->upper_margin > 255) + printk(KERN_ERR "%s: invalid upper_margin %d\n", + fbi->fb.fix.id, var->upper_margin); + if (var->lower_margin < 0 || var->lower_margin > 255) + printk(KERN_ERR "%s: invalid lower_margin %d\n", + fbi->fb.fix.id, var->lower_margin); + } +#endif /* Update shadow copy atomically */ local_irq_save(flags); - /* setup dma descriptors */ - fbi->dmadesc_fblow_cpu = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette_cpu - 3*16); - fbi->dmadesc_fbhigh_cpu = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette_cpu - 2*16); - fbi->dmadesc_palette_cpu = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette_cpu - 1*16); - - fbi->dmadesc_fblow_dma = fbi->palette_dma - 3*16; - fbi->dmadesc_fbhigh_dma = fbi->palette_dma - 2*16; - fbi->dmadesc_palette_dma = fbi->palette_dma - 1*16; - -#define BYTES_PER_PANEL (lines_per_panel * fbi->fb.fix.line_length) - - /* populate descriptors */ - fbi->dmadesc_fblow_cpu->fdadr = fbi->dmadesc_fblow_dma; - fbi->dmadesc_fblow_cpu->fsadr = fbi->screen_dma + BYTES_PER_PANEL; - fbi->dmadesc_fblow_cpu->fidr = 0; - fbi->dmadesc_fblow_cpu->ldcmd = BYTES_PER_PANEL; +#ifdef CONFIG_FB_PXA_SMARTPANEL + if (fbi->lccr0 & LCCR0_LCDT) + setup_smart_timing(fbi, var); + else +#endif + setup_parallel_timing(fbi, var); - fbi->fdadr1 = fbi->dmadesc_fblow_dma; /* only used in dual-panel mode */ + fbi->reg_lccr0 = fbi->lccr0 | + (LCCR0_LDM | LCCR0_SFM | LCCR0_IUM | LCCR0_EFM | + LCCR0_QDM | LCCR0_BM | LCCR0_OUM); - fbi->dmadesc_fbhigh_cpu->fsadr = fbi->screen_dma; - fbi->dmadesc_fbhigh_cpu->fidr = 0; - fbi->dmadesc_fbhigh_cpu->ldcmd = BYTES_PER_PANEL; + fbi->reg_lccr3 |= pxafb_bpp_to_lccr3(var); - fbi->dmadesc_palette_cpu->fsadr = fbi->palette_dma; - fbi->dmadesc_palette_cpu->fidr = 0; - if ((fbi->lccr4 & LCCR4_PAL_FOR_MASK) == LCCR4_PAL_FOR_0) - fbi->dmadesc_palette_cpu->ldcmd = fbi->palette_size * - sizeof(u16); - else - fbi->dmadesc_palette_cpu->ldcmd = fbi->palette_size * - sizeof(u32); - fbi->dmadesc_palette_cpu->ldcmd |= LDCMD_PAL; + nbytes = var->yres * fbi->fb.fix.line_length; - if (var->bits_per_pixel == 16) { - /* palette shouldn't be loaded in true-color mode */ - fbi->dmadesc_fbhigh_cpu->fdadr = fbi->dmadesc_fbhigh_dma; - fbi->fdadr0 = fbi->dmadesc_fbhigh_dma; /* no pal just fbhigh */ - /* init it to something, even though we won't be using it */ - fbi->dmadesc_palette_cpu->fdadr = fbi->dmadesc_palette_dma; - } else { - fbi->dmadesc_palette_cpu->fdadr = fbi->dmadesc_fbhigh_dma; - fbi->dmadesc_fbhigh_cpu->fdadr = fbi->dmadesc_palette_dma; - fbi->fdadr0 = fbi->dmadesc_palette_dma; /* flips back and forth between pal and fbhigh */ + if ((fbi->lccr0 & LCCR0_SDS) == LCCR0_Dual) { + nbytes = nbytes / 2; + setup_frame_dma(fbi, DMA_LOWER, PAL_NONE, nbytes, nbytes); } -#if 0 - pr_debug("fbi->dmadesc_fblow_cpu = 0x%p\n", fbi->dmadesc_fblow_cpu); - pr_debug("fbi->dmadesc_fbhigh_cpu = 0x%p\n", fbi->dmadesc_fbhigh_cpu); - pr_debug("fbi->dmadesc_palette_cpu = 0x%p\n", fbi->dmadesc_palette_cpu); - pr_debug("fbi->dmadesc_fblow_dma = 0x%x\n", fbi->dmadesc_fblow_dma); - pr_debug("fbi->dmadesc_fbhigh_dma = 0x%x\n", fbi->dmadesc_fbhigh_dma); - pr_debug("fbi->dmadesc_palette_dma = 0x%x\n", fbi->dmadesc_palette_dma); - - pr_debug("fbi->dmadesc_fblow_cpu->fdadr = 0x%x\n", fbi->dmadesc_fblow_cpu->fdadr); - pr_debug("fbi->dmadesc_fbhigh_cpu->fdadr = 0x%x\n", fbi->dmadesc_fbhigh_cpu->fdadr); - pr_debug("fbi->dmadesc_palette_cpu->fdadr = 0x%x\n", fbi->dmadesc_palette_cpu->fdadr); - - pr_debug("fbi->dmadesc_fblow_cpu->fsadr = 0x%x\n", fbi->dmadesc_fblow_cpu->fsadr); - pr_debug("fbi->dmadesc_fbhigh_cpu->fsadr = 0x%x\n", fbi->dmadesc_fbhigh_cpu->fsadr); - pr_debug("fbi->dmadesc_palette_cpu->fsadr = 0x%x\n", fbi->dmadesc_palette_cpu->fsadr); - - pr_debug("fbi->dmadesc_fblow_cpu->ldcmd = 0x%x\n", fbi->dmadesc_fblow_cpu->ldcmd); - pr_debug("fbi->dmadesc_fbhigh_cpu->ldcmd = 0x%x\n", fbi->dmadesc_fbhigh_cpu->ldcmd); - pr_debug("fbi->dmadesc_palette_cpu->ldcmd = 0x%x\n", fbi->dmadesc_palette_cpu->ldcmd); -#endif + if ((var->bits_per_pixel >= 16) || (fbi->lccr0 & LCCR0_LCDT)) + setup_frame_dma(fbi, DMA_BASE, PAL_NONE, 0, nbytes); + else + setup_frame_dma(fbi, DMA_BASE, PAL_BASE, 0, nbytes); - fbi->reg_lccr0 = new_regs.lccr0; - fbi->reg_lccr1 = new_regs.lccr1; - fbi->reg_lccr2 = new_regs.lccr2; - fbi->reg_lccr3 = new_regs.lccr3; - fbi->reg_lccr4 = LCCR4 & (~LCCR4_PAL_FOR_MASK); + fbi->reg_lccr4 = lcd_readl(fbi, LCCR4) & ~LCCR4_PAL_FOR_MASK; fbi->reg_lccr4 |= (fbi->lccr4 & LCCR4_PAL_FOR_MASK); - set_hsync_time(fbi, pcd); local_irq_restore(flags); /* * Only update the registers if the controller is enabled * and something has changed. */ - if ((LCCR0 != fbi->reg_lccr0) || (LCCR1 != fbi->reg_lccr1) || - (LCCR2 != fbi->reg_lccr2) || (LCCR3 != fbi->reg_lccr3) || - (FDADR0 != fbi->fdadr0) || (FDADR1 != fbi->fdadr1)) + if ((lcd_readl(fbi, LCCR0) != fbi->reg_lccr0) || + (lcd_readl(fbi, LCCR1) != fbi->reg_lccr1) || + (lcd_readl(fbi, LCCR2) != fbi->reg_lccr2) || + (lcd_readl(fbi, LCCR3) != fbi->reg_lccr3) || + (lcd_readl(fbi, FDADR0) != fbi->fdadr[0]) || + (lcd_readl(fbi, FDADR1) != fbi->fdadr[1])) pxafb_schedule_work(fbi, C_REENABLE); return 0; @@ -773,8 +918,8 @@ static inline void __pxafb_backlight_power(struct pxafb_info *fbi, int on) { pr_debug("pxafb: backlight o%s\n", on ? "n" : "ff"); - if (pxafb_backlight_power) - pxafb_backlight_power(on); + if (pxafb_backlight_power) + pxafb_backlight_power(on); } static inline void __pxafb_lcd_power(struct pxafb_info *fbi, int on) @@ -788,11 +933,11 @@ static inline void __pxafb_lcd_power(struct pxafb_info *fbi, int on) static void pxafb_setup_gpio(struct pxafb_info *fbi) { int gpio, ldd_bits; - unsigned int lccr0 = fbi->lccr0; + unsigned int lccr0 = fbi->lccr0; /* * setup is based on type of panel supported - */ + */ /* 4 bit interface */ if ((lccr0 & LCCR0_CMS) == LCCR0_Mono && @@ -801,21 +946,25 @@ static void pxafb_setup_gpio(struct pxafb_info *fbi) ldd_bits = 4; /* 8 bit interface */ - else if (((lccr0 & LCCR0_CMS) == LCCR0_Mono && - ((lccr0 & LCCR0_SDS) == LCCR0_Dual || (lccr0 & LCCR0_DPD) == LCCR0_8PixMono)) || - ((lccr0 & LCCR0_CMS) == LCCR0_Color && - (lccr0 & LCCR0_PAS) == LCCR0_Pas && (lccr0 & LCCR0_SDS) == LCCR0_Sngl)) + else if (((lccr0 & LCCR0_CMS) == LCCR0_Mono && + ((lccr0 & LCCR0_SDS) == LCCR0_Dual || + (lccr0 & LCCR0_DPD) == LCCR0_8PixMono)) || + ((lccr0 & LCCR0_CMS) == LCCR0_Color && + (lccr0 & LCCR0_PAS) == LCCR0_Pas && + (lccr0 & LCCR0_SDS) == LCCR0_Sngl)) ldd_bits = 8; /* 16 bit interface */ else if ((lccr0 & LCCR0_CMS) == LCCR0_Color && - ((lccr0 & LCCR0_SDS) == LCCR0_Dual || (lccr0 & LCCR0_PAS) == LCCR0_Act)) + ((lccr0 & LCCR0_SDS) == LCCR0_Dual || + (lccr0 & LCCR0_PAS) == LCCR0_Act)) ldd_bits = 16; else { - printk(KERN_ERR "pxafb_setup_gpio: unable to determine bits per pixel\n"); + printk(KERN_ERR "pxafb_setup_gpio: unable to determine " + "bits per pixel\n"); return; - } + } for (gpio = 58; ldd_bits; gpio++, ldd_bits--) pxa_gpio_mode(gpio | GPIO_ALT_FN_2_OUT); @@ -828,8 +977,8 @@ static void pxafb_setup_gpio(struct pxafb_info *fbi) static void pxafb_enable_controller(struct pxafb_info *fbi) { pr_debug("pxafb: Enabling LCD controller\n"); - pr_debug("fdadr0 0x%08x\n", (unsigned int) fbi->fdadr0); - pr_debug("fdadr1 0x%08x\n", (unsigned int) fbi->fdadr1); + pr_debug("fdadr0 0x%08x\n", (unsigned int) fbi->fdadr[0]); + pr_debug("fdadr1 0x%08x\n", (unsigned int) fbi->fdadr[1]); pr_debug("reg_lccr0 0x%08x\n", (unsigned int) fbi->reg_lccr0); pr_debug("reg_lccr1 0x%08x\n", (unsigned int) fbi->reg_lccr1); pr_debug("reg_lccr2 0x%08x\n", (unsigned int) fbi->reg_lccr2); @@ -838,40 +987,40 @@ static void pxafb_enable_controller(struct pxafb_info *fbi) /* enable LCD controller clock */ clk_enable(fbi->clk); + if (fbi->lccr0 & LCCR0_LCDT) + return; + /* Sequence from 11.7.10 */ - LCCR3 = fbi->reg_lccr3; - LCCR2 = fbi->reg_lccr2; - LCCR1 = fbi->reg_lccr1; - LCCR0 = fbi->reg_lccr0 & ~LCCR0_ENB; - - FDADR0 = fbi->fdadr0; - FDADR1 = fbi->fdadr1; - LCCR0 |= LCCR0_ENB; - - pr_debug("FDADR0 0x%08x\n", (unsigned int) FDADR0); - pr_debug("FDADR1 0x%08x\n", (unsigned int) FDADR1); - pr_debug("LCCR0 0x%08x\n", (unsigned int) LCCR0); - pr_debug("LCCR1 0x%08x\n", (unsigned int) LCCR1); - pr_debug("LCCR2 0x%08x\n", (unsigned int) LCCR2); - pr_debug("LCCR3 0x%08x\n", (unsigned int) LCCR3); - pr_debug("LCCR4 0x%08x\n", (unsigned int) LCCR4); + lcd_writel(fbi, LCCR3, fbi->reg_lccr3); + lcd_writel(fbi, LCCR2, fbi->reg_lccr2); + lcd_writel(fbi, LCCR1, fbi->reg_lccr1); + lcd_writel(fbi, LCCR0, fbi->reg_lccr0 & ~LCCR0_ENB); + + lcd_writel(fbi, FDADR0, fbi->fdadr[0]); + lcd_writel(fbi, FDADR1, fbi->fdadr[1]); + lcd_writel(fbi, LCCR0, fbi->reg_lccr0 | LCCR0_ENB); } static void pxafb_disable_controller(struct pxafb_info *fbi) { - DECLARE_WAITQUEUE(wait, current); + uint32_t lccr0; - pr_debug("pxafb: disabling LCD controller\n"); +#ifdef CONFIG_FB_PXA_SMARTPANEL + if (fbi->lccr0 & LCCR0_LCDT) { + wait_for_completion_timeout(&fbi->refresh_done, + 200 * HZ / 1000); + return; + } +#endif - set_current_state(TASK_UNINTERRUPTIBLE); - add_wait_queue(&fbi->ctrlr_wait, &wait); + /* Clear LCD Status Register */ + lcd_writel(fbi, LCSR, 0xffffffff); - LCSR = 0xffffffff; /* Clear LCD Status Register */ - LCCR0 &= ~LCCR0_LDM; /* Enable LCD Disable Done Interrupt */ - LCCR0 |= LCCR0_DIS; /* Disable LCD Controller */ + lccr0 = lcd_readl(fbi, LCCR0) & ~LCCR0_LDM; + lcd_writel(fbi, LCCR0, lccr0); + lcd_writel(fbi, LCCR0, lccr0 | LCCR0_DIS); - schedule_timeout(200 * HZ / 1000); - remove_wait_queue(&fbi->ctrlr_wait, &wait); + wait_for_completion_timeout(&fbi->disable_done, 200 * HZ / 1000); /* disable LCD controller clock */ clk_disable(fbi->clk); @@ -883,14 +1032,20 @@ static void pxafb_disable_controller(struct pxafb_info *fbi) static irqreturn_t pxafb_handle_irq(int irq, void *dev_id) { struct pxafb_info *fbi = dev_id; - unsigned int lcsr = LCSR; + unsigned int lccr0, lcsr = lcd_readl(fbi, LCSR); if (lcsr & LCSR_LDD) { - LCCR0 |= LCCR0_LDM; - wake_up(&fbi->ctrlr_wait); + lccr0 = lcd_readl(fbi, LCCR0); + lcd_writel(fbi, LCCR0, lccr0 | LCCR0_LDM); + complete(&fbi->disable_done); } - LCSR = lcsr; +#ifdef CONFIG_FB_PXA_SMARTPANEL + if (lcsr & LCSR_CMD_INT) + complete(&fbi->command_done); +#endif + + lcd_writel(fbi, LCSR, lcsr); return IRQ_HANDLED; } @@ -921,7 +1076,7 @@ static void set_ctrlr_state(struct pxafb_info *fbi, u_int state) */ if (old_state != C_DISABLE && old_state != C_DISABLE_PM) { fbi->state = state; - //TODO __pxafb_lcd_power(fbi, 0); + /* TODO __pxafb_lcd_power(fbi, 0); */ pxafb_disable_controller(fbi); } break; @@ -948,7 +1103,7 @@ static void set_ctrlr_state(struct pxafb_info *fbi, u_int state) if (old_state == C_DISABLE_CLKCHANGE) { fbi->state = C_ENABLE; pxafb_enable_controller(fbi); - //TODO __pxafb_lcd_power(fbi, 1); + /* TODO __pxafb_lcd_power(fbi, 1); */ } break; @@ -1019,7 +1174,7 @@ static int pxafb_freq_transition(struct notifier_block *nb, unsigned long val, void *data) { struct pxafb_info *fbi = TO_INF(nb, freq_transition); - //TODO struct cpufreq_freqs *f = data; + /* TODO struct cpufreq_freqs *f = data; */ u_int pcd; switch (val) { @@ -1030,7 +1185,8 @@ pxafb_freq_transition(struct notifier_block *nb, unsigned long val, void *data) case CPUFREQ_POSTCHANGE: pcd = get_pcd(fbi, fbi->fb.var.pixclock); set_hsync_time(fbi, pcd); - fbi->reg_lccr3 = (fbi->reg_lccr3 & ~0xff) | LCCR3_PixClkDiv(pcd); + fbi->reg_lccr3 = (fbi->reg_lccr3 & ~0xff) | + LCCR3_PixClkDiv(pcd); set_ctrlr_state(fbi, C_ENABLE_CLKCHANGE); break; } @@ -1050,18 +1206,8 @@ pxafb_freq_policy(struct notifier_block *nb, unsigned long val, void *data) pr_debug("min dma period: %d ps, " "new clock %d kHz\n", pxafb_display_dma_period(var), policy->max); - // TODO: fill in min/max values - break; -#if 0 - case CPUFREQ_NOTIFY: - printk(KERN_ERR "%s: got CPUFREQ_NOTIFY\n", __FUNCTION__); - do {} while(0); - /* todo: panic if min/max values aren't fulfilled - * [can't really happen unless there's a bug in the - * CPU policy verification process * - */ + /* TODO: fill in min/max values */ break; -#endif } return 0; } @@ -1102,21 +1248,21 @@ static int pxafb_resume(struct platform_device *dev) */ static int __init pxafb_map_video_memory(struct pxafb_info *fbi) { - u_long palette_mem_size; - /* * We reserve one page for the palette, plus the size * of the framebuffer. */ - fbi->map_size = PAGE_ALIGN(fbi->fb.fix.smem_len + PAGE_SIZE); + fbi->video_offset = PAGE_ALIGN(sizeof(struct pxafb_dma_buff)); + fbi->map_size = PAGE_ALIGN(fbi->fb.fix.smem_len + fbi->video_offset); fbi->map_cpu = dma_alloc_writecombine(fbi->dev, fbi->map_size, &fbi->map_dma, GFP_KERNEL); if (fbi->map_cpu) { /* prevent initial garbage on screen */ memset(fbi->map_cpu, 0, fbi->map_size); - fbi->fb.screen_base = fbi->map_cpu + PAGE_SIZE; - fbi->screen_dma = fbi->map_dma + PAGE_SIZE; + fbi->fb.screen_base = fbi->map_cpu + fbi->video_offset; + fbi->screen_dma = fbi->map_dma + fbi->video_offset; + /* * FIXME: this is actually the wrong thing to place in * smem_start. But fbdev suffers from the problem that @@ -1126,27 +1272,86 @@ static int __init pxafb_map_video_memory(struct pxafb_info *fbi) fbi->fb.fix.smem_start = fbi->screen_dma; fbi->palette_size = fbi->fb.var.bits_per_pixel == 8 ? 256 : 16; - if ((fbi->lccr4 & LCCR4_PAL_FOR_MASK) == LCCR4_PAL_FOR_0) - palette_mem_size = fbi->palette_size * sizeof(u16); - else - palette_mem_size = fbi->palette_size * sizeof(u32); + fbi->dma_buff = (void *) fbi->map_cpu; + fbi->dma_buff_phys = fbi->map_dma; + fbi->palette_cpu = (u16 *) fbi->dma_buff->palette; - pr_debug("pxafb: palette_mem_size = 0x%08lx\n", palette_mem_size); - - fbi->palette_cpu = (u16 *)(fbi->map_cpu + PAGE_SIZE - palette_mem_size); - fbi->palette_dma = fbi->map_dma + PAGE_SIZE - palette_mem_size; +#ifdef CONFIG_FB_PXA_SMARTPANEL + fbi->smart_cmds = (uint16_t *) fbi->dma_buff->cmd_buff; + fbi->n_smart_cmds = 0; +#endif } return fbi->map_cpu ? 0 : -ENOMEM; } +static void pxafb_decode_mode_info(struct pxafb_info *fbi, + struct pxafb_mode_info *modes, + unsigned int num_modes) +{ + unsigned int i, smemlen; + + pxafb_setmode(&fbi->fb.var, &modes[0]); + + for (i = 0; i < num_modes; i++) { + smemlen = modes[i].xres * modes[i].yres * modes[i].bpp / 8; + if (smemlen > fbi->fb.fix.smem_len) + fbi->fb.fix.smem_len = smemlen; + } +} + +static void pxafb_decode_mach_info(struct pxafb_info *fbi, + struct pxafb_mach_info *inf) +{ + unsigned int lcd_conn = inf->lcd_conn; + + fbi->cmap_inverse = inf->cmap_inverse; + fbi->cmap_static = inf->cmap_static; + + switch (lcd_conn & 0xf) { + case LCD_TYPE_MONO_STN: + fbi->lccr0 = LCCR0_CMS; + break; + case LCD_TYPE_MONO_DSTN: + fbi->lccr0 = LCCR0_CMS | LCCR0_SDS; + break; + case LCD_TYPE_COLOR_STN: + fbi->lccr0 = 0; + break; + case LCD_TYPE_COLOR_DSTN: + fbi->lccr0 = LCCR0_SDS; + break; + case LCD_TYPE_COLOR_TFT: + fbi->lccr0 = LCCR0_PAS; + break; + case LCD_TYPE_SMART_PANEL: + fbi->lccr0 = LCCR0_LCDT | LCCR0_PAS; + break; + default: + /* fall back to backward compatibility way */ + fbi->lccr0 = inf->lccr0; + fbi->lccr3 = inf->lccr3; + fbi->lccr4 = inf->lccr4; + goto decode_mode; + } + + if (lcd_conn == LCD_MONO_STN_8BPP) + fbi->lccr0 |= LCCR0_DPD; + + fbi->lccr3 = LCCR3_Acb((inf->lcd_conn >> 10) & 0xff); + fbi->lccr3 |= (lcd_conn & LCD_BIAS_ACTIVE_LOW) ? LCCR3_OEP : 0; + fbi->lccr3 |= (lcd_conn & LCD_PCLK_EDGE_FALL) ? LCCR3_PCP : 0; + +decode_mode: + pxafb_decode_mode_info(fbi, inf->modes, inf->num_modes); +} + static struct pxafb_info * __init pxafb_init_fbinfo(struct device *dev) { struct pxafb_info *fbi; void *addr; struct pxafb_mach_info *inf = dev->platform_data; struct pxafb_mode_info *mode = inf->modes; - int i, smemlen; /* Alloc the pxafb_info and pseudo_palette in one step */ fbi = kmalloc(sizeof(struct pxafb_info) + sizeof(u32) * 16, GFP_KERNEL); @@ -1186,187 +1391,233 @@ static struct pxafb_info * __init pxafb_init_fbinfo(struct device *dev) addr = addr + sizeof(struct pxafb_info); fbi->fb.pseudo_palette = addr; - pxafb_setmode(&fbi->fb.var, mode); - - fbi->cmap_inverse = inf->cmap_inverse; - fbi->cmap_static = inf->cmap_static; + fbi->state = C_STARTUP; + fbi->task_state = (u_char)-1; - fbi->lccr0 = inf->lccr0; - fbi->lccr3 = inf->lccr3; - fbi->lccr4 = inf->lccr4; - fbi->state = C_STARTUP; - fbi->task_state = (u_char)-1; - - for (i = 0; i < inf->num_modes; i++) { - smemlen = mode[i].xres * mode[i].yres * mode[i].bpp / 8; - if (smemlen > fbi->fb.fix.smem_len) - fbi->fb.fix.smem_len = smemlen; - } + pxafb_decode_mach_info(fbi, inf); init_waitqueue_head(&fbi->ctrlr_wait); INIT_WORK(&fbi->task, pxafb_task); init_MUTEX(&fbi->ctrlr_sem); + init_completion(&fbi->disable_done); +#ifdef CONFIG_FB_PXA_SMARTPANEL + init_completion(&fbi->command_done); + init_completion(&fbi->refresh_done); +#endif return fbi; } #ifdef CONFIG_FB_PXA_PARAMETERS -static int __init pxafb_parse_options(struct device *dev, char *options) +static int __init parse_opt_mode(struct device *dev, const char *this_opt) +{ + struct pxafb_mach_info *inf = dev->platform_data; + + const char *name = this_opt+5; + unsigned int namelen = strlen(name); + int res_specified = 0, bpp_specified = 0; + unsigned int xres = 0, yres = 0, bpp = 0; + int yres_specified = 0; + int i; + for (i = namelen-1; i >= 0; i--) { + switch (name[i]) { + case '-': + namelen = i; + if (!bpp_specified && !yres_specified) { + bpp = simple_strtoul(&name[i+1], NULL, 0); + bpp_specified = 1; + } else + goto done; + break; + case 'x': + if (!yres_specified) { + yres = simple_strtoul(&name[i+1], NULL, 0); + yres_specified = 1; + } else + goto done; + break; + case '0' ... '9': + break; + default: + goto done; + } + } + if (i < 0 && yres_specified) { + xres = simple_strtoul(name, NULL, 0); + res_specified = 1; + } +done: + if (res_specified) { + dev_info(dev, "overriding resolution: %dx%d\n", xres, yres); + inf->modes[0].xres = xres; inf->modes[0].yres = yres; + } + if (bpp_specified) + switch (bpp) { + case 1: + case 2: + case 4: + case 8: + case 16: + inf->modes[0].bpp = bpp; + dev_info(dev, "overriding bit depth: %d\n", bpp); + break; + default: + dev_err(dev, "Depth %d is not valid\n", bpp); + return -EINVAL; + } + return 0; +} + +static int __init parse_opt(struct device *dev, char *this_opt) { struct pxafb_mach_info *inf = dev->platform_data; + struct pxafb_mode_info *mode = &inf->modes[0]; + char s[64]; + + s[0] = '\0'; + + if (!strncmp(this_opt, "mode:", 5)) { + return parse_opt_mode(dev, this_opt); + } else if (!strncmp(this_opt, "pixclock:", 9)) { + mode->pixclock = simple_strtoul(this_opt+9, NULL, 0); + sprintf(s, "pixclock: %ld\n", mode->pixclock); + } else if (!strncmp(this_opt, "left:", 5)) { + mode->left_margin = simple_strtoul(this_opt+5, NULL, 0); + sprintf(s, "left: %u\n", mode->left_margin); + } else if (!strncmp(this_opt, "right:", 6)) { + mode->right_margin = simple_strtoul(this_opt+6, NULL, 0); + sprintf(s, "right: %u\n", mode->right_margin); + } else if (!strncmp(this_opt, "upper:", 6)) { + mode->upper_margin = simple_strtoul(this_opt+6, NULL, 0); + sprintf(s, "upper: %u\n", mode->upper_margin); + } else if (!strncmp(this_opt, "lower:", 6)) { + mode->lower_margin = simple_strtoul(this_opt+6, NULL, 0); + sprintf(s, "lower: %u\n", mode->lower_margin); + } else if (!strncmp(this_opt, "hsynclen:", 9)) { + mode->hsync_len = simple_strtoul(this_opt+9, NULL, 0); + sprintf(s, "hsynclen: %u\n", mode->hsync_len); + } else if (!strncmp(this_opt, "vsynclen:", 9)) { + mode->vsync_len = simple_strtoul(this_opt+9, NULL, 0); + sprintf(s, "vsynclen: %u\n", mode->vsync_len); + } else if (!strncmp(this_opt, "hsync:", 6)) { + if (simple_strtoul(this_opt+6, NULL, 0) == 0) { + sprintf(s, "hsync: Active Low\n"); + mode->sync &= ~FB_SYNC_HOR_HIGH_ACT; + } else { + sprintf(s, "hsync: Active High\n"); + mode->sync |= FB_SYNC_HOR_HIGH_ACT; + } + } else if (!strncmp(this_opt, "vsync:", 6)) { + if (simple_strtoul(this_opt+6, NULL, 0) == 0) { + sprintf(s, "vsync: Active Low\n"); + mode->sync &= ~FB_SYNC_VERT_HIGH_ACT; + } else { + sprintf(s, "vsync: Active High\n"); + mode->sync |= FB_SYNC_VERT_HIGH_ACT; + } + } else if (!strncmp(this_opt, "dpc:", 4)) { + if (simple_strtoul(this_opt+4, NULL, 0) == 0) { + sprintf(s, "double pixel clock: false\n"); + inf->lccr3 &= ~LCCR3_DPC; + } else { + sprintf(s, "double pixel clock: true\n"); + inf->lccr3 |= LCCR3_DPC; + } + } else if (!strncmp(this_opt, "outputen:", 9)) { + if (simple_strtoul(this_opt+9, NULL, 0) == 0) { + sprintf(s, "output enable: active low\n"); + inf->lccr3 = (inf->lccr3 & ~LCCR3_OEP) | LCCR3_OutEnL; + } else { + sprintf(s, "output enable: active high\n"); + inf->lccr3 = (inf->lccr3 & ~LCCR3_OEP) | LCCR3_OutEnH; + } + } else if (!strncmp(this_opt, "pixclockpol:", 12)) { + if (simple_strtoul(this_opt+12, NULL, 0) == 0) { + sprintf(s, "pixel clock polarity: falling edge\n"); + inf->lccr3 = (inf->lccr3 & ~LCCR3_PCP) | LCCR3_PixFlEdg; + } else { + sprintf(s, "pixel clock polarity: rising edge\n"); + inf->lccr3 = (inf->lccr3 & ~LCCR3_PCP) | LCCR3_PixRsEdg; + } + } else if (!strncmp(this_opt, "color", 5)) { + inf->lccr0 = (inf->lccr0 & ~LCCR0_CMS) | LCCR0_Color; + } else if (!strncmp(this_opt, "mono", 4)) { + inf->lccr0 = (inf->lccr0 & ~LCCR0_CMS) | LCCR0_Mono; + } else if (!strncmp(this_opt, "active", 6)) { + inf->lccr0 = (inf->lccr0 & ~LCCR0_PAS) | LCCR0_Act; + } else if (!strncmp(this_opt, "passive", 7)) { + inf->lccr0 = (inf->lccr0 & ~LCCR0_PAS) | LCCR0_Pas; + } else if (!strncmp(this_opt, "single", 6)) { + inf->lccr0 = (inf->lccr0 & ~LCCR0_SDS) | LCCR0_Sngl; + } else if (!strncmp(this_opt, "dual", 4)) { + inf->lccr0 = (inf->lccr0 & ~LCCR0_SDS) | LCCR0_Dual; + } else if (!strncmp(this_opt, "4pix", 4)) { + inf->lccr0 = (inf->lccr0 & ~LCCR0_DPD) | LCCR0_4PixMono; + } else if (!strncmp(this_opt, "8pix", 4)) { + inf->lccr0 = (inf->lccr0 & ~LCCR0_DPD) | LCCR0_8PixMono; + } else { + dev_err(dev, "unknown option: %s\n", this_opt); + return -EINVAL; + } + + if (s[0] != '\0') + dev_info(dev, "override %s", s); + + return 0; +} + +static int __init pxafb_parse_options(struct device *dev, char *options) +{ char *this_opt; + int ret; - if (!options || !*options) - return 0; + if (!options || !*options) + return 0; dev_dbg(dev, "options are \"%s\"\n", options ? options : "null"); /* could be made table driven or similar?... */ - while ((this_opt = strsep(&options, ",")) != NULL) { - if (!strncmp(this_opt, "mode:", 5)) { - const char *name = this_opt+5; - unsigned int namelen = strlen(name); - int res_specified = 0, bpp_specified = 0; - unsigned int xres = 0, yres = 0, bpp = 0; - int yres_specified = 0; - int i; - for (i = namelen-1; i >= 0; i--) { - switch (name[i]) { - case '-': - namelen = i; - if (!bpp_specified && !yres_specified) { - bpp = simple_strtoul(&name[i+1], NULL, 0); - bpp_specified = 1; - } else - goto done; - break; - case 'x': - if (!yres_specified) { - yres = simple_strtoul(&name[i+1], NULL, 0); - yres_specified = 1; - } else - goto done; - break; - case '0' ... '9': - break; - default: - goto done; - } - } - if (i < 0 && yres_specified) { - xres = simple_strtoul(name, NULL, 0); - res_specified = 1; - } - done: - if (res_specified) { - dev_info(dev, "overriding resolution: %dx%d\n", xres, yres); - inf->modes[0].xres = xres; inf->modes[0].yres = yres; - } - if (bpp_specified) - switch (bpp) { - case 1: - case 2: - case 4: - case 8: - case 16: - inf->modes[0].bpp = bpp; - dev_info(dev, "overriding bit depth: %d\n", bpp); - break; - default: - dev_err(dev, "Depth %d is not valid\n", bpp); - } - } else if (!strncmp(this_opt, "pixclock:", 9)) { - inf->modes[0].pixclock = simple_strtoul(this_opt+9, NULL, 0); - dev_info(dev, "override pixclock: %ld\n", inf->modes[0].pixclock); - } else if (!strncmp(this_opt, "left:", 5)) { - inf->modes[0].left_margin = simple_strtoul(this_opt+5, NULL, 0); - dev_info(dev, "override left: %u\n", inf->modes[0].left_margin); - } else if (!strncmp(this_opt, "right:", 6)) { - inf->modes[0].right_margin = simple_strtoul(this_opt+6, NULL, 0); - dev_info(dev, "override right: %u\n", inf->modes[0].right_margin); - } else if (!strncmp(this_opt, "upper:", 6)) { - inf->modes[0].upper_margin = simple_strtoul(this_opt+6, NULL, 0); - dev_info(dev, "override upper: %u\n", inf->modes[0].upper_margin); - } else if (!strncmp(this_opt, "lower:", 6)) { - inf->modes[0].lower_margin = simple_strtoul(this_opt+6, NULL, 0); - dev_info(dev, "override lower: %u\n", inf->modes[0].lower_margin); - } else if (!strncmp(this_opt, "hsynclen:", 9)) { - inf->modes[0].hsync_len = simple_strtoul(this_opt+9, NULL, 0); - dev_info(dev, "override hsynclen: %u\n", inf->modes[0].hsync_len); - } else if (!strncmp(this_opt, "vsynclen:", 9)) { - inf->modes[0].vsync_len = simple_strtoul(this_opt+9, NULL, 0); - dev_info(dev, "override vsynclen: %u\n", inf->modes[0].vsync_len); - } else if (!strncmp(this_opt, "hsync:", 6)) { - if (simple_strtoul(this_opt+6, NULL, 0) == 0) { - dev_info(dev, "override hsync: Active Low\n"); - inf->modes[0].sync &= ~FB_SYNC_HOR_HIGH_ACT; - } else { - dev_info(dev, "override hsync: Active High\n"); - inf->modes[0].sync |= FB_SYNC_HOR_HIGH_ACT; - } - } else if (!strncmp(this_opt, "vsync:", 6)) { - if (simple_strtoul(this_opt+6, NULL, 0) == 0) { - dev_info(dev, "override vsync: Active Low\n"); - inf->modes[0].sync &= ~FB_SYNC_VERT_HIGH_ACT; - } else { - dev_info(dev, "override vsync: Active High\n"); - inf->modes[0].sync |= FB_SYNC_VERT_HIGH_ACT; - } - } else if (!strncmp(this_opt, "dpc:", 4)) { - if (simple_strtoul(this_opt+4, NULL, 0) == 0) { - dev_info(dev, "override double pixel clock: false\n"); - inf->lccr3 &= ~LCCR3_DPC; - } else { - dev_info(dev, "override double pixel clock: true\n"); - inf->lccr3 |= LCCR3_DPC; - } - } else if (!strncmp(this_opt, "outputen:", 9)) { - if (simple_strtoul(this_opt+9, NULL, 0) == 0) { - dev_info(dev, "override output enable: active low\n"); - inf->lccr3 = (inf->lccr3 & ~LCCR3_OEP) | LCCR3_OutEnL; - } else { - dev_info(dev, "override output enable: active high\n"); - inf->lccr3 = (inf->lccr3 & ~LCCR3_OEP) | LCCR3_OutEnH; - } - } else if (!strncmp(this_opt, "pixclockpol:", 12)) { - if (simple_strtoul(this_opt+12, NULL, 0) == 0) { - dev_info(dev, "override pixel clock polarity: falling edge\n"); - inf->lccr3 = (inf->lccr3 & ~LCCR3_PCP) | LCCR3_PixFlEdg; - } else { - dev_info(dev, "override pixel clock polarity: rising edge\n"); - inf->lccr3 = (inf->lccr3 & ~LCCR3_PCP) | LCCR3_PixRsEdg; - } - } else if (!strncmp(this_opt, "color", 5)) { - inf->lccr0 = (inf->lccr0 & ~LCCR0_CMS) | LCCR0_Color; - } else if (!strncmp(this_opt, "mono", 4)) { - inf->lccr0 = (inf->lccr0 & ~LCCR0_CMS) | LCCR0_Mono; - } else if (!strncmp(this_opt, "active", 6)) { - inf->lccr0 = (inf->lccr0 & ~LCCR0_PAS) | LCCR0_Act; - } else if (!strncmp(this_opt, "passive", 7)) { - inf->lccr0 = (inf->lccr0 & ~LCCR0_PAS) | LCCR0_Pas; - } else if (!strncmp(this_opt, "single", 6)) { - inf->lccr0 = (inf->lccr0 & ~LCCR0_SDS) | LCCR0_Sngl; - } else if (!strncmp(this_opt, "dual", 4)) { - inf->lccr0 = (inf->lccr0 & ~LCCR0_SDS) | LCCR0_Dual; - } else if (!strncmp(this_opt, "4pix", 4)) { - inf->lccr0 = (inf->lccr0 & ~LCCR0_DPD) | LCCR0_4PixMono; - } else if (!strncmp(this_opt, "8pix", 4)) { - inf->lccr0 = (inf->lccr0 & ~LCCR0_DPD) | LCCR0_8PixMono; - } else { - dev_err(dev, "unknown option: %s\n", this_opt); - return -EINVAL; - } - } - return 0; + while ((this_opt = strsep(&options, ",")) != NULL) { + ret = parse_opt(dev, this_opt); + if (ret) + return ret; + } + return 0; +} + +static char g_options[256] __devinitdata = ""; +#ifndef CONFIG_MODULES +static int __devinit pxafb_setup_options(void) +{ + char *options = NULL; + + if (fb_get_options("pxafb", &options)) + return -ENODEV; + + if (options) + strlcpy(g_options, options, sizeof(g_options)); + + return 0; } +#else +#define pxafb_setup_options() (0) + +module_param_string(options, g_options, sizeof(g_options), 0); +MODULE_PARM_DESC(options, "LCD parameters (see Documentation/fb/pxafb.txt)"); +#endif + +#else +#define pxafb_parse_options(...) (0) +#define pxafb_setup_options() (0) #endif static int __init pxafb_probe(struct platform_device *dev) { struct pxafb_info *fbi; struct pxafb_mach_info *inf; - int ret; + struct resource *r; + int irq, ret; dev_dbg(&dev->dev, "pxafb_probe\n"); @@ -1376,38 +1627,45 @@ static int __init pxafb_probe(struct platform_device *dev) if (!inf) goto failed; -#ifdef CONFIG_FB_PXA_PARAMETERS ret = pxafb_parse_options(&dev->dev, g_options); if (ret < 0) goto failed; -#endif #ifdef DEBUG_VAR - /* Check for various illegal bit-combinations. Currently only + /* Check for various illegal bit-combinations. Currently only * a warning is given. */ - if (inf->lccr0 & LCCR0_INVALID_CONFIG_MASK) - dev_warn(&dev->dev, "machine LCCR0 setting contains illegal bits: %08x\n", - inf->lccr0 & LCCR0_INVALID_CONFIG_MASK); - if (inf->lccr3 & LCCR3_INVALID_CONFIG_MASK) - dev_warn(&dev->dev, "machine LCCR3 setting contains illegal bits: %08x\n", - inf->lccr3 & LCCR3_INVALID_CONFIG_MASK); - if (inf->lccr0 & LCCR0_DPD && + if (inf->lccr0 & LCCR0_INVALID_CONFIG_MASK) + dev_warn(&dev->dev, "machine LCCR0 setting contains " + "illegal bits: %08x\n", + inf->lccr0 & LCCR0_INVALID_CONFIG_MASK); + if (inf->lccr3 & LCCR3_INVALID_CONFIG_MASK) + dev_warn(&dev->dev, "machine LCCR3 setting contains " + "illegal bits: %08x\n", + inf->lccr3 & LCCR3_INVALID_CONFIG_MASK); + if (inf->lccr0 & LCCR0_DPD && ((inf->lccr0 & LCCR0_PAS) != LCCR0_Pas || (inf->lccr0 & LCCR0_SDS) != LCCR0_Sngl || (inf->lccr0 & LCCR0_CMS) != LCCR0_Mono)) - dev_warn(&dev->dev, "Double Pixel Data (DPD) mode is only valid in passive mono" - " single panel mode\n"); - if ((inf->lccr0 & LCCR0_PAS) == LCCR0_Act && + dev_warn(&dev->dev, "Double Pixel Data (DPD) mode is " + "only valid in passive mono" + " single panel mode\n"); + if ((inf->lccr0 & LCCR0_PAS) == LCCR0_Act && (inf->lccr0 & LCCR0_SDS) == LCCR0_Dual) - dev_warn(&dev->dev, "Dual panel only valid in passive mode\n"); - if ((inf->lccr0 & LCCR0_PAS) == LCCR0_Pas && - (inf->modes->upper_margin || inf->modes->lower_margin)) - dev_warn(&dev->dev, "Upper and lower margins must be 0 in passive mode\n"); + dev_warn(&dev->dev, "Dual panel only valid in passive mode\n"); + if ((inf->lccr0 & LCCR0_PAS) == LCCR0_Pas && + (inf->modes->upper_margin || inf->modes->lower_margin)) + dev_warn(&dev->dev, "Upper and lower margins must be 0 in " + "passive mode\n"); #endif - dev_dbg(&dev->dev, "got a %dx%dx%d LCD\n",inf->modes->xres, inf->modes->yres, inf->modes->bpp); - if (inf->modes->xres == 0 || inf->modes->yres == 0 || inf->modes->bpp == 0) { + dev_dbg(&dev->dev, "got a %dx%dx%d LCD\n", + inf->modes->xres, + inf->modes->yres, + inf->modes->bpp); + if (inf->modes->xres == 0 || + inf->modes->yres == 0 || + inf->modes->bpp == 0) { dev_err(&dev->dev, "Invalid resolution or bit depth\n"); ret = -EINVAL; goto failed; @@ -1416,26 +1674,62 @@ static int __init pxafb_probe(struct platform_device *dev) pxafb_lcd_power = inf->pxafb_lcd_power; fbi = pxafb_init_fbinfo(&dev->dev); if (!fbi) { + /* only reason for pxafb_init_fbinfo to fail is kmalloc */ dev_err(&dev->dev, "Failed to initialize framebuffer device\n"); - ret = -ENOMEM; // only reason for pxafb_init_fbinfo to fail is kmalloc + ret = -ENOMEM; goto failed; } + r = platform_get_resource(dev, IORESOURCE_MEM, 0); + if (r == NULL) { + dev_err(&dev->dev, "no I/O memory resource defined\n"); + ret = -ENODEV; + goto failed; + } + + r = request_mem_region(r->start, r->end - r->start + 1, dev->name); + if (r == NULL) { + dev_err(&dev->dev, "failed to request I/O memory\n"); + ret = -EBUSY; + goto failed; + } + + fbi->mmio_base = ioremap(r->start, r->end - r->start + 1); + if (fbi->mmio_base == NULL) { + dev_err(&dev->dev, "failed to map I/O memory\n"); + ret = -EBUSY; + goto failed_free_res; + } + /* Initialize video memory */ ret = pxafb_map_video_memory(fbi); if (ret) { dev_err(&dev->dev, "Failed to allocate video RAM: %d\n", ret); ret = -ENOMEM; - goto failed; + goto failed_free_io; + } + + irq = platform_get_irq(dev, 0); + if (irq < 0) { + dev_err(&dev->dev, "no IRQ defined\n"); + ret = -ENODEV; + goto failed_free_mem; } - ret = request_irq(IRQ_LCD, pxafb_handle_irq, IRQF_DISABLED, "LCD", fbi); + ret = request_irq(irq, pxafb_handle_irq, IRQF_DISABLED, "LCD", fbi); if (ret) { dev_err(&dev->dev, "request_irq failed: %d\n", ret); ret = -EBUSY; - goto failed; + goto failed_free_mem; } +#ifdef CONFIG_FB_PXA_SMARTPANEL + ret = pxafb_smart_init(fbi); + if (ret) { + dev_err(&dev->dev, "failed to initialize smartpanel\n"); + goto failed_free_irq; + } +#endif /* * This makes sure that our colour bitfield * descriptors are correctly initialised. @@ -1447,19 +1741,18 @@ static int __init pxafb_probe(struct platform_device *dev) ret = register_framebuffer(&fbi->fb); if (ret < 0) { - dev_err(&dev->dev, "Failed to register framebuffer device: %d\n", ret); - goto failed; + dev_err(&dev->dev, + "Failed to register framebuffer device: %d\n", ret); + goto failed_free_irq; } -#ifdef CONFIG_PM - // TODO -#endif - #ifdef CONFIG_CPU_FREQ fbi->freq_transition.notifier_call = pxafb_freq_transition; fbi->freq_policy.notifier_call = pxafb_freq_policy; - cpufreq_register_notifier(&fbi->freq_transition, CPUFREQ_TRANSITION_NOTIFIER); - cpufreq_register_notifier(&fbi->freq_policy, CPUFREQ_POLICY_NOTIFIER); + cpufreq_register_notifier(&fbi->freq_transition, + CPUFREQ_TRANSITION_NOTIFIER); + cpufreq_register_notifier(&fbi->freq_policy, + CPUFREQ_POLICY_NOTIFIER); #endif /* @@ -1469,6 +1762,15 @@ static int __init pxafb_probe(struct platform_device *dev) return 0; +failed_free_irq: + free_irq(irq, fbi); +failed_free_res: + release_mem_region(r->start, r->end - r->start + 1); +failed_free_io: + iounmap(fbi->mmio_base); +failed_free_mem: + dma_free_writecombine(&dev->dev, fbi->map_size, + fbi->map_cpu, fbi->map_dma); failed: platform_set_drvdata(dev, NULL); kfree(fbi); @@ -1477,40 +1779,18 @@ failed: static struct platform_driver pxafb_driver = { .probe = pxafb_probe, -#ifdef CONFIG_PM .suspend = pxafb_suspend, .resume = pxafb_resume, -#endif .driver = { .name = "pxa2xx-fb", }, }; -#ifndef MODULE -static int __devinit pxafb_setup(char *options) -{ -# ifdef CONFIG_FB_PXA_PARAMETERS - if (options) - strlcpy(g_options, options, sizeof(g_options)); -# endif - return 0; -} -#else -# ifdef CONFIG_FB_PXA_PARAMETERS -module_param_string(options, g_options, sizeof(g_options), 0); -MODULE_PARM_DESC(options, "LCD parameters (see Documentation/fb/pxafb.txt)"); -# endif -#endif - static int __devinit pxafb_init(void) { -#ifndef MODULE - char *option = NULL; + if (pxafb_setup_options()) + return -EINVAL; - if (fb_get_options("pxafb", &option)) - return -ENODEV; - pxafb_setup(option); -#endif return platform_driver_register(&pxafb_driver); } diff --git a/drivers/video/pxafb.h b/drivers/video/pxafb.h index d920b8a14c35..8238dc826429 100644 --- a/drivers/video/pxafb.h +++ b/drivers/video/pxafb.h @@ -21,14 +21,6 @@ * for more details. */ -/* Shadows for LCD controller registers */ -struct pxafb_lcd_reg { - unsigned int lccr0; - unsigned int lccr1; - unsigned int lccr2; - unsigned int lccr3; -}; - /* PXA LCD DMA descriptor */ struct pxafb_dma_descriptor { unsigned int fdadr; @@ -37,11 +29,49 @@ struct pxafb_dma_descriptor { unsigned int ldcmd; }; +enum { + PAL_NONE = -1, + PAL_BASE = 0, + PAL_OV1 = 1, + PAL_OV2 = 2, + PAL_MAX, +}; + +enum { + DMA_BASE = 0, + DMA_UPPER = 0, + DMA_LOWER = 1, + DMA_OV1 = 1, + DMA_OV2_Y = 2, + DMA_OV2_Cb = 3, + DMA_OV2_Cr = 4, + DMA_CURSOR = 5, + DMA_CMD = 6, + DMA_MAX, +}; + +/* maximum palette size - 256 entries, each 4 bytes long */ +#define PALETTE_SIZE (256 * 4) +#define CMD_BUFF_SIZE (1024 * 50) + +struct pxafb_dma_buff { + unsigned char palette[PAL_MAX * PALETTE_SIZE]; + uint16_t cmd_buff[CMD_BUFF_SIZE]; + struct pxafb_dma_descriptor pal_desc[PAL_MAX]; + struct pxafb_dma_descriptor dma_desc[DMA_MAX]; +}; + struct pxafb_info { struct fb_info fb; struct device *dev; struct clk *clk; + void __iomem *mmio_base; + + struct pxafb_dma_buff *dma_buff; + dma_addr_t dma_buff_phys; + dma_addr_t fdadr[DMA_MAX]; + /* * These are the addresses we mapped * the framebuffer memory region to. @@ -55,19 +85,8 @@ struct pxafb_info { u_char * screen_cpu; /* virtual address of frame buffer */ dma_addr_t screen_dma; /* physical address of frame buffer */ u16 * palette_cpu; /* virtual address of palette memory */ - dma_addr_t palette_dma; /* physical address of palette memory */ u_int palette_size; - - /* DMA descriptors */ - struct pxafb_dma_descriptor * dmadesc_fblow_cpu; - dma_addr_t dmadesc_fblow_dma; - struct pxafb_dma_descriptor * dmadesc_fbhigh_cpu; - dma_addr_t dmadesc_fbhigh_dma; - struct pxafb_dma_descriptor * dmadesc_palette_cpu; - dma_addr_t dmadesc_palette_dma; - - dma_addr_t fdadr0; - dma_addr_t fdadr1; + ssize_t video_offset; u_int lccr0; u_int lccr3; @@ -81,6 +100,7 @@ struct pxafb_info { u_int reg_lccr2; u_int reg_lccr3; u_int reg_lccr4; + u_int reg_cmdcr; unsigned long hsync_time; @@ -90,6 +110,16 @@ struct pxafb_info { wait_queue_head_t ctrlr_wait; struct work_struct task; + struct completion disable_done; + +#ifdef CONFIG_FB_PXA_SMARTPANEL + uint16_t *smart_cmds; + size_t n_smart_cmds; + struct completion command_done; + struct completion refresh_done; + struct task_struct *smart_thread; +#endif + #ifdef CONFIG_CPU_FREQ struct notifier_block freq_transition; struct notifier_block freq_policy; diff --git a/drivers/video/sbuslib.c b/drivers/video/sbuslib.c index 4deaac05b938..37d764ad56b0 100644 --- a/drivers/video/sbuslib.c +++ b/drivers/video/sbuslib.c @@ -10,18 +10,19 @@ #include <linux/fb.h> #include <linux/mm.h> #include <linux/uaccess.h> +#include <linux/of_device.h> -#include <asm/oplib.h> #include <asm/fbio.h> #include "sbuslib.h" -void sbusfb_fill_var(struct fb_var_screeninfo *var, int prom_node, int bpp) +void sbusfb_fill_var(struct fb_var_screeninfo *var, struct device_node *dp, + int bpp) { memset(var, 0, sizeof(*var)); - var->xres = prom_getintdefault(prom_node, "width", 1152); - var->yres = prom_getintdefault(prom_node, "height", 900); + var->xres = of_getintprop_default(dp, "width", 1152); + var->yres = of_getintprop_default(dp, "height", 900); var->xres_virtual = var->xres; var->yres_virtual = var->yres; var->bits_per_pixel = bpp; diff --git a/drivers/video/sbuslib.h b/drivers/video/sbuslib.h index 492828c3fe8f..7ba3250236bd 100644 --- a/drivers/video/sbuslib.h +++ b/drivers/video/sbuslib.h @@ -11,7 +11,8 @@ struct sbus_mmap_map { #define SBUS_MMAP_FBSIZE(n) (-n) #define SBUS_MMAP_EMPTY 0x80000000 -extern void sbusfb_fill_var(struct fb_var_screeninfo *var, int prom_node, int bpp); +extern void sbusfb_fill_var(struct fb_var_screeninfo *var, + struct device_node *dp, int bpp); struct vm_area_struct; extern int sbusfb_mmap_helper(struct sbus_mmap_map *map, unsigned long physbase, unsigned long fbsize, @@ -21,6 +22,6 @@ int sbusfb_ioctl_helper(unsigned long cmd, unsigned long arg, struct fb_info *info, int type, int fb_depth, unsigned long fb_size); int sbusfb_compat_ioctl(struct fb_info *info, unsigned int cmd, - unsigned long arg); + unsigned long arg); #endif /* _SBUSLIB_H */ diff --git a/drivers/video/sunxvr2500.c b/drivers/video/sunxvr2500.c index c3869a96ab58..b1dde09e7015 100644 --- a/drivers/video/sunxvr2500.c +++ b/drivers/video/sunxvr2500.c @@ -9,10 +9,9 @@ #include <linux/fb.h> #include <linux/pci.h> #include <linux/init.h> +#include <linux/of_device.h> #include <asm/io.h> -#include <asm/prom.h> -#include <asm/of_device.h> struct s3d_info { struct fb_info *info; diff --git a/drivers/video/sunxvr500.c b/drivers/video/sunxvr500.c index 71bf3f1f00bc..c2ba51b7ea18 100644 --- a/drivers/video/sunxvr500.c +++ b/drivers/video/sunxvr500.c @@ -9,10 +9,9 @@ #include <linux/fb.h> #include <linux/pci.h> #include <linux/init.h> +#include <linux/of_device.h> #include <asm/io.h> -#include <asm/prom.h> -#include <asm/of_device.h> /* XXX This device has a 'dev-comm' property which aparently is * XXX a pointer into the openfirmware's address space which is diff --git a/drivers/video/tcx.c b/drivers/video/tcx.c index a71774305772..2a03f78bbb0d 100644 --- a/drivers/video/tcx.c +++ b/drivers/video/tcx.c @@ -17,10 +17,9 @@ #include <linux/init.h> #include <linux/fb.h> #include <linux/mm.h> +#include <linux/of_device.h> #include <asm/io.h> -#include <asm/prom.h> -#include <asm/of_device.h> #include <asm/fbio.h> #include "sbuslib.h" @@ -84,7 +83,7 @@ struct tcx_tec { struct tcx_thc { u32 thc_rev; - u32 thc_pad0[511]; + u32 thc_pad0[511]; u32 thc_hs; /* hsync timing */ u32 thc_hsdvs; u32 thc_hd; @@ -126,10 +125,10 @@ struct tcx_par { }; /* Reset control plane so that WID is 8-bit plane. */ -static void __tcx_set_control_plane (struct tcx_par *par) +static void __tcx_set_control_plane(struct tcx_par *par) { u32 __iomem *p, *pend; - + if (par->lowdepth) return; @@ -143,8 +142,8 @@ static void __tcx_set_control_plane (struct tcx_par *par) sbus_writel(tmp, p); } } - -static void tcx_reset (struct fb_info *info) + +static void tcx_reset(struct fb_info *info) { struct tcx_par *par = (struct tcx_par *) info->par; unsigned long flags; @@ -365,7 +364,8 @@ static void tcx_unmap_regs(struct of_device *op, struct fb_info *info, info->screen_base, par->fbsize); } -static int __devinit tcx_init_one(struct of_device *op) +static int __devinit tcx_probe(struct of_device *op, + const struct of_device_id *match) { struct device_node *dp = op->node; struct fb_info *info; @@ -384,7 +384,7 @@ static int __devinit tcx_init_one(struct of_device *op) par->lowdepth = (of_find_property(dp, "tcx-8-bit", NULL) != NULL); - sbusfb_fill_var(&info->var, dp->node, 8); + sbusfb_fill_var(&info->var, dp, 8); info->var.red.length = 8; info->var.green.length = 8; info->var.blue.length = 8; @@ -488,13 +488,6 @@ out_err: return err; } -static int __devinit tcx_probe(struct of_device *dev, const struct of_device_id *match) -{ - struct of_device *op = to_of_device(&dev->dev); - - return tcx_init_one(op); -} - static int __devexit tcx_remove(struct of_device *op) { struct fb_info *info = dev_get_drvdata(&op->dev); diff --git a/drivers/video/tridentfb.c b/drivers/video/tridentfb.c index bd54cd0de39a..beefab2992c0 100644 --- a/drivers/video/tridentfb.c +++ b/drivers/video/tridentfb.c @@ -27,7 +27,6 @@ #define VERSION "0.7.8-NEWAPI" struct tridentfb_par { - int vclk; /* in MHz */ void __iomem *io_virt; /* iospace virtual memory address */ }; @@ -669,27 +668,26 @@ static void set_screen_start(int base) (read3X4(CRTHiOrd) & 0xF8) | ((base & 0xE0000) >> 17)); } -/* Use 20.12 fixed-point for NTSC value and frequency calculation */ -#define calc_freq(n, m, k) ( ((unsigned long)0xE517 * (n + 8) / ((m + 2) * (1 << k))) >> 12 ) - /* Set dotclock frequency */ -static void set_vclk(int freq) +static void set_vclk(unsigned long freq) { int m, n, k; - int f, fi, d, di; + unsigned long f, fi, d, di; unsigned char lo = 0, hi = 0; - d = 20; + d = 20000; for (k = 2; k >= 0; k--) for (m = 0; m < 63; m++) for (n = 0; n < 128; n++) { - fi = calc_freq(n, m, k); + fi = ((14318l * (n + 8)) / (m + 2)) >> k; if ((di = abs(fi - freq)) < d) { d = di; f = fi; lo = n; hi = (k << 6) | m; } + if (fi > freq) + break; } if (chip3D) { write3C4(ClockHigh, hi); @@ -888,6 +886,8 @@ static int tridentfb_set_par(struct fb_info *info) struct fb_var_screeninfo *var = &info->var; int bpp = var->bits_per_pixel; unsigned char tmp; + unsigned long vclk; + debug("enter\n"); hdispend = var->xres / 8 - 1; hsyncstart = (var->xres + var->right_margin) / 8; @@ -905,7 +905,6 @@ static int tridentfb_set_par(struct fb_info *info) vblankstart = var->yres; vblankend = vtotal + 2; - enable_mmio(); crtc_unlock(); write3CE(CyberControl, 8); @@ -1015,11 +1014,11 @@ static int tridentfb_set_par(struct fb_info *info) write3X4(Performance, 0x92); write3X4(PCIReg, 0x07); /* MMIO & PCI read and write burst enable */ - /* convert from picoseconds to MHz */ - par->vclk = 1000000 / info->var.pixclock; + /* convert from picoseconds to kHz */ + vclk = PICOS2KHZ(info->var.pixclock); if (bpp == 32) - par->vclk *= 2; - set_vclk(par->vclk); + vclk *= 2; + set_vclk(vclk); write3C4(0, 3); write3C4(1, 1); /* set char clock 8 dots wide */ |