diff options
Diffstat (limited to 'drivers/ide/pci')
-rw-r--r-- | drivers/ide/pci/aec62xx.c | 119 | ||||
-rw-r--r-- | drivers/ide/pci/alim15x3.c | 80 | ||||
-rw-r--r-- | drivers/ide/pci/amd74xx.c | 145 | ||||
-rw-r--r-- | drivers/ide/pci/atiixp.c | 5 | ||||
-rw-r--r-- | drivers/ide/pci/cmd64x.c | 139 | ||||
-rw-r--r-- | drivers/ide/pci/cs5530.c | 2 | ||||
-rw-r--r-- | drivers/ide/pci/cs5535.c | 6 | ||||
-rw-r--r-- | drivers/ide/pci/generic.c | 37 | ||||
-rw-r--r-- | drivers/ide/pci/hpt366.c | 201 | ||||
-rw-r--r-- | drivers/ide/pci/it8213.c | 8 | ||||
-rw-r--r-- | drivers/ide/pci/it821x.c | 44 | ||||
-rw-r--r-- | drivers/ide/pci/jmicron.c | 20 | ||||
-rw-r--r-- | drivers/ide/pci/pdc202xx_new.c | 19 | ||||
-rw-r--r-- | drivers/ide/pci/pdc202xx_old.c | 35 | ||||
-rw-r--r-- | drivers/ide/pci/piix.c | 51 | ||||
-rw-r--r-- | drivers/ide/pci/scc_pata.c | 2 | ||||
-rw-r--r-- | drivers/ide/pci/serverworks.c | 103 | ||||
-rw-r--r-- | drivers/ide/pci/sgiioc4.c | 20 | ||||
-rw-r--r-- | drivers/ide/pci/siimage.c | 18 | ||||
-rw-r--r-- | drivers/ide/pci/sis5513.c | 43 | ||||
-rw-r--r-- | drivers/ide/pci/sl82c105.c | 24 | ||||
-rw-r--r-- | drivers/ide/pci/slc90e66.c | 5 | ||||
-rw-r--r-- | drivers/ide/pci/tc86c001.c | 4 | ||||
-rw-r--r-- | drivers/ide/pci/via82cxxx.c | 184 |
24 files changed, 649 insertions, 665 deletions
diff --git a/drivers/ide/pci/aec62xx.c b/drivers/ide/pci/aec62xx.c index b173bc66ce1e..e5d09367627e 100644 --- a/drivers/ide/pci/aec62xx.c +++ b/drivers/ide/pci/aec62xx.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/aec62xx.c Version 0.21 Apr 21, 2007 + * linux/drivers/ide/pci/aec62xx.c Version 0.24 May 24, 2007 * * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org> * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com> @@ -140,25 +140,10 @@ static int aec6260_tune_chipset (ide_drive_t *drive, u8 xferspeed) return(ide_config_drive_speed(drive, speed)); } -static int aec62xx_tune_chipset (ide_drive_t *drive, u8 speed) -{ - switch (HWIF(drive)->pci_dev->device) { - case PCI_DEVICE_ID_ARTOP_ATP865: - case PCI_DEVICE_ID_ARTOP_ATP865R: - case PCI_DEVICE_ID_ARTOP_ATP860: - case PCI_DEVICE_ID_ARTOP_ATP860R: - return ((int) aec6260_tune_chipset(drive, speed)); - case PCI_DEVICE_ID_ARTOP_ATP850UF: - return ((int) aec6210_tune_chipset(drive, speed)); - default: - return -1; - } -} - static void aec62xx_tune_drive (ide_drive_t *drive, u8 pio) { pio = ide_get_best_pio_mode(drive, pio, 4, NULL); - (void) aec62xx_tune_chipset(drive, pio + XFER_PIO_0); + (void) HWIF(drive)->speedproc(drive, pio + XFER_PIO_0); } static int aec62xx_config_drive_xfer_rate (ide_drive_t *drive) @@ -172,12 +157,9 @@ static int aec62xx_config_drive_xfer_rate (ide_drive_t *drive) return -1; } -static int aec62xx_irq_timeout (ide_drive_t *drive) +static void aec62xx_dma_lost_irq (ide_drive_t *drive) { - ide_hwif_t *hwif = HWIF(drive); - struct pci_dev *dev = hwif->pci_dev; - - switch(dev->device) { + switch (HWIF(drive)->pci_dev->device) { case PCI_DEVICE_ID_ARTOP_ATP860: case PCI_DEVICE_ID_ARTOP_ATP860R: case PCI_DEVICE_ID_ARTOP_ATP865: @@ -186,7 +168,6 @@ static int aec62xx_irq_timeout (ide_drive_t *drive) default: break; } - return 0; } static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const char *name) @@ -224,64 +205,46 @@ static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const ch static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif) { - struct pci_dev *dev = hwif->pci_dev; + struct pci_dev *dev = hwif->pci_dev; + u8 reg54 = 0, mask = hwif->channel ? 0xf0 : 0x0f; + unsigned long flags; - hwif->autodma = 0; hwif->tuneproc = &aec62xx_tune_drive; - hwif->speedproc = &aec62xx_tune_chipset; - if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) - hwif->serialized = hwif->channel; - - if (hwif->mate) - hwif->mate->serialized = hwif->serialized; + if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) { + if(hwif->mate) + hwif->mate->serialized = hwif->serialized = 1; + hwif->speedproc = &aec6210_tune_chipset; + } else + hwif->speedproc = &aec6260_tune_chipset; if (!hwif->dma_base) { - hwif->drives[0].autotune = 1; - hwif->drives[1].autotune = 1; + hwif->drives[0].autotune = hwif->drives[1].autotune = 1; return; } hwif->ultra_mask = hwif->cds->udma_mask; - - /* atp865 and atp865r */ - if (hwif->ultra_mask == 0x3f) { - /* check bit 0x10 of DMA status register */ - if (inb(pci_resource_start(dev, 4) + 2) & 0x10) - hwif->ultra_mask = 0x7f; /* udma0-6 */ - } - hwif->mwdma_mask = 0x07; hwif->ide_dma_check = &aec62xx_config_drive_xfer_rate; - hwif->ide_dma_lostirq = &aec62xx_irq_timeout; - - if (!noautodma) - hwif->autodma = 1; - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; -} - -static void __devinit init_dma_aec62xx(ide_hwif_t *hwif, unsigned long dmabase) -{ - struct pci_dev *dev = hwif->pci_dev; + hwif->dma_lost_irq = &aec62xx_dma_lost_irq; if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) { - u8 reg54h = 0; - unsigned long flags; - spin_lock_irqsave(&ide_lock, flags); - pci_read_config_byte(dev, 0x54, ®54h); - pci_write_config_byte(dev, 0x54, reg54h & ~(hwif->channel ? 0xF0 : 0x0F)); + pci_read_config_byte (dev, 0x54, ®54); + pci_write_config_byte(dev, 0x54, (reg54 & ~mask)); spin_unlock_irqrestore(&ide_lock, flags); - } else { - u8 ata66 = 0; + } else if (hwif->cbl != ATA_CBL_PATA40_SHORT) { + u8 ata66 = 0, mask = hwif->channel ? 0x02 : 0x01; + pci_read_config_byte(hwif->pci_dev, 0x49, &ata66); - if (!(hwif->udma_four)) - hwif->udma_four = (ata66&(hwif->channel?0x02:0x01))?0:1; + + hwif->cbl = (ata66 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; } - ide_setup_dma(hwif, dmabase, 8); + if (!noautodma) + hwif->autodma = 1; + hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma; } static int __devinit init_setup_aec62xx(struct pci_dev *dev, ide_pci_device_t *d) @@ -291,16 +254,12 @@ static int __devinit init_setup_aec62xx(struct pci_dev *dev, ide_pci_device_t *d static int __devinit init_setup_aec6x80(struct pci_dev *dev, ide_pci_device_t *d) { - unsigned long bar4reg = pci_resource_start(dev, 4); - - if (inb(bar4reg+2) & 0x10) { - strcpy(d->name, "AEC6880"); - if (dev->device == PCI_DEVICE_ID_ARTOP_ATP865R) - strcpy(d->name, "AEC6880R"); - } else { - strcpy(d->name, "AEC6280"); - if (dev->device == PCI_DEVICE_ID_ARTOP_ATP865R) - strcpy(d->name, "AEC6280R"); + unsigned long dma_base = pci_resource_start(dev, 4); + + if (inb(dma_base + 2) & 0x10) { + d->name = (dev->device == PCI_DEVICE_ID_ARTOP_ATP865R) ? + "AEC6880R" : "AEC6880"; + d->udma_mask = 0x7f; /* udma0-6 */ } return ide_setup_pci_device(dev, d); @@ -312,7 +271,6 @@ static ide_pci_device_t aec62xx_chipsets[] __devinitdata = { .init_setup = init_setup_aec62xx, .init_chipset = init_chipset_aec62xx, .init_hwif = init_hwif_aec62xx, - .init_dma = init_dma_aec62xx, .channels = 2, .autodma = AUTODMA, .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, @@ -323,7 +281,6 @@ static ide_pci_device_t aec62xx_chipsets[] __devinitdata = { .init_setup = init_setup_aec62xx, .init_chipset = init_chipset_aec62xx, .init_hwif = init_hwif_aec62xx, - .init_dma = init_dma_aec62xx, .channels = 2, .autodma = NOAUTODMA, .bootable = OFF_BOARD, @@ -333,28 +290,25 @@ static ide_pci_device_t aec62xx_chipsets[] __devinitdata = { .init_setup = init_setup_aec62xx, .init_chipset = init_chipset_aec62xx, .init_hwif = init_hwif_aec62xx, - .init_dma = init_dma_aec62xx, .channels = 2, .autodma = AUTODMA, .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, .bootable = NEVER_BOARD, .udma_mask = 0x1f, /* udma0-4 */ },{ /* 3 */ - .name = "AEC6X80", + .name = "AEC6280", .init_setup = init_setup_aec6x80, .init_chipset = init_chipset_aec62xx, .init_hwif = init_hwif_aec62xx, - .init_dma = init_dma_aec62xx, .channels = 2, .autodma = AUTODMA, .bootable = OFF_BOARD, .udma_mask = 0x3f, /* udma0-5 */ },{ /* 4 */ - .name = "AEC6X80R", + .name = "AEC6280R", .init_setup = init_setup_aec6x80, .init_chipset = init_chipset_aec62xx, .init_hwif = init_hwif_aec62xx, - .init_dma = init_dma_aec62xx, .channels = 2, .autodma = AUTODMA, .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}}, @@ -370,13 +324,16 @@ static ide_pci_device_t aec62xx_chipsets[] __devinitdata = { * * Called when the PCI registration layer (or the IDE initialization) * finds a device matching our IDE device tables. + * + * NOTE: since we're going to modify the 'name' field for AEC-6[26]80[R] + * chips, pass a local copy of 'struct pci_device_id' down the call chain. */ static int __devinit aec62xx_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - ide_pci_device_t *d = &aec62xx_chipsets[id->driver_data]; + ide_pci_device_t d = aec62xx_chipsets[id->driver_data]; - return d->init_setup(dev, d); + return d.init_setup(dev, &d); } static struct pci_device_id aec62xx_pci_tbl[] = { diff --git a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c index 27525ec2e19a..ba0fb92b0417 100644 --- a/drivers/ide/pci/alim15x3.c +++ b/drivers/ide/pci/alim15x3.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/alim15x3.c Version 0.21 2007/02/03 + * linux/drivers/ide/pci/alim15x3.c Version 0.25 Jun 9 2007 * * Copyright (C) 1998-2000 Michel Aubry, Maintainer * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer @@ -10,6 +10,7 @@ * Copyright (C) 2002 Alan Cox <alan@redhat.com> * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw> * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com> + * Copyright (C) 2007 Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> * * (U)DMA capable version of ali 1533/1543(C), 1535(D) * @@ -36,6 +37,7 @@ #include <linux/hdreg.h> #include <linux/ide.h> #include <linux/init.h> +#include <linux/dmi.h> #include <asm/io.h> @@ -506,7 +508,7 @@ static unsigned int __devinit init_chipset_ali15x3 (struct pci_dev *dev, const c u8 tmpbyte; struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0)); - pci_read_config_byte(dev, PCI_REVISION_ID, &m5229_revision); + m5229_revision = dev->revision; isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); @@ -583,6 +585,35 @@ out: return 0; } +/* + * Cable special cases + */ + +static struct dmi_system_id cable_dmi_table[] = { + { + .ident = "HP Pavilion N5430", + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), + DMI_MATCH(DMI_BOARD_NAME, "OmniBook N32N-736"), + }, + }, + { } +}; + +static int ali_cable_override(struct pci_dev *pdev) +{ + /* Fujitsu P2000 */ + if (pdev->subsystem_vendor == 0x10CF && + pdev->subsystem_device == 0x10AF) + return 1; + + /* Systems by DMI */ + if (dmi_check_system(cable_dmi_table)) + return 1; + + return 0; +} + /** * ata66_ali15x3 - check for UDMA 66 support * @hwif: IDE interface @@ -594,37 +625,31 @@ out: * FIXME: frobs bits that are not defined on newer ALi devicea */ -static unsigned int __devinit ata66_ali15x3 (ide_hwif_t *hwif) +static u8 __devinit ata66_ali15x3(ide_hwif_t *hwif) { struct pci_dev *dev = hwif->pci_dev; - unsigned int ata66 = 0; - u8 cable_80_pin[2] = { 0, 0 }; - unsigned long flags; - u8 tmpbyte; + u8 cbl = ATA_CBL_PATA40, tmpbyte; local_irq_save(flags); if (m5229_revision >= 0xC2) { /* - * Ultra66 cable detection (from Host View) - * m5229, 0x4a, bit0: primary, bit1: secondary 80 pin - */ - pci_read_config_byte(dev, 0x4a, &tmpbyte); - /* - * 0x4a, bit0 is 0 => primary channel - * has 80-pin (from host view) - */ - if (!(tmpbyte & 0x01)) cable_80_pin[0] = 1; - /* - * 0x4a, bit1 is 0 => secondary channel - * has 80-pin (from host view) - */ - if (!(tmpbyte & 0x02)) cable_80_pin[1] = 1; - /* - * Allow ata66 if cable of current channel has 80 pins + * m5229 80-pin cable detection (from Host View) + * + * 0x4a bit0 is 0 => primary channel has 80-pin + * 0x4a bit1 is 0 => secondary channel has 80-pin + * + * Certain laptops use short but suitable cables + * and don't implement the detect logic. */ - ata66 = (hwif->channel)?cable_80_pin[1]:cable_80_pin[0]; + if (ali_cable_override(dev)) + cbl = ATA_CBL_PATA40_SHORT; + else { + pci_read_config_byte(dev, 0x4a, &tmpbyte); + if ((tmpbyte & (1 << hwif->channel)) == 0) + cbl = ATA_CBL_PATA80; + } } else { /* * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010 @@ -657,7 +682,7 @@ static unsigned int __devinit ata66_ali15x3 (ide_hwif_t *hwif) local_irq_restore(flags); - return(ata66); + return cbl; } /** @@ -708,8 +733,9 @@ static void __devinit init_hwif_common_ali15x3 (ide_hwif_t *hwif) hwif->dma_setup = &ali15x3_dma_setup; if (!noautodma) hwif->autodma = 1; - if (!(hwif->udma_four)) - hwif->udma_four = ata66_ali15x3(hwif); + + if (hwif->cbl != ATA_CBL_PATA40_SHORT) + hwif->cbl = ata66_ali15x3(hwif); } hwif->drives[0].autodma = hwif->autodma; hwif->drives[1].autodma = hwif->autodma; diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c index becb1a5648b0..8d30b99a54d8 100644 --- a/drivers/ide/pci/amd74xx.c +++ b/drivers/ide/pci/amd74xx.c @@ -1,10 +1,11 @@ /* - * Version 2.13 + * Version 2.20 * * AMD 755/756/766/8111 and nVidia nForce/2/2s/3/3s/CK804/MCP04 * IDE driver for Linux. * * Copyright (c) 2000-2002 Vojtech Pavlik + * Copyright (c) 2007 Bartlomiej Zolnierkiewicz * * Based on the work of: * Andre Hedrick @@ -37,11 +38,6 @@ #define AMD_ADDRESS_SETUP (0x0c + amd_config->base) #define AMD_UDMA_TIMING (0x10 + amd_config->base) -#define AMD_UDMA 0x07 -#define AMD_UDMA_33 0x01 -#define AMD_UDMA_66 0x02 -#define AMD_UDMA_100 0x03 -#define AMD_UDMA_133 0x04 #define AMD_CHECK_SWDMA 0x08 #define AMD_BAD_SWDMA 0x10 #define AMD_BAD_FIFO 0x20 @@ -53,30 +49,33 @@ static struct amd_ide_chip { unsigned short id; - unsigned long base; - unsigned char flags; + u8 base; + u8 udma_mask; + u8 flags; } amd_ide_chips[] = { - { PCI_DEVICE_ID_AMD_COBRA_7401, 0x40, AMD_UDMA_33 | AMD_BAD_SWDMA }, - { PCI_DEVICE_ID_AMD_VIPER_7409, 0x40, AMD_UDMA_66 | AMD_CHECK_SWDMA }, - { PCI_DEVICE_ID_AMD_VIPER_7411, 0x40, AMD_UDMA_100 | AMD_BAD_FIFO }, - { PCI_DEVICE_ID_AMD_OPUS_7441, 0x40, AMD_UDMA_100 }, - { PCI_DEVICE_ID_AMD_8111_IDE, 0x40, AMD_UDMA_133 | AMD_CHECK_SERENADE }, - { PCI_DEVICE_ID_NVIDIA_NFORCE_IDE, 0x50, AMD_UDMA_100 }, - { PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE, 0x50, AMD_UDMA_133 }, - { PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE, 0x50, AMD_UDMA_133 }, - { PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA, 0x50, AMD_UDMA_133 }, - { PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE, 0x50, AMD_UDMA_133 }, - { PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE, 0x50, AMD_UDMA_133 }, - { PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA, 0x50, AMD_UDMA_133 }, - { PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2, 0x50, AMD_UDMA_133 }, - { PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE, 0x50, AMD_UDMA_133 }, - { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE, 0x50, AMD_UDMA_133 }, - { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE, 0x50, AMD_UDMA_133 }, - { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE, 0x50, AMD_UDMA_133 }, - { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE, 0x50, AMD_UDMA_133 }, - { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE, 0x50, AMD_UDMA_133 }, - { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE, 0x50, AMD_UDMA_133 }, - { PCI_DEVICE_ID_AMD_CS5536_IDE, 0x40, AMD_UDMA_100 }, + { PCI_DEVICE_ID_AMD_COBRA_7401, 0x40, ATA_UDMA2, AMD_BAD_SWDMA }, + { PCI_DEVICE_ID_AMD_VIPER_7409, 0x40, ATA_UDMA4, AMD_CHECK_SWDMA }, + { PCI_DEVICE_ID_AMD_VIPER_7411, 0x40, ATA_UDMA5, AMD_BAD_FIFO }, + { PCI_DEVICE_ID_AMD_OPUS_7441, 0x40, ATA_UDMA5, }, + { PCI_DEVICE_ID_AMD_8111_IDE, 0x40, ATA_UDMA6, AMD_CHECK_SERENADE }, + { PCI_DEVICE_ID_NVIDIA_NFORCE_IDE, 0x50, ATA_UDMA5, }, + { PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE, 0x50, ATA_UDMA6, }, + { PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE, 0x50, ATA_UDMA6, }, + { PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA, 0x50, ATA_UDMA6, }, + { PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE, 0x50, ATA_UDMA6, }, + { PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE, 0x50, ATA_UDMA6, }, + { PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA, 0x50, ATA_UDMA6, }, + { PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2, 0x50, ATA_UDMA6, }, + { PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE, 0x50, ATA_UDMA6, }, + { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE, 0x50, ATA_UDMA6, }, + { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE, 0x50, ATA_UDMA6, }, + { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE, 0x50, ATA_UDMA6, }, + { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE, 0x50, ATA_UDMA6, }, + { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE, 0x50, ATA_UDMA6, }, + { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE, 0x50, ATA_UDMA6, }, + { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE, 0x50, ATA_UDMA6, }, + { PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE, 0x50, ATA_UDMA6, }, + { PCI_DEVICE_ID_AMD_CS5536_IDE, 0x40, ATA_UDMA5, }, { 0 } }; @@ -85,7 +84,7 @@ static ide_pci_device_t *amd_chipset; static unsigned int amd_80w; static unsigned int amd_clock; -static char *amd_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100", "UDMA133" }; +static char *amd_dma[] = { "16", "25", "33", "44", "66", "100", "133" }; static unsigned char amd_cyc2udma[] = { 6, 6, 5, 4, 0, 1, 1, 2, 2, 3, 3, 3, 3, 3, 3, 7 }; /* @@ -124,9 +123,8 @@ static int amd74xx_get_info(char *buffer, char **addr, off_t offset, int count) amd_print("Driver Version: 2.13"); amd_print("South Bridge: %s", pci_name(bmide_dev)); - pci_read_config_byte(dev, PCI_REVISION_ID, &t); - amd_print("Revision: IDE %#x", t); - amd_print("Highest DMA rate: %s", amd_dma[amd_config->flags & AMD_UDMA]); + amd_print("Revision: IDE %#x", dev->revision); + amd_print("Highest DMA rate: UDMA%s", amd_dma[fls(amd_config->udma_mask) - 1]); amd_print("BM-DMA base: %#lx", amd_base); amd_print("PCI clock: %d.%dMHz", amd_clock / 1000, amd_clock / 100 % 10); @@ -219,12 +217,12 @@ static void amd_set_speed(struct pci_dev *dev, unsigned char dn, struct ide_timi pci_write_config_byte(dev, AMD_DRIVE_TIMING + (3 - dn), ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1)); - switch (amd_config->flags & AMD_UDMA) { - case AMD_UDMA_33: t = timing->udma ? (0xc0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break; - case AMD_UDMA_66: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 2, 10)]) : 0x03; break; - case AMD_UDMA_100: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 10)]) : 0x03; break; - case AMD_UDMA_133: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 15)]) : 0x03; break; - default: return; + switch (amd_config->udma_mask) { + case ATA_UDMA2: t = timing->udma ? (0xc0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break; + case ATA_UDMA4: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 2, 10)]) : 0x03; break; + case ATA_UDMA5: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 10)]) : 0x03; break; + case ATA_UDMA6: t = timing->udma ? (0xc0 | amd_cyc2udma[FIT(timing->udma, 1, 15)]) : 0x03; break; + default: return; } pci_write_config_byte(dev, AMD_UDMA_TIMING + (3 - dn), t); @@ -242,13 +240,11 @@ static int amd_set_drive(ide_drive_t *drive, u8 speed) struct ide_timing t, p; int T, UT; - if (speed != XFER_PIO_SLOW && speed != drive->current_speed) - if (ide_config_drive_speed(drive, speed)) - printk(KERN_WARNING "ide%d: Drive %d didn't accept speed setting. Oh, well.\n", - drive->dn >> 1, drive->dn & 1); + if (speed != XFER_PIO_SLOW) + ide_config_drive_speed(drive, speed); T = 1000000000 / amd_clock; - UT = T / min_t(int, max_t(int, amd_config->flags & AMD_UDMA, 1), 2); + UT = (amd_config->udma_mask == ATA_UDMA2) ? T : (T / 2); ide_timing_compute(drive, speed, &t, T, UT); @@ -277,29 +273,19 @@ static int amd_set_drive(ide_drive_t *drive, u8 speed) static void amd74xx_tune_drive(ide_drive_t *drive, u8 pio) { if (pio == 255) { - amd_set_drive(drive, ide_find_best_mode(drive, XFER_PIO | XFER_EPIO)); + amd_set_drive(drive, ide_find_best_pio_mode(drive)); return; } amd_set_drive(drive, XFER_PIO_0 + min_t(byte, pio, 5)); } -/* - * amd74xx_dmaproc() is a callback from upper layers that can do - * a lot, but we use it for DMA/PIO tuning only, delegating everything - * else to the default ide_dmaproc(). - */ - static int amd74xx_ide_dma_check(ide_drive_t *drive) { - int w80 = HWIF(drive)->udma_four; + u8 speed = ide_max_dma_mode(drive); - u8 speed = ide_find_best_mode(drive, - XFER_PIO | XFER_EPIO | XFER_MWDMA | XFER_UDMA | - ((amd_config->flags & AMD_BAD_SWDMA) ? 0 : XFER_SWDMA) | - (w80 && (amd_config->flags & AMD_UDMA) >= AMD_UDMA_66 ? XFER_UDMA_66 : 0) | - (w80 && (amd_config->flags & AMD_UDMA) >= AMD_UDMA_100 ? XFER_UDMA_100 : 0) | - (w80 && (amd_config->flags & AMD_UDMA) >= AMD_UDMA_133 ? XFER_UDMA_133 : 0)); + if (speed == 0) + speed = ide_find_best_pio_mode(drive); amd_set_drive(drive, speed); @@ -325,8 +311,7 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch */ if (amd_config->flags & AMD_CHECK_SWDMA) { - pci_read_config_byte(dev, PCI_REVISION_ID, &t); - if (t <= 7) + if (dev->revision <= 7) amd_config->flags |= AMD_BAD_SWDMA; } @@ -334,10 +319,10 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch * Check 80-wire cable presence. */ - switch (amd_config->flags & AMD_UDMA) { + switch (amd_config->udma_mask) { - case AMD_UDMA_133: - case AMD_UDMA_100: + case ATA_UDMA6: + case ATA_UDMA5: pci_read_config_byte(dev, AMD_CABLE_DETECT, &t); pci_read_config_dword(dev, AMD_UDMA_TIMING, &u); amd_80w = ((t & 0x3) ? 1 : 0) | ((t & 0xc) ? 2 : 0); @@ -349,7 +334,7 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch } break; - case AMD_UDMA_66: + case ATA_UDMA4: /* no host side cable detection */ amd_80w = 0x03; break; @@ -370,7 +355,7 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch if ((amd_config->flags & AMD_CHECK_SERENADE) && dev->subsystem_vendor == PCI_VENDOR_ID_AMD && dev->subsystem_device == PCI_DEVICE_ID_AMD_SERENADE) - amd_config->flags = AMD_UDMA_100; + amd_config->udma_mask = ATA_UDMA5; /* * Determine the system bus clock. @@ -395,8 +380,9 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev, const ch */ pci_read_config_byte(dev, PCI_REVISION_ID, &t); - printk(KERN_INFO "%s: %s (rev %02x) %s controller\n", - amd_chipset->name, pci_name(dev), t, amd_dma[amd_config->flags & AMD_UDMA]); + printk(KERN_INFO "%s: %s (rev %02x) UDMA%s controller\n", + amd_chipset->name, pci_name(dev), dev->revision, + amd_dma[fls(amd_config->udma_mask) - 1]); /* * Register /proc/ide/amd74xx entry @@ -437,12 +423,19 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif) return; hwif->atapi_dma = 1; - hwif->ultra_mask = 0x7f; - hwif->mwdma_mask = 0x07; - hwif->swdma_mask = 0x07; - if (!hwif->udma_four) - hwif->udma_four = (amd_80w >> hwif->channel) & 1; + hwif->ultra_mask = amd_config->udma_mask; + hwif->mwdma_mask = 0x07; + if ((amd_config->flags & AMD_BAD_SWDMA) == 0) + hwif->swdma_mask = 0x07; + + if (hwif->cbl != ATA_CBL_PATA40_SHORT) { + if ((amd_80w >> hwif->channel) & 1) + hwif->cbl = ATA_CBL_PATA80; + else + hwif->cbl = ATA_CBL_PATA40; + } + hwif->ide_dma_check = &amd74xx_ide_dma_check; if (!noautodma) hwif->autodma = 1; @@ -494,7 +487,9 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = { /* 17 */ DECLARE_NV_DEV("NFORCE-MCP61"), /* 18 */ DECLARE_NV_DEV("NFORCE-MCP65"), /* 19 */ DECLARE_NV_DEV("NFORCE-MCP67"), - /* 20 */ DECLARE_AMD_DEV("AMD5536"), + /* 20 */ DECLARE_NV_DEV("NFORCE-MCP73"), + /* 21 */ DECLARE_NV_DEV("NFORCE-MCP77"), + /* 22 */ DECLARE_AMD_DEV("AMD5536"), }; static int __devinit amd74xx_probe(struct pci_dev *dev, const struct pci_device_id *id) @@ -534,7 +529,9 @@ static struct pci_device_id amd74xx_pci_tbl[] = { { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 17 }, { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 18 }, { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 19 }, - { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 20 }, + { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 20 }, + { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 21 }, + { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 22 }, { 0, }, }; MODULE_DEVICE_TABLE(pci, amd74xx_pci_tbl); diff --git a/drivers/ide/pci/atiixp.c b/drivers/ide/pci/atiixp.c index 8ab33faf6f76..2761510309b3 100644 --- a/drivers/ide/pci/atiixp.c +++ b/drivers/ide/pci/atiixp.c @@ -264,10 +264,11 @@ static void __devinit init_hwif_atiixp(ide_hwif_t *hwif) hwif->swdma_mask = 0x04; pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ch, &udma_mode); + if ((udma_mode & 0x07) >= 0x04 || (udma_mode & 0x70) >= 0x40) - hwif->udma_four = 1; + hwif->cbl = ATA_CBL_PATA80; else - hwif->udma_four = 0; + hwif->cbl = ATA_CBL_PATA40; hwif->dma_host_on = &atiixp_dma_host_on; hwif->dma_host_off = &atiixp_dma_host_off; diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c index 7c57dc696f52..1e89dd6e5bbf 100644 --- a/drivers/ide/pci/cmd64x.c +++ b/drivers/ide/pci/cmd64x.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/cmd64x.c Version 1.47 Mar 19, 2007 + * linux/drivers/ide/pci/cmd64x.c Version 1.50 May 10, 2007 * * cmd64x.c: Enable interrupts at initialization time on Ultra/PCI machines. * Due to massive hardware bugs, UltraDMA is only supported @@ -52,9 +52,6 @@ #define ARTTIM23_DIS_RA2 0x04 #define ARTTIM23_DIS_RA3 0x08 #define ARTTIM23_INTR_CH1 0x10 -#define ARTTIM2 0x57 -#define ARTTIM3 0x57 -#define DRWTIM23 0x58 #define DRWTIM2 0x58 #define BRST 0x59 #define DRWTIM3 0x5b @@ -91,7 +88,6 @@ static char * print_cmd64x_get_info (char *buf, struct pci_dev *dev, int index) u8 reg72 = 0, reg73 = 0; /* primary */ u8 reg7a = 0, reg7b = 0; /* secondary */ u8 reg50 = 1, reg51 = 1, reg57 = 0, reg71 = 0; /* extra */ - u8 rev = 0; p += sprintf(p, "\nController: %d\n", index); p += sprintf(p, "PCI-%x Chipset.\n", dev->device); @@ -106,9 +102,8 @@ static char * print_cmd64x_get_info (char *buf, struct pci_dev *dev, int index) (void) pci_read_config_byte(dev, UDIDETCR1, ®7b); /* PCI0643/6 originally didn't have the primary channel enable bit */ - (void) pci_read_config_byte(dev, PCI_REVISION_ID, &rev); if ((dev->device == PCI_DEVICE_ID_CMD_643) || - (dev->device == PCI_DEVICE_ID_CMD_646 && rev < 3)) + (dev->device == PCI_DEVICE_ID_CMD_646 && dev->revision < 3)) reg51 |= CNTRL_ENA_1ST; p += sprintf(p, "---------------- Primary Channel " @@ -469,71 +464,43 @@ static int cmd646_1_ide_dma_end (ide_drive_t *drive) static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const char *name) { - u32 class_rev = 0; u8 mrdmode = 0; - pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); - class_rev &= 0xff; + if (dev->device == PCI_DEVICE_ID_CMD_646) { + u8 rev = 0; - switch(dev->device) { - case PCI_DEVICE_ID_CMD_643: - break; - case PCI_DEVICE_ID_CMD_646: - printk(KERN_INFO "%s: chipset revision 0x%02X, ", name, class_rev); - switch(class_rev) { - case 0x07: - case 0x05: - printk("UltraDMA Capable"); - break; - case 0x03: - printk("MultiWord DMA Force Limited"); - break; - case 0x01: - default: - printk("MultiWord DMA Limited, IRQ workaround enabled"); - break; - } - printk("\n"); - break; - case PCI_DEVICE_ID_CMD_648: - case PCI_DEVICE_ID_CMD_649: + pci_read_config_byte(dev, PCI_REVISION_ID, &rev); + + switch (rev) { + case 0x07: + case 0x05: + printk("%s: UltraDMA capable", name); break; + case 0x03: default: + printk("%s: MultiWord DMA force limited", name); + break; + case 0x01: + printk("%s: MultiWord DMA limited, " + "IRQ workaround enabled\n", name); break; + } } /* Set a good latency timer and cache line size value. */ (void) pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64); /* FIXME: pci_set_master() to ensure a good latency timer value */ - /* Setup interrupts. */ - (void) pci_read_config_byte(dev, MRDMODE, &mrdmode); - mrdmode &= ~(0x30); - (void) pci_write_config_byte(dev, MRDMODE, mrdmode); - - /* Use MEMORY READ LINE for reads. - * NOTE: Although not mentioned in the PCI0646U specs, - * these bits are write only and won't be read - * back as set or not. The PCI0646U2 specs clarify - * this point. + /* + * Enable interrupts, select MEMORY READ LINE for reads. + * + * NOTE: although not mentioned in the PCI0646U specs, + * bits 0-1 are write only and won't be read back as + * set or not -- PCI0646U2 specs clarify this point. */ - (void) pci_write_config_byte(dev, MRDMODE, mrdmode | 0x02); - - /* Set reasonable active/recovery/address-setup values. */ - (void) pci_write_config_byte(dev, ARTTIM0, 0x40); - (void) pci_write_config_byte(dev, DRWTIM0, 0x3f); - (void) pci_write_config_byte(dev, ARTTIM1, 0x40); - (void) pci_write_config_byte(dev, DRWTIM1, 0x3f); -#ifdef __i386__ - (void) pci_write_config_byte(dev, ARTTIM23, 0x1c); -#else - (void) pci_write_config_byte(dev, ARTTIM23, 0x5c); -#endif - (void) pci_write_config_byte(dev, DRWTIM23, 0x3f); - (void) pci_write_config_byte(dev, DRWTIM3, 0x3f); -#ifdef CONFIG_PPC - (void) pci_write_config_byte(dev, UDIDETCR0, 0xf0); -#endif /* CONFIG_PPC */ + (void) pci_read_config_byte (dev, MRDMODE, &mrdmode); + mrdmode &= ~0x30; + (void) pci_write_config_byte(dev, MRDMODE, (mrdmode | 0x02)); #if defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_IDE_PROC_FS) @@ -548,29 +515,27 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha return 0; } -static unsigned int __devinit ata66_cmd64x(ide_hwif_t *hwif) +static u8 __devinit ata66_cmd64x(ide_hwif_t *hwif) { - u8 ata66 = 0, mask = (hwif->channel) ? 0x02 : 0x01; + struct pci_dev *dev = hwif->pci_dev; + u8 bmidecsr = 0, mask = hwif->channel ? 0x02 : 0x01; - switch(hwif->pci_dev->device) { - case PCI_DEVICE_ID_CMD_643: - case PCI_DEVICE_ID_CMD_646: - return ata66; - default: - break; + switch (dev->device) { + case PCI_DEVICE_ID_CMD_648: + case PCI_DEVICE_ID_CMD_649: + pci_read_config_byte(dev, BMIDECSR, &bmidecsr); + return (bmidecsr & mask) ? ATA_CBL_PATA80 : ATA_CBL_PATA40; + default: + return ATA_CBL_PATA40; } - pci_read_config_byte(hwif->pci_dev, BMIDECSR, &ata66); - return (ata66 & mask) ? 1 : 0; } static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) { struct pci_dev *dev = hwif->pci_dev; - unsigned int class_rev; + u8 rev = 0; - hwif->autodma = 0; - pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); - class_rev &= 0xff; + pci_read_config_byte(dev, PCI_REVISION_ID, &rev); hwif->tuneproc = &cmd64x_tune_drive; hwif->speedproc = &cmd64x_tune_chipset; @@ -580,8 +545,8 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) if (!hwif->dma_base) return; - hwif->atapi_dma = 1; - + hwif->atapi_dma = 1; + hwif->mwdma_mask = 0x07; hwif->ultra_mask = hwif->cds->udma_mask; /* @@ -596,16 +561,15 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) * * So we only do UltraDMA on revision 0x05 and 0x07 chipsets. */ - if (dev->device == PCI_DEVICE_ID_CMD_646 && class_rev < 5) + if (dev->device == PCI_DEVICE_ID_CMD_646 && rev < 5) hwif->ultra_mask = 0x00; - hwif->mwdma_mask = 0x07; - hwif->ide_dma_check = &cmd64x_config_drive_for_dma; - if (!(hwif->udma_four)) - hwif->udma_four = ata66_cmd64x(hwif); - switch(dev->device) { + if (hwif->cbl != ATA_CBL_PATA40_SHORT) + hwif->cbl = ata66_cmd64x(hwif); + + switch (dev->device) { case PCI_DEVICE_ID_CMD_648: case PCI_DEVICE_ID_CMD_649: alt_irq_bits: @@ -614,10 +578,10 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) break; case PCI_DEVICE_ID_CMD_646: hwif->chipset = ide_cmd646; - if (class_rev == 0x01) { + if (rev == 0x01) { hwif->ide_dma_end = &cmd646_1_ide_dma_end; break; - } else if (class_rev >= 0x03) + } else if (rev >= 0x03) goto alt_irq_bits; /* fall thru */ default: @@ -626,11 +590,9 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) break; } - if (!noautodma) hwif->autodma = 1; - hwif->drives[0].autodma = hwif->autodma; - hwif->drives[1].autodma = hwif->autodma; + hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma; } static int __devinit init_setup_cmd64x(struct pci_dev *dev, ide_pci_device_t *d) @@ -640,14 +602,11 @@ static int __devinit init_setup_cmd64x(struct pci_dev *dev, ide_pci_device_t *d) static int __devinit init_setup_cmd646(struct pci_dev *dev, ide_pci_device_t *d) { - u8 rev = 0; - /* * The original PCI0646 didn't have the primary channel enable bit, * it appeared starting with PCI0646U (i.e. revision ID 3). */ - pci_read_config_byte(dev, PCI_REVISION_ID, &rev); - if (rev < 3) + if (dev->revision < 3) d->enablebits[0].reg = 0; return ide_setup_pci_device(dev, d); diff --git a/drivers/ide/pci/cs5530.c b/drivers/ide/pci/cs5530.c index 1eec1f308d16..b5c00d15a704 100644 --- a/drivers/ide/pci/cs5530.c +++ b/drivers/ide/pci/cs5530.c @@ -236,7 +236,7 @@ static unsigned int __devinit init_chipset_cs5530 (struct pci_dev *dev, const ch */ pci_set_master(cs5530_0); - pci_set_mwi(cs5530_0); + pci_try_set_mwi(cs5530_0); /* * Set PCI CacheLineSize to 16-bytes: diff --git a/drivers/ide/pci/cs5535.c b/drivers/ide/pci/cs5535.c index 41925c47ef05..10f61f38243c 100644 --- a/drivers/ide/pci/cs5535.c +++ b/drivers/ide/pci/cs5535.c @@ -187,7 +187,8 @@ static u8 __devinit cs5535_cable_detect(struct pci_dev *dev) /* if a 80 wire cable was detected */ pci_read_config_byte(dev, CS5535_CABLE_DETECT, &bit); - return (bit & 1); + + return (bit & 1) ? ATA_CBL_PATA80 : ATA_CBL_PATA40; } /**** @@ -212,8 +213,7 @@ static void __devinit init_hwif_cs5535(ide_hwif_t *hwif) hwif->ultra_mask = 0x1F; hwif->mwdma_mask = 0x07; - - hwif->udma_four = cs5535_cable_detect(hwif->pci_dev); + hwif->cbl = cs5535_cable_detect(hwif->pci_dev); if (!noautodma) hwif->autodma = 1; diff --git a/drivers/ide/pci/generic.c b/drivers/ide/pci/generic.c index f2c5a141ca10..0d51a11e81da 100644 --- a/drivers/ide/pci/generic.c +++ b/drivers/ide/pci/generic.c @@ -198,32 +198,41 @@ static ide_pci_device_t generic_chipsets[] __devinitdata = { static int __devinit generic_init_one(struct pci_dev *dev, const struct pci_device_id *id) { ide_pci_device_t *d = &generic_chipsets[id->driver_data]; - u16 command; int ret = -ENODEV; /* Don't use the generic entry unless instructed to do so */ if (id->driver_data == 0 && ide_generic_all == 0) goto out; - if (dev->vendor == PCI_VENDOR_ID_UMC && - dev->device == PCI_DEVICE_ID_UMC_UM8886A && - (!(PCI_FUNC(dev->devfn) & 1))) - goto out; /* UM8886A/BF pair */ - - if (dev->vendor == PCI_VENDOR_ID_OPTI && - dev->device == PCI_DEVICE_ID_OPTI_82C558 && - (!(PCI_FUNC(dev->devfn) & 1))) - goto out; - - if (dev->vendor == PCI_VENDOR_ID_JMICRON) { - if (dev->device != PCI_DEVICE_ID_JMICRON_JMB368 && PCI_FUNC(dev->devfn) != 1) + switch (dev->vendor) { + case PCI_VENDOR_ID_UMC: + if (dev->device == PCI_DEVICE_ID_UMC_UM8886A && + !(PCI_FUNC(dev->devfn) & 1)) + goto out; /* UM8886A/BF pair */ + break; + case PCI_VENDOR_ID_OPTI: + if (dev->device == PCI_DEVICE_ID_OPTI_82C558 && + !(PCI_FUNC(dev->devfn) & 1)) + goto out; + break; + case PCI_VENDOR_ID_JMICRON: + if (dev->device != PCI_DEVICE_ID_JMICRON_JMB368 && + PCI_FUNC(dev->devfn) != 1) + goto out; + break; + case PCI_VENDOR_ID_NS: + if (dev->device == PCI_DEVICE_ID_NS_87410 && + (dev->class >> 8) != PCI_CLASS_STORAGE_IDE) goto out; + break; } if (dev->vendor != PCI_VENDOR_ID_JMICRON) { + u16 command; pci_read_config_word(dev, PCI_COMMAND, &command); if (!(command & PCI_COMMAND_IO)) { - printk(KERN_INFO "Skipping disabled %s IDE controller.\n", d->name); + printk(KERN_INFO "Skipping disabled %s IDE " + "controller.\n", d->name); goto out; } } diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c index fcbc5605b38e..e9b07a97c340 100644 --- a/drivers/ide/pci/hpt366.c +++ b/drivers/ide/pci/hpt366.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/hpt366.c Version 1.03 May 4, 2007 + * linux/drivers/ide/pci/hpt366.c Version 1.10 Jun 29, 2007 * * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org> * Portions Copyright (C) 2001 Sun Microsystems, Inc. @@ -77,7 +77,7 @@ * since they may tamper with its fields * - prefix the driver startup messages with the real chip name * - claim the extra 240 bytes of I/O space for all chips - * - optimize the rate masking/filtering and the drive list lookup code + * - optimize the UltraDMA filtering and the drive list lookup code * - use pci_get_slot() to get to the function 1 of HPT36x/374 * - cache offset of the channel's misc. control registers (MCRs) being used * throughout the driver @@ -99,18 +99,20 @@ * stop duplicating it for each channel by storing the pointer in the pci_dev * structure: first, at the init_setup stage, point it to a static "template" * with only the chip type and its specific base DPLL frequency, the highest - * supported DMA mode, and the chip settings table pointer filled, then, at - * the init_chipset stage, allocate per-chip instance and fill it with the - * rest of the necessary information + * UltraDMA mode, and the chip settings table pointer filled, then, at the + * init_chipset stage, allocate per-chip instance and fill it with the rest + * of the necessary information * - get rid of the constant thresholds in the HPT37x PCI clock detection code, * switch to calculating PCI clock frequency based on the chip's base DPLL * frequency * - switch to using the DPLL clock and enable UltraATA/133 mode by default on - * anything newer than HPT370/A + * anything newer than HPT370/A (except HPT374 that is not capable of this + * mode according to the manual) * - fold PCI clock detection and DPLL setup code into init_chipset_hpt366(), * also fixing the interchanged 25/40 MHz PCI clock cases for HPT36x chips; * unify HPT36x/37x timing setup code and the speedproc handlers by joining * the register setting lists into the table indexed by the clock selected + * - set the correct hwif->ultra_mask for each individual chip * Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com> */ @@ -181,6 +183,7 @@ static const char *bad_ata66_4[] = { "IC35L040AVER07-0", "IC35L060AVER07-0", "WDC AC310200R", + "MAXTOR STM3320620A", NULL }; @@ -365,7 +368,6 @@ static u32 sixty_six_base_hpt37x[] = { }; #define HPT366_DEBUG_DRIVE_INFO 0 -#define HPT374_ALLOW_ATA133_6 1 #define HPT371_ALLOW_ATA133_6 1 #define HPT302_ALLOW_ATA133_6 1 #define HPT372_ALLOW_ATA133_6 1 @@ -390,7 +392,7 @@ enum ata_clock { struct hpt_info { u8 chip_type; /* Chip type */ - u8 max_mode; /* Speeds allowed */ + u8 max_ultra; /* Max. UltraDMA mode allowed */ u8 dpll_clk; /* DPLL clock in MHz */ u8 pci_clk; /* PCI clock in MHz */ u32 **settings; /* Chipset settings table */ @@ -429,77 +431,77 @@ static u32 *hpt37x_settings[NUM_ATA_CLOCKS] = { static struct hpt_info hpt36x __devinitdata = { .chip_type = HPT36x, - .max_mode = (HPT366_ALLOW_ATA66_4 || HPT366_ALLOW_ATA66_3) ? 2 : 1, + .max_ultra = HPT366_ALLOW_ATA66_3 ? (HPT366_ALLOW_ATA66_4 ? 4 : 3) : 2, .dpll_clk = 0, /* no DPLL */ .settings = hpt36x_settings }; static struct hpt_info hpt370 __devinitdata = { .chip_type = HPT370, - .max_mode = HPT370_ALLOW_ATA100_5 ? 3 : 2, + .max_ultra = HPT370_ALLOW_ATA100_5 ? 5 : 4, .dpll_clk = 48, .settings = hpt37x_settings }; static struct hpt_info hpt370a __devinitdata = { .chip_type = HPT370A, - .max_mode = HPT370_ALLOW_ATA100_5 ? 3 : 2, + .max_ultra = HPT370_ALLOW_ATA100_5 ? 5 : 4, .dpll_clk = 48, .settings = hpt37x_settings }; static struct hpt_info hpt374 __devinitdata = { .chip_type = HPT374, - .max_mode = HPT374_ALLOW_ATA133_6 ? 4 : 3, + .max_ultra = 5, .dpll_clk = 48, .settings = hpt37x_settings }; static struct hpt_info hpt372 __devinitdata = { .chip_type = HPT372, - .max_mode = HPT372_ALLOW_ATA133_6 ? 4 : 3, + .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5, .dpll_clk = 55, .settings = hpt37x_settings }; static struct hpt_info hpt372a __devinitdata = { .chip_type = HPT372A, - .max_mode = HPT372_ALLOW_ATA133_6 ? 4 : 3, + .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5, .dpll_clk = 66, .settings = hpt37x_settings }; static struct hpt_info hpt302 __devinitdata = { .chip_type = HPT302, - .max_mode = HPT302_ALLOW_ATA133_6 ? 4 : 3, + .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5, .dpll_clk = 66, .settings = hpt37x_settings }; static struct hpt_info hpt371 __devinitdata = { .chip_type = HPT371, - .max_mode = HPT371_ALLOW_ATA133_6 ? 4 : 3, + .max_ultra = HPT371_ALLOW_ATA133_6 ? 6 : 5, .dpll_clk = 66, .settings = hpt37x_settings }; static struct hpt_info hpt372n __devinitdata = { .chip_type = HPT372N, - .max_mode = HPT372_ALLOW_ATA133_6 ? 4 : 3, + .max_ultra = HPT372_ALLOW_ATA133_6 ? 6 : 5, .dpll_clk = 77, .settings = hpt37x_settings }; static struct hpt_info hpt302n __devinitdata = { .chip_type = HPT302N, - .max_mode = HPT302_ALLOW_ATA133_6 ? 4 : 3, + .max_ultra = HPT302_ALLOW_ATA133_6 ? 6 : 5, .dpll_clk = 77, .settings = hpt37x_settings }; static struct hpt_info hpt371n __devinitdata = { .chip_type = HPT371N, - .max_mode = HPT371_ALLOW_ATA133_6 ? 4 : 3, + .max_ultra = HPT371_ALLOW_ATA133_6 ? 6 : 5, .dpll_clk = 77, .settings = hpt37x_settings }; @@ -522,53 +524,38 @@ static int check_in_drive_list(ide_drive_t *drive, const char **list) static u8 hpt3xx_udma_filter(ide_drive_t *drive) { struct hpt_info *info = pci_get_drvdata(HWIF(drive)->pci_dev); - u8 chip_type = info->chip_type; - u8 mode = info->max_mode; u8 mask; - switch (mode) { - case 0x04: - mask = 0x7f; - break; - case 0x03: + switch (info->chip_type) { + case HPT370A: + if (!HPT370_ALLOW_ATA100_5 || + check_in_drive_list(drive, bad_ata100_5)) + return 0x1f; + else + return 0x3f; + case HPT370: + if (!HPT370_ALLOW_ATA100_5 || + check_in_drive_list(drive, bad_ata100_5)) + mask = 0x1f; + else mask = 0x3f; - if (chip_type >= HPT374) - break; - if (!check_in_drive_list(drive, bad_ata100_5)) - goto check_bad_ata33; - /* fall thru */ - case 0x02: + break; + case HPT36x: + if (!HPT366_ALLOW_ATA66_4 || + check_in_drive_list(drive, bad_ata66_4)) + mask = 0x0f; + else mask = 0x1f; - /* - * CHECK ME, Does this need to be changed to HPT374 ?? - */ - if (chip_type >= HPT370) - goto check_bad_ata33; - if (HPT366_ALLOW_ATA66_4 && - !check_in_drive_list(drive, bad_ata66_4)) - goto check_bad_ata33; - - mask = 0x0f; - if (HPT366_ALLOW_ATA66_3 && - !check_in_drive_list(drive, bad_ata66_3)) - goto check_bad_ata33; - /* fall thru */ - case 0x01: + if (!HPT366_ALLOW_ATA66_3 || + check_in_drive_list(drive, bad_ata66_3)) mask = 0x07; - - check_bad_ata33: - if (chip_type >= HPT370A) - break; - if (!check_in_drive_list(drive, bad_ata33)) - break; - /* fall thru */ - case 0x00: - default: - mask = 0x00; - break; + break; + default: + return 0x7f; } - return mask; + + return check_in_drive_list(drive, bad_ata33) ? 0x00 : mask; } static u32 get_speed_setting(u8 speed, struct hpt_info *info) @@ -736,7 +723,7 @@ static int hpt366_config_drive_xfer_rate(ide_drive_t *drive) * This is specific to the HPT366 UDMA chipset * by HighPoint|Triones Technologies, Inc. */ -static int hpt366_ide_dma_lostirq(ide_drive_t *drive) +static void hpt366_dma_lost_irq(ide_drive_t *drive) { struct pci_dev *dev = HWIF(drive)->pci_dev; u8 mcr1 = 0, mcr3 = 0, scr1 = 0; @@ -748,7 +735,7 @@ static int hpt366_ide_dma_lostirq(ide_drive_t *drive) drive->name, __FUNCTION__, mcr1, mcr3, scr1); if (scr1 & 0x10) pci_write_config_byte(dev, 0x5a, scr1 & ~0x10); - return __ide_dma_lostirq(drive); + ide_dma_lost_irq(drive); } static void hpt370_clear_engine(ide_drive_t *drive) @@ -798,10 +785,10 @@ static int hpt370_ide_dma_end(ide_drive_t *drive) return __ide_dma_end(drive); } -static int hpt370_ide_dma_timeout(ide_drive_t *drive) +static void hpt370_dma_timeout(ide_drive_t *drive) { hpt370_irq_timeout(drive); - return __ide_dma_timeout(drive); + ide_dma_timeout(drive); } /* returns 1 if DMA IRQ issued, 0 otherwise */ @@ -1149,7 +1136,7 @@ static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev, const cha * Select 66 MHz DPLL clock only if UltraATA/133 mode is * supported/enabled, use 50 MHz DPLL clock otherwise... */ - if (info->max_mode == 0x04) { + if (info->max_ultra == 6) { dpll_clk = 66; clock = ATA_CLOCK_66MHZ; } else if (dpll_clk) { /* HPT36x chips don't have DPLL */ @@ -1242,7 +1229,7 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) struct pci_dev *dev = hwif->pci_dev; struct hpt_info *info = pci_get_drvdata(dev); int serialize = HPT_SERIALIZE_IO; - u8 scr1 = 0, ata66 = (hwif->channel) ? 0x01 : 0x02; + u8 scr1 = 0, ata66 = hwif->channel ? 0x01 : 0x02; u8 chip_type = info->chip_type; u8 new_mcr, old_mcr = 0; @@ -1255,7 +1242,9 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) hwif->intrproc = &hpt3xx_intrproc; hwif->maskproc = &hpt3xx_maskproc; hwif->busproc = &hpt3xx_busproc; - hwif->udma_filter = &hpt3xx_udma_filter; + + if (chip_type <= HPT370A) + hwif->udma_filter = &hpt3xx_udma_filter; /* * HPT3xxN chips have some complications: @@ -1304,7 +1293,7 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) return; } - hwif->ultra_mask = 0x7f; + hwif->ultra_mask = hwif->cds->udma_mask; hwif->mwdma_mask = 0x07; /* @@ -1341,8 +1330,8 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) } else pci_read_config_byte (dev, 0x5a, &scr1); - if (!hwif->udma_four) - hwif->udma_four = (scr1 & ata66) ? 0 : 1; + if (hwif->cbl != ATA_CBL_PATA40_SHORT) + hwif->cbl = (scr1 & ata66) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; hwif->ide_dma_check = &hpt366_config_drive_xfer_rate; @@ -1352,9 +1341,9 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) } else if (chip_type >= HPT370) { hwif->dma_start = &hpt370_ide_dma_start; hwif->ide_dma_end = &hpt370_ide_dma_end; - hwif->ide_dma_timeout = &hpt370_ide_dma_timeout; + hwif->dma_timeout = &hpt370_dma_timeout; } else - hwif->ide_dma_lostirq = &hpt366_ide_dma_lostirq; + hwif->dma_lost_irq = &hpt366_dma_lost_irq; if (!noautodma) hwif->autodma = 1; @@ -1424,11 +1413,9 @@ static int __devinit init_setup_hpt372n(struct pci_dev *dev, ide_pci_device_t *d static int __devinit init_setup_hpt371(struct pci_dev *dev, ide_pci_device_t *d) { struct hpt_info *info; - u8 rev = 0, mcr1 = 0; - - pci_read_config_byte(dev, PCI_REVISION_ID, &rev); + u8 mcr1 = 0; - if (rev > 1) { + if (dev->revision > 1) { d->name = "HPT371N"; info = &hpt371n; @@ -1453,11 +1440,8 @@ static int __devinit init_setup_hpt371(struct pci_dev *dev, ide_pci_device_t *d) static int __devinit init_setup_hpt372a(struct pci_dev *dev, ide_pci_device_t *d) { struct hpt_info *info; - u8 rev = 0; - pci_read_config_byte(dev, PCI_REVISION_ID, &rev); - - if (rev > 1) { + if (dev->revision > 1) { d->name = "HPT372N"; info = &hpt372n; @@ -1471,11 +1455,8 @@ static int __devinit init_setup_hpt372a(struct pci_dev *dev, ide_pci_device_t *d static int __devinit init_setup_hpt302(struct pci_dev *dev, ide_pci_device_t *d) { struct hpt_info *info; - u8 rev = 0; - - pci_read_config_byte(dev, PCI_REVISION_ID, &rev); - if (rev > 1) { + if (dev->revision > 1) { d->name = "HPT302N"; info = &hpt302n; @@ -1489,7 +1470,7 @@ static int __devinit init_setup_hpt302(struct pci_dev *dev, ide_pci_device_t *d) static int __devinit init_setup_hpt366(struct pci_dev *dev, ide_pci_device_t *d) { struct pci_dev *dev2; - u8 rev = 0; + u8 rev = dev->revision; static char *chipset_names[] = { "HPT366", "HPT366", "HPT368", "HPT370", "HPT370A", "HPT372", "HPT372N" }; @@ -1500,11 +1481,35 @@ static int __devinit init_setup_hpt366(struct pci_dev *dev, ide_pci_device_t *d) if (PCI_FUNC(dev->devfn) & 1) return -ENODEV; - pci_read_config_byte(dev, PCI_REVISION_ID, &rev); + switch (rev) { + case 0: + case 1: + case 2: + /* + * HPT36x chips have one channel per function and have + * both channel enable bits located differently and visible + * to both functions -- really stupid design decision... :-( + * Bit 4 is for the primary channel, bit 5 for the secondary. + */ + d->channels = 1; + d->enablebits[0].mask = d->enablebits[0].val = 0x10; - if (rev > 6) + d->udma_mask = HPT366_ALLOW_ATA66_3 ? + (HPT366_ALLOW_ATA66_4 ? 0x1f : 0x0f) : 0x07; + break; + case 3: + case 4: + d->udma_mask = HPT370_ALLOW_ATA100_5 ? 0x3f : 0x1f; + break; + default: rev = 6; - + /* fall thru */ + case 5: + case 6: + d->udma_mask = HPT372_ALLOW_ATA133_6 ? 0x7f : 0x3f; + break; + } + d->name = chipset_names[rev]; pci_set_drvdata(dev, info[rev]); @@ -1512,19 +1517,20 @@ static int __devinit init_setup_hpt366(struct pci_dev *dev, ide_pci_device_t *d) if (rev > 2) goto init_single; - /* - * HPT36x chips are single channel and - * do not seem to have the channel enable bit... - */ - d->channels = 1; - d->enablebits[0].reg = 0; - if ((dev2 = pci_get_slot(dev->bus, dev->devfn + 1)) != NULL) { - u8 pin1 = 0, pin2 = 0; + u8 mcr1 = 0, pin1 = 0, pin2 = 0; int ret; pci_set_drvdata(dev2, info[rev]); + /* + * Now we'll have to force both channels enabled if + * at least one of them has been enabled by BIOS... + */ + pci_read_config_byte(dev, 0x50, &mcr1); + if (mcr1 & 0x30) + pci_write_config_byte(dev, 0x50, mcr1 | 0x30); + pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin1); pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin2); if (pin1 != pin2 && dev->irq == dev2->irq) { @@ -1562,6 +1568,7 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = { .channels = 2, .autodma = AUTODMA, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, + .udma_mask = HPT372_ALLOW_ATA133_6 ? 0x7f : 0x3f, .bootable = OFF_BOARD, .extra = 240 },{ /* 2 */ @@ -1573,6 +1580,7 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = { .channels = 2, .autodma = AUTODMA, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, + .udma_mask = HPT302_ALLOW_ATA133_6 ? 0x7f : 0x3f, .bootable = OFF_BOARD, .extra = 240 },{ /* 3 */ @@ -1584,6 +1592,7 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = { .channels = 2, .autodma = AUTODMA, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, + .udma_mask = HPT371_ALLOW_ATA133_6 ? 0x7f : 0x3f, .bootable = OFF_BOARD, .extra = 240 },{ /* 4 */ @@ -1595,6 +1604,7 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = { .channels = 2, /* 4 */ .autodma = AUTODMA, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, + .udma_mask = 0x3f, .bootable = OFF_BOARD, .extra = 240 },{ /* 5 */ @@ -1606,6 +1616,7 @@ static ide_pci_device_t hpt366_chipsets[] __devinitdata = { .channels = 2, /* 4 */ .autodma = AUTODMA, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, + .udma_mask = HPT372_ALLOW_ATA133_6 ? 0x7f : 0x3f, .bootable = OFF_BOARD, .extra = 240 } diff --git a/drivers/ide/pci/it8213.c b/drivers/ide/pci/it8213.c index c04a02687b95..ff48c23e571e 100644 --- a/drivers/ide/pci/it8213.c +++ b/drivers/ide/pci/it8213.c @@ -231,7 +231,7 @@ static int it8213_config_drive_for_dma (ide_drive_t *drive) static void __devinit init_hwif_it8213(ide_hwif_t *hwif) { - u8 reg42h = 0, ata66 = 0; + u8 reg42h = 0; hwif->speedproc = &it8213_tune_chipset; hwif->tuneproc = &it8213_tuneproc; @@ -250,11 +250,11 @@ static void __devinit init_hwif_it8213(ide_hwif_t *hwif) hwif->swdma_mask = 0x04; pci_read_config_byte(hwif->pci_dev, 0x42, ®42h); - ata66 = (reg42h & 0x02) ? 0 : 1; hwif->ide_dma_check = &it8213_config_drive_for_dma; - if (!(hwif->udma_four)) - hwif->udma_four = ata66; + + if (hwif->cbl != ATA_CBL_PATA40_SHORT) + hwif->cbl = (reg42h & 0x02) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; /* * The BIOS often doesn't set up DMA on this controller diff --git a/drivers/ide/pci/it821x.c b/drivers/ide/pci/it821x.c index 5faaff87d580..8197b653ba1e 100644 --- a/drivers/ide/pci/it821x.c +++ b/drivers/ide/pci/it821x.c @@ -1,6 +1,6 @@ /* - * linux/drivers/ide/pci/it821x.c Version 0.10 Mar 10 2007 + * linux/drivers/ide/pci/it821x.c Version 0.16 Jul 3 2007 * * Copyright (C) 2004 Red Hat <alan@redhat.com> * Copyright (C) 2007 Bartlomiej Zolnierkiewicz @@ -262,7 +262,7 @@ static int it821x_tunepio(ide_drive_t *drive, u8 set_pio) } if (itdev->smart) - goto set_drive_speed; + return 0; /* We prefer 66Mhz clock for PIO 0-3, don't care for PIO4 */ itdev->want[unit][1] = pio_want[set_pio]; @@ -271,7 +271,6 @@ static int it821x_tunepio(ide_drive_t *drive, u8 set_pio) it821x_clock_strategy(drive); it821x_program(drive, itdev->pio[unit]); -set_drive_speed: return ide_config_drive_speed(drive, XFER_PIO_0 + set_pio); } @@ -455,12 +454,12 @@ static int it821x_tune_chipset (ide_drive_t *drive, byte xferspeed) default: return 1; } + + return ide_config_drive_speed(drive, speed); } - /* - * In smart mode the clocking is done by the host controller - * snooping the mode we picked. The rest of it is not our problem - */ - return ide_config_drive_speed(drive, speed); + + /* don't touch anything in the smart mode */ + return 0; } /** @@ -492,10 +491,10 @@ static int it821x_config_drive_for_dma (ide_drive_t *drive) * the needed logic onboard. */ -static unsigned int __devinit ata66_it821x(ide_hwif_t *hwif) +static u8 __devinit ata66_it821x(ide_hwif_t *hwif) { /* The reference driver also only does disk side */ - return 1; + return ATA_CBL_PATA80; } /** @@ -559,17 +558,10 @@ static void __devinit it821x_fixups(ide_hwif_t *hwif) if(idbits[129] != 1) printk("(%dK stripe)", idbits[146]); printk(".\n"); - /* Now the core code will have wrongly decided no DMA - so we need to fix this */ - hwif->dma_off_quietly(drive); -#ifdef CONFIG_IDEDMA_ONLYDISK - if (drive->media == ide_disk) -#endif - ide_set_dma(drive); } else { /* Non RAID volume. Fixups to stop the core code doing unsupported things */ - id->field_valid &= 1; + id->field_valid &= 3; id->queue_depth = 0; id->command_set_1 = 0; id->command_set_2 &= 0xC400; @@ -584,6 +576,16 @@ static void __devinit it821x_fixups(ide_hwif_t *hwif) printk(KERN_INFO "%s: Performing identify fixups.\n", drive->name); } + + /* + * Set MWDMA0 mode as enabled/support - just to tell + * IDE core that DMA is supported (it821x hardware + * takes care of DMA mode programming). + */ + if (id->capability & 1) { + id->dma_mword |= 0x0101; + drive->current_speed = XFER_MW_DMA_0; + } } } @@ -658,11 +660,11 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif) hwif->ultra_mask = 0x7f; hwif->mwdma_mask = 0x07; - hwif->swdma_mask = 0x07; hwif->ide_dma_check = &it821x_config_drive_for_dma; - if (!(hwif->udma_four)) - hwif->udma_four = ata66_it821x(hwif); + + if (hwif->cbl != ATA_CBL_PATA40_SHORT) + hwif->cbl = ata66_it821x(hwif); /* * The BIOS often doesn't set up DMA on this controller diff --git a/drivers/ide/pci/jmicron.c b/drivers/ide/pci/jmicron.c index 76ed25147229..a6008f63e71e 100644 --- a/drivers/ide/pci/jmicron.c +++ b/drivers/ide/pci/jmicron.c @@ -25,10 +25,10 @@ typedef enum { * ata66_jmicron - Cable check * @hwif: IDE port * - * Return 1 if the cable is 80pin + * Returns the cable type. */ -static int __devinit ata66_jmicron(ide_hwif_t *hwif) +static u8 __devinit ata66_jmicron(ide_hwif_t *hwif) { struct pci_dev *pdev = hwif->pci_dev; @@ -70,16 +70,17 @@ static int __devinit ata66_jmicron(ide_hwif_t *hwif) { case PORT_PATA0: if (control & (1 << 3)) /* 40/80 pin primary */ - return 0; - return 1; + return ATA_CBL_PATA40; + return ATA_CBL_PATA80; case PORT_PATA1: if (control5 & (1 << 19)) /* 40/80 pin secondary */ - return 0; - return 1; + return ATA_CBL_PATA40; + return ATA_CBL_PATA80; case PORT_SATA: break; } - return 1; /* Avoid bogus "control reaches end of non-void function" */ + /* Avoid bogus "control reaches end of non-void function" */ + return ATA_CBL_PATA80; } static void jmicron_tuneproc (ide_drive_t *drive, byte mode_wanted) @@ -159,8 +160,9 @@ static void __devinit init_hwif_jmicron(ide_hwif_t *hwif) hwif->mwdma_mask = 0x07; hwif->ide_dma_check = &jmicron_config_drive_for_dma; - if (!(hwif->udma_four)) - hwif->udma_four = ata66_jmicron(hwif); + + if (hwif->cbl != ATA_CBL_PATA40_SHORT) + hwif->cbl = ata66_jmicron(hwif); hwif->autodma = 1; hwif->drives[0].autodma = hwif->autodma; diff --git a/drivers/ide/pci/pdc202xx_new.c b/drivers/ide/pci/pdc202xx_new.c index cc0bfdcf1f19..ee5020df005d 100644 --- a/drivers/ide/pci/pdc202xx_new.c +++ b/drivers/ide/pci/pdc202xx_new.c @@ -225,7 +225,10 @@ static void pdcnew_tune_drive(ide_drive_t *drive, u8 pio) static u8 pdcnew_cable_detect(ide_hwif_t *hwif) { - return get_indexed_reg(hwif, 0x0b) & 0x04; + if (get_indexed_reg(hwif, 0x0b) & 0x04) + return ATA_CBL_PATA40; + else + return ATA_CBL_PATA80; } static int pdcnew_config_drive_xfer_rate(ide_drive_t *drive) @@ -306,11 +309,13 @@ static long __devinit read_counter(u32 dma_base) */ static long __devinit detect_pll_input_clock(unsigned long dma_base) { + struct timeval start_time, end_time; long start_count, end_count; - long pll_input; + long pll_input, usec_elapsed; u8 scr1; start_count = read_counter(dma_base); + do_gettimeofday(&start_time); /* Start the test mode */ outb(0x01, dma_base + 0x01); @@ -322,6 +327,7 @@ static long __devinit detect_pll_input_clock(unsigned long dma_base) mdelay(10); end_count = read_counter(dma_base); + do_gettimeofday(&end_time); /* Stop the test mode */ outb(0x01, dma_base + 0x01); @@ -333,7 +339,10 @@ static long __devinit detect_pll_input_clock(unsigned long dma_base) * Calculate the input clock in Hz * (the clock counter is 30 bit wide and counts down) */ - pll_input = ((start_count - end_count) & 0x3ffffff) * 100; + usec_elapsed = (end_time.tv_sec - start_time.tv_sec) * 1000000 + + (end_time.tv_usec - start_time.tv_usec); + pll_input = ((start_count - end_count) & 0x3ffffff) / 10 * + (10000000 / usec_elapsed); DBG("start[%ld] end[%ld]\n", start_count, end_count); @@ -503,8 +512,8 @@ static void __devinit init_hwif_pdc202new(ide_hwif_t *hwif) hwif->ide_dma_check = &pdcnew_config_drive_xfer_rate; - if (!hwif->udma_four) - hwif->udma_four = pdcnew_cable_detect(hwif) ? 0 : 1; + if (hwif->cbl != ATA_CBL_PATA40_SHORT) + hwif->cbl = pdcnew_cable_detect(hwif); if (!noautodma) hwif->autodma = 1; diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c index 23844687deea..41ac4a94959f 100644 --- a/drivers/ide/pci/pdc202xx_old.c +++ b/drivers/ide/pci/pdc202xx_old.c @@ -152,8 +152,10 @@ static void pdc202xx_tune_drive(ide_drive_t *drive, u8 pio) static u8 pdc202xx_old_cable_detect (ide_hwif_t *hwif) { u16 CIS = 0, mask = (hwif->channel) ? (1<<11) : (1<<10); + pci_read_config_word(hwif->pci_dev, 0x50, &CIS); - return (CIS & mask) ? 1 : 0; + + return (CIS & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; } /* @@ -267,18 +269,24 @@ somebody_else: return (dma_stat & 4) == 4; /* return 1 if INTR asserted */ } -static int pdc202xx_ide_dma_lostirq(ide_drive_t *drive) +static void pdc202xx_dma_lost_irq(ide_drive_t *drive) { - if (HWIF(drive)->resetproc != NULL) - HWIF(drive)->resetproc(drive); - return __ide_dma_lostirq(drive); + ide_hwif_t *hwif = HWIF(drive); + + if (hwif->resetproc != NULL) + hwif->resetproc(drive); + + ide_dma_lost_irq(drive); } -static int pdc202xx_ide_dma_timeout(ide_drive_t *drive) +static void pdc202xx_dma_timeout(ide_drive_t *drive) { - if (HWIF(drive)->resetproc != NULL) - HWIF(drive)->resetproc(drive); - return __ide_dma_timeout(drive); + ide_hwif_t *hwif = HWIF(drive); + + if (hwif->resetproc != NULL) + hwif->resetproc(drive); + + ide_dma_timeout(drive); } static void pdc202xx_reset_host (ide_hwif_t *hwif) @@ -347,12 +355,13 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif) hwif->err_stops_fifo = 1; hwif->ide_dma_check = &pdc202xx_config_drive_xfer_rate; - hwif->ide_dma_lostirq = &pdc202xx_ide_dma_lostirq; - hwif->ide_dma_timeout = &pdc202xx_ide_dma_timeout; + hwif->dma_lost_irq = &pdc202xx_dma_lost_irq; + hwif->dma_timeout = &pdc202xx_dma_timeout; if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246) { - if (!(hwif->udma_four)) - hwif->udma_four = (pdc202xx_old_cable_detect(hwif)) ? 0 : 1; + if (hwif->cbl != ATA_CBL_PATA40_SHORT) + hwif->cbl = pdc202xx_old_cable_detect(hwif); + hwif->dma_start = &pdc202xx_old_ide_dma_start; hwif->ide_dma_end = &pdc202xx_old_ide_dma_end; } diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c index 8b219dd63024..1372c35be035 100644 --- a/drivers/ide/pci/piix.c +++ b/drivers/ide/pci/piix.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/piix.c Version 0.47 February 8, 2007 + * linux/drivers/ide/pci/piix.c Version 0.50 Jun 10, 2007 * * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> @@ -394,14 +394,45 @@ static void piix_dma_clear_irq(ide_drive_t *drive) hwif->OUTB(dma_stat, hwif->dma_status); } -static int __devinit piix_cable_detect(ide_hwif_t *hwif) +struct ich_laptop { + u16 device; + u16 subvendor; + u16 subdevice; +}; + +/* + * List of laptops that use short cables rather than 80 wire + */ + +static const struct ich_laptop ich_laptop[] = { + /* devid, subvendor, subdev */ + { 0x27DF, 0x0005, 0x0280 }, /* ICH7 on Acer 5602WLMi */ + { 0x27DF, 0x1025, 0x0110 }, /* ICH7 on Acer 3682WLMi */ + { 0x27DF, 0x1043, 0x1267 }, /* ICH7 on Asus W5F */ + { 0x24CA, 0x1025, 0x0061 }, /* ICH4 on Acer Aspire 2023WLMi */ + /* end marker */ + { 0, } +}; + +static u8 __devinit piix_cable_detect(ide_hwif_t *hwif) { - struct pci_dev *dev = hwif->pci_dev; + struct pci_dev *pdev = hwif->pci_dev; + const struct ich_laptop *lap = &ich_laptop[0]; u8 reg54h = 0, mask = hwif->channel ? 0xc0 : 0x30; - pci_read_config_byte(dev, 0x54, ®54h); + /* check for specials */ + while (lap->device) { + if (lap->device == pdev->device && + lap->subvendor == pdev->subsystem_vendor && + lap->subdevice == pdev->subsystem_device) { + return ATA_CBL_PATA40_SHORT; + } + lap++; + } + + pci_read_config_byte(pdev, 0x54, ®54h); - return (reg54h & mask) ? 1 : 0; + return (reg54h & mask) ? ATA_CBL_PATA80 : ATA_CBL_PATA40; } /** @@ -444,8 +475,8 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif) hwif->swdma_mask = 0x04; if (hwif->ultra_mask & 0x78) { - if (!hwif->udma_four) - hwif->udma_four = piix_cable_detect(hwif); + if (hwif->cbl != ATA_CBL_PATA40_SHORT) + hwif->cbl = piix_cable_detect(hwif); } if (no_piix_dma) @@ -541,18 +572,16 @@ static void __devinit piix_check_450nx(void) { struct pci_dev *pdev = NULL; u16 cfg; - u8 rev; while((pdev=pci_get_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX, pdev))!=NULL) { /* Look for 450NX PXB. Check for problem configurations A PCI quirk checks bit 6 already */ - pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); pci_read_config_word(pdev, 0x41, &cfg); /* Only on the original revision: IDE DMA can hang */ - if(rev == 0x00) + if (pdev->revision == 0x00) no_piix_dma = 1; /* On all revisions below 5 PXB bus lock must be disabled for IDE */ - else if(cfg & (1<<14) && rev < 5) + else if (cfg & (1<<14) && pdev->revision < 5) no_piix_dma = 2; } if(no_piix_dma) diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c index 55bc0a32e34f..7b87488e3daa 100644 --- a/drivers/ide/pci/scc_pata.c +++ b/drivers/ide/pci/scc_pata.c @@ -716,7 +716,7 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif) hwif->atapi_dma = 1; /* we support 80c cable only. */ - hwif->udma_four = 1; + hwif->cbl = ATA_CBL_PATA80; hwif->autodma = 0; if (!noautodma) diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c index 47bcd91c9b5f..ed04e0c8dd4c 100644 --- a/drivers/ide/pci/serverworks.c +++ b/drivers/ide/pci/serverworks.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/serverworks.c Version 0.9 Mar 4 2007 + * linux/drivers/ide/pci/serverworks.c Version 0.20 Jun 3 2007 * * Copyright (C) 1998-2000 Michel Aubry * Copyright (C) 1998-2000 Andrzej Krzysztofowicz @@ -55,7 +55,6 @@ static const char *svwks_bad_ata100[] = { NULL }; -static u8 svwks_revision = 0; static struct pci_dev *isa_dev; static int check_in_drive_lists (ide_drive_t *drive, const char **list) @@ -71,9 +70,6 @@ static u8 svwks_udma_filter(ide_drive_t *drive) struct pci_dev *dev = HWIF(drive)->pci_dev; u8 mask = 0; - if (!svwks_revision) - pci_read_config_byte(dev, PCI_REVISION_ID, &svwks_revision); - if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE) return 0x1f; if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) { @@ -88,9 +84,9 @@ static u8 svwks_udma_filter(ide_drive_t *drive) return 0; /* Check the OSB4 DMA33 enable bit */ return ((reg & 0x00004000) == 0x00004000) ? 0x07 : 0; - } else if (svwks_revision < SVWKS_CSB5_REVISION_NEW) { + } else if (dev->revision < SVWKS_CSB5_REVISION_NEW) { return 0x07; - } else if (svwks_revision >= SVWKS_CSB5_REVISION_NEW) { + } else if (dev->revision >= SVWKS_CSB5_REVISION_NEW) { u8 btr = 0, mode; pci_read_config_byte(dev, 0x5A, &btr); mode = btr & 0x3; @@ -151,71 +147,11 @@ static int svwks_tune_chipset (ide_drive_t *drive, u8 xferspeed) if(dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4 && drive->media == ide_disk && speed >= XFER_UDMA_0) BUG(); - - pci_read_config_byte(dev, drive_pci[drive->dn], &pio_timing); - pci_read_config_byte(dev, drive_pci2[drive->dn], &dma_timing); + pci_read_config_byte(dev, (0x56|hwif->channel), &ultra_timing); pci_read_config_word(dev, 0x4A, &csb5_pio); pci_read_config_byte(dev, 0x54, &ultra_enable); - /* If we are in RAID mode (eg AMI MegaIDE) then we can't it - turns out trust the firmware configuration */ - - if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE) - goto oem_setup_failed; - - /* Per Specified Design by OEM, and ASIC Architect */ - if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) || - (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)) { - if (!drive->init_speed) { - u8 dma_stat = inb(hwif->dma_status); - -dma_pio: - if (((ultra_enable << (7-drive->dn) & 0x80) == 0x80) && - ((dma_stat & (1<<(5+unit))) == (1<<(5+unit)))) { - drive->current_speed = drive->init_speed = XFER_UDMA_0 + udma_modes[(ultra_timing >> (4*unit)) & ~(0xF0)]; - return 0; - } else if ((dma_timing) && - ((dma_stat&(1<<(5+unit)))==(1<<(5+unit)))) { - u8 dmaspeed = dma_timing; - - dma_timing &= ~0xFFU; - if ((dmaspeed & 0x20) == 0x20) - dmaspeed = XFER_MW_DMA_2; - else if ((dmaspeed & 0x21) == 0x21) - dmaspeed = XFER_MW_DMA_1; - else if ((dmaspeed & 0x77) == 0x77) - dmaspeed = XFER_MW_DMA_0; - else - goto dma_pio; - drive->current_speed = drive->init_speed = dmaspeed; - return 0; - } else if (pio_timing) { - u8 piospeed = pio_timing; - - pio_timing &= ~0xFFU; - if ((piospeed & 0x20) == 0x20) - piospeed = XFER_PIO_4; - else if ((piospeed & 0x22) == 0x22) - piospeed = XFER_PIO_3; - else if ((piospeed & 0x34) == 0x34) - piospeed = XFER_PIO_2; - else if ((piospeed & 0x47) == 0x47) - piospeed = XFER_PIO_1; - else if ((piospeed & 0x5d) == 0x5d) - piospeed = XFER_PIO_0; - else - goto oem_setup_failed; - drive->current_speed = drive->init_speed = piospeed; - return 0; - } - } - } - -oem_setup_failed: - - pio_timing &= ~0xFFU; - dma_timing &= ~0xFFU; ultra_timing &= ~(0x0F << (4*unit)); ultra_enable &= ~(0x01 << drive->dn); csb5_pio &= ~(0x0F << (4*drive->dn)); @@ -294,9 +230,6 @@ static unsigned int __devinit init_chipset_svwks (struct pci_dev *dev, const cha unsigned int reg; u8 btr; - /* save revision id to determine DMA capability */ - pci_read_config_byte(dev, PCI_REVISION_ID, &svwks_revision); - /* force Master Latency Timer value to 64 PCICLKs */ pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x40); @@ -375,7 +308,7 @@ static unsigned int __devinit init_chipset_svwks (struct pci_dev *dev, const cha if (!(PCI_FUNC(dev->devfn) & 1)) btr |= 0x2; else - btr |= (svwks_revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2; + btr |= (dev->revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2; pci_write_config_byte(dev, 0x5A, btr); } /* Setup HT1000 SouthBridge Controller - Single Channel Only */ @@ -389,9 +322,9 @@ static unsigned int __devinit init_chipset_svwks (struct pci_dev *dev, const cha return dev->irq; } -static unsigned int __devinit ata66_svwks_svwks (ide_hwif_t *hwif) +static u8 __devinit ata66_svwks_svwks(ide_hwif_t *hwif) { - return 1; + return ATA_CBL_PATA80; } /* On Dell PowerEdge servers with a CSB5/CSB6, the top two bits @@ -401,7 +334,7 @@ static unsigned int __devinit ata66_svwks_svwks (ide_hwif_t *hwif) * Bit 14 clear = primary IDE channel does not have 80-pin cable. * Bit 14 set = primary IDE channel has 80-pin cable. */ -static unsigned int __devinit ata66_svwks_dell (ide_hwif_t *hwif) +static u8 __devinit ata66_svwks_dell(ide_hwif_t *hwif) { struct pci_dev *dev = hwif->pci_dev; if (dev->subsystem_vendor == PCI_VENDOR_ID_DELL && @@ -409,8 +342,8 @@ static unsigned int __devinit ata66_svwks_dell (ide_hwif_t *hwif) (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE || dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE)) return ((1 << (hwif->channel + 14)) & - dev->subsystem_device) ? 1 : 0; - return 0; + dev->subsystem_device) ? ATA_CBL_PATA80 : ATA_CBL_PATA40; + return ATA_CBL_PATA40; } /* Sun Cobalt Alpine hardware avoids the 80-pin cable @@ -419,18 +352,18 @@ static unsigned int __devinit ata66_svwks_dell (ide_hwif_t *hwif) * * WARNING: this only works on Alpine hardware! */ -static unsigned int __devinit ata66_svwks_cobalt (ide_hwif_t *hwif) +static u8 __devinit ata66_svwks_cobalt(ide_hwif_t *hwif) { struct pci_dev *dev = hwif->pci_dev; if (dev->subsystem_vendor == PCI_VENDOR_ID_SUN && dev->vendor == PCI_VENDOR_ID_SERVERWORKS && dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE) return ((1 << (hwif->channel + 14)) & - dev->subsystem_device) ? 1 : 0; - return 0; + dev->subsystem_device) ? ATA_CBL_PATA80 : ATA_CBL_PATA40; + return ATA_CBL_PATA40; } -static unsigned int __devinit ata66_svwks (ide_hwif_t *hwif) +static u8 __devinit ata66_svwks(ide_hwif_t *hwif) { struct pci_dev *dev = hwif->pci_dev; @@ -449,9 +382,9 @@ static unsigned int __devinit ata66_svwks (ide_hwif_t *hwif) /* Per Specified Design by OEM, and ASIC Architect */ if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) || (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)) - return 1; + return ATA_CBL_PATA80; - return 0; + return ATA_CBL_PATA40; } static void __devinit init_hwif_svwks (ide_hwif_t *hwif) @@ -482,8 +415,8 @@ static void __devinit init_hwif_svwks (ide_hwif_t *hwif) hwif->ide_dma_check = &svwks_config_drive_xfer_rate; if (hwif->pci_dev->device != PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) { - if (!hwif->udma_four) - hwif->udma_four = ata66_svwks(hwif); + if (hwif->cbl != ATA_CBL_PATA40_SHORT) + hwif->cbl = ata66_svwks(hwif); } if (!noautodma) hwif->autodma = 1; diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c index d3185e29a38e..d396b2929ed8 100644 --- a/drivers/ide/pci/sgiioc4.c +++ b/drivers/ide/pci/sgiioc4.c @@ -316,14 +316,6 @@ static void sgiioc4_dma_host_off(ide_drive_t * drive) sgiioc4_clearirq(drive); } -static int -sgiioc4_ide_dma_lostirq(ide_drive_t * drive) -{ - HWIF(drive)->resetproc(drive); - - return __ide_dma_lostirq(drive); -} - static void sgiioc4_resetproc(ide_drive_t * drive) { @@ -331,6 +323,14 @@ sgiioc4_resetproc(ide_drive_t * drive) sgiioc4_clearirq(drive); } +static void +sgiioc4_dma_lost_irq(ide_drive_t * drive) +{ + sgiioc4_resetproc(drive); + + ide_dma_lost_irq(drive); +} + static u8 sgiioc4_INB(unsigned long port) { @@ -607,8 +607,8 @@ ide_init_sgiioc4(ide_hwif_t * hwif) hwif->ide_dma_test_irq = &sgiioc4_ide_dma_test_irq; hwif->dma_host_on = &sgiioc4_dma_host_on; hwif->dma_host_off = &sgiioc4_dma_host_off; - hwif->ide_dma_lostirq = &sgiioc4_ide_dma_lostirq; - hwif->ide_dma_timeout = &__ide_dma_timeout; + hwif->dma_lost_irq = &sgiioc4_dma_lost_irq; + hwif->dma_timeout = &ide_dma_timeout; hwif->INB = &sgiioc4_INB; } diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c index 1a4444e7226a..1c3e35487893 100644 --- a/drivers/ide/pci/siimage.c +++ b/drivers/ide/pci/siimage.c @@ -933,16 +933,17 @@ static void __devinit init_iops_siimage(ide_hwif_t *hwif) * interface. */ -static unsigned int __devinit ata66_siimage(ide_hwif_t *hwif) +static u8 __devinit ata66_siimage(ide_hwif_t *hwif) { unsigned long addr = siimage_selreg(hwif, 0); - if (pci_get_drvdata(hwif->pci_dev) == NULL) { - u8 ata66 = 0; + u8 ata66 = 0; + + if (pci_get_drvdata(hwif->pci_dev) == NULL) pci_read_config_byte(hwif->pci_dev, addr, &ata66); - return (ata66 & 0x01) ? 1 : 0; - } + else + ata66 = hwif->INB(addr); - return (hwif->INB(addr) & 0x01) ? 1 : 0; + return (ata66 & 0x01) ? ATA_CBL_PATA80 : ATA_CBL_PATA40; } /** @@ -988,8 +989,9 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif) hwif->atapi_dma = 1; hwif->ide_dma_check = &siimage_config_drive_for_dma; - if (!(hwif->udma_four)) - hwif->udma_four = ata66_siimage(hwif); + + if (hwif->cbl != ATA_CBL_PATA40_SHORT) + hwif->cbl = ata66_siimage(hwif); if (hwif->mmio) { hwif->ide_dma_test_irq = &siimage_mmio_ide_dma_test_irq; diff --git a/drivers/ide/pci/sis5513.c b/drivers/ide/pci/sis5513.c index bb6cc4aedd63..756a9b6eb462 100644 --- a/drivers/ide/pci/sis5513.c +++ b/drivers/ide/pci/sis5513.c @@ -1,5 +1,5 @@ /* - * linux/drivers/ide/pci/sis5513.c Version 0.20 Mar 4, 2007 + * linux/drivers/ide/pci/sis5513.c Version 0.25 Jun 10, 2007 * * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer @@ -659,9 +659,7 @@ static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const c /* Special case for SiS630 : 630S/ET is ATA_100a */ if (SiSHostChipInfo[i].host_id == PCI_DEVICE_ID_SI_630) { - u8 hostrev; - pci_read_config_byte(host, PCI_REVISION_ID, &hostrev); - if (hostrev >= 0x30) + if (host->revision >= 0x30) chipset_family = ATA_100a; } pci_dev_put(host); @@ -702,7 +700,6 @@ static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const c u16 trueid; u8 prefctl; u8 idecfg; - u8 sbrev; pci_read_config_byte(dev, 0x4a, &idecfg); pci_write_config_byte(dev, 0x4a, idecfg | 0x10); @@ -712,11 +709,10 @@ static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const c if (trueid == 0x5517) { /* SiS 961/961B */ lpc_bridge = pci_get_slot(dev->bus, 0x10); /* Bus 0, Dev 2, Fn 0 */ - pci_read_config_byte(lpc_bridge, PCI_REVISION_ID, &sbrev); pci_read_config_byte(dev, 0x49, &prefctl); pci_dev_put(lpc_bridge); - if (sbrev == 0x10 && (prefctl & 0x80)) { + if (lpc_bridge->revision == 0x10 && (prefctl & 0x80)) { printk(KERN_INFO "SIS5513: SiS 961B MuTIOL IDE UDMA133 controller\n"); chipset_family = ATA_133a; } else { @@ -796,10 +792,33 @@ static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const c return 0; } -static unsigned int __devinit ata66_sis5513 (ide_hwif_t *hwif) +struct sis_laptop { + u16 device; + u16 subvendor; + u16 subdevice; +}; + +static const struct sis_laptop sis_laptop[] = { + /* devid, subvendor, subdev */ + { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */ + /* end marker */ + { 0, } +}; + +static u8 __devinit ata66_sis5513(ide_hwif_t *hwif) { + struct pci_dev *pdev = hwif->pci_dev; + const struct sis_laptop *lap = &sis_laptop[0]; u8 ata66 = 0; + while (lap->device) { + if (lap->device == pdev->device && + lap->subvendor == pdev->subsystem_vendor && + lap->subdevice == pdev->subsystem_device) + return ATA_CBL_PATA40_SHORT; + lap++; + } + if (chipset_family >= ATA_133) { u16 regw = 0; u16 reg_addr = hwif->channel ? 0x52: 0x50; @@ -811,7 +830,8 @@ static unsigned int __devinit ata66_sis5513 (ide_hwif_t *hwif) pci_read_config_byte(hwif->pci_dev, 0x48, ®48h); ata66 = (reg48h & mask) ? 0 : 1; } - return ata66; + + return ata66 ? ATA_CBL_PATA80 : ATA_CBL_PATA40; } static void __devinit init_hwif_sis5513 (ide_hwif_t *hwif) @@ -841,8 +861,8 @@ static void __devinit init_hwif_sis5513 (ide_hwif_t *hwif) if (!chipset_family) return; - if (!(hwif->udma_four)) - hwif->udma_four = ata66_sis5513(hwif); + if (hwif->cbl != ATA_CBL_PATA40_SHORT) + hwif->cbl = ata66_sis5513(hwif); if (chipset_family > ATA_16) { hwif->ide_dma_check = &sis5513_config_xfer_rate; @@ -872,6 +892,7 @@ static int __devinit sis5513_init_one(struct pci_dev *dev, const struct pci_devi static struct pci_device_id sis5513_pci_tbl[] = { { PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5513, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5518, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, + { PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_1180, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, { 0, }, }; MODULE_DEVICE_TABLE(pci, sis5513_pci_tbl); diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c index 7c383d9cc472..a7323d278c49 100644 --- a/drivers/ide/pci/sl82c105.c +++ b/drivers/ide/pci/sl82c105.c @@ -195,7 +195,7 @@ static inline void sl82c105_reset_host(struct pci_dev *dev) * This function is called when the IDE timer expires, the drive * indicates that it is READY, and we were waiting for DMA to complete. */ -static int sl82c105_ide_dma_lostirq(ide_drive_t *drive) +static void sl82c105_dma_lost_irq(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = hwif->pci_dev; @@ -222,9 +222,6 @@ static int sl82c105_ide_dma_lostirq(ide_drive_t *drive) } sl82c105_reset_host(dev); - - /* __ide_dma_lostirq would return 1, so we do as well */ - return 1; } /* @@ -244,15 +241,12 @@ static void sl82c105_dma_start(ide_drive_t *drive) ide_dma_start(drive); } -static int sl82c105_ide_dma_timeout(ide_drive_t *drive) +static void sl82c105_dma_timeout(ide_drive_t *drive) { - ide_hwif_t *hwif = HWIF(drive); - struct pci_dev *dev = hwif->pci_dev; + DBG(("sl82c105_dma_timeout(drive:%s)\n", drive->name)); - DBG(("sl82c105_ide_dma_timeout(drive:%s)\n", drive->name)); - - sl82c105_reset_host(dev); - return __ide_dma_timeout(drive); + sl82c105_reset_host(HWIF(drive)->pci_dev); + ide_dma_timeout(drive); } static int sl82c105_ide_dma_on(ide_drive_t *drive) @@ -344,7 +338,6 @@ static void sl82c105_tune_drive(ide_drive_t *drive, u8 pio) static unsigned int sl82c105_bridge_revision(struct pci_dev *dev) { struct pci_dev *bridge; - u8 rev; /* * The bridge should be part of the same device, but function 0. @@ -366,10 +359,9 @@ static unsigned int sl82c105_bridge_revision(struct pci_dev *dev) /* * We need to find function 0's revision, not function 1 */ - pci_read_config_byte(bridge, PCI_REVISION_ID, &rev); pci_dev_put(bridge); - return rev; + return bridge->revision; } /* @@ -441,9 +433,9 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif) hwif->ide_dma_check = &sl82c105_ide_dma_check; hwif->ide_dma_on = &sl82c105_ide_dma_on; hwif->dma_off_quietly = &sl82c105_dma_off_quietly; - hwif->ide_dma_lostirq = &sl82c105_ide_dma_lostirq; + hwif->dma_lost_irq = &sl82c105_dma_lost_irq; hwif->dma_start = &sl82c105_dma_start; - hwif->ide_dma_timeout = &sl82c105_ide_dma_timeout; + hwif->dma_timeout = &sl82c105_dma_timeout; if (!noautodma) hwif->autodma = 1; diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c index c40f291f91e0..575dbbd8b482 100644 --- a/drivers/ide/pci/slc90e66.c +++ b/drivers/ide/pci/slc90e66.c @@ -199,10 +199,9 @@ static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif) hwif->mwdma_mask = 0x06; hwif->swdma_mask = 0x04; - if (!hwif->udma_four) { + if (hwif->cbl != ATA_CBL_PATA40_SHORT) /* bit[0(1)]: 0:80, 1:40 */ - hwif->udma_four = (reg47 & mask) ? 0 : 1; - } + hwif->cbl = (reg47 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; hwif->ide_dma_check = &slc90e66_config_drive_xfer_rate; diff --git a/drivers/ide/pci/tc86c001.c b/drivers/ide/pci/tc86c001.c index cee619bb2eaf..8de1f8e22494 100644 --- a/drivers/ide/pci/tc86c001.c +++ b/drivers/ide/pci/tc86c001.c @@ -220,13 +220,13 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif) hwif->ide_dma_check = &tc86c001_config_drive_xfer_rate; hwif->dma_start = &tc86c001_dma_start; - if (!hwif->udma_four) { + if (hwif->cbl != ATA_CBL_PATA40_SHORT) { /* * System Control 1 Register bit 13 (PDIAGN): * 0=80-pin cable, 1=40-pin cable */ scr1 = hwif->INW(sc_base + 0x00); - hwif->udma_four = (scr1 & 0x2000) ? 0 : 1; + hwif->cbl = (scr1 & 0x2000) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; } if (!noautodma) diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c index a508550c4095..27e92fb9f95e 100644 --- a/drivers/ide/pci/via82cxxx.c +++ b/drivers/ide/pci/via82cxxx.c @@ -1,6 +1,6 @@ /* * - * Version 3.38 + * Version 3.45 * * VIA IDE driver for Linux. Supported southbridges: * @@ -9,6 +9,7 @@ * vt8235, vt8237, vt8237a * * Copyright (c) 2000-2002 Vojtech Pavlik + * Copyright (c) 2007 Bartlomiej Zolnierkiewicz * * Based on the work of: * Michel Aubry @@ -33,6 +34,8 @@ #include <linux/pci.h> #include <linux/init.h> #include <linux/ide.h> +#include <linux/dmi.h> + #include <asm/io.h> #ifdef CONFIG_PPC_CHRP @@ -41,8 +44,6 @@ #include "ide-timing.h" -#define DISPLAY_VIA_TIMINGS - #define VIA_IDE_ENABLE 0x40 #define VIA_IDE_CONFIG 0x41 #define VIA_FIFO_CONFIG 0x43 @@ -54,18 +55,12 @@ #define VIA_ADDRESS_SETUP 0x4c #define VIA_UDMA_TIMING 0x50 -#define VIA_UDMA 0x007 -#define VIA_UDMA_NONE 0x000 -#define VIA_UDMA_33 0x001 -#define VIA_UDMA_66 0x002 -#define VIA_UDMA_100 0x003 -#define VIA_UDMA_133 0x004 -#define VIA_BAD_PREQ 0x010 /* Crashes if PREQ# till DDACK# set */ -#define VIA_BAD_CLK66 0x020 /* 66 MHz clock doesn't work correctly */ -#define VIA_SET_FIFO 0x040 /* Needs to have FIFO split set */ -#define VIA_NO_UNMASK 0x080 /* Doesn't work with IRQ unmasking on */ -#define VIA_BAD_ID 0x100 /* Has wrong vendor ID (0x1107) */ -#define VIA_BAD_AST 0x200 /* Don't touch Address Setup Timing */ +#define VIA_BAD_PREQ 0x01 /* Crashes if PREQ# till DDACK# set */ +#define VIA_BAD_CLK66 0x02 /* 66 MHz clock doesn't work correctly */ +#define VIA_SET_FIFO 0x04 /* Needs to have FIFO split set */ +#define VIA_NO_UNMASK 0x08 /* Doesn't work with IRQ unmasking on */ +#define VIA_BAD_ID 0x10 /* Has wrong vendor ID (0x1107) */ +#define VIA_BAD_AST 0x20 /* Don't touch Address Setup Timing */ /* * VIA SouthBridge chips. @@ -76,36 +71,37 @@ static struct via_isa_bridge { u16 id; u8 rev_min; u8 rev_max; - u16 flags; + u8 udma_mask; + u8 flags; } via_isa_bridges[] = { - { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, - { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, - { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, - { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, - { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, - { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, - { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, - { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, - { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 }, - { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 }, - { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 }, - { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 }, - { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 }, - { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 }, - { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 }, - { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 }, - { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO }, - { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ }, - { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO }, - { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO }, - { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO }, - { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK }, - { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID }, + { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, + { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, + { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, + { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, + { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, + { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, + { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, + { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST }, + { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, ATA_UDMA5, }, + { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, ATA_UDMA5, }, + { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, ATA_UDMA5, }, + { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, ATA_UDMA5, }, + { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, ATA_UDMA4, }, + { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 }, + { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, ATA_UDMA4, }, + { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 }, + { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO }, + { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ }, + { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO }, + { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO }, + { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, 0x00, VIA_SET_FIFO }, + { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK }, + { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID }, { NULL } }; static unsigned int via_clock; -static char *via_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100", "UDMA133" }; +static char *via_dma[] = { "16", "25", "33", "44", "66", "100", "133" }; struct via82cxxx_dev { @@ -140,12 +136,12 @@ static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing) pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn), ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1)); - switch (vdev->via_config->flags & VIA_UDMA) { - case VIA_UDMA_33: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break; - case VIA_UDMA_66: t = timing->udma ? (0xe8 | (FIT(timing->udma, 2, 9) - 2)) : 0x0f; break; - case VIA_UDMA_100: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break; - case VIA_UDMA_133: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break; - default: return; + switch (vdev->via_config->udma_mask) { + case ATA_UDMA2: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break; + case ATA_UDMA4: t = timing->udma ? (0xe8 | (FIT(timing->udma, 2, 9) - 2)) : 0x0f; break; + case ATA_UDMA5: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break; + case ATA_UDMA6: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break; + default: return; } pci_write_config_byte(dev, VIA_UDMA_TIMING + (3 - dn), t); @@ -173,12 +169,12 @@ static int via_set_drive(ide_drive_t *drive, u8 speed) T = 1000000000 / via_clock; - switch (vdev->via_config->flags & VIA_UDMA) { - case VIA_UDMA_33: UT = T; break; - case VIA_UDMA_66: UT = T/2; break; - case VIA_UDMA_100: UT = T/3; break; - case VIA_UDMA_133: UT = T/4; break; - default: UT = T; + switch (vdev->via_config->udma_mask) { + case ATA_UDMA2: UT = T; break; + case ATA_UDMA4: UT = T/2; break; + case ATA_UDMA5: UT = T/3; break; + case ATA_UDMA6: UT = T/4; break; + default: UT = T; } ide_timing_compute(drive, speed, &t, T, UT); @@ -208,8 +204,7 @@ static int via_set_drive(ide_drive_t *drive, u8 speed) static void via82cxxx_tune_drive(ide_drive_t *drive, u8 pio) { if (pio == 255) { - via_set_drive(drive, - ide_find_best_mode(drive, XFER_PIO | XFER_EPIO)); + via_set_drive(drive, ide_find_best_pio_mode(drive)); return; } @@ -226,16 +221,10 @@ static void via82cxxx_tune_drive(ide_drive_t *drive, u8 pio) static int via82cxxx_ide_dma_check (ide_drive_t *drive) { - ide_hwif_t *hwif = HWIF(drive); - struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev); - u16 w80 = hwif->udma_four; + u8 speed = ide_max_dma_mode(drive); - u16 speed = ide_find_best_mode(drive, - XFER_PIO | XFER_EPIO | XFER_SWDMA | XFER_MWDMA | - (vdev->via_config->flags & VIA_UDMA ? XFER_UDMA : 0) | - (w80 && (vdev->via_config->flags & VIA_UDMA) >= VIA_UDMA_66 ? XFER_UDMA_66 : 0) | - (w80 && (vdev->via_config->flags & VIA_UDMA) >= VIA_UDMA_100 ? XFER_UDMA_100 : 0) | - (w80 && (vdev->via_config->flags & VIA_UDMA) >= VIA_UDMA_133 ? XFER_UDMA_133 : 0)); + if (speed == 0) + speed = ide_find_best_pio_mode(drive); via_set_drive(drive, speed); @@ -248,16 +237,14 @@ static int via82cxxx_ide_dma_check (ide_drive_t *drive) static struct via_isa_bridge *via_config_find(struct pci_dev **isa) { struct via_isa_bridge *via_config; - u8 t; for (via_config = via_isa_bridges; via_config->id; via_config++) if ((*isa = pci_get_device(PCI_VENDOR_ID_VIA + !!(via_config->flags & VIA_BAD_ID), via_config->id, NULL))) { - pci_read_config_byte(*isa, PCI_REVISION_ID, &t); - if (t >= via_config->rev_min && - t <= via_config->rev_max) + if ((*isa)->revision >= via_config->rev_min && + (*isa)->revision <= via_config->rev_max) break; pci_dev_put(*isa); } @@ -272,8 +259,8 @@ static void __devinit via_cable_detect(struct via82cxxx_dev *vdev, u32 u) { int i; - switch (vdev->via_config->flags & VIA_UDMA) { - case VIA_UDMA_66: + switch (vdev->via_config->udma_mask) { + case ATA_UDMA4: for (i = 24; i >= 0; i -= 8) if (((u >> (i & 16)) & 8) && ((u >> i) & 0x20) && @@ -286,7 +273,7 @@ static void __devinit via_cable_detect(struct via82cxxx_dev *vdev, u32 u) } break; - case VIA_UDMA_100: + case ATA_UDMA5: for (i = 24; i >= 0; i -= 8) if (((u >> i) & 0x10) || (((u >> i) & 0x20) && @@ -298,7 +285,7 @@ static void __devinit via_cable_detect(struct via82cxxx_dev *vdev, u32 u) } break; - case VIA_UDMA_133: + case ATA_UDMA6: for (i = 24; i >= 0; i -= 8) if (((u >> i) & 0x10) || (((u >> i) & 0x20) && @@ -353,7 +340,7 @@ static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const via_cable_detect(vdev, u); - if ((via_config->flags & VIA_UDMA) == VIA_UDMA_66) { + if (via_config->udma_mask == ATA_UDMA4) { /* Enable Clk66 */ pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008); } else if (via_config->flags & VIA_BAD_CLK66) { @@ -415,17 +402,54 @@ static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const * Print the boot message. */ - pci_read_config_byte(isa, PCI_REVISION_ID, &t); - printk(KERN_INFO "VP_IDE: VIA %s (rev %02x) IDE %s " + printk(KERN_INFO "VP_IDE: VIA %s (rev %02x) IDE %sDMA%s " "controller on pci%s\n", - via_config->name, t, - via_dma[via_config->flags & VIA_UDMA], + via_config->name, isa->revision, + via_config->udma_mask ? "U" : "MW", + via_dma[via_config->udma_mask ? + (fls(via_config->udma_mask) - 1) : 0], pci_name(dev)); pci_dev_put(isa); return 0; } +/* + * Cable special cases + */ + +static struct dmi_system_id cable_dmi_table[] = { + { + .ident = "Acer Ferrari 3400", + .matches = { + DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."), + DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"), + }, + }, + { } +}; + +static int via_cable_override(void) +{ + /* Systems by DMI */ + if (dmi_check_system(cable_dmi_table)) + return 1; + return 0; +} + +static u8 __devinit via82cxxx_cable_detect(ide_hwif_t *hwif) +{ + struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev); + + if (via_cable_override()) + return ATA_CBL_PATA40_SHORT; + + if ((vdev->via_80w >> hwif->channel) & 1) + return ATA_CBL_PATA80; + else + return ATA_CBL_PATA40; +} + static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif) { struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev); @@ -454,12 +478,14 @@ static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif) return; hwif->atapi_dma = 1; - hwif->ultra_mask = 0x7f; + + hwif->ultra_mask = vdev->via_config->udma_mask; hwif->mwdma_mask = 0x07; hwif->swdma_mask = 0x07; - if (!hwif->udma_four) - hwif->udma_four = (vdev->via_80w >> hwif->channel) & 1; + if (hwif->cbl != ATA_CBL_PATA40_SHORT) + hwif->cbl = via82cxxx_cable_detect(hwif); + hwif->ide_dma_check = &via82cxxx_ide_dma_check; if (!noautodma) hwif->autodma = 1; |