diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/alpha/kernel/sys_marvel.c | 5 | ||||
| -rw-r--r-- | arch/i386/pci/i386.c | 6 | ||||
| -rw-r--r-- | arch/ppc/kernel/pci.c | 1 | ||||
| -rw-r--r-- | arch/ppc64/kernel/eeh.c | 31 | ||||
| -rw-r--r-- | arch/ppc64/kernel/iSeries_VpdInfo.c | 5 | ||||
| -rw-r--r-- | arch/ppc64/kernel/pci.c | 1 | ||||
| -rw-r--r-- | arch/sparc64/kernel/pci.c | 127 | ||||
| -rw-r--r-- | arch/sparc64/kernel/pci_psycho.c | 34 | ||||
| -rw-r--r-- | arch/sparc64/kernel/pci_sabre.c | 36 | ||||
| -rw-r--r-- | arch/sparc64/kernel/pci_schizo.c | 48 |
10 files changed, 84 insertions, 210 deletions
diff --git a/arch/alpha/kernel/sys_marvel.c b/arch/alpha/kernel/sys_marvel.c index 804727853d25..e32fee505220 100644 --- a/arch/alpha/kernel/sys_marvel.c +++ b/arch/alpha/kernel/sys_marvel.c @@ -373,12 +373,11 @@ marvel_map_irq(struct pci_dev *dev, u8 slot, u8 pin) irq += 0x80; /* offset for lsi */ #if 1 - printk("PCI:%d:%d:%d (hose %d) [%s] is using MSI\n", + printk("PCI:%d:%d:%d (hose %d) is using MSI\n", dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn), - hose->index, - pci_pretty_name (dev)); + hose->index); printk(" %d message(s) from 0x%04x\n", 1 << ((msg_ctl & PCI_MSI_FLAGS_QSIZE) >> 4), msg_dat); diff --git a/arch/i386/pci/i386.c b/arch/i386/pci/i386.c index 3cc480998a47..6d6338500c3c 100644 --- a/arch/i386/pci/i386.c +++ b/arch/i386/pci/i386.c @@ -283,9 +283,9 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, /* Write-combine setting is ignored, it is changed via the mtrr * interfaces on this platform. */ - if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, - vma->vm_end - vma->vm_start, - vma->vm_page_prot)) + if (io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, + vma->vm_end - vma->vm_start, + vma->vm_page_prot)) return -EAGAIN; return 0; diff --git a/arch/ppc/kernel/pci.c b/arch/ppc/kernel/pci.c index 7b3586a3bf30..854e45beb387 100644 --- a/arch/ppc/kernel/pci.c +++ b/arch/ppc/kernel/pci.c @@ -80,7 +80,6 @@ fixup_broken_pcnet32(struct pci_dev* dev) if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) { dev->vendor = PCI_VENDOR_ID_AMD; pci_write_config_word(dev, PCI_VENDOR_ID, PCI_VENDOR_ID_AMD); - pci_name_device(dev); } } DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT, PCI_ANY_ID, fixup_broken_pcnet32); diff --git a/arch/ppc64/kernel/eeh.c b/arch/ppc64/kernel/eeh.c index af5272fedadf..4c857a6516fc 100644 --- a/arch/ppc64/kernel/eeh.c +++ b/arch/ppc64/kernel/eeh.c @@ -202,10 +202,9 @@ static void pci_addr_cache_print(struct pci_io_addr_cache *cache) while (n) { struct pci_io_addr_range *piar; piar = rb_entry(n, struct pci_io_addr_range, rb_node); - printk(KERN_DEBUG "PCI: %s addr range %d [%lx-%lx]: %s %s\n", + printk(KERN_DEBUG "PCI: %s addr range %d [%lx-%lx]: %s\n", (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt, - piar->addr_lo, piar->addr_hi, pci_name(piar->pcidev), - pci_pretty_name(piar->pcidev)); + piar->addr_lo, piar->addr_hi, pci_name(piar->pcidev)); cnt++; n = rb_next(n); } @@ -260,8 +259,8 @@ static void __pci_addr_cache_insert_device(struct pci_dev *dev) dn = pci_device_to_OF_node(dev); if (!dn) { - printk(KERN_WARNING "PCI: no pci dn found for dev=%s %s\n", - pci_name(dev), pci_pretty_name(dev)); + printk(KERN_WARNING "PCI: no pci dn found for dev=%s\n", + pci_name(dev)); return; } @@ -269,8 +268,8 @@ static void __pci_addr_cache_insert_device(struct pci_dev *dev) if (!(dn->eeh_mode & EEH_MODE_SUPPORTED) || dn->eeh_mode & EEH_MODE_NOCHECK) { #ifdef DEBUG - printk(KERN_INFO "PCI: skip building address cache for=%s %s\n", - pci_name(dev), pci_pretty_name(dev)); + printk(KERN_INFO "PCI: skip building address cache for=%s\n", + pci_name(dev)); #endif return; } @@ -447,12 +446,12 @@ static void eeh_panic(struct pci_dev *dev, int reset_state) * in light of potential corruption, we can use it here. */ if (panic_on_oops) - panic("EEH: MMIO failure (%d) on device:%s %s\n", reset_state, - pci_name(dev), pci_pretty_name(dev)); + panic("EEH: MMIO failure (%d) on device:%s\n", reset_state, + pci_name(dev)); else { __get_cpu_var(ignored_failures)++; - printk(KERN_INFO "EEH: Ignored MMIO failure (%d) on device:%s %s\n", - reset_state, pci_name(dev), pci_pretty_name(dev)); + printk(KERN_INFO "EEH: Ignored MMIO failure (%d) on device:%s\n", + reset_state, pci_name(dev)); } } @@ -482,8 +481,8 @@ static void eeh_event_handler(void *dummy) break; printk(KERN_INFO "EEH: MMIO failure (%d), notifiying device " - "%s %s\n", event->reset_state, - pci_name(event->dev), pci_pretty_name(event->dev)); + "%s\n", event->reset_state, + pci_name(event->dev)); atomic_set(&eeh_fail_count, 0); notifier_call_chain (&eeh_notifier_chain, @@ -851,8 +850,7 @@ void eeh_add_device_late(struct pci_dev *dev) return; #ifdef DEBUG - printk(KERN_DEBUG "EEH: adding device %s %s\n", pci_name(dev), - pci_pretty_name(dev)); + printk(KERN_DEBUG "EEH: adding device %s\n", pci_name(dev)); #endif pci_addr_cache_insert_device (dev); @@ -873,8 +871,7 @@ void eeh_remove_device(struct pci_dev *dev) /* Unregister the device with the EEH/PCI address search system */ #ifdef DEBUG - printk(KERN_DEBUG "EEH: remove device %s %s\n", pci_name(dev), - pci_pretty_name(dev)); + printk(KERN_DEBUG "EEH: remove device %s\n", pci_name(dev)); #endif pci_addr_cache_remove_device(dev); } diff --git a/arch/ppc64/kernel/iSeries_VpdInfo.c b/arch/ppc64/kernel/iSeries_VpdInfo.c index d11c732daf81..5d921792571f 100644 --- a/arch/ppc64/kernel/iSeries_VpdInfo.c +++ b/arch/ppc64/kernel/iSeries_VpdInfo.c @@ -264,8 +264,5 @@ void __init iSeries_Device_Information(struct pci_dev *PciDev, int count) printk("%d. PCI: Bus%3d, Device%3d, Vendor %04X Frame%3d, Card %4s ", count, bus, PCI_SLOT(PciDev->devfn), PciDev->vendor, frame, card); - if (pci_class_name(PciDev->class >> 8) == 0) - printk("0x%04X\n", (int)(PciDev->class >> 8)); - else - printk("%s\n", pci_class_name(PciDev->class >> 8)); + printk("0x%04X\n", (int)(PciDev->class >> 8)); } diff --git a/arch/ppc64/kernel/pci.c b/arch/ppc64/kernel/pci.c index d0d55c7908ef..b5ca7d8347e2 100644 --- a/arch/ppc64/kernel/pci.c +++ b/arch/ppc64/kernel/pci.c @@ -84,7 +84,6 @@ static void fixup_broken_pcnet32(struct pci_dev* dev) if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) { dev->vendor = PCI_VENDOR_ID_AMD; pci_write_config_word(dev, PCI_VENDOR_ID, PCI_VENDOR_ID_AMD); - pci_name_device(dev); } } DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT, PCI_ANY_ID, fixup_broken_pcnet32); diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c index ec8bf4012c0c..2ff7c32ab0ce 100644 --- a/arch/sparc64/kernel/pci.c +++ b/arch/sparc64/kernel/pci.c @@ -359,134 +359,17 @@ void pcibios_fixup_bus(struct pci_bus *pbus) pbus->resource[1] = &pbm->mem_space; } -int pci_claim_resource(struct pci_dev *pdev, int resource) +struct resource *pcibios_select_root(struct pci_dev *pdev, struct resource *r) { struct pci_pbm_info *pbm = pdev->bus->sysdata; - struct resource *res = &pdev->resource[resource]; - struct resource *root; - - if (!pbm) - return -EINVAL; + struct resource *root = NULL; - if (res->flags & IORESOURCE_IO) + if (r->flags & IORESOURCE_IO) root = &pbm->io_space; - else + if (r->flags & IORESOURCE_MEM) root = &pbm->mem_space; - pbm->parent->resource_adjust(pdev, res, root); - - return request_resource(root, res); -} - -/* - * Given the PCI bus a device resides on, try to - * find an acceptable resource allocation for a - * specific device resource.. - */ -static int pci_assign_bus_resource(const struct pci_bus *bus, - struct pci_dev *dev, - struct resource *res, - unsigned long size, - unsigned long min, - int resno) -{ - unsigned int type_mask; - int i; - - type_mask = IORESOURCE_IO | IORESOURCE_MEM; - for (i = 0 ; i < 4; i++) { - struct resource *r = bus->resource[i]; - if (!r) - continue; - - /* type_mask must match */ - if ((res->flags ^ r->flags) & type_mask) - continue; - - /* Ok, try it out.. */ - if (allocate_resource(r, res, size, min, -1, size, NULL, NULL) < 0) - continue; - - /* PCI config space updated by caller. */ - return 0; - } - return -EBUSY; -} - -int pci_assign_resource(struct pci_dev *pdev, int resource) -{ - struct pcidev_cookie *pcp = pdev->sysdata; - struct pci_pbm_info *pbm = pcp->pbm; - struct resource *res = &pdev->resource[resource]; - unsigned long min, size; - int err; - - if (res->flags & IORESOURCE_IO) - min = pbm->io_space.start + 0x400UL; - else - min = pbm->mem_space.start; - - size = res->end - res->start + 1; - - err = pci_assign_bus_resource(pdev->bus, pdev, res, size, min, resource); - - if (err < 0) { - printk("PCI: Failed to allocate resource %d for %s\n", - resource, pci_name(pdev)); - } else { - /* Update PCI config space. */ - pbm->parent->base_address_update(pdev, resource); - } - - return err; -} - -/* Sort resources by alignment */ -void pdev_sort_resources(struct pci_dev *dev, struct resource_list *head) -{ - int i; - - for (i = 0; i < PCI_NUM_RESOURCES; i++) { - struct resource *r; - struct resource_list *list, *tmp; - unsigned long r_align; - - r = &dev->resource[i]; - r_align = r->end - r->start; - - if (!(r->flags) || r->parent) - continue; - if (!r_align) { - printk(KERN_WARNING "PCI: Ignore bogus resource %d " - "[%lx:%lx] of %s\n", - i, r->start, r->end, pci_name(dev)); - continue; - } - r_align = (i < PCI_BRIDGE_RESOURCES) ? r_align + 1 : r->start; - for (list = head; ; list = list->next) { - unsigned long align = 0; - struct resource_list *ln = list->next; - int idx; - - if (ln) { - idx = ln->res - &ln->dev->resource[0]; - align = (idx < PCI_BRIDGE_RESOURCES) ? - ln->res->end - ln->res->start + 1 : - ln->res->start; - } - if (r_align > align) { - tmp = kmalloc(sizeof(*tmp), GFP_KERNEL); - if (!tmp) - panic("pdev_sort_resources(): " - "kmalloc() failed!\n"); - tmp->next = ln; - tmp->res = r; - tmp->dev = dev; - list->next = tmp; - break; - } - } - } + return root; } void pcibios_update_irq(struct pci_dev *pdev, int irq) diff --git a/arch/sparc64/kernel/pci_psycho.c b/arch/sparc64/kernel/pci_psycho.c index 91ab466d6c66..6ed1ef25e0ac 100644 --- a/arch/sparc64/kernel/pci_psycho.c +++ b/arch/sparc64/kernel/pci_psycho.c @@ -307,7 +307,7 @@ static unsigned char psycho_pil_table[] = { /*0x32*/15, /* Power Management */ }; -static int __init psycho_ino_to_pil(struct pci_dev *pdev, unsigned int ino) +static int psycho_ino_to_pil(struct pci_dev *pdev, unsigned int ino) { int ret; @@ -344,9 +344,9 @@ static int __init psycho_ino_to_pil(struct pci_dev *pdev, unsigned int ino) return ret; } -static unsigned int __init psycho_irq_build(struct pci_pbm_info *pbm, - struct pci_dev *pdev, - unsigned int ino) +static unsigned int psycho_irq_build(struct pci_pbm_info *pbm, + struct pci_dev *pdev, + unsigned int ino) { struct ino_bucket *bucket; unsigned long imap, iclr; @@ -1024,7 +1024,7 @@ static irqreturn_t psycho_pcierr_intr(int irq, void *dev_id, struct pt_regs *reg #define PSYCHO_CE_INO 0x2f #define PSYCHO_PCIERR_A_INO 0x30 #define PSYCHO_PCIERR_B_INO 0x31 -static void __init psycho_register_error_handlers(struct pci_controller_info *p) +static void psycho_register_error_handlers(struct pci_controller_info *p) { struct pci_pbm_info *pbm = &p->pbm_A; /* arbitrary */ unsigned long base = p->pbm_A.controller_regs; @@ -1091,15 +1091,15 @@ static void __init psycho_register_error_handlers(struct pci_controller_info *p) } /* PSYCHO boot time probing and initialization. */ -static void __init psycho_resource_adjust(struct pci_dev *pdev, - struct resource *res, - struct resource *root) +static void psycho_resource_adjust(struct pci_dev *pdev, + struct resource *res, + struct resource *root) { res->start += root->start; res->end += root->start; } -static void __init psycho_base_address_update(struct pci_dev *pdev, int resource) +static void psycho_base_address_update(struct pci_dev *pdev, int resource) { struct pcidev_cookie *pcp = pdev->sysdata; struct pci_pbm_info *pbm = pcp->pbm; @@ -1144,7 +1144,7 @@ static void __init psycho_base_address_update(struct pci_dev *pdev, int resource pci_write_config_dword(pdev, where + 4, 0); } -static void __init pbm_config_busmastering(struct pci_pbm_info *pbm) +static void pbm_config_busmastering(struct pci_pbm_info *pbm) { u8 *addr; @@ -1161,8 +1161,8 @@ static void __init pbm_config_busmastering(struct pci_pbm_info *pbm) pci_config_write8(addr, 64); } -static void __init pbm_scan_bus(struct pci_controller_info *p, - struct pci_pbm_info *pbm) +static void pbm_scan_bus(struct pci_controller_info *p, + struct pci_pbm_info *pbm) { struct pcidev_cookie *cookie = kmalloc(sizeof(*cookie), GFP_KERNEL); @@ -1189,7 +1189,7 @@ static void __init pbm_scan_bus(struct pci_controller_info *p, pci_setup_busmastering(pbm, pbm->pci_bus); } -static void __init psycho_scan_bus(struct pci_controller_info *p) +static void psycho_scan_bus(struct pci_controller_info *p) { pbm_config_busmastering(&p->pbm_B); p->pbm_B.is_66mhz_capable = 0; @@ -1204,7 +1204,7 @@ static void __init psycho_scan_bus(struct pci_controller_info *p) psycho_register_error_handlers(p); } -static void __init psycho_iommu_init(struct pci_controller_info *p) +static void psycho_iommu_init(struct pci_controller_info *p) { struct pci_iommu *iommu = p->pbm_A.iommu; unsigned long tsbbase, i; @@ -1327,8 +1327,8 @@ static void psycho_controller_hwinit(struct pci_controller_info *p) psycho_write(p->pbm_A.controller_regs + PSYCHO_PCIB_DIAG, tmp); } -static void __init pbm_register_toplevel_resources(struct pci_controller_info *p, - struct pci_pbm_info *pbm) +static void pbm_register_toplevel_resources(struct pci_controller_info *p, + struct pci_pbm_info *pbm) { char *name = pbm->name; @@ -1481,7 +1481,7 @@ static void psycho_pbm_init(struct pci_controller_info *p, #define PSYCHO_CONFIGSPACE 0x001000000UL -void __init psycho_init(int node, char *model_name) +void psycho_init(int node, char *model_name) { struct linux_prom64_registers pr_regs[3]; struct pci_controller_info *p; diff --git a/arch/sparc64/kernel/pci_sabre.c b/arch/sparc64/kernel/pci_sabre.c index 52bf3431a422..0ee6bd5b9ac6 100644 --- a/arch/sparc64/kernel/pci_sabre.c +++ b/arch/sparc64/kernel/pci_sabre.c @@ -554,7 +554,7 @@ static unsigned char sabre_pil_table[] = { /*0x32*/15, /* Power Management */ }; -static int __init sabre_ino_to_pil(struct pci_dev *pdev, unsigned int ino) +static int sabre_ino_to_pil(struct pci_dev *pdev, unsigned int ino) { int ret; @@ -612,9 +612,9 @@ static void sabre_wsync_handler(struct ino_bucket *bucket, void *_arg1, void *_a sabre_read(sync_reg); } -static unsigned int __init sabre_irq_build(struct pci_pbm_info *pbm, - struct pci_dev *pdev, - unsigned int ino) +static unsigned int sabre_irq_build(struct pci_pbm_info *pbm, + struct pci_dev *pdev, + unsigned int ino) { struct ino_bucket *bucket; unsigned long imap, iclr; @@ -1009,7 +1009,7 @@ static irqreturn_t sabre_pcierr_intr(int irq, void *dev_id, struct pt_regs *regs #define SABRE_UE_INO 0x2e #define SABRE_CE_INO 0x2f #define SABRE_PCIERR_INO 0x30 -static void __init sabre_register_error_handlers(struct pci_controller_info *p) +static void sabre_register_error_handlers(struct pci_controller_info *p) { struct pci_pbm_info *pbm = &p->pbm_A; /* arbitrary */ unsigned long base = pbm->controller_regs; @@ -1056,9 +1056,9 @@ static void __init sabre_register_error_handlers(struct pci_controller_info *p) sabre_write(base + SABRE_PCICTRL, tmp); } -static void __init sabre_resource_adjust(struct pci_dev *pdev, - struct resource *res, - struct resource *root) +static void sabre_resource_adjust(struct pci_dev *pdev, + struct resource *res, + struct resource *root) { struct pci_pbm_info *pbm = pdev->bus->sysdata; unsigned long base; @@ -1072,7 +1072,7 @@ static void __init sabre_resource_adjust(struct pci_dev *pdev, res->end += base; } -static void __init sabre_base_address_update(struct pci_dev *pdev, int resource) +static void sabre_base_address_update(struct pci_dev *pdev, int resource) { struct pcidev_cookie *pcp = pdev->sysdata; struct pci_pbm_info *pbm = pcp->pbm; @@ -1118,7 +1118,7 @@ static void __init sabre_base_address_update(struct pci_dev *pdev, int resource) pci_write_config_dword(pdev, where + 4, 0); } -static void __init apb_init(struct pci_controller_info *p, struct pci_bus *sabre_bus) +static void apb_init(struct pci_controller_info *p, struct pci_bus *sabre_bus) { struct pci_dev *pdev; @@ -1181,7 +1181,7 @@ static struct pcidev_cookie *alloc_bridge_cookie(struct pci_pbm_info *pbm) return cookie; } -static void __init sabre_scan_bus(struct pci_controller_info *p) +static void sabre_scan_bus(struct pci_controller_info *p) { static int once; struct pci_bus *sabre_bus, *pbus; @@ -1262,9 +1262,9 @@ static void __init sabre_scan_bus(struct pci_controller_info *p) sabre_register_error_handlers(p); } -static void __init sabre_iommu_init(struct pci_controller_info *p, - int tsbsize, unsigned long dvma_offset, - u32 dma_mask) +static void sabre_iommu_init(struct pci_controller_info *p, + int tsbsize, unsigned long dvma_offset, + u32 dma_mask) { struct pci_iommu *iommu = p->pbm_A.iommu; unsigned long tsbbase, i, order; @@ -1345,8 +1345,8 @@ static void __init sabre_iommu_init(struct pci_controller_info *p, } } -static void __init pbm_register_toplevel_resources(struct pci_controller_info *p, - struct pci_pbm_info *pbm) +static void pbm_register_toplevel_resources(struct pci_controller_info *p, + struct pci_pbm_info *pbm) { char *name = pbm->name; unsigned long ibase = p->pbm_A.controller_regs + SABRE_IOSPACE; @@ -1415,7 +1415,7 @@ static void __init pbm_register_toplevel_resources(struct pci_controller_info *p &pbm->mem_space); } -static void __init sabre_pbm_init(struct pci_controller_info *p, int sabre_node, u32 dma_begin) +static void sabre_pbm_init(struct pci_controller_info *p, int sabre_node, u32 dma_begin) { struct pci_pbm_info *pbm; char namebuf[128]; @@ -1552,7 +1552,7 @@ static void __init sabre_pbm_init(struct pci_controller_info *p, int sabre_node, } } -void __init sabre_init(int pnode, char *model_name) +void sabre_init(int pnode, char *model_name) { struct linux_prom64_registers pr_regs[2]; struct pci_controller_info *p; diff --git a/arch/sparc64/kernel/pci_schizo.c b/arch/sparc64/kernel/pci_schizo.c index 6a182bb66281..331382e1a75d 100644 --- a/arch/sparc64/kernel/pci_schizo.c +++ b/arch/sparc64/kernel/pci_schizo.c @@ -285,7 +285,7 @@ static unsigned char schizo_pil_table[] = { /*0x3f*/0, /* Reserved for NewLink */ }; -static int __init schizo_ino_to_pil(struct pci_dev *pdev, unsigned int ino) +static int schizo_ino_to_pil(struct pci_dev *pdev, unsigned int ino) { int ret; @@ -1221,7 +1221,7 @@ static irqreturn_t schizo_safarierr_intr(int irq, void *dev_id, struct pt_regs * * PCI bus units of the same Tomatillo. I still have not really * figured this out... */ -static void __init tomatillo_register_error_handlers(struct pci_controller_info *p) +static void tomatillo_register_error_handlers(struct pci_controller_info *p) { struct pci_pbm_info *pbm; unsigned int irq; @@ -1359,7 +1359,7 @@ static void __init tomatillo_register_error_handlers(struct pci_controller_info (SCHIZO_SAFIRQCTRL_EN | (BUS_ERROR_UNMAP))); } -static void __init schizo_register_error_handlers(struct pci_controller_info *p) +static void schizo_register_error_handlers(struct pci_controller_info *p) { struct pci_pbm_info *pbm; unsigned int irq; @@ -1505,7 +1505,7 @@ static void __init schizo_register_error_handlers(struct pci_controller_info *p) (SCHIZO_SAFIRQCTRL_EN | (BUS_ERROR_UNMAP))); } -static void __init pbm_config_busmastering(struct pci_pbm_info *pbm) +static void pbm_config_busmastering(struct pci_pbm_info *pbm) { u8 *addr; @@ -1522,8 +1522,8 @@ static void __init pbm_config_busmastering(struct pci_pbm_info *pbm) pci_config_write8(addr, 64); } -static void __init pbm_scan_bus(struct pci_controller_info *p, - struct pci_pbm_info *pbm) +static void pbm_scan_bus(struct pci_controller_info *p, + struct pci_pbm_info *pbm) { struct pcidev_cookie *cookie = kmalloc(sizeof(*cookie), GFP_KERNEL); @@ -1550,8 +1550,8 @@ static void __init pbm_scan_bus(struct pci_controller_info *p, pci_setup_busmastering(pbm, pbm->pci_bus); } -static void __init __schizo_scan_bus(struct pci_controller_info *p, - int chip_type) +static void __schizo_scan_bus(struct pci_controller_info *p, + int chip_type) { if (!p->pbm_B.prom_node || !p->pbm_A.prom_node) { printk("PCI: Only one PCI bus module of controller found.\n"); @@ -1577,17 +1577,17 @@ static void __init __schizo_scan_bus(struct pci_controller_info *p, schizo_register_error_handlers(p); } -static void __init schizo_scan_bus(struct pci_controller_info *p) +static void schizo_scan_bus(struct pci_controller_info *p) { __schizo_scan_bus(p, PBM_CHIP_TYPE_SCHIZO); } -static void __init tomatillo_scan_bus(struct pci_controller_info *p) +static void tomatillo_scan_bus(struct pci_controller_info *p) { __schizo_scan_bus(p, PBM_CHIP_TYPE_TOMATILLO); } -static void __init schizo_base_address_update(struct pci_dev *pdev, int resource) +static void schizo_base_address_update(struct pci_dev *pdev, int resource) { struct pcidev_cookie *pcp = pdev->sysdata; struct pci_pbm_info *pbm = pcp->pbm; @@ -1632,9 +1632,9 @@ static void __init schizo_base_address_update(struct pci_dev *pdev, int resource pci_write_config_dword(pdev, where + 4, 0); } -static void __init schizo_resource_adjust(struct pci_dev *pdev, - struct resource *res, - struct resource *root) +static void schizo_resource_adjust(struct pci_dev *pdev, + struct resource *res, + struct resource *root) { res->start += root->start; res->end += root->start; @@ -1702,8 +1702,8 @@ static void schizo_determine_mem_io_space(struct pci_pbm_info *pbm) pbm->mem_space.start); } -static void __init pbm_register_toplevel_resources(struct pci_controller_info *p, - struct pci_pbm_info *pbm) +static void pbm_register_toplevel_resources(struct pci_controller_info *p, + struct pci_pbm_info *pbm) { pbm->io_space.name = pbm->mem_space.name = pbm->name; @@ -1932,7 +1932,7 @@ static void schizo_pbm_iommu_init(struct pci_pbm_info *pbm) #define TOMATILLO_PCI_IOC_TDIAG (0x2250UL) #define TOMATILLO_PCI_IOC_DDIAG (0x2290UL) -static void __init schizo_pbm_hw_init(struct pci_pbm_info *pbm) +static void schizo_pbm_hw_init(struct pci_pbm_info *pbm) { u64 tmp; @@ -1986,9 +1986,9 @@ static void __init schizo_pbm_hw_init(struct pci_pbm_info *pbm) } } -static void __init schizo_pbm_init(struct pci_controller_info *p, - int prom_node, u32 portid, - int chip_type) +static void schizo_pbm_init(struct pci_controller_info *p, + int prom_node, u32 portid, + int chip_type) { struct linux_prom64_registers pr_regs[4]; unsigned int busrange[2]; @@ -2145,7 +2145,7 @@ static inline int portid_compare(u32 x, u32 y, int chip_type) return (x == y); } -static void __init __schizo_init(int node, char *model_name, int chip_type) +static void __schizo_init(int node, char *model_name, int chip_type) { struct pci_controller_info *p; struct pci_iommu *iommu; @@ -2213,17 +2213,17 @@ static void __init __schizo_init(int node, char *model_name, int chip_type) schizo_pbm_init(p, node, portid, chip_type); } -void __init schizo_init(int node, char *model_name) +void schizo_init(int node, char *model_name) { __schizo_init(node, model_name, PBM_CHIP_TYPE_SCHIZO); } -void __init schizo_plus_init(int node, char *model_name) +void schizo_plus_init(int node, char *model_name) { __schizo_init(node, model_name, PBM_CHIP_TYPE_SCHIZO_PLUS); } -void __init tomatillo_init(int node, char *model_name) +void tomatillo_init(int node, char *model_name) { __schizo_init(node, model_name, PBM_CHIP_TYPE_TOMATILLO); } |
