diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/include/asm/cpm.h | 24 | ||||
-rw-r--r-- | arch/powerpc/include/asm/cpm1.h | 3 | ||||
-rw-r--r-- | arch/powerpc/kernel/fsl_booke_entry_mapping.S | 4 | ||||
-rw-r--r-- | arch/powerpc/sysdev/micropatch.c | 30 | ||||
-rw-r--r-- | arch/x86/include/asm/x86_init.h | 2 | ||||
-rw-r--r-- | arch/x86/kernel/mrst.c | 7 | ||||
-rw-r--r-- | arch/x86/kernel/x86_init.c | 7 | ||||
-rw-r--r-- | arch/x86/kvm/mmu.c | 2 | ||||
-rw-r--r-- | arch/x86/kvm/vmx.c | 7 |
9 files changed, 64 insertions, 22 deletions
diff --git a/arch/powerpc/include/asm/cpm.h b/arch/powerpc/include/asm/cpm.h index 0835eb977ba9..e50323fe941f 100644 --- a/arch/powerpc/include/asm/cpm.h +++ b/arch/powerpc/include/asm/cpm.h @@ -7,6 +7,30 @@ #include <linux/of.h> /* + * SPI Parameter RAM common to QE and CPM. + */ +struct spi_pram { + __be16 rbase; /* Rx Buffer descriptor base address */ + __be16 tbase; /* Tx Buffer descriptor base address */ + u8 rfcr; /* Rx function code */ + u8 tfcr; /* Tx function code */ + __be16 mrblr; /* Max receive buffer length */ + __be32 rstate; /* Internal */ + __be32 rdp; /* Internal */ + __be16 rbptr; /* Internal */ + __be16 rbc; /* Internal */ + __be32 rxtmp; /* Internal */ + __be32 tstate; /* Internal */ + __be32 tdp; /* Internal */ + __be16 tbptr; /* Internal */ + __be16 tbc; /* Internal */ + __be32 txtmp; /* Internal */ + __be32 res; /* Tx temp. */ + __be16 rpbase; /* Relocation pointer (CPM1 only) */ + __be16 res1; /* Reserved */ +}; + +/* * USB Controller pram common to QE and CPM. */ struct usb_ctlr { diff --git a/arch/powerpc/include/asm/cpm1.h b/arch/powerpc/include/asm/cpm1.h index 81b01192f440..bd07650dca56 100644 --- a/arch/powerpc/include/asm/cpm1.h +++ b/arch/powerpc/include/asm/cpm1.h @@ -17,6 +17,7 @@ #ifndef __CPM1__ #define __CPM1__ +#include <linux/init.h> #include <asm/8xx_immap.h> #include <asm/ptrace.h> #include <asm/cpm.h> @@ -54,7 +55,7 @@ extern cpm8xx_t __iomem *cpmp; /* Pointer to comm processor */ extern void cpm_setbrg(uint brg, uint rate); -extern void cpm_load_patch(cpm8xx_t *cp); +extern void __init cpm_load_patch(cpm8xx_t *cp); extern void cpm_reset(void); diff --git a/arch/powerpc/kernel/fsl_booke_entry_mapping.S b/arch/powerpc/kernel/fsl_booke_entry_mapping.S index beb4d78a2304..a92c79be2728 100644 --- a/arch/powerpc/kernel/fsl_booke_entry_mapping.S +++ b/arch/powerpc/kernel/fsl_booke_entry_mapping.S @@ -205,8 +205,7 @@ next_tlb_setup: bdnz+ next_tlb_setup /* 7. Jump to our 1:1 mapping */ - li r6, 0 - + mr r6, r25 #else #error You need to specify the mapping or not use this at all. #endif @@ -217,7 +216,6 @@ next_tlb_setup: 1: mflr r9 rlwimi r6,r9,0,20,31 addi r6,r6,(2f - 1b) - add r6, r6, r25 mtspr SPRN_SRR0,r6 mtspr SPRN_SRR1,r7 rfi /* start execution out of TLB1[0] entry */ diff --git a/arch/powerpc/sysdev/micropatch.c b/arch/powerpc/sysdev/micropatch.c index d8d602840757..c0bb76ef7242 100644 --- a/arch/powerpc/sysdev/micropatch.c +++ b/arch/powerpc/sysdev/micropatch.c @@ -4,6 +4,7 @@ * also relocates SMC2, but this would require additional changes * to uart.c, so I am holding off on that for a moment. */ +#include <linux/init.h> #include <linux/errno.h> #include <linux/sched.h> #include <linux/kernel.h> @@ -16,6 +17,7 @@ #include <asm/page.h> #include <asm/pgtable.h> #include <asm/8xx_immap.h> +#include <asm/cpm.h> #include <asm/cpm1.h> /* @@ -24,7 +26,7 @@ #ifdef CONFIG_I2C_SPI_UCODE_PATCH -uint patch_2000[] = { +static uint patch_2000[] __initdata = { 0x7FFFEFD9, 0x3FFD0000, 0x7FFB49F7, @@ -143,7 +145,7 @@ uint patch_2000[] = { 0x5F8247F8 }; -uint patch_2f00[] = { +static uint patch_2f00[] __initdata = { 0x3E303430, 0x34343737, 0xABF7BF9B, @@ -182,7 +184,7 @@ uint patch_2f00[] = { #ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH -uint patch_2000[] = { +static uint patch_2000[] __initdata = { 0x3fff0000, 0x3ffd0000, 0x3ffb0000, @@ -505,7 +507,7 @@ uint patch_2000[] = { 0x6079e2bb }; -uint patch_2f00[] = { +static uint patch_2f00[] __initdata = { 0x30303030, 0x3e3e3434, 0xabbf9b99, @@ -572,7 +574,7 @@ uint patch_2f00[] = { 0xf22f3f23 }; -uint patch_2e00[] = { +static uint patch_2e00[] __initdata = { 0x27eeeeee, 0xeeeeeeee, 0xeeeeeeee, @@ -598,7 +600,7 @@ uint patch_2e00[] = { #ifdef CONFIG_USB_SOF_UCODE_PATCH -uint patch_2000[] = { +static uint patch_2000[] __initdata = { 0x7fff0000, 0x7ffd0000, 0x7ffb0000, @@ -613,21 +615,25 @@ uint patch_2000[] = { 0x60750000 }; -uint patch_2f00[] = { +static uint patch_2f00[] __initdata = { 0x3030304c, 0xcab9e441, 0xa1aaf220 }; #endif -void -cpm_load_patch(cpm8xx_t *cp) +void __init cpm_load_patch(cpm8xx_t *cp) { volatile uint *dp; /* Dual-ported RAM. */ volatile cpm8xx_t *commproc; +#if defined(CONFIG_I2C_SPI_UCODE_PATCH) || \ + defined(CONFIG_I2C_SPI_SMC1_UCODE_PATCH) volatile iic_t *iip; - volatile spi_t *spp; + volatile struct spi_pram *spp; +#ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH volatile smc_uart_t *smp; +#endif +#endif int i; commproc = cp; @@ -668,8 +674,8 @@ cpm_load_patch(cpm8xx_t *cp) /* Put SPI above the IIC, also 32-byte aligned. */ i = (RPBASE + sizeof(iic_t) + 31) & ~31; - spp = (spi_t *)&commproc->cp_dparam[PROFF_SPI]; - spp->spi_rpbase = i; + spp = (struct spi_pram *)&commproc->cp_dparam[PROFF_SPI]; + spp->rpbase = i; # if defined(CONFIG_I2C_SPI_UCODE_PATCH) commproc->cp_cpmcr1 = 0x802a; diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h index 519b54327d75..baa579c8e038 100644 --- a/arch/x86/include/asm/x86_init.h +++ b/arch/x86/include/asm/x86_init.h @@ -142,6 +142,7 @@ struct x86_cpuinit_ops { * @set_wallclock: set time back to HW clock * @is_untracked_pat_range exclude from PAT logic * @nmi_init enable NMI on cpus + * @i8042_detect pre-detect if i8042 controller exists */ struct x86_platform_ops { unsigned long (*calibrate_tsc)(void); @@ -150,6 +151,7 @@ struct x86_platform_ops { void (*iommu_shutdown)(void); bool (*is_untracked_pat_range)(u64 start, u64 end); void (*nmi_init)(void); + int (*i8042_detect)(void); }; extern struct x86_init_ops x86_init; diff --git a/arch/x86/kernel/mrst.c b/arch/x86/kernel/mrst.c index e796448f0eb5..5915e0b33303 100644 --- a/arch/x86/kernel/mrst.c +++ b/arch/x86/kernel/mrst.c @@ -216,6 +216,12 @@ static void __init mrst_setup_boot_clock(void) setup_boot_APIC_clock(); }; +/* MID systems don't have i8042 controller */ +static int mrst_i8042_detect(void) +{ + return 0; +} + /* * Moorestown specific x86_init function overrides and early setup * calls. @@ -233,6 +239,7 @@ void __init x86_mrst_early_setup(void) x86_cpuinit.setup_percpu_clockev = mrst_setup_secondary_clock; x86_platform.calibrate_tsc = mrst_calibrate_tsc; + x86_platform.i8042_detect = mrst_i8042_detect; x86_init.pci.init = pci_mrst_init; x86_init.pci.fixup_irqs = x86_init_noop; diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c index 61a1e8c7e19f..cd6da6bf3eca 100644 --- a/arch/x86/kernel/x86_init.c +++ b/arch/x86/kernel/x86_init.c @@ -5,6 +5,7 @@ */ #include <linux/init.h> #include <linux/ioport.h> +#include <linux/module.h> #include <asm/bios_ebda.h> #include <asm/paravirt.h> @@ -85,6 +86,7 @@ struct x86_cpuinit_ops x86_cpuinit __cpuinitdata = { }; static void default_nmi_init(void) { }; +static int default_i8042_detect(void) { return 1; }; struct x86_platform_ops x86_platform = { .calibrate_tsc = native_calibrate_tsc, @@ -92,5 +94,8 @@ struct x86_platform_ops x86_platform = { .set_wallclock = mach_set_rtc_mmss, .iommu_shutdown = iommu_shutdown_noop, .is_untracked_pat_range = is_ISA_range, - .nmi_init = default_nmi_init + .nmi_init = default_nmi_init, + .i8042_detect = default_i8042_detect }; + +EXPORT_SYMBOL_GPL(x86_platform); diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index a6f695d76928..3699613e8830 100644 --- a/arch/x86/kvm/mmu.c +++ b/arch/x86/kvm/mmu.c @@ -1879,6 +1879,8 @@ static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep, pgprintk("hfn old %lx new %lx\n", spte_to_pfn(*sptep), pfn); rmap_remove(vcpu->kvm, sptep); + __set_spte(sptep, shadow_trap_nonpresent_pte); + kvm_flush_remote_tlbs(vcpu->kvm); } else was_rmapped = 1; } diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 859a01a07dbf..ee03679efe78 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -1744,18 +1744,15 @@ static void enter_lmode(struct kvm_vcpu *vcpu) (guest_tr_ar & ~AR_TYPE_MASK) | AR_TYPE_BUSY_64_TSS); } - vcpu->arch.efer |= EFER_LMA; - vmx_set_efer(vcpu, vcpu->arch.efer); + vmx_set_efer(vcpu, vcpu->arch.efer | EFER_LMA); } static void exit_lmode(struct kvm_vcpu *vcpu) { - vcpu->arch.efer &= ~EFER_LMA; - vmcs_write32(VM_ENTRY_CONTROLS, vmcs_read32(VM_ENTRY_CONTROLS) & ~VM_ENTRY_IA32E_MODE); - vmx_set_efer(vcpu, vcpu->arch.efer); + vmx_set_efer(vcpu, vcpu->arch.efer & ~EFER_LMA); } #endif |