diff options
Diffstat (limited to 'arch')
39 files changed, 703 insertions, 31 deletions
diff --git a/arch/arm/configs/orion5x_defconfig b/arch/arm/configs/orion5x_defconfig index 9578b5d9f9c7..1464ffe71717 100644 --- a/arch/arm/configs/orion5x_defconfig +++ b/arch/arm/configs/orion5x_defconfig @@ -757,7 +757,14 @@ CONFIG_INPUT_EVDEV=y # # Input Device Drivers # -# CONFIG_INPUT_KEYBOARD is not set +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +CONFIG_KEYBOARD_GPIO=y # CONFIG_INPUT_MOUSE is not set # CONFIG_INPUT_JOYSTICK is not set # CONFIG_INPUT_TABLET is not set @@ -1111,11 +1118,11 @@ CONFIG_RTC_DRV_DS1307=y CONFIG_RTC_DRV_RS5C372=y # CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set +CONFIG_RTC_DRV_PCF8563=y # CONFIG_RTC_DRV_PCF8583 is not set CONFIG_RTC_DRV_M41T80=y # CONFIG_RTC_DRV_M41T80_WDT is not set -# CONFIG_RTC_DRV_S35390A is not set +CONFIG_RTC_DRV_S35390A=y # # SPI RTC drivers diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h index 1e070a2b561a..7bcd69a9a88c 100644 --- a/arch/arm/include/asm/memory.h +++ b/arch/arm/include/asm/memory.h @@ -150,6 +150,14 @@ #endif /* + * Amount of memory reserved for the vmalloc() area, and minimum + * address for vmalloc mappings. + */ +extern unsigned long vmalloc_reserve; + +#define VMALLOC_MIN (void *)(VMALLOC_END - vmalloc_reserve) + +/* * PFNs are used to describe any physical page; this means * PFN 0 == physical address 0. * diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 38f0e7940a13..2ca7038b67a7 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -81,6 +81,8 @@ EXPORT_SYMBOL(system_serial_high); unsigned int elf_hwcap; EXPORT_SYMBOL(elf_hwcap); +unsigned long __initdata vmalloc_reserve = 128 << 20; + #ifdef MULTI_CPU struct processor processor; @@ -501,6 +503,17 @@ static void __init early_mem(char **p) __early_param("mem=", early_mem); /* + * vmalloc=size forces the vmalloc area to be exactly 'size' + * bytes. This can be used to increase (or decrease) the vmalloc + * area - the default is 128m. + */ +static void __init early_vmalloc(char **arg) +{ + vmalloc_reserve = memparse(*arg, arg); +} +__early_param("vmalloc=", early_vmalloc); + +/* * Initial parsing of the command line. */ static void __init parse_cmdline(char **cmdline_p, char *from) diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c index 0e509b8ad56e..189f16f3619d 100644 --- a/arch/arm/mach-kirkwood/common.c +++ b/arch/arm/mach-kirkwood/common.c @@ -15,15 +15,17 @@ #include <linux/mbus.h> #include <linux/mv643xx_eth.h> #include <linux/ata_platform.h> +#include <linux/spi/orion_spi.h> #include <asm/page.h> #include <asm/timex.h> #include <asm/mach/map.h> #include <asm/mach/time.h> #include <mach/kirkwood.h> -#include <asm/plat-orion/cache-feroceon-l2.h> -#include <asm/plat-orion/ehci-orion.h> -#include <asm/plat-orion/orion_nand.h> -#include <asm/plat-orion/time.h> +#include <plat/cache-feroceon-l2.h> +#include <plat/ehci-orion.h> +#include <plat/mv_xor.h> +#include <plat/orion_nand.h> +#include <plat/time.h> #include "common.h" /***************************************************************************** @@ -196,6 +198,37 @@ void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data) /***************************************************************************** + * SPI + ****************************************************************************/ +static struct orion_spi_info kirkwood_spi_plat_data = { + .tclk = KIRKWOOD_TCLK, +}; + +static struct resource kirkwood_spi_resources[] = { + { + .start = SPI_PHYS_BASE, + .end = SPI_PHYS_BASE + SZ_512 - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device kirkwood_spi = { + .name = "orion_spi", + .id = 0, + .resource = kirkwood_spi_resources, + .dev = { + .platform_data = &kirkwood_spi_plat_data, + }, + .num_resources = ARRAY_SIZE(kirkwood_spi_resources), +}; + +void __init kirkwood_spi_init() +{ + platform_device_register(&kirkwood_spi); +} + + +/***************************************************************************** * UART0 ****************************************************************************/ static struct plat_serial8250_port kirkwood_uart0_data[] = { @@ -284,6 +317,212 @@ void __init kirkwood_uart1_init(void) /***************************************************************************** + * XOR + ****************************************************************************/ +static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = { + .dram = &kirkwood_mbus_dram_info, +}; + +static u64 kirkwood_xor_dmamask = DMA_32BIT_MASK; + + +/***************************************************************************** + * XOR0 + ****************************************************************************/ +static struct resource kirkwood_xor0_shared_resources[] = { + { + .name = "xor 0 low", + .start = XOR0_PHYS_BASE, + .end = XOR0_PHYS_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, { + .name = "xor 0 high", + .start = XOR0_HIGH_PHYS_BASE, + .end = XOR0_HIGH_PHYS_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device kirkwood_xor0_shared = { + .name = MV_XOR_SHARED_NAME, + .id = 0, + .dev = { + .platform_data = &kirkwood_xor_shared_data, + }, + .num_resources = ARRAY_SIZE(kirkwood_xor0_shared_resources), + .resource = kirkwood_xor0_shared_resources, +}; + +static struct resource kirkwood_xor00_resources[] = { + [0] = { + .start = IRQ_KIRKWOOD_XOR_00, + .end = IRQ_KIRKWOOD_XOR_00, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct mv_xor_platform_data kirkwood_xor00_data = { + .shared = &kirkwood_xor0_shared, + .hw_id = 0, + .pool_size = PAGE_SIZE, +}; + +static struct platform_device kirkwood_xor00_channel = { + .name = MV_XOR_NAME, + .id = 0, + .num_resources = ARRAY_SIZE(kirkwood_xor00_resources), + .resource = kirkwood_xor00_resources, + .dev = { + .dma_mask = &kirkwood_xor_dmamask, + .coherent_dma_mask = DMA_64BIT_MASK, + .platform_data = (void *)&kirkwood_xor00_data, + }, +}; + +static struct resource kirkwood_xor01_resources[] = { + [0] = { + .start = IRQ_KIRKWOOD_XOR_01, + .end = IRQ_KIRKWOOD_XOR_01, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct mv_xor_platform_data kirkwood_xor01_data = { + .shared = &kirkwood_xor0_shared, + .hw_id = 1, + .pool_size = PAGE_SIZE, +}; + +static struct platform_device kirkwood_xor01_channel = { + .name = MV_XOR_NAME, + .id = 1, + .num_resources = ARRAY_SIZE(kirkwood_xor01_resources), + .resource = kirkwood_xor01_resources, + .dev = { + .dma_mask = &kirkwood_xor_dmamask, + .coherent_dma_mask = DMA_64BIT_MASK, + .platform_data = (void *)&kirkwood_xor01_data, + }, +}; + +void __init kirkwood_xor0_init(void) +{ + platform_device_register(&kirkwood_xor0_shared); + + /* + * two engines can't do memset simultaneously, this limitation + * satisfied by removing memset support from one of the engines. + */ + dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask); + dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask); + platform_device_register(&kirkwood_xor00_channel); + + dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask); + dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask); + dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask); + platform_device_register(&kirkwood_xor01_channel); +} + + +/***************************************************************************** + * XOR1 + ****************************************************************************/ +static struct resource kirkwood_xor1_shared_resources[] = { + { + .name = "xor 1 low", + .start = XOR1_PHYS_BASE, + .end = XOR1_PHYS_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, { + .name = "xor 1 high", + .start = XOR1_HIGH_PHYS_BASE, + .end = XOR1_HIGH_PHYS_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device kirkwood_xor1_shared = { + .name = MV_XOR_SHARED_NAME, + .id = 1, + .dev = { + .platform_data = &kirkwood_xor_shared_data, + }, + .num_resources = ARRAY_SIZE(kirkwood_xor1_shared_resources), + .resource = kirkwood_xor1_shared_resources, +}; + +static struct resource kirkwood_xor10_resources[] = { + [0] = { + .start = IRQ_KIRKWOOD_XOR_10, + .end = IRQ_KIRKWOOD_XOR_10, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct mv_xor_platform_data kirkwood_xor10_data = { + .shared = &kirkwood_xor1_shared, + .hw_id = 0, + .pool_size = PAGE_SIZE, +}; + +static struct platform_device kirkwood_xor10_channel = { + .name = MV_XOR_NAME, + .id = 2, + .num_resources = ARRAY_SIZE(kirkwood_xor10_resources), + .resource = kirkwood_xor10_resources, + .dev = { + .dma_mask = &kirkwood_xor_dmamask, + .coherent_dma_mask = DMA_64BIT_MASK, + .platform_data = (void *)&kirkwood_xor10_data, + }, +}; + +static struct resource kirkwood_xor11_resources[] = { + [0] = { + .start = IRQ_KIRKWOOD_XOR_11, + .end = IRQ_KIRKWOOD_XOR_11, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct mv_xor_platform_data kirkwood_xor11_data = { + .shared = &kirkwood_xor1_shared, + .hw_id = 1, + .pool_size = PAGE_SIZE, +}; + +static struct platform_device kirkwood_xor11_channel = { + .name = MV_XOR_NAME, + .id = 3, + .num_resources = ARRAY_SIZE(kirkwood_xor11_resources), + .resource = kirkwood_xor11_resources, + .dev = { + .dma_mask = &kirkwood_xor_dmamask, + .coherent_dma_mask = DMA_64BIT_MASK, + .platform_data = (void *)&kirkwood_xor11_data, + }, +}; + +void __init kirkwood_xor1_init(void) +{ + platform_device_register(&kirkwood_xor1_shared); + + /* + * two engines can't do memset simultaneously, this limitation + * satisfied by removing memset support from one of the engines. + */ + dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask); + dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask); + platform_device_register(&kirkwood_xor10_channel); + + dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask); + dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask); + dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask); + platform_device_register(&kirkwood_xor11_channel); +} + + +/***************************************************************************** * Time handling ****************************************************************************/ static void kirkwood_timer_init(void) diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h index 5dee2f6b40a5..69cd113af03a 100644 --- a/arch/arm/mach-kirkwood/common.h +++ b/arch/arm/mach-kirkwood/common.h @@ -33,8 +33,11 @@ void kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data); void kirkwood_pcie_init(void); void kirkwood_rtc_init(void); void kirkwood_sata_init(struct mv_sata_platform_data *sata_data); +void kirkwood_spi_init(void); void kirkwood_uart0_init(void); void kirkwood_uart1_init(void); +void kirkwood_xor0_init(void); +void kirkwood_xor1_init(void); extern struct sys_timer kirkwood_timer; diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h index d1336b41f0fb..5c69992295e8 100644 --- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h +++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h @@ -88,6 +88,15 @@ #define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x50000) +#define XOR0_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x60800) +#define XOR0_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x60800) +#define XOR1_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x60900) +#define XOR1_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x60900) +#define XOR0_HIGH_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x60A00) +#define XOR0_HIGH_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x60A00) +#define XOR1_HIGH_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x60B00) +#define XOR1_HIGH_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x60B00) + #define GE00_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x70000) #define GE01_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x74000) diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c index 302bb2cf6669..5790643ffe07 100644 --- a/arch/arm/mach-kirkwood/irq.c +++ b/arch/arm/mach-kirkwood/irq.c @@ -12,7 +12,7 @@ #include <linux/init.h> #include <linux/irq.h> #include <linux/io.h> -#include <asm/plat-orion/irq.h> +#include <plat/irq.h> #include "common.h" void __init kirkwood_init_irq(void) diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c index 8282d0ff84bf..2195fa31f6b7 100644 --- a/arch/arm/mach-kirkwood/pcie.c +++ b/arch/arm/mach-kirkwood/pcie.c @@ -12,7 +12,7 @@ #include <linux/pci.h> #include <linux/mbus.h> #include <asm/mach/pci.h> -#include <asm/plat-orion/pcie.h> +#include <plat/pcie.h> #include "common.h" diff --git a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c index 182230a5d198..a3012d445971 100644 --- a/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c +++ b/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c @@ -18,6 +18,9 @@ #include <linux/timer.h> #include <linux/ata_platform.h> #include <linux/mv643xx_eth.h> +#include <linux/spi/flash.h> +#include <linux/spi/spi.h> +#include <linux/spi/orion_spi.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> #include <asm/mach/pci.h> @@ -34,6 +37,21 @@ static struct mv_sata_platform_data rd88f6192_sata_data = { .n_ports = 2, }; +static const struct flash_platform_data rd88F6192_spi_slave_data = { + .type = "m25p128", +}; + +static struct spi_board_info __initdata rd88F6192_spi_slave_info[] = { + { + .modalias = "m25p80", + .platform_data = &rd88F6192_spi_slave_data, + .irq = -1, + .max_speed_hz = 20000000, + .bus_num = 0, + .chip_select = 0, + }, +}; + static void __init rd88f6192_init(void) { /* @@ -45,7 +63,12 @@ static void __init rd88f6192_init(void) kirkwood_ge00_init(&rd88f6192_ge00_data); kirkwood_rtc_init(); kirkwood_sata_init(&rd88f6192_sata_data); + spi_register_board_info(rd88F6192_spi_slave_info, + ARRAY_SIZE(rd88F6192_spi_slave_info)); + kirkwood_spi_init(); kirkwood_uart0_init(); + kirkwood_xor0_init(); + kirkwood_xor1_init(); } static int __init rd88f6192_pci_init(void) diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c index d8a43018c7d3..d96487a0f18b 100644 --- a/arch/arm/mach-kirkwood/rd88f6281-setup.c +++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c @@ -23,7 +23,7 @@ #include <asm/mach/arch.h> #include <asm/mach/pci.h> #include <mach/kirkwood.h> -#include <asm/plat-orion/orion_nand.h> +#include <plat/orion_nand.h> #include "common.h" static struct mtd_partition rd88f6281_nand_parts[] = { diff --git a/arch/arm/mach-loki/common.c b/arch/arm/mach-loki/common.c index e20cdbca1ebe..c0d2d9d12e74 100644 --- a/arch/arm/mach-loki/common.c +++ b/arch/arm/mach-loki/common.c @@ -19,8 +19,8 @@ #include <asm/mach/map.h> #include <asm/mach/time.h> #include <mach/loki.h> -#include <asm/plat-orion/orion_nand.h> -#include <asm/plat-orion/time.h> +#include <plat/orion_nand.h> +#include <plat/time.h> #include "common.h" /***************************************************************************** diff --git a/arch/arm/mach-loki/irq.c b/arch/arm/mach-loki/irq.c index d839af91fe03..5a487930cb2f 100644 --- a/arch/arm/mach-loki/irq.c +++ b/arch/arm/mach-loki/irq.c @@ -12,7 +12,7 @@ #include <linux/init.h> #include <linux/irq.h> #include <asm/io.h> -#include <asm/plat-orion/irq.h> +#include <plat/irq.h> #include "common.h" void __init loki_init_irq(void) diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c index e633f9cb239f..953a26c469cb 100644 --- a/arch/arm/mach-mv78xx0/common.c +++ b/arch/arm/mach-mv78xx0/common.c @@ -18,10 +18,10 @@ #include <asm/mach/map.h> #include <asm/mach/time.h> #include <mach/mv78xx0.h> -#include <asm/plat-orion/cache-feroceon-l2.h> -#include <asm/plat-orion/ehci-orion.h> -#include <asm/plat-orion/orion_nand.h> -#include <asm/plat-orion/time.h> +#include <plat/cache-feroceon-l2.h> +#include <plat/ehci-orion.h> +#include <plat/orion_nand.h> +#include <plat/time.h> #include "common.h" diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c index 3198abf54c90..28248d37b999 100644 --- a/arch/arm/mach-mv78xx0/irq.c +++ b/arch/arm/mach-mv78xx0/irq.c @@ -12,7 +12,7 @@ #include <linux/init.h> #include <linux/pci.h> #include <mach/mv78xx0.h> -#include <asm/plat-orion/irq.h> +#include <plat/irq.h> #include "common.h" void __init mv78xx0_init_irq(void) diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c index b78e1443159f..430ea84d587d 100644 --- a/arch/arm/mach-mv78xx0/pcie.c +++ b/arch/arm/mach-mv78xx0/pcie.c @@ -12,7 +12,7 @@ #include <linux/pci.h> #include <linux/mbus.h> #include <asm/mach/pci.h> -#include <asm/plat-orion/pcie.h> +#include <plat/pcie.h> #include "common.h" struct pcie_port { diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index 168eeacaa4c0..7b11e552bc5a 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c @@ -26,9 +26,10 @@ #include <asm/mach/time.h> #include <mach/hardware.h> #include <mach/orion5x.h> -#include <asm/plat-orion/ehci-orion.h> -#include <asm/plat-orion/orion_nand.h> -#include <asm/plat-orion/time.h> +#include <plat/ehci-orion.h> +#include <plat/mv_xor.h> +#include <plat/orion_nand.h> +#include <plat/time.h> #include "common.h" /***************************************************************************** @@ -355,6 +356,103 @@ void __init orion5x_uart1_init(void) /***************************************************************************** + * XOR engine + ****************************************************************************/ +static struct resource orion5x_xor_shared_resources[] = { + { + .name = "xor low", + .start = ORION5X_XOR_PHYS_BASE, + .end = ORION5X_XOR_PHYS_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, { + .name = "xor high", + .start = ORION5X_XOR_PHYS_BASE + 0x200, + .end = ORION5X_XOR_PHYS_BASE + 0x2ff, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device orion5x_xor_shared = { + .name = MV_XOR_SHARED_NAME, + .id = 0, + .num_resources = ARRAY_SIZE(orion5x_xor_shared_resources), + .resource = orion5x_xor_shared_resources, +}; + +static u64 orion5x_xor_dmamask = DMA_32BIT_MASK; + +static struct resource orion5x_xor0_resources[] = { + [0] = { + .start = IRQ_ORION5X_XOR0, + .end = IRQ_ORION5X_XOR0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct mv_xor_platform_data orion5x_xor0_data = { + .shared = &orion5x_xor_shared, + .hw_id = 0, + .pool_size = PAGE_SIZE, +}; + +static struct platform_device orion5x_xor0_channel = { + .name = MV_XOR_NAME, + .id = 0, + .num_resources = ARRAY_SIZE(orion5x_xor0_resources), + .resource = orion5x_xor0_resources, + .dev = { + .dma_mask = &orion5x_xor_dmamask, + .coherent_dma_mask = DMA_64BIT_MASK, + .platform_data = (void *)&orion5x_xor0_data, + }, +}; + +static struct resource orion5x_xor1_resources[] = { + [0] = { + .start = IRQ_ORION5X_XOR1, + .end = IRQ_ORION5X_XOR1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct mv_xor_platform_data orion5x_xor1_data = { + .shared = &orion5x_xor_shared, + .hw_id = 1, + .pool_size = PAGE_SIZE, +}; + +static struct platform_device orion5x_xor1_channel = { + .name = MV_XOR_NAME, + .id = 1, + .num_resources = ARRAY_SIZE(orion5x_xor1_resources), + .resource = orion5x_xor1_resources, + .dev = { + .dma_mask = &orion5x_xor_dmamask, + .coherent_dma_mask = DMA_64BIT_MASK, + .platform_data = (void *)&orion5x_xor1_data, + }, +}; + +void __init orion5x_xor_init(void) +{ + platform_device_register(&orion5x_xor_shared); + + /* + * two engines can't do memset simultaneously, this limitation + * satisfied by removing memset support from one of the engines. + */ + dma_cap_set(DMA_MEMCPY, orion5x_xor0_data.cap_mask); + dma_cap_set(DMA_XOR, orion5x_xor0_data.cap_mask); + platform_device_register(&orion5x_xor0_channel); + + dma_cap_set(DMA_MEMCPY, orion5x_xor1_data.cap_mask); + dma_cap_set(DMA_MEMSET, orion5x_xor1_data.cap_mask); + dma_cap_set(DMA_XOR, orion5x_xor1_data.cap_mask); + platform_device_register(&orion5x_xor1_channel); +} + + +/***************************************************************************** * Time handling ****************************************************************************/ static void orion5x_timer_init(void) @@ -382,6 +480,8 @@ static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name) *dev_name = "MV88F5281-D2"; } else if (*rev == MV88F5281_REV_D1) { *dev_name = "MV88F5281-D1"; + } else if (*rev == MV88F5281_REV_D0) { + *dev_name = "MV88F5281-D0"; } else { *dev_name = "MV88F5281-Rev-Unsupported"; } @@ -416,6 +516,15 @@ void __init orion5x_init(void) * Setup Orion address map */ orion5x_setup_cpu_mbus_bridge(); + + /* + * Don't issue "Wait for Interrupt" instruction if we are + * running on D0 5281 silicon. + */ + if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) { + printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n"); + disable_hlt(); + } } /* diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h index f72cf0e77544..e75bd7004b94 100644 --- a/arch/arm/mach-orion5x/common.h +++ b/arch/arm/mach-orion5x/common.h @@ -32,6 +32,7 @@ void orion5x_i2c_init(void); void orion5x_sata_init(struct mv_sata_platform_data *sata_data); void orion5x_uart0_init(void); void orion5x_uart1_init(void); +void orion5x_xor_init(void); /* * PCIe/PCI functions. diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c index 48ce6d0e0020..ff13e9060b18 100644 --- a/arch/arm/mach-orion5x/db88f5281-setup.c +++ b/arch/arm/mach-orion5x/db88f5281-setup.c @@ -25,7 +25,7 @@ #include <asm/mach/arch.h> #include <asm/mach/pci.h> #include <mach/orion5x.h> -#include <asm/plat-orion/orion_nand.h> +#include <plat/orion_nand.h> #include "common.h" #include "mpp.h" diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h index f52a7d65bec2..61eb74a88862 100644 --- a/arch/arm/mach-orion5x/include/mach/orion5x.h +++ b/arch/arm/mach-orion5x/include/mach/orion5x.h @@ -73,6 +73,7 @@ #define MV88F5182_REV_A2 2 /* Orion-2 (88F5281) */ #define MV88F5281_DEV_ID 0x5281 +#define MV88F5281_REV_D0 4 #define MV88F5281_REV_D1 5 #define MV88F5281_REV_D2 6 @@ -105,6 +106,10 @@ #define ORION5X_USB0_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x50000) #define ORION5X_USB0_REG(x) (ORION5X_USB0_VIRT_BASE | (x)) +#define ORION5X_XOR_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x60900) +#define ORION5X_XOR_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x60900) +#define ORION5X_XOR_REG(x) (ORION5X_XOR_VIRT_BASE | (x)) + #define ORION5X_ETH_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x70000) #define ORION5X_ETH_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x70000) #define ORION5X_ETH_REG(x) (ORION5X_ETH_VIRT_BASE | (x)) diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c index cc2a017fd2a9..2545ff9e5830 100644 --- a/arch/arm/mach-orion5x/irq.c +++ b/arch/arm/mach-orion5x/irq.c @@ -16,7 +16,7 @@ #include <asm/gpio.h> #include <asm/io.h> #include <mach/orion5x.h> -#include <asm/plat-orion/irq.h> +#include <plat/irq.h> #include "common.h" /***************************************************************************** diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c index 0caaaac74bc1..cb72f1bb9cb7 100644 --- a/arch/arm/mach-orion5x/kurobox_pro-setup.c +++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c @@ -25,7 +25,7 @@ #include <asm/mach/arch.h> #include <asm/mach/pci.h> #include <mach/orion5x.h> -#include <asm/plat-orion/orion_nand.h> +#include <plat/orion_nand.h> #include "common.h" #include "mpp.h" @@ -356,6 +356,7 @@ static void __init kurobox_pro_init(void) orion5x_sata_init(&kurobox_pro_sata_data); orion5x_uart0_init(); orion5x_uart1_init(); + orion5x_xor_init(); orion5x_setup_dev_boot_win(KUROBOX_PRO_NOR_BOOT_BASE, KUROBOX_PRO_NOR_BOOT_SIZE); diff --git a/arch/arm/mach-orion5x/mss2-setup.c b/arch/arm/mach-orion5x/mss2-setup.c index 4403cc963d66..53ff1893b883 100644 --- a/arch/arm/mach-orion5x/mss2-setup.c +++ b/arch/arm/mach-orion5x/mss2-setup.c @@ -239,6 +239,7 @@ static void __init mss2_init(void) orion5x_i2c_init(); orion5x_sata_init(&mss2_sata_data); orion5x_uart0_init(); + orion5x_xor_init(); orion5x_setup_dev_boot_win(MSS2_NOR_BOOT_BASE, MSS2_NOR_BOOT_SIZE); platform_device_register(&mss2_nor_flash); diff --git a/arch/arm/mach-orion5x/mv2120-setup.c b/arch/arm/mach-orion5x/mv2120-setup.c index 67b2c0df615f..978d4d599396 100644 --- a/arch/arm/mach-orion5x/mv2120-setup.c +++ b/arch/arm/mach-orion5x/mv2120-setup.c @@ -203,6 +203,7 @@ static void __init mv2120_init(void) orion5x_i2c_init(); orion5x_sata_init(&mv2120_sata_data); orion5x_uart0_init(); + orion5x_xor_init(); orion5x_setup_dev_boot_win(MV2120_NOR_BOOT_BASE, MV2120_NOR_BOOT_SIZE); platform_device_register(&mv2120_nor_flash); diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c index 256a4f680935..fbceecc4b7ec 100644 --- a/arch/arm/mach-orion5x/pci.c +++ b/arch/arm/mach-orion5x/pci.c @@ -14,7 +14,7 @@ #include <linux/pci.h> #include <linux/mbus.h> #include <asm/mach/pci.h> -#include <asm/plat-orion/pcie.h> +#include <plat/pcie.h> #include "common.h" /***************************************************************************** diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c index 8771cb76f0dc..4c3bcd76ac85 100644 --- a/arch/arm/mach-orion5x/rd88f5182-setup.c +++ b/arch/arm/mach-orion5x/rd88f5182-setup.c @@ -292,6 +292,7 @@ static void __init rd88f5182_init(void) orion5x_i2c_init(); orion5x_sata_init(&rd88f5182_sata_data); orion5x_uart0_init(); + orion5x_xor_init(); orion5x_setup_dev_boot_win(RD88F5182_NOR_BOOT_BASE, RD88F5182_NOR_BOOT_SIZE); diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c index 809132de31d2..dd657163cd8d 100644 --- a/arch/arm/mach-orion5x/ts209-setup.c +++ b/arch/arm/mach-orion5x/ts209-setup.c @@ -207,12 +207,12 @@ static struct i2c_board_info __initdata qnap_ts209_i2c_rtc = { static struct gpio_keys_button qnap_ts209_buttons[] = { { - .code = KEY_RESTART, + .code = KEY_COPY, .gpio = QNAP_TS209_GPIO_KEY_MEDIA, .desc = "USB Copy Button", .active_low = 1, }, { - .code = KEY_POWER, + .code = KEY_RESTART, .gpio = QNAP_TS209_GPIO_KEY_RESET, .desc = "Reset Button", .active_low = 1, @@ -296,6 +296,7 @@ static void __init qnap_ts209_init(void) orion5x_i2c_init(); orion5x_sata_init(&qnap_ts209_sata_data); orion5x_uart0_init(); + orion5x_xor_init(); orion5x_setup_dev_boot_win(QNAP_TS209_NOR_BOOT_BASE, QNAP_TS209_NOR_BOOT_SIZE); diff --git a/arch/arm/mach-orion5x/ts409-setup.c b/arch/arm/mach-orion5x/ts409-setup.c index 6053e76ac967..b27d2b762081 100644 --- a/arch/arm/mach-orion5x/ts409-setup.c +++ b/arch/arm/mach-orion5x/ts409-setup.c @@ -3,6 +3,9 @@ * * Maintainer: Sylver Bruneau <sylver.bruneau@gmail.com> * + * Copyright (C) 2008 Sylver Bruneau <sylver.bruneau@gmail.com> + * Copyright (C) 2008 Martin Michlmayr <tbm@cyrius.com> + * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version @@ -16,6 +19,7 @@ #include <linux/irq.h> #include <linux/mtd/physmap.h> #include <linux/mv643xx_eth.h> +#include <linux/leds.h> #include <linux/gpio_keys.h> #include <linux/input.h> #include <linux/i2c.h> @@ -162,16 +166,59 @@ static struct i2c_board_info __initdata qnap_ts409_i2c_rtc = { I2C_BOARD_INFO("s35390a", 0x30), }; +/***************************************************************************** + * LEDs attached to GPIO + ****************************************************************************/ + +static struct gpio_led ts409_led_pins[] = { + { + .name = "ts409:red:sata1", + .gpio = 4, + .active_low = 1, + }, { + .name = "ts409:red:sata2", + .gpio = 5, + .active_low = 1, + }, { + .name = "ts409:red:sata3", + .gpio = 6, + .active_low = 1, + }, { + .name = "ts409:red:sata4", + .gpio = 7, + .active_low = 1, + }, +}; + +static struct gpio_led_platform_data ts409_led_data = { + .leds = ts409_led_pins, + .num_leds = ARRAY_SIZE(ts409_led_pins), +}; + +static struct platform_device ts409_leds = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &ts409_led_data, + }, +}; + /**************************************************************************** * GPIO Attached Keys * Power button is attached to the PIC microcontroller ****************************************************************************/ +#define QNAP_TS409_GPIO_KEY_RESET 14 #define QNAP_TS409_GPIO_KEY_MEDIA 15 static struct gpio_keys_button qnap_ts409_buttons[] = { { .code = KEY_RESTART, + .gpio = QNAP_TS409_GPIO_KEY_RESET, + .desc = "Reset Button", + .active_low = 1, + }, { + .code = KEY_COPY, .gpio = QNAP_TS409_GPIO_KEY_MEDIA, .desc = "USB Copy Button", .active_low = 1, @@ -255,6 +302,7 @@ static void __init qnap_ts409_init(void) if (qnap_ts409_i2c_rtc.irq == 0) pr_warning("qnap_ts409_init: failed to get RTC IRQ\n"); i2c_register_board_info(0, &qnap_ts409_i2c_rtc, 1); + platform_device_register(&ts409_leds); /* register tsx09 specific power-off method */ pm_power_off = qnap_tsx09_power_off; diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c index 014916a28fdc..ae0a5dccd2a1 100644 --- a/arch/arm/mach-orion5x/ts78xx-setup.c +++ b/arch/arm/mach-orion5x/ts78xx-setup.c @@ -256,6 +256,7 @@ static void __init ts78xx_init(void) orion5x_sata_init(&ts78xx_sata_data); orion5x_uart0_init(); orion5x_uart1_init(); + orion5x_xor_init(); orion5x_setup_dev_boot_win(TS78XX_NOR_BOOT_BASE, TS78XX_NOR_BOOT_SIZE); diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c index 20eec4ba173f..7b5a25d81576 100644 --- a/arch/arm/mm/cache-feroceon-l2.c +++ b/arch/arm/mm/cache-feroceon-l2.c @@ -14,7 +14,7 @@ #include <linux/init.h> #include <asm/cacheflush.h> -#include <asm/plat-orion/cache-feroceon-l2.h> +#include <plat/cache-feroceon-l2.h> /* diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 2d6d682c206a..25d9a11eb617 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -568,6 +568,55 @@ void __init iotable_init(struct map_desc *io_desc, int nr) create_mapping(io_desc + i); } +static int __init check_membank_valid(struct membank *mb) +{ + /* + * Check whether this memory region has non-zero size. + */ + if (mb->size == 0) + return 0; + + /* + * Check whether this memory region would entirely overlap + * the vmalloc area. + */ + if (phys_to_virt(mb->start) >= VMALLOC_MIN) { + printk(KERN_NOTICE "Ignoring RAM at %.8lx-%.8lx " + "(vmalloc region overlap).\n", + mb->start, mb->start + mb->size - 1); + return 0; + } + + /* + * Check whether this memory region would partially overlap + * the vmalloc area. + */ + if (phys_to_virt(mb->start + mb->size) < phys_to_virt(mb->start) || + phys_to_virt(mb->start + mb->size) > VMALLOC_MIN) { + unsigned long newsize = VMALLOC_MIN - phys_to_virt(mb->start); + + printk(KERN_NOTICE "Truncating RAM at %.8lx-%.8lx " + "to -%.8lx (vmalloc region overlap).\n", + mb->start, mb->start + mb->size - 1, + mb->start + newsize - 1); + mb->size = newsize; + } + + return 1; +} + +static void __init sanity_check_meminfo(struct meminfo *mi) +{ + int i; + int j; + + for (i = 0, j = 0; i < mi->nr_banks; i++) { + if (check_membank_valid(&mi->bank[i])) + mi->bank[j++] = mi->bank[i]; + } + mi->nr_banks = j; +} + static inline void prepare_page_table(struct meminfo *mi) { unsigned long addr; @@ -753,6 +802,7 @@ void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc) void *zero_page; build_mem_type_table(); + sanity_check_meminfo(mi); prepare_page_table(mi); bootmem_init(mi); devicemaps_init(mdesc); diff --git a/arch/arm/plat-orion/include/plat/cache-feroceon-l2.h b/arch/arm/plat-orion/include/plat/cache-feroceon-l2.h new file mode 100644 index 000000000000..06f982d55697 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/cache-feroceon-l2.h @@ -0,0 +1,11 @@ +/* + * arch/arm/plat-orion/include/plat/cache-feroceon-l2.h + * + * Copyright (C) 2008 Marvell Semiconductor + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +extern void __init feroceon_l2_init(int l2_wt_override); diff --git a/arch/arm/plat-orion/include/plat/ehci-orion.h b/arch/arm/plat-orion/include/plat/ehci-orion.h new file mode 100644 index 000000000000..64343051095a --- /dev/null +++ b/arch/arm/plat-orion/include/plat/ehci-orion.h @@ -0,0 +1,19 @@ +/* + * arch/arm/plat-orion/include/plat/ehci-orion.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_EHCI_ORION_H +#define __PLAT_EHCI_ORION_H + +#include <linux/mbus.h> + +struct orion_ehci_data { + struct mbus_dram_target_info *dram; +}; + + +#endif diff --git a/arch/arm/plat-orion/include/plat/irq.h b/arch/arm/plat-orion/include/plat/irq.h new file mode 100644 index 000000000000..f05eeab94968 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/irq.h @@ -0,0 +1,17 @@ +/* + * arch/arm/plat-orion/include/plat/irq.h + * + * Marvell Orion SoC IRQ handling. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_IRQ_H +#define __PLAT_IRQ_H + +void orion_irq_init(unsigned int irq_start, void __iomem *maskaddr); + + +#endif diff --git a/arch/arm/plat-orion/include/plat/mv_xor.h b/arch/arm/plat-orion/include/plat/mv_xor.h new file mode 100644 index 000000000000..bd5f3bdb4ae3 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/mv_xor.h @@ -0,0 +1,30 @@ +/* + * arch/arm/plat-orion/include/plat/mv_xor.h + * + * Marvell XOR platform device data definition file. + */ + +#ifndef __PLAT_MV_XOR_H +#define __PLAT_MV_XOR_H + +#include <linux/dmaengine.h> +#include <linux/mbus.h> + +#define MV_XOR_SHARED_NAME "mv_xor_shared" +#define MV_XOR_NAME "mv_xor" + +struct mbus_dram_target_info; + +struct mv_xor_platform_shared_data { + struct mbus_dram_target_info *dram; +}; + +struct mv_xor_platform_data { + struct platform_device *shared; + int hw_id; + dma_cap_mask_t cap_mask; + size_t pool_size; +}; + + +#endif diff --git a/arch/arm/plat-orion/include/plat/orion_nand.h b/arch/arm/plat-orion/include/plat/orion_nand.h new file mode 100644 index 000000000000..d6a4cfa37785 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/orion_nand.h @@ -0,0 +1,25 @@ +/* + * arch/arm/plat-orion/include/plat/orion_nand.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_ORION_NAND_H +#define __PLAT_ORION_NAND_H + +/* + * Device bus NAND private data + */ +struct orion_nand_data { + struct mtd_partition *parts; + u32 nr_parts; + u8 ale; /* address line number connected to ALE */ + u8 cle; /* address line number connected to CLE */ + u8 width; /* buswidth */ + u8 chip_delay; +}; + + +#endif diff --git a/arch/arm/plat-orion/include/plat/pcie.h b/arch/arm/plat-orion/include/plat/pcie.h new file mode 100644 index 000000000000..3ebfef72b4e7 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/pcie.h @@ -0,0 +1,32 @@ +/* + * arch/arm/plat-orion/include/plat/pcie.h + * + * Marvell Orion SoC PCIe handling. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_PCIE_H +#define __PLAT_PCIE_H + +u32 orion_pcie_dev_id(void __iomem *base); +u32 orion_pcie_rev(void __iomem *base); +int orion_pcie_link_up(void __iomem *base); +int orion_pcie_x4_mode(void __iomem *base); +int orion_pcie_get_local_bus_nr(void __iomem *base); +void orion_pcie_set_local_bus_nr(void __iomem *base, int nr); +void orion_pcie_setup(void __iomem *base, + struct mbus_dram_target_info *dram); +int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, + u32 devfn, int where, int size, u32 *val); +int orion_pcie_rd_conf_tlp(void __iomem *base, struct pci_bus *bus, + u32 devfn, int where, int size, u32 *val); +int orion_pcie_rd_conf_wa(void __iomem *wa_base, struct pci_bus *bus, + u32 devfn, int where, int size, u32 *val); +int orion_pcie_wr_conf(void __iomem *base, struct pci_bus *bus, + u32 devfn, int where, int size, u32 val); + + +#endif diff --git a/arch/arm/plat-orion/include/plat/time.h b/arch/arm/plat-orion/include/plat/time.h new file mode 100644 index 000000000000..c06ca35f3613 --- /dev/null +++ b/arch/arm/plat-orion/include/plat/time.h @@ -0,0 +1,17 @@ +/* + * arch/arm/plat-orion/include/plat/time.h + * + * Marvell Orion SoC time handling. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_TIME_H +#define __PLAT_TIME_H + +void orion_time_init(unsigned int irq, unsigned int tclk); + + +#endif diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c index fe66a1835169..3f9d34fc738c 100644 --- a/arch/arm/plat-orion/irq.c +++ b/arch/arm/plat-orion/irq.c @@ -12,7 +12,7 @@ #include <linux/init.h> #include <linux/irq.h> #include <linux/io.h> -#include <asm/plat-orion/irq.h> +#include <plat/irq.h> static void orion_irq_mask(u32 irq) { diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c index ca32c60e14d7..883902fead89 100644 --- a/arch/arm/plat-orion/pcie.c +++ b/arch/arm/plat-orion/pcie.c @@ -12,7 +12,7 @@ #include <linux/pci.h> #include <linux/mbus.h> #include <asm/mach/pci.h> -#include <asm/plat-orion/pcie.h> +#include <plat/pcie.h> /* * PCIe unit register offsets. |
