diff options
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8555cds.dts')
| -rw-r--r-- | arch/powerpc/boot/dts/mpc8555cds.dts | 90 |
1 files changed, 45 insertions, 45 deletions
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts index 951ed92f1154..17e45d9a382a 100644 --- a/arch/powerpc/boot/dts/mpc8555cds.dts +++ b/arch/powerpc/boot/dts/mpc8555cds.dts @@ -52,7 +52,7 @@ compatible = "fsl,8555-memory-controller"; reg = <2000 1000>; interrupt-parent = <&mpic>; - interrupts = <2 2>; + interrupts = <12 2>; }; l2-cache-controller@20000 { @@ -61,14 +61,14 @@ cache-line-size = <20>; // 32 bytes cache-size = <40000>; // L2, 256K interrupt-parent = <&mpic>; - interrupts = <0 2>; + interrupts = <10 2>; }; i2c@3000 { device_type = "i2c"; compatible = "fsl-i2c"; reg = <3000 100>; - interrupts = <1b 2>; + interrupts = <2b 2>; interrupt-parent = <&mpic>; dfsrr; }; @@ -81,13 +81,13 @@ reg = <24520 20>; phy0: ethernet-phy@0 { interrupt-parent = <&mpic>; - interrupts = <35 0>; + interrupts = <5 1>; reg = <0>; device_type = "ethernet-phy"; }; phy1: ethernet-phy@1 { interrupt-parent = <&mpic>; - interrupts = <35 0>; + interrupts = <5 1>; reg = <1>; device_type = "ethernet-phy"; }; @@ -100,8 +100,8 @@ model = "TSEC"; compatible = "gianfar"; reg = <24000 1000>; - local-mac-address = [ 00 E0 0C 00 73 00 ]; - interrupts = <0d 2 0e 2 12 2>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <1d 2 1e 2 22 2>; interrupt-parent = <&mpic>; phy-handle = <&phy0>; }; @@ -113,8 +113,8 @@ model = "TSEC"; compatible = "gianfar"; reg = <25000 1000>; - local-mac-address = [ 00 E0 0C 00 73 01 ]; - interrupts = <13 2 14 2 18 2>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <23 2 24 2 28 2>; interrupt-parent = <&mpic>; phy-handle = <&phy1>; }; @@ -124,7 +124,7 @@ compatible = "ns16550"; reg = <4500 100>; // reg base, size clock-frequency = <0>; // should we fill in in uboot? - interrupts = <1a 2>; + interrupts = <2a 2>; interrupt-parent = <&mpic>; }; @@ -133,7 +133,7 @@ compatible = "ns16550"; reg = <4600 100>; // reg base, size clock-frequency = <0>; // should we fill in in uboot? - interrupts = <1a 2>; + interrupts = <2a 2>; interrupt-parent = <&mpic>; }; @@ -142,49 +142,49 @@ interrupt-map = < /* IDSEL 0x10 */ - 08000 0 0 1 &mpic 30 1 - 08000 0 0 2 &mpic 31 1 - 08000 0 0 3 &mpic 32 1 - 08000 0 0 4 &mpic 33 1 + 08000 0 0 1 &mpic 0 1 + 08000 0 0 2 &mpic 1 1 + 08000 0 0 3 &mpic 2 1 + 08000 0 0 4 &mpic 3 1 /* IDSEL 0x11 */ - 08800 0 0 1 &mpic 30 1 - 08800 0 0 2 &mpic 31 1 - 08800 0 0 3 &mpic 32 1 - 08800 0 0 4 &mpic 33 1 + 08800 0 0 1 &mpic 0 1 + 08800 0 0 2 &mpic 1 1 + 08800 0 0 3 &mpic 2 1 + 08800 0 0 4 &mpic 3 1 /* IDSEL 0x12 (Slot 1) */ - 09000 0 0 1 &mpic 30 1 - 09000 0 0 2 &mpic 31 1 - 09000 0 0 3 &mpic 32 1 - 09000 0 0 4 &mpic 33 1 + 09000 0 0 1 &mpic 0 1 + 09000 0 0 2 &mpic 1 1 + 09000 0 0 3 &mpic 2 1 + 09000 0 0 4 &mpic 3 1 /* IDSEL 0x13 (Slot 2) */ - 09800 0 0 1 &mpic 31 1 - 09800 0 0 2 &mpic 32 1 - 09800 0 0 3 &mpic 33 1 - 09800 0 0 4 &mpic 30 1 + 09800 0 0 1 &mpic 1 1 + 09800 0 0 2 &mpic 2 1 + 09800 0 0 3 &mpic 3 1 + 09800 0 0 4 &mpic 0 1 /* IDSEL 0x14 (Slot 3) */ - 0a000 0 0 1 &mpic 32 1 - 0a000 0 0 2 &mpic 33 1 - 0a000 0 0 3 &mpic 30 1 - 0a000 0 0 4 &mpic 31 1 + 0a000 0 0 1 &mpic 2 1 + 0a000 0 0 2 &mpic 3 1 + 0a000 0 0 3 &mpic 0 1 + 0a000 0 0 4 &mpic 1 1 /* IDSEL 0x15 (Slot 4) */ - 0a800 0 0 1 &mpic 33 1 - 0a800 0 0 2 &mpic 30 1 - 0a800 0 0 3 &mpic 31 1 - 0a800 0 0 4 &mpic 32 1 + 0a800 0 0 1 &mpic 3 1 + 0a800 0 0 2 &mpic 0 1 + 0a800 0 0 3 &mpic 1 1 + 0a800 0 0 4 &mpic 2 1 /* Bus 1 (Tundra Bridge) */ /* IDSEL 0x12 (ISA bridge) */ - 19000 0 0 1 &mpic 30 1 - 19000 0 0 2 &mpic 31 1 - 19000 0 0 3 &mpic 32 1 - 19000 0 0 4 &mpic 33 1>; + 19000 0 0 1 &mpic 0 1 + 19000 0 0 2 &mpic 1 1 + 19000 0 0 3 &mpic 2 1 + 19000 0 0 4 &mpic 3 1>; interrupt-parent = <&mpic>; - interrupts = <08 2>; + interrupts = <18 2>; bus-range = <0 0>; ranges = <02000000 0 80000000 80000000 0 20000000 01000000 0 00000000 e2000000 0 00100000>; @@ -216,12 +216,12 @@ interrupt-map = < /* IDSEL 0x15 */ - a800 0 0 1 &mpic 3b 1 - a800 0 0 2 &mpic 3b 1 - a800 0 0 3 &mpic 3b 1 - a800 0 0 4 &mpic 3b 1>; + a800 0 0 1 &mpic b 1 + a800 0 0 2 &mpic b 1 + a800 0 0 3 &mpic b 1 + a800 0 0 4 &mpic b 1>; interrupt-parent = <&mpic>; - interrupts = <09 2>; + interrupts = <19 2>; bus-range = <0 0>; ranges = <02000000 0 a0000000 a0000000 0 20000000 01000000 0 00000000 e3000000 0 00100000>; |
