summaryrefslogtreecommitdiffstats
path: root/arch/mips/kernel/traps.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/mips/kernel/traps.c')
-rw-r--r--arch/mips/kernel/traps.c15
1 files changed, 9 insertions, 6 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index ad16eceb24dd..67971938a2cb 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1050,7 +1050,7 @@ void *set_except_vector(int n, void *addr)
return (void *)old_handler;
}
-#ifdef CONFIG_CPU_MIPSR2
+#ifdef CONFIG_CPU_MIPSR2_SRS
/*
* MIPSR2 shadow register set allocation
* FIXME: SMP...
@@ -1069,11 +1069,9 @@ static struct shadow_registers {
static void mips_srs_init(void)
{
-#ifdef CONFIG_CPU_MIPSR2_SRS
shadow_registers.sr_supported = ((read_c0_srsctl() >> 26) & 0x0f) + 1;
printk(KERN_INFO "%d MIPSR2 register sets available\n",
shadow_registers.sr_supported);
-#endif
shadow_registers.sr_allocated = 1; /* Set 0 used by kernel */
}
@@ -1198,7 +1196,14 @@ void *set_vi_handler(int n, void *addr)
{
return set_vi_srs_handler(n, addr, 0);
}
-#endif
+
+#else
+
+static inline void mips_srs_init(void)
+{
+}
+
+#endif /* CONFIG_CPU_MIPSR2_SRS */
/*
* This is used by native signal handling
@@ -1388,9 +1393,7 @@ void __init trap_init(void)
else
ebase = CAC_BASE;
-#ifdef CONFIG_CPU_MIPSR2
mips_srs_init();
-#endif
per_cpu_trap_init();
OpenPOWER on IntegriCloud