diff options
Diffstat (limited to 'arch/ia64/kernel/setup.c')
| -rw-r--r-- | arch/ia64/kernel/setup.c | 20 |
1 files changed, 11 insertions, 9 deletions
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c index e5c2de9b29a5..c27d5b2c182b 100644 --- a/arch/ia64/kernel/setup.c +++ b/arch/ia64/kernel/setup.c @@ -314,7 +314,7 @@ static inline void __init setup_crashkernel(unsigned long total, int *n) * * Setup the reserved memory areas set aside for the boot parameters, * initrd, etc. There are currently %IA64_MAX_RSVD_REGIONS defined, - * see include/asm-ia64/meminit.h if you need to define more. + * see arch/ia64/include/asm/meminit.h if you need to define more. */ void __init reserve_memory (void) @@ -927,17 +927,19 @@ cpu_init (void) if (smp_processor_id() == 0) { cpu_set(0, per_cpu(cpu_sibling_map, 0)); cpu_set(0, cpu_core_map[0]); + } else { + /* + * Set ar.k3 so that assembly code in MCA handler can compute + * physical addresses of per cpu variables with a simple: + * phys = ar.k3 + &per_cpu_var + * and the alt-dtlb-miss handler can set per-cpu mapping into + * the TLB when needed. head.S already did this for cpu0. + */ + ia64_set_kr(IA64_KR_PER_CPU_DATA, + ia64_tpa(cpu_data) - (long) __per_cpu_start); } #endif - /* - * We set ar.k3 so that assembly code in MCA handler can compute - * physical addresses of per cpu variables with a simple: - * phys = ar.k3 + &per_cpu_var - */ - ia64_set_kr(IA64_KR_PER_CPU_DATA, - ia64_tpa(cpu_data) - (long) __per_cpu_start); - get_max_cacheline_size(); /* |
