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-rw-r--r--arch/ia64/include/asm/dma-mapping.h4
-rw-r--r--arch/ia64/include/asm/elf.h15
-rw-r--r--arch/ia64/include/asm/sections.h17
-rw-r--r--arch/ia64/include/asm/siginfo.h5
-rw-r--r--arch/ia64/include/asm/sn/bte.h9
5 files changed, 40 insertions, 10 deletions
diff --git a/arch/ia64/include/asm/dma-mapping.h b/arch/ia64/include/asm/dma-mapping.h
index 9f0df9bd46b7..06ff1ba21465 100644
--- a/arch/ia64/include/asm/dma-mapping.h
+++ b/arch/ia64/include/asm/dma-mapping.h
@@ -8,7 +8,9 @@
#include <asm/machvec.h>
#include <linux/scatterlist.h>
-#define dma_alloc_coherent platform_dma_alloc_coherent
+#define dma_alloc_coherent(dev, size, handle, gfp) \
+ platform_dma_alloc_coherent(dev, size, handle, (gfp) | GFP_DMA)
+
/* coherent mem. is cheap */
static inline void *
dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
diff --git a/arch/ia64/include/asm/elf.h b/arch/ia64/include/asm/elf.h
index 5e0c1a6bce8d..2acb6b6543c9 100644
--- a/arch/ia64/include/asm/elf.h
+++ b/arch/ia64/include/asm/elf.h
@@ -266,4 +266,19 @@ do { \
} \
} while (0)
+/*
+ * format for entries in the Global Offset Table
+ */
+struct got_entry {
+ uint64_t val;
+};
+
+/*
+ * Layout of the Function Descriptor
+ */
+struct fdesc {
+ uint64_t ip;
+ uint64_t gp;
+};
+
#endif /* _ASM_IA64_ELF_H */
diff --git a/arch/ia64/include/asm/sections.h b/arch/ia64/include/asm/sections.h
index 7286e4a9fe84..1a873b36a4a1 100644
--- a/arch/ia64/include/asm/sections.h
+++ b/arch/ia64/include/asm/sections.h
@@ -6,9 +6,14 @@
* David Mosberger-Tang <davidm@hpl.hp.com>
*/
+#include <linux/elf.h>
+#include <linux/uaccess.h>
#include <asm-generic/sections.h>
extern char __per_cpu_start[], __per_cpu_end[], __phys_per_cpu_start[];
+#ifdef CONFIG_SMP
+extern char __cpu0_per_cpu[];
+#endif
extern char __start___vtop_patchlist[], __end___vtop_patchlist[];
extern char __start___rse_patchlist[], __end___rse_patchlist[];
extern char __start___mckinley_e9_bundles[], __end___mckinley_e9_bundles[];
@@ -21,5 +26,17 @@ extern char __start_gate_brl_fsys_bubble_down_patchlist[], __end_gate_brl_fsys_b
extern char __start_unwind[], __end_unwind[];
extern char __start_ivt_text[], __end_ivt_text[];
+#undef dereference_function_descriptor
+static inline void *dereference_function_descriptor(void *ptr)
+{
+ struct fdesc *desc = ptr;
+ void *p;
+
+ if (!probe_kernel_address(&desc->ip, p))
+ ptr = p;
+ return ptr;
+}
+
+
#endif /* _ASM_IA64_SECTIONS_H */
diff --git a/arch/ia64/include/asm/siginfo.h b/arch/ia64/include/asm/siginfo.h
index 9294e4b0c8bc..118d42979003 100644
--- a/arch/ia64/include/asm/siginfo.h
+++ b/arch/ia64/include/asm/siginfo.h
@@ -113,11 +113,6 @@ typedef struct siginfo {
#undef NSIGSEGV
#define NSIGSEGV 3
-/*
- * SIGTRAP si_codes
- */
-#define TRAP_BRANCH (__SI_FAULT|3) /* process taken branch trap */
-#define TRAP_HWBKPT (__SI_FAULT|4) /* hardware breakpoint or watchpoint */
#undef NSIGTRAP
#define NSIGTRAP 4
diff --git a/arch/ia64/include/asm/sn/bte.h b/arch/ia64/include/asm/sn/bte.h
index a0d214f43115..5efecf06c9a4 100644
--- a/arch/ia64/include/asm/sn/bte.h
+++ b/arch/ia64/include/asm/sn/bte.h
@@ -223,10 +223,11 @@ extern void bte_error_handler(unsigned long);
* until the transfer is complete. In order to get the asynch
* version of bte_copy, you must perform this check yourself.
*/
-#define BTE_UNALIGNED_COPY(src, dest, len, mode) \
- (((len & L1_CACHE_MASK) || (src & L1_CACHE_MASK) || \
- (dest & L1_CACHE_MASK)) ? \
- bte_unaligned_copy(src, dest, len, mode) : \
+#define BTE_UNALIGNED_COPY(src, dest, len, mode) \
+ (((len & (L1_CACHE_BYTES - 1)) || \
+ (src & (L1_CACHE_BYTES - 1)) || \
+ (dest & (L1_CACHE_BYTES - 1))) ? \
+ bte_unaligned_copy(src, dest, len, mode) : \
bte_copy(src, dest, len, mode, NULL))
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