summaryrefslogtreecommitdiffstats
path: root/arch/arm
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/Makefile4
-rw-r--r--arch/arm/boot/dts/armada-370-db.dts25
-rw-r--r--arch/arm/boot/dts/armada-370-mirabox.dts56
-rw-r--r--arch/arm/boot/dts/armada-370-xp.dtsi32
-rw-r--r--arch/arm/boot/dts/armada-370.dtsi36
-rw-r--r--arch/arm/boot/dts/armada-xp-db.dts43
-rw-r--r--arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts108
-rw-r--r--arch/arm/boot/dts/armada-xp.dtsi56
-rw-r--r--arch/arm/boot/dts/dove.dtsi42
-rw-r--r--arch/arm/boot/dts/kirkwood.dtsi40
-rw-r--r--arch/arm/configs/multi_v7_defconfig2
-rw-r--r--arch/arm/configs/mvebu_defconfig10
-rw-r--r--arch/arm/mach-dove/common.c15
-rw-r--r--arch/arm/mach-kirkwood/board-dt.c12
-rw-r--r--arch/arm/mach-kirkwood/common.c4
-rw-r--r--arch/arm/mach-mvebu/armada-370-xp.c12
-rw-r--r--arch/arm/plat-orion/common.c192
17 files changed, 533 insertions, 156 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f37cf9fa5fa0..32d1d404924a 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -44,7 +44,9 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-dns320.dtb \
dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
msm8960-cdp.dtb
dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
- armada-xp-db.dtb
+ armada-370-mirabox.dtb \
+ armada-xp-db.dtb \
+ armada-xp-openblocks-ax3-4.dtb
dtb-$(CONFIG_ARCH_MXC) += imx51-babbage.dtb \
imx53-ard.dtb \
imx53-evk.dtb \
diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index 4a31b0396623..00044026ef1f 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -34,5 +34,30 @@
clock-frequency = <200000000>;
status = "okay";
};
+ sata@d00a0000 {
+ nr-ports = <2>;
+ status = "okay";
+ };
+
+ mdio {
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+ };
+
+ ethernet@d0070000 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+ };
+ ethernet@d0074000 {
+ status = "okay";
+ phy = <&phy1>;
+ phy-mode = "rgmii-id";
+ };
};
};
diff --git a/arch/arm/boot/dts/armada-370-mirabox.dts b/arch/arm/boot/dts/armada-370-mirabox.dts
new file mode 100644
index 000000000000..3b4071336599
--- /dev/null
+++ b/arch/arm/boot/dts/armada-370-mirabox.dts
@@ -0,0 +1,56 @@
+/*
+ * Device Tree file for Globalscale Mirabox
+ *
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+/include/ "armada-370.dtsi"
+
+/ {
+ model = "Globalscale Mirabox";
+ compatible = "globalscale,mirabox", "marvell,armada370", "marvell,armada-370-xp";
+
+ chosen {
+ bootargs = "console=ttyS0,115200 earlyprintk";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x20000000>; /* 512 MB */
+ };
+
+ soc {
+ serial@d0012000 {
+ clock-frequency = <200000000>;
+ status = "okay";
+ };
+ timer@d0020300 {
+ clock-frequency = <600000000>;
+ status = "okay";
+ };
+ mdio {
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+ };
+ ethernet@d0070000 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+ };
+ ethernet@d0074000 {
+ status = "okay";
+ phy = <&phy1>;
+ phy-mode = "rgmii-id";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index b0d075b50f29..af7d16e5a024 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -74,6 +74,38 @@
compatible = "marvell,armada-addr-decoding-controller";
reg = <0xd0020000 0x258>;
};
+
+ sata@d00a0000 {
+ compatible = "marvell,orion-sata";
+ reg = <0xd00a0000 0x2400>;
+ interrupts = <55>;
+ clocks = <&gateclk 15>, <&gateclk 30>;
+ clock-names = "0", "1";
+ status = "disabled";
+ };
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "marvell,orion-mdio";
+ reg = <0xd0072004 0x4>;
+ };
+
+ ethernet@d0070000 {
+ compatible = "marvell,armada-370-neta";
+ reg = <0xd0070000 0x2500>;
+ interrupts = <8>;
+ clocks = <&gateclk 4>;
+ status = "disabled";
+ };
+
+ ethernet@d0074000 {
+ compatible = "marvell,armada-370-neta";
+ reg = <0xd0074000 0x2500>;
+ interrupts = <10>;
+ clocks = <&gateclk 3>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index 175df2887076..7fbac28b01f3 100644
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -89,6 +89,42 @@
#clock-cells = <1>;
};
+ xor@d0060800 {
+ compatible = "marvell,orion-xor";
+ reg = <0xd0060800 0x100
+ 0xd0060A00 0x100>;
+ status = "okay";
+ xor00 {
+ interrupts = <51>;
+ dmacap,memcpy;
+ dmacap,xor;
+ };
+ xor01 {
+ interrupts = <52>;
+ dmacap,memcpy;
+ dmacap,xor;
+ dmacap,memset;
+ };
+ };
+
+ xor@d0060900 {
+ compatible = "marvell,orion-xor";
+ reg = <0xd0060900 0x100
+ 0xd0060b00 0x100>;
+ status = "okay";
+
+ xor10 {
+ interrupts = <94>;
+ dmacap,memcpy;
+ dmacap,xor;
+ };
+ xor11 {
+ interrupts = <95>;
+ dmacap,memcpy;
+ dmacap,xor;
+ dmacap,memset;
+ };
+ };
};
};
diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index b1fc728515e9..c06c93ceba22 100644
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts
@@ -46,5 +46,48 @@
clock-frequency = <250000000>;
status = "okay";
};
+ sata@d00a0000 {
+ nr-ports = <2>;
+ status = "okay";
+ };
+
+ mdio {
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ phy2: ethernet-phy@2 {
+ reg = <25>;
+ };
+
+ phy3: ethernet-phy@3 {
+ reg = <27>;
+ };
+ };
+
+ ethernet@d0070000 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+ };
+ ethernet@d0074000 {
+ status = "okay";
+ phy = <&phy1>;
+ phy-mode = "rgmii-id";
+ };
+ ethernet@d0030000 {
+ status = "okay";
+ phy = <&phy2>;
+ phy-mode = "sgmii";
+ };
+ ethernet@d0034000 {
+ status = "okay";
+ phy = <&phy3>;
+ phy-mode = "sgmii";
+ };
};
};
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
new file mode 100644
index 000000000000..638fb68d47b2
--- /dev/null
+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
@@ -0,0 +1,108 @@
+/*
+ * Device Tree file for OpenBlocks AX3-4 board
+ *
+ * Copyright (C) 2012 Marvell
+ *
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+/include/ "armada-xp-mv78260.dtsi"
+
+/ {
+ model = "PlatHome OpenBlocks AX3-4 board";
+ compatible = "plathome,openblocks-ax3-4", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
+
+ chosen {
+ bootargs = "console=ttyS0,115200 earlyprintk";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0xC0000000>; /* 3 GB */
+ };
+
+ soc {
+ serial@d0012000 {
+ clock-frequency = <250000000>;
+ status = "okay";
+ };
+ serial@d0012100 {
+ clock-frequency = <250000000>;
+ status = "okay";
+ };
+ pinctrl {
+ led_pins: led-pins-0 {
+ marvell,pins = "mpp49", "mpp51", "mpp53";
+ marvell,function = "gpio";
+ };
+ };
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_pins>;
+
+ red_led {
+ label = "red_led";
+ gpios = <&gpio1 17 1>;
+ default-state = "off";
+ };
+
+ yellow_led {
+ label = "yellow_led";
+ gpios = <&gpio1 19 1>;
+ default-state = "off";
+ };
+
+ green_led {
+ label = "green_led";
+ gpios = <&gpio1 21 1>;
+ default-state = "off";
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ mdio {
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ phy2: ethernet-phy@2 {
+ reg = <2>;
+ };
+
+ phy3: ethernet-phy@3 {
+ reg = <3>;
+ };
+ };
+
+ ethernet@d0070000 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "sgmii";
+ };
+ ethernet@d0074000 {
+ status = "okay";
+ phy = <&phy1>;
+ phy-mode = "sgmii";
+ };
+ ethernet@d0030000 {
+ status = "okay";
+ phy = <&phy2>;
+ phy-mode = "sgmii";
+ };
+ ethernet@d0034000 {
+ status = "okay";
+ phy = <&phy3>;
+ phy-mode = "sgmii";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index e6db2b7e2925..45a567c2e9ba 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -77,5 +77,61 @@
compatible = "marvell,armada-370-xp-system-controller";
reg = <0xd0018200 0x500>;
};
+
+ ethernet@d0030000 {
+ compatible = "marvell,armada-370-neta";
+ reg = <0xd0030000 0x2500>;
+ interrupts = <12>;
+ clocks = <&gateclk 2>;
+ status = "disabled";
+ };
+
+ ethernet@d0034000 {
+ compatible = "marvell,armada-370-neta";
+ reg = <0xd0034000 0x2500>;
+ interrupts = <14>;
+ clocks = <&gateclk 1>;
+ status = "disabled";
+ };
+
+ xor@d0060900 {
+ compatible = "marvell,orion-xor";
+ reg = <0xd0060900 0x100
+ 0xd0060b00 0x100>;
+ clocks = <&gateclk 22>;
+ status = "okay";
+
+ xor10 {
+ interrupts = <51>;
+ dmacap,memcpy;
+ dmacap,xor;
+ };
+ xor11 {
+ interrupts = <52>;
+ dmacap,memcpy;
+ dmacap,xor;
+ dmacap,memset;
+ };
+ };
+
+ xor@d00f0900 {
+ compatible = "marvell,orion-xor";
+ reg = <0xd00F0900 0x100
+ 0xd00F0B00 0x100>;
+ clocks = <&gateclk 28>;
+ status = "okay";
+
+ xor00 {
+ interrupts = <94>;
+ dmacap,memcpy;
+ dmacap,xor;
+ };
+ xor01 {
+ interrupts = <95>;
+ dmacap,memcpy;
+ dmacap,xor;
+ dmacap,memset;
+ };
+ };
};
};
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index b524ee377f83..b1cfa52ae223 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -174,5 +174,47 @@
clocks = <&gate_clk 15>;
status = "okay";
};
+
+ xor0: dma-engine@60800 {
+ compatible = "marvell,orion-xor";
+ reg = <0x60800 0x100
+ 0x60a00 0x100>;
+ clocks = <&gate_clk 23>;
+ status = "okay";
+
+ channel0 {
+ interrupts = <39>;
+ dmacap,memcpy;
+ dmacap,xor;
+ };
+
+ channel1 {
+ interrupts = <40>;
+ dmacap,memset;
+ dmacap,memcpy;
+ dmacap,xor;
+ };
+ };
+
+ xor1: dma-engine@60900 {
+ compatible = "marvell,orion-xor";
+ reg = <0x60900 0x100
+ 0x60b00 0x100>;
+ clocks = <&gate_clk 24>;
+ status = "okay";
+
+ channel0 {
+ interrupts = <42>;
+ dmacap,memcpy;
+ dmacap,xor;
+ };
+
+ channel1 {
+ interrupts = <43>;
+ dmacap,memset;
+ dmacap,memcpy;
+ dmacap,xor;
+ };
+ };
};
};
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 7a9fac0d4251..2388f9936ebf 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -94,6 +94,46 @@
status = "okay";
};
+ xor@60800 {
+ compatible = "marvell,orion-xor";
+ reg = <0x60800 0x100
+ 0x60A00 0x100>;
+ status = "okay";
+ clocks = <&gate_clk 8>;
+
+ xor00 {
+ interrupts = <5>;
+ dmacap,memcpy;
+ dmacap,xor;
+ };
+ xor01 {
+ interrupts = <6>;
+ dmacap,memcpy;
+ dmacap,xor;
+ dmacap,memset;
+ };
+ };
+
+ xor@60900 {
+ compatible = "marvell,orion-xor";
+ reg = <0x60900 0x100
+ 0xd0B00 0x100>;
+ status = "okay";
+ clocks = <&gate_clk 16>;
+
+ xor00 {
+ interrupts = <7>;
+ dmacap,memcpy;
+ dmacap,xor;
+ };
+ xor01 {
+ interrupts = <8>;
+ dmacap,memcpy;
+ dmacap,xor;
+ dmacap,memset;
+ };
+ };
+
sata@80000 {
compatible = "marvell,orion-sata";
reg = <0x80000 0x5000>;
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 159f75fc4377..dbea6f4efe9f 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -17,8 +17,10 @@ CONFIG_ARM_APPENDED_DTB=y
CONFIG_VFP=y
CONFIG_NEON=y
CONFIG_NET=y
+CONFIG_BLK_DEV_SD=y
CONFIG_ATA=y
CONFIG_SATA_HIGHBANK=y
+CONFIG_SATA_MV=y
CONFIG_NETDEVICES=y
CONFIG_NET_CALXEDA_XGMAC=y
CONFIG_SMSC911X=y
diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig
index da598d37a65f..6008f12c1990 100644
--- a/arch/arm/configs/mvebu_defconfig
+++ b/arch/arm/configs/mvebu_defconfig
@@ -22,13 +22,23 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ARM_APPENDED_DTB=y
CONFIG_VFP=y
+CONFIG_NET=y
+CONFIG_INET=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_BLK_DEV_SD=y
+CONFIG_ATA=y
+CONFIG_SATA_MV=y
+CONFIG_NETDEVICES=y
+CONFIG_MVNETA=y
+CONFIG_MARVELL_PHY=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_SYSFS=y
# CONFIG_USB_SUPPORT is not set
+CONFIG_DMADEVICES=y
+CONFIG_MV_XOR=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index 6a2c4dc413a8..89f4f993cd03 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -33,6 +33,7 @@
#include <linux/irq.h>
#include <plat/time.h>
#include <linux/platform_data/usb-ehci-orion.h>
+#include <linux/platform_data/dma-mv_xor.h>
#include <plat/irq.h>
#include <plat/common.h>
#include <plat/addr-map.h>
@@ -124,8 +125,8 @@ static void __init dove_clk_init(void)
orion_clkdev_add(NULL, "mv_crypto", crypto);
orion_clkdev_add(NULL, "dove-ac97", ac97);
orion_clkdev_add(NULL, "dove-pdma", pdma);
- orion_clkdev_add(NULL, "mv_xor_shared.0", xor0);
- orion_clkdev_add(NULL, "mv_xor_shared.1", xor1);
+ orion_clkdev_add(NULL, MV_XOR_NAME ".0", xor0);
+ orion_clkdev_add(NULL, MV_XOR_NAME ".1", xor1);
}
/*****************************************************************************
@@ -408,14 +409,6 @@ static void __init dove_legacy_clk_init(void)
clkspec.args[0] = CLOCK_GATING_BIT_PCIE1;
orion_clkdev_add("1", "pcie",
of_clk_get_from_provider(&clkspec));
-
- clkspec.args[0] = CLOCK_GATING_BIT_XOR0;
- orion_clkdev_add(NULL, "mv_xor_shared.0",
- of_clk_get_from_provider(&clkspec));
-
- clkspec.args[0] = CLOCK_GATING_BIT_XOR1;
- orion_clkdev_add(NULL, "mv_xor_shared.1",
- of_clk_get_from_provider(&clkspec));
}
static void __init dove_of_clk_init(void)
@@ -443,8 +436,6 @@ static void __init dove_dt_init(void)
/* Internal devices not ported to DT yet */
dove_rtc_init();
- dove_xor0_init();
- dove_xor1_init();
dove_ge00_init(&dove_dt_ge00_data);
dove_ehci0_init();
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index 8bdfaa4db091..9826904277b8 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -59,14 +59,6 @@ static void __init kirkwood_legacy_clk_init(void)
orion_clkdev_add(NULL, "orion-ehci.0",
of_clk_get_from_provider(&clkspec));
- clkspec.args[0] = CGC_BIT_XOR0;
- orion_clkdev_add(NULL, "mv_xor_shared.0",
- of_clk_get_from_provider(&clkspec));
-
- clkspec.args[0] = CGC_BIT_XOR1;
- orion_clkdev_add(NULL, "mv_xor_shared.1",
- of_clk_get_from_provider(&clkspec));
-
clkspec.args[0] = CGC_BIT_PEX1;
orion_clkdev_add("1", "pcie",
of_clk_get_from_provider(&clkspec));
@@ -102,10 +94,6 @@ static void __init kirkwood_dt_init(void)
/* Setup root of clk tree */
kirkwood_of_clk_init();
- /* internal devices that every board has */
- kirkwood_xor0_init();
- kirkwood_xor1_init();
-
#ifdef CONFIG_KEXEC
kexec_reinit = kirkwood_enable_pcie;
#endif
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 2c6c218fb79e..401dac1a8d80 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -260,8 +260,8 @@ void __init kirkwood_clk_init(void)
orion_clkdev_add(NULL, "orion_nand", runit);
orion_clkdev_add(NULL, "mvsdio", sdio);
orion_clkdev_add(NULL, "mv_crypto", crypto);
- orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".0", xor0);
- orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".1", xor1);
+ orion_clkdev_add(NULL, MV_XOR_NAME ".0", xor0);
+ orion_clkdev_add(NULL, MV_XOR_NAME ".1", xor1);
orion_clkdev_add("0", "pcie", pex0);
orion_clkdev_add("1", "pcie", pex1);
orion_clkdev_add(NULL, "kirkwood-i2s", audio);
diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c
index 472e70ffce8d..a9cf335c7cb0 100644
--- a/arch/arm/mach-mvebu/armada-370-xp.c
+++ b/arch/arm/mach-mvebu/armada-370-xp.c
@@ -18,6 +18,7 @@
#include <linux/io.h>
#include <linux/time-armada-370-xp.h>
#include <linux/clk/mvebu.h>
+#include <linux/dma-mapping.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
@@ -45,6 +46,16 @@ void __init armada_370_xp_timer_and_clk_init(void)
armada_370_xp_timer_init();
}
+void __init armada_370_xp_init_early(void)
+{
+ /*
+ * Some Armada 370/XP devices allocate their coherent buffers
+ * from atomic context. Increase size of atomic coherent pool
+ * to make sure such the allocations won't fail.
+ */
+ init_dma_coherent_pool_size(SZ_1M);
+}
+
struct sys_timer armada_370_xp_timer = {
.init = armada_370_xp_timer_and_clk_init,
};
@@ -65,6 +76,7 @@ DT_MACHINE_START(ARMADA_XP_DT, "Marvell Aramada 370/XP (Device Tree)")
.smp = smp_ops(armada_xp_smp_ops),
.init_machine = armada_370_xp_dt_init,
.map_io = armada_370_xp_map_io,
+ .init_early = armada_370_xp_init_early,
.init_irq = armada_370_xp_init_irq,
.handle_irq = armada_370_xp_handle_irq,
.timer = &armada_370_xp_timer,
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index b8a688cad4c2..2d4b6414609f 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -606,26 +606,6 @@ void __init orion_wdt_init(void)
****************************************************************************/
static u64 orion_xor_dmamask = DMA_BIT_MASK(32);
-void __init orion_xor_init_channels(
- struct mv_xor_platform_data *orion_xor0_data,
- struct platform_device *orion_xor0_channel,
- struct mv_xor_platform_data *orion_xor1_data,
- struct platform_device *orion_xor1_channel)
-{
- /*
- * two engines can't do memset simultaneously, this limitation
- * satisfied by removing memset support from one of the engines.
- */
- dma_cap_set(DMA_MEMCPY, orion_xor0_data->cap_mask);
- dma_cap_set(DMA_XOR, orion_xor0_data->cap_mask);
- platform_device_register(orion_xor0_channel);
-
- dma_cap_set(DMA_MEMCPY, orion_xor1_data->cap_mask);
- dma_cap_set(DMA_MEMSET, orion_xor1_data->cap_mask);
- dma_cap_set(DMA_XOR, orion_xor1_data->cap_mask);
- platform_device_register(orion_xor1_channel);
-}
-
/*****************************************************************************
* XOR0
****************************************************************************/
@@ -636,61 +616,30 @@ static struct resource orion_xor0_shared_resources[] = {
}, {
.name = "xor 0 high",
.flags = IORESOURCE_MEM,
+ }, {
+ .name = "irq channel 0",
+ .flags = IORESOURCE_IRQ,
+ }, {
+ .name = "irq channel 1",
+ .flags = IORESOURCE_IRQ,
},
};
-static struct platform_device orion_xor0_shared = {
- .name = MV_XOR_SHARED_NAME,
- .id = 0,
- .num_resources = ARRAY_SIZE(orion_xor0_shared_resources),
- .resource = orion_xor0_shared_resources,
-};
+static struct mv_xor_channel_data orion_xor0_channels_data[2];
-static struct resource orion_xor00_resources[] = {
- [0] = {
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct mv_xor_platform_data orion_xor00_data = {
- .shared = &orion_xor0_shared,
- .hw_id = 0,
- .pool_size = PAGE_SIZE,
+static struct mv_xor_platform_data orion_xor0_pdata = {
+ .channels = orion_xor0_channels_data,
};
-static struct platform_device orion_xor00_channel = {
+static struct platform_device orion_xor0_shared = {
.name = MV_XOR_NAME,
.id = 0,
- .num_resources = ARRAY_SIZE(orion_xor00_resources),
- .resource = orion_xor00_resources,
- .dev = {
- .dma_mask = &orion_xor_dmamask,
- .coherent_dma_mask = DMA_BIT_MASK(64),
- .platform_data = &orion_xor00_data,
- },
-};
-
-static struct resource orion_xor01_resources[] = {
- [0] = {
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct mv_xor_platform_data orion_xor01_data = {
- .shared = &orion_xor0_shared,
- .hw_id = 1,
- .pool_size = PAGE_SIZE,
-};
-
-static struct platform_device orion_xor01_channel = {
- .name = MV_XOR_NAME,
- .id = 1,
- .num_resources = ARRAY_SIZE(orion_xor01_resources),
- .resource = orion_xor01_resources,
- .dev = {
- .dma_mask = &orion_xor_dmamask,
- .coherent_dma_mask = DMA_BIT_MASK(64),
- .platform_data = &orion_xor01_data,
+ .num_resources = ARRAY_SIZE(orion_xor0_shared_resources),
+ .resource = orion_xor0_shared_resources,
+ .dev = {
+ .dma_mask = &orion_xor_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(64),
+ .platform_data = &orion_xor0_pdata,
},
};
@@ -704,15 +653,23 @@ void __init orion_xor0_init(unsigned long mapbase_low,
orion_xor0_shared_resources[1].start = mapbase_high;
orion_xor0_shared_resources[1].end = mapbase_high + 0xff;
- orion_xor00_resources[0].start = irq_0;
- orion_xor00_resources[0].end = irq_0;
- orion_xor01_resources[0].start = irq_1;
- orion_xor01_resources[0].end = irq_1;
+ orion_xor0_shared_resources[2].start = irq_0;
+ orion_xor0_shared_resources[2].end = irq_0;
+ orion_xor0_shared_resources[3].start = irq_1;
+ orion_xor0_shared_resources[3].end = irq_1;
- platform_device_register(&orion_xor0_shared);
+ /*
+ * two engines can't do memset simultaneously, this limitation
+ * satisfied by removing memset support from one of the engines.
+ */
+ dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[0].cap_mask);
+ dma_cap_set(DMA_XOR, orion_xor0_channels_data[0].cap_mask);
+
+ dma_cap_set(DMA_MEMSET, orion_xor0_channels_data[1].cap_mask);
+ dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[1].cap_mask);
+ dma_cap_set(DMA_XOR, orion_xor0_channels_data[1].cap_mask);
- orion_xor_init_channels(&orion_xor00_data, &orion_xor00_channel,
- &orion_xor01_data, &orion_xor01_channel);
+ platform_device_register(&orion_xor0_shared);
}
/*****************************************************************************
@@ -725,61 +682,30 @@ static struct resource orion_xor1_shared_resources[] = {
}, {
.name = "xor 1 high",
.flags = IORESOURCE_MEM,
+ }, {
+ .name = "irq channel 0",
+ .flags = IORESOURCE_IRQ,
+ }, {
+ .name = "irq channel 1",
+ .flags = IORESOURCE_IRQ,
},
};
-static struct platform_device orion_xor1_shared = {
- .name = MV_XOR_SHARED_NAME,
- .id = 1,
- .num_resources = ARRAY_SIZE(orion_xor1_shared_resources),
- .resource = orion_xor1_shared_resources,
-};
-
-static struct resource orion_xor10_resources[] = {
- [0] = {
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct mv_xor_platform_data orion_xor10_data = {
- .shared = &orion_xor1_shared,
- .hw_id = 0,
- .pool_size = PAGE_SIZE,
-};
-
-static struct platform_device orion_xor10_channel = {
- .name = MV_XOR_NAME,
- .id = 2,
- .num_resources = ARRAY_SIZE(orion_xor10_resources),
- .resource = orion_xor10_resources,
- .dev = {
- .dma_mask = &orion_xor_dmamask,
- .coherent_dma_mask = DMA_BIT_MASK(64),
- .platform_data = &orion_xor10_data,
- },
-};
-
-static struct resource orion_xor11_resources[] = {
- [0] = {
- .flags = IORESOURCE_IRQ,
- },
-};
+static struct mv_xor_channel_data orion_xor1_channels_data[2];
-static struct mv_xor_platform_data orion_xor11_data = {
- .shared = &orion_xor1_shared,
- .hw_id = 1,
- .pool_size = PAGE_SIZE,
+static struct mv_xor_platform_data orion_xor1_pdata = {
+ .channels = orion_xor1_channels_data,
};
-static struct platform_device orion_xor11_channel = {
+static struct platform_device orion_xor1_shared = {
.name = MV_XOR_NAME,
- .id = 3,
- .num_resources = ARRAY_SIZE(orion_xor11_resources),
- .resource = orion_xor11_resources,
- .dev = {
- .dma_mask = &orion_xor_dmamask,
- .coherent_dma_mask = DMA_BIT_MASK(64),
- .platform_data = &orion_xor11_data,
+ .id = 1,
+ .num_resources = ARRAY_SIZE(orion_xor1_shared_resources),
+ .resource = orion_xor1_shared_resources,
+ .dev = {
+ .dma_mask = &orion_xor_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(64),
+ .platform_data = &orion_xor1_pdata,
},
};
@@ -793,15 +719,23 @@ void __init orion_xor1_init(unsigned long mapbase_low,
orion_xor1_shared_resources[1].start = mapbase_high;
orion_xor1_shared_resources[1].end = mapbase_high + 0xff;
- orion_xor10_resources[0].start = irq_0;
- orion_xor10_resources[0].end = irq_0;
- orion_xor11_resources[0].start = irq_1;
- orion_xor11_resources[0].end = irq_1;
+ orion_xor1_shared_resources[2].start = irq_0;
+ orion_xor1_shared_resources[2].end = irq_0;
+ orion_xor1_shared_resources[3].start = irq_1;
+ orion_xor1_shared_resources[3].end = irq_1;
- platform_device_register(&orion_xor1_shared);
+ /*
+ * two engines can't do memset simultaneously, this limitation
+ * satisfied by removing memset support from one of the engines.
+ */
+ dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[0].cap_mask);
+ dma_cap_set(DMA_XOR, orion_xor1_channels_data[0].cap_mask);
- orion_xor_init_channels(&orion_xor10_data, &orion_xor10_channel,
- &orion_xor11_data, &orion_xor11_channel);
+ dma_cap_set(DMA_MEMSET, orion_xor1_channels_data[1].cap_mask);
+ dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[1].cap_mask);
+ dma_cap_set(DMA_XOR, orion_xor1_channels_data[1].cap_mask);
+
+ platform_device_register(&orion_xor1_shared);
}
/*****************************************************************************
OpenPOWER on IntegriCloud