diff options
Diffstat (limited to 'arch/arm')
26 files changed, 296 insertions, 98 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 7bc4a583f4e1..4bf0e8737e1f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -310,7 +310,7 @@ menu "Kernel Features" config SMP bool "Symmetric Multi-Processing (EXPERIMENTAL)" - depends on EXPERIMENTAL #&& n + depends on EXPERIMENTAL && BROKEN #&& n help This enables support for systems with more than one CPU. If you have a system with only one CPU, like most personal computers, say N. If @@ -635,10 +635,6 @@ config PM and the Battery Powered Linux mini-HOWTO, available from <http://www.tldp.org/docs.html#howto>. - Note that, even if you say N here, Linux on the x86 architecture - will issue the hlt instruction if nothing is to be done, thereby - sending the processor to sleep and saving power. - config APM tristate "Advanced Power Management Emulation" depends on PM @@ -650,12 +646,6 @@ config APM battery status information, and user-space programs will receive notification of APM "events" (e.g. battery status change). - If you select "Y" here, you can disable actual use of the APM - BIOS by passing the "apm=off" option to the kernel at boot time. - - Note that the APM support is almost completely disabled for - machines with more than one CPU. - In order to use APM, you will need supporting software. For location and more information, read <file:Documentation/pm.txt> and the Battery Powered Linux mini-HOWTO, available from @@ -665,39 +655,12 @@ config APM manpage ("man 8 hdparm") for that), and it doesn't turn off VESA-compliant "green" monitors. - This driver does not support the TI 4000M TravelMate and the ACER - 486/DX4/75 because they don't have compliant BIOSes. Many "green" - desktop machines also don't have compliant BIOSes, and this driver - may cause those machines to panic during the boot phase. - Generally, if you don't have a battery in your machine, there isn't much point in using this driver and you should say N. If you get random kernel OOPSes or reboots that don't seem to be related to anything, try disabling/enabling this option (or disabling/enabling APM in your BIOS). - Some other things you should try when experiencing seemingly random, - "weird" problems: - - 1) make sure that you have enough swap space and that it is - enabled. - 2) pass the "no-hlt" option to the kernel - 3) switch on floating point emulation in the kernel and pass - the "no387" option to the kernel - 4) pass the "floppy=nodma" option to the kernel - 5) pass the "mem=4M" option to the kernel (thereby disabling - all but the first 4 MB of RAM) - 6) make sure that the CPU is not over clocked. - 7) read the sig11 FAQ at <http://www.bitwizard.nl/sig11/> - 8) disable the cache from your BIOS settings - 9) install a fan for the video card or exchange video RAM - 10) install a better fan for the CPU - 11) exchange RAM chips - 12) exchange the motherboard. - - To compile this driver as a module, choose M here: the - module will be called apm. - endmenu source "net/Kconfig" @@ -752,6 +715,8 @@ source "drivers/hwmon/Kconfig" source "drivers/misc/Kconfig" +source "drivers/mfd/Kconfig" + source "drivers/media/Kconfig" source "drivers/video/Kconfig" diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig index 692af6b5e8ff..666ba393575b 100644 --- a/arch/arm/common/Kconfig +++ b/arch/arm/common/Kconfig @@ -1,6 +1,9 @@ config ICST525 bool +config ARM_GIC + bool + config ICST307 bool diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile index 11f20a43ee3a..a87886564b19 100644 --- a/arch/arm/common/Makefile +++ b/arch/arm/common/Makefile @@ -4,6 +4,7 @@ obj-y += rtctime.o obj-$(CONFIG_ARM_AMBA) += amba.o +obj-$(CONFIG_ARM_GIC) += gic.o obj-$(CONFIG_ICST525) += icst525.o obj-$(CONFIG_ICST307) += icst307.o obj-$(CONFIG_SA1111) += sa1111.o diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c new file mode 100644 index 000000000000..51dbf5489b6b --- /dev/null +++ b/arch/arm/common/gic.c @@ -0,0 +1,166 @@ +/* + * linux/arch/arm/common/gic.c + * + * Copyright (C) 2002 ARM Limited, All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Interrupt architecture for the GIC: + * + * o There is one Interrupt Distributor, which receives interrupts + * from system devices and sends them to the Interrupt Controllers. + * + * o There is one CPU Interface per CPU, which sends interrupts sent + * by the Distributor, and interrupts generated locally, to the + * associated CPU. + * + * Note that IRQs 0-31 are special - they are local to each CPU. + * As such, the enable set/clear, pending set/clear and active bit + * registers are banked per-cpu for these sources. + */ +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/list.h> +#include <linux/smp.h> + +#include <asm/irq.h> +#include <asm/io.h> +#include <asm/mach/irq.h> +#include <asm/hardware/gic.h> + +static void __iomem *gic_dist_base; +static void __iomem *gic_cpu_base; + +/* + * Routines to acknowledge, disable and enable interrupts + * + * Linux assumes that when we're done with an interrupt we need to + * unmask it, in the same way we need to unmask an interrupt when + * we first enable it. + * + * The GIC has a seperate notion of "end of interrupt" to re-enable + * an interrupt after handling, in order to support hardware + * prioritisation. + * + * We can make the GIC behave in the way that Linux expects by making + * our "acknowledge" routine disable the interrupt, then mark it as + * complete. + */ +static void gic_ack_irq(unsigned int irq) +{ + u32 mask = 1 << (irq % 32); + writel(mask, gic_dist_base + GIC_DIST_ENABLE_CLEAR + (irq / 32) * 4); + writel(irq, gic_cpu_base + GIC_CPU_EOI); +} + +static void gic_mask_irq(unsigned int irq) +{ + u32 mask = 1 << (irq % 32); + writel(mask, gic_dist_base + GIC_DIST_ENABLE_CLEAR + (irq / 32) * 4); +} + +static void gic_unmask_irq(unsigned int irq) +{ + u32 mask = 1 << (irq % 32); + writel(mask, gic_dist_base + GIC_DIST_ENABLE_SET + (irq / 32) * 4); +} + +static void gic_set_cpu(struct irqdesc *desc, unsigned int irq, unsigned int cpu) +{ + void __iomem *reg = gic_dist_base + GIC_DIST_TARGET + (irq & ~3); + unsigned int shift = (irq % 4) * 8; + u32 val; + + val = readl(reg) & ~(0xff << shift); + val |= 1 << (cpu + shift); + writel(val, reg); +} + +static struct irqchip gic_chip = { + .ack = gic_ack_irq, + .mask = gic_mask_irq, + .unmask = gic_unmask_irq, +#ifdef CONFIG_SMP + .set_cpu = gic_set_cpu, +#endif +}; + +void __init gic_dist_init(void __iomem *base) +{ + unsigned int max_irq, i; + u32 cpumask = 1 << smp_processor_id(); + + cpumask |= cpumask << 8; + cpumask |= cpumask << 16; + + gic_dist_base = base; + + writel(0, base + GIC_DIST_CTRL); + + /* + * Find out how many interrupts are supported. + */ + max_irq = readl(base + GIC_DIST_CTR) & 0x1f; + max_irq = (max_irq + 1) * 32; + + /* + * The GIC only supports up to 1020 interrupt sources. + * Limit this to either the architected maximum, or the + * platform maximum. + */ + if (max_irq > max(1020, NR_IRQS)) + max_irq = max(1020, NR_IRQS); + + /* + * Set all global interrupts to be level triggered, active low. + */ + for (i = 32; i < max_irq; i += 16) + writel(0, base + GIC_DIST_CONFIG + i * 4 / 16); + + /* + * Set all global interrupts to this CPU only. + */ + for (i = 32; i < max_irq; i += 4) + writel(cpumask, base + GIC_DIST_TARGET + i * 4 / 4); + + /* + * Set priority on all interrupts. + */ + for (i = 0; i < max_irq; i += 4) + writel(0xa0a0a0a0, base + GIC_DIST_PRI + i * 4 / 4); + + /* + * Disable all interrupts. + */ + for (i = 0; i < max_irq; i += 32) + writel(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32); + + /* + * Setup the Linux IRQ subsystem. + */ + for (i = 29; i < max_irq; i++) { + set_irq_chip(i, &gic_chip); + set_irq_handler(i, do_level_IRQ); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); + } + + writel(1, base + GIC_DIST_CTRL); +} + +void __cpuinit gic_cpu_init(void __iomem *base) +{ + gic_cpu_base = base; + writel(0xf0, base + GIC_CPU_PRIMASK); + writel(1, base + GIC_CPU_CTRL); +} + +#ifdef CONFIG_SMP +void gic_raise_softirq(cpumask_t cpumask, unsigned int irq) +{ + unsigned long map = *cpus_addr(cpumask); + + writel(map << 16 | irq, gic_dist_base + GIC_DIST_SOFTINT); +} +#endif diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S index e5d370c235d7..2b6b4c786e65 100644 --- a/arch/arm/kernel/calls.S +++ b/arch/arm/kernel/calls.S @@ -327,6 +327,12 @@ __syscall_start: /* 310 */ .long sys_request_key .long sys_keyctl .long sys_semtimedop +/* vserver */ .long sys_ni_syscall + .long sys_ioprio_set +/* 315 */ .long sys_ioprio_get + .long sys_inotify_init + .long sys_inotify_add_watch + .long sys_inotify_rm_watch __syscall_end: .rept NR_syscalls - (__syscall_end - __syscall_start) / 4 diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 39a6c1b0b9a3..7152bfbee581 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -533,6 +533,13 @@ ENTRY(__switch_to) ldr r3, [r2, #TI_TP_VALUE] stmia ip!, {r4 - sl, fp, sp, lr} @ Store most regs on stack ldr r6, [r2, #TI_CPU_DOMAIN]! +#if __LINUX_ARM_ARCH__ >= 6 +#ifdef CONFIG_CPU_MPCORE + clrex +#else + strex r3, r4, [ip] @ Clear exclusive monitor +#endif +#endif #if defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_IWMMXT) mra r4, r5, acc0 stmia ip, {r4, r5} diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c index 5e435e42dacd..a94d75fef598 100644 --- a/arch/arm/kernel/signal.c +++ b/arch/arm/kernel/signal.c @@ -658,11 +658,12 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, /* * Block the signal if we were unsuccessful. */ - if (ret != 0 || !(ka->sa.sa_flags & SA_NODEFER)) { + if (ret != 0) { spin_lock_irq(&tsk->sighand->siglock); sigorsets(&tsk->blocked, &tsk->blocked, &ka->sa.sa_mask); - sigaddset(&tsk->blocked, sig); + if (!(ka->sa.sa_flags & SA_NODEFER)) + sigaddset(&tsk->blocked, sig); recalc_sigpending(); spin_unlock_irq(&tsk->sighand->siglock); } diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index d571c37ac30c..4554c961251c 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -617,7 +617,7 @@ baddataabort(int code, unsigned long instr, struct pt_regs *regs) notify_die("unknown data abort code", regs, &info, instr, 0); } -volatile void __bug(const char *file, int line, void *data) +void __attribute__((noreturn)) __bug(const char *file, int line, void *data) { printk(KERN_CRIT"kernel BUG at %s:%d!", file, line); if (data) diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h index 2036ff15bda9..64a988c1ad44 100644 --- a/arch/arm/lib/bitops.h +++ b/arch/arm/lib/bitops.h @@ -1,4 +1,6 @@ -#if __LINUX_ARM_ARCH__ >= 6 +#include <linux/config.h> + +#if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_CPU_MPCORE) .macro bitop, instr mov r2, #1 and r3, r0, #7 @ Get bit offset diff --git a/arch/arm/mach-ixp4xx/coyote-setup.c b/arch/arm/mach-ixp4xx/coyote-setup.c index 7f58afb27e71..411ea9996190 100644 --- a/arch/arm/mach-ixp4xx/coyote-setup.c +++ b/arch/arm/mach-ixp4xx/coyote-setup.c @@ -36,7 +36,7 @@ static struct flash_platform_data coyote_flash_data = { static struct resource coyote_flash_resource = { .start = COYOTE_FLASH_BASE, - .end = COYOTE_FLASH_BASE + COYOTE_FLASH_SIZE, + .end = COYOTE_FLASH_BASE + COYOTE_FLASH_SIZE - 1, .flags = IORESOURCE_MEM, }; diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c index 65e356bd10d6..333459d6aa46 100644 --- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c +++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c @@ -114,7 +114,7 @@ static struct flash_platform_data gtwx5715_flash_data = { static struct resource gtwx5715_flash_resource = { .start = GTWX5715_FLASH_BASE, - .end = GTWX5715_FLASH_BASE + GTWX5715_FLASH_SIZE, + .end = GTWX5715_FLASH_BASE + GTWX5715_FLASH_SIZE - 1, .flags = IORESOURCE_MEM, }; diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c index 4633470a6a37..fa0646c8693b 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-setup.c +++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c @@ -36,7 +36,7 @@ static struct flash_platform_data ixdp425_flash_data = { static struct resource ixdp425_flash_resource = { .start = IXDP425_FLASH_BASE, - .end = IXDP425_FLASH_BASE + IXDP425_FLASH_SIZE, + .end = IXDP425_FLASH_BASE + IXDP425_FLASH_SIZE - 1, .flags = IORESOURCE_MEM, }; diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c index ff2f25409e44..0b88993dfd27 100644 --- a/arch/arm/mach-s3c2410/s3c2410.c +++ b/arch/arm/mach-s3c2410/s3c2410.c @@ -18,6 +18,7 @@ * 28-Sep-2004 BJD Updates for new serial port bits * 04-Nov-2004 BJD Updated UART configuration process * 10-Jan-2005 BJD Removed s3c2410_clock_tick_rate + * 13-Aug-2005 DA Removed UART from initial I/O mappings */ #include <linux/kernel.h> @@ -49,10 +50,9 @@ static struct map_desc s3c2410_iodesc[] __initdata = { IODESC_ENT(USBHOST), IODESC_ENT(CLKPWR), IODESC_ENT(LCD), - IODESC_ENT(UART), IODESC_ENT(TIMER), IODESC_ENT(ADC), - IODESC_ENT(WATCHDOG) + IODESC_ENT(WATCHDOG), }; static struct resource s3c_uart0_resource[] = { diff --git a/arch/arm/mach-s3c2410/usb-simtec.c b/arch/arm/mach-s3c2410/usb-simtec.c index 7f2b61362976..f021fd82be52 100644 --- a/arch/arm/mach-s3c2410/usb-simtec.c +++ b/arch/arm/mach-s3c2410/usb-simtec.c @@ -1,6 +1,6 @@ /* linux/arch/arm/mach-s3c2410/usb-simtec.c * - * Copyright (c) 2004 Simtec Electronics + * Copyright (c) 2004,2005 Simtec Electronics * Ben Dooks <ben@simtec.co.uk> * * http://www.simtec.co.uk/products/EB2410ITX/ @@ -14,6 +14,8 @@ * Modifications: * 14-Sep-2004 BJD Created * 18-Oct-2004 BJD Cleanups, and added code to report OC cleared + * 09-Aug-2005 BJD Renamed s3c2410_report_oc to s3c2410_usb_report_oc + * 09-Aug-2005 BJD Ports powered only if both are enabled */ #define DEBUG @@ -47,13 +49,19 @@ * designed boards. */ +static unsigned int power_state[2]; + static void usb_simtec_powercontrol(int port, int to) { pr_debug("usb_simtec_powercontrol(%d,%d)\n", port, to); - if (port == 1) - s3c2410_gpio_setpin(S3C2410_GPB4, to ? 0:1); + power_state[port] = to; + + if (power_state[0] && power_state[1]) + s3c2410_gpio_setpin(S3C2410_GPB4, 0); + else + s3c2410_gpio_setpin(S3C2410_GPB4, 1); } static irqreturn_t @@ -63,10 +71,10 @@ usb_simtec_ocirq(int irq, void *pw, struct pt_regs *regs) if (s3c2410_gpio_getpin(S3C2410_GPG10) == 0) { pr_debug("usb_simtec: over-current irq (oc detected)\n"); - s3c2410_report_oc(info, 3); + s3c2410_usb_report_oc(info, 3); } else { pr_debug("usb_simtec: over-current irq (oc cleared)\n"); - s3c2410_report_oc(info, 0); + s3c2410_usb_report_oc(info, 0); } return IRQ_HANDLED; diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c index 4d4d303ee3a8..24687f511bf5 100644 --- a/arch/arm/mach-sa1100/assabet.c +++ b/arch/arm/mach-sa1100/assabet.c @@ -35,6 +35,7 @@ #include <asm/mach/map.h> #include <asm/mach/serial_sa1100.h> #include <asm/arch/assabet.h> +#include <asm/arch/mcp.h> #include "generic.h" @@ -198,6 +199,11 @@ static struct irda_platform_data assabet_irda_data = { .set_speed = assabet_irda_set_speed, }; +static struct mcp_plat_data assabet_mcp_data = { + .mccr0 = MCCR0_ADM, + .sclk_rate = 11981000, +}; + static void __init assabet_init(void) { /* @@ -246,6 +252,7 @@ static void __init assabet_init(void) sa11x0_set_flash_data(&assabet_flash_data, assabet_flash_resources, ARRAY_SIZE(assabet_flash_resources)); sa11x0_set_irda_data(&assabet_irda_data); + sa11x0_set_mcp_data(&assabet_mcp_data); } /* diff --git a/arch/arm/mach-sa1100/cerf.c b/arch/arm/mach-sa1100/cerf.c index 0aa918e24c31..9484be7dc671 100644 --- a/arch/arm/mach-sa1100/cerf.c +++ b/arch/arm/mach-sa1100/cerf.c @@ -29,6 +29,7 @@ #include <asm/mach/serial_sa1100.h> #include <asm/arch/cerf.h> +#include <asm/arch/mcp.h> #include "generic.h" static struct resource cerfuart2_resources[] = { @@ -116,10 +117,16 @@ static void __init cerf_map_io(void) GPDR |= CERF_GPIO_CF_RESET; } +static struct mcp_plat_data cerf_mcp_data = { + .mccr0 = MCCR0_ADM, + .sclk_rate = 11981000, +}; + static void __init cerf_init(void) { platform_add_devices(cerf_devices, ARRAY_SIZE(cerf_devices)); sa11x0_set_flash_data(&cerf_flash_data, &cerf_flash_resource, 1); + sa11x0_set_mcp_data(&cerf_mcp_data); } MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube") diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c index 95ae217be1bc..3f1e358455e5 100644 --- a/arch/arm/mach-sa1100/generic.c +++ b/arch/arm/mach-sa1100/generic.c @@ -221,6 +221,11 @@ static struct platform_device sa11x0mcp_device = { .resource = sa11x0mcp_resources, }; +void sa11x0_set_mcp_data(struct mcp_plat_data *data) +{ + sa11x0mcp_device.dev.platform_data = data; +} + static struct resource sa11x0ssp_resources[] = { [0] = { .start = 0x80070000, diff --git a/arch/arm/mach-sa1100/generic.h b/arch/arm/mach-sa1100/generic.h index bfe41da9923e..279e3afa3c39 100644 --- a/arch/arm/mach-sa1100/generic.h +++ b/arch/arm/mach-sa1100/generic.h @@ -34,5 +34,8 @@ struct resource; extern void sa11x0_set_flash_data(struct flash_platform_data *flash, struct resource *res, int nr); +struct sa11x0_ssp_plat_ops; +extern void sa11x0_set_ssp_data(struct sa11x0_ssp_plat_ops *ops); + struct irda_platform_data; void sa11x0_set_irda_data(struct irda_platform_data *irda); diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c index 870b488aeda4..ed6744d480af 100644 --- a/arch/arm/mach-sa1100/lart.c +++ b/arch/arm/mach-sa1100/lart.c @@ -13,12 +13,23 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/serial_sa1100.h> +#include <asm/arch/mcp.h> #include "generic.h" #warning "include/asm/arch-sa1100/ide.h needs fixing for lart" +static struct mcp_plat_data lart_mcp_data = { + .mccr0 = MCCR0_ADM, + .sclk_rate = 11981000, +}; + +static void __init lart_init(void) +{ + sa11x0_set_mcp_data(&lart_mcp_data); +} + static struct map_desc lart_io_desc[] __initdata = { /* virtual physical length type */ { 0xe8000000, 0x00000000, 0x00400000, MT_DEVICE }, /* main flash memory */ @@ -47,5 +58,6 @@ MACHINE_START(LART, "LART") .boot_params = 0xc0000100, .map_io = lart_map_io, .init_irq = sa1100_init_irq, + .init_machine = lart_init, .timer = &sa1100_timer, MACHINE_END diff --git a/arch/arm/mach-sa1100/shannon.c b/arch/arm/mach-sa1100/shannon.c index 43a00359fcdd..7482288278d9 100644 --- a/arch/arm/mach-sa1100/shannon.c +++ b/arch/arm/mach-sa1100/shannon.c @@ -18,6 +18,7 @@ #include <asm/mach/flash.h> #include <asm/mach/map.h> #include <asm/mach/serial_sa1100.h> +#include <asm/arch/mcp.h> #include <asm/arch/shannon.h> #include "generic.h" @@ -52,9 +53,15 @@ static struct resource shannon_flash_resource = { .flags = IORESOURCE_MEM, }; +static struct mcp_plat_data shannon_mcp_data = { + .mccr0 = MCCR0_ADM, + .sclk_rate = 11981000, +}; + static void __init shannon_init(void) { sa11x0_set_flash_data(&shannon_flash_data, &shannon_flash_resource, 1); + sa11x0_set_mcp_data(&shannon_mcp_data); } static void __init shannon_map_io(void) diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c index 77978586b126..07f6d5fd7bb0 100644 --- a/arch/arm/mach-sa1100/simpad.c +++ b/arch/arm/mach-sa1100/simpad.c @@ -23,6 +23,7 @@ #include <asm/mach/flash.h> #include <asm/mach/map.h> #include <asm/mach/serial_sa1100.h> +#include <asm/arch/mcp.h> #include <asm/arch/simpad.h> #include <linux/serial_core.h> @@ -123,6 +124,11 @@ static struct resource simpad_flash_resources [] = { } }; +static struct mcp_plat_data simpad_mcp_data = { + .mccr0 = MCCR0_ADM, + .sclk_rate = 11981000, +}; + static void __init simpad_map_io(void) @@ -157,6 +163,7 @@ static void __init simpad_map_io(void) sa11x0_set_flash_data(&simpad_flash_data, simpad_flash_resources, ARRAY_SIZE(simpad_flash_resources)); + sa11x0_set_mcp_data(&simpad_mcp_data); } static void simpad_power_off(void) diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index afbbeb6f4658..db5e47dfc303 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -384,7 +384,7 @@ config CPU_DCACHE_DISABLE config CPU_DCACHE_WRITETHROUGH bool "Force write through D-cache" - depends on (CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020) && !CPU_DISABLE_DCACHE + depends on (CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020) && !CPU_DCACHE_DISABLE default y if CPU_ARM925T help Say Y here to use the data cache in writethrough mode. Unless you diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c index e33fe4229d05..3c655c54e231 100644 --- a/arch/arm/mm/mm-armv.c +++ b/arch/arm/mm/mm-armv.c @@ -383,6 +383,7 @@ static void __init build_mem_type_table(void) { struct cachepolicy *cp; unsigned int cr = get_cr(); + unsigned int user_pgprot; int cpu_arch = cpu_architecture(); int i; @@ -408,6 +409,9 @@ static void __init build_mem_type_table(void) } } + cp = &cache_policies[cachepolicy]; + user_pgprot = cp->pte; + /* * ARMv6 and above have extended page tables. */ @@ -426,11 +430,18 @@ static void __init build_mem_type_table(void) mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE; mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE; + /* + * Mark the device area as "shared device" + */ mem_types[MT_DEVICE].prot_pte |= L_PTE_BUFFERABLE; mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED; - } - cp = &cache_policies[cachepolicy]; + /* + * User pages need to be mapped with the ASID + * (iow, non-global) + */ + user_pgprot |= L_PTE_ASID; + } if (cpu_arch >= CPU_ARCH_ARMv5) { mem_types[MT_LOW_VECTORS].prot_pte |= cp->pte & PTE_CACHEABLE; @@ -448,7 +459,7 @@ static void __init build_mem_type_table(void) for (i = 0; i < 16; i++) { unsigned long v = pgprot_val(protection_map[i]); - v &= (~(PTE_BUFFERABLE|PTE_CACHEABLE)) | cp->pte; + v &= (~(PTE_BUFFERABLE|PTE_CACHEABLE)) | user_pgprot; protection_map[i] = __pgprot(v); } diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 352db98ee269..139a38670c5d 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S @@ -105,18 +105,12 @@ ENTRY(cpu_v6_dcache_clean_area) ENTRY(cpu_v6_switch_mm) mov r2, #0 ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id - mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB + mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB mcr p15, 0, r2, c7, c10, 4 @ drain write buffer mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 mcr p15, 0, r1, c13, c0, 1 @ set context ID mov pc, lr -#define nG (1 << 11) -#define APX (1 << 9) -#define AP1 (1 << 5) -#define AP0 (1 << 4) -#define XN (1 << 0) - /* * cpu_v6_set_pte(ptep, pte) * @@ -139,24 +133,24 @@ ENTRY(cpu_v6_switch_mm) ENTRY(cpu_v6_set_pte) str r1, [r0], #-2048 @ linux version - bic r2, r1, #0x00000ff0 + bic r2, r1, #0x000007f0 bic r2, r2, #0x00000003 - orr r2, r2, #AP0 | 2 + orr r2, r2, #PTE_EXT_AP0 | 2 tst r1, #L_PTE_WRITE tstne r1, #L_PTE_DIRTY - orreq r2, r2, #APX + orreq r2, r2, #PTE_EXT_APX tst r1, #L_PTE_USER - orrne r2, r2, #AP1 | nG - tstne r2, #APX - bicne r2, r2, #APX | AP0 + orrne r2, r2, #PTE_EXT_AP1 + tstne r2, #PTE_EXT_APX + bicne r2, r2, #PTE_EXT_APX | PTE_EXT_AP0 tst r1, #L_PTE_YOUNG - biceq r2, r2, #APX | AP1 | AP0 + biceq r2, r2, #PTE_EXT_APX | PTE_EXT_AP_MASK @ tst r1, #L_PTE_EXEC -@ orreq r2, r2, #XN +@ orreq r2, r2, #PTE_EXT_XN tst r1, #L_PTE_PRESENT moveq r2, #0 diff --git a/arch/arm/nwfpe/fpopcode.h b/arch/arm/nwfpe/fpopcode.h index 8035f4faafbf..1777e92a88e6 100644 --- a/arch/arm/nwfpe/fpopcode.h +++ b/arch/arm/nwfpe/fpopcode.h @@ -370,20 +370,20 @@ TABLE 5 #define getRoundingMode(opcode) ((opcode & MASK_ROUNDING_MODE) >> 5) #ifdef CONFIG_FPE_NWFPE_XP -static inline const floatx80 getExtendedConstant(const unsigned int nIndex) +static inline __attribute_pure__ floatx80 getExtendedConstant(const unsigned int nIndex) { extern const floatx80 floatx80Constant[]; return floatx80Constant[nIndex]; } #endif -static inline const float64 getDoubleConstant(const unsigned int nIndex) +static inline __attribute_pure__ float64 getDoubleConstant(const unsigned int nIndex) { extern const float64 float64Constant[]; return float64Constant[nIndex]; } -static inline const float32 getSingleConstant(const unsigned int nIndex) +static inline __attribute_pure__ float32 getSingleConstant(const unsigned int nIndex) { extern const float32 float32Constant[]; return float32Constant[nIndex]; diff --git a/arch/arm/nwfpe/softfloat.c b/arch/arm/nwfpe/softfloat.c index 8b75a6e7cb3a..f9f049132a17 100644 --- a/arch/arm/nwfpe/softfloat.c +++ b/arch/arm/nwfpe/softfloat.c @@ -1602,9 +1602,7 @@ flag float32_le_quiet( float32 a, float32 b ) if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) ) || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) ) ) { - if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid ); - } + /* Do nothing, even if NaN as we're quiet */ return 0; } aSign = extractFloat32Sign( a ); @@ -1629,9 +1627,7 @@ flag float32_lt_quiet( float32 a, float32 b ) if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) ) || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) ) ) { - if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid ); - } + /* Do nothing, even if NaN as we're quiet */ return 0; } aSign = extractFloat32Sign( a ); @@ -2493,9 +2489,7 @@ flag float64_le_quiet( float64 a, float64 b ) if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) ) || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) ) ) { - if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid ); - } + /* Do nothing, even if NaN as we're quiet */ return 0; } aSign = extractFloat64Sign( a ); @@ -2520,9 +2514,7 @@ flag float64_lt_quiet( float64 a, float64 b ) if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) ) || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) ) ) { - if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) { - float_raise( float_flag_invalid ); - } + /* Do nothing, even if NaN as we're quiet */ return 0; } aSign = extractFloat64Sign( a ); @@ -3256,7 +3248,7 @@ flag floatx80_eq( floatx80 a, floatx80 b ) ) { if ( floatx80_is_signaling_nan( a ) || floatx80_is_signaling_nan( b ) ) { - roundData->exception |= float_flag_invalid; + float_raise( float_flag_invalid ); } return 0; } @@ -3286,7 +3278,7 @@ flag floatx80_le( floatx80 a, floatx80 b ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) && (bits64) ( extractFloatx80Frac( b )<<1 ) ) ) { - roundData->exception |= float_flag_invalid; + float_raise( float_flag_invalid ); return 0; } aSign = extractFloatx80Sign( a ); @@ -3320,7 +3312,7 @@ flag floatx80_lt( floatx80 a, floatx80 b ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) && (bits64) ( extractFloatx80Frac( b )<<1 ) ) ) { - roundData->exception |= float_flag_invalid; + float_raise( float_flag_invalid ); return 0; } aSign = extractFloatx80Sign( a ); @@ -3353,7 +3345,7 @@ flag floatx80_eq_signaling( floatx80 a, floatx80 b ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) && (bits64) ( extractFloatx80Frac( b )<<1 ) ) ) { - roundData->exception |= float_flag_invalid; + float_raise( float_flag_invalid ); return 0; } return @@ -3382,10 +3374,7 @@ flag floatx80_le_quiet( floatx80 a, floatx80 b ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) && (bits64) ( extractFloatx80Frac( b )<<1 ) ) ) { - if ( floatx80_is_signaling_nan( a ) - || floatx80_is_signaling_nan( b ) ) { - roundData->exception |= float_flag_invalid; - } + /* Do nothing, even if NaN as we're quiet */ return 0; } aSign = extractFloatx80Sign( a ); @@ -3419,10 +3408,7 @@ flag floatx80_lt_quiet( floatx80 a, floatx80 b ) || ( ( extractFloatx80Exp( b ) == 0x7FFF ) && (bits64) ( extractFloatx80Frac( b )<<1 ) ) ) { - if ( floatx80_is_signaling_nan( a ) - || floatx80_is_signaling_nan( b ) ) { - roundData->exception |= float_flag_invalid; - } + /* Do nothing, even if NaN as we're quiet */ return 0; } aSign = extractFloatx80Sign( a ); |
