diff options
Diffstat (limited to 'arch/arm/plat-samsung')
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h | 176 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/gpio-cfg.h | 110 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/gpio-core.h | 135 |
3 files changed, 421 insertions, 0 deletions
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h new file mode 100644 index 000000000000..652e2bbdaa20 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h @@ -0,0 +1,176 @@ +/* linux/arch/arm/plat-s3c/include/plat/gpio-cfg-helper.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks <ben@simtec.co.uk> + * + * S3C Platform - GPIO pin configuration helper definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/* This is meant for core cpu support, machine or other driver files + * should not be including this header. + */ + +#ifndef __PLAT_GPIO_CFG_HELPERS_H +#define __PLAT_GPIO_CFG_HELPERS_H __FILE__ + +/* As a note, all gpio configuration functions are entered exclusively, either + * with the relevant lock held or the system prevented from doing anything else + * by disabling interrupts. +*/ + +static inline int s3c_gpio_do_setcfg(struct s3c_gpio_chip *chip, + unsigned int off, unsigned int config) +{ + return (chip->config->set_config)(chip, off, config); +} + +static inline int s3c_gpio_do_setpull(struct s3c_gpio_chip *chip, + unsigned int off, s3c_gpio_pull_t pull) +{ + return (chip->config->set_pull)(chip, off, pull); +} + +/** + * s3c_gpio_setcfg_s3c24xx - S3C24XX style GPIO configuration. + * @chip: The gpio chip that is being configured. + * @off: The offset for the GPIO being configured. + * @cfg: The configuration value to set. + * + * This helper deal with the GPIO cases where the control register + * has two bits of configuration per gpio, which have the following + * functions: + * 00 = input + * 01 = output + * 1x = special function +*/ +extern int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip, + unsigned int off, unsigned int cfg); + +/** + * s3c_gpio_setcfg_s3c24xx_a - S3C24XX style GPIO configuration (Bank A) + * @chip: The gpio chip that is being configured. + * @off: The offset for the GPIO being configured. + * @cfg: The configuration value to set. + * + * This helper deal with the GPIO cases where the control register + * has one bit of configuration for the gpio, where setting the bit + * means the pin is in special function mode and unset means output. +*/ +extern int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip, + unsigned int off, unsigned int cfg); + +/** + * s3c_gpio_setcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config. + * @chip: The gpio chip that is being configured. + * @off: The offset for the GPIO being configured. + * @cfg: The configuration value to set. + * + * This helper deal with the GPIO cases where the control register has 4 bits + * of control per GPIO, generally in the form of: + * 0000 = Input + * 0001 = Output + * others = Special functions (dependant on bank) + * + * Note, since the code to deal with the case where there are two control + * registers instead of one, we do not have a seperate set of functions for + * each case. +*/ +extern int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip, + unsigned int off, unsigned int cfg); + + +/* Pull-{up,down} resistor controls. + * + * S3C2410,S3C2440,S3C24A0 = Pull-UP, + * S3C2412,S3C2413 = Pull-Down + * S3C6400,S3C6410 = Pull-Both [None,Down,Up,Undef] + * S3C2443 = Pull-Both [not same as S3C6400] + */ + +/** + * s3c_gpio_setpull_1up() - Pull configuration for choice of up or none. + * @chip: The gpio chip that is being configured. + * @off: The offset for the GPIO being configured. + * @param: pull: The pull mode being requested. + * + * This is a helper function for the case where we have GPIOs with one + * bit configuring the presence of a pull-up resistor. + */ +extern int s3c_gpio_setpull_1up(struct s3c_gpio_chip *chip, + unsigned int off, s3c_gpio_pull_t pull); + +/** + * s3c_gpio_setpull_1down() - Pull configuration for choice of down or none + * @chip: The gpio chip that is being configured + * @off: The offset for the GPIO being configured + * @param: pull: The pull mode being requested + * + * This is a helper function for the case where we have GPIOs with one + * bit configuring the presence of a pull-down resistor. + */ +extern int s3c_gpio_setpull_1down(struct s3c_gpio_chip *chip, + unsigned int off, s3c_gpio_pull_t pull); + +/** + * s3c_gpio_setpull_upown() - Pull configuration for choice of up, down or none + * @chip: The gpio chip that is being configured. + * @off: The offset for the GPIO being configured. + * @param: pull: The pull mode being requested. + * + * This is a helper function for the case where we have GPIOs with two + * bits configuring the presence of a pull resistor, in the following + * order: + * 00 = No pull resistor connected + * 01 = Pull-up resistor connected + * 10 = Pull-down resistor connected + */ +extern int s3c_gpio_setpull_updown(struct s3c_gpio_chip *chip, + unsigned int off, s3c_gpio_pull_t pull); + + +/** + * s3c_gpio_getpull_updown() - Get configuration for choice of up, down or none + * @chip: The gpio chip that the GPIO pin belongs to + * @off: The offset to the pin to get the configuration of. + * + * This helper function reads the state of the pull-{up,down} resistor for the + * given GPIO in the same case as s3c_gpio_setpull_upown. +*/ +extern s3c_gpio_pull_t s3c_gpio_getpull_updown(struct s3c_gpio_chip *chip, + unsigned int off); + +/** + * s3c_gpio_setpull_s3c2443() - Pull configuration for s3c2443. + * @chip: The gpio chip that is being configured. + * @off: The offset for the GPIO being configured. + * @param: pull: The pull mode being requested. + * + * This is a helper function for the case where we have GPIOs with two + * bits configuring the presence of a pull resistor, in the following + * order: + * 00 = Pull-up resistor connected + * 10 = Pull-down resistor connected + * x1 = No pull up resistor + */ +extern int s3c_gpio_setpull_s3c2443(struct s3c_gpio_chip *chip, + unsigned int off, s3c_gpio_pull_t pull); + +/** + * s3c_gpio_getpull_s3c2443() - Get configuration for s3c2443 pull resistors + * @chip: The gpio chip that the GPIO pin belongs to. + * @off: The offset to the pin to get the configuration of. + * + * This helper function reads the state of the pull-{up,down} resistor for the + * given GPIO in the same case as s3c_gpio_setpull_upown. +*/ +extern s3c_gpio_pull_t s3c_gpio_getpull_s3c24xx(struct s3c_gpio_chip *chip, + unsigned int off); + +#endif /* __PLAT_GPIO_CFG_HELPERS_H */ + diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h new file mode 100644 index 000000000000..29cd6a86cade --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h @@ -0,0 +1,110 @@ +/* linux/arch/arm/plat-s3c/include/plat/gpio-cfg.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks <ben@simtec.co.uk> + * + * S3C Platform - GPIO pin configuration + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/* This file contains the necessary definitions to get the basic gpio + * pin configuration done such as setting a pin to input or output or + * changing the pull-{up,down} configurations. + */ + +/* Note, this interface is being added to the s3c64xx arch first and will + * be added to the s3c24xx systems later. + */ + +#ifndef __PLAT_GPIO_CFG_H +#define __PLAT_GPIO_CFG_H __FILE__ + +typedef unsigned int __bitwise__ s3c_gpio_pull_t; + +/* forward declaration if gpio-core.h hasn't been included */ +struct s3c_gpio_chip; + +/** + * struct s3c_gpio_cfg GPIO configuration + * @cfg_eint: Configuration setting when used for external interrupt source + * @get_pull: Read the current pull configuration for the GPIO + * @set_pull: Set the current pull configuraiton for the GPIO + * @set_config: Set the current configuration for the GPIO + * @get_config: Read the current configuration for the GPIO + * + * Each chip can have more than one type of GPIO bank available and some + * have different capabilites even when they have the same control register + * layouts. Provide an point to vector control routine and provide any + * per-bank configuration information that other systems such as the + * external interrupt code will need. + */ +struct s3c_gpio_cfg { + unsigned int cfg_eint; + + s3c_gpio_pull_t (*get_pull)(struct s3c_gpio_chip *chip, unsigned offs); + int (*set_pull)(struct s3c_gpio_chip *chip, unsigned offs, + s3c_gpio_pull_t pull); + + unsigned (*get_config)(struct s3c_gpio_chip *chip, unsigned offs); + int (*set_config)(struct s3c_gpio_chip *chip, unsigned offs, + unsigned config); +}; + +#define S3C_GPIO_SPECIAL_MARK (0xfffffff0) +#define S3C_GPIO_SPECIAL(x) (S3C_GPIO_SPECIAL_MARK | (x)) + +/* Defines for generic pin configurations */ +#define S3C_GPIO_INPUT (S3C_GPIO_SPECIAL(0)) +#define S3C_GPIO_OUTPUT (S3C_GPIO_SPECIAL(1)) +#define S3C_GPIO_SFN(x) (S3C_GPIO_SPECIAL(x)) + +#define s3c_gpio_is_cfg_special(_cfg) \ + (((_cfg) & S3C_GPIO_SPECIAL_MARK) == S3C_GPIO_SPECIAL_MARK) + +/** + * s3c_gpio_cfgpin() - Change the GPIO function of a pin. + * @pin pin The pin number to configure. + * @pin to The configuration for the pin's function. + * + * Configure which function is actually connected to the external + * pin, such as an gpio input, output or some form of special function + * connected to an internal peripheral block. + */ +extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to); + +/* Define values for the pull-{up,down} available for each gpio pin. + * + * These values control the state of the weak pull-{up,down} resistors + * available on most pins on the S3C series. Not all chips support both + * up or down settings, and it may be dependant on the chip that is being + * used to whether the particular mode is available. + */ +#define S3C_GPIO_PULL_NONE ((__force s3c_gpio_pull_t)0x00) +#define S3C_GPIO_PULL_DOWN ((__force s3c_gpio_pull_t)0x01) +#define S3C_GPIO_PULL_UP ((__force s3c_gpio_pull_t)0x02) + +/** + * s3c_gpio_setpull() - set the state of a gpio pin pull resistor + * @pin: The pin number to configure the pull resistor. + * @pull: The configuration for the pull resistor. + * + * This function sets the state of the pull-{up,down} resistor for the + * specified pin. It will return 0 if successfull, or a negative error + * code if the pin cannot support the requested pull setting. +*/ +extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull); + +/** + * s3c_gpio_getpull() - get the pull resistor state of a gpio pin + * @pin: The pin number to get the settings for + * + * Read the pull resistor value for the specified pin. +*/ +extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin); + +#endif /* __PLAT_GPIO_CFG_H */ diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h new file mode 100644 index 000000000000..94fed584d5ae --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/gpio-core.h @@ -0,0 +1,135 @@ +/* linux/arch/arm/plat-s3c/include/plat/gpio-core.h + * + * Copyright 2008 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks <ben@simtec.co.uk> + * + * S3C Platform - GPIO core + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#define GPIOCON_OFF (0x00) +#define GPIODAT_OFF (0x04) + +#define con_4bit_shift(__off) ((__off) * 4) + +/* Define the core gpiolib support functions that the s3c platforms may + * need to extend or change depending on the hardware and the s3c chip + * selected at build or found at run time. + * + * These definitions are not intended for driver inclusion, there is + * nothing here that should not live outside the platform and core + * specific code. +*/ + +struct s3c_gpio_chip; + +/** + * struct s3c_gpio_pm - power management (suspend/resume) information + * @save: Routine to save the state of the GPIO block + * @resume: Routine to resume the GPIO block. + */ +struct s3c_gpio_pm { + void (*save)(struct s3c_gpio_chip *chip); + void (*resume)(struct s3c_gpio_chip *chip); +}; + +struct s3c_gpio_cfg; + +/** + * struct s3c_gpio_chip - wrapper for specific implementation of gpio + * @chip: The chip structure to be exported via gpiolib. + * @base: The base pointer to the gpio configuration registers. + * @config: special function and pull-resistor control information. + * @pm_save: Save information for suspend/resume support. + * + * This wrapper provides the necessary information for the Samsung + * specific gpios being registered with gpiolib. + */ +struct s3c_gpio_chip { + struct gpio_chip chip; + struct s3c_gpio_cfg *config; + struct s3c_gpio_pm *pm; + void __iomem *base; +#ifdef CONFIG_PM + u32 pm_save[4]; +#endif +}; + +static inline struct s3c_gpio_chip *to_s3c_gpio(struct gpio_chip *gpc) +{ + return container_of(gpc, struct s3c_gpio_chip, chip); +} + +/** s3c_gpiolib_add() - add the s3c specific version of a gpio_chip. + * @chip: The chip to register + * + * This is a wrapper to gpiochip_add() that takes our specific gpio chip + * information and makes the necessary alterations for the platform and + * notes the information for use with the configuration systems and any + * other parts of the system. + */ +extern void s3c_gpiolib_add(struct s3c_gpio_chip *chip); + +/* CONFIG_S3C_GPIO_TRACK enables the tracking of the s3c specific gpios + * for use with the configuration calls, and other parts of the s3c gpiolib + * support code. + * + * Not all s3c support code will need this, as some configurations of cpu + * may only support one or two different configuration options and have an + * easy gpio to s3c_gpio_chip mapping function. If this is the case, then + * the machine support file should provide its own s3c_gpiolib_getchip() + * and any other necessary functions. + */ + +/** + * samsung_gpiolib_add_4bit_chips - 4bit single register GPIO config. + * @chip: The gpio chip that is being configured. + * @nr_chips: The no of chips (gpio ports) for the GPIO being configured. + * + * This helper deal with the GPIO cases where the control register has 4 bits + * of control per GPIO, generally in the form of: + * 0000 = Input + * 0001 = Output + * others = Special functions (dependant on bank) + * + * Note, since the code to deal with the case where there are two control + * registers instead of one, we do not have a seperate set of function + * (samsung_gpiolib_add_4bit2_chips)for each case. + */ +extern void samsung_gpiolib_add_4bit_chips(struct s3c_gpio_chip *chip, + int nr_chips); +extern void samsung_gpiolib_add_4bit2_chips(struct s3c_gpio_chip *chip, + int nr_chips); + +extern void samsung_gpiolib_add_4bit(struct s3c_gpio_chip *chip); +extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip); + +#ifdef CONFIG_S3C_GPIO_TRACK +extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END]; + +static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int chip) +{ + return (chip < S3C_GPIO_END) ? s3c_gpios[chip] : NULL; +} +#else +/* machine specific code should provide s3c_gpiolib_getchip */ + +static inline void s3c_gpiolib_track(struct s3c_gpio_chip *chip) { } +#endif + +#ifdef CONFIG_PM +extern struct s3c_gpio_pm s3c_gpio_pm_1bit; +extern struct s3c_gpio_pm s3c_gpio_pm_2bit; +extern struct s3c_gpio_pm s3c_gpio_pm_4bit; +#define __gpio_pm(x) x +#else +#define s3c_gpio_pm_1bit NULL +#define s3c_gpio_pm_2bit NULL +#define s3c_gpio_pm_4bit NULL +#define __gpio_pm(x) NULL + +#endif /* CONFIG_PM */ |
