diff options
Diffstat (limited to 'arch/arm/plat-samsung')
| -rw-r--r-- | arch/arm/plat-samsung/Kconfig | 6 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/Makefile | 3 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/devs.c | 2 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/cpu.h | 15 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/s5p-time.h | 40 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/samsung-time.h | 53 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/samsung-time.c (renamed from arch/arm/plat-samsung/s5p-time.c) | 138 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/time.c | 287 |
8 files changed, 137 insertions, 407 deletions
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 91c2d72e689b..54d186106f9f 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig @@ -25,7 +25,7 @@ config PLAT_S5P select PLAT_SAMSUNG select S3C_GPIO_TRACK select S5P_GPIO_DRVSTR - select SAMSUNG_CLKSRC + select SAMSUNG_CLKSRC if !COMMON_CLK select SAMSUNG_GPIOLIB_4BIT select SAMSUNG_IRQ_VIC_TIMER help @@ -62,7 +62,7 @@ config S3C_LOWLEVEL_UART_PORT # timer options -config S5P_HRT +config SAMSUNG_HRT bool select SAMSUNG_DEV_PWM help @@ -81,7 +81,7 @@ config SAMSUNG_CLKSRC used by newer systems such as the S3C64XX. config S5P_CLOCK - def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS) + def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210) help Support common clock part for ARCH_S5P and ARCH_EXYNOS SoCs diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile index 3a7c64d1814a..a23c460299a1 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile @@ -12,8 +12,7 @@ obj- := # Objects we always build independent of SoC choice obj-y += init.o cpu.o -obj-$(CONFIG_ARCH_USES_GETTIMEOFFSET) += time.o -obj-$(CONFIG_S5P_HRT) += s5p-time.o +obj-$(CONFIG_SAMSUNG_HRT) += samsung-time.o obj-$(CONFIG_SAMSUNG_CLOCK) += clock.o obj-$(CONFIG_SAMSUNG_CLOCK) += pwm-clock.o diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c index 33ad3f32c2b9..30c2fe243f76 100644 --- a/arch/arm/plat-samsung/devs.c +++ b/arch/arm/plat-samsung/devs.c @@ -1074,7 +1074,7 @@ struct platform_device s5p_device_onenand = { /* PMU */ -#ifdef CONFIG_PLAT_S5P +#if defined(CONFIG_PLAT_S5P) && !defined(CONFIG_ARCH_EXYNOS) static struct resource s5p_pmu_resource[] = { DEFINE_RES_IRQ(IRQ_PMU) }; diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h index 37703ef6dfc7..989fefe18be6 100644 --- a/arch/arm/plat-samsung/include/plat/cpu.h +++ b/arch/arm/plat-samsung/include/plat/cpu.h @@ -23,6 +23,9 @@ extern unsigned long samsung_cpu_id; #define S3C24XX_CPU_ID 0x32400000 #define S3C24XX_CPU_MASK 0xFFF00000 +#define S3C2412_CPU_ID 0x32412000 +#define S3C2412_CPU_MASK 0xFFFFF000 + #define S3C6400_CPU_ID 0x36400000 #define S3C6410_CPU_ID 0x36410000 #define S3C64XX_CPU_MASK 0xFFFFF000 @@ -53,6 +56,7 @@ static inline int is_samsung_##name(void) \ } IS_SAMSUNG_CPU(s3c24xx, S3C24XX_CPU_ID, S3C24XX_CPU_MASK) +IS_SAMSUNG_CPU(s3c2412, S3C2412_CPU_ID, S3C2412_CPU_MASK) IS_SAMSUNG_CPU(s3c6400, S3C6400_CPU_ID, S3C64XX_CPU_MASK) IS_SAMSUNG_CPU(s3c6410, S3C6410_CPU_ID, S3C64XX_CPU_MASK) IS_SAMSUNG_CPU(s5p6440, S5P6440_CPU_ID, S5P64XX_CPU_MASK) @@ -74,6 +78,12 @@ IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK) # define soc_is_s3c24xx() 0 #endif +#if defined(CONFIG_CPU_S3C2412) +# define soc_is_s3c2412() is_samsung_s3c2412() +#else +# define soc_is_s3c2412() 0 +#endif + #if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410) # define soc_is_s3c64xx() (is_samsung_s3c6400() || is_samsung_s3c6410()) #else @@ -173,7 +183,6 @@ extern void s3c_init_cpu(unsigned long idcode, /* core initialisation functions */ -extern void s3c24xx_init_irq(void); extern void s5p_init_irq(u32 *vic, u32 num_vic); extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); @@ -192,10 +201,6 @@ extern void s3c24xx_init_uartdevs(char *name, struct s3c24xx_uart_resources *res, struct s3c2410_uartcfg *cfg, int no); -/* timer for 2410/2440 */ - -extern void s3c24xx_timer_init(void); - extern struct syscore_ops s3c2410_pm_syscore_ops; extern struct syscore_ops s3c2412_pm_syscore_ops; extern struct syscore_ops s3c2416_pm_syscore_ops; diff --git a/arch/arm/plat-samsung/include/plat/s5p-time.h b/arch/arm/plat-samsung/include/plat/s5p-time.h deleted file mode 100644 index 9c96f3586ce0..000000000000 --- a/arch/arm/plat-samsung/include/plat/s5p-time.h +++ /dev/null @@ -1,40 +0,0 @@ -/* linux/arch/arm/plat-samsung/include/plat/s5p-time.h - * - * Copyright 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Header file for s5p time support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_PLAT_S5P_TIME_H -#define __ASM_PLAT_S5P_TIME_H __FILE__ - -/* S5P HR-Timer Clock mode */ -enum s5p_timer_mode { - S5P_PWM0, - S5P_PWM1, - S5P_PWM2, - S5P_PWM3, - S5P_PWM4, -}; - -struct s5p_timer_source { - unsigned int event_id; - unsigned int source_id; -}; - -/* Be able to sleep for atleast 4 seconds (usually more) */ -#define S5PTIMER_MIN_RANGE 4 - -#define TCNT_MAX 0xffffffff -#define NON_PERIODIC 0 -#define PERIODIC 1 - -extern void __init s5p_set_timer_source(enum s5p_timer_mode event, - enum s5p_timer_mode source); -extern void s5p_timer_init(void); -#endif /* __ASM_PLAT_S5P_TIME_H */ diff --git a/arch/arm/plat-samsung/include/plat/samsung-time.h b/arch/arm/plat-samsung/include/plat/samsung-time.h new file mode 100644 index 000000000000..4cc99bb1f176 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/samsung-time.h @@ -0,0 +1,53 @@ +/* linux/arch/arm/plat-samsung/include/plat/samsung-time.h + * + * Copyright 2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Header file for samsung s3c and s5p time support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_PLAT_SAMSUNG_TIME_H +#define __ASM_PLAT_SAMSUNG_TIME_H __FILE__ + +/* SAMSUNG HR-Timer Clock mode */ +enum samsung_timer_mode { + SAMSUNG_PWM0, + SAMSUNG_PWM1, + SAMSUNG_PWM2, + SAMSUNG_PWM3, + SAMSUNG_PWM4, +}; + +struct samsung_timer_source { + unsigned int event_id; + unsigned int source_id; +}; + +/* Be able to sleep for atleast 4 seconds (usually more) */ +#define SAMSUNG_TIMER_MIN_RANGE 4 + +#if defined(CONFIG_ARCH_S3C24XX) || defined(CONFIG_ARCH_S5PC100) +#define TCNT_MAX 0xffff +#define TSCALER_DIV 25 +#define TDIV 50 +#define TSIZE 16 +#else +#define TCNT_MAX 0xffffffff +#define TSCALER_DIV 2 +#define TDIV 2 +#define TSIZE 32 +#endif + +#define NON_PERIODIC 0 +#define PERIODIC 1 + +extern void __init samsung_set_timer_source(enum samsung_timer_mode event, + enum samsung_timer_mode source); + +extern void __init samsung_timer_init(void); + +#endif /* __ASM_PLAT_SAMSUNG_TIME_H */ diff --git a/arch/arm/plat-samsung/s5p-time.c b/arch/arm/plat-samsung/samsung-time.c index e92510cf82ee..f899cbc9b288 100644 --- a/arch/arm/plat-samsung/s5p-time.c +++ b/arch/arm/plat-samsung/samsung-time.c @@ -2,7 +2,7 @@ * Copyright (c) 2011 Samsung Electronics Co., Ltd. * http://www.samsung.com/ * - * S5P - Common hr-timer support + * samsung - Common hr-timer support (s3c and s5p) * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -25,41 +25,41 @@ #include <mach/map.h> #include <plat/devs.h> #include <plat/regs-timer.h> -#include <plat/s5p-time.h> +#include <plat/samsung-time.h> static struct clk *tin_event; static struct clk *tin_source; static struct clk *tdiv_event; static struct clk *tdiv_source; static struct clk *timerclk; -static struct s5p_timer_source timer_source; +static struct samsung_timer_source timer_source; static unsigned long clock_count_per_tick; -static void s5p_timer_resume(void); +static void samsung_timer_resume(void); -static void s5p_time_stop(enum s5p_timer_mode mode) +static void samsung_time_stop(enum samsung_timer_mode mode) { unsigned long tcon; tcon = __raw_readl(S3C2410_TCON); switch (mode) { - case S5P_PWM0: + case SAMSUNG_PWM0: tcon &= ~S3C2410_TCON_T0START; break; - case S5P_PWM1: + case SAMSUNG_PWM1: tcon &= ~S3C2410_TCON_T1START; break; - case S5P_PWM2: + case SAMSUNG_PWM2: tcon &= ~S3C2410_TCON_T2START; break; - case S5P_PWM3: + case SAMSUNG_PWM3: tcon &= ~S3C2410_TCON_T3START; break; - case S5P_PWM4: + case SAMSUNG_PWM4: tcon &= ~S3C2410_TCON_T4START; break; @@ -70,7 +70,7 @@ static void s5p_time_stop(enum s5p_timer_mode mode) __raw_writel(tcon, S3C2410_TCON); } -static void s5p_time_setup(enum s5p_timer_mode mode, unsigned long tcnt) +static void samsung_time_setup(enum samsung_timer_mode mode, unsigned long tcnt) { unsigned long tcon; @@ -79,27 +79,27 @@ static void s5p_time_setup(enum s5p_timer_mode mode, unsigned long tcnt) tcnt--; switch (mode) { - case S5P_PWM0: + case SAMSUNG_PWM0: tcon &= ~(0x0f << 0); tcon |= S3C2410_TCON_T0MANUALUPD; break; - case S5P_PWM1: + case SAMSUNG_PWM1: tcon &= ~(0x0f << 8); tcon |= S3C2410_TCON_T1MANUALUPD; break; - case S5P_PWM2: + case SAMSUNG_PWM2: tcon &= ~(0x0f << 12); tcon |= S3C2410_TCON_T2MANUALUPD; break; - case S5P_PWM3: + case SAMSUNG_PWM3: tcon &= ~(0x0f << 16); tcon |= S3C2410_TCON_T3MANUALUPD; break; - case S5P_PWM4: + case SAMSUNG_PWM4: tcon &= ~(0x07 << 20); tcon |= S3C2410_TCON_T4MANUALUPD; break; @@ -114,14 +114,14 @@ static void s5p_time_setup(enum s5p_timer_mode mode, unsigned long tcnt) __raw_writel(tcon, S3C2410_TCON); } -static void s5p_time_start(enum s5p_timer_mode mode, bool periodic) +static void samsung_time_start(enum samsung_timer_mode mode, bool periodic) { unsigned long tcon; tcon = __raw_readl(S3C2410_TCON); switch (mode) { - case S5P_PWM0: + case SAMSUNG_PWM0: tcon |= S3C2410_TCON_T0START; tcon &= ~S3C2410_TCON_T0MANUALUPD; @@ -131,7 +131,7 @@ static void s5p_time_start(enum s5p_timer_mode mode, bool periodic) tcon &= ~S3C2410_TCON_T0RELOAD; break; - case S5P_PWM1: + case SAMSUNG_PWM1: tcon |= S3C2410_TCON_T1START; tcon &= ~S3C2410_TCON_T1MANUALUPD; @@ -141,7 +141,7 @@ static void s5p_time_start(enum s5p_timer_mode mode, bool periodic) tcon &= ~S3C2410_TCON_T1RELOAD; break; - case S5P_PWM2: + case SAMSUNG_PWM2: tcon |= S3C2410_TCON_T2START; tcon &= ~S3C2410_TCON_T2MANUALUPD; @@ -151,7 +151,7 @@ static void s5p_time_start(enum s5p_timer_mode mode, bool periodic) tcon &= ~S3C2410_TCON_T2RELOAD; break; - case S5P_PWM3: + case SAMSUNG_PWM3: tcon |= S3C2410_TCON_T3START; tcon &= ~S3C2410_TCON_T3MANUALUPD; @@ -161,7 +161,7 @@ static void s5p_time_start(enum s5p_timer_mode mode, bool periodic) tcon &= ~S3C2410_TCON_T3RELOAD; break; - case S5P_PWM4: + case SAMSUNG_PWM4: tcon |= S3C2410_TCON_T4START; tcon &= ~S3C2410_TCON_T4MANUALUPD; @@ -178,24 +178,24 @@ static void s5p_time_start(enum s5p_timer_mode mode, bool periodic) __raw_writel(tcon, S3C2410_TCON); } -static int s5p_set_next_event(unsigned long cycles, +static int samsung_set_next_event(unsigned long cycles, struct clock_event_device *evt) { - s5p_time_setup(timer_source.event_id, cycles); - s5p_time_start(timer_source.event_id, NON_PERIODIC); + samsung_time_setup(timer_source.event_id, cycles); + samsung_time_start(timer_source.event_id, NON_PERIODIC); return 0; } -static void s5p_set_mode(enum clock_event_mode mode, +static void samsung_set_mode(enum clock_event_mode mode, struct clock_event_device *evt) { - s5p_time_stop(timer_source.event_id); + samsung_time_stop(timer_source.event_id); switch (mode) { case CLOCK_EVT_MODE_PERIODIC: - s5p_time_setup(timer_source.event_id, clock_count_per_tick); - s5p_time_start(timer_source.event_id, PERIODIC); + samsung_time_setup(timer_source.event_id, clock_count_per_tick); + samsung_time_start(timer_source.event_id, PERIODIC); break; case CLOCK_EVT_MODE_ONESHOT: @@ -206,24 +206,24 @@ static void s5p_set_mode(enum clock_event_mode mode, break; case CLOCK_EVT_MODE_RESUME: - s5p_timer_resume(); + samsung_timer_resume(); break; } } -static void s5p_timer_resume(void) +static void samsung_timer_resume(void) { /* event timer restart */ - s5p_time_setup(timer_source.event_id, clock_count_per_tick); - s5p_time_start(timer_source.event_id, PERIODIC); + samsung_time_setup(timer_source.event_id, clock_count_per_tick); + samsung_time_start(timer_source.event_id, PERIODIC); /* source timer restart */ - s5p_time_setup(timer_source.source_id, TCNT_MAX); - s5p_time_start(timer_source.source_id, PERIODIC); + samsung_time_setup(timer_source.source_id, TCNT_MAX); + samsung_time_start(timer_source.source_id, PERIODIC); } -void __init s5p_set_timer_source(enum s5p_timer_mode event, - enum s5p_timer_mode source) +void __init samsung_set_timer_source(enum samsung_timer_mode event, + enum samsung_timer_mode source) { s3c_device_timer[event].dev.bus = &platform_bus_type; s3c_device_timer[source].dev.bus = &platform_bus_type; @@ -233,14 +233,14 @@ void __init s5p_set_timer_source(enum s5p_timer_mode event, } static struct clock_event_device time_event_device = { - .name = "s5p_event_timer", + .name = "samsung_event_timer", .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, .rating = 200, - .set_next_event = s5p_set_next_event, - .set_mode = s5p_set_mode, + .set_next_event = samsung_set_next_event, + .set_mode = samsung_set_mode, }; -static irqreturn_t s5p_clock_event_isr(int irq, void *dev_id) +static irqreturn_t samsung_clock_event_isr(int irq, void *dev_id) { struct clock_event_device *evt = dev_id; @@ -249,14 +249,14 @@ static irqreturn_t s5p_clock_event_isr(int irq, void *dev_id) return IRQ_HANDLED; } -static struct irqaction s5p_clock_event_irq = { - .name = "s5p_time_irq", +static struct irqaction samsung_clock_event_irq = { + .name = "samsung_time_irq", .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, - .handler = s5p_clock_event_isr, + .handler = samsung_clock_event_isr, .dev_id = &time_event_device, }; -static void __init s5p_clockevent_init(void) +static void __init samsung_clockevent_init(void) { unsigned long pclk; unsigned long clock_rate; @@ -267,8 +267,8 @@ static void __init s5p_clockevent_init(void) tscaler = clk_get_parent(tdiv_event); - clk_set_rate(tscaler, pclk / 2); - clk_set_rate(tdiv_event, pclk / 2); + clk_set_rate(tscaler, pclk / TSCALER_DIV); + clk_set_rate(tdiv_event, pclk / TDIV); clk_set_parent(tin_event, tdiv_event); clock_rate = clk_get_rate(tin_event); @@ -278,22 +278,22 @@ static void __init s5p_clockevent_init(void) clockevents_config_and_register(&time_event_device, clock_rate, 1, -1); irq_number = timer_source.event_id + IRQ_TIMER0; - setup_irq(irq_number, &s5p_clock_event_irq); + setup_irq(irq_number, &samsung_clock_event_irq); } -static void __iomem *s5p_timer_reg(void) +static void __iomem *samsung_timer_reg(void) { unsigned long offset = 0; switch (timer_source.source_id) { - case S5P_PWM0: - case S5P_PWM1: - case S5P_PWM2: - case S5P_PWM3: + case SAMSUNG_PWM0: + case SAMSUNG_PWM1: + case SAMSUNG_PWM2: + case SAMSUNG_PWM3: offset = (timer_source.source_id * 0x0c) + 0x14; break; - case S5P_PWM4: + case SAMSUNG_PWM4: offset = 0x40; break; @@ -312,9 +312,9 @@ static void __iomem *s5p_timer_reg(void) * this wraps around for now, since it is just a relative time * stamp. (Inspired by U300 implementation.) */ -static u32 notrace s5p_read_sched_clock(void) +static u32 notrace samsung_read_sched_clock(void) { - void __iomem *reg = s5p_timer_reg(); + void __iomem *reg = samsung_timer_reg(); if (!reg) return 0; @@ -322,29 +322,29 @@ static u32 notrace s5p_read_sched_clock(void) return ~__raw_readl(reg); } -static void __init s5p_clocksource_init(void) +static void __init samsung_clocksource_init(void) { unsigned long pclk; unsigned long clock_rate; pclk = clk_get_rate(timerclk); - clk_set_rate(tdiv_source, pclk / 2); + clk_set_rate(tdiv_source, pclk / TDIV); clk_set_parent(tin_source, tdiv_source); clock_rate = clk_get_rate(tin_source); - s5p_time_setup(timer_source.source_id, TCNT_MAX); - s5p_time_start(timer_source.source_id, PERIODIC); + samsung_time_setup(timer_source.source_id, TCNT_MAX); + samsung_time_start(timer_source.source_id, PERIODIC); - setup_sched_clock(s5p_read_sched_clock, 32, clock_rate); + setup_sched_clock(samsung_read_sched_clock, TSIZE, clock_rate); - if (clocksource_mmio_init(s5p_timer_reg(), "s5p_clocksource_timer", - clock_rate, 250, 32, clocksource_mmio_readl_down)) - panic("s5p_clocksource_timer: can't register clocksource\n"); + if (clocksource_mmio_init(samsung_timer_reg(), "samsung_clocksource_timer", + clock_rate, 250, TSIZE, clocksource_mmio_readl_down)) + panic("samsung_clocksource_timer: can't register clocksource\n"); } -static void __init s5p_timer_resources(void) +static void __init samsung_timer_resources(void) { unsigned long event_id = timer_source.event_id; @@ -386,9 +386,9 @@ static void __init s5p_timer_resources(void) clk_enable(tin_source); } -void __init s5p_timer_init(void) +void __init samsung_timer_init(void) { - s5p_timer_resources(); - s5p_clockevent_init(); - s5p_clocksource_init(); + samsung_timer_resources(); + samsung_clockevent_init(); + samsung_clocksource_init(); } diff --git a/arch/arm/plat-samsung/time.c b/arch/arm/plat-samsung/time.c deleted file mode 100644 index 73defd00c3e4..000000000000 --- a/arch/arm/plat-samsung/time.c +++ /dev/null @@ -1,287 +0,0 @@ -/* linux/arch/arm/plat-samsung/time.c - * - * Copyright (C) 2003-2005 Simtec Electronics - * Ben Dooks, <ben@simtec.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include <linux/kernel.h> -#include <linux/sched.h> -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/platform_device.h> -#include <linux/syscore_ops.h> - -#include <asm/mach-types.h> - -#include <asm/irq.h> -#include <mach/map.h> -#include <plat/regs-timer.h> -#include <mach/regs-irq.h> -#include <asm/mach/time.h> -#include <mach/tick.h> - -#include <plat/clock.h> -#include <plat/cpu.h> - -static unsigned long timer_startval; -static unsigned long timer_usec_ticks; - -#ifndef TICK_MAX -#define TICK_MAX (0xffff) -#endif - -#define TIMER_USEC_SHIFT 16 - -/* we use the shifted arithmetic to work out the ratio of timer ticks - * to usecs, as often the peripheral clock is not a nice even multiple - * of 1MHz. - * - * shift of 14 and 15 are too low for the 12MHz, 16 seems to be ok - * for the current HZ value of 200 without producing overflows. - * - * Original patch by Dimitry Andric, updated by Ben Dooks -*/ - - -/* timer_mask_usec_ticks - * - * given a clock and divisor, make the value to pass into timer_ticks_to_usec - * to scale the ticks into usecs -*/ - -static inline unsigned long -timer_mask_usec_ticks(unsigned long scaler, unsigned long pclk) -{ - unsigned long den = pclk / 1000; - - return ((1000 << TIMER_USEC_SHIFT) * scaler + (den >> 1)) / den; -} - -/* timer_ticks_to_usec - * - * convert timer ticks to usec. -*/ - -static inline unsigned long timer_ticks_to_usec(unsigned long ticks) -{ - unsigned long res; - - res = ticks * timer_usec_ticks; - res += 1 << (TIMER_USEC_SHIFT - 4); /* round up slightly */ - - return res >> TIMER_USEC_SHIFT; -} - -/*** - * Returns microsecond since last clock interrupt. Note that interrupts - * will have been disabled by do_gettimeoffset() - * IRQs are disabled before entering here from do_gettimeofday() - */ - -static u32 s3c2410_gettimeoffset(void) -{ - unsigned long tdone; - unsigned long tval; - - /* work out how many ticks have gone since last timer interrupt */ - - tval = __raw_readl(S3C2410_TCNTO(4)); - tdone = timer_startval - tval; - - /* check to see if there is an interrupt pending */ - - if (s3c24xx_ostimer_pending()) { - /* re-read the timer, and try and fix up for the missed - * interrupt. Note, the interrupt may go off before the - * timer has re-loaded from wrapping. - */ - - tval = __raw_readl(S3C2410_TCNTO(4)); - tdone = timer_startval - tval; - - if (tval != 0) - tdone += timer_startval; - } - - return timer_ticks_to_usec(tdone) * 1000; -} - - -/* - * IRQ handler for the timer - */ -static irqreturn_t -s3c2410_timer_interrupt(int irq, void *dev_id) -{ - timer_tick(); - return IRQ_HANDLED; -} - -static struct irqaction s3c2410_timer_irq = { - .name = "S3C2410 Timer Tick", - .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, - .handler = s3c2410_timer_interrupt, -}; - -#define use_tclk1_12() ( \ - machine_is_bast() || \ - machine_is_vr1000() || \ - machine_is_anubis() || \ - machine_is_osiris()) - -static struct clk *tin; -static struct clk *tdiv; -static struct clk *timerclk; - -/* - * Set up timer interrupt, and return the current time in seconds. - * - * Currently we only use timer4, as it is the only timer which has no - * other function that can be exploited externally - */ -static void s3c2410_timer_setup (void) -{ - unsigned long tcon; - unsigned long tcnt; - unsigned long tcfg1; - unsigned long tcfg0; - - tcnt = TICK_MAX; /* default value for tcnt */ - - /* configure the system for whichever machine is in use */ - - if (use_tclk1_12()) { - /* timer is at 12MHz, scaler is 1 */ - timer_usec_ticks = timer_mask_usec_ticks(1, 12000000); - tcnt = 12000000 / HZ; - - tcfg1 = __raw_readl(S3C2410_TCFG1); - tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK; - tcfg1 |= S3C2410_TCFG1_MUX4_TCLK1; - __raw_writel(tcfg1, S3C2410_TCFG1); - } else { - unsigned long pclk; - struct clk *tscaler; - - /* for the h1940 (and others), we use the pclk from the core - * to generate the timer values. since values around 50 to - * 70MHz are not values we can directly generate the timer - * value from, we need to pre-scale and divide before using it. - * - * for instance, using 50.7MHz and dividing by 6 gives 8.45MHz - * (8.45 ticks per usec) - */ - - pclk = clk_get_rate(timerclk); - - /* configure clock tick */ - - timer_usec_ticks = timer_mask_usec_ticks(6, pclk); - - tscaler = clk_get_parent(tdiv); - - clk_set_rate(tscaler, pclk / 3); - clk_set_rate(tdiv, pclk / 6); - clk_set_parent(tin, tdiv); - - tcnt = clk_get_rate(tin) / HZ; - } - - tcon = __raw_readl(S3C2410_TCON); - tcfg0 = __raw_readl(S3C2410_TCFG0); - tcfg1 = __raw_readl(S3C2410_TCFG1); - - /* timers reload after counting zero, so reduce the count by 1 */ - - tcnt--; - - printk(KERN_DEBUG "timer tcon=%08lx, tcnt %04lx, tcfg %08lx,%08lx, usec %08lx\n", - tcon, tcnt, tcfg0, tcfg1, timer_usec_ticks); - - /* check to see if timer is within 16bit range... */ - if (tcnt > TICK_MAX) { - panic("setup_timer: HZ is too small, cannot configure timer!"); - return; - } - - __raw_writel(tcfg1, S3C2410_TCFG1); - __raw_writel(tcfg0, S3C2410_TCFG0); - - timer_startval = tcnt; - __raw_writel(tcnt, S3C2410_TCNTB(4)); - - /* ensure timer is stopped... */ - - tcon &= ~(7<<20); - tcon |= S3C2410_TCON_T4RELOAD; - tcon |= S3C2410_TCON_T4MANUALUPD; - - __raw_writel(tcon, S3C2410_TCON); - __raw_writel(tcnt, S3C2410_TCNTB(4)); - __raw_writel(tcnt, S3C2410_TCMPB(4)); - - /* start the timer running */ - tcon |= S3C2410_TCON_T4START; - tcon &= ~S3C2410_TCON_T4MANUALUPD; - __raw_writel(tcon, S3C2410_TCON); -} - -static void __init s3c2410_timer_resources(void) -{ - struct platform_device tmpdev; - - tmpdev.dev.bus = &platform_bus_type; - tmpdev.id = 4; - - timerclk = clk_get(NULL, "timers"); - if (IS_ERR(timerclk)) - panic("failed to get clock for system timer"); - - clk_enable(timerclk); - - if (!use_tclk1_12()) { - tmpdev.id = 4; - tmpdev.dev.init_name = "s3c24xx-pwm.4"; - tin = clk_get(&tmpdev.dev, "pwm-tin"); - if (IS_ERR(tin)) - panic("failed to get pwm-tin clock for system timer"); - - tdiv = clk_get(&tmpdev.dev, "pwm-tdiv"); - if (IS_ERR(tdiv)) - panic("failed to get pwm-tdiv clock for system timer"); - } - - clk_enable(tin); -} - -static struct syscore_ops s3c24xx_syscore_ops = { - .resume = s3c2410_timer_setup, -}; - -void __init s3c24xx_timer_init(void) -{ - arch_gettimeoffset = s3c2410_gettimeoffset; - - s3c2410_timer_resources(); - s3c2410_timer_setup(); - setup_irq(IRQ_TIMER4, &s3c2410_timer_irq); - register_syscore_ops(&s3c24xx_syscore_ops); -} |
