diff options
Diffstat (limited to 'arch/arm/mach-tegra')
30 files changed, 599 insertions, 172 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index d82ebab50e11..91aff7cb8284 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -69,6 +69,12 @@ config MACH_WARIO help Support for the Wario version of Seaboard +config MACH_VENTANA + bool "Ventana board" + select MACH_TEGRA_DT + help + Support for the nVidia Ventana development platform + choice prompt "Low-level debug console UART" default TEGRA_DEBUG_UART_NONE diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index f11b9100114a..91a07e187208 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -31,6 +31,7 @@ obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o obj-${CONFIG_MACH_TEGRA_DT} += board-dt.o obj-${CONFIG_MACH_TEGRA_DT} += board-harmony-pinmux.o +obj-${CONFIG_MACH_TEGRA_DT} += board-seaboard-pinmux.o obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice.o obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice-pinmux.o diff --git a/arch/arm/mach-tegra/Makefile.boot b/arch/arm/mach-tegra/Makefile.boot index 5e870d29eca1..bd12c9fb81e8 100644 --- a/arch/arm/mach-tegra/Makefile.boot +++ b/arch/arm/mach-tegra/Makefile.boot @@ -4,3 +4,4 @@ initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000 dtb-$(CONFIG_MACH_HARMONY) += tegra-harmony.dtb dtb-$(CONFIG_MACH_SEABOARD) += tegra-seaboard.dtb +dtb-$(CONFIG_MACH_VENTANA) += tegra-ventana.dtb diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c index 9f47e04446f3..d368f8dafcfd 100644 --- a/arch/arm/mach-tegra/board-dt.c +++ b/arch/arm/mach-tegra/board-dt.c @@ -47,7 +47,7 @@ void harmony_pinmux_init(void); void seaboard_pinmux_init(void); - +void ventana_pinmux_init(void); struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL), @@ -80,9 +80,19 @@ static struct of_device_id tegra_dt_gic_match[] __initdata = { {} }; +static struct { + char *machine; + void (*init)(void); +} pinmux_configs[] = { + { "nvidia,harmony", harmony_pinmux_init }, + { "nvidia,seaboard", seaboard_pinmux_init }, + { "nvidia,ventana", ventana_pinmux_init }, +}; + static void __init tegra_dt_init(void) { struct device_node *node; + int i; node = of_find_matching_node_by_address(NULL, tegra_dt_gic_match, TEGRA_ARM_INT_DIST_BASE); @@ -91,10 +101,15 @@ static void __init tegra_dt_init(void) tegra_clk_init_from_table(tegra_dt_clk_init_table); - if (of_machine_is_compatible("nvidia,harmony")) - harmony_pinmux_init(); - else if (of_machine_is_compatible("nvidia,seaboard")) - seaboard_pinmux_init(); + for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) { + if (of_machine_is_compatible(pinmux_configs[i].machine)) { + pinmux_configs[i].init(); + break; + } + } + + WARN(i == ARRAY_SIZE(pinmux_configs), + "Unknown platform! Pinmuxing not initialized\n"); /* * Finished with the static registrations now; fill in the missing @@ -106,6 +121,7 @@ static void __init tegra_dt_init(void) static const char * tegra_dt_board_compat[] = { "nvidia,harmony", "nvidia,seaboard", + "nvidia,ventana", NULL }; diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c index 4d63e2e97a8d..e99b45618cd0 100644 --- a/arch/arm/mach-tegra/board-harmony-pinmux.c +++ b/arch/arm/mach-tegra/board-harmony-pinmux.c @@ -20,6 +20,7 @@ #include "gpio-names.h" #include "board-harmony.h" +#include "devices.h" static struct tegra_pingroup_config harmony_pinmux[] = { {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, @@ -140,6 +141,11 @@ static struct tegra_pingroup_config harmony_pinmux[] = { {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, }; +static struct platform_device *pinmux_devices[] = { + &tegra_gpio_device, + &tegra_pinmux_device, +}; + static struct tegra_gpio_table gpio_table[] = { { .gpio = TEGRA_GPIO_SD2_CD, .enable = true }, { .gpio = TEGRA_GPIO_SD2_WP, .enable = true }, @@ -155,6 +161,8 @@ static struct tegra_gpio_table gpio_table[] = { void harmony_pinmux_init(void) { + platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); + tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux)); tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); diff --git a/arch/arm/mach-tegra/board-harmony-power.c b/arch/arm/mach-tegra/board-harmony-power.c index 5ad8b2f94f8d..21d1285731b3 100644 --- a/arch/arm/mach-tegra/board-harmony-power.c +++ b/arch/arm/mach-tegra/board-harmony-power.c @@ -18,10 +18,11 @@ #include <linux/i2c.h> #include <linux/platform_device.h> #include <linux/gpio.h> - +#include <linux/io.h> #include <linux/regulator/machine.h> #include <linux/mfd/tps6586x.h> +#include <mach/iomap.h> #include <mach/irqs.h> #include "board-harmony.h" @@ -113,6 +114,16 @@ static struct i2c_board_info __initdata harmony_regulators[] = { int __init harmony_regulator_init(void) { + void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE); + u32 pmc_ctrl; + + /* + * Configure the power management controller to trigger PMU + * interrupts when low + */ + pmc_ctrl = readl(pmc + PMC_CTRL); + writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL); + i2c_register_board_info(3, harmony_regulators, 1); return 0; diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c index 93c793f48caf..f0bdc5e3fe52 100644 --- a/arch/arm/mach-tegra/board-harmony.c +++ b/arch/arm/mach-tegra/board-harmony.c @@ -49,7 +49,8 @@ static struct plat_serial8250_port debug_uart_platform_data[] = { .membase = IO_ADDRESS(TEGRA_UARTD_BASE), .mapbase = TEGRA_UARTD_BASE, .irq = INT_UARTD, - .flags = UPF_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE, + .type = PORT_TEGRA, .iotype = UPIO_MEM, .regshift = 2, .uartclk = 216000000, @@ -117,6 +118,7 @@ static struct platform_device *harmony_devices[] __initdata = { &tegra_sdhci_device1, &tegra_sdhci_device2, &tegra_sdhci_device4, + &tegra_ehci3_device, &tegra_i2s_device1, &tegra_das_device, &tegra_pcm_device, @@ -140,6 +142,7 @@ static __initdata struct tegra_clk_init_table harmony_clk_init_table[] = { { "pll_a_out0", "pll_a", 11289600, true }, { "cdev1", NULL, 0, true }, { "i2s1", "pll_a_out0", 11289600, false}, + { "usb3", "clk_m", 12000000, true }, { NULL, NULL, 0, 0}, }; diff --git a/arch/arm/mach-tegra/board-paz00-pinmux.c b/arch/arm/mach-tegra/board-paz00-pinmux.c index bdd2627dd87b..fb20894862b0 100644 --- a/arch/arm/mach-tegra/board-paz00-pinmux.c +++ b/arch/arm/mach-tegra/board-paz00-pinmux.c @@ -20,6 +20,7 @@ #include "gpio-names.h" #include "board-paz00.h" +#include "devices.h" static struct tegra_pingroup_config paz00_pinmux[] = { {TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, @@ -140,15 +141,25 @@ static struct tegra_pingroup_config paz00_pinmux[] = { {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, }; +static struct platform_device *pinmux_devices[] = { + &tegra_gpio_device, + &tegra_pinmux_device, +}; + static struct tegra_gpio_table gpio_table[] = { { .gpio = TEGRA_GPIO_SD1_CD, .enable = true }, { .gpio = TEGRA_GPIO_SD1_WP, .enable = true }, { .gpio = TEGRA_GPIO_SD1_POWER, .enable = true }, { .gpio = TEGRA_ULPI_RST, .enable = true }, + { .gpio = TEGRA_WIFI_PWRN, .enable = true }, + { .gpio = TEGRA_WIFI_RST, .enable = true }, + { .gpio = TEGRA_WIFI_LED, .enable = true }, }; void paz00_pinmux_init(void) { + platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); + tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux)); tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c index fbc9e0ed926e..55c55ba89f1e 100644 --- a/arch/arm/mach-tegra/board-paz00.c +++ b/arch/arm/mach-tegra/board-paz00.c @@ -26,6 +26,8 @@ #include <linux/pda_power.h> #include <linux/io.h> #include <linux/i2c.h> +#include <linux/gpio.h> +#include <linux/rfkill-gpio.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -35,7 +37,6 @@ #include <mach/iomap.h> #include <mach/irqs.h> #include <mach/sdhci.h> -#include <mach/gpio.h> #include "board.h" #include "board-paz00.h" @@ -45,10 +46,22 @@ static struct plat_serial8250_port debug_uart_platform_data[] = { { + /* serial port on JP1 */ + .membase = IO_ADDRESS(TEGRA_UARTA_BASE), + .mapbase = TEGRA_UARTA_BASE, + .irq = INT_UARTA, + .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE, + .type = PORT_TEGRA, + .iotype = UPIO_MEM, + .regshift = 2, + .uartclk = 216000000, + }, { + /* serial port on mini-pcie */ .membase = IO_ADDRESS(TEGRA_UARTD_BASE), .mapbase = TEGRA_UARTD_BASE, .irq = INT_UARTD, - .flags = UPF_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE, + .type = PORT_TEGRA, .iotype = UPIO_MEM, .regshift = 2, .uartclk = 216000000, @@ -65,10 +78,48 @@ static struct platform_device debug_uart = { }, }; +static struct rfkill_gpio_platform_data wifi_rfkill_platform_data = { + .name = "wifi_rfkill", + .reset_gpio = TEGRA_WIFI_RST, + .shutdown_gpio = TEGRA_WIFI_PWRN, + .type = RFKILL_TYPE_WLAN, +}; + +static struct platform_device wifi_rfkill_device = { + .name = "rfkill_gpio", + .id = -1, + .dev = { + .platform_data = &wifi_rfkill_platform_data, + }, +}; + +static struct gpio_led gpio_leds[] = { + { + .name = "wifi-led", + .default_trigger = "rfkill0", + .gpio = TEGRA_WIFI_LED, + }, +}; + +static struct gpio_led_platform_data gpio_led_info = { + .leds = gpio_leds, + .num_leds = ARRAY_SIZE(gpio_leds), +}; + +static struct platform_device leds_gpio = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &gpio_led_info, + }, +}; + static struct platform_device *paz00_devices[] __initdata = { &debug_uart, - &tegra_sdhci_device1, &tegra_sdhci_device4, + &tegra_sdhci_device1, + &wifi_rfkill_device, + &leds_gpio, }; static void paz00_i2c_init(void) @@ -94,7 +145,14 @@ static void __init tegra_paz00_fixup(struct tag *tags, char **cmdline, static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = { /* name parent rate enabled */ + { "uarta", "pll_p", 216000000, true }, { "uartd", "pll_p", 216000000, true }, + + { "pll_p_out4", "pll_p", 24000000, true }, + { "usbd", "clk_m", 12000000, false }, + { "usb2", "clk_m", 12000000, false }, + { "usb3", "clk_m", 12000000, false }, + { NULL, NULL, 0, 0}, }; diff --git a/arch/arm/mach-tegra/board-paz00.h b/arch/arm/mach-tegra/board-paz00.h index 42ce8639b90c..8aff06eb58c3 100644 --- a/arch/arm/mach-tegra/board-paz00.h +++ b/arch/arm/mach-tegra/board-paz00.h @@ -19,11 +19,19 @@ #include <mach/gpio-tegra.h> +/* SDCARD */ #define TEGRA_GPIO_SD1_CD TEGRA_GPIO_PV5 #define TEGRA_GPIO_SD1_WP TEGRA_GPIO_PH1 #define TEGRA_GPIO_SD1_POWER TEGRA_GPIO_PT3 + +/* ULPI */ #define TEGRA_ULPI_RST TEGRA_GPIO_PV0 +/* WIFI */ +#define TEGRA_WIFI_PWRN TEGRA_GPIO_PK5 +#define TEGRA_WIFI_RST TEGRA_GPIO_PD1 +#define TEGRA_WIFI_LED TEGRA_GPIO_PD0 + void paz00_pinmux_init(void); #endif diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c index 0bda495e9742..fbce31daa3c9 100644 --- a/arch/arm/mach-tegra/board-seaboard-pinmux.c +++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c @@ -1,5 +1,6 @@ /* - * Copyright (C) 2010 NVIDIA Corporation + * Copyright (C) 2010,2011 NVIDIA Corporation + * Copyright (C) 2011 Google, Inc. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and @@ -21,6 +22,7 @@ #include "gpio-names.h" #include "board-seaboard.h" +#include "devices.h" #define DEFAULT_DRIVE(_name) \ { \ @@ -49,7 +51,7 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = { {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_CSUS, TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_DAP1, TEGRA_MUX_DAP1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, - {TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, {TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, @@ -133,7 +135,7 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = { {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, - {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, {TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, {TEGRA_PINGROUP_SPIF, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, @@ -157,24 +159,83 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = { {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, }; +static __initdata struct tegra_pingroup_config ventana_pinmux[] = { + {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_DTB, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_DTC, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_DTD, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LPW0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LPW2, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LSC1, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LSCK, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LSDA, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_PTA, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SLXK, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, +}; +static struct platform_device *pinmux_devices[] = { + &tegra_gpio_device, + &tegra_pinmux_device, +}; - -static struct tegra_gpio_table gpio_table[] = { +static struct tegra_gpio_table common_gpio_table[] = { { .gpio = TEGRA_GPIO_SD2_CD, .enable = true }, { .gpio = TEGRA_GPIO_SD2_WP, .enable = true }, { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true }, { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true }, { .gpio = TEGRA_GPIO_POWERKEY, .enable = true }, { .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true }, + { .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true }, + { .gpio = TEGRA_GPIO_USB1, .enable = true }, }; -void __init seaboard_pinmux_init(void) +static void __init update_pinmux(struct tegra_pingroup_config *newtbl, int size) +{ + int i, j; + struct tegra_pingroup_config *new_pingroup, *base_pingroup; + + /* Update base seaboard pinmux table with secondary board + * specific pinmux table table. + */ + for (i = 0; i < size; i++) { + new_pingroup = &newtbl[i]; + for (j = 0; j < ARRAY_SIZE(seaboard_pinmux); j++) { + base_pingroup = &seaboard_pinmux[j]; + if (new_pingroup->pingroup == base_pingroup->pingroup) { + *base_pingroup = *new_pingroup; + break; + } + } + } +} + +void __init seaboard_common_pinmux_init(void) { + platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); + tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux)); tegra_drive_pinmux_config_table(seaboard_drive_pinmux, ARRAY_SIZE(seaboard_drive_pinmux)); - tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); + tegra_gpio_config(common_gpio_table, ARRAY_SIZE(common_gpio_table)); +} + +void __init seaboard_pinmux_init(void) +{ + seaboard_common_pinmux_init(); } + +void __init ventana_pinmux_init(void) +{ + update_pinmux(ventana_pinmux, ARRAY_SIZE(ventana_pinmux)); + seaboard_common_pinmux_init(); +} + diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c index 9e98ac706f40..bf13ea355efc 100644 --- a/arch/arm/mach-tegra/board-seaboard.c +++ b/arch/arm/mach-tegra/board-seaboard.c @@ -25,9 +25,12 @@ #include <linux/gpio.h> #include <linux/gpio_keys.h> +#include <sound/wm8903.h> + #include <mach/iomap.h> #include <mach/irqs.h> #include <mach/sdhci.h> +#include <mach/tegra_wm8903_pdata.h> #include <asm/mach-types.h> #include <asm/mach/arch.h> @@ -41,7 +44,8 @@ static struct plat_serial8250_port debug_uart_platform_data[] = { { /* Memory and IRQ filled in before registration */ - .flags = UPF_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE, + .type = PORT_TEGRA, .iotype = UPIO_MEM, .regshift = 2, .uartclk = 216000000, @@ -62,6 +66,12 @@ static __initdata struct tegra_clk_init_table seaboard_clk_init_table[] = { /* name parent rate enabled */ { "uartb", "pll_p", 216000000, true}, { "uartd", "pll_p", 216000000, true}, + { "pll_a", "pll_p_out1", 56448000, true }, + { "pll_a_out0", "pll_a", 11289600, true }, + { "cdev1", NULL, 0, true }, + { "i2s1", "pll_a_out0", 11289600, false}, + { "usbd", "clk_m", 12000000, true}, + { "usb3", "clk_m", 12000000, true}, { NULL, NULL, 0, 0}, }; @@ -117,6 +127,22 @@ static struct tegra_sdhci_platform_data sdhci_pdata4 = { .is_8bit = 1, }; +static struct tegra_wm8903_platform_data seaboard_audio_pdata = { + .gpio_spkr_en = TEGRA_GPIO_SPKR_EN, + .gpio_hp_det = TEGRA_GPIO_HP_DET, + .gpio_hp_mute = -1, + .gpio_int_mic_en = -1, + .gpio_ext_mic_en = -1, +}; + +static struct platform_device seaboard_audio_device = { + .name = "tegra-snd-wm8903", + .id = 0, + .dev = { + .platform_data = &seaboard_audio_pdata, + }, +}; + static struct platform_device *seaboard_devices[] __initdata = { &debug_uart, &tegra_pmu_device, @@ -124,6 +150,10 @@ static struct platform_device *seaboard_devices[] __initdata = { &tegra_sdhci_device3, &tegra_sdhci_device1, &seaboard_gpio_keys_device, + &tegra_i2s_device1, + &tegra_das_device, + &tegra_pcm_device, + &seaboard_audio_device, }; static struct i2c_board_info __initdata isl29018_device = { @@ -135,12 +165,56 @@ static struct i2c_board_info __initdata adt7461_device = { I2C_BOARD_INFO("adt7461", 0x4c), }; +static struct wm8903_platform_data wm8903_pdata = { + .irq_active_low = 0, + .micdet_cfg = 0, + .micdet_delay = 100, + .gpio_base = SEABOARD_GPIO_WM8903(0), + .gpio_cfg = { + WM8903_GPIO_NO_CONFIG, + WM8903_GPIO_NO_CONFIG, + 0, + WM8903_GPIO_NO_CONFIG, + WM8903_GPIO_NO_CONFIG, + }, +}; + +static struct i2c_board_info __initdata wm8903_device = { + I2C_BOARD_INFO("wm8903", 0x1a), + .platform_data = &wm8903_pdata, + .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ), +}; + +static int seaboard_ehci_init(void) +{ + int gpio_status; + + gpio_status = gpio_request(TEGRA_GPIO_USB1, "VBUS_USB1"); + if (gpio_status < 0) { + pr_err("VBUS_USB1 request GPIO FAILED\n"); + WARN_ON(1); + } + + gpio_status = gpio_direction_output(TEGRA_GPIO_USB1, 1); + if (gpio_status < 0) { + pr_err("VBUS_USB1 request GPIO DIRECTION FAILED\n"); + WARN_ON(1); + } + gpio_set_value(TEGRA_GPIO_USB1, 1); + + platform_device_register(&tegra_ehci1_device); + platform_device_register(&tegra_ehci3_device); + + return 0; +} + static void __init seaboard_i2c_init(void) { gpio_request(TEGRA_GPIO_ISL29018_IRQ, "isl29018"); gpio_direction_input(TEGRA_GPIO_ISL29018_IRQ); i2c_register_board_info(0, &isl29018_device, 1); + i2c_register_board_info(0, &wm8903_device, 1); i2c_register_board_info(3, &adt7461_device, 1); @@ -161,6 +235,8 @@ static void __init seaboard_common_init(void) tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4; platform_add_devices(seaboard_devices, ARRAY_SIZE(seaboard_devices)); + + seaboard_ehci_init(); } static void __init tegra_seaboard_init(void) @@ -182,6 +258,9 @@ static void __init tegra_kaen_init(void) debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE; debug_uart_platform_data[0].irq = INT_UARTB; + seaboard_audio_pdata.gpio_hp_mute = TEGRA_GPIO_KAEN_HP_MUTE; + tegra_gpio_enable(TEGRA_GPIO_KAEN_HP_MUTE); + seaboard_common_init(); seaboard_i2c_init(); diff --git a/arch/arm/mach-tegra/board-seaboard.h b/arch/arm/mach-tegra/board-seaboard.h index 15b6c57361be..4c45d4ca3c49 100644 --- a/arch/arm/mach-tegra/board-seaboard.h +++ b/arch/arm/mach-tegra/board-seaboard.h @@ -19,6 +19,9 @@ #include <mach/gpio-tegra.h> +#define SEABOARD_GPIO_TPS6586X(_x_) (TEGRA_NR_GPIOS + (_x_)) +#define SEABOARD_GPIO_WM8903(_x_) (SEABOARD_GPIO_TPS6586X(4) + (_x_)) + #define TEGRA_GPIO_SD2_CD TEGRA_GPIO_PI5 #define TEGRA_GPIO_SD2_WP TEGRA_GPIO_PH1 #define TEGRA_GPIO_SD2_POWER TEGRA_GPIO_PI6 @@ -33,10 +36,11 @@ #define TEGRA_GPIO_MAGNETOMETER TEGRA_GPIO_PN5 #define TEGRA_GPIO_ISL29018_IRQ TEGRA_GPIO_PZ2 #define TEGRA_GPIO_AC_ONLINE TEGRA_GPIO_PV3 - -#define TPS_GPIO_BASE TEGRA_NR_GPIOS - -#define TPS_GPIO_WWAN_PWR (TPS_GPIO_BASE + 2) +#define TEGRA_GPIO_WWAN_PWR SEABOARD_GPIO_TPS6586X(2) +#define TEGRA_GPIO_CDC_IRQ TEGRA_GPIO_PX3 +#define TEGRA_GPIO_SPKR_EN SEABOARD_GPIO_WM8903(2) +#define TEGRA_GPIO_HP_DET TEGRA_GPIO_PX1 +#define TEGRA_GPIO_KAEN_HP_MUTE TEGRA_GPIO_PA5 void seaboard_pinmux_init(void); diff --git a/arch/arm/mach-tegra/board-trimslice-pinmux.c b/arch/arm/mach-tegra/board-trimslice-pinmux.c index bcb1916e68b9..4969dd28a04c 100644 --- a/arch/arm/mach-tegra/board-trimslice-pinmux.c +++ b/arch/arm/mach-tegra/board-trimslice-pinmux.c @@ -21,6 +21,7 @@ #include "gpio-names.h" #include "board-trimslice.h" +#include "devices.h" static __initdata struct tegra_pingroup_config trimslice_pinmux[] = { {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, @@ -141,6 +142,11 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = { {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, }; +static struct platform_device *pinmux_devices[] = { + &tegra_gpio_device, + &tegra_pinmux_device, +}; + static struct tegra_gpio_table gpio_table[] = { { .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */ { .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */ @@ -151,6 +157,7 @@ static struct tegra_gpio_table gpio_table[] = { void __init trimslice_pinmux_init(void) { + platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux)); tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); } diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c index e3d9ec2f0fe1..1a6617b7806f 100644 --- a/arch/arm/mach-tegra/board-trimslice.c +++ b/arch/arm/mach-tegra/board-trimslice.c @@ -32,7 +32,6 @@ #include <mach/iomap.h> #include <mach/sdhci.h> -#include <mach/gpio.h> #include "board.h" #include "clock.h" @@ -46,7 +45,8 @@ static struct plat_serial8250_port debug_uart_platform_data[] = { .membase = IO_ADDRESS(TEGRA_UARTA_BASE), .mapbase = TEGRA_UARTA_BASE, .irq = INT_UARTA, - .flags = UPF_BOOT_AUTOCONF, + .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE, + .type = PORT_TEGRA, .iotype = UPIO_MEM, .regshift = 2, .uartclk = 216000000, diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index d5e3f89b05af..690b888be506 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -61,7 +61,7 @@ static __initdata struct tegra_clk_init_table common_clk_init_table[] = { { NULL, NULL, 0, 0}, }; -void __init tegra_init_cache(void) +static void __init tegra_init_cache(void) { #ifdef CONFIG_CACHE_L2X0 void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000; diff --git a/arch/arm/mach-tegra/cpu-tegra.c b/arch/arm/mach-tegra/cpu-tegra.c index 0e0fd4d889bd..bb5ce39b733b 100644 --- a/arch/arm/mach-tegra/cpu-tegra.c +++ b/arch/arm/mach-tegra/cpu-tegra.c @@ -56,12 +56,12 @@ static unsigned long target_cpu_speed[NUM_CPUS]; static DEFINE_MUTEX(tegra_cpu_lock); static bool is_suspended; -int tegra_verify_speed(struct cpufreq_policy *policy) +static int tegra_verify_speed(struct cpufreq_policy *policy) { return cpufreq_frequency_table_verify(policy, freq_table); } -unsigned int tegra_getspeed(unsigned int cpu) +static unsigned int tegra_getspeed(unsigned int cpu) { unsigned long rate; @@ -129,7 +129,7 @@ static int tegra_target(struct cpufreq_policy *policy, unsigned int target_freq, unsigned int relation) { - int idx; + unsigned int idx; unsigned int freq; int ret = 0; diff --git a/arch/arm/mach-tegra/devices.c b/arch/arm/mach-tegra/devices.c index 57e35d20c24c..7a2a02dbd632 100644 --- a/arch/arm/mach-tegra/devices.c +++ b/arch/arm/mach-tegra/devices.c @@ -29,7 +29,93 @@ #include <mach/iomap.h> #include <mach/dma.h> #include <mach/usb_phy.h> + #include "gpio-names.h" +#include "devices.h" + +static struct resource gpio_resource[] = { + [0] = { + .start = TEGRA_GPIO_BASE, + .end = TEGRA_GPIO_BASE + TEGRA_GPIO_SIZE-1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = INT_GPIO1, + .end = INT_GPIO1, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = INT_GPIO2, + .end = INT_GPIO2, + .flags = IORESOURCE_IRQ, + }, + [3] = { + .start = INT_GPIO3, + .end = INT_GPIO3, + .flags = IORESOURCE_IRQ, + }, + [4] = { + .start = INT_GPIO4, + .end = INT_GPIO4, + .flags = IORESOURCE_IRQ, + }, + [5] = { + .start = INT_GPIO5, + .end = INT_GPIO5, + .flags = IORESOURCE_IRQ, + }, + [6] = { + .start = INT_GPIO6, + .end = INT_GPIO6, + .flags = IORESOURCE_IRQ, + }, + [7] = { + .start = INT_GPIO7, + .end = INT_GPIO7, + .flags = IORESOURCE_IRQ, + }, +}; + +struct platform_device tegra_gpio_device = { + .name = "tegra-gpio", + .id = -1, + .resource = gpio_resource, + .num_resources = ARRAY_SIZE(gpio_resource), +}; + +static struct resource pinmux_resource[] = { + [0] = { + /* Tri-state registers */ + .start = TEGRA_APB_MISC_BASE + 0x14, + .end = TEGRA_APB_MISC_BASE + 0x20 + 3, + .flags = IORESOURCE_MEM, + }, + [1] = { + /* Mux registers */ + .start = TEGRA_APB_MISC_BASE + 0x80, + .end = TEGRA_APB_MISC_BASE + 0x9c + 3, + .flags = IORESOURCE_MEM, + }, + [2] = { + /* Pull-up/down registers */ + .start = TEGRA_APB_MISC_BASE + 0xa0, + .end = TEGRA_APB_MISC_BASE + 0xb0 + 3, + .flags = IORESOURCE_MEM, + }, + [3] = { + /* Pad control registers */ + .start = TEGRA_APB_MISC_BASE + 0x868, + .end = TEGRA_APB_MISC_BASE + 0x90c + 3, + .flags = IORESOURCE_MEM, + }, +}; + +struct platform_device tegra_pinmux_device = { + .name = "tegra-pinmux", + .id = -1, + .resource = pinmux_resource, + .num_resources = ARRAY_SIZE(pinmux_resource), +}; static struct resource i2c_resource1[] = { [0] = { diff --git a/arch/arm/mach-tegra/devices.h b/arch/arm/mach-tegra/devices.h index 4a7dc0a097d6..873ecb2f8ae6 100644 --- a/arch/arm/mach-tegra/devices.h +++ b/arch/arm/mach-tegra/devices.h @@ -21,6 +21,8 @@ #include <linux/platform_device.h> +extern struct platform_device tegra_gpio_device; +extern struct platform_device tegra_pinmux_device; extern struct platform_device tegra_sdhci_device1; extern struct platform_device tegra_sdhci_device2; extern struct platform_device tegra_sdhci_device3; diff --git a/arch/arm/mach-tegra/dma.c b/arch/arm/mach-tegra/dma.c index f4ef5eb317bd..c0cf967e47d3 100644 --- a/arch/arm/mach-tegra/dma.c +++ b/arch/arm/mach-tegra/dma.c @@ -105,13 +105,17 @@ #define NV_DMA_MAX_TRASFER_SIZE 0x10000 -const unsigned int ahb_addr_wrap_table[8] = { +static const unsigned int ahb_addr_wrap_table[8] = { 0, 32, 64, 128, 256, 512, 1024, 2048 }; -const unsigned int apb_addr_wrap_table[8] = {0, 1, 2, 4, 8, 16, 32, 64}; +static const unsigned int apb_addr_wrap_table[8] = { + 0, 1, 2, 4, 8, 16, 32, 64 +}; -const unsigned int bus_width_table[5] = {8, 16, 32, 64, 128}; +static const unsigned int bus_width_table[5] = { + 8, 16, 32, 64, 128 +}; #define TEGRA_DMA_NAME_SIZE 16 struct tegra_dma_channel { @@ -157,7 +161,7 @@ void tegra_dma_dequeue(struct tegra_dma_channel *ch) return; } -void tegra_dma_stop(struct tegra_dma_channel *ch) +static void tegra_dma_stop(struct tegra_dma_channel *ch) { u32 csr; u32 status; @@ -174,7 +178,7 @@ void tegra_dma_stop(struct tegra_dma_channel *ch) writel(status, ch->addr + APB_DMA_CHAN_STA); } -int tegra_dma_cancel(struct tegra_dma_channel *ch) +static int tegra_dma_cancel(struct tegra_dma_channel *ch) { u32 csr; unsigned long irq_flags; diff --git a/arch/arm/mach-tegra/include/mach/io.h b/arch/arm/mach-tegra/include/mach/io.h index 4cea2230c8dc..35a011fbc42d 100644 --- a/arch/arm/mach-tegra/include/mach/io.h +++ b/arch/arm/mach-tegra/include/mach/io.h @@ -33,20 +33,26 @@ * */ +#ifdef __ASSEMBLY__ +#define IOMEM(x) (x) +#else +#define IOMEM(x) ((void __force __iomem *)(x)) +#endif + #define IO_IRAM_PHYS 0x40000000 -#define IO_IRAM_VIRT 0xFE400000 +#define IO_IRAM_VIRT IOMEM(0xFE400000) #define IO_IRAM_SIZE SZ_256K #define IO_CPU_PHYS 0x50040000 -#define IO_CPU_VIRT 0xFE000000 +#define IO_CPU_VIRT IOMEM(0xFE000000) #define IO_CPU_SIZE SZ_16K #define IO_PPSB_PHYS 0x60000000 -#define IO_PPSB_VIRT 0xFE200000 +#define IO_PPSB_VIRT IOMEM(0xFE200000) #define IO_PPSB_SIZE SZ_1M #define IO_APB_PHYS 0x70000000 -#define IO_APB_VIRT 0xFE300000 +#define IO_APB_VIRT IOMEM(0xFE300000) #define IO_APB_SIZE SZ_1M #define IO_TO_VIRT_BETWEEN(p, st, sz) ((p) >= (st) && (p) < ((st) + (sz))) @@ -61,7 +67,7 @@ IO_TO_VIRT_XLATE((n), IO_CPU_PHYS, IO_CPU_VIRT) : \ IO_TO_VIRT_BETWEEN((n), IO_IRAM_PHYS, IO_IRAM_SIZE) ? \ IO_TO_VIRT_XLATE((n), IO_IRAM_PHYS, IO_IRAM_VIRT) : \ - 0) + NULL) #ifndef __ASSEMBLER__ @@ -71,7 +77,7 @@ void __iomem *tegra_ioremap(unsigned long phys, size_t size, unsigned int type); void tegra_iounmap(volatile void __iomem *addr); -#define IO_ADDRESS(n) ((void __iomem *) IO_TO_VIRT(n)) +#define IO_ADDRESS(n) (IO_TO_VIRT(n)) #ifdef CONFIG_TEGRA_PCI extern void __iomem *tegra_pcie_io_base; diff --git a/arch/arm/mach-tegra/include/mach/pinmux.h b/arch/arm/mach-tegra/include/mach/pinmux.h index defd8775defa..bb7dfdb61205 100644 --- a/arch/arm/mach-tegra/include/mach/pinmux.h +++ b/arch/arm/mach-tegra/include/mach/pinmux.h @@ -199,6 +199,7 @@ struct tegra_drive_pingroup_config { struct tegra_drive_pingroup_desc { const char *name; + s16 reg_bank; s16 reg; }; @@ -207,6 +208,9 @@ struct tegra_pingroup_desc { int funcs[4]; int func_safe; int vddio; + s16 tri_bank; /* Register bank the tri_reg exists within */ + s16 mux_bank; /* Register bank the mux_reg exists within */ + s16 pupd_bank; /* Register bank the pupd_reg exists within */ s16 tri_reg; /* offset into the TRISTATE_REG_* register bank */ s16 mux_reg; /* offset into the PIN_MUX_CTL_* register bank */ s16 pupd_reg; /* offset into the PULL_UPDOWN_REG_* register bank */ diff --git a/arch/arm/mach-tegra/include/mach/powergate.h b/arch/arm/mach-tegra/include/mach/powergate.h index 401d1b725291..39c396d2ddb0 100644 --- a/arch/arm/mach-tegra/include/mach/powergate.h +++ b/arch/arm/mach-tegra/include/mach/powergate.h @@ -31,7 +31,6 @@ int tegra_powergate_power_on(int id); int tegra_powergate_power_off(int id); -bool tegra_powergate_is_powered(int id); int tegra_powergate_remove_clamping(int id); /* Must be called with clk disabled, and returns with clk enabled */ diff --git a/arch/arm/mach-tegra/io.c b/arch/arm/mach-tegra/io.c index ea50fe28cf6a..5489f8b5d6ad 100644 --- a/arch/arm/mach-tegra/io.c +++ b/arch/arm/mach-tegra/io.c @@ -31,25 +31,25 @@ static struct map_desc tegra_io_desc[] __initdata = { { - .virtual = IO_PPSB_VIRT, + .virtual = (unsigned long)IO_PPSB_VIRT, .pfn = __phys_to_pfn(IO_PPSB_PHYS), .length = IO_PPSB_SIZE, .type = MT_DEVICE, }, { - .virtual = IO_APB_VIRT, + .virtual = (unsigned long)IO_APB_VIRT, .pfn = __phys_to_pfn(IO_APB_PHYS), .length = IO_APB_SIZE, .type = MT_DEVICE, }, { - .virtual = IO_CPU_VIRT, + .virtual = (unsigned long)IO_CPU_VIRT, .pfn = __phys_to_pfn(IO_CPU_PHYS), .length = IO_CPU_SIZE, .type = MT_DEVICE, }, { - .virtual = IO_IRAM_VIRT, + .virtual = (unsigned long)IO_IRAM_VIRT, .pfn = __phys_to_pfn(IO_IRAM_PHYS), .length = IO_IRAM_SIZE, .type = MT_DEVICE, diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c index f1f699d86c32..f5aa173c26b3 100644 --- a/arch/arm/mach-tegra/pcie.c +++ b/arch/arm/mach-tegra/pcie.c @@ -41,6 +41,8 @@ #include <mach/clk.h> #include <mach/powergate.h> +#include "board.h" + /* register definitions */ #define AFI_OFFSET 0x3800 #define PADS_OFFSET 0x3000 @@ -150,9 +152,9 @@ static void __iomem *reg_pmc_base = IO_ADDRESS(TEGRA_PMC_BASE); #define pmc_writel(value, reg) \ - __raw_writel(value, (u32)reg_pmc_base + (reg)) + __raw_writel(value, reg_pmc_base + (reg)) #define pmc_readl(reg) \ - __raw_readl((u32)reg_pmc_base + (reg)) + __raw_readl(reg_pmc_base + (reg)) /* * Tegra2 defines 1GB in the AXI address map for PCIe. @@ -460,7 +462,7 @@ static struct pci_bus __init *tegra_pcie_scan_bus(int nr, struct tegra_pcie_port *pp; if (nr >= tegra_pcie.num_ports) - return 0; + return NULL; pp = tegra_pcie.port + nr; pp->root_bus_nr = sys->busnr; diff --git a/arch/arm/mach-tegra/pinmux-t2-tables.c b/arch/arm/mach-tegra/pinmux-t2-tables.c index a475367befa3..a0dc2bc28ed3 100644 --- a/arch/arm/mach-tegra/pinmux-t2-tables.c +++ b/arch/arm/mach-tegra/pinmux-t2-tables.c @@ -31,10 +31,16 @@ #include <mach/pinmux.h> #include <mach/suspend.h> +#define TRISTATE_REG_A 0x14 +#define PIN_MUX_CTL_REG_A 0x80 +#define PULLUPDOWN_REG_A 0xa0 +#define PINGROUP_REG_A 0x868 + #define DRIVE_PINGROUP(pg_name, r) \ [TEGRA_DRIVE_PINGROUP_ ## pg_name] = { \ .name = #pg_name, \ - .reg = r \ + .reg_bank = 3, \ + .reg = ((r) - PINGROUP_REG_A) \ } const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE_PINGROUP] = { @@ -90,11 +96,14 @@ const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE TEGRA_MUX_ ## f3, \ }, \ .func_safe = TEGRA_MUX_ ## f_safe, \ - .tri_reg = tri_r, \ + .tri_bank = 0, \ + .tri_reg = ((tri_r) - TRISTATE_REG_A), \ .tri_bit = tri_b, \ - .mux_reg = mux_r, \ + .mux_bank = 1, \ + .mux_reg = ((mux_r) - PIN_MUX_CTL_REG_A), \ .mux_bit = mux_b, \ - .pupd_reg = pupd_r, \ + .pupd_bank = 2, \ + .pupd_reg = ((pupd_r) - PULLUPDOWN_REG_A), \ .pupd_bit = pupd_b, \ } @@ -217,62 +226,3 @@ const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP] = { PINGROUP(XM2C, DDR, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xA8, 30), PINGROUP(XM2D, DDR, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xA8, 28), }; - -#ifdef CONFIG_PM -#define TRISTATE_REG_A 0x14 -#define TRISTATE_REG_NUM 4 -#define PIN_MUX_CTL_REG_A 0x80 -#define PIN_MUX_CTL_REG_NUM 8 -#define PULLUPDOWN_REG_A 0xa0 -#define PULLUPDOWN_REG_NUM 5 - -static u32 pinmux_reg[TRISTATE_REG_NUM + PIN_MUX_CTL_REG_NUM + - PULLUPDOWN_REG_NUM + - ARRAY_SIZE(tegra_soc_drive_pingroups)]; - -static inline unsigned long pg_readl(unsigned long offset) -{ - return readl(IO_TO_VIRT(TEGRA_APB_MISC_BASE + offset)); -} - -static inline void pg_writel(unsigned long value, unsigned long offset) -{ - writel(value, IO_TO_VIRT(TEGRA_APB_MISC_BASE + offset)); -} - -void tegra_pinmux_suspend(void) -{ - unsigned int i; - u32 *ctx = pinmux_reg; - - for (i = 0; i < PIN_MUX_CTL_REG_NUM; i++) - *ctx++ = pg_readl(PIN_MUX_CTL_REG_A + i*4); - - for (i = 0; i < PULLUPDOWN_REG_NUM; i++) - *ctx++ = pg_readl(PULLUPDOWN_REG_A + i*4); - - for (i = 0; i < TRISTATE_REG_NUM; i++) - *ctx++ = pg_readl(TRISTATE_REG_A + i*4); - - for (i = 0; i < ARRAY_SIZE(tegra_soc_drive_pingroups); i++) - *ctx++ = pg_readl(tegra_soc_drive_pingroups[i].reg); -} - -void tegra_pinmux_resume(void) -{ - unsigned int i; - u32 *ctx = pinmux_reg; - - for (i = 0; i < PIN_MUX_CTL_REG_NUM; i++) - pg_writel(*ctx++, PIN_MUX_CTL_REG_A + i*4); - - for (i = 0; i < PULLUPDOWN_REG_NUM; i++) - pg_writel(*ctx++, PULLUPDOWN_REG_A + i*4); - - for (i = 0; i < TRISTATE_REG_NUM; i++) - pg_writel(*ctx++, TRISTATE_REG_A + i*4); - - for (i = 0; i < ARRAY_SIZE(tegra_soc_drive_pingroups); i++) - pg_writel(*ctx++, tegra_soc_drive_pingroups[i].reg); -} -#endif diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c index f80d507671bc..1d201650d7a4 100644 --- a/arch/arm/mach-tegra/pinmux.c +++ b/arch/arm/mach-tegra/pinmux.c @@ -20,6 +20,7 @@ #include <linux/errno.h> #include <linux/spinlock.h> #include <linux/io.h> +#include <linux/platform_device.h> #include <mach/iomap.h> #include <mach/pinmux.h> @@ -169,15 +170,17 @@ static const char *pupd_name(unsigned long val) } } +static int nbanks; +static void __iomem **regs; -static inline unsigned long pg_readl(unsigned long offset) +static inline u32 pg_readl(u32 bank, u32 reg) { - return readl(IO_TO_VIRT(TEGRA_APB_MISC_BASE + offset)); + return readl(regs[bank] + reg); } -static inline void pg_writel(unsigned long value, unsigned long offset) +static inline void pg_writel(u32 val, u32 bank, u32 reg) { - writel(value, IO_TO_VIRT(TEGRA_APB_MISC_BASE + offset)); + writel(val, regs[bank] + reg); } static int tegra_pinmux_set_func(const struct tegra_pingroup_config *config) @@ -217,10 +220,10 @@ static int tegra_pinmux_set_func(const struct tegra_pingroup_config *config) spin_lock_irqsave(&mux_lock, flags); - reg = pg_readl(pingroups[pg].mux_reg); + reg = pg_readl(pingroups[pg].mux_bank, pingroups[pg].mux_reg); reg &= ~(0x3 << pingroups[pg].mux_bit); reg |= mux << pingroups[pg].mux_bit; - pg_writel(reg, pingroups[pg].mux_reg); + pg_writel(reg, pingroups[pg].mux_bank, pingroups[pg].mux_reg); spin_unlock_irqrestore(&mux_lock, flags); @@ -241,11 +244,11 @@ int tegra_pinmux_set_tristate(enum tegra_pingroup pg, spin_lock_irqsave(&mux_lock, flags); - reg = pg_readl(pingroups[pg].tri_reg); + reg = pg_readl(pingroups[pg].tri_bank, pingroups[pg].tri_reg); reg &= ~(0x1 << pingroups[pg].tri_bit); if (tristate) reg |= 1 << pingroups[pg].tri_bit; - pg_writel(reg, pingroups[pg].tri_reg); + pg_writel(reg, pingroups[pg].tri_bank, pingroups[pg].tri_reg); spin_unlock_irqrestore(&mux_lock, flags); @@ -272,10 +275,10 @@ int tegra_pinmux_set_pullupdown(enum tegra_pingroup pg, spin_lock_irqsave(&mux_lock, flags); - reg = pg_readl(pingroups[pg].pupd_reg); + reg = pg_readl(pingroups[pg].pupd_bank, pingroups[pg].pupd_reg); reg &= ~(0x3 << pingroups[pg].pupd_bit); reg |= pupd << pingroups[pg].pupd_bit; - pg_writel(reg, pingroups[pg].pupd_reg); + pg_writel(reg, pingroups[pg].pupd_bank, pingroups[pg].pupd_reg); spin_unlock_irqrestore(&mux_lock, flags); @@ -362,12 +365,12 @@ static int tegra_drive_pinmux_set_hsm(enum tegra_drive_pingroup pg, spin_lock_irqsave(&mux_lock, flags); - reg = pg_readl(drive_pingroups[pg].reg); + reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); if (hsm == TEGRA_HSM_ENABLE) reg |= (1 << 2); else reg &= ~(1 << 2); - pg_writel(reg, drive_pingroups[pg].reg); + pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); spin_unlock_irqrestore(&mux_lock, flags); @@ -387,12 +390,12 @@ static int tegra_drive_pinmux_set_schmitt(enum tegra_drive_pingroup pg, spin_lock_irqsave(&mux_lock, flags); - reg = pg_readl(drive_pingroups[pg].reg); + reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); if (schmitt == TEGRA_SCHMITT_ENABLE) reg |= (1 << 3); else reg &= ~(1 << 3); - pg_writel(reg, drive_pingroups[pg].reg); + pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); spin_unlock_irqrestore(&mux_lock, flags); @@ -412,10 +415,10 @@ static int tegra_drive_pinmux_set_drive(enum tegra_drive_pingroup pg, spin_lock_irqsave(&mux_lock, flags); - reg = pg_readl(drive_pingroups[pg].reg); + reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); reg &= ~(0x3 << 4); reg |= drive << 4; - pg_writel(reg, drive_pingroups[pg].reg); + pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); spin_unlock_irqrestore(&mux_lock, flags); @@ -435,10 +438,10 @@ static int tegra_drive_pinmux_set_pull_down(enum tegra_drive_pingroup pg, spin_lock_irqsave(&mux_lock, flags); - reg = pg_readl(drive_pingroups[pg].reg); + reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); reg &= ~(0x1f << 12); reg |= pull_down << 12; - pg_writel(reg, drive_pingroups[pg].reg); + pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); spin_unlock_irqrestore(&mux_lock, flags); @@ -458,10 +461,10 @@ static int tegra_drive_pinmux_set_pull_up(enum tegra_drive_pingroup pg, spin_lock_irqsave(&mux_lock, flags); - reg = pg_readl(drive_pingroups[pg].reg); + reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); reg &= ~(0x1f << 12); reg |= pull_up << 12; - pg_writel(reg, drive_pingroups[pg].reg); + pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); spin_unlock_irqrestore(&mux_lock, flags); @@ -481,10 +484,10 @@ static int tegra_drive_pinmux_set_slew_rising(enum tegra_drive_pingroup pg, spin_lock_irqsave(&mux_lock, flags); - reg = pg_readl(drive_pingroups[pg].reg); + reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); reg &= ~(0x3 << 28); reg |= slew_rising << 28; - pg_writel(reg, drive_pingroups[pg].reg); + pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); spin_unlock_irqrestore(&mux_lock, flags); @@ -504,10 +507,10 @@ static int tegra_drive_pinmux_set_slew_falling(enum tegra_drive_pingroup pg, spin_lock_irqsave(&mux_lock, flags); - reg = pg_readl(drive_pingroups[pg].reg); + reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); reg &= ~(0x3 << 30); reg |= slew_falling << 30; - pg_writel(reg, drive_pingroups[pg].reg); + pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); spin_unlock_irqrestore(&mux_lock, flags); @@ -665,6 +668,99 @@ void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *co } } +static int __devinit tegra_pinmux_probe(struct platform_device *pdev) +{ + struct resource *res; + int i; + int config_bad = 0; + + for (i = 0; ; i++) { + res = platform_get_resource(pdev, IORESOURCE_MEM, i); + if (!res) + break; + } + nbanks = i; + + for (i = 0; i < TEGRA_MAX_PINGROUP; i++) { + if (pingroups[i].tri_bank >= nbanks) { + dev_err(&pdev->dev, "pingroup %d: bad tri_bank\n", i); + config_bad = 1; + } + + if (pingroups[i].mux_bank >= nbanks) { + dev_err(&pdev->dev, "pingroup %d: bad mux_bank\n", i); + config_bad = 1; + } + + if (pingroups[i].pupd_bank >= nbanks) { + dev_err(&pdev->dev, "pingroup %d: bad pupd_bank\n", i); + config_bad = 1; + } + } + + for (i = 0; i < TEGRA_MAX_DRIVE_PINGROUP; i++) { + if (drive_pingroups[i].reg_bank >= nbanks) { + dev_err(&pdev->dev, + "drive pingroup %d: bad reg_bank\n", i); + config_bad = 1; + } + } + + if (config_bad) + return -ENODEV; + + regs = devm_kzalloc(&pdev->dev, nbanks * sizeof(*regs), GFP_KERNEL); + if (!regs) { + dev_err(&pdev->dev, "Can't alloc regs pointer\n"); + return -ENODEV; + } + + for (i = 0; i < nbanks; i++) { + res = platform_get_resource(pdev, IORESOURCE_MEM, i); + if (!res) { + dev_err(&pdev->dev, "Missing MEM resource\n"); + return -ENODEV; + } + + if (!devm_request_mem_region(&pdev->dev, res->start, + resource_size(res), + dev_name(&pdev->dev))) { + dev_err(&pdev->dev, + "Couldn't request MEM resource %d\n", i); + return -ENODEV; + } + + regs[i] = devm_ioremap(&pdev->dev, res->start, + resource_size(res)); + if (!regs) { + dev_err(&pdev->dev, "Couldn't ioremap regs %d\n", i); + return -ENODEV; + } + } + + return 0; +} + +static struct of_device_id tegra_pinmux_of_match[] __devinitdata = { + { .compatible = "nvidia,tegra20-pinmux", }, + { }, +}; + +static struct platform_driver tegra_pinmux_driver = { + .driver = { + .name = "tegra-pinmux", + .owner = THIS_MODULE, + .of_match_table = tegra_pinmux_of_match, + }, + .probe = tegra_pinmux_probe, +}; + +static int __init tegra_pinmux_init(void) +{ + return platform_driver_register(&tegra_pinmux_driver); +} +postcore_initcall(tegra_pinmux_init); + #ifdef CONFIG_DEBUG_FS #include <linux/debugfs.h> @@ -684,6 +780,7 @@ static int dbg_pinmux_show(struct seq_file *s, void *unused) int len; for (i = 0; i < TEGRA_MAX_PINGROUP; i++) { + unsigned long reg; unsigned long tri; unsigned long mux; unsigned long pupd; @@ -696,8 +793,9 @@ static int dbg_pinmux_show(struct seq_file *s, void *unused) seq_printf(s, "TEGRA_MUX_NONE"); len = strlen("NONE"); } else { - mux = (pg_readl(pingroups[i].mux_reg) >> - pingroups[i].mux_bit) & 0x3; + reg = pg_readl(pingroups[i].mux_bank, + pingroups[i].mux_reg); + mux = (reg >> pingroups[i].mux_bit) & 0x3; if (pingroups[i].funcs[mux] == TEGRA_MUX_RSVD) { seq_printf(s, "TEGRA_MUX_RSVD%1lu", mux+1); len = 5; @@ -713,8 +811,9 @@ static int dbg_pinmux_show(struct seq_file *s, void *unused) seq_printf(s, "TEGRA_PUPD_NORMAL"); len = strlen("NORMAL"); } else { - pupd = (pg_readl(pingroups[i].pupd_reg) >> - pingroups[i].pupd_bit) & 0x3; + reg = pg_readl(pingroups[i].pupd_bank, + pingroups[i].pupd_reg); + pupd = (reg >> pingroups[i].pupd_bit) & 0x3; seq_printf(s, "TEGRA_PUPD_%s", pupd_name(pupd)); len = strlen(pupd_name(pupd)); } @@ -723,8 +822,9 @@ static int dbg_pinmux_show(struct seq_file *s, void *unused) if (pingroups[i].tri_reg < 0) { seq_printf(s, "TEGRA_TRI_NORMAL"); } else { - tri = (pg_readl(pingroups[i].tri_reg) >> - pingroups[i].tri_bit) & 0x1; + reg = pg_readl(pingroups[i].tri_bank, + pingroups[i].tri_reg); + tri = (reg >> pingroups[i].tri_bit) & 0x1; seq_printf(s, "TEGRA_TRI_%s", tri_name(tri)); } @@ -759,7 +859,8 @@ static int dbg_drive_pinmux_show(struct seq_file *s, void *unused) dbg_pad_field(s, 7 - len); - reg = pg_readl(drive_pingroups[i].reg); + reg = pg_readl(drive_pingroups[i].reg_bank, + drive_pingroups[i].reg); if (HSM_EN(reg)) { seq_printf(s, "TEGRA_HSM_ENABLE"); len = 16; diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c index 3cee9aa1f2c8..948306491a59 100644 --- a/arch/arm/mach-tegra/powergate.c +++ b/arch/arm/mach-tegra/powergate.c @@ -89,12 +89,11 @@ int tegra_powergate_power_off(int id) return tegra_powergate_set(id, false); } -bool tegra_powergate_is_powered(int id) +static bool tegra_powergate_is_powered(int id) { u32 status; - if (id < 0 || id >= TEGRA_NUM_POWERGATE) - return -EINVAL; + WARN_ON(id < 0 || id >= TEGRA_NUM_POWERGATE); status = pmc_read(PWRGATE_STATUS) & (1 << id); return !!status; diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index 0fe9b3ee2947..371869d8ea01 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -166,13 +166,13 @@ static DEFINE_SPINLOCK(clock_register_lock); static int tegra_periph_clk_enable_refcount[3 * 32]; #define clk_writel(value, reg) \ - __raw_writel(value, (u32)reg_clk_base + (reg)) + __raw_writel(value, reg_clk_base + (reg)) #define clk_readl(reg) \ - __raw_readl((u32)reg_clk_base + (reg)) + __raw_readl(reg_clk_base + (reg)) #define pmc_writel(value, reg) \ - __raw_writel(value, (u32)reg_pmc_base + (reg)) + __raw_writel(value, reg_pmc_base + (reg)) #define pmc_readl(reg) \ - __raw_readl((u32)reg_pmc_base + (reg)) + __raw_readl(reg_pmc_base + (reg)) unsigned long clk_measure_input_freq(void) { @@ -918,7 +918,7 @@ static struct clk_ops tegra_pll_div_ops = { static void tegra2_periph_clk_init(struct clk *c) { u32 val = clk_readl(c->reg); - const struct clk_mux_sel *mux = 0; + const struct clk_mux_sel *mux = NULL; const struct clk_mux_sel *sel; if (c->flags & MUX) { for (sel = c->inputs; sel->input != NULL; sel++) { @@ -1459,7 +1459,7 @@ static struct clk tegra_pll_s = { static struct clk_mux_sel tegra_clk_m_sel[] = { { .input = &tegra_clk_32k, .value = 0}, { .input = &tegra_pll_s, .value = 1}, - { 0, 0}, + { NULL , 0}, }; static struct clk tegra_clk_m = { @@ -1861,7 +1861,7 @@ static const struct audio_sources { { .name = "ext_audio_clk1", .value = 6 }, { .name = "ext_vimclk", .value = 7 }, #endif - { 0, 0 } + { NULL, 0 } }; static struct clk tegra_clk_audio = { @@ -1885,7 +1885,7 @@ static struct clk tegra_clk_audio_2x = { }, }; -struct clk_lookup tegra_audio_clk_lookups[] = { +static struct clk_lookup tegra_audio_clk_lookups[] = { { .con_id = "audio", .clk = &tegra_clk_audio }, { .con_id = "audio_2x", .clk = &tegra_clk_audio_2x } }; @@ -1926,7 +1926,7 @@ static struct clk_mux_sel mux_cclk[] = { { .input = &tegra_pll_p_out3, .value = 6}, { .input = &tegra_clk_d, .value = 7}, { .input = &tegra_pll_x, .value = 8}, - { 0, 0}, + { NULL, 0}, }; static struct clk_mux_sel mux_sclk[] = { @@ -1938,7 +1938,7 @@ static struct clk_mux_sel mux_sclk[] = { { .input = &tegra_clk_d, .value = 5}, { .input = &tegra_clk_32k, .value = 6}, { .input = &tegra_pll_m_out1, .value = 7}, - { 0, 0}, + { NULL, 0}, }; static struct clk tegra_clk_cclk = { @@ -2009,7 +2009,7 @@ static struct clk_mux_sel mux_pllm_pllc_pllp_plla[] = { { .input = &tegra_pll_c, .value = 1}, { .input = &tegra_pll_p, .value = 2}, { .input = &tegra_pll_a_out0, .value = 3}, - { 0, 0}, + { NULL, 0}, }; static struct clk_mux_sel mux_pllm_pllc_pllp_clkm[] = { @@ -2017,7 +2017,7 @@ static struct clk_mux_sel mux_pllm_pllc_pllp_clkm[] = { { .input = &tegra_pll_c, .value = 1}, { .input = &tegra_pll_p, .value = 2}, { .input = &tegra_clk_m, .value = 3}, - { 0, 0}, + { NULL, 0}, }; static struct clk_mux_sel mux_pllp_pllc_pllm_clkm[] = { @@ -2025,7 +2025,7 @@ static struct clk_mux_sel mux_pllp_pllc_pllm_clkm[] = { { .input = &tegra_pll_c, .value = 1}, { .input = &tegra_pll_m, .value = 2}, { .input = &tegra_clk_m, .value = 3}, - { 0, 0}, + { NULL, 0}, }; static struct clk_mux_sel mux_pllaout0_audio2x_pllp_clkm[] = { @@ -2033,7 +2033,7 @@ static struct clk_mux_sel mux_pllaout0_audio2x_pllp_clkm[] = { {.input = &tegra_clk_audio_2x, .value = 1}, {.input = &tegra_pll_p, .value = 2}, {.input = &tegra_clk_m, .value = 3}, - { 0, 0}, + { NULL, 0}, }; static struct clk_mux_sel mux_pllp_plld_pllc_clkm[] = { @@ -2041,7 +2041,7 @@ static struct clk_mux_sel mux_pllp_plld_pllc_clkm[] = { {.input = &tegra_pll_d_out0, .value = 1}, {.input = &tegra_pll_c, .value = 2}, {.input = &tegra_clk_m, .value = 3}, - { 0, 0}, + { NULL, 0}, }; static struct clk_mux_sel mux_pllp_pllc_audio_clkm_clk32[] = { @@ -2050,39 +2050,39 @@ static struct clk_mux_sel mux_pllp_pllc_audio_clkm_clk32[] = { {.input = &tegra_clk_audio, .value = 2}, {.input = &tegra_clk_m, .value = 3}, {.input = &tegra_clk_32k, .value = 4}, - { 0, 0}, + { NULL, 0}, }; static struct clk_mux_sel mux_pllp_pllc_pllm[] = { {.input = &tegra_pll_p, .value = 0}, {.input = &tegra_pll_c, .value = 1}, {.input = &tegra_pll_m, .value = 2}, - { 0, 0}, + { NULL, 0}, }; static struct clk_mux_sel mux_clk_m[] = { { .input = &tegra_clk_m, .value = 0}, - { 0, 0}, + { NULL, 0}, }; static struct clk_mux_sel mux_pllp_out3[] = { { .input = &tegra_pll_p_out3, .value = 0}, - { 0, 0}, + { NULL, 0}, }; static struct clk_mux_sel mux_plld[] = { { .input = &tegra_pll_d, .value = 0}, - { 0, 0}, + { NULL, 0}, }; static struct clk_mux_sel mux_clk_32k[] = { { .input = &tegra_clk_32k, .value = 0}, - { 0, 0}, + { NULL, 0}, }; static struct clk_mux_sel mux_pclk[] = { { .input = &tegra_clk_pclk, .value = 0}, - { 0, 0}, + { NULL, 0}, }; static struct clk tegra_clk_emc = { @@ -2125,7 +2125,7 @@ static struct clk tegra_clk_emc = { .parent = _parent, \ } -struct clk tegra_list_clks[] = { +static struct clk tegra_list_clks[] = { PERIPH_CLK("apbdma", "tegra-dma", NULL, 34, 0, 108000000, mux_pclk, 0), PERIPH_CLK("rtc", "rtc-tegra", NULL, 4, 0, 32768, mux_clk_32k, PERIPH_NO_RESET), PERIPH_CLK("timer", "timer", NULL, 5, 0, 26000000, mux_clk_m, 0), @@ -2221,7 +2221,7 @@ struct clk tegra_list_clks[] = { * configuration. List those here to register them twice in the clock lookup * table under two names. */ -struct clk_duplicate tegra_clk_duplicates[] = { +static struct clk_duplicate tegra_clk_duplicates[] = { CLK_DUPLICATE("uarta", "tegra_uart.0", NULL), CLK_DUPLICATE("uartb", "tegra_uart.1", NULL), CLK_DUPLICATE("uartc", "tegra_uart.2", NULL), @@ -2252,7 +2252,7 @@ struct clk_duplicate tegra_clk_duplicates[] = { .clk = ck, \ } -struct clk *tegra_ptr_clks[] = { +static struct clk *tegra_ptr_clks[] = { &tegra_clk_32k, &tegra_pll_s, &tegra_clk_m, diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c index 90350420c4e9..e2272d263a83 100644 --- a/arch/arm/mach-tegra/timer.c +++ b/arch/arm/mach-tegra/timer.c @@ -62,9 +62,9 @@ static struct timespec persistent_ts; static u64 persistent_ms, last_persistent_ms; #define timer_writel(value, reg) \ - __raw_writel(value, (u32)timer_reg_base + (reg)) + __raw_writel(value, timer_reg_base + (reg)) #define timer_readl(reg) \ - __raw_readl((u32)timer_reg_base + (reg)) + __raw_readl(timer_reg_base + (reg)) static int tegra_timer_set_next_event(unsigned long cycles, struct clock_event_device *evt) @@ -133,7 +133,7 @@ static void notrace tegra_update_sched_clock(void) * tegra_rtc driver could be executing to avoid race conditions * on the RTC shadow register */ -u64 tegra_rtc_read_ms(void) +static u64 tegra_rtc_read_ms(void) { u32 ms = readl(rtc_base + RTC_MILLISECONDS); u32 s = readl(rtc_base + RTC_SHADOW_SECONDS); |
