diff options
Diffstat (limited to 'arch/arm/mach-tcc8k/board-tcc8000-sdk.c')
| -rw-r--r-- | arch/arm/mach-tcc8k/board-tcc8000-sdk.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/mach-tcc8k/board-tcc8000-sdk.c b/arch/arm/mach-tcc8k/board-tcc8000-sdk.c index fb6426ddeb77..4cb3c2dd905c 100644 --- a/arch/arm/mach-tcc8k/board-tcc8000-sdk.c +++ b/arch/arm/mach-tcc8k/board-tcc8000-sdk.c @@ -6,6 +6,7 @@ * published by the Free Software Foundation. */ +#include <linux/delay.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/platform_device.h> @@ -17,6 +18,8 @@ #include <asm/mach/time.h> #include <mach/clock.h> +#include <mach/tcc-nand.h> +#include <mach/tcc8k-regs.h> #include "common.h" @@ -51,6 +54,22 @@ static struct sys_timer tcc8k_timer = { static void __init tcc8k_map_io(void) { tcc8k_map_common_io(); + + /* set PLL0 clock to 96MHz, adapt UART0 divisor */ + __raw_writel(0x00026003, CKC_BASE + PLL0CFG_OFFS); + __raw_writel(0x10000001, CKC_BASE + ACLKUART0_OFFS); + + /* set PLL1 clock to 192MHz */ + __raw_writel(0x00016003, CKC_BASE + PLL1CFG_OFFS); + + /* set PLL2 clock to 48MHz */ + __raw_writel(0x00036003, CKC_BASE + PLL2CFG_OFFS); + + /* with CPU freq higher than 150 MHz, need extra DTCM wait */ + __raw_writel(0x00000001, SCFG_BASE + DTCMWAIT_OFFS); + + /* PLL locking time as specified */ + udelay(300); } MACHINE_START(TCC8000_SDK, "Telechips TCC8000-SDK Demo Board") |
