diff options
Diffstat (limited to 'arch/arm/mach-s5pv310/include')
| -rw-r--r-- | arch/arm/mach-s5pv310/include/mach/irqs.h | 44 | ||||
| -rw-r--r-- | arch/arm/mach-s5pv310/include/mach/map.h | 19 | ||||
| -rw-r--r-- | arch/arm/mach-s5pv310/include/mach/regs-clock.h | 32 | ||||
| -rw-r--r-- | arch/arm/mach-s5pv310/include/mach/regs-gpio.h | 42 | ||||
| -rw-r--r-- | arch/arm/mach-s5pv310/include/mach/regs-srom.h | 50 | ||||
| -rw-r--r-- | arch/arm/mach-s5pv310/include/mach/vmalloc.h | 2 |
6 files changed, 179 insertions, 10 deletions
diff --git a/arch/arm/mach-s5pv310/include/mach/irqs.h b/arch/arm/mach-s5pv310/include/mach/irqs.h index 471fc3bb199a..99e7dad8a85a 100644 --- a/arch/arm/mach-s5pv310/include/mach/irqs.h +++ b/arch/arm/mach-s5pv310/include/mach/irqs.h @@ -3,7 +3,7 @@ * Copyright (c) 2010 Samsung Electronics Co., Ltd. * http://www.samsung.com/ * - * S5PV210 - IRQ definitions + * S5PV310 - IRQ definitions * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -60,6 +60,9 @@ #define IRQ_TIMER3_VIC COMBINER_IRQ(22, 3) #define IRQ_TIMER4_VIC COMBINER_IRQ(22, 4) +#define IRQ_RTC_ALARM COMBINER_IRQ(23, 0) +#define IRQ_RTC_TIC COMBINER_IRQ(23, 1) + #define IRQ_UART0 COMBINER_IRQ(26, 0) #define IRQ_UART1 COMBINER_IRQ(26, 1) #define IRQ_UART2 COMBINER_IRQ(26, 2) @@ -67,13 +70,46 @@ #define IRQ_UART4 COMBINER_IRQ(26, 4) #define IRQ_IIC COMBINER_IRQ(27, 0) +#define IRQ_IIC1 COMBINER_IRQ(27, 1) +#define IRQ_IIC2 COMBINER_IRQ(27, 2) +#define IRQ_IIC3 COMBINER_IRQ(27, 3) +#define IRQ_IIC4 COMBINER_IRQ(27, 4) +#define IRQ_IIC5 COMBINER_IRQ(27, 5) +#define IRQ_IIC6 COMBINER_IRQ(27, 6) +#define IRQ_IIC7 COMBINER_IRQ(27, 7) + +#define IRQ_HSMMC0 COMBINER_IRQ(29, 0) +#define IRQ_HSMMC1 COMBINER_IRQ(29, 1) +#define IRQ_HSMMC2 COMBINER_IRQ(29, 2) +#define IRQ_HSMMC3 COMBINER_IRQ(29, 3) #define IRQ_ONENAND_AUDI COMBINER_IRQ(34, 0) -/* Set the default NR_IRQS */ +#define IRQ_EINT4 COMBINER_IRQ(37, 0) +#define IRQ_EINT5 COMBINER_IRQ(37, 1) +#define IRQ_EINT6 COMBINER_IRQ(37, 2) +#define IRQ_EINT7 COMBINER_IRQ(37, 3) +#define IRQ_EINT8 COMBINER_IRQ(38, 0) + +#define IRQ_EINT9 COMBINER_IRQ(38, 1) +#define IRQ_EINT10 COMBINER_IRQ(38, 2) +#define IRQ_EINT11 COMBINER_IRQ(38, 3) +#define IRQ_EINT12 COMBINER_IRQ(38, 4) +#define IRQ_EINT13 COMBINER_IRQ(38, 5) +#define IRQ_EINT14 COMBINER_IRQ(38, 6) +#define IRQ_EINT15 COMBINER_IRQ(38, 7) + +#define IRQ_EINT16_31 COMBINER_IRQ(39, 0) -#define NR_IRQS COMBINER_IRQ(MAX_COMBINER_NR, 0) +#define MAX_COMBINER_NR 40 + +#define S5P_IRQ_EINT_BASE COMBINER_IRQ(MAX_COMBINER_NR, 0) + +#define S5P_EINT_BASE1 (S5P_IRQ_EINT_BASE + 0) +#define S5P_EINT_BASE2 (S5P_IRQ_EINT_BASE + 16) + +/* Set the default NR_IRQS */ -#define MAX_COMBINER_NR 39 +#define NR_IRQS (S5P_IRQ_EINT_BASE + 32) #endif /* __ASM_ARCH_IRQS_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-s5pv310/include/mach/map.h index aff6d23624bb..7acf4e77e92e 100644 --- a/arch/arm/mach-s5pv310/include/mach/map.h +++ b/arch/arm/mach-s5pv310/include/mach/map.h @@ -25,6 +25,8 @@ #define S5PV310_PA_SYSRAM (0x02025000) +#define S5PV310_PA_SROM_BANK(x) (0x04000000 + ((x) * 0x01000000)) + #define S5PC210_PA_ONENAND (0x0C000000) #define S5P_PA_ONENAND S5PC210_PA_ONENAND @@ -34,12 +36,13 @@ #define S5PV310_PA_CHIPID (0x10000000) #define S5P_PA_CHIPID S5PV310_PA_CHIPID -#define S5PV310_PA_SYSCON (0x10020000) +#define S5PV310_PA_SYSCON (0x10010000) #define S5P_PA_SYSCON S5PV310_PA_SYSCON #define S5PV310_PA_CMU (0x10030000) #define S5PV310_PA_WATCHDOG (0x10060000) +#define S5PV310_PA_RTC (0x10070000) #define S5PV310_PA_COMBINER (0x10448000) @@ -55,6 +58,8 @@ #define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000)) +#define S5PV310_PA_SROMC (0x12570000) + #define S5PV310_PA_UART (0x13800000) #define S5P_PA_UART(x) (S5PV310_PA_UART + ((x) * S3C_UART_OFFSET)) @@ -66,7 +71,7 @@ #define S5P_SZ_UART SZ_256 -#define S5PV310_PA_IIC0 (0x13860000) +#define S5PV310_PA_IIC(x) (0x13860000 + ((x) * 0x10000)) #define S5PV310_PA_TIMER (0x139D0000) #define S5P_PA_TIMER S5PV310_PA_TIMER @@ -80,7 +85,15 @@ #define S3C_PA_HSMMC1 S5PV310_PA_HSMMC(1) #define S3C_PA_HSMMC2 S5PV310_PA_HSMMC(2) #define S3C_PA_HSMMC3 S5PV310_PA_HSMMC(3) -#define S3C_PA_IIC S5PV310_PA_IIC0 +#define S3C_PA_IIC S5PV310_PA_IIC(0) +#define S3C_PA_IIC1 S5PV310_PA_IIC(1) +#define S3C_PA_IIC2 S5PV310_PA_IIC(2) +#define S3C_PA_IIC3 S5PV310_PA_IIC(3) +#define S3C_PA_IIC4 S5PV310_PA_IIC(4) +#define S3C_PA_IIC5 S5PV310_PA_IIC(5) +#define S3C_PA_IIC6 S5PV310_PA_IIC(6) +#define S3C_PA_IIC7 S5PV310_PA_IIC(7) +#define S3C_PA_RTC S5PV310_PA_RTC #define S3C_PA_WDT S5PV310_PA_WATCHDOG #endif /* __ASM_ARCH_MAP_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/regs-clock.h b/arch/arm/mach-s5pv310/include/mach/regs-clock.h index 4013553cd9be..f1028cad9788 100644 --- a/arch/arm/mach-s5pv310/include/mach/regs-clock.h +++ b/arch/arm/mach-s5pv310/include/mach/regs-clock.h @@ -26,11 +26,23 @@ #define S5P_CLKSRC_TOP0 S5P_CLKREG(0x0C210) #define S5P_CLKSRC_TOP1 S5P_CLKREG(0x0C214) - +#define S5P_CLKSRC_CAM S5P_CLKREG(0x0C220) +#define S5P_CLKSRC_IMAGE S5P_CLKREG(0x0C230) +#define S5P_CLKSRC_LCD0 S5P_CLKREG(0x0C234) +#define S5P_CLKSRC_LCD1 S5P_CLKREG(0x0C238) +#define S5P_CLKSRC_FSYS S5P_CLKREG(0x0C240) #define S5P_CLKSRC_PERIL0 S5P_CLKREG(0x0C250) +#define S5P_CLKSRC_PERIL1 S5P_CLKREG(0x0C254) #define S5P_CLKDIV_TOP S5P_CLKREG(0x0C510) - +#define S5P_CLKDIV_CAM S5P_CLKREG(0x0C520) +#define S5P_CLKDIV_IMAGE S5P_CLKREG(0x0C530) +#define S5P_CLKDIV_LCD0 S5P_CLKREG(0x0C534) +#define S5P_CLKDIV_LCD1 S5P_CLKREG(0x0C538) +#define S5P_CLKDIV_FSYS0 S5P_CLKREG(0x0C540) +#define S5P_CLKDIV_FSYS1 S5P_CLKREG(0x0C544) +#define S5P_CLKDIV_FSYS2 S5P_CLKREG(0x0C548) +#define S5P_CLKDIV_FSYS3 S5P_CLKREG(0x0C54C) #define S5P_CLKDIV_PERIL0 S5P_CLKREG(0x0C550) #define S5P_CLKDIV_PERIL1 S5P_CLKREG(0x0C554) #define S5P_CLKDIV_PERIL2 S5P_CLKREG(0x0C558) @@ -38,9 +50,21 @@ #define S5P_CLKDIV_PERIL4 S5P_CLKREG(0x0C560) #define S5P_CLKDIV_PERIL5 S5P_CLKREG(0x0C564) +#define S5P_CLKSRC_MASK_TOP S5P_CLKREG(0x0C310) +#define S5P_CLKSRC_MASK_CAM S5P_CLKREG(0x0C320) +#define S5P_CLKSRC_MASK_LCD0 S5P_CLKREG(0x0C334) +#define S5P_CLKSRC_MASK_LCD1 S5P_CLKREG(0x0C338) +#define S5P_CLKSRC_MASK_FSYS S5P_CLKREG(0x0C340) #define S5P_CLKSRC_MASK_PERIL0 S5P_CLKREG(0x0C350) +#define S5P_CLKSRC_MASK_PERIL1 S5P_CLKREG(0x0C354) +#define S5P_CLKGATE_IP_CAM S5P_CLKREG(0x0C920) +#define S5P_CLKGATE_IP_IMAGE S5P_CLKREG(0x0C930) +#define S5P_CLKGATE_IP_LCD0 S5P_CLKREG(0x0C934) +#define S5P_CLKGATE_IP_LCD1 S5P_CLKREG(0x0C938) +#define S5P_CLKGATE_IP_FSYS S5P_CLKREG(0x0C940) #define S5P_CLKGATE_IP_PERIL S5P_CLKREG(0x0C950) +#define S5P_CLKGATE_IP_PERIR S5P_CLKREG(0x0C960) #define S5P_CLKSRC_CORE S5P_CLKREG(0x10200) #define S5P_CLKDIV_CORE0 S5P_CLKREG(0x10500) @@ -60,4 +84,8 @@ #define S5P_CLKGATE_SCLKCPU S5P_CLKREG(0x14800) +/* Compatibility defines */ + +#define S5P_EPLL_CON S5P_EPLL_CON0 + #endif /* __ASM_ARCH_REGS_CLOCK_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/regs-gpio.h b/arch/arm/mach-s5pv310/include/mach/regs-gpio.h new file mode 100644 index 000000000000..82e9e0c9d452 --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/regs-gpio.h @@ -0,0 +1,42 @@ +/* linux/arch/arm/mach-s5pv310/include/mach/regs-gpio.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * S5PV310 - GPIO (including EINT) register definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_REGS_GPIO_H +#define __ASM_ARCH_REGS_GPIO_H __FILE__ + +#include <mach/map.h> +#include <mach/irqs.h> + +#define S5PV310_EINT40CON (S5P_VA_GPIO2 + 0xE00) +#define S5P_EINT_CON(x) (S5PV310_EINT40CON + ((x) * 0x4)) + +#define S5PV310_EINT40FLTCON0 (S5P_VA_GPIO2 + 0xE80) +#define S5P_EINT_FLTCON(x) (S5PV310_EINT40FLTCON0 + ((x) * 0x4)) + +#define S5PV310_EINT40MASK (S5P_VA_GPIO2 + 0xF00) +#define S5P_EINT_MASK(x) (S5PV310_EINT40MASK + ((x) * 0x4)) + +#define S5PV310_EINT40PEND (S5P_VA_GPIO2 + 0xF40) +#define S5P_EINT_PEND(x) (S5PV310_EINT40PEND + ((x) * 0x4)) + +#define EINT_REG_NR(x) (EINT_OFFSET(x) >> 3) + +#define eint_irq_to_bit(irq) (1 << (EINT_OFFSET(irq) & 0x7)) + +#define EINT_MODE S3C_GPIO_SFN(0xf) + +#define EINT_GPIO_0(x) S5PV310_GPX0(x) +#define EINT_GPIO_1(x) S5PV310_GPX1(x) +#define EINT_GPIO_2(x) S5PV310_GPX2(x) +#define EINT_GPIO_3(x) S5PV310_GPX3(x) + +#endif /* __ASM_ARCH_REGS_GPIO_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/regs-srom.h b/arch/arm/mach-s5pv310/include/mach/regs-srom.h new file mode 100644 index 000000000000..1898b3e10550 --- /dev/null +++ b/arch/arm/mach-s5pv310/include/mach/regs-srom.h @@ -0,0 +1,50 @@ +/* linux/arch/arm/mach-s5pv310/include/mach/regs-srom.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * S5PV310 - SROMC register definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_REGS_SROM_H +#define __ASM_ARCH_REGS_SROM_H __FILE__ + +#include <mach/map.h> + +#define S5PV310_SROMREG(x) (S5P_VA_SROMC + (x)) + +#define S5PV310_SROM_BW S5PV310_SROMREG(0x0) +#define S5PV310_SROM_BC0 S5PV310_SROMREG(0x4) +#define S5PV310_SROM_BC1 S5PV310_SROMREG(0x8) +#define S5PV310_SROM_BC2 S5PV310_SROMREG(0xc) +#define S5PV310_SROM_BC3 S5PV310_SROMREG(0x10) + +/* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */ + +#define S5PV310_SROM_BW__DATAWIDTH__SHIFT 0 +#define S5PV310_SROM_BW__ADDRMODE__SHIFT 1 +#define S5PV310_SROM_BW__WAITENABLE__SHIFT 2 +#define S5PV310_SROM_BW__BYTEENABLE__SHIFT 3 + +#define S5PV310_SROM_BW__CS_MASK 0xf + +#define S5PV310_SROM_BW__NCS0__SHIFT 0 +#define S5PV310_SROM_BW__NCS1__SHIFT 4 +#define S5PV310_SROM_BW__NCS2__SHIFT 8 +#define S5PV310_SROM_BW__NCS3__SHIFT 12 + +/* applies to same to BCS0 - BCS3 */ + +#define S5PV310_SROM_BCX__PMC__SHIFT 0 +#define S5PV310_SROM_BCX__TACP__SHIFT 4 +#define S5PV310_SROM_BCX__TCAH__SHIFT 8 +#define S5PV310_SROM_BCX__TCOH__SHIFT 12 +#define S5PV310_SROM_BCX__TACC__SHIFT 16 +#define S5PV310_SROM_BCX__TCOS__SHIFT 24 +#define S5PV310_SROM_BCX__TACS__SHIFT 28 + +#endif /* __ASM_ARCH_REGS_SROM_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/vmalloc.h b/arch/arm/mach-s5pv310/include/mach/vmalloc.h index 256f221edf3a..65759fb97581 100644 --- a/arch/arm/mach-s5pv310/include/mach/vmalloc.h +++ b/arch/arm/mach-s5pv310/include/mach/vmalloc.h @@ -17,6 +17,6 @@ #ifndef __ASM_ARCH_VMALLOC_H #define __ASM_ARCH_VMALLOC_H __FILE__ -#define VMALLOC_END (0xF0000000UL) +#define VMALLOC_END 0xF6000000UL #endif /* __ASM_ARCH_VMALLOC_H */ |
