diff options
Diffstat (limited to 'arch/arm/mach-omap1')
-rw-r--r-- | arch/arm/mach-omap1/board-htcherald.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-omap1/clock.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap1/clock_data.c | 13 | ||||
-rw-r--r-- | arch/arm/mach-omap1/dma.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-omap1/lcd_dma.c | 6 |
5 files changed, 14 insertions, 17 deletions
diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c index b3f6e943e661..f0ef0082c317 100644 --- a/arch/arm/mach-omap1/board-htcherald.c +++ b/arch/arm/mach-omap1/board-htcherald.c @@ -476,8 +476,7 @@ static void __init htcherald_lcd_init(void) break; } if (!tries) - printk(KERN_WARNING "Timeout waiting for end of frame " - "-- LCD may not be available\n"); + pr_err("Timeout waiting for end of frame -- LCD may not be available\n"); /* turn off DMA */ reg = omap_readw(OMAP_DMA_LCD_CCR); diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index a9ee06b6cb42..638f4070fc70 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -587,8 +587,8 @@ void omap1_clk_disable_unused(struct clk *clk) /* Clocks in the DSP domain need api_ck. Just assume bootloader * has not enabled any DSP clocks */ if (clk->enable_reg == DSP_IDLECT2) { - printk(KERN_INFO "Skipping reset check for DSP domain " - "clock \"%s\"\n", clk->name); + pr_info("Skipping reset check for DSP domain clock \"%s\"\n", + clk->name); return; } diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index c007d80dfb62..243e8b2865f5 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c @@ -776,11 +776,10 @@ static struct clk_functions omap1_clk_functions = { static void __init omap1_show_rates(void) { - pr_notice("Clocking rate (xtal/DPLL1/MPU): " - "%ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n", - ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10, - ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10, - arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10); + pr_notice("Clocking rate (xtal/DPLL1/MPU): %ld.%01ld/%ld.%01ld/%ld.%01ld MHz\n", + ck_ref.rate / 1000000, (ck_ref.rate / 100000) % 10, + ck_dpll1.rate / 1000000, (ck_dpll1.rate / 100000) % 10, + arm_ck.rate / 1000000, (arm_ck.rate / 100000) % 10); } u32 cpu_mask; @@ -848,8 +847,8 @@ int __init omap1_clk_init(void) if (cpu_is_omap16xx() && crystal_type == 2) ck_ref.rate = 19200000; - pr_info("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: " - "0x%04x\n", omap_readw(ARM_SYSST), omap_readw(DPLL_CTL), + pr_info("Clocks: ARM_SYSST: 0x%04x DPLL_CTL: 0x%04x ARM_CKCTL: 0x%04x\n", + omap_readw(ARM_SYSST), omap_readw(DPLL_CTL), omap_readw(ARM_CKCTL)); /* We want to be in syncronous scalable mode */ diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c index 3ef7d52316b4..f51014d1a614 100644 --- a/arch/arm/mach-omap1/dma.c +++ b/arch/arm/mach-omap1/dma.c @@ -330,8 +330,9 @@ static int __init omap1_system_dma_init(void) d->chan = kzalloc(sizeof(struct omap_dma_lch) * (d->lch_count), GFP_KERNEL); if (!d->chan) { - dev_err(&pdev->dev, "%s: Memory allocation failed" - "for d->chan!!!\n", __func__); + dev_err(&pdev->dev, + "%s: Memory allocation failed for d->chan!\n", + __func__); goto exit_release_d; } diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c index 5769c71815b2..ed42628611bc 100644 --- a/arch/arm/mach-omap1/lcd_dma.c +++ b/arch/arm/mach-omap1/lcd_dma.c @@ -113,8 +113,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror); void omap_set_lcd_dma_b1_vxres(unsigned long vxres) { if (cpu_is_omap15xx()) { - printk(KERN_ERR "DMA virtual resolution is not supported " - "in 1510 mode\n"); + pr_err("DMA virtual resolution is not supported in 1510 mode\n"); BUG(); } lcd_dma.vxres = vxres; @@ -437,8 +436,7 @@ static int __init omap_init_lcd_dma(void) r = request_irq(INT_DMA_LCD, lcd_dma_irq_handler, 0, "LCD DMA", NULL); if (r != 0) - printk(KERN_ERR "unable to request IRQ for LCD DMA " - "(error %d)\n", r); + pr_err("unable to request IRQ for LCD DMA (error %d)\n", r); return r; } |