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-rw-r--r--arch/arm/mach-at91/gpio.c4
-rw-r--r--arch/arm/mach-at91/irq.c3
2 files changed, 3 insertions, 4 deletions
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index 8512b796e653..4615528205c8 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -511,8 +511,8 @@ void __init at91_gpio_irq_setup(void)
* Can use the "simple" and not "edge" handler since it's
* shorter, and the AIC handles interrupts sanely.
*/
- irq_set_chip(pin, &gpio_irqchip);
- irq_set_handler(pin, handle_simple_irq);
+ irq_set_chip_and_handler(pin, &gpio_irqchip,
+ handle_simple_irq);
set_irq_flags(pin, IRQF_VALID);
}
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c
index 566cec1d9073..9665265ec757 100644
--- a/arch/arm/mach-at91/irq.c
+++ b/arch/arm/mach-at91/irq.c
@@ -143,8 +143,7 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
/* Active Low interrupt, with the specified priority */
at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
- irq_set_chip(i, &at91_aic_chip);
- irq_set_handler(i, handle_level_irq);
+ irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq);
set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
/* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */
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