diff options
Diffstat (limited to 'arch/arm/mach-at91')
31 files changed, 1186 insertions, 477 deletions
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 6071f4c3d654..02802386b894 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -1,14 +1,15 @@ if ARCH_AT91 -config HAVE_AT91_DATAFLASH_CARD - bool - config HAVE_AT91_DBGU0 bool config HAVE_AT91_DBGU1 bool +config AT91_PMC_UNIT + bool + default !ARCH_AT91X40 + config AT91_SAM9_ALT_RESET bool default !ARCH_AT91X40 @@ -17,17 +18,59 @@ config AT91_SAM9G45_RESET bool default !ARCH_AT91X40 +config AT91_SAM9_TIME + bool + config SOC_AT91SAM9 bool + select AT91_SAM9_TIME select CPU_ARM926T select GENERIC_CLOCKEVENTS select MULTI_IRQ_HANDLER select SPARSE_IRQ +config SOC_SAMA5 + bool + select AT91_SAM9_TIME + select CPU_V7 + select GENERIC_CLOCKEVENTS + select MULTI_IRQ_HANDLER + select SPARSE_IRQ + menu "Atmel AT91 System-on-Chip" +choice + + prompt "Core type" + +config SOC_SAM_V4_V5 + bool "ARM7/ARM9" + help + Select this if you are using one of Atmel's AT91SAM9, AT91RM9200 + or AT91X40 SoC. + +config SOC_SAM_V7 + bool "Cortex A5" + help + Select this if you are using one of Atmel's SAMA5D3 SoC. + +endchoice + comment "Atmel AT91 Processor" +if SOC_SAM_V7 +config SOC_SAMA5D3 + bool "SAMA5D3 family" + depends on SOC_SAM_V7 + select SOC_SAMA5 + select HAVE_FB_ATMEL + select HAVE_AT91_DBGU1 + help + Select this if you are using one of Atmel's SAMA5D3 family SoC. + This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35. +endif + +if SOC_SAM_V4_V5 config SOC_AT91RM9200 bool "AT91RM9200" select CPU_ARM920T @@ -93,394 +136,10 @@ config SOC_AT91SAM9N12 help Select this if you are using Atmel's AT91SAM9N12 SoC. -choice - prompt "Atmel AT91 Processor Devices for non DT boards" - -config ARCH_AT91_NONE - bool "None" - -config ARCH_AT91RM9200 - bool "AT91RM9200" - select SOC_AT91RM9200 - -config ARCH_AT91SAM9260 - bool "AT91SAM9260 or AT91SAM9XE" - select SOC_AT91SAM9260 - -config ARCH_AT91SAM9261 - bool "AT91SAM9261" - select SOC_AT91SAM9261 - -config ARCH_AT91SAM9G10 - bool "AT91SAM9G10" - select SOC_AT91SAM9261 - -config ARCH_AT91SAM9263 - bool "AT91SAM9263" - select SOC_AT91SAM9263 - -config ARCH_AT91SAM9RL - bool "AT91SAM9RL" - select SOC_AT91SAM9RL - -config ARCH_AT91SAM9G20 - bool "AT91SAM9G20" - select SOC_AT91SAM9260 - -config ARCH_AT91SAM9G45 - bool "AT91SAM9G45" - select SOC_AT91SAM9G45 - -config ARCH_AT91X40 - bool "AT91x40" - depends on !MMU - select ARCH_USES_GETTIMEOFFSET - select MULTI_IRQ_HANDLER - select SPARSE_IRQ - -endchoice - -config AT91_PMC_UNIT - bool - default !ARCH_AT91X40 - -# ---------------------------------------------------------- - -if ARCH_AT91RM9200 - -comment "AT91RM9200 Board Type" - -config MACH_ONEARM - bool "Ajeco 1ARM Single Board Computer" - help - Select this if you are using Ajeco's 1ARM Single Board Computer. - <http://www.ajeco.fi/> - -config ARCH_AT91RM9200DK - bool "Atmel AT91RM9200-DK Development board" - select HAVE_AT91_DATAFLASH_CARD - help - Select this if you are using Atmel's AT91RM9200-DK Development board. - (Discontinued) - -config MACH_AT91RM9200EK - bool "Atmel AT91RM9200-EK Evaluation Kit" - select HAVE_AT91_DATAFLASH_CARD - help - Select this if you are using Atmel's AT91RM9200-EK Evaluation Kit. - <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3507> - -config MACH_CSB337 - bool "Cogent CSB337" - help - Select this if you are using Cogent's CSB337 board. - <http://www.cogcomp.com/csb_csb337.htm> - -config MACH_CSB637 - bool "Cogent CSB637" - help - Select this if you are using Cogent's CSB637 board. - <http://www.cogcomp.com/csb_csb637.htm> - -config MACH_CARMEVA - bool "Conitec ARM&EVA" - help - Select this if you are using Conitec's AT91RM9200-MCU-Module. - <http://www.conitec.net/english/linuxboard.php> - -config MACH_ATEB9200 - bool "Embest ATEB9200" - help - Select this if you are using Embest's ATEB9200 board. - <http://www.embedinfo.com/english/product/ATEB9200.asp> - -config MACH_KB9200 - bool "KwikByte KB920x" - help - Select this if you are using KwikByte's KB920x board. - <http://www.kwikbyte.com/KB9202.html> - -config MACH_PICOTUX2XX - bool "picotux 200" - help - Select this if you are using a picotux 200. - <http://www.picotux.com/> - -config MACH_KAFA - bool "Sperry-Sun KAFA board" - help - Select this if you are using Sperry-Sun's KAFA board. - -config MACH_ECBAT91 - bool "emQbit ECB_AT91 SBC" - select HAVE_AT91_DATAFLASH_CARD - help - Select this if you are using emQbit's ECB_AT91 board. - <http://wiki.emqbit.com/free-ecb-at91> - -config MACH_YL9200 - bool "ucDragon YL-9200" - help - Select this if you are using the ucDragon YL-9200 board. - -config MACH_CPUAT91 - bool "Eukrea CPUAT91" - help - Select this if you are using the Eukrea Electromatique's - CPUAT91 board <http://www.eukrea.com/>. - -config MACH_ECO920 - bool "eco920" - help - Select this if you are using the eco920 board - -config MACH_RSI_EWS - bool "RSI Embedded Webserver" - depends on ARCH_AT91RM9200 - help - Select this if you are using RSIs EWS board. -endif - -# ---------------------------------------------------------- - -if ARCH_AT91SAM9260 - -comment "AT91SAM9260 Variants" - -comment "AT91SAM9260 / AT91SAM9XE Board Type" - -config MACH_AT91SAM9260EK - bool "Atmel AT91SAM9260-EK / AT91SAM9XE Evaluation Kit" - select HAVE_AT91_DATAFLASH_CARD - help - Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit - <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933> - -config MACH_CAM60 - bool "KwikByte KB9260 (CAM60) board" - help - Select this if you are using KwikByte's KB9260 (CAM60) board based on the Atmel AT91SAM9260. - <http://www.kwikbyte.com/KB9260.html> - -config MACH_SAM9_L9260 - bool "Olimex SAM9-L9260 board" - select HAVE_AT91_DATAFLASH_CARD - help - Select this if you are using Olimex's SAM9-L9260 board based on the Atmel AT91SAM9260. - <http://www.olimex.com/dev/sam9-L9260.html> - -config MACH_AFEB9260 - bool "Custom afeb9260 board v1" - help - Select this if you are using custom afeb9260 board based on - open hardware design. Select this for revision 1 of the board. - <svn://194.85.238.22/home/users/george/svn/arm9eb> - <http://groups.google.com/group/arm9fpga-evolution-board> - -config MACH_USB_A9260 - bool "CALAO USB-A9260" - help - Select this if you are using a Calao Systems USB-A9260. - <http://www.calao-systems.com> - -config MACH_QIL_A9260 - bool "CALAO QIL-A9260 board" - help - Select this if you are using a Calao Systems QIL-A9260 Board. - <http://www.calao-systems.com> - -config MACH_CPU9260 - bool "Eukrea CPU9260 board" - help - Select this if you are using a Eukrea Electromatique's - CPU9260 Board <http://www.eukrea.com/> - -config MACH_FLEXIBITY - bool "Flexibity Connect board" - help - Select this if you are using Flexibity Connect board - <http://www.flexibity.com> - -endif - -# ---------------------------------------------------------- - -if ARCH_AT91SAM9261 - -comment "AT91SAM9261 Board Type" - -config MACH_AT91SAM9261EK - bool "Atmel AT91SAM9261-EK Evaluation Kit" - select HAVE_AT91_DATAFLASH_CARD - help - Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit. - <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820> - -endif - -# ---------------------------------------------------------- - -if ARCH_AT91SAM9G10 - -comment "AT91SAM9G10 Board Type" - -config MACH_AT91SAM9G10EK - bool "Atmel AT91SAM9G10-EK Evaluation Kit" - select HAVE_AT91_DATAFLASH_CARD - help - Select this if you are using Atmel's AT91SAM9G10-EK Evaluation Kit. - <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4588> - -endif - -# ---------------------------------------------------------- - -if ARCH_AT91SAM9263 - -comment "AT91SAM9263 Board Type" - -config MACH_AT91SAM9263EK - bool "Atmel AT91SAM9263-EK Evaluation Kit" - select HAVE_AT91_DATAFLASH_CARD - help - Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit. - <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057> - -config MACH_USB_A9263 - bool "CALAO USB-A9263" - help - Select this if you are using a Calao Systems USB-A9263. - <http://www.calao-systems.com> - -endif - -# ---------------------------------------------------------- - -if ARCH_AT91SAM9RL - -comment "AT91SAM9RL Board Type" - -config MACH_AT91SAM9RLEK - bool "Atmel AT91SAM9RL-EK Evaluation Kit" - help - Select this if you are using Atmel's AT91SAM9RL-EK Evaluation Kit. - -endif - # ---------------------------------------------------------- -if ARCH_AT91SAM9G20 - -comment "AT91SAM9G20 Board Type" - -config MACH_AT91SAM9G20EK - bool "Atmel AT91SAM9G20-EK Evaluation Kit" - select HAVE_AT91_DATAFLASH_CARD - help - Select this if you are using Atmel's AT91SAM9G20-EK Evaluation Kit - that embeds only one SD/MMC slot. - -config MACH_AT91SAM9G20EK_2MMC - depends on MACH_AT91SAM9G20EK - bool "Atmel AT91SAM9G20-EK Evaluation Kit with 2 SD/MMC Slots" - help - Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit - with 2 SD/MMC Slots. This is the case for AT91SAM9G20-EK rev. C and - onwards. - <http://www.atmel.com/tools/SAM9G20-EK.aspx> - -config MACH_CPU9G20 - bool "Eukrea CPU9G20 board" - help - Select this if you are using a Eukrea Electromatique's - CPU9G20 Board <http://www.eukrea.com/> - -config MACH_ACMENETUSFOXG20 - bool "Acme Systems srl FOX Board G20" - help - Select this if you are using Acme Systems - FOX Board G20 <http://www.acmesystems.it> - -config MACH_PORTUXG20 - bool "taskit PortuxG20" - help - Select this if you are using taskit's PortuxG20. - <http://www.taskit.de/en/> - -config MACH_STAMP9G20 - bool "taskit Stamp9G20 CPU module" - help - Select this if you are using taskit's Stamp9G20 CPU module on its - evaluation board. - <http://www.taskit.de/en/> - -config MACH_PCONTROL_G20 - bool "PControl G20 CPU module" - help - Select this if you are using taskit's Stamp9G20 CPU module on this - carrier board, beeing the decentralized unit of a building automation - system; featuring nvram, eth-switch, iso-rs485, display, io - -config MACH_GSIA18S - bool "GS_IA18_S board" - help - This enables support for the GS_IA18_S board - produced by GeoSIG Ltd company. This is an internet accelerograph. - <http://www.geosig.com> - -config MACH_USB_A9G20 - bool "CALAO USB-A9G20" - depends on ARCH_AT91SAM9G20 - help - Select this if you are using a Calao Systems USB-A9G20. - <http://www.calao-systems.com> - -endif - -if (ARCH_AT91SAM9260 || ARCH_AT91SAM9G20) -comment "AT91SAM9260/AT91SAM9G20 boards" - -config MACH_SNAPPER_9260 - bool "Bluewater Systems Snapper 9260/9G20 module" - help - Select this if you are using the Bluewater Systems Snapper 9260 or - Snapper 9G20 modules. - <http://www.bluewatersys.com/> -endif - -# ---------------------------------------------------------- - -if ARCH_AT91SAM9G45 - -comment "AT91SAM9G45 Board Type" - -config MACH_AT91SAM9M10G45EK - bool "Atmel AT91SAM9M10G45-EK Evaluation Kits" - help - Select this if you are using Atmel's AT91SAM9M10G45-EK Evaluation Kit. - Those boards can be populated with any SoC of AT91SAM9G45 or AT91SAM9M10 - families: AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11. - <http://www.atmel.com/tools/SAM9M10-G45-EK.aspx> - -endif - -# ---------------------------------------------------------- - -if ARCH_AT91X40 - -comment "AT91X40 Board Type" - -config MACH_AT91EB01 - bool "Atmel AT91EB01 Evaluation Kit" - help - Select this if you are using Atmel's AT91EB01 Evaluation Kit. - It is also a popular target for simulators such as GDB's - ARM simulator (commonly known as the ARMulator) and the - Skyeye simulator. - -endif - -# ---------------------------------------------------------- +source arch/arm/mach-at91/Kconfig.non_dt +endif # SOC_SAM_V4_V5 comment "Generic Board Type" @@ -492,7 +151,7 @@ config MACH_AT91RM9200_DT Select this if you want to experiment device-tree with an Atmel RM9200 Evaluation Kit. -config MACH_AT91SAM_DT +config MACH_AT91SAM9_DT bool "Atmel AT91SAM Evaluation Kits with device-tree support" depends on SOC_AT91SAM9 select USE_OF @@ -500,15 +159,13 @@ config MACH_AT91SAM_DT Select this if you want to experiment device-tree with an Atmel Evaluation Kit. -# ---------------------------------------------------------- - -comment "AT91 Board Options" - -config MTD_AT91_DATAFLASH_CARD - bool "Enable DataFlash Card support" - depends on HAVE_AT91_DATAFLASH_CARD +config MACH_SAMA5_DT + bool "Atmel SAMA5 Evaluation Kits with device-tree support" + depends on SOC_SAMA5 + select USE_OF help - Enable support for the DataFlash card. + Select this if you want to experiment device-tree with + an Atmel Evaluation Kit. # ---------------------------------------------------------- diff --git a/arch/arm/mach-at91/Kconfig.non_dt b/arch/arm/mach-at91/Kconfig.non_dt new file mode 100644 index 000000000000..6c24985515a2 --- /dev/null +++ b/arch/arm/mach-at91/Kconfig.non_dt @@ -0,0 +1,399 @@ +menu "Atmel Non-DT world" + +config HAVE_AT91_DATAFLASH_CARD + bool + +choice + prompt "Atmel AT91 Processor Devices for non DT boards" + +config ARCH_AT91_NONE + bool "None" + +config ARCH_AT91RM9200 + bool "AT91RM9200" + select SOC_AT91RM9200 + +config ARCH_AT91SAM9260 + bool "AT91SAM9260 or AT91SAM9XE" + select SOC_AT91SAM9260 + +config ARCH_AT91SAM9261 + bool "AT91SAM9261" + select SOC_AT91SAM9261 + +config ARCH_AT91SAM9G10 + bool "AT91SAM9G10" + select SOC_AT91SAM9261 + +config ARCH_AT91SAM9263 + bool "AT91SAM9263" + select SOC_AT91SAM9263 + +config ARCH_AT91SAM9RL + bool "AT91SAM9RL" + select SOC_AT91SAM9RL + +config ARCH_AT91SAM9G20 + bool "AT91SAM9G20" + select SOC_AT91SAM9260 + +config ARCH_AT91SAM9G45 + bool "AT91SAM9G45" + select SOC_AT91SAM9G45 + +config ARCH_AT91X40 + bool "AT91x40" + depends on !MMU + select ARCH_USES_GETTIMEOFFSET + select MULTI_IRQ_HANDLER + select SPARSE_IRQ + +endchoice + +# ---------------------------------------------------------- + +if ARCH_AT91RM9200 + +comment "AT91RM9200 Board Type" + +config MACH_ONEARM + bool "Ajeco 1ARM Single Board Computer" + help + Select this if you are using Ajeco's 1ARM Single Board Computer. + <http://www.ajeco.fi/> + +config ARCH_AT91RM9200DK + bool "Atmel AT91RM9200-DK Development board" + select HAVE_AT91_DATAFLASH_CARD + help + Select this if you are using Atmel's AT91RM9200-DK Development board. + (Discontinued) + +config MACH_AT91RM9200EK + bool "Atmel AT91RM9200-EK Evaluation Kit" + select HAVE_AT91_DATAFLASH_CARD + help + Select this if you are using Atmel's AT91RM9200-EK Evaluation Kit. + <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3507> + +config MACH_CSB337 + bool "Cogent CSB337" + help + Select this if you are using Cogent's CSB337 board. + <http://www.cogcomp.com/csb_csb337.htm> + +config MACH_CSB637 + bool "Cogent CSB637" + help + Select this if you are using Cogent's CSB637 board. + <http://www.cogcomp.com/csb_csb637.htm> + +config MACH_CARMEVA + bool "Conitec ARM&EVA" + help + Select this if you are using Conitec's AT91RM9200-MCU-Module. + <http://www.conitec.net/english/linuxboard.php> + +config MACH_ATEB9200 + bool "Embest ATEB9200" + help + Select this if you are using Embest's ATEB9200 board. + <http://www.embedinfo.com/english/product/ATEB9200.asp> + +config MACH_KB9200 + bool "KwikByte KB920x" + help + Select this if you are using KwikByte's KB920x board. + <http://www.kwikbyte.com/KB9202.html> + +config MACH_PICOTUX2XX + bool "picotux 200" + help + Select this if you are using a picotux 200. + <http://www.picotux.com/> + +config MACH_KAFA + bool "Sperry-Sun KAFA board" + help + Select this if you are using Sperry-Sun's KAFA board. + +config MACH_ECBAT91 + bool "emQbit ECB_AT91 SBC" + select HAVE_AT91_DATAFLASH_CARD + help + Select this if you are using emQbit's ECB_AT91 board. + <http://wiki.emqbit.com/free-ecb-at91> + +config MACH_YL9200 + bool "ucDragon YL-9200" + help + Select this if you are using the ucDragon YL-9200 board. + +config MACH_CPUAT91 + bool "Eukrea CPUAT91" + help + Select this if you are using the Eukrea Electromatique's + CPUAT91 board <http://www.eukrea.com/>. + +config MACH_ECO920 + bool "eco920" + help + Select this if you are using the eco920 board + +config MACH_RSI_EWS + bool "RSI Embedded Webserver" + depends on ARCH_AT91RM9200 + help + Select this if you are using RSIs EWS board. +endif + +# ---------------------------------------------------------- + +if ARCH_AT91SAM9260 + +comment "AT91SAM9260 Variants" + +comment "AT91SAM9260 / AT91SAM9XE Board Type" + +config MACH_AT91SAM9260EK + bool "Atmel AT91SAM9260-EK / AT91SAM9XE Evaluation Kit" + select HAVE_AT91_DATAFLASH_CARD + help + Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit + <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933> + +config MACH_CAM60 + bool "KwikByte KB9260 (CAM60) board" + help + Select this if you are using KwikByte's KB9260 (CAM60) board based on the Atmel AT91SAM9260. + <http://www.kwikbyte.com/KB9260.html> + +config MACH_SAM9_L9260 + bool "Olimex SAM9-L9260 board" + select HAVE_AT91_DATAFLASH_CARD + help + Select this if you are using Olimex's SAM9-L9260 board based on the Atmel AT91SAM9260. + <http://www.olimex.com/dev/sam9-L9260.html> + +config MACH_AFEB9260 + bool "Custom afeb9260 board v1" + help + Select this if you are using custom afeb9260 board based on + open hardware design. Select this for revision 1 of the board. + <svn://194.85.238.22/home/users/george/svn/arm9eb> + <http://groups.google.com/group/arm9fpga-evolution-board> + +config MACH_USB_A9260 + bool "CALAO USB-A9260" + help + Select this if you are using a Calao Systems USB-A9260. + <http://www.calao-systems.com> + +config MACH_QIL_A9260 + bool "CALAO QIL-A9260 board" + help + Select this if you are using a Calao Systems QIL-A9260 Board. + <http://www.calao-systems.com> + +config MACH_CPU9260 + bool "Eukrea CPU9260 board" + help + Select this if you are using a Eukrea Electromatique's + CPU9260 Board <http://www.eukrea.com/> + +config MACH_FLEXIBITY + bool "Flexibity Connect board" + help + Select this if you are using Flexibity Connect board + <http://www.flexibity.com> + +endif + +# ---------------------------------------------------------- + +if ARCH_AT91SAM9261 + +comment "AT91SAM9261 Board Type" + +config MACH_AT91SAM9261EK + bool "Atmel AT91SAM9261-EK Evaluation Kit" + select HAVE_AT91_DATAFLASH_CARD + help + Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit. + <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820> + +endif + +# ---------------------------------------------------------- + +if ARCH_AT91SAM9G10 + +comment "AT91SAM9G10 Board Type" + +config MACH_AT91SAM9G10EK + bool "Atmel AT91SAM9G10-EK Evaluation Kit" + select HAVE_AT91_DATAFLASH_CARD + help + Select this if you are using Atmel's AT91SAM9G10-EK Evaluation Kit. + <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4588> + +endif + +# ---------------------------------------------------------- + +if ARCH_AT91SAM9263 + +comment "AT91SAM9263 Board Type" + +config MACH_AT91SAM9263EK + bool "Atmel AT91SAM9263-EK Evaluation Kit" + select HAVE_AT91_DATAFLASH_CARD + help + Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit. + <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057> + +config MACH_USB_A9263 + bool "CALAO USB-A9263" + help + Select this if you are using a Calao Systems USB-A9263. + <http://www.calao-systems.com> + +endif + +# ---------------------------------------------------------- + +if ARCH_AT91SAM9RL + +comment "AT91SAM9RL Board Type" + +config MACH_AT91SAM9RLEK + bool "Atmel AT91SAM9RL-EK Evaluation Kit" + help + Select this if you are using Atmel's AT91SAM9RL-EK Evaluation Kit. + +endif + +# ---------------------------------------------------------- + +if ARCH_AT91SAM9G20 + +comment "AT91SAM9G20 Board Type" + +config MACH_AT91SAM9G20EK + bool "Atmel AT91SAM9G20-EK Evaluation Kit" + select HAVE_AT91_DATAFLASH_CARD + help + Select this if you are using Atmel's AT91SAM9G20-EK Evaluation Kit + that embeds only one SD/MMC slot. + +config MACH_AT91SAM9G20EK_2MMC + depends on MACH_AT91SAM9G20EK + bool "Atmel AT91SAM9G20-EK Evaluation Kit with 2 SD/MMC Slots" + help + Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit + with 2 SD/MMC Slots. This is the case for AT91SAM9G20-EK rev. C and + onwards. + <http://www.atmel.com/tools/SAM9G20-EK.aspx> + +config MACH_CPU9G20 + bool "Eukrea CPU9G20 board" + help + Select this if you are using a Eukrea Electromatique's + CPU9G20 Board <http://www.eukrea.com/> + +config MACH_ACMENETUSFOXG20 + bool "Acme Systems srl FOX Board G20" + help + Select this if you are using Acme Systems + FOX Board G20 <http://www.acmesystems.it> + +config MACH_PORTUXG20 + bool "taskit PortuxG20" + help + Select this if you are using taskit's PortuxG20. + <http://www.taskit.de/en/> + +config MACH_STAMP9G20 + bool "taskit Stamp9G20 CPU module" + help + Select this if you are using taskit's Stamp9G20 CPU module on its + evaluation board. + <http://www.taskit.de/en/> + +config MACH_PCONTROL_G20 + bool "PControl G20 CPU module" + help + Select this if you are using taskit's Stamp9G20 CPU module on this + carrier board, beeing the decentralized unit of a building automation + system; featuring nvram, eth-switch, iso-rs485, display, io + +config MACH_GSIA18S + bool "GS_IA18_S board" + help + This enables support for the GS_IA18_S board + produced by GeoSIG Ltd company. This is an internet accelerograph. + <http://www.geosig.com> + +config MACH_USB_A9G20 + bool "CALAO USB-A9G20" + depends on ARCH_AT91SAM9G20 + help + Select this if you are using a Calao Systems USB-A9G20. + <http://www.calao-systems.com> + +endif + +if (ARCH_AT91SAM9260 || ARCH_AT91SAM9G20) +comment "AT91SAM9260/AT91SAM9G20 boards" + +config MACH_SNAPPER_9260 + bool "Bluewater Systems Snapper 9260/9G20 module" + help + Select this if you are using the Bluewater Systems Snapper 9260 or + Snapper 9G20 modules. + <http://www.bluewatersys.com/> +endif + +# ---------------------------------------------------------- + +if ARCH_AT91SAM9G45 + +comment "AT91SAM9G45 Board Type" + +config MACH_AT91SAM9M10G45EK + bool "Atmel AT91SAM9M10G45-EK Evaluation Kits" + help + Select this if you are using Atmel's AT91SAM9M10G45-EK Evaluation Kit. + Those boards can be populated with any SoC of AT91SAM9G45 or AT91SAM9M10 + families: AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11. + <http://www.atmel.com/tools/SAM9M10-G45-EK.aspx> + +endif + +# ---------------------------------------------------------- + +if ARCH_AT91X40 + +comment "AT91X40 Board Type" + +config MACH_AT91EB01 + bool "Atmel AT91EB01 Evaluation Kit" + help + Select this if you are using Atmel's AT91EB01 Evaluation Kit. + It is also a popular target for simulators such as GDB's + ARM simulator (commonly known as the ARMulator) and the + Skyeye simulator. + +endif + +# ---------------------------------------------------------- + +comment "AT91 Board Options" + +config MTD_AT91_DATAFLASH_CARD + bool "Enable DataFlash Card support" + depends on HAVE_AT91_DATAFLASH_CARD + help + Enable support for the DataFlash card. + +endmenu diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 39218ca6d8e8..788562dccb43 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -10,7 +10,8 @@ obj- := obj-$(CONFIG_AT91_PMC_UNIT) += clock.o obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o -obj-$(CONFIG_SOC_AT91SAM9) += at91sam926x_time.o sam9_smc.o +obj-$(CONFIG_AT91_SAM9_TIME) += at91sam926x_time.o +obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o # CPU-specific support obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o at91rm9200_time.o @@ -21,6 +22,7 @@ obj-$(CONFIG_SOC_AT91SAM9G45) += at91sam9g45.o obj-$(CONFIG_SOC_AT91SAM9N12) += at91sam9n12.o obj-$(CONFIG_SOC_AT91SAM9X5) += at91sam9x5.o obj-$(CONFIG_SOC_AT91SAM9RL) += at91sam9rl.o +obj-$(CONFIG_SOC_SAMA5D3) += sama5d3.o obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200_devices.o obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260_devices.o @@ -87,8 +89,11 @@ obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o # AT91SAM board with device-tree -obj-$(CONFIG_MACH_AT91RM9200_DT) += board-rm9200-dt.o -obj-$(CONFIG_MACH_AT91SAM_DT) += board-dt.o +obj-$(CONFIG_MACH_AT91RM9200_DT) += board-dt-rm9200.o +obj-$(CONFIG_MACH_AT91SAM9_DT) += board-dt-sam9.o + +# SAMA5 board with device-tree +obj-$(CONFIG_MACH_SAMA5_DT) += board-dt-sama5.o # AT91X40 board-specific support obj-$(CONFIG_MACH_AT91EB01) += board-eb01.o diff --git a/arch/arm/mach-at91/at91_rstc.h b/arch/arm/mach-at91/at91_rstc.h index 875fa336800b..a600e6992920 100644 --- a/arch/arm/mach-at91/at91_rstc.h +++ b/arch/arm/mach-at91/at91_rstc.h @@ -23,7 +23,7 @@ extern void __iomem *at91_rstc_base; __raw_readl(at91_rstc_base + field) #define at91_rstc_write(field, value) \ - __raw_writel(value, at91_rstc_base + field); + __raw_writel(value, at91_rstc_base + field) #else .extern at91_rstc_base #endif diff --git a/arch/arm/mach-at91/at91_shdwc.h b/arch/arm/mach-at91/at91_shdwc.h index 60478ea8bd46..9e29f31ec9a6 100644 --- a/arch/arm/mach-at91/at91_shdwc.h +++ b/arch/arm/mach-at91/at91_shdwc.h @@ -23,7 +23,7 @@ extern void __iomem *at91_shdwc_base; __raw_readl(at91_shdwc_base + field) #define at91_shdwc_write(field, value) \ - __raw_writel(value, at91_shdwc_base + field); + __raw_writel(value, at91_shdwc_base + field) #endif #define AT91_SHDW_CR 0x00 /* Shut Down Control Register */ diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index 9706c000f294..d193a409bc45 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c @@ -212,6 +212,7 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("t2_clk", "fffa4000.timer", &tc5_clk), CLKDEV_CON_DEV_ID("mci_clk", "fffb4000.mmc", &mmc_clk), CLKDEV_CON_DEV_ID("emac_clk", "fffbc000.ethernet", ðer_clk), + CLKDEV_CON_DEV_ID(NULL, "fffb8000.i2c", &twi_clk), CLKDEV_CON_DEV_ID("hclk", "300000.ohci", &ohci_clk), CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk), CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk), @@ -384,7 +385,7 @@ static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = { 0 /* Advanced Interrupt Controller (IRQ6) */ }; -AT91_SOC_START(rm9200) +AT91_SOC_START(at91rm9200) .map_io = at91rm9200_map_io, .default_irq_priority = at91rm9200_default_irq_priority, .ioremap_registers = at91rm9200_ioremap_registers, diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index b67cd5374117..a8ce24538da6 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c @@ -232,6 +232,8 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("t2_clk", "fffdc000.timer", &tc5_clk), CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk), CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk), + CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk), + CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk), /* fake hclk clock */ CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), CLKDEV_CON_ID("pioA", &pioA_clk), @@ -395,7 +397,7 @@ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = { 0, /* Advanced Interrupt Controller */ }; -AT91_SOC_START(sam9260) +AT91_SOC_START(at91sam9260) .map_io = at91sam9260_map_io, .default_irq_priority = at91sam9260_default_irq_priority, .ioremap_registers = at91sam9260_ioremap_registers, diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 2998a08afc2d..ac7a341bd0ff 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c @@ -337,7 +337,7 @@ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = { 0, /* Advanced Interrupt Controller */ }; -AT91_SOC_START(sam9261) +AT91_SOC_START(at91sam9261) .map_io = at91sam9261_map_io, .default_irq_priority = at91sam9261_default_irq_priority, .ioremap_registers = at91sam9261_ioremap_registers, diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index b9fc60d1b33a..8e2d9f4a9a45 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c @@ -374,7 +374,7 @@ static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = { 0, /* Advanced Interrupt Controller (IRQ1) */ }; -AT91_SOC_START(sam9263) +AT91_SOC_START(at91sam9263) .map_io = at91sam9263_map_io, .default_irq_priority = at91sam9263_default_irq_priority, .ioremap_registers = at91sam9263_ioremap_registers, diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index d3addee43d8d..a6c224fc9542 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c @@ -262,6 +262,8 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("mci_clk", "fffd0000.mmc", &mmc1_clk), CLKDEV_CON_DEV_ID(NULL, "fff84000.i2c", &twi0_clk), CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk), + CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk), + CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk), /* fake hclk clock */ CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk), CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk), @@ -418,7 +420,7 @@ static unsigned int at91sam9g45_default_irq_priority[NR_AIC_IRQS] __initdata = { 0, /* Advanced Interrupt Controller (IRQ0) */ }; -AT91_SOC_START(sam9g45) +AT91_SOC_START(at91sam9g45) .map_io = at91sam9g45_map_io, .default_irq_priority = at91sam9g45_default_irq_priority, .ioremap_registers = at91sam9g45_ioremap_registers, diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index 827c9f2a70fb..f0bf68268ca2 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c @@ -18,7 +18,7 @@ #include <linux/platform_device.h> #include <linux/i2c-gpio.h> #include <linux/atmel-mci.h> -#include <linux/platform_data/atmel-aes.h> +#include <linux/platform_data/crypto-atmel.h> #include <linux/platform_data/at91_adc.h> @@ -1900,7 +1900,8 @@ static void __init at91_add_device_tdes(void) {} * -------------------------------------------------------------------- */ #if defined(CONFIG_CRYPTO_DEV_ATMEL_AES) || defined(CONFIG_CRYPTO_DEV_ATMEL_AES_MODULE) -static struct aes_platform_data aes_data; +static struct crypto_platform_data aes_data; +static struct crypto_dma_data alt_atslave; static u64 aes_dmamask = DMA_BIT_MASK(32); static struct resource aes_resources[] = { @@ -1931,23 +1932,20 @@ static struct platform_device at91sam9g45_aes_device = { static void __init at91_add_device_aes(void) { struct at_dma_slave *atslave; - struct aes_dma_data *alt_atslave; - - alt_atslave = kzalloc(sizeof(struct aes_dma_data), GFP_KERNEL); /* DMA TX slave channel configuration */ - atslave = &alt_atslave->txdata; + atslave = &alt_atslave.txdata; atslave->dma_dev = &at_hdmac_device.dev; atslave->cfg = ATC_FIFOCFG_ENOUGHSPACE | ATC_SRC_H2SEL_HW | ATC_SRC_PER(AT_DMA_ID_AES_RX); /* DMA RX slave channel configuration */ - atslave = &alt_atslave->rxdata; + atslave = &alt_atslave.rxdata; atslave->dma_dev = &at_hdmac_device.dev; atslave->cfg = ATC_FIFOCFG_ENOUGHSPACE | ATC_DST_H2SEL_HW | ATC_DST_PER(AT_DMA_ID_AES_TX); - aes_data.dma_slave = alt_atslave; + aes_data.dma_slave = &alt_atslave; platform_device_register(&at91sam9g45_aes_device); } #else diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c index 5dfc8fd87103..13cdbcd48f51 100644 --- a/arch/arm/mach-at91/at91sam9n12.c +++ b/arch/arm/mach-at91/at91sam9n12.c @@ -172,6 +172,8 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma_clk), CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk), CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk), + CLKDEV_CON_DEV_ID("spi_clk", "f0000000.spi", &spi0_clk), + CLKDEV_CON_DEV_ID("spi_clk", "f0004000.spi", &spi1_clk), CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk), CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk), CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk), @@ -226,7 +228,7 @@ void __init at91sam9n12_initialize(void) at91_extern_irq = (1 << AT91SAM9N12_ID_IRQ0); } -AT91_SOC_START(sam9n12) +AT91_SOC_START(at91sam9n12) .map_io = at91sam9n12_map_io, .register_clocks = at91sam9n12_register_clocks, .init = at91sam9n12_initialize, diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index eb98704db2d9..c39600764236 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c @@ -340,7 +340,7 @@ static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = { 0, /* Advanced Interrupt Controller */ }; -AT91_SOC_START(sam9rl) +AT91_SOC_START(at91sam9rl) .map_io = at91sam9rl_map_io, .default_irq_priority = at91sam9rl_default_irq_priority, .ioremap_registers = at91sam9rl_ioremap_registers, diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c index 44a9a62dcc13..e631fec040ce 100644 --- a/arch/arm/mach-at91/at91sam9x5.c +++ b/arch/arm/mach-at91/at91sam9x5.c @@ -237,6 +237,8 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk), CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk), CLKDEV_CON_DEV_ID(NULL, "f8018000.i2c", &twi2_clk), + CLKDEV_CON_DEV_ID("spi_clk", "f0000000.spi", &spi0_clk), + CLKDEV_CON_DEV_ID("spi_clk", "f0004000.spi", &spi1_clk), CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk), CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk), CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk), @@ -320,7 +322,7 @@ static void __init at91sam9x5_map_io(void) * Interrupt initialization * -------------------------------------------------------------------- */ -AT91_SOC_START(sam9x5) +AT91_SOC_START(at91sam9x5) .map_io = at91sam9x5_map_io, .register_clocks = at91sam9x5_register_clocks, AT91_SOC_END diff --git a/arch/arm/mach-at91/at91x40_time.c b/arch/arm/mach-at91/at91x40_time.c index 0c07a4459cb2..2919eba41ff4 100644 --- a/arch/arm/mach-at91/at91x40_time.c +++ b/arch/arm/mach-at91/at91x40_time.c @@ -33,7 +33,7 @@ __raw_readl(AT91_IO_P2V(AT91_TC) + field) #define at91_tc_write(field, value) \ - __raw_writel(value, AT91_IO_P2V(AT91_TC) + field); + __raw_writel(value, AT91_IO_P2V(AT91_TC) + field) /* * 3 counter/timer units present. diff --git a/arch/arm/mach-at91/board-rm9200-dt.c b/arch/arm/mach-at91/board-dt-rm9200.c index 3fcb6623a33e..3fcb6623a33e 100644 --- a/arch/arm/mach-at91/board-rm9200-dt.c +++ b/arch/arm/mach-at91/board-dt-rm9200.c diff --git a/arch/arm/mach-at91/board-dt.c b/arch/arm/mach-at91/board-dt-sam9.c index 8db30132abed..8db30132abed 100644 --- a/arch/arm/mach-at91/board-dt.c +++ b/arch/arm/mach-at91/board-dt-sam9.c diff --git a/arch/arm/mach-at91/board-dt-sama5.c b/arch/arm/mach-at91/board-dt-sama5.c new file mode 100644 index 000000000000..705305e62bbc --- /dev/null +++ b/arch/arm/mach-at91/board-dt-sama5.c @@ -0,0 +1,86 @@ +/* + * Setup code for SAMA5 Evaluation Kits with Device Tree support + * + * Copyright (C) 2013 Atmel, + * 2013 Ludovic Desroches <ludovic.desroches@atmel.com> + * + * Licensed under GPLv2 or later. + */ + +#include <linux/types.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/gpio.h> +#include <linux/micrel_phy.h> +#include <linux/of.h> +#include <linux/of_irq.h> +#include <linux/of_platform.h> +#include <linux/phy.h> + +#include <asm/setup.h> +#include <asm/irq.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/irq.h> + +#include "at91_aic.h" +#include "generic.h" + + +static const struct of_device_id irq_of_match[] __initconst = { + + { .compatible = "atmel,sama5d3-aic", .data = at91_aic5_of_init }, + { /*sentinel*/ } +}; + +static void __init at91_dt_init_irq(void) +{ + of_irq_init(irq_of_match); +} + +static int ksz9021rn_phy_fixup(struct phy_device *phy) +{ + int value; + +#define GMII_RCCPSR 260 +#define GMII_RRDPSR 261 +#define GMII_ERCR 11 +#define GMII_ERDWR 12 + + /* Set delay values */ + value = GMII_RCCPSR | 0x8000; + phy_write(phy, GMII_ERCR, value); + value = 0xF2F4; + phy_write(phy, GMII_ERDWR, value); + value = GMII_RRDPSR | 0x8000; + phy_write(phy, GMII_ERCR, value); + value = 0x2222; + phy_write(phy, GMII_ERDWR, value); + + return 0; +} + +static void __init sama5_dt_device_init(void) +{ + if (of_machine_is_compatible("atmel,sama5d3xcm")) + phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, + ksz9021rn_phy_fixup); + + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); +} + +static const char *sama5_dt_board_compat[] __initdata = { + "atmel,sama5", + NULL +}; + +DT_MACHINE_START(sama5_dt, "Atmel SAMA5 (Device Tree)") + /* Maintainer: Atmel */ + .init_time = at91sam926x_pit_init, + .map_io = at91_map_io, + .handle_irq = at91_aic5_handle_irq, + .init_early = at91_dt_initialize, + .init_irq = at91_dt_init_irq, + .init_machine = sama5_dt_device_init, + .dt_compat = sama5_dt_board_compat, +MACHINE_END diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index 33361505c0cd..da841885d01c 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c @@ -54,7 +54,10 @@ EXPORT_SYMBOL_GPL(at91_pmc_base); */ #define cpu_has_utmi() ( cpu_is_at91sam9rl() \ || cpu_is_at91sam9g45() \ - || cpu_is_at91sam9x5()) + || cpu_is_at91sam9x5() \ + || cpu_is_sama5d3()) + +#define cpu_has_1056M_plla() (cpu_is_sama5d3()) #define cpu_has_800M_plla() ( cpu_is_at91sam9g20() \ || cpu_is_at91sam9g45() \ @@ -75,7 +78,8 @@ EXPORT_SYMBOL_GPL(at91_pmc_base); || cpu_is_at91sam9n12())) #define cpu_has_upll() (cpu_is_at91sam9g45() \ - || cpu_is_at91sam9x5()) + || cpu_is_at91sam9x5() \ + || cpu_is_sama5d3()) /* USB host HS & FS */ #define cpu_has_uhp() (!cpu_is_at91sam9rl()) @@ -83,18 +87,22 @@ EXPORT_SYMBOL_GPL(at91_pmc_base); /* USB device FS only */ #define cpu_has_udpfs() (!(cpu_is_at91sam9rl() \ || cpu_is_at91sam9g45() \ - || cpu_is_at91sam9x5())) + || cpu_is_at91sam9x5() \ + || cpu_is_sama5d3())) #define cpu_has_plladiv2() (cpu_is_at91sam9g45() \ || cpu_is_at91sam9x5() \ - || cpu_is_at91sam9n12()) + || cpu_is_at91sam9n12() \ + || cpu_is_sama5d3()) #define cpu_has_mdiv3() (cpu_is_at91sam9g45() \ || cpu_is_at91sam9x5() \ - || cpu_is_at91sam9n12()) + || cpu_is_at91sam9n12() \ + || cpu_is_sama5d3()) #define cpu_has_alt_prescaler() (cpu_is_at91sam9x5() \ - || cpu_is_at91sam9n12()) + || cpu_is_at91sam9n12() \ + || cpu_is_sama5d3()) static LIST_HEAD(clocks); static DEFINE_SPINLOCK(clk_lock); @@ -210,10 +218,26 @@ struct clk mck = { static void pmc_periph_mode(struct clk *clk, int is_on) { - if (is_on) - at91_pmc_write(AT91_PMC_PCER, clk->pmc_mask); - else - at91_pmc_write(AT91_PMC_PCDR, clk->pmc_mask); + u32 regval = 0; + + /* + * With sama5d3 devices, we are managing clock division so we have to + * use the Peripheral Control Register introduced from at91sam9x5 + * devices. + */ + if (cpu_is_sama5d3()) { + regval |= AT91_PMC_PCR_CMD; /* write command */ + regval |= clk->pid & AT91_PMC_PCR_PID; /* peripheral selection */ + regval |= AT91_PMC_PCR_DIV(clk->div); + if (is_on) + regval |= AT91_PMC_PCR_EN; /* enable clock */ + at91_pmc_write(AT91_PMC_PCR, regval); + } else { + if (is_on) + at91_pmc_write(AT91_PMC_PCER, clk->pmc_mask); + else + at91_pmc_write(AT91_PMC_PCDR, clk->pmc_mask); + } } static struct clk __init *at91_css_to_clk(unsigned long css) @@ -443,14 +467,18 @@ static void __init init_programmable_clock(struct clk *clk) static int at91_clk_show(struct seq_file *s, void *unused) { - u32 scsr, pcsr, uckr = 0, sr; + u32 scsr, pcsr, pcsr1 = 0, uckr = 0, sr; struct clk *clk; scsr = at91_pmc_read(AT91_PMC_SCSR); pcsr = at91_pmc_read(AT91_PMC_PCSR); + if (cpu_is_sama5d3()) + pcsr1 = at91_pmc_read(AT91_PMC_PCSR1); sr = at91_pmc_read(AT91_PMC_SR); seq_printf(s, "SCSR = %8x\n", scsr); seq_printf(s, "PCSR = %8x\n", pcsr); + if (cpu_is_sama5d3()) + seq_printf(s, "PCSR1 = %8x\n", pcsr1); seq_printf(s, "MOR = %8x\n", at91_pmc_read(AT91_CKGR_MOR)); seq_printf(s, "MCFR = %8x\n", at91_pmc_read(AT91_CKGR_MCFR)); seq_printf(s, "PLLA = %8x\n", at91_pmc_read(AT91_CKGR_PLLAR)); @@ -470,20 +498,30 @@ static int at91_clk_show(struct seq_file *s, void *unused) list_for_each_entry(clk, &clocks, node) { char *state; - if (clk->mode == pmc_sys_mode) + if (clk->mode == pmc_sys_mode) { state = (scsr & clk->pmc_mask) ? "on" : "off"; - else if (clk->mode == pmc_periph_mode) - state = (pcsr & clk->pmc_mask) ? "on" : "off"; - else if (clk->mode == pmc_uckr_mode) + } else if (clk->mode == pmc_periph_mode) { + if (cpu_is_sama5d3()) { + u32 pmc_mask = 1 << (clk->pid % 32); + + if (clk->pid > 31) + state = (pcsr1 & pmc_mask) ? "on" : "off"; + else + state = (pcsr & pmc_mask) ? "on" : "off"; + } else { + state = (pcsr & clk->pmc_mask) ? "on" : "off"; + } + } else if (clk->mode == pmc_uckr_mode) { state = (uckr & clk->pmc_mask) ? "on" : "off"; - else if (clk->pmc_mask) + } else if (clk->pmc_mask) { state = (sr & clk->pmc_mask) ? "on" : "off"; - else if (clk == &clk32k || clk == &main_clk) + } else if (clk == &clk32k || clk == &main_clk) { state = "on"; - else + } else { state = ""; + } - seq_printf(s, "%-10s users=%2d %-3s %9ld Hz %s\n", + seq_printf(s, "%-10s users=%2d %-3s %9lu Hz %s\n", clk->name, clk->users, state, clk_get_rate(clk), clk->parent ? clk->parent->name : ""); } @@ -530,6 +568,9 @@ int __init clk_register(struct clk *clk) if (clk_is_peripheral(clk)) { if (!clk->parent) clk->parent = &mck; + if (cpu_is_sama5d3()) + clk->rate_hz = DIV_ROUND_UP(clk->parent->rate_hz, + 1 << clk->div); clk->mode = pmc_periph_mode; } else if (clk_is_sys(clk)) { @@ -555,7 +596,11 @@ static u32 __init at91_pll_rate(struct clk *pll, u32 freq, u32 reg) unsigned mul, div; div = reg & 0xff; - mul = (reg >> 16) & 0x7ff; + if (cpu_is_sama5d3()) + mul = AT91_PMC3_MUL_GET(reg); + else + mul = AT91_PMC_MUL_GET(reg); + if (div && mul) { freq /= div; freq *= mul + 1; @@ -706,12 +751,15 @@ static int __init at91_pmc_init(unsigned long main_clock) /* report if PLLA is more than mildly overclocked */ plla.rate_hz = at91_pll_rate(&plla, main_clock, at91_pmc_read(AT91_CKGR_PLLAR)); - if (cpu_has_300M_plla()) { - if (plla.rate_hz > 300000000) + if (cpu_has_1056M_plla()) { + if (plla.rate_hz > 1056000000) pll_overclock = true; } else if (cpu_has_800M_plla()) { if (plla.rate_hz > 800000000) pll_overclock = true; + } else if (cpu_has_300M_plla()) { + if (plla.rate_hz > 300000000) + pll_overclock = true; } else if (cpu_has_240M_plla()) { if (plla.rate_hz > 240000000) pll_overclock = true; @@ -872,6 +920,7 @@ int __init at91_clock_init(unsigned long main_clock) static int __init at91_clock_reset(void) { unsigned long pcdr = 0; + unsigned long pcdr1 = 0; unsigned long scdr = 0; struct clk *clk; @@ -879,8 +928,17 @@ static int __init at91_clock_reset(void) if (clk->users > 0) continue; - if (clk->mode == pmc_periph_mode) - pcdr |= clk->pmc_mask; + if (clk->mode == pmc_periph_mode) { + if (cpu_is_sama5d3()) { + u32 pmc_mask = 1 << (clk->pid % 32); + + if (clk->pid > 31) + pcdr1 |= pmc_mask; + else + pcdr |= pmc_mask; + } else + pcdr |= clk->pmc_mask; + } if (clk->mode == pmc_sys_mode) scdr |= clk->pmc_mask; @@ -888,8 +946,9 @@ static int __init at91_clock_reset(void) pr_debug("Clocks: disable unused %s\n", clk->name); } - at91_pmc_write(AT91_PMC_PCDR, pcdr); at91_pmc_write(AT91_PMC_SCDR, scdr); + if (cpu_is_sama5d3()) + at91_pmc_write(AT91_PMC_PCDR1, pcdr1); return 0; } diff --git a/arch/arm/mach-at91/clock.h b/arch/arm/mach-at91/clock.h index c2e63e47dcbe..a98a39bbd883 100644 --- a/arch/arm/mach-at91/clock.h +++ b/arch/arm/mach-at91/clock.h @@ -20,7 +20,9 @@ struct clk { const char *name; /* unique clock name */ struct clk_lookup cl; unsigned long rate_hz; + unsigned div; /* parent clock divider */ struct clk *parent; + unsigned pid; /* peripheral ID */ u32 pmc_mask; void (*mode)(struct clk *, int); unsigned id:3; /* PCK0..4, or 32k/main/a/b */ diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c index 0c6381516a5a..48f1228c611c 100644 --- a/arch/arm/mach-at91/cpuidle.c +++ b/arch/arm/mach-at91/cpuidle.c @@ -27,8 +27,6 @@ #define AT91_MAX_STATES 2 -static DEFINE_PER_CPU(struct cpuidle_device, at91_cpuidle_device); - /* Actual code that puts the SoC in different idle states */ static int at91_enter_idle(struct cpuidle_device *dev, struct cpuidle_driver *drv, @@ -47,7 +45,6 @@ static int at91_enter_idle(struct cpuidle_device *dev, static struct cpuidle_driver at91_idle_driver = { .name = "at91_idle", .owner = THIS_MODULE, - .en_core_tk_irqen = 1, .states[0] = ARM_CPUIDLE_WFI_STATE, .states[1] = { .enter = at91_enter_idle, @@ -61,20 +58,9 @@ static struct cpuidle_driver at91_idle_driver = { }; /* Initialize CPU idle by registering the idle states */ -static int at91_init_cpuidle(void) +static int __init at91_init_cpuidle(void) { - struct cpuidle_device *device; - - device = &per_cpu(at91_cpuidle_device, smp_processor_id()); - device->state_count = AT91_MAX_STATES; - - cpuidle_register_driver(&at91_idle_driver); - - if (cpuidle_register_device(device)) { - printk(KERN_ERR "at91_init_cpuidle: Failed registering\n"); - return -EIO; - } - return 0; + return cpuidle_register(&at91_idle_driver, NULL); } device_initcall(at91_init_cpuidle); diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index c5d7e1e9d757..a5afcf76550e 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c @@ -22,10 +22,9 @@ #include <linux/module.h> #include <linux/io.h> #include <linux/irqdomain.h> +#include <linux/irqchip/chained_irq.h> #include <linux/of_address.h> -#include <asm/mach/irq.h> - #include <mach/hardware.h> #include <mach/at91_pio.h> diff --git a/arch/arm/mach-at91/include/mach/at91_dbgu.h b/arch/arm/mach-at91/include/mach/at91_dbgu.h index 2aa0c5e13495..3b5948566e52 100644 --- a/arch/arm/mach-at91/include/mach/at91_dbgu.h +++ b/arch/arm/mach-at91/include/mach/at91_dbgu.h @@ -16,9 +16,6 @@ #ifndef AT91_DBGU_H #define AT91_DBGU_H -#define dbgu_readl(dbgu, field) \ - __raw_readl(AT91_VA_BASE_SYS + dbgu + AT91_DBGU_ ## field) - #if !defined(CONFIG_ARCH_AT91X40) #define AT91_DBGU_CR (0x00) /* Control Register */ #define AT91_DBGU_MR (0x04) /* Mode Register */ diff --git a/arch/arm/mach-at91/include/mach/at91_matrix.h b/arch/arm/mach-at91/include/mach/at91_matrix.h index 02fae9de746b..f8996c954131 100644 --- a/arch/arm/mach-at91/include/mach/at91_matrix.h +++ b/arch/arm/mach-at91/include/mach/at91_matrix.h @@ -14,7 +14,7 @@ extern void __iomem *at91_matrix_base; __raw_readl(at91_matrix_base + field) #define at91_matrix_write(field, value) \ - __raw_writel(value, at91_matrix_base + field); + __raw_writel(value, at91_matrix_base + field) #else .extern at91_matrix_base diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h index ea2c57a86ca6..31df12029c4e 100644 --- a/arch/arm/mach-at91/include/mach/at91_pmc.h +++ b/arch/arm/mach-at91/include/mach/at91_pmc.h @@ -75,6 +75,9 @@ extern void __iomem *at91_pmc_base; #define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */ #define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */ #define AT91_PMC_MUL (0x7ff << 16) /* PLL Multiplier */ +#define AT91_PMC_MUL_GET(n) ((n) >> 16 & 0x7ff) +#define AT91_PMC3_MUL (0x7f << 18) /* PLL Multiplier [SAMA5 only] */ +#define AT91_PMC3_MUL_GET(n) ((n) >> 18 & 0x7f) #define AT91_PMC_USBDIV (3 << 28) /* USB Divisor (PLLB only) */ #define AT91_PMC_USBDIV_1 (0 << 28) #define AT91_PMC_USBDIV_2 (1 << 28) @@ -167,11 +170,18 @@ extern void __iomem *at91_pmc_base; #define AT91_PMC_WPVS (0x1 << 0) /* Write Protect Violation Status */ #define AT91_PMC_WPVSRC (0xffff << 8) /* Write Protect Violation Source */ -#define AT91_PMC_PCR 0x10c /* Peripheral Control Register [some SAM9] */ +#define AT91_PMC_PCER1 0x100 /* Peripheral Clock Enable Register 1 [SAMA5 only]*/ +#define AT91_PMC_PCDR1 0x104 /* Peripheral Clock Enable Register 1 */ +#define AT91_PMC_PCSR1 0x108 /* Peripheral Clock Enable Register 1 */ + +#define AT91_PMC_PCR 0x10c /* Peripheral Control Register [some SAM9 and SAMA5] */ #define AT91_PMC_PCR_PID (0x3f << 0) /* Peripheral ID */ -#define AT91_PMC_PCR_CMD (0x1 << 12) /* Command */ -#define AT91_PMC_PCR_DIV (0x3 << 16) /* Divisor Value */ -#define AT91_PMC_PCRDIV(n) (((n) << 16) & AT91_PMC_PCR_DIV) +#define AT91_PMC_PCR_CMD (0x1 << 12) /* Command (read=0, write=1) */ +#define AT91_PMC_PCR_DIV(n) ((n) << 16) /* Divisor Value */ +#define AT91_PMC_PCR_DIV0 0x0 /* Peripheral clock is MCK */ +#define AT91_PMC_PCR_DIV2 0x2 /* Peripheral clock is MCK/2 */ +#define AT91_PMC_PCR_DIV4 0x4 /* Peripheral clock is MCK/4 */ +#define AT91_PMC_PCR_DIV8 0x8 /* Peripheral clock is MCK/8 */ #define AT91_PMC_PCR_EN (0x1 << 28) /* Enable */ #endif diff --git a/arch/arm/mach-at91/include/mach/at91_st.h b/arch/arm/mach-at91/include/mach/at91_st.h index 969aac27109f..67fdbd13c3ed 100644 --- a/arch/arm/mach-at91/include/mach/at91_st.h +++ b/arch/arm/mach-at91/include/mach/at91_st.h @@ -23,7 +23,7 @@ extern void __iomem *at91_st_base; __raw_readl(at91_st_base + field) #define at91_st_write(field, value) \ - __raw_writel(value, at91_st_base + field); + __raw_writel(value, at91_st_base + field) #else .extern at91_st_base #endif diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h index b6504c19d55c..0f3379fe645f 100644 --- a/arch/arm/mach-at91/include/mach/cpu.h +++ b/arch/arm/mach-at91/include/mach/cpu.h @@ -36,6 +36,8 @@ #define ARCH_ID_AT91M40807 0x14080745 #define ARCH_ID_AT91R40008 0x44000840 +#define ARCH_ID_SAMA5D3 0x8A5C07C0 + #define ARCH_EXID_AT91SAM9M11 0x00000001 #define ARCH_EXID_AT91SAM9M10 0x00000002 #define ARCH_EXID_AT91SAM9G46 0x00000003 @@ -47,6 +49,11 @@ #define ARCH_EXID_AT91SAM9G25 0x00000003 #define ARCH_EXID_AT91SAM9X25 0x00000004 +#define ARCH_EXID_SAMA5D31 0x00444300 +#define ARCH_EXID_SAMA5D33 0x00414300 +#define ARCH_EXID_SAMA5D34 0x00414301 +#define ARCH_EXID_SAMA5D35 0x00584300 + #define ARCH_FAMILY_AT91X92 0x09200000 #define ARCH_FAMILY_AT91SAM9 0x01900000 #define ARCH_FAMILY_AT91SAM9XE 0x02900000 @@ -75,6 +82,9 @@ enum at91_soc_type { /* SAM9N12 */ AT91_SOC_SAM9N12, + /* SAMA5D3 */ + AT91_SOC_SAMA5D3, + /* Unknown type */ AT91_SOC_NONE }; @@ -93,6 +103,10 @@ enum at91_soc_subtype { AT91_SOC_SAM9G15, AT91_SOC_SAM9G35, AT91_SOC_SAM9X35, AT91_SOC_SAM9G25, AT91_SOC_SAM9X25, + /* SAMA5D3 */ + AT91_SOC_SAMA5D31, AT91_SOC_SAMA5D33, AT91_SOC_SAMA5D34, + AT91_SOC_SAMA5D35, + /* Unknown subtype */ AT91_SOC_SUBTYPE_NONE }; @@ -187,6 +201,12 @@ static inline int at91_soc_is_detected(void) #define cpu_is_at91sam9n12() (0) #endif +#ifdef CONFIG_SOC_SAMA5D3 +#define cpu_is_sama5d3() (at91_soc_initdata.type == AT91_SOC_SAMA5D3) +#else +#define cpu_is_sama5d3() (0) +#endif + /* * Since this is ARM, we will never run on any AVR32 CPU. But these * definitions may reduce clutter in common drivers. diff --git a/arch/arm/mach-at91/include/mach/sama5d3.h b/arch/arm/mach-at91/include/mach/sama5d3.h new file mode 100644 index 000000000000..6dc81ee38048 --- /dev/null +++ b/arch/arm/mach-at91/include/mach/sama5d3.h @@ -0,0 +1,73 @@ +/* + * Chip-specific header file for the SAMA5D3 family + * + * Copyright (C) 2013 Atmel, + * 2013 Ludovic Desroches <ludovic.desroches@atmel.com> + * + * Common definitions. + * Based on SAMA5D3 datasheet. + * + * Licensed under GPLv2 or later. + */ + +#ifndef SAMA5D3_H +#define SAMA5D3_H + +/* + * Peripheral identifiers/interrupts. + */ +#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ +#define AT91_ID_SYS 1 /* System Peripherals */ +#define SAMA5D3_ID_DBGU 2 /* debug Unit (usually no special interrupt line) */ +#define AT91_ID_PIT 3 /* PIT */ +#define SAMA5D3_ID_WDT 4 /* Watchdog Timer Interrupt */ +#define SAMA5D3_ID_HSMC 5 /* Static Memory Controller */ +#define SAMA5D3_ID_PIOA 6 /* PIOA */ +#define SAMA5D3_ID_PIOB 7 /* PIOB */ +#define SAMA5D3_ID_PIOC 8 /* PIOC */ +#define SAMA5D3_ID_PIOD 9 /* PIOD */ +#define SAMA5D3_ID_PIOE 10 /* PIOE */ +#define SAMA5D3_ID_SMD 11 /* SMD Soft Modem */ +#define SAMA5D3_ID_USART0 12 /* USART0 */ +#define SAMA5D3_ID_USART1 13 /* USART1 */ +#define SAMA5D3_ID_USART2 14 /* USART2 */ +#define SAMA5D3_ID_USART3 15 /* USART3 */ +#define SAMA5D3_ID_UART0 16 /* UART 0 */ +#define SAMA5D3_ID_UART1 17 /* UART 1 */ +#define SAMA5D3_ID_TWI0 18 /* Two-Wire Interface 0 */ +#define SAMA5D3_ID_TWI1 19 /* Two-Wire Interface 1 */ +#define SAMA5D3_ID_TWI2 20 /* Two-Wire Interface 2 */ +#define SAMA5D3_ID_HSMCI0 21 /* MCI */ +#define SAMA5D3_ID_HSMCI1 22 /* MCI */ +#define SAMA5D3_ID_HSMCI2 23 /* MCI */ +#define SAMA5D3_ID_SPI0 24 /* Serial Peripheral Interface 0 */ +#define SAMA5D3_ID_SPI1 25 /* Serial Peripheral Interface 1 */ +#define SAMA5D3_ID_TC0 26 /* Timer Counter 0 */ +#define SAMA5D3_ID_TC1 27 /* Timer Counter 2 */ +#define SAMA5D3_ID_PWM 28 /* Pulse Width Modulation Controller */ +#define SAMA5D3_ID_ADC 29 /* Touch Screen ADC Controller */ +#define SAMA5D3_ID_DMA0 30 /* DMA Controller 0 */ +#define SAMA5D3_ID_DMA1 31 /* DMA Controller 1 */ +#define SAMA5D3_ID_UHPHS 32 /* USB Host High Speed */ +#define SAMA5D3_ID_UDPHS 33 /* USB Device High Speed */ +#define SAMA5D3_ID_GMAC 34 /* Gigabit Ethernet MAC */ +#define SAMA5D3_ID_EMAC 35 /* Ethernet MAC */ +#define SAMA5D3_ID_LCDC 36 /* LCD Controller */ +#define SAMA5D3_ID_ISI 37 /* Image Sensor Interface */ +#define SAMA5D3_ID_SSC0 38 /* Synchronous Serial Controller 0 */ +#define SAMA5D3_ID_SSC1 39 /* Synchronous Serial Controller 1 */ +#define SAMA5D3_ID_CAN0 40 /* CAN Controller 0 */ +#define SAMA5D3_ID_CAN1 41 /* CAN Controller 1 */ +#define SAMA5D3_ID_SHA 42 /* Secure Hash Algorithm */ +#define SAMA5D3_ID_AES 43 /* Advanced Encryption Standard */ +#define SAMA5D3_ID_TDES 44 /* Triple Data Encryption Standard */ +#define SAMA5D3_ID_TRNG 45 /* True Random Generator Number */ +#define SAMA5D3_ID_IRQ0 47 /* Advanced Interrupt Controller (IRQ0) */ + +/* + * Internal Memory + */ +#define SAMA5D3_SRAM_BASE 0x00300000 /* Internal SRAM base address */ +#define SAMA5D3_SRAM_SIZE (128 * SZ_1K) /* Internal SRAM size (128Kb) */ + +#endif diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c new file mode 100644 index 000000000000..401279715ab1 --- /dev/null +++ b/arch/arm/mach-at91/sama5d3.c @@ -0,0 +1,377 @@ +/* + * Chip-specific setup code for the SAMA5D3 family + * + * Copyright (C) 2013 Atmel, + * 2013 Ludovic Desroches <ludovic.desroches@atmel.com> + * + * Licensed under GPLv2 or later. + */ + +#include <linux/module.h> +#include <linux/dma-mapping.h> + +#include <asm/irq.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <mach/sama5d3.h> +#include <mach/at91_pmc.h> +#include <mach/cpu.h> + +#include "soc.h" +#include "generic.h" +#include "clock.h" +#include "sam9_smc.h" + +/* -------------------------------------------------------------------- + * Clocks + * -------------------------------------------------------------------- */ + +/* + * The peripheral clocks. + */ + +static struct clk pioA_clk = { + .name = "pioA_clk", + .pid = SAMA5D3_ID_PIOA, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk pioB_clk = { + .name = "pioB_clk", + .pid = SAMA5D3_ID_PIOB, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk pioC_clk = { + .name = "pioC_clk", + .pid = SAMA5D3_ID_PIOC, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk pioD_clk = { + .name = "pioD_clk", + .pid = SAMA5D3_ID_PIOD, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk pioE_clk = { + .name = "pioE_clk", + .pid = SAMA5D3_ID_PIOE, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk usart0_clk = { + .name = "usart0_clk", + .pid = SAMA5D3_ID_USART0, + .type = CLK_TYPE_PERIPHERAL, + .div = AT91_PMC_PCR_DIV2, +}; +static struct clk usart1_clk = { + .name = "usart1_clk", + .pid = SAMA5D3_ID_USART1, + .type = CLK_TYPE_PERIPHERAL, + .div = AT91_PMC_PCR_DIV2, +}; +static struct clk usart2_clk = { + .name = "usart2_clk", + .pid = SAMA5D3_ID_USART2, + .type = CLK_TYPE_PERIPHERAL, + .div = AT91_PMC_PCR_DIV2, +}; +static struct clk usart3_clk = { + .name = "usart3_clk", + .pid = SAMA5D3_ID_USART3, + .type = CLK_TYPE_PERIPHERAL, + .div = AT91_PMC_PCR_DIV2, +}; +static struct clk uart0_clk = { + .name = "uart0_clk", + .pid = SAMA5D3_ID_UART0, + .type = CLK_TYPE_PERIPHERAL, + .div = AT91_PMC_PCR_DIV2, +}; +static struct clk uart1_clk = { + .name = "uart1_clk", + .pid = SAMA5D3_ID_UART1, + .type = CLK_TYPE_PERIPHERAL, + .div = AT91_PMC_PCR_DIV2, +}; +static struct clk twi0_clk = { + .name = "twi0_clk", + .pid = SAMA5D3_ID_TWI0, + .type = CLK_TYPE_PERIPHERAL, + .div = AT91_PMC_PCR_DIV2, +}; +static struct clk twi1_clk = { + .name = "twi1_clk", + .pid = SAMA5D3_ID_TWI1, + .type = CLK_TYPE_PERIPHERAL, + .div = AT91_PMC_PCR_DIV2, +}; +static struct clk twi2_clk = { + .name = "twi2_clk", + .pid = SAMA5D3_ID_TWI2, + .type = CLK_TYPE_PERIPHERAL, + .div = AT91_PMC_PCR_DIV2, +}; +static struct clk mmc0_clk = { + .name = "mci0_clk", + .pid = SAMA5D3_ID_HSMCI0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk mmc1_clk = { + .name = "mci1_clk", + .pid = SAMA5D3_ID_HSMCI1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk mmc2_clk = { + .name = "mci2_clk", + .pid = SAMA5D3_ID_HSMCI2, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk spi0_clk = { + .name = "spi0_clk", + .pid = SAMA5D3_ID_SPI0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk spi1_clk = { + .name = "spi1_clk", + .pid = SAMA5D3_ID_SPI1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk tcb0_clk = { + .name = "tcb0_clk", + .pid = SAMA5D3_ID_TC0, + .type = CLK_TYPE_PERIPHERAL, + .div = AT91_PMC_PCR_DIV2, +}; +static struct clk tcb1_clk = { + .name = "tcb1_clk", + .pid = SAMA5D3_ID_TC1, + .type = CLK_TYPE_PERIPHERAL, + .div = AT91_PMC_PCR_DIV2, +}; +static struct clk adc_clk = { + .name = "adc_clk", + .pid = SAMA5D3_ID_ADC, + .type = CLK_TYPE_PERIPHERAL, + .div = AT91_PMC_PCR_DIV2, +}; +static struct clk adc_op_clk = { + .name = "adc_op_clk", + .type = CLK_TYPE_PERIPHERAL, + .rate_hz = 5000000, +}; +static struct clk dma0_clk = { + .name = "dma0_clk", + .pid = SAMA5D3_ID_DMA0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk dma1_clk = { + .name = "dma1_clk", + .pid = SAMA5D3_ID_DMA1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk uhphs_clk = { + .name = "uhphs", + .pid = SAMA5D3_ID_UHPHS, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk udphs_clk = { + .name = "udphs_clk", + .pid = SAMA5D3_ID_UDPHS, + .type = CLK_TYPE_PERIPHERAL, +}; +/* gmac only for sama5d33, sama5d34, sama5d35 */ +static struct clk macb0_clk = { + .name = "macb0_clk", + .pid = SAMA5D3_ID_GMAC, + .type = CLK_TYPE_PERIPHERAL, +}; +/* emac only for sama5d31, sama5d35 */ +static struct clk macb1_clk = { + .name = "macb1_clk", + .pid = SAMA5D3_ID_EMAC, + .type = CLK_TYPE_PERIPHERAL, +}; +/* lcd only for sama5d31, sama5d33, sama5d34 */ +static struct clk lcdc_clk = { + .name = "lcdc_clk", + .pid = SAMA5D3_ID_LCDC, + .type = CLK_TYPE_PERIPHERAL, +}; +/* isi only for sama5d33, sama5d35 */ +static struct clk isi_clk = { + .name = "isi_clk", + .pid = SAMA5D3_ID_ISI, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk can0_clk = { + .name = "can0_clk", + .pid = SAMA5D3_ID_CAN0, + .type = CLK_TYPE_PERIPHERAL, + .div = AT91_PMC_PCR_DIV2, +}; +static struct clk can1_clk = { + .name = "can1_clk", + .pid = SAMA5D3_ID_CAN1, + .type = CLK_TYPE_PERIPHERAL, + .div = AT91_PMC_PCR_DIV2, +}; +static struct clk ssc0_clk = { + .name = "ssc0_clk", + .pid = SAMA5D3_ID_SSC0, + .type = CLK_TYPE_PERIPHERAL, + .div = AT91_PMC_PCR_DIV2, +}; +static struct clk ssc1_clk = { + .name = "ssc1_clk", + .pid = SAMA5D3_ID_SSC1, + .type = CLK_TYPE_PERIPHERAL, + .div = AT91_PMC_PCR_DIV2, +}; +static struct clk sha_clk = { + .name = "sha_clk", + .pid = SAMA5D3_ID_SHA, + .type = CLK_TYPE_PERIPHERAL, + .div = AT91_PMC_PCR_DIV8, +}; +static struct clk aes_clk = { + .name = "aes_clk", + .pid = SAMA5D3_ID_AES, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk tdes_clk = { + .name = "tdes_clk", + .pid = SAMA5D3_ID_TDES, + .type = CLK_TYPE_PERIPHERAL, +}; + +static struct clk *periph_clocks[] __initdata = { + &pioA_clk, + &pioB_clk, + &pioC_clk, + &pioD_clk, + &pioE_clk, + &usart0_clk, + &usart1_clk, + &usart2_clk, + &usart3_clk, + &uart0_clk, + &uart1_clk, + &twi0_clk, + &twi1_clk, + &twi2_clk, + &mmc0_clk, + &mmc1_clk, + &mmc2_clk, + &spi0_clk, + &spi1_clk, + &tcb0_clk, + &tcb1_clk, + &adc_clk, + &adc_op_clk, + &dma0_clk, + &dma1_clk, + &uhphs_clk, + &udphs_clk, + &macb0_clk, + &macb1_clk, + &lcdc_clk, + &isi_clk, + &can0_clk, + &can1_clk, + &ssc0_clk, + &ssc1_clk, + &sha_clk, + &aes_clk, + &tdes_clk, +}; + +static struct clk pck0 = { + .name = "pck0", + .pmc_mask = AT91_PMC_PCK0, + .type = CLK_TYPE_PROGRAMMABLE, + .id = 0, +}; + +static struct clk pck1 = { + .name = "pck1", + .pmc_mask = AT91_PMC_PCK1, + .type = CLK_TYPE_PROGRAMMABLE, + .id = 1, +}; + +static struct clk pck2 = { + .name = "pck2", + .pmc_mask = AT91_PMC_PCK2, + .type = CLK_TYPE_PROGRAMMABLE, + .id = 2, +}; + +static struct clk_lookup periph_clocks_lookups[] = { + /* lookup table for DT entries */ + CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck), + CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk), + CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk), + CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioC_clk), + CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioD_clk), + CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioE_clk), + CLKDEV_CON_DEV_ID("usart", "f001c000.serial", &usart0_clk), + CLKDEV_CON_DEV_ID("usart", "f0020000.serial", &usart1_clk), + CLKDEV_CON_DEV_ID("usart", "f8020000.serial", &usart2_clk), + CLKDEV_CON_DEV_ID("usart", "f8024000.serial", &usart3_clk), + CLKDEV_CON_DEV_ID(NULL, "f0014000.i2c", &twi0_clk), + CLKDEV_CON_DEV_ID(NULL, "f0018000.i2c", &twi1_clk), + CLKDEV_CON_DEV_ID(NULL, "f801c000.i2c", &twi2_clk), + CLKDEV_CON_DEV_ID("mci_clk", "f0000000.mmc", &mmc0_clk), + CLKDEV_CON_DEV_ID("mci_clk", "f8000000.mmc", &mmc1_clk), + CLKDEV_CON_DEV_ID("mci_clk", "f8004000.mmc", &mmc2_clk), + CLKDEV_CON_DEV_ID("spi_clk", "f0004000.spi", &spi0_clk), + CLKDEV_CON_DEV_ID("spi_clk", "f8008000.spi", &spi1_clk), + CLKDEV_CON_DEV_ID("t0_clk", "f0010000.timer", &tcb0_clk), + CLKDEV_CON_DEV_ID("t0_clk", "f8014000.timer", &tcb1_clk), + CLKDEV_CON_DEV_ID("tsc_clk", "f8018000.tsadcc", &adc_clk), + CLKDEV_CON_DEV_ID("dma_clk", "ffffe600.dma-controller", &dma0_clk), + CLKDEV_CON_DEV_ID("dma_clk", "ffffe800.dma-controller", &dma1_clk), + CLKDEV_CON_DEV_ID("hclk", "600000.ohci", &uhphs_clk), + CLKDEV_CON_DEV_ID("ohci_clk", "600000.ohci", &uhphs_clk), + CLKDEV_CON_DEV_ID("ehci_clk", "700000.ehci", &uhphs_clk), + CLKDEV_CON_DEV_ID("pclk", "500000.gadget", &udphs_clk), + CLKDEV_CON_DEV_ID("hclk", "500000.gadget", &utmi_clk), + CLKDEV_CON_DEV_ID("hclk", "f0028000.ethernet", &macb0_clk), + CLKDEV_CON_DEV_ID("pclk", "f0028000.ethernet", &macb0_clk), + CLKDEV_CON_DEV_ID("hclk", "f802c000.ethernet", &macb1_clk), + CLKDEV_CON_DEV_ID("pclk", "f802c000.ethernet", &macb1_clk), + CLKDEV_CON_DEV_ID("pclk", "f0008000.ssc", &ssc0_clk), + CLKDEV_CON_DEV_ID("pclk", "f000c000.ssc", &ssc1_clk), + CLKDEV_CON_DEV_ID("can_clk", "f000c000.can", &can0_clk), + CLKDEV_CON_DEV_ID("can_clk", "f8010000.can", &can1_clk), + CLKDEV_CON_DEV_ID("sha_clk", "f8034000.sha", &sha_clk), + CLKDEV_CON_DEV_ID("aes_clk", "f8038000.aes", &aes_clk), + CLKDEV_CON_DEV_ID("tdes_clk", "f803c000.tdes", &tdes_clk), +}; + +static void __init sama5d3_register_clocks(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) + clk_register(periph_clocks[i]); + + clkdev_add_table(periph_clocks_lookups, + ARRAY_SIZE(periph_clocks_lookups)); + + clk_register(&pck0); + clk_register(&pck1); + clk_register(&pck2); +} + +/* -------------------------------------------------------------------- + * AT91SAM9x5 processor initialization + * -------------------------------------------------------------------- */ + +static void __init sama5d3_map_io(void) +{ + at91_init_sram(0, SAMA5D3_SRAM_BASE, SAMA5D3_SRAM_SIZE); +} + +AT91_SOC_START(sama5d3) + .map_io = sama5d3_map_io, + .register_clocks = sama5d3_register_clocks, +AT91_SOC_END diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index 4b678478cf95..e8491e77b1f7 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c @@ -151,6 +151,11 @@ static void __init soc_detect(u32 dbgu_base) at91_soc_initdata.type = AT91_SOC_SAM9N12; at91_boot_soc = at91sam9n12_soc; break; + + case ARCH_ID_SAMA5D3: + at91_soc_initdata.type = AT91_SOC_SAMA5D3; + at91_boot_soc = sama5d3_soc; + break; } /* at91sam9g10 */ @@ -206,6 +211,23 @@ static void __init soc_detect(u32 dbgu_base) break; } } + + if (at91_soc_initdata.type == AT91_SOC_SAMA5D3) { + switch (at91_soc_initdata.exid) { + case ARCH_EXID_SAMA5D31: + at91_soc_initdata.subtype = AT91_SOC_SAMA5D31; + break; + case ARCH_EXID_SAMA5D33: + at91_soc_initdata.subtype = AT91_SOC_SAMA5D33; + break; + case ARCH_EXID_SAMA5D34: + at91_soc_initdata.subtype = AT91_SOC_SAMA5D34; + break; + case ARCH_EXID_SAMA5D35: + at91_soc_initdata.subtype = AT91_SOC_SAMA5D35; + break; + } + } } static const char *soc_name[] = { @@ -219,6 +241,7 @@ static const char *soc_name[] = { [AT91_SOC_SAM9RL] = "at91sam9rl", [AT91_SOC_SAM9X5] = "at91sam9x5", [AT91_SOC_SAM9N12] = "at91sam9n12", + [AT91_SOC_SAMA5D3] = "sama5d3", [AT91_SOC_NONE] = "Unknown" }; @@ -241,6 +264,10 @@ static const char *soc_subtype_name[] = { [AT91_SOC_SAM9X35] = "at91sam9x35", [AT91_SOC_SAM9G25] = "at91sam9g25", [AT91_SOC_SAM9X25] = "at91sam9x25", + [AT91_SOC_SAMA5D31] = "sama5d31", + [AT91_SOC_SAMA5D33] = "sama5d33", + [AT91_SOC_SAMA5D34] = "sama5d34", + [AT91_SOC_SAMA5D35] = "sama5d35", [AT91_SOC_SUBTYPE_NONE] = "Unknown" }; @@ -333,7 +360,7 @@ static void at91_dt_rstc(void) of_id = of_match_node(rstc_ids, np); if (!of_id) - panic("AT91: rtsc no restart function availlable\n"); + panic("AT91: rtsc no restart function available\n"); arm_pm_restart = of_id->data; @@ -353,7 +380,7 @@ static void at91_dt_ramc(void) np = of_find_matching_node(NULL, ramc_ids); if (!np) - panic("unable to find compatible ram conroller node in dtb\n"); + panic("unable to find compatible ram controller node in dtb\n"); at91_ramc_base[0] = of_iomap(np, 0); if (!at91_ramc_base[0]) @@ -403,7 +430,7 @@ static void at91_dt_shdwc(void) np = of_find_matching_node(NULL, shdwc_ids); if (!np) { - pr_debug("AT91: unable to find compatible shutdown (shdwc) conroller node in dtb\n"); + pr_debug("AT91: unable to find compatible shutdown (shdwc) controller node in dtb\n"); return; } @@ -419,7 +446,7 @@ static void at91_dt_shdwc(void) if (!of_property_read_u32(np, "atmel,wakeup-counter", ®)) { if (reg > AT91_SHDW_CPTWK0_MAX) { - pr_warn("AT91: shdwc wakeup conter 0x%x > 0x%x reduce it to 0x%x\n", + pr_warn("AT91: shdwc wakeup counter 0x%x > 0x%x reduce it to 0x%x\n", reg, AT91_SHDW_CPTWK0_MAX, AT91_SHDW_CPTWK0_MAX); reg = AT91_SHDW_CPTWK0_MAX; } diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h index 9c6d3d4f9a23..43a225f9e713 100644 --- a/arch/arm/mach-at91/soc.h +++ b/arch/arm/mach-at91/soc.h @@ -22,9 +22,10 @@ extern struct at91_init_soc at91sam9g45_soc; extern struct at91_init_soc at91sam9rl_soc; extern struct at91_init_soc at91sam9x5_soc; extern struct at91_init_soc at91sam9n12_soc; +extern struct at91_init_soc sama5d3_soc; #define AT91_SOC_START(_name) \ -struct at91_init_soc __initdata at91##_name##_soc \ +struct at91_init_soc __initdata _name##_soc \ __used \ = { \ .builtin = 1, \ @@ -68,3 +69,7 @@ static inline int at91_soc_is_enabled(void) #if !defined(CONFIG_SOC_AT91SAM9N12) #define at91sam9n12_soc at91_boot_soc #endif + +#if !defined(CONFIG_SOC_SAMA5D3) +#define sama5d3_soc at91_boot_soc +#endif |
