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-rw-r--r--arch/arm/mach-at91/include/mach/cpu.h13
-rw-r--r--arch/arm/mach-at91/include/mach/debug-macro.S5
-rw-r--r--arch/arm/mach-at91/include/mach/hardware.h19
-rw-r--r--arch/arm/mach-at91/include/mach/uncompress.h21
4 files changed, 51 insertions, 7 deletions
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h
index d77572e8cb15..b27e9ca65653 100644
--- a/arch/arm/mach-at91/include/mach/cpu.h
+++ b/arch/arm/mach-at91/include/mach/cpu.h
@@ -36,7 +36,7 @@
#define ARCH_ID_AT91M40807 0x14080745
#define ARCH_ID_AT91R40008 0x44000840
-#define ARCH_ID_SAMA5D3 0x8A5C07C0
+#define ARCH_ID_SAMA5 0x8A5C07C0
#define ARCH_EXID_AT91SAM9M11 0x00000001
#define ARCH_EXID_AT91SAM9M10 0x00000002
@@ -49,12 +49,19 @@
#define ARCH_EXID_AT91SAM9G25 0x00000003
#define ARCH_EXID_AT91SAM9X25 0x00000004
+#define ARCH_EXID_SAMA5D3 0x00004300
#define ARCH_EXID_SAMA5D31 0x00444300
#define ARCH_EXID_SAMA5D33 0x00414300
#define ARCH_EXID_SAMA5D34 0x00414301
#define ARCH_EXID_SAMA5D35 0x00584300
#define ARCH_EXID_SAMA5D36 0x00004301
+#define ARCH_EXID_SAMA5D4 0x00000007
+#define ARCH_EXID_SAMA5D41 0x00000001
+#define ARCH_EXID_SAMA5D42 0x00000002
+#define ARCH_EXID_SAMA5D43 0x00000003
+#define ARCH_EXID_SAMA5D44 0x00000004
+
#define ARCH_FAMILY_AT91X92 0x09200000
#define ARCH_FAMILY_AT91SAM9 0x01900000
#define ARCH_FAMILY_AT91SAM9XE 0x02900000
@@ -111,6 +118,10 @@ enum at91_soc_subtype {
AT91_SOC_SAMA5D31, AT91_SOC_SAMA5D33, AT91_SOC_SAMA5D34,
AT91_SOC_SAMA5D35, AT91_SOC_SAMA5D36,
+ /* SAMA5D4 */
+ AT91_SOC_SAMA5D41, AT91_SOC_SAMA5D42, AT91_SOC_SAMA5D43,
+ AT91_SOC_SAMA5D44,
+
/* No subtype for this SoC */
AT91_SOC_SUBTYPE_NONE,
diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/mach-at91/include/mach/debug-macro.S
index c6bb9e2d9baa..2103a90f2261 100644
--- a/arch/arm/mach-at91/include/mach/debug-macro.S
+++ b/arch/arm/mach-at91/include/mach/debug-macro.S
@@ -16,8 +16,11 @@
#if defined(CONFIG_AT91_DEBUG_LL_DBGU0)
#define AT91_DBGU AT91_BASE_DBGU0
-#else
+#elif defined(CONFIG_AT91_DEBUG_LL_DBGU1)
#define AT91_DBGU AT91_BASE_DBGU1
+#else
+/* On sama5d4, use USART3 as low level serial console */
+#define AT91_DBGU SAMA5D4_BASE_USART3
#endif
.macro addruart, rp, rv, tmp
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h
index 56338245653a..d84776f6b8ac 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -19,8 +19,10 @@
/* DBGU base */
/* rm9200, 9260/9g20, 9261/9g10, 9rl */
#define AT91_BASE_DBGU0 0xfffff200
-/* 9263, 9g45 */
+/* 9263, 9g45, sama5d3 */
#define AT91_BASE_DBGU1 0xffffee00
+/* sama5d4 */
+#define AT91_BASE_DBGU2 0xfc069000
#if defined(CONFIG_ARCH_AT91X40)
#include <mach/at91x40.h>
@@ -34,6 +36,7 @@
#include <mach/at91sam9x5.h>
#include <mach/at91sam9n12.h>
#include <mach/sama5d3.h>
+#include <mach/sama5d4.h>
/*
* On all at91 except rm9200 and x40 have the System Controller starts
@@ -47,6 +50,11 @@
* and map the same memory space
*/
#define AT91_BASE_SYS 0xffffc000
+
+/*
+ * On sama5d4 there is no system controller, we map some needed peripherals
+ */
+#define AT91_ALT_BASE_SYS 0xfc069000
#endif
/*
@@ -69,6 +77,13 @@
*/
#define AT91_IO_PHYS_BASE 0xFFF78000
#define AT91_IO_VIRT_BASE IOMEM(0xFF000000 - AT91_IO_SIZE)
+
+/*
+ * On sama5d4, remap the peripherals from address 0xFC069000 .. 0xFC06F000
+ * to 0xFB069000 .. 0xFB06F000. (24Kb)
+ */
+#define AT91_ALT_IO_PHYS_BASE AT91_ALT_BASE_SYS
+#define AT91_ALT_IO_VIRT_BASE IOMEM(0xFB069000)
#else
/*
* Identity mapping for the non MMU case.
@@ -81,11 +96,13 @@
/* Convert a physical IO address to virtual IO address */
#define AT91_IO_P2V(x) ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE)
+#define AT91_ALT_IO_P2V(x) ((x) - AT91_ALT_IO_PHYS_BASE + AT91_ALT_IO_VIRT_BASE)
/*
* Virtual to Physical Address mapping for IO devices.
*/
#define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS)
+#define AT91_ALT_VA_BASE_SYS AT91_ALT_IO_P2V(AT91_ALT_BASE_SYS)
/* Internal SRAM is mapped below the IO devices */
#define AT91_SRAM_MAX SZ_1M
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h
index 4bb644f8e87c..acb2d890ad7e 100644
--- a/arch/arm/mach-at91/include/mach/uncompress.h
+++ b/arch/arm/mach-at91/include/mach/uncompress.h
@@ -94,7 +94,7 @@ static const u32 uarts_sam9x5[] = {
0,
};
-static const u32 uarts_sama5[] = {
+static const u32 uarts_sama5d3[] = {
AT91_BASE_DBGU1,
SAMA5D3_BASE_USART0,
SAMA5D3_BASE_USART1,
@@ -103,6 +103,12 @@ static const u32 uarts_sama5[] = {
0,
};
+static const u32 uarts_sama5d4[] = {
+ AT91_BASE_DBGU2,
+ SAMA5D4_BASE_USART3,
+ 0,
+};
+
static inline const u32* decomp_soc_detect(void __iomem *dbgu_base)
{
u32 cidr, socid;
@@ -134,8 +140,14 @@ static inline const u32* decomp_soc_detect(void __iomem *dbgu_base)
case ARCH_ID_AT91SAM9X5:
return uarts_sam9x5;
- case ARCH_ID_SAMA5D3:
- return uarts_sama5;
+ case ARCH_ID_SAMA5:
+ cidr = __raw_readl(dbgu_base + AT91_DBGU_EXID);
+ if (cidr & ARCH_EXID_SAMA5D3)
+ return uarts_sama5d3;
+ else if (cidr & ARCH_EXID_SAMA5D4)
+ return uarts_sama5d4;
+
+ break;
}
/* at91sam9g10 */
@@ -156,9 +168,10 @@ static inline void arch_decomp_setup(void)
const u32* usarts;
usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU0);
-
if (!usarts)
usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU1);
+ if (!usarts)
+ usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU2);
if (!usarts) {
at91_uart = NULL;
return;
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