diff options
Diffstat (limited to 'arch/arm/boot/dts/at91sam9263.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/at91sam9263.dtsi | 149 |
1 files changed, 75 insertions, 74 deletions
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi index 5edfadf20482..bb4d7ca24b93 100644 --- a/arch/arm/boot/dts/at91sam9263.dtsi +++ b/arch/arm/boot/dts/at91sam9263.dtsi @@ -7,6 +7,7 @@ */ #include "skeleton.dtsi" +#include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/gpio/gpio.h> / { @@ -111,214 +112,214 @@ dbgu { pinctrl_dbgu: dbgu-0 { atmel,pins = - <2 30 0x1 0x0 /* PC30 periph A */ - 2 31 0x1 0x1>; /* PC31 periph with pullup */ + <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC30 periph A */ + AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC31 periph with pullup */ }; }; usart0 { pinctrl_usart0: usart0-0 { atmel,pins = - <0 26 0x1 0x1 /* PA26 periph A with pullup */ - 0 27 0x1 0x0>; /* PA27 periph A */ + <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */ + AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */ }; pinctrl_usart0_rts: usart0_rts-0 { atmel,pins = - <0 28 0x1 0x0>; /* PA28 periph A */ + <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */ }; pinctrl_usart0_cts: usart0_cts-0 { atmel,pins = - <0 29 0x1 0x0>; /* PA29 periph A */ + <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */ }; }; usart1 { pinctrl_usart1: usart1-0 { atmel,pins = - <3 0 0x1 0x1 /* PD0 periph A with pullup */ - 3 1 0x1 0x0>; /* PD1 periph A */ + <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */ + AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */ }; pinctrl_usart1_rts: usart1_rts-0 { atmel,pins = - <3 7 0x2 0x0>; /* PD7 periph B */ + <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */ }; pinctrl_usart1_cts: usart1_cts-0 { atmel,pins = - <3 8 0x2 0x0>; /* PD8 periph B */ + <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */ }; }; usart2 { pinctrl_usart2: usart2-0 { atmel,pins = - <3 2 0x1 0x1 /* PD2 periph A with pullup */ - 3 3 0x1 0x0>; /* PD3 periph A */ + <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */ + AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */ }; pinctrl_usart2_rts: usart2_rts-0 { atmel,pins = - <3 5 0x2 0x0>; /* PD5 periph B */ + <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */ }; pinctrl_usart2_cts: usart2_cts-0 { atmel,pins = - <4 6 0x2 0x0>; /* PD6 periph B */ + <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */ }; }; nand { pinctrl_nand: nand-0 { atmel,pins = - <0 22 0x0 0x1 /* PA22 gpio RDY pin pull_up*/ - 3 15 0x0 0x1>; /* PD15 gpio enable pin pull_up */ + <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/ + AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */ }; }; macb { pinctrl_macb_rmii: macb_rmii-0 { atmel,pins = - <2 25 0x2 0x0 /* PC25 periph B */ - 4 21 0x1 0x0 /* PE21 periph A */ - 4 23 0x1 0x0 /* PE23 periph A */ - 4 24 0x1 0x0 /* PE24 periph A */ - 4 25 0x1 0x0 /* PE25 periph A */ - 4 26 0x1 0x0 /* PE26 periph A */ - 4 27 0x1 0x0 /* PE27 periph A */ - 4 28 0x1 0x0 /* PE28 periph A */ - 4 29 0x1 0x0 /* PE29 periph A */ - 4 30 0x1 0x0>; /* PE30 periph A */ + <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ + AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */ + AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */ + AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */ + AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */ + AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */ + AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */ + AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */ + AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */ + AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */ }; pinctrl_macb_rmii_mii: macb_rmii_mii-0 { atmel,pins = - <2 20 0x2 0x0 /* PC20 periph B */ - 2 21 0x2 0x0 /* PC21 periph B */ - 2 22 0x2 0x0 /* PC22 periph B */ - 2 23 0x2 0x0 /* PC23 periph B */ - 2 24 0x2 0x0 /* PC24 periph B */ - 2 25 0x2 0x0 /* PC25 periph B */ - 2 27 0x2 0x0 /* PC27 periph B */ - 4 22 0x2 0x0>; /* PE22 periph B */ + <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */ + AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */ + AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */ + AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */ + AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */ + AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ + AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */ + AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */ }; }; mmc0 { pinctrl_mmc0_clk: mmc0_clk-0 { atmel,pins = - <0 12 0x1 0x0>; /* PA12 periph A */ + <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */ }; pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { atmel,pins = - <0 1 0x1 0x1 /* PA1 periph A with pullup */ - 0 0 0x1 0x1>; /* PA0 periph A with pullup */ + <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */ + AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */ }; pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { atmel,pins = - <0 3 0x1 0x1 /* PA3 periph A with pullup */ - 0 4 0x1 0x1 /* PA4 periph A with pullup */ - 0 5 0x1 0x1>; /* PA5 periph A with pullup */ + <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */ + AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */ + AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */ }; pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { atmel,pins = - <0 16 0x1 0x1 /* PA16 periph A with pullup */ - 0 17 0x1 0x1>; /* PA17 periph A with pullup */ + <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */ + AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */ }; pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { atmel,pins = - <0 18 0x1 0x1 /* PA18 periph A with pullup */ - 0 19 0x1 0x1 /* PA19 periph A with pullup */ - 0 20 0x1 0x1>; /* PA20 periph A with pullup */ + <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */ + AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */ + AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */ }; }; mmc1 { pinctrl_mmc1_clk: mmc1_clk-0 { atmel,pins = - <0 6 0x1 0x0>; /* PA6 periph A */ + <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */ }; pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 { atmel,pins = - <0 7 0x1 0x1 /* PA7 periph A with pullup */ - 0 8 0x1 0x1>; /* PA8 periph A with pullup */ + <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ + AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */ }; pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { atmel,pins = - <0 9 0x1 0x1 /* PA9 periph A with pullup */ - 0 10 0x1 0x1 /* PA10 periph A with pullup */ - 0 11 0x1 0x1>; /* PA11 periph A with pullup */ + <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */ + AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */ + AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */ }; pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 { atmel,pins = - <0 21 0x1 0x1 /* PA21 periph A with pullup */ - 0 22 0x1 0x1>; /* PA22 periph A with pullup */ + <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */ + AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */ }; pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 { atmel,pins = - <0 23 0x1 0x1 /* PA23 periph A with pullup */ - 0 24 0x1 0x1 /* PA24 periph A with pullup */ - 0 25 0x1 0x1>; /* PA25 periph A with pullup */ + <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */ + AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */ + AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */ }; }; ssc0 { pinctrl_ssc0_tx: ssc0_tx-0 { atmel,pins = - <1 0 0x2 0x0 /* PB0 periph B */ - 1 1 0x2 0x0 /* PB1 periph B */ - 1 2 0x2 0x0>; /* PB2 periph B */ + <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */ + AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */ + AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */ }; pinctrl_ssc0_rx: ssc0_rx-0 { atmel,pins = - <1 3 0x2 0x0 /* PB3 periph B */ - 1 4 0x2 0x0 /* PB4 periph B */ - 1 5 0x2 0x0>; /* PB5 periph B */ + <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */ + AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */ + AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */ }; }; ssc1 { pinctrl_ssc1_tx: ssc1_tx-0 { atmel,pins = - <1 6 0x1 0x0 /* PB6 periph A */ - 1 7 0x1 0x0 /* PB7 periph A */ - 1 8 0x1 0x0>; /* PB8 periph A */ + <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ + AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ + AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */ }; pinctrl_ssc1_rx: ssc1_rx-0 { atmel,pins = - <1 9 0x1 0x0 /* PB9 periph A */ - 1 10 0x1 0x0 /* PB10 periph A */ - 1 11 0x1 0x0>; /* PB11 periph A */ + <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ + AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */ + AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */ }; }; spi0 { pinctrl_spi0: spi0-0 { atmel,pins = - <0 0 0x2 0x0 /* PA0 periph B SPI0_MISO pin */ - 0 1 0x2 0x0 /* PA1 periph B SPI0_MOSI pin */ - 0 2 0x2 0x0>; /* PA2 periph B SPI0_SPCK pin */ + <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */ + AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */ + AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */ }; }; spi1 { pinctrl_spi1: spi1-0 { atmel,pins = - <1 12 0x1 0x0 /* PB12 periph A SPI1_MISO pin */ - 1 13 0x1 0x0 /* PB13 periph A SPI1_MOSI pin */ - 1 14 0x1 0x0>; /* PB14 periph A SPI1_SPCK pin */ + <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */ + AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */ + AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */ }; }; |
