diff options
Diffstat (limited to 'Documentation/devicetree')
96 files changed, 1641 insertions, 106 deletions
diff --git a/Documentation/devicetree/bindings/bus/qcom,ebi2.txt b/Documentation/devicetree/bindings/bus/qcom,ebi2.txt index 920681f552db..5a7d567f6833 100644 --- a/Documentation/devicetree/bindings/bus/qcom,ebi2.txt +++ b/Documentation/devicetree/bindings/bus/qcom,ebi2.txt @@ -51,7 +51,7 @@ Required properties: - compatible: should be one of: "qcom,msm8660-ebi2" "qcom,apq8060-ebi2" -- #address-cells: shoule be <2>: the first cell is the chipselect, +- #address-cells: should be <2>: the first cell is the chipselect, the second cell is the offset inside the memory range - #size-cells: should be <1> - ranges: should be set to: @@ -64,7 +64,7 @@ Required properties: - reg: two ranges of registers: EBI2 config and XMEM config areas - reg-names: should be "ebi2", "xmem" - clocks: two clocks, EBI_2X and EBI -- clock-names: shoule be "ebi2x", "ebi2" +- clock-names: should be "ebi2x", "ebi2" Optional subnodes: - Nodes inside the EBI2 will be considered device nodes. @@ -100,7 +100,7 @@ Optional properties arrays for FAST chip selects: assertion, with respect to the cycle where ADV (address valid) is asserted. 2 means 2 cycles between ADV and OE. Valid values 0, 1, 2 or 3. - qcom,xmem-read-hold-cycles: the length in cycles of the first segment of a - read transfer. For a single read trandfer this will be the time from CS + read transfer. For a single read transfer this will be the time from CS assertion to OE assertion. Valid values 0 thru 15. diff --git a/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt b/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt index cb8542d910b3..5142efc8099d 100644 --- a/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt +++ b/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt @@ -117,7 +117,7 @@ ID Clock Peripheral 25 tdm Time Division Mplx 28 xor1 XOR DMA 1 29 sata1lnk -30 sata1 SATA Host 0 +30 sata1 SATA Host 1 The following is a list of provided IDs for Dove: ID Clock Peripheral diff --git a/Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt b/Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt new file mode 100644 index 000000000000..29b6007568eb --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/brcm,spu-crypto.txt @@ -0,0 +1,22 @@ +The Broadcom Secure Processing Unit (SPU) hardware supports symmetric +cryptographic offload for Broadcom SoCs. A SoC may have multiple SPU hardware +blocks. + +Required properties: +- compatible: Should be one of the following: + brcm,spum-crypto - for devices with SPU-M hardware + brcm,spu2-crypto - for devices with SPU2 hardware + brcm,spu2-v2-crypto - for devices with enhanced SPU2 hardware features like SHA3 + and Rabin Fingerprint support + brcm,spum-nsp-crypto - for the Northstar Plus variant of the SPU-M hardware + +- reg: Should contain SPU registers location and length. +- mboxes: The mailbox channel to be used to communicate with the SPU. + Mailbox channels correspond to DMA rings on the device. + +Example: + crypto@612d0000 { + compatible = "brcm,spum-crypto"; + reg = <0 0x612d0000 0 0x900>; + mboxes = <&pdc0 0>; + }; diff --git a/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt b/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt new file mode 100644 index 000000000000..c204725e5873 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/mediatek-crypto.txt @@ -0,0 +1,27 @@ +MediaTek cryptographic accelerators + +Required properties: +- compatible: Should be "mediatek,eip97-crypto" +- reg: Address and length of the register set for the device +- interrupts: Should contain the five crypto engines interrupts in numeric + order. These are global system and four descriptor rings. +- clocks: the clock used by the core +- clock-names: the names of the clock listed in the clocks property. These are + "ethif", "cryp" +- power-domains: Must contain a reference to the PM domain. + + +Example: + crypto: crypto@1b240000 { + compatible = "mediatek,eip97-crypto"; + reg = <0 0x1b240000 0 0x20000>; + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 83 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>, + <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>; + clocks = <&topckgen CLK_TOP_ETHIF_SEL>, + <ðsys CLK_ETHSYS_CRYPTO>; + clock-names = "ethif","cryp"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; + }; diff --git a/Documentation/devicetree/bindings/display/arm,pl11x.txt b/Documentation/devicetree/bindings/display/arm,pl11x.txt index 3e3039a8a253..ef89ab46b2c9 100644 --- a/Documentation/devicetree/bindings/display/arm,pl11x.txt +++ b/Documentation/devicetree/bindings/display/arm,pl11x.txt @@ -22,7 +22,7 @@ Required properties: - clocks: contains phandle and clock specifier pairs for the entries in the clock-names property. See - Documentation/devicetree/binding/clock/clock-bindings.txt + Documentation/devicetree/bindings/clock/clock-bindings.txt Optional properties: diff --git a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt b/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt index 4a0f4f7682ad..0c7473dd0e51 100644 --- a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt +++ b/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt @@ -33,7 +33,7 @@ Optional properties for dp-controller: in Documentation/devicetree/bindings/media/video-interfaces.txt, please refer to the SoC specific binding document: * Documentation/devicetree/bindings/display/exynos/exynos_dp.txt - * Documentation/devicetree/bindings/video/analogix_dp-rockchip.txt + * Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt [1]: Documentation/devicetree/bindings/media/video-interfaces.txt ------------------------------------------------------------------------------- diff --git a/Documentation/devicetree/bindings/video/bridge/anx7814.txt b/Documentation/devicetree/bindings/display/bridge/anx7814.txt index b2a22c28c9b3..b2a22c28c9b3 100644 --- a/Documentation/devicetree/bindings/video/bridge/anx7814.txt +++ b/Documentation/devicetree/bindings/display/bridge/anx7814.txt diff --git a/Documentation/devicetree/bindings/video/bridge/sil-sii8620.txt b/Documentation/devicetree/bindings/display/bridge/sil-sii8620.txt index 9409d9c6a260..9409d9c6a260 100644 --- a/Documentation/devicetree/bindings/video/bridge/sil-sii8620.txt +++ b/Documentation/devicetree/bindings/display/bridge/sil-sii8620.txt diff --git a/Documentation/devicetree/bindings/display/cirrus,clps711x-fb.txt b/Documentation/devicetree/bindings/display/cirrus,clps711x-fb.txt index e9c65746e2f1..b0e506610400 100644 --- a/Documentation/devicetree/bindings/display/cirrus,clps711x-fb.txt +++ b/Documentation/devicetree/bindings/display/cirrus,clps711x-fb.txt @@ -6,7 +6,7 @@ Required properties: location and size of the framebuffer memory. - clocks : phandle + clock specifier pair of the FB reference clock. - display : phandle to a display node as described in - Documentation/devicetree/bindings/display/display-timing.txt. + Documentation/devicetree/bindings/display/panel/display-timing.txt. Additionally, the display node has to define properties: - bits-per-pixel: Bits per pixel. - ac-prescale : LCD AC bias frequency. This frequency is the required diff --git a/Documentation/devicetree/bindings/display/exynos/exynos7-decon.txt b/Documentation/devicetree/bindings/display/exynos/exynos7-decon.txt index 3938caacf11c..027d6c210f7e 100644 --- a/Documentation/devicetree/bindings/display/exynos/exynos7-decon.txt +++ b/Documentation/devicetree/bindings/display/exynos/exynos7-decon.txt @@ -38,7 +38,7 @@ Optional Properties: Can be used in case timings cannot be provided otherwise or to override timings provided by the panel. -[1]: Documentation/devicetree/bindings/display/display-timing.txt +[1]: Documentation/devicetree/bindings/display/panel/display-timing.txt Example: diff --git a/Documentation/devicetree/bindings/display/exynos/samsung-fimd.txt b/Documentation/devicetree/bindings/display/exynos/samsung-fimd.txt index c7c6b9af87ac..18645e0228b0 100644 --- a/Documentation/devicetree/bindings/display/exynos/samsung-fimd.txt +++ b/Documentation/devicetree/bindings/display/exynos/samsung-fimd.txt @@ -83,7 +83,7 @@ in [2]. The following are properties specific to those nodes: 3 - for parallel output, 4 - for write-back interface -[1]: Documentation/devicetree/bindings/display/display-timing.txt +[1]: Documentation/devicetree/bindings/display/panel/display-timing.txt [2]: Documentation/devicetree/bindings/media/video-interfaces.txt Example: diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx-fb.txt b/Documentation/devicetree/bindings/display/imx/fsl,imx-fb.txt index 00d5f8ea7ec6..7a5c0e204c8e 100644 --- a/Documentation/devicetree/bindings/display/imx/fsl,imx-fb.txt +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx-fb.txt @@ -9,7 +9,7 @@ Required properties: Required nodes: - display: Phandle to a display node as described in - Documentation/devicetree/bindings/display/display-timing.txt + Documentation/devicetree/bindings/display/panel/display-timing.txt Additional, the display node has to define properties: - bits-per-pixel: Bits per pixel - fsl,pcr: LCDC PCR value diff --git a/Documentation/devicetree/bindings/display/imx/ldb.txt b/Documentation/devicetree/bindings/display/imx/ldb.txt index a407462c885e..38c637fa39dd 100644 --- a/Documentation/devicetree/bindings/display/imx/ldb.txt +++ b/Documentation/devicetree/bindings/display/imx/ldb.txt @@ -64,7 +64,7 @@ Required properties: Optional properties (required if display-timings are used): - ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing - display-timings : A node that describes the display timings as defined in - Documentation/devicetree/bindings/display/display-timing.txt. + Documentation/devicetree/bindings/display/panel/display-timing.txt. - fsl,data-mapping : should be "spwg" or "jeida" This describes how the color bits are laid out in the serialized LVDS signal. diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt index db6e77edbea8..708f5664a316 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt @@ -55,7 +55,7 @@ Required properties (DMA function blocks): "mediatek,<chip>-disp-rdma" "mediatek,<chip>-disp-wdma" - larb: Should contain a phandle pointing to the local arbiter device as defined - in Documentation/devicetree/bindings/soc/mediatek/mediatek,smi-larb.txt + in Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt - iommus: Should point to the respective IOMMU block with master port as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt for details. diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt b/Documentation/devicetree/bindings/display/msm/dsi.txt index 6b1cab17f52d..fa00e62e1cf6 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi.txt +++ b/Documentation/devicetree/bindings/display/msm/dsi.txt @@ -108,7 +108,7 @@ Optional properties: - qcom,dsi-phy-regulator-ldo-mode: Boolean value indicating if the LDO mode PHY regulator is wanted. -[1] Documentation/devicetree/bindings/clocks/clock-bindings.txt +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt [2] Documentation/devicetree/bindings/graph.txt [3] Documentation/devicetree/bindings/media/video-interfaces.txt [4] Documentation/devicetree/bindings/display/panel/ diff --git a/Documentation/devicetree/bindings/display/msm/edp.txt b/Documentation/devicetree/bindings/display/msm/edp.txt index 3a20f6ea5898..e63032be5401 100644 --- a/Documentation/devicetree/bindings/display/msm/edp.txt +++ b/Documentation/devicetree/bindings/display/msm/edp.txt @@ -10,7 +10,7 @@ Required properties: - interrupts: The interrupt signal from the eDP block. - power-domains: Should be <&mmcc MDSS_GDSC>. - clocks: device clocks - See Documentation/devicetree/bindings/clocks/clock-bindings.txt for details. + See Documentation/devicetree/bindings/clock/clock-bindings.txt for details. - clock-names: the following clocks are required: * "core_clk" * "iface_clk" diff --git a/Documentation/devicetree/bindings/display/msm/hdmi.txt b/Documentation/devicetree/bindings/display/msm/hdmi.txt index 2ad578984fcf..2d306f402d18 100644 --- a/Documentation/devicetree/bindings/display/msm/hdmi.txt +++ b/Documentation/devicetree/bindings/display/msm/hdmi.txt @@ -49,7 +49,7 @@ Required properties: * "hdmi_tx_l4" - power-domains: Should be <&mmcc MDSS_GDSC>. - clocks: device clocks - See Documentation/devicetree/bindings/clocks/clock-bindings.txt for details. + See Documentation/devicetree/bindings/clock/clock-bindings.txt for details. - core-vdda-supply: phandle to vdda regulator device node Example: diff --git a/Documentation/devicetree/bindings/display/panel/panel-dpi.txt b/Documentation/devicetree/bindings/display/panel/panel-dpi.txt index b52ac52757df..d4add13e592d 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-dpi.txt +++ b/Documentation/devicetree/bindings/display/panel/panel-dpi.txt @@ -12,7 +12,7 @@ Optional properties: Required nodes: - "panel-timing" containing video timings - (Documentation/devicetree/bindings/display/display-timing.txt) + (Documentation/devicetree/bindings/display/panel/display-timing.txt) - Video port for DPI input Example diff --git a/Documentation/devicetree/bindings/display/panel/samsung,ld9040.txt b/Documentation/devicetree/bindings/display/panel/samsung,ld9040.txt index fc595d9b985b..354d4d1df4ff 100644 --- a/Documentation/devicetree/bindings/display/panel/samsung,ld9040.txt +++ b/Documentation/devicetree/bindings/display/panel/samsung,ld9040.txt @@ -20,7 +20,7 @@ The device node can contain one 'port' child node with one child 'endpoint' node, according to the bindings defined in [3]. This node should describe panel's video bus. -[1]: Documentation/devicetree/bindings/display/display-timing.txt +[1]: Documentation/devicetree/bindings/display/panel/display-timing.txt [2]: Documentation/devicetree/bindings/spi/spi-bus.txt [3]: Documentation/devicetree/bindings/media/video-interfaces.txt diff --git a/Documentation/devicetree/bindings/display/panel/samsung,s6e8aa0.txt b/Documentation/devicetree/bindings/display/panel/samsung,s6e8aa0.txt index 25701c81b5e0..9e766c5f86da 100644 --- a/Documentation/devicetree/bindings/display/panel/samsung,s6e8aa0.txt +++ b/Documentation/devicetree/bindings/display/panel/samsung,s6e8aa0.txt @@ -21,7 +21,7 @@ The device node can contain one 'port' child node with one child 'endpoint' node, according to the bindings defined in [2]. This node should describe panel's video bus. -[1]: Documentation/devicetree/bindings/display/display-timing.txt +[1]: Documentation/devicetree/bindings/display/panel/display-timing.txt [2]: Documentation/devicetree/bindings/media/video-interfaces.txt Example: diff --git a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt index 01cced1c2a18..47665a12786f 100644 --- a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt +++ b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt @@ -35,7 +35,7 @@ Optional property for different chips: Required elements: "grf" For the below properties, please refer to Analogix DP binding document: - * Documentation/devicetree/bindings/drm/bridge/analogix_dp.txt + * Documentation/devicetree/bindings/display/bridge/analogix_dp.txt - phys (required) - phy-names (required) - hpd-gpios (optional) diff --git a/Documentation/devicetree/bindings/display/tilcdc/panel.txt b/Documentation/devicetree/bindings/display/tilcdc/panel.txt index f20b31cdc59a..808216310ea2 100644 --- a/Documentation/devicetree/bindings/display/tilcdc/panel.txt +++ b/Documentation/devicetree/bindings/display/tilcdc/panel.txt @@ -15,7 +15,7 @@ Required properties: - display-timings: typical videomode of lcd panel. Multiple video modes can be listed if the panel supports multiple timings, but the 'native-mode' should be the preferred/default resolution. Refer to - Documentation/devicetree/bindings/display/display-timing.txt for display + Documentation/devicetree/bindings/display/panel/display-timing.txt for display timing binding details. Optional properties: diff --git a/Documentation/devicetree/bindings/gpio/cortina,gemini-gpio.txt b/Documentation/devicetree/bindings/gpio/cortina,gemini-gpio.txt new file mode 100644 index 000000000000..5c9246c054e5 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/cortina,gemini-gpio.txt @@ -0,0 +1,24 @@ +Cortina Systems Gemini GPIO Controller + +Required properties: + +- compatible : Must be "cortina,gemini-gpio" +- reg : Should contain registers location and length +- interrupts : Should contain the interrupt line for the GPIO block +- gpio-controller : marks this as a GPIO controller +- #gpio-cells : Should be 2, see gpio/gpio.txt +- interrupt-controller : marks this as an interrupt controller +- #interrupt-cells : a standard two-cell interrupt flag, see + interrupt-controller/interrupts.txt + +Example: + +gpio@4d000000 { + compatible = "cortina,gemini-gpio"; + reg = <0x4d000000 0x100>; + interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; +}; diff --git a/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt b/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt index 08dd15f89ba9..e63935710011 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt +++ b/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt @@ -29,6 +29,10 @@ Required properties: onsemi,pca9654 exar,xra1202 +Optional properties: + - reset-gpios: GPIO specification for the RESET input. This is an + active low signal to the PCA953x. + Example: diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt index 68d28f62a6f4..84ede036f73d 100644 --- a/Documentation/devicetree/bindings/gpio/gpio.txt +++ b/Documentation/devicetree/bindings/gpio/gpio.txt @@ -187,10 +187,10 @@ gpio-controller's driver probe function. Each GPIO hog definition is represented as a child node of the GPIO controller. Required properties: -- gpio-hog: A property specifying that this child node represent a GPIO hog. -- gpios: Store the GPIO information (id, flags, ...). Shall contain the - number of cells specified in its parent node (GPIO controller - node). +- gpio-hog: A property specifying that this child node represents a GPIO hog. +- gpios: Store the GPIO information (id, flags, ...) for each GPIO to + affect. Shall contain an integer multiple of the number of cells + specified in its parent node (GPIO controller node). Only one of the following properties scanned in the order shown below. This means that when multiple properties are present they will be searched in the order presented below and the first match is taken as the intended diff --git a/Documentation/devicetree/bindings/i2c/trivial-devices.txt b/Documentation/devicetree/bindings/i2c/trivial-devices.txt index cdd7b48826c3..ad10fbe61562 100644 --- a/Documentation/devicetree/bindings/i2c/trivial-devices.txt +++ b/Documentation/devicetree/bindings/i2c/trivial-devices.txt @@ -36,6 +36,7 @@ dallas,ds1775 Tiny Digital Thermometer and Thermostat dallas,ds3232 Extremely Accurate I²C RTC with Integrated Crystal and SRAM dallas,ds4510 CPU Supervisor with Nonvolatile Memory and Programmable I/O dallas,ds75 Digital Thermometer and Thermostat +devantech,srf08 Devantech SRF08 ultrasonic ranger dlg,da9053 DA9053: flexible system level PMIC with multicore support dlg,da9063 DA9063: system PMIC for quad-core application processors domintech,dmard09 DMARD09: 3-axis Accelerometer diff --git a/Documentation/devicetree/bindings/iio/accel/lis302.txt b/Documentation/devicetree/bindings/iio/accel/lis302.txt index 2a19bff9693f..dfdce67826ba 100644 --- a/Documentation/devicetree/bindings/iio/accel/lis302.txt +++ b/Documentation/devicetree/bindings/iio/accel/lis302.txt @@ -5,7 +5,7 @@ that apply in on the generic device (independent from the bus). Required properties for the SPI bindings: - - compatible: should be set to "st,lis3lv02d_spi" + - compatible: should be set to "st,lis3lv02d-spi" - reg: the chipselect index - spi-max-frequency: maximal bus speed, should be set to 1000000 unless constrained by external circuitry diff --git a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt new file mode 100644 index 000000000000..f9e3ff2c656e --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt @@ -0,0 +1,32 @@ +* Amlogic Meson SAR (Successive Approximation Register) A/D converter + +Required properties: +- compatible: depending on the SoC this should be one of: + - "amlogic,meson-gxbb-saradc" for GXBB + - "amlogic,meson-gxl-saradc" for GXL + - "amlogic,meson-gxm-saradc" for GXM + along with the generic "amlogic,meson-saradc" +- reg: the physical base address and length of the registers +- clocks: phandle and clock identifier (see clock-names) +- clock-names: mandatory clocks: + - "clkin" for the reference clock (typically XTAL) + - "core" for the SAR ADC core clock + optional clocks: + - "sana" for the analog clock + - "adc_clk" for the ADC (sampling) clock + - "adc_sel" for the ADC (sampling) clock mux +- vref-supply: the regulator supply for the ADC reference voltage +- #io-channel-cells: must be 1, see ../iio-bindings.txt + +Example: + saradc: adc@8680 { + compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc"; + #io-channel-cells = <1>; + reg = <0x0 0x8680 0x0 0x34>; + clocks = <&xtal>, + <&clkc CLKID_SAR_ADC>, + <&clkc CLKID_SANA>, + <&clkc CLKID_SAR_ADC_CLK>, + <&clkc CLKID_SAR_ADC_SEL>; + clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel"; + }; diff --git a/Documentation/devicetree/bindings/iio/adc/avia-hx711.txt b/Documentation/devicetree/bindings/iio/adc/avia-hx711.txt new file mode 100644 index 000000000000..b3629405f568 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/avia-hx711.txt @@ -0,0 +1,18 @@ +* AVIA HX711 ADC chip for weight cells + Bit-banging driver + +Required properties: + - compatible: Should be "avia,hx711" + - sck-gpios: Definition of the GPIO for the clock + - dout-gpios: Definition of the GPIO for data-out + See Documentation/devicetree/bindings/gpio/gpio.txt + - avdd-supply: Definition of the regulator used as analog supply + +Example: +weight@0 { + compatible = "avia,hx711"; + sck-gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>; + dout-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; + avdd-suppy = <&avdd>; +}; + diff --git a/Documentation/devicetree/bindings/iio/adc/max11100.txt b/Documentation/devicetree/bindings/iio/adc/max11100.txt new file mode 100644 index 000000000000..b7f7177b8aca --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/max11100.txt @@ -0,0 +1,18 @@ +* Maxim max11100 Analog to Digital Converter (ADC) + +Required properties: + - compatible: Should be "maxim,max11100" + - reg: the adc unit address + - vref-supply: phandle to the regulator that provides reference voltage + +Optional properties: + - spi-max-frequency: SPI maximum frequency + +Example: + +max11100: adc@0 { + compatible = "maxim,max11100"; + reg = <0>; + vref-supply = <&adc0_vref>; + spi-max-frequency = <240000>; +}; diff --git a/Documentation/devicetree/bindings/iio/adc/qcom,pm8xxx-xoadc.txt b/Documentation/devicetree/bindings/iio/adc/qcom,pm8xxx-xoadc.txt new file mode 100644 index 000000000000..53cd146d8096 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/qcom,pm8xxx-xoadc.txt @@ -0,0 +1,149 @@ +Qualcomm's PM8xxx voltage XOADC + +The Qualcomm PM8xxx PMICs contain a HK/XO ADC (Housekeeping/Crystal +oscillator ADC) encompassing PM8018, PM8038, PM8058 and PM8921. + +Required properties: + +- compatible: should be one of: + "qcom,pm8018-adc" + "qcom,pm8038-adc" + "qcom,pm8058-adc" + "qcom,pm8921-adc" + +- reg: should contain the ADC base address in the PMIC, typically + 0x197. + +- xoadc-ref-supply: should reference a regulator that can supply + a reference voltage on demand. The reference voltage may vary + with PMIC variant but is typically something like 2.2 or 1.8V. + +The following required properties are standard for IO channels, see +iio-bindings.txt for more details: + +- #address-cells: should be set to <1> + +- #size-cells: should be set to <0> + +- #io-channel-cells: should be set to <1> + +- interrupts: should refer to the parent PMIC interrupt controller + and reference the proper ADC interrupt. + +Required subnodes: + +The ADC channels are configured as subnodes of the ADC. Since some of +them are used for calibrating the ADC, these nodes are compulsory: + +adc-channel@c { + reg = <0x0c>; +}; + +adc-channel@d { + reg = <0x0d>; +}; + +adc-channel@f { + reg = <0x0f>; +}; + +These three nodes are used for absolute and ratiometric calibration +and only need to have these reg values: they are by hardware definition +1:1 ratio converters that sample 625, 1250 and 0 milliV and create +an interpolation calibration for all other ADCs. + +Optional subnodes: any channels other than channel 0x0c, 0x0d and +0x0f are optional. + +Required channel node properties: + +- reg: should contain the hardware channel number in the range + 0 .. 0x0f (4 bits). The hardware only supports 16 channels. + +Optional channel node properties: + +- qcom,decimation: + Value type: <u32> + Definition: This parameter is used to decrease the ADC sampling rate. + Quicker measurements can be made by reducing the decimation ratio. + Valid values are 512, 1024, 2048, 4096. + If the property is not found, a default value of 512 will be used. + +- qcom,ratiometric: + Value type: <u32> + Definition: Channel calibration type. If this property is specified + VADC will use a special voltage references for channel + calibration. The available references are specified in the + as a u32 value setting (see below) and it is compulsory + to also specify this reference if ratiometric calibration + is selected. + + If the property is not found, the channel will be + calibrated with the 0.625V and 1.25V reference channels, also + known as an absolute calibration. + The reference voltage pairs when using ratiometric calibration: + 0 = XO_IN/XOADC_GND + 1 = PMIC_IN/XOADC_GND + 2 = PMIC_IN/BMS_CSP + 3 (invalid) + 4 = XOADC_GND/XOADC_GND + 5 = XOADC_VREF/XOADC_GND + +Example: + +xoadc: xoadc@197 { + compatible = "qcom,pm8058-adc"; + reg = <0x197>; + interrupt-parent = <&pm8058>; + interrupts = <76 1>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + + vcoin: adc-channel@0 { + reg = <0x00>; + }; + vbat: adc-channel@1 { + reg = <0x01>; + }; + dcin: adc-channel@2 { + reg = <0x02>; + }; + ichg: adc-channel@3 { + reg = <0x03>; + }; + vph_pwr: adc-channel@4 { + reg = <0x04>; + }; + usb_vbus: adc-channel@a { + reg = <0x0a>; + }; + die_temp: adc-channel@b { + reg = <0x0b>; + }; + ref_625mv: adc-channel@c { + reg = <0x0c>; + }; + ref_1250mv: adc-channel@d { + reg = <0x0d>; + }; + ref_325mv: adc-channel@e { + reg = <0x0e>; + }; + ref_muxoff: adc-channel@f { + reg = <0x0f>; + }; +}; + + +/* IIO client node */ +iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&xoadc 0x01>, /* Battery */ + <&xoadc 0x02>, /* DC in (charger) */ + <&xoadc 0x04>, /* VPH the main system voltage */ + <&xoadc 0x0b>, /* Die temperature */ + <&xoadc 0x0c>, /* Reference voltage 1.25V */ + <&xoadc 0x0d>, /* Reference voltage 0.625V */ + <&xoadc 0x0e>; /* Reference voltage 0.325V */ +}; diff --git a/Documentation/devicetree/bindings/iio/adc/renesas,gyroadc.txt b/Documentation/devicetree/bindings/iio/adc/renesas,gyroadc.txt new file mode 100644 index 000000000000..f5b0adae6010 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/renesas,gyroadc.txt @@ -0,0 +1,99 @@ +* Renesas RCar GyroADC device driver + +The GyroADC block is a reduced SPI block with up to 8 chipselect lines, +which supports the SPI protocol of a selected few SPI ADCs. The SPI ADCs +are sampled by the GyroADC block in a round-robin fashion and the result +presented in the GyroADC registers. + +Required properties: +- compatible: Should be "<soc-specific>", "renesas,rcar-gyroadc". + The <soc-specific> should be one of: + renesas,r8a7791-gyroadc - for the GyroADC block present + in r8a7791 SoC + renesas,r8a7792-gyroadc - for the GyroADC with interrupt + block present in r8a7792 SoC +- reg: Address and length of the register set for the device +- clocks: References to all the clocks specified in the clock-names + property as specified in + Documentation/devicetree/bindings/clock/clock-bindings.txt. +- clock-names: Shall contain "fck" and "if". The "fck" is the GyroADC block + clock, the "if" is the interface clock. +- power-domains: Must contain a reference to the PM domain, if available. +- #address-cells: Should be <1> (setting for the subnodes) for all ADCs + except for "fujitsu,mb88101a". Should be <0> (setting for + only subnode) for "fujitsu,mb88101a". +- #size-cells: Should be <0> (setting for the subnodes) + +Sub-nodes: +You must define subnode(s) which select the connected ADC type and reference +voltage for the GyroADC channels. + +Required properties for subnodes: +- compatible: Should be either of: + "fujitsu,mb88101a" + - Fujitsu MB88101A compatible mode, + 12bit sampling, up to 4 channels can be sampled in + round-robin fashion. One Fujitsu chip supplies four + GyroADC channels with data as it contains four ADCs + on the chip and thus for 4-channel operation, single + MB88101A is required. The Cx chipselect lines of the + MB88101A connect directly to two CHS lines of the + GyroADC, no demuxer is required. The data out line + of each MB88101A connects to a shared input pin of + the GyroADC. + "ti,adcs7476" or "ti,adc121" or "adi,ad7476" + - TI ADCS7476 / TI ADC121 / ADI AD7476 compatible mode, + 15bit sampling, up to 8 channels can be sampled in + round-robin fashion. One TI/ADI chip supplies single + ADC channel with data, thus for 8-channel operation, + 8 chips are required. A 3:8 chipselect demuxer is + required to connect the nCS line of the TI/ADI chips + to the GyroADC, while MISO line of each TI/ADI ADC + connects to a shared input pin of the GyroADC. + "maxim,max1162" or "maxim,max11100" + - Maxim MAX1162 / Maxim MAX11100 compatible mode, + 16bit sampling, up to 8 channels can be sampled in + round-robin fashion. One Maxim chip supplies single + ADC channel with data, thus for 8-channel operation, + 8 chips are required. A 3:8 chipselect demuxer is + required to connect the nCS line of the MAX chips + to the GyroADC, while MISO line of each Maxim ADC + connects to a shared input pin of the GyroADC. +- reg: Should be the number of the analog input. Should be present + for all ADCs except "fujitsu,mb88101a". +- vref-supply: Reference to the channel reference voltage regulator. + +Example: + vref_max1162: regulator-vref-max1162 { + compatible = "regulator-fixed"; + + regulator-name = "MAX1162 Vref"; + regulator-min-microvolt = <4096000>; + regulator-max-microvolt = <4096000>; + }; + + adc@e6e54000 { + compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc"; + reg = <0 0xe6e54000 0 64>; + clocks = <&mstp9_clks R8A7791_CLK_GYROADC>, <&clk_65m>; + clock-names = "fck", "if"; + power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; + + pinctrl-0 = <&adc_pins>; + pinctrl-names = "default"; + + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + reg = <0>; + compatible = "maxim,max1162"; + vref-supply = <&vref_max1162>; + }; + + adc@1 { + reg = <1>; + compatible = "maxim,max1162"; + vref-supply = <&vref_max1162>; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt index 49ed82e89870..5dfc88ec24a4 100644 --- a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt +++ b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt @@ -53,6 +53,11 @@ Required properties: - #io-channel-cells = <1>: See the IIO bindings section "IIO consumers" in Documentation/devicetree/bindings/iio/iio-bindings.txt +Optional properties: +- dmas: Phandle to dma channel for this ADC instance. + See ../../dma/dma.txt for details. +- dma-names: Must be "rx" when dmas property is being used. + Example: adc: adc@40012000 { compatible = "st,stm32f4-adc-core"; @@ -77,6 +82,8 @@ Example: interrupt-parent = <&adc>; interrupts = <0>; st,adc-channels = <8>; + dmas = <&dma2 0 0 0x400 0x0>; + dma-names = "rx"; }; ... other adc child nodes follow... diff --git a/Documentation/devicetree/bindings/iio/adc/ti-ads7950.txt b/Documentation/devicetree/bindings/iio/adc/ti-ads7950.txt new file mode 100644 index 000000000000..e77a6f7e1001 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/ti-ads7950.txt @@ -0,0 +1,23 @@ +* Texas Instruments ADS7950 family of A/DC chips + +Required properties: + - compatible: Must be one of "ti,ads7950", "ti,ads7951", "ti,ads7952", + "ti,ads7953", "ti,ads7954", "ti,ads7955", "ti,ads7956", "ti,ads7957", + "ti,ads7958", "ti,ads7959", "ti,ads7960", or "ti,ads7961" + - reg: SPI chip select number for the device + - #io-channel-cells: Must be 1 as per ../iio-bindings.txt + - vref-supply: phandle to a regulator node that supplies the 2.5V or 5V + reference voltage + +Recommended properties: + - spi-max-frequency: Definition as per + Documentation/devicetree/bindings/spi/spi-bus.txt + +Example: +adc@0 { + compatible = "ti,ads7957"; + reg = <0>; + #io-channel-cells = <1>; + vref-supply = <&refin_supply>; + spi-max-frequency = <10000000>; +}; diff --git a/Documentation/devicetree/bindings/iio/imu/bmi160.txt b/Documentation/devicetree/bindings/iio/imu/bmi160.txt new file mode 100644 index 000000000000..ae0112c7debc --- /dev/null +++ b/Documentation/devicetree/bindings/iio/imu/bmi160.txt @@ -0,0 +1,36 @@ +Bosch BMI160 - Inertial Measurement Unit with Accelerometer, Gyroscope +and externally connectable Magnetometer + +https://www.bosch-sensortec.com/bst/products/all_products/bmi160 + +Required properties: + - compatible : should be "bosch,bmi160" + - reg : the I2C address or SPI chip select number of the sensor + - spi-max-frequency : set maximum clock frequency (only for SPI) + +Optional properties: + - interrupt-parent : should be the phandle of the interrupt controller + - interrupts : interrupt mapping for IRQ, must be IRQ_TYPE_LEVEL_LOW + - interrupt-names : set to "INT1" if INT1 pin should be used as interrupt + input, set to "INT2" if INT2 pin should be used instead + +Examples: + +bmi160@68 { + compatible = "bosch,bmi160"; + reg = <0x68>; + + interrupt-parent = <&gpio4>; + interrupts = <12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "INT1"; +}; + +bmi160@0 { + compatible = "bosch,bmi160"; + reg = <0>; + spi-max-frequency = <10000000>; + + interrupt-parent = <&gpio2>; + interrupts = <12 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "INT2"; +}; diff --git a/Documentation/devicetree/bindings/iio/imu/st_lsm6dsx.txt b/Documentation/devicetree/bindings/iio/imu/st_lsm6dsx.txt new file mode 100644 index 000000000000..cf81afdf7803 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/imu/st_lsm6dsx.txt @@ -0,0 +1,26 @@ +* ST_LSM6DSx driver for STM 6-axis (acc + gyro) imu Mems sensors + +Required properties: +- compatible: must be one of: + "st,lsm6ds3" + "st,lsm6dsm" +- reg: i2c address of the sensor / spi cs line + +Optional properties: +- st,drdy-int-pin: the pin on the package that will be used to signal + "data ready" (valid values: 1 or 2). +- interrupt-parent: should be the phandle for the interrupt controller +- interrupts: interrupt mapping for IRQ. It should be configured with + flags IRQ_TYPE_LEVEL_HIGH or IRQ_TYPE_EDGE_RISING. + + Refer to interrupt-controller/interrupts.txt for generic interrupt + client node bindings. + +Example: + +lsm6dsm@6b { + compatible = "st,lsm6dsm"; + reg = <0x6b>; + interrupt-parent = <&gpio0>; + interrupts = <0 IRQ_TYPE_EDGE_RISING>; +}; diff --git a/Documentation/devicetree/bindings/iio/light/cm3605.txt b/Documentation/devicetree/bindings/iio/light/cm3605.txt new file mode 100644 index 000000000000..56331a79f9ab --- /dev/null +++ b/Documentation/devicetree/bindings/iio/light/cm3605.txt @@ -0,0 +1,41 @@ +Capella Microsystems CM3605 +Ambient Light and Short Distance Proximity Sensor + +The CM3605 is an entirely analog part which however require quite a bit of +software logic to interface a host operating system. + +This ALS and proximity sensor was one of the very first deployed in mobile +handsets, notably it is used in the very first Nexus One Android phone from +2010. + +Required properties: +- compatible: must be: "capella,cm3605" +- aset-gpios: GPIO line controlling the ASET line (drive low + to activate the ALS, should be flagged GPIO_ACTIVE_LOW) +- interrupts: the IRQ line (such as a GPIO) that is connected to + the POUT (proximity sensor out) line. The edge detection must + be set to IRQ_TYPE_EDGE_BOTH so as to detect movements toward + and away from the proximity sensor. +- io-channels: the ADC channel used for converting the voltage from + AOUT to a digital representation. +- io-channel-names: must be "aout" + +Optional properties: +- vdd-supply: regulator supplying VDD power to the component. +- capella,aset-resistance-ohms: the sensitivity calibration resistance, + in Ohms. Valid values are: 50000, 100000, 300000 and 600000, + as these are the resistance values that we are supplied with + calibration curves for. If not supplied, 100 kOhm will be assumed + but it is strongly recommended to supply this. + +Example: + +cm3605 { + compatible = "capella,cm3605"; + vdd-supply = <&foo_reg>; + aset-gpios = <&foo_gpio 1 GPIO_ACTIVE_LOW>; + capella,aset-resistance-ohms = <100000>; + interrupts = <1 IRQ_TYPE_EDGE_BOTH>; + io-channels = <&adc 0x01>; + io-channel-names = "aout"; +}; diff --git a/Documentation/devicetree/bindings/iio/potentiometer/max5481.txt b/Documentation/devicetree/bindings/iio/potentiometer/max5481.txt new file mode 100644 index 000000000000..6a91b106e076 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/potentiometer/max5481.txt @@ -0,0 +1,23 @@ +* Maxim Linear-Taper Digital Potentiometer MAX5481-MAX5484 + +The node for this driver must be a child node of a SPI controller, hence +all mandatory properties described in + + Documentation/devicetree/bindings/spi/spi-bus.txt + +must be specified. + +Required properties: + - compatible: Must be one of the following, depending on the + model: + "maxim,max5481" + "maxim,max5482" + "maxim,max5483" + "maxim,max5484" + +Example: +max548x: max548x@0 { + compatible = "maxim,max5482"; + spi-max-frequency = <7000000>; + reg = <0>; /* chip-select */ +}; diff --git a/Documentation/devicetree/bindings/iio/st-sensors.txt b/Documentation/devicetree/bindings/iio/st-sensors.txt index c040c9ad1889..eaa8fbba34e2 100644 --- a/Documentation/devicetree/bindings/iio/st-sensors.txt +++ b/Documentation/devicetree/bindings/iio/st-sensors.txt @@ -27,6 +27,8 @@ standard bindings from pinctrl/pinctrl-bindings.txt. Valid compatible strings: Accelerometers: +- st,lis3lv02d (deprecated, use st,lis3lv02dl-accel) +- st,lis302dl-spi (deprecated, use st,lis3lv02dl-accel) - st,lis3lv02dl-accel - st,lsm303dlh-accel - st,lsm303dlhc-accel diff --git a/Documentation/devicetree/bindings/iio/temperature/tmp007.txt b/Documentation/devicetree/bindings/iio/temperature/tmp007.txt new file mode 100644 index 000000000000..b63aba91ef03 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/temperature/tmp007.txt @@ -0,0 +1,35 @@ +* TI TMP007 - IR thermopile sensor with integrated math engine + +Link to datasheet: http://www.ti.com/lit/ds/symlink/tmp007.pdf + +Required properties: + + - compatible: should be "ti,tmp007" + - reg: the I2C address of the sensor (changeable via ADR pins) + ------------------------------ + |ADR1 | ADR0 | Device Address| + ------------------------------ + 0 0 0x40 + 0 1 0x41 + 0 SDA 0x42 + 0 SCL 0x43 + 1 0 0x44 + 1 1 0x45 + 1 SDA 0x46 + 1 SCL 0x47 + +Optional properties: + + - interrupt-parent: should be the phandle for the interrupt controller + + - interrupts: interrupt mapping for GPIO IRQ (level active low) + +Example: + +tmp007@40 { + compatible = "ti,tmp007"; + reg = <0x40>; + interrupt-parent = <&gpio0>; + interrupts = <5 0x08>; +}; + diff --git a/Documentation/devicetree/bindings/iio/timer/stm32-timer-trigger.txt b/Documentation/devicetree/bindings/iio/timer/stm32-timer-trigger.txt new file mode 100644 index 000000000000..55a653d15303 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/timer/stm32-timer-trigger.txt @@ -0,0 +1,23 @@ +STMicroelectronics STM32 Timers IIO timer bindings + +Must be a sub-node of an STM32 Timers device tree node. +See ../mfd/stm32-timers.txt for details about the parent node. + +Required parameters: +- compatible: Must be "st,stm32-timer-trigger". +- reg: Identify trigger hardware block. + +Example: + timers@40010000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40010000 0x400>; + clocks = <&rcc 0 160>; + clock-names = "clk_int"; + + timer@0 { + compatible = "st,stm32-timer-trigger"; + reg = <0>; + }; + }; diff --git a/Documentation/devicetree/bindings/input/cypress,tm2-touchkey.txt b/Documentation/devicetree/bindings/input/cypress,tm2-touchkey.txt new file mode 100644 index 000000000000..635f62c756ee --- /dev/null +++ b/Documentation/devicetree/bindings/input/cypress,tm2-touchkey.txt @@ -0,0 +1,27 @@ +Samsung tm2-touchkey + +Required properties: +- compatible: must be "cypress,tm2-touchkey" +- reg: I2C address of the chip. +- interrupt-parent: a phandle for the interrupt controller (see interrupt + binding[0]). +- interrupts: interrupt to which the chip is connected (see interrupt + binding[0]). +- vcc-supply : internal regulator output. 1.8V +- vdd-supply : power supply for IC 3.3V + +[0]: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt + +Example: + &i2c0 { + /* ... */ + + touchkey@20 { + compatible = "cypress,tm2-touchkey"; + reg = <0x20>; + interrupt-parent = <&gpa3>; + interrupts = <2 IRQ_TYPE_EDGE_FALLING>; + vcc-supply=<&ldo32_reg>; + vdd-supply=<&ldo33_reg>; + }; + }; diff --git a/Documentation/devicetree/bindings/input/mpr121-touchkey.txt b/Documentation/devicetree/bindings/input/mpr121-touchkey.txt new file mode 100644 index 000000000000..b7c61ee5841b --- /dev/null +++ b/Documentation/devicetree/bindings/input/mpr121-touchkey.txt @@ -0,0 +1,30 @@ +* Freescale MPR121 Controllor + +Required Properties: +- compatible: Should be "fsl,mpr121-touchkey" +- reg: The I2C slave address of the device. +- interrupts: The interrupt number to the cpu. +- vdd-supply: Phandle to the Vdd power supply. +- linux,keycodes: Specifies an array of numeric keycode values to + be used for reporting button presses. The array can + contain up to 12 entries. + +Optional Properties: +- wakeup-source: Use any event on keypad as wakeup event. +- autorepeat: Enable autorepeat feature. + +Example: + +#include "dt-bindings/input/input.h" + + touchkey: mpr121@5a { + compatible = "fsl,mpr121-touchkey"; + reg = <0x5a>; + interrupt-parent = <&gpio1>; + interrupts = <28 2>; + autorepeat; + vdd-supply = <&ldo4_reg>; + linux,keycodes = <KEY_0>, <KEY_1>, <KEY_2>, <KEY_3>, + <KEY_4> <KEY_5>, <KEY_6>, <KEY_7>, + <KEY_8>, <KEY_9>, <KEY_A>, <KEY_B>; + }; diff --git a/Documentation/devicetree/bindings/input/pwm-beeper.txt b/Documentation/devicetree/bindings/input/pwm-beeper.txt index be332ae4f2d6..529408b4431a 100644 --- a/Documentation/devicetree/bindings/input/pwm-beeper.txt +++ b/Documentation/devicetree/bindings/input/pwm-beeper.txt @@ -5,3 +5,19 @@ Registers a PWM device as beeper. Required properties: - compatible: should be "pwm-beeper" - pwms: phandle to the physical PWM device + +Optional properties: +- amp-supply: phandle to a regulator that acts as an amplifier for the beeper + +Example: + +beeper_amp: amplifier { + compatible = "fixed-regulator"; + gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; +}; + +beeper { + compatible = "pwm-beeper"; + pwms = <&pwm0>; + amp-supply = <&beeper_amp>; +}; diff --git a/Documentation/devicetree/bindings/input/touchscreen/zet6223.txt b/Documentation/devicetree/bindings/input/touchscreen/zet6223.txt new file mode 100644 index 000000000000..fe6a1feef703 --- /dev/null +++ b/Documentation/devicetree/bindings/input/touchscreen/zet6223.txt @@ -0,0 +1,32 @@ +Zeitec ZET6223 I2C touchscreen controller + +Required properties: +- compatible : "zeitec,zet6223" +- reg : I2C slave address of the chip (0x76) +- interrupt-parent : a phandle pointing to the interrupt controller + serving the interrupt for this chip +- interrupts : interrupt specification for the zet6223 interrupt + +Optional properties: + +- vio-supply : Specification for VIO supply (1.8V or 3.3V, + depending on system interface needs). +- vcc-supply : Specification for 3.3V VCC supply. +- touchscreen-size-x : See touchscreen.txt +- touchscreen-size-y : See touchscreen.txt +- touchscreen-inverted-x : See touchscreen.txt +- touchscreen-inverted-y : See touchscreen.txt +- touchscreen-swapped-x-y : See touchscreen.txt + +Example: + +i2c@00000000 { + + zet6223: touchscreen@76 { + compatible = "zeitec,zet6223"; + reg = <0x76>; + interrupt-parent = <&pio>; + interrupts = <6 11 IRQ_TYPE_EDGE_FALLING> + }; + +}; diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt index e862d1485205..6cdf32d037fc 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt @@ -36,15 +36,15 @@ conditions. combined interrupt, it must be listed multiple times. - #iommu-cells : See Documentation/devicetree/bindings/iommu/iommu.txt - for details. With a value of 1, each "iommus" entry + for details. With a value of 1, each IOMMU specifier represents a distinct stream ID emitted by that device into the relevant SMMU. SMMUs with stream matching support and complex masters - may use a value of 2, where the second cell represents - an SMR mask to combine with the ID in the first cell. - Care must be taken to ensure the set of matched IDs - does not result in conflicts. + may use a value of 2, where the second cell of the + IOMMU specifier represents an SMR mask to combine with + the ID in the first cell. Care must be taken to ensure + the set of matched IDs does not result in conflicts. ** System MMU optional properties: diff --git a/Documentation/devicetree/bindings/mfd/as3722.txt b/Documentation/devicetree/bindings/mfd/as3722.txt index 4f64b2a73169..0b2a6099aa20 100644 --- a/Documentation/devicetree/bindings/mfd/as3722.txt +++ b/Documentation/devicetree/bindings/mfd/as3722.txt @@ -122,8 +122,7 @@ Following are properties of regulator subnode. Power-off: ========= -AS3722 supports the system power off by turning off all its rail. This -is provided through pm_power_off. +AS3722 supports the system power off by turning off all its rails. The device node should have the following properties to enable this functionality ams,system-power-controller: Boolean, to enable the power off functionality diff --git a/Documentation/devicetree/bindings/mfd/aspeed-gfx.txt b/Documentation/devicetree/bindings/mfd/aspeed-gfx.txt new file mode 100644 index 000000000000..aea5370efd97 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/aspeed-gfx.txt @@ -0,0 +1,17 @@ +* Device tree bindings for Aspeed SoC Display Controller (GFX) + +The Aspeed SoC Display Controller primarily does as its name suggests, but also +participates in pinmux requests on the g5 SoCs. It is therefore considered a +syscon device. + +Required properties: +- compatible: "aspeed,ast2500-gfx", "syscon" +- reg: contains offset/length value of the GFX memory + region. + +Example: + +gfx: display@1e6e6000 { + compatible = "aspeed,ast2500-gfx", "syscon"; + reg = <0x1e6e6000 0x1000>; +}; diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt new file mode 100644 index 000000000000..514d82ced95b --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt @@ -0,0 +1,137 @@ +====================================================================== +Device tree bindings for the Aspeed Low Pin Count (LPC) Bus Controller +====================================================================== + +The LPC bus is a means to bridge a host CPU to a number of low-bandwidth +peripheral devices, replacing the use of the ISA bus in the age of PCI[0]. The +primary use case of the Aspeed LPC controller is as a slave on the bus +(typically in a Baseboard Management Controller SoC), but under certain +conditions it can also take the role of bus master. + +The LPC controller is represented as a multi-function device to account for the +mix of functionality it provides. The principle split is between the register +layout at the start of the I/O space which is, to quote the Aspeed datasheet, +"basically compatible with the [LPC registers from the] popular BMC controller +H8S/2168[1]", and everything else, where everything else is an eclectic +collection of functions with a esoteric register layout. "Everything else", +here labeled the "host" portion of the controller, includes, but is not limited +to: + +* An IPMI Block Transfer[2] Controller + +* An LPC Host Controller: Manages LPC functions such as host vs slave mode, the + physical properties of some LPC pins, configuration of serial IRQs, and + APB-to-LPC bridging amonst other functions. + +* An LPC Host Interface Controller: Manages functions exposed to the host such + as LPC firmware hub cycles, configuration of the LPC-to-AHB mapping, UART + management and bus snoop configuration. + +* A set of SuperIO[3] scratch registers: Enables implementation of e.g. custom + hardware management protocols for handover between the host and baseboard + management controller. + +Additionally the state of the LPC controller influences the pinmux +configuration, therefore the host portion of the controller is exposed as a +syscon as a means to arbitrate access. + +[0] http://www.intel.com/design/chipsets/industry/25128901.pdf +[1] https://www.renesas.com/en-sg/doc/products/mpumcu/001/rej09b0078_h8s2168.pdf?key=7c88837454702128622bee53acbda8f4 +[2] http://www.intel.com/content/dam/www/public/us/en/documents/product-briefs/ipmi-second-gen-interface-spec-v2-rev1-1.pdf +[3] https://en.wikipedia.org/wiki/Super_I/O + +Required properties +=================== + +- compatible: One of: + "aspeed,ast2400-lpc", "simple-mfd" + "aspeed,ast2500-lpc", "simple-mfd" + +- reg: contains the physical address and length values of the Aspeed + LPC memory region. + +- #address-cells: <1> +- #size-cells: <1> +- ranges: Maps 0 to the physical address and length of the LPC memory + region + +Required LPC Child nodes +======================== + +BMC Node +-------- + +- compatible: One of: + "aspeed,ast2400-lpc-bmc" + "aspeed,ast2500-lpc-bmc" + +- reg: contains the physical address and length values of the + H8S/2168-compatible LPC controller memory region + +Host Node +--------- + +- compatible: One of: + "aspeed,ast2400-lpc-host", "simple-mfd", "syscon" + "aspeed,ast2500-lpc-host", "simple-mfd", "syscon" + +- reg: contains the address and length values of the host-related + register space for the Aspeed LPC controller + +- #address-cells: <1> +- #size-cells: <1> +- ranges: Maps 0 to the address and length of the host-related LPC memory + region + +Example: + +lpc: lpc@1e789000 { + compatible = "aspeed,ast2500-lpc", "simple-mfd"; + reg = <0x1e789000 0x1000>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1e789000 0x1000>; + + lpc_bmc: lpc-bmc@0 { + compatible = "aspeed,ast2500-lpc-bmc"; + reg = <0x0 0x80>; + }; + + lpc_host: lpc-host@80 { + compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"; + reg = <0x80 0x1e0>; + reg-io-width = <4>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x80 0x1e0>; + }; +}; + +Host Node Children +================== + +LPC Host Controller +------------------- + +The Aspeed LPC Host Controller configures the Low Pin Count (LPC) bus behaviour +between the host and the baseboard management controller. The registers exist +in the "host" portion of the Aspeed LPC controller, which must be the parent of +the LPC host controller node. + +Required properties: + +- compatible: One of: + "aspeed,ast2400-lhc"; + "aspeed,ast2500-lhc"; + +- reg: contains offset/length values of the LHC memory regions. In the + AST2400 and AST2500 there are two regions. + +Example: + +lhc: lhc@20 { + compatible = "aspeed,ast2500-lhc"; + reg = <0x20 0x24 0x48 0x8>; +}; diff --git a/Documentation/devicetree/bindings/mfd/mfd.txt b/Documentation/devicetree/bindings/mfd/mfd.txt index af9d6931a1a2..bcb6abb9d413 100644 --- a/Documentation/devicetree/bindings/mfd/mfd.txt +++ b/Documentation/devicetree/bindings/mfd/mfd.txt @@ -19,12 +19,22 @@ Optional properties: - compatible : "simple-mfd" - this signifies that the operating system should consider all subnodes of the MFD device as separate devices akin to how - "simple-bus" inidicates when to see subnodes as children for a simple + "simple-bus" indicates when to see subnodes as children for a simple memory-mapped bus. For more complex devices, when the nexus driver has to probe registers to figure out what child devices exist etc, this should not be used. In the latter case the child devices will be determined by the operating system. +- ranges: Describes the address mapping relationship to the parent. Should set + the child's base address to 0, the physical address within parent's address + space, and the length of the address map. + +- #address-cells: Specifies the number of cells used to represent physical base + addresses. Must be present if ranges is used. + +- #size-cells: Specifies the number of cells used to represent the size of an + address. Must be present if ranges is used. + Example: foo@1000 { diff --git a/Documentation/devicetree/bindings/mfd/motorola-cpcap.txt b/Documentation/devicetree/bindings/mfd/motorola-cpcap.txt new file mode 100644 index 000000000000..15bc885f9df4 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/motorola-cpcap.txt @@ -0,0 +1,31 @@ +Motorola CPCAP PMIC device tree binding + +Required properties: +- compatible : One or both of "motorola,cpcap" or "ste,6556002" +- reg : SPI chip select +- interrupt-parent : The parent interrupt controller +- interrupts : The interrupt line the device is connected to +- interrupt-controller : Marks the device node as an interrupt controller +- #interrupt-cells : The number of cells to describe an IRQ, should be 2 +- #address-cells : Child device offset number of cells, should be 1 +- #size-cells : Child device size number of cells, should be 0 +- spi-max-frequency : Typically set to 3000000 +- spi-cs-high : SPI chip select direction + +Example: + +&mcspi1 { + cpcap: pmic@0 { + compatible = "motorola,cpcap", "ste,6556002"; + reg = <0>; /* cs0 */ + interrupt-parent = <&gpio1>; + interrupts = <7 IRQ_TYPE_EDGE_RISING>; + interrupt-controller; + #interrupt-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <3000000>; + spi-cs-high; + }; +}; + diff --git a/Documentation/devicetree/bindings/mfd/mt6397.txt b/Documentation/devicetree/bindings/mfd/mt6397.txt index 949c85f8d02c..c568d52af5af 100644 --- a/Documentation/devicetree/bindings/mfd/mt6397.txt +++ b/Documentation/devicetree/bindings/mfd/mt6397.txt @@ -34,6 +34,10 @@ Optional subnodes: - clk Required properties: - compatible: "mediatek,mt6397-clk" +- led + Required properties: + - compatible: "mediatek,mt6323-led" + see Documentation/devicetree/bindings/leds/leds-mt6323.txt Example: pwrap: pwrap@1000f000 { diff --git a/Documentation/devicetree/bindings/mfd/omap-usb-host.txt b/Documentation/devicetree/bindings/mfd/omap-usb-host.txt index 4721b2d521e4..aa1eaa59581b 100644 --- a/Documentation/devicetree/bindings/mfd/omap-usb-host.txt +++ b/Documentation/devicetree/bindings/mfd/omap-usb-host.txt @@ -64,8 +64,8 @@ Required properties if child node exists: Properties for children: The OMAP HS USB Host subsystem contains EHCI and OHCI controllers. -See Documentation/devicetree/bindings/usb/omap-ehci.txt and -omap3-ohci.txt +See Documentation/devicetree/bindings/usb/ehci-omap.txt and +Documentation/devicetree/bindings/usb/ohci-omap3.txt. Example for OMAP4: diff --git a/Documentation/devicetree/bindings/mfd/stm32-timers.txt b/Documentation/devicetree/bindings/mfd/stm32-timers.txt new file mode 100644 index 000000000000..bbd083f5600a --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/stm32-timers.txt @@ -0,0 +1,46 @@ +STM32 Timers driver bindings + +This IP provides 3 types of timer along with PWM functionality: +- advanced-control timers consist of a 16-bit auto-reload counter driven by a programmable + prescaler, break input feature, PWM outputs and complementary PWM ouputs channels. +- general-purpose timers consist of a 16-bit or 32-bit auto-reload counter driven by a + programmable prescaler and PWM outputs. +- basic timers consist of a 16-bit auto-reload counter driven by a programmable prescaler. + +Required parameters: +- compatible: must be "st,stm32-timers" + +- reg: Physical base address and length of the controller's + registers. +- clock-names: Set to "int". +- clocks: Phandle to the clock used by the timer module. + For Clk properties, please refer to ../clock/clock-bindings.txt + +Optional parameters: +- resets: Phandle to the parent reset controller. + See ../reset/st,stm32-rcc.txt + +Optional subnodes: +- pwm: See ../pwm/pwm-stm32.txt +- timer: See ../iio/timer/stm32-timer-trigger.txt + +Example: + timers@40010000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40010000 0x400>; + clocks = <&rcc 0 160>; + clock-names = "clk_int"; + + pwm { + compatible = "st,stm32-pwm"; + pinctrl-0 = <&pwm1_pins>; + pinctrl-names = "default"; + }; + + timer@0 { + compatible = "st,stm32-timer-trigger"; + reg = <0>; + }; + }; diff --git a/Documentation/devicetree/bindings/misc/atmel-ssc.txt b/Documentation/devicetree/bindings/misc/atmel-ssc.txt index efc98ea1f23d..f8629bb73945 100644 --- a/Documentation/devicetree/bindings/misc/atmel-ssc.txt +++ b/Documentation/devicetree/bindings/misc/atmel-ssc.txt @@ -24,6 +24,8 @@ Optional properties: this parameter to choose where the clock from. - By default the clock is from TK pin, if the clock from RK pin, this property is needed. + - #sound-dai-cells: Should contain <0>. + - This property makes the SSC into an automatically registered DAI. Examples: - PDC transfer: diff --git a/Documentation/devicetree/bindings/misc/idt_89hpesx.txt b/Documentation/devicetree/bindings/misc/idt_89hpesx.txt new file mode 100644 index 000000000000..b9093b79ab7d --- /dev/null +++ b/Documentation/devicetree/bindings/misc/idt_89hpesx.txt @@ -0,0 +1,44 @@ +EEPROM / CSR SMBus-slave interface of IDT 89HPESx devices + +Required properties: + - compatible : should be "<manufacturer>,<type>" + Basically there is only one manufacturer: idt, but some + compatible devices may be produced in future. Following devices + are supported: 89hpes8nt2, 89hpes12nt3, 89hpes24nt6ag2, + 89hpes32nt8ag2, 89hpes32nt8bg2, 89hpes12nt12g2, 89hpes16nt16g2, + 89hpes24nt24g2, 89hpes32nt24ag2, 89hpes32nt24bg2; + 89hpes12n3, 89hpes12n3a, 89hpes24n3, 89hpes24n3a; + 89hpes32h8, 89hpes32h8g2, 89hpes48h12, 89hpes48h12g2, + 89hpes48h12ag2, 89hpes16h16, 89hpes22h16, 89hpes22h16g2, + 89hpes34h16, 89hpes34h16g2, 89hpes64h16, 89hpes64h16g2, + 89hpes64h16ag2; + 89hpes12t3g2, 89hpes24t3g2, 89hpes16t4, 89hpes4t4g2, + 89hpes10t4g2, 89hpes16t4g2, 89hpes16t4ag2, 89hpes5t5, + 89hpes6t5, 89hpes8t5, 89hpes8t5a, 89hpes24t6, 89hpes6t6g2, + 89hpes24t6g2, 89hpes16t7, 89hpes32t8, 89hpes32t8g2, + 89hpes48t12, 89hpes48t12g2. + - reg : I2C address of the IDT 89HPESx device. + +Optionally there can be EEPROM-compatible subnode: + - compatible: There are five EEPROM devices supported: 24c32, 24c64, 24c128, + 24c256 and 24c512 differed by size. + - reg: Custom address of EEPROM device (If not specified IDT 89HPESx + (optional) device will try to communicate with EEPROM sited by default + address - 0x50) + - read-only : Parameterless property disables writes to the EEPROM + (optional) + +Example: + idt@60 { + compatible = "idt,89hpes32nt8ag2"; + reg = <0x74>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@50 { + compatible = "onsemi,24c64"; + reg = <0x50>; + read-only; + }; + }; + diff --git a/Documentation/devicetree/bindings/net/marvell-pp2.txt b/Documentation/devicetree/bindings/net/marvell-pp2.txt index aa4f4230bfd7..4754364df4c6 100644 --- a/Documentation/devicetree/bindings/net/marvell-pp2.txt +++ b/Documentation/devicetree/bindings/net/marvell-pp2.txt @@ -27,9 +27,7 @@ Optional properties (port): - marvell,loopback: port is loopback mode - phy: a phandle to a phy node defining the PHY address (as the reg - property, a single integer). Note: if this property isn't present, - then fixed link is assumed, and the 'fixed-link' property is - mandatory. + property, a single integer). Example: diff --git a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt b/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt index 383d5889e95a..966a72ecc6bd 100644 --- a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt +++ b/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt @@ -1,13 +1,15 @@ Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings This binding represents the on-chip eFuse OTP controller found on -i.MX6Q/D, i.MX6DL/S, i.MX6SL, and i.MX6SX SoCs. +i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX and i.MX6UL SoCs. Required properties: - compatible: should be one of "fsl,imx6q-ocotp" (i.MX6Q/D/DL/S), "fsl,imx6sl-ocotp" (i.MX6SL), or - "fsl,imx6sx-ocotp" (i.MX6SX), followed by "syscon". + "fsl,imx6sx-ocotp" (i.MX6SX), + "fsl,imx6ul-ocotp" (i.MX6UL), + followed by "syscon". - reg: Should contain the register base and length. - clocks: Should contain a phandle pointing to the gated peripheral clock. diff --git a/Documentation/devicetree/bindings/pci/pci-iommu.txt b/Documentation/devicetree/bindings/pci/pci-iommu.txt index 56c829621b9a..0def586fdcdf 100644 --- a/Documentation/devicetree/bindings/pci/pci-iommu.txt +++ b/Documentation/devicetree/bindings/pci/pci-iommu.txt @@ -32,17 +32,17 @@ PCI root complex Optional properties ------------------- -- iommu-map: Maps a Requester ID to an IOMMU and associated iommu-specifier +- iommu-map: Maps a Requester ID to an IOMMU and associated IOMMU specifier data. The property is an arbitrary number of tuples of (rid-base,iommu,iommu-base,length). Any RID r in the interval [rid-base, rid-base + length) is associated with - the listed IOMMU, with the iommu-specifier (r - rid-base + iommu-base). + the listed IOMMU, with the IOMMU specifier (r - rid-base + iommu-base). - iommu-map-mask: A mask to be applied to each Requester ID prior to being - mapped to an iommu-specifier per the iommu-map property. + mapped to an IOMMU specifier per the iommu-map property. Example (1) diff --git a/Documentation/devicetree/bindings/phy/brcm,nsp-usb3-phy.txt b/Documentation/devicetree/bindings/phy/brcm,nsp-usb3-phy.txt new file mode 100644 index 000000000000..e68ae5dec9c9 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/brcm,nsp-usb3-phy.txt @@ -0,0 +1,39 @@ +Broadcom USB3 phy binding for northstar plus SoC +The USB3 phy is internal to the SoC and is accessed using mdio interface. + +Required mdio bus properties: +- reg: Should be 0x0 for SoC internal USB3 phy +- #address-cells: must be 1 +- #size-cells: must be 0 + +Required USB3 PHY properties: +- compatible: should be "brcm,nsp-usb3-phy" +- reg: USB3 Phy address on SoC internal MDIO bus and it should be 0x10. +- usb3-ctrl-syscon: handler of syscon node defining physical address + of usb3 control register. +- #phy-cells: must be 0 + +Required usb3 control properties: +- compatible: should be "brcm,nsp-usb3-ctrl" +- reg: offset and length of the control registers + +Example: + + mdio@0 { + reg = <0x0>; + #address-cells = <1>; + #size-cells = <0>; + + usb3_phy: usb-phy@10 { + compatible = "brcm,nsp-usb3-phy"; + reg = <0x10>; + usb3-ctrl-syscon = <&usb3_ctrl>; + #phy-cells = <0>; + status = "disabled"; + }; + }; + + usb3_ctrl: syscon@104408 { + compatible = "brcm,nsp-usb3-ctrl", "syscon"; + reg = <0x104408 0x3fc>; + }; diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt b/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt new file mode 100644 index 000000000000..b3b75c1e6285 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt @@ -0,0 +1,84 @@ +Qualcomm's USB HS PHY + +PROPERTIES + +- compatible: + Usage: required + Value type: <string> + Definition: Should contain "qcom,usb-hs-phy" and more specifically one of the + following: + + "qcom,usb-hs-phy-apq8064" + "qcom,usb-hs-phy-msm8916" + "qcom,usb-hs-phy-msm8974" + +- #phy-cells: + Usage: required + Value type: <u32> + Definition: Should contain 0 + +- clocks: + Usage: required + Value type: <prop-encoded-array> + Definition: Should contain clock specifier for the reference and sleep + clocks + +- clock-names: + Usage: required + Value type: <stringlist> + Definition: Should contain "ref" and "sleep" for the reference and sleep + clocks respectively + +- resets: + Usage: required + Value type: <prop-encoded-array> + Definition: Should contain the phy and POR resets + +- reset-names: + Usage: required + Value type: <stringlist> + Definition: Should contain "phy" and "por" for the phy and POR resets + respectively + +- v3p3-supply: + Usage: required + Value type: <phandle> + Definition: Should contain a reference to the 3.3V supply + +- v1p8-supply: + Usage: required + Value type: <phandle> + Definition: Should contain a reference to the 1.8V supply + +- extcon: + Usage: optional + Value type: <prop-encoded-array> + Definition: Should contain the vbus extcon + +- qcom,init-seq: + Usage: optional + Value type: <u8 array> + Definition: Should contain a sequence of ULPI address and value pairs to + program into the ULPI_EXT_VENDOR_SPECIFIC area. This is related + to Device Mode Eye Diagram test. The addresses are offsets + from the ULPI_EXT_VENDOR_SPECIFIC address, for example, + <0x1 0x53> would mean "write the value 0x53 to address 0x81". + +EXAMPLE + +otg: usb-controller { + ulpi { + phy { + compatible = "qcom,usb-hs-phy-msm8974", "qcom,usb-hs-phy"; + #phy-cells = <0>; + clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>; + clock-names = "ref", "sleep"; + resets = <&gcc GCC_USB2A_PHY_BCR>, <&otg 0>; + reset-names = "phy", "por"; + v3p3-supply = <&pm8941_l24>; + v1p8-supply = <&pm8941_l6>; + extcon = <&smbb>; + qcom,init-seq = /bits/ 8 <0x1 0x63>; + }; + }; +}; diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt new file mode 100644 index 000000000000..3c7cb2be4b12 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt @@ -0,0 +1,65 @@ +Qualcomm's USB HSIC PHY + +PROPERTIES + +- compatible: + Usage: required + Value type: <string> + Definition: Should contain "qcom,usb-hsic-phy" and more specifically one of the + following: + + "qcom,usb-hsic-phy-mdm9615" + "qcom,usb-hsic-phy-msm8974" + +- #phy-cells: + Usage: required + Value type: <u32> + Definition: Should contain 0 + +- clocks: + Usage: required + Value type: <prop-encoded-array> + Definition: Should contain clock specifier for phy, calibration and + a calibration sleep clock + +- clock-names: + Usage: required + Value type: <stringlist> + Definition: Should contain "phy, "cal" and "cal_sleep" + +- pinctrl-names: + Usage: required + Value type: <stringlist> + Definition: Should contain "init" and "default" in that order + +- pinctrl-0: + Usage: required + Value type: <prop-encoded-array> + Definition: List of pinctrl settings to apply to keep HSIC pins in a glitch + free state + +- pinctrl-1: + Usage: required + Value type: <prop-encoded-array> + Definition: List of pinctrl settings to apply to mux out the HSIC pins + +EXAMPLE + +usb-controller { + ulpi { + phy { + compatible = "qcom,usb-hsic-phy-msm8974", + "qcom,usb-hsic-phy"; + #phy-cells = <0>; + pinctrl-names = "init", "default"; + pinctrl-0 = <&hsic_sleep>; + pinctrl-1 = <&hsic_default>; + clocks = <&gcc GCC_USB_HSIC_CLK>, + <&gcc GCC_USB_HSIC_IO_CAL_CLK>, + <&gcc GCC_USB_HSIC_IO_CAL_SLEEP_CLK>; + clock-names = "phy", "cal", "cal_sleep"; + assigned-clocks = <&gcc GCC_USB_HSIC_IO_CAL_CLK>; + assigned-clock-rates = <960000>; + }; + }; +}; diff --git a/Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt b/Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt index 287150db6db4..e42334258185 100644 --- a/Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt +++ b/Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt @@ -10,6 +10,7 @@ Required properties: * allwinner,sun8i-a23-usb-phy * allwinner,sun8i-a33-usb-phy * allwinner,sun8i-h3-usb-phy + * allwinner,sun8i-v3s-usb-phy * allwinner,sun50i-a64-usb-phy - reg : a list of offset + length pairs - reg-names : diff --git a/Documentation/devicetree/bindings/power/reset/gpio-poweroff.txt b/Documentation/devicetree/bindings/power/reset/gpio-poweroff.txt index d4eab9227ea4..e62d53d844cc 100644 --- a/Documentation/devicetree/bindings/power/reset/gpio-poweroff.txt +++ b/Documentation/devicetree/bindings/power/reset/gpio-poweroff.txt @@ -2,12 +2,12 @@ Driver a GPIO line that can be used to turn the power off. The driver supports both level triggered and edge triggered power off. At driver load time, the driver will request the given gpio line and -install a pm_power_off handler. If the optional properties 'input' is -not found, the GPIO line will be driven in the inactive +install a handler to power off the system. If the optional properties +'input' is not found, the GPIO line will be driven in the inactive state. Otherwise its configured as an input. -When the pm_power_off is called, the gpio is configured as an output, -and drive active, so triggering a level triggered power off +When the power-off handler is called, the gpio is configured as an +output, and drive active, so triggering a level triggered power off condition. This will also cause an inactive->active edge condition, so triggering positive edge triggered power off. After a delay of 100ms, the GPIO is set to inactive, thus causing an active->inactive edge, @@ -24,7 +24,7 @@ Required properties: Optional properties: - input : Initially configure the GPIO line as an input. Only reconfigure - it to an output when the pm_power_off function is called. If this optional + it to an output when the power-off handler is called. If this optional property is not specified, the GPIO is initialized as an output in its inactive state. diff --git a/Documentation/devicetree/bindings/power/reset/qnap-poweroff.txt b/Documentation/devicetree/bindings/power/reset/qnap-poweroff.txt index af25e77c0e0c..c363d7173129 100644 --- a/Documentation/devicetree/bindings/power/reset/qnap-poweroff.txt +++ b/Documentation/devicetree/bindings/power/reset/qnap-poweroff.txt @@ -3,8 +3,7 @@ QNAP NAS devices have a microcontroller controlling the main power supply. This microcontroller is connected to UART1 of the Kirkwood and Orion5x SoCs. Sending the character 'A', at 19200 baud, tells the -microcontroller to turn the power off. This driver adds a handler to -pm_power_off which is called to turn the power off. +microcontroller to turn the power off. Synology NAS devices use a similar scheme, but a different baud rate, 9600, and a different character, '1'. diff --git a/Documentation/devicetree/bindings/pwm/pwm-stm32.txt b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt new file mode 100644 index 000000000000..6dd040363e5e --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-stm32.txt @@ -0,0 +1,35 @@ +STMicroelectronics STM32 Timers PWM bindings + +Must be a sub-node of an STM32 Timers device tree node. +See ../mfd/stm32-timers.txt for details about the parent node. + +Required parameters: +- compatible: Must be "st,stm32-pwm". +- pinctrl-names: Set to "default". +- pinctrl-0: List of phandles pointing to pin configuration nodes for PWM module. + For Pinctrl properties see ../pinctrl/pinctrl-bindings.txt + +Optional parameters: +- st,breakinput: One or two <index level filter> to describe break input configurations. + "index" indicates on which break input (0 or 1) the configuration + should be applied. + "level" gives the active level (0=low or 1=high) of the input signal + for this configuration. + "filter" gives the filtering value to be applied. + +Example: + timers@40010000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32-timers"; + reg = <0x40010000 0x400>; + clocks = <&rcc 0 160>; + clock-names = "clk_int"; + + pwm { + compatible = "st,stm32-pwm"; + pinctrl-0 = <&pwm1_pins>; + pinctrl-names = "default"; + st,breakinput = <0 1 5>; + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt index b85885a298d8..75ad7b8df0b1 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.txt @@ -9,6 +9,7 @@ on the Qualcomm ADSP Hexagon core. Definition: must be one of: "qcom,msm8974-adsp-pil" "qcom,msm8996-adsp-pil" + "qcom,msm8996-slpi-pil" - interrupts-extended: Usage: required @@ -24,13 +25,13 @@ on the Qualcomm ADSP Hexagon core. - clocks: Usage: required Value type: <prop-encoded-array> - Definition: reference to the xo clock to be held on behalf of the - booting Hexagon core + Definition: reference to the xo clock and optionally aggre2 clock to be + held on behalf of the booting Hexagon core - clock-names: Usage: required Value type: <stringlist> - Definition: must be "xo" + Definition: must be "xo" and optionally include "aggre2" - cx-supply: Usage: required @@ -38,6 +39,12 @@ on the Qualcomm ADSP Hexagon core. Definition: reference to the regulator to be held on behalf of the booting Hexagon core +- px-supply: + Usage: required + Value type: <phandle> + Definition: reference to the px regulator to be held on behalf of the + booting Hexagon core + - memory-region: Usage: required Value type: <phandle> @@ -96,3 +103,31 @@ ADSP, as it is found on MSM8974 boards. qcom,smd-edge = <1>; }; }; + +The following example describes the resources needed to boot control the +SLPI, as it is found on MSM8996 boards. + + slpi { + compatible = "qcom,msm8996-slpi-pil"; + interrupts-extended = <&intc 0 390 IRQ_TYPE_EDGE_RISING>, + <&slpi_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&slpi_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&slpi_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&slpi_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", + "fatal", + "ready", + "handover", + "stop-ack"; + + clocks = <&rpmcc MSM8996_RPM_SMD_XO_CLK_SRC>, + <&rpmcc MSM8996_RPM_SMD_AGGR2_NOC_CLK>; + clock-names = "xo", "aggre2"; + + cx-supply = <&pm8994_l26>; + px-supply = <&pm8994_lvs2>; + + memory-region = <&slpi_region>; + qcom,smem-states = <&slpi_smp2p_out 0>; + qcom,smem-state-names = "stop"; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 57cb49ec55ca..92347fe6890e 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -7,7 +7,9 @@ on the Qualcomm Hexagon core. Usage: required Value type: <string> Definition: must be one of: - "qcom,q6v5-pil" + "qcom,q6v5-pil", + "qcom,msm8916-mss-pil", + "qcom,msm8974-mss-pil" - reg: Usage: required diff --git a/Documentation/devicetree/bindings/serial/8250.txt b/Documentation/devicetree/bindings/serial/8250.txt index f86bb06c39e9..10276a46ecef 100644 --- a/Documentation/devicetree/bindings/serial/8250.txt +++ b/Documentation/devicetree/bindings/serial/8250.txt @@ -19,6 +19,7 @@ Required properties: - "altr,16550-FIFO128" - "fsl,16550-FIFO64" - "fsl,ns16550" + - "ti,da830-uart" - "serial" if the port type is unknown. - reg : offset and length of the register set for the device. - interrupts : should contain uart interrupt. diff --git a/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt b/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt index 1e82802d8e32..574c3a2c77d5 100644 --- a/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt +++ b/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt @@ -6,11 +6,13 @@ Required properties: - interrupts : Should contain uart interrupt Optional properties: -- uart-has-rtscts : Indicate the uart has rts and cts - fsl,irda-mode : Indicate the uart supports irda mode - fsl,dte-mode : Indicate the uart works in DTE mode. The uart works in DCE mode by default. +Please check Documentation/devicetree/bindings/serial/serial.txt +for the complete list of generic properties. + Note: Each uart controller should have an alias correctly numbered in "aliases" node. diff --git a/Documentation/devicetree/bindings/serial/serial.txt b/Documentation/devicetree/bindings/serial/serial.txt index fd970f76a7b8..b542a0ecf06e 100644 --- a/Documentation/devicetree/bindings/serial/serial.txt +++ b/Documentation/devicetree/bindings/serial/serial.txt @@ -23,7 +23,8 @@ Optional properties: they are available for use (wired and enabled by pinmux configuration). This depends on both the UART hardware and the board wiring. Note that this property is mutually-exclusive with "cts-gpios" and - "rts-gpios" above. + "rts-gpios" above, unless support is provided to switch between modes + dynamically. Examples: diff --git a/Documentation/devicetree/bindings/serial/slave-device.txt b/Documentation/devicetree/bindings/serial/slave-device.txt new file mode 100644 index 000000000000..f66037928f5f --- /dev/null +++ b/Documentation/devicetree/bindings/serial/slave-device.txt @@ -0,0 +1,36 @@ +Serial Slave Device DT binding + +This documents the binding structure and common properties for serial +attached devices. Common examples include Bluetooth, WiFi, NFC and GPS +devices. + +Serial attached devices shall be a child node of the host UART device the +slave device is attached to. It is expected that the attached device is +the only child node of the UART device. The slave device node name shall +reflect the generic type of device for the node. + +Required Properties: + +- compatible : A string reflecting the vendor and specific device the node + represents. + +Optional Properties: + +- max-speed : The maximum baud rate the device operates at. This should + only be present if the maximum is less than the slave device + can support. For example, a particular board has some signal + quality issue or the host processor can't support higher + baud rates. + +Example: + +serial@1234 { + compatible = "ns16550a"; + interrupts = <1>; + + bluetooth { + compatible = "brcm,bcm43341-bt"; + interrupt-parent = <&gpio>; + interrupts = <10>; + }; +}; diff --git a/Documentation/devicetree/bindings/soc/fsl/qman-portals.txt b/Documentation/devicetree/bindings/soc/fsl/qman-portals.txt index 47e46ccbc170..5a34f3ab7bea 100644 --- a/Documentation/devicetree/bindings/soc/fsl/qman-portals.txt +++ b/Documentation/devicetree/bindings/soc/fsl/qman-portals.txt @@ -5,7 +5,6 @@ Copyright (C) 2008 - 2014 Freescale Semiconductor Inc. CONTENTS - QMan Portal - - QMan Pool Channel - Example QMan Portal Node @@ -82,25 +81,6 @@ These subnodes should have the following properties: Definition: The phandle to the particular hardware device that this portal is connected to. -DPAA QMan Pool Channel Nodes - -Pool Channels are defined with the following properties. - -PROPERTIES - -- compatible - Usage: Required - Value type: <stringlist> - Definition: Must include "fsl,qman-pool-channel" - May include "fsl,<SoC>-qman-pool-channel" - -- fsl,qman-channel-id - Usage: Required - Value type: <u32> - Definition: The hardware index of the channel. This can also be - determined by dividing any of the channel's 8 work queue - IDs by 8 - EXAMPLE The example below shows a (P4080) QMan portals container/bus node with two portals diff --git a/Documentation/devicetree/bindings/sound/axentia,tse850-pcm5142.txt b/Documentation/devicetree/bindings/sound/axentia,tse850-pcm5142.txt index 5b9b38f578bb..fdb25b492514 100644 --- a/Documentation/devicetree/bindings/sound/axentia,tse850-pcm5142.txt +++ b/Documentation/devicetree/bindings/sound/axentia,tse850-pcm5142.txt @@ -2,8 +2,7 @@ Devicetree bindings for the Axentia TSE-850 audio complex Required properties: - compatible: "axentia,tse850-pcm5142" - - axentia,ssc-controller: The phandle of the atmel SSC controller used as - cpu dai. + - axentia,cpu-dai: The phandle of the cpu dai. - axentia,audio-codec: The phandle of the PCM5142 codec. - axentia,add-gpios: gpio specifier that controls the mixer. - axentia,loop1-gpios: gpio specifier that controls loop relays on channel 1. @@ -43,6 +42,12 @@ the PCM5142 codec. Example: + &ssc0 { + #sound-dai-cells = <0>; + + status = "okay"; + }; + &i2c { codec: pcm5142@4c { compatible = "ti,pcm5142"; @@ -77,7 +82,7 @@ Example: sound { compatible = "axentia,tse850-pcm5142"; - axentia,ssc-controller = <&ssc0>; + axentia,cpu-dai = <&ssc0>; axentia,audio-codec = <&codec>; axentia,add-gpios = <&pioA 8 GPIO_ACTIVE_LOW>; diff --git a/Documentation/devicetree/bindings/sound/es8328.txt b/Documentation/devicetree/bindings/sound/es8328.txt index 30ea8a318ae9..33fbf058c997 100644 --- a/Documentation/devicetree/bindings/sound/es8328.txt +++ b/Documentation/devicetree/bindings/sound/es8328.txt @@ -4,7 +4,7 @@ This device supports both I2C and SPI. Required properties: - - compatible : "everest,es8328" + - compatible : Should be "everest,es8328" or "everest,es8388" - DVDD-supply : Regulator providing digital core supply voltage 1.8 - 3.6V - AVDD-supply : Regulator providing analog supply voltage 3.3V - PVDD-supply : Regulator providing digital IO supply voltage 1.8 - 3.6V diff --git a/Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt b/Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt index 3e623a724e55..9800a560e0c2 100644 --- a/Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt +++ b/Documentation/devicetree/bindings/sound/mt2701-afe-pcm.txt @@ -4,6 +4,7 @@ Required properties: - compatible = "mediatek,mt2701-audio"; - reg: register location and size - interrupts: Should contain AFE interrupt +- power-domains: should define the power domain - clock-names: should have these clock names: "infra_sys_audio_clk", "top_audio_mux1_sel", @@ -58,6 +59,7 @@ Example: <0 0x112A0000 0 0x20000>; interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>, <GIC_SPI 132 IRQ_TYPE_LEVEL_LOW>; + power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>; clocks = <&infracfg CLK_INFRA_AUDIO>, <&topckgen CLK_TOP_AUD_MUX1_SEL>, <&topckgen CLK_TOP_AUD_MUX2_SEL>, diff --git a/Documentation/devicetree/bindings/sound/nau8540.txt b/Documentation/devicetree/bindings/sound/nau8540.txt new file mode 100644 index 000000000000..307a76528320 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/nau8540.txt @@ -0,0 +1,16 @@ +NAU85L40 audio CODEC + +This device supports I2C only. + +Required properties: + + - compatible : "nuvoton,nau8540" + + - reg : the I2C address of the device. + +Example: + +codec: nau8540@1c { + compatible = "nuvoton,nau8540"; + reg = <0x1c>; +}; diff --git a/Documentation/devicetree/bindings/sound/rockchip,rk3288-hdmi-analog.txt b/Documentation/devicetree/bindings/sound/rockchip,rk3288-hdmi-analog.txt new file mode 100644 index 000000000000..2539e1d68107 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/rockchip,rk3288-hdmi-analog.txt @@ -0,0 +1,36 @@ +ROCKCHIP RK3288 with HDMI and analog audio + +Required properties: +- compatible: "rockchip,rk3288-hdmi-analog" +- rockchip,model: The user-visible name of this sound complex +- rockchip,i2s-controller: The phandle of the Rockchip I2S controller that's + connected to the CODEC +- rockchip,audio-codec: The phandle of the analog audio codec. +- rockchip,routing: A list of the connections between audio components. + Each entry is a pair of strings, the first being the + connection's sink, the second being the connection's + source. For this driver the first string should always be + "Analog". + +Optionnal properties: +- rockchip,hp-en-gpios = The phandle of the GPIO that power up/down the + headphone (when the analog output is an headphone). +- rockchip,hp-det-gpios = The phandle of the GPIO that detects the headphone + (when the analog output is an headphone). +- pinctrl-names, pinctrl-0: Please refer to pinctrl-bindings.txt + +Example: + +sound { + compatible = "rockchip,rockchip-audio-es8388"; + rockchip,model = "Analog audio output"; + rockchip,i2s-controller = <&i2s>; + rockchip,audio-codec = <&es8388>; + rockchip,routing = "Analog", "LOUT2", + "Analog", "ROUT2"; + rockchip,hp-en-gpios = <&gpio8 0 GPIO_ACTIVE_HIGH>; + rockchip,hp-det-gpios = <&gpio7 7 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&headphone>; +}; + diff --git a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt index 7b526ec64991..f4adc58f82ba 100644 --- a/Documentation/devicetree/bindings/sound/sun4i-i2s.txt +++ b/Documentation/devicetree/bindings/sound/sun4i-i2s.txt @@ -7,6 +7,7 @@ Required properties: - compatible: should be one of the followings - "allwinner,sun4i-a10-i2s" + - "allwinner,sun6i-a31-i2s" - reg: physical base address of the controller and length of memory mapped region. - interrupts: should contain the I2S interrupt. @@ -19,6 +20,10 @@ Required properties: - "mod" : module clock for the I2S controller - #sound-dai-cells : Must be equal to 0 +Required properties for the following compatibles: + - "allwinner,sun6i-a31-i2s" +- resets: phandle to the reset line for this codec + Example: i2s0: i2s@01c22400 { diff --git a/Documentation/devicetree/bindings/sound/sun8i-a33-codec.txt b/Documentation/devicetree/bindings/sound/sun8i-a33-codec.txt new file mode 100644 index 000000000000..399b1b4bae22 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/sun8i-a33-codec.txt @@ -0,0 +1,63 @@ +Allwinner SUN8I audio codec +------------------------------------ + +On Sun8i-A33 SoCs, the audio is separated in different parts: + - A DAI driver. It uses the "sun4i-i2s" driver which is + documented here: + Documentation/devicetree/bindings/sound/sun4i-i2s.txt + - An analog part of the codec which is handled as PRCM registers. + See Documentation/devicetree/bindings/sound/sun8i-codec-analog.txt + - An digital part of the codec which is documented in this current + binding documentation. + - And finally, an audio card which links all the above components. + The simple-audio card will be used. + See Documentation/devicetree/bindings/sound/simple-card.txt + +This bindings documentation exposes Sun8i codec (digital part). + +Required properties: +- compatible: must be "allwinner,sun8i-a33-codec" +- reg: must contain the registers location and length +- interrupts: must contain the codec interrupt +- clocks: a list of phandle + clock-specifer pairs, one for each entry + in clock-names. +- clock-names: should contain followings: + - "bus": the parent APB clock for this controller + - "mod": the parent module clock + +Here is an example to add a sound card and the codec binding on sun8i SoCs that +are similar to A33 using simple-card: + + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "sun8i-a33-audio"; + simple-audio-card,format = "i2s"; + simple-audio-card,frame-master = <&link_codec>; + simple-audio-card,bitclock-master = <&link_codec>; + simple-audio-card,mclk-fs = <512>; + simple-audio-card,aux-devs = <&codec_analog>; + simple-audio-card,routing = + "Left DAC", "Digital Left DAC", + "Right DAC", "Digital Right DAC"; + + simple-audio-card,cpu { + sound-dai = <&dai>; + }; + + link_codec: simple-audio-card,codec { + sound-dai = <&codec>; + }; + + soc@01c00000 { + [...] + + audio-codec@1c22e00 { + #sound-dai-cells = <0>; + compatible = "allwinner,sun8i-a33-codec"; + reg = <0x01c22e00 0x400>; + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; + clock-names = "bus", "mod"; + }; + }; + diff --git a/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt b/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt index 0230c4d20506..fe0a65e6d629 100644 --- a/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt +++ b/Documentation/devicetree/bindings/sound/sunxi,sun4i-spdif.txt @@ -10,6 +10,7 @@ Required properties: - compatible : should be one of the following: - "allwinner,sun4i-a10-spdif": for the Allwinner A10 SoC - "allwinner,sun6i-a31-spdif": for the Allwinner A31 SoC + - "allwinner,sun8i-h3-spdif": for the Allwinner H3 SoC - reg : Offset and length of the register set for the device. diff --git a/Documentation/devicetree/bindings/sound/zte,zx-i2s.txt b/Documentation/devicetree/bindings/sound/zte,zx-i2s.txt index 7e5aa6f6b5a1..292ad5083704 100644 --- a/Documentation/devicetree/bindings/sound/zte,zx-i2s.txt +++ b/Documentation/devicetree/bindings/sound/zte,zx-i2s.txt @@ -1,10 +1,12 @@ ZTE ZX296702 I2S controller Required properties: - - compatible : Must be "zte,zx296702-i2s" + - compatible : Must be one of: + "zte,zx296718-i2s", "zte,zx296702-i2s" + "zte,zx296702-i2s" - reg : Must contain I2S core's registers location and length - clocks : Pairs of phandle and specifier referencing the controller's clocks. - - clock-names: "tx" for the clock to the I2S interface. + - clock-names: "wclk" for the wclk, "pclk" for the pclk to the I2S interface. - dmas: Pairs of phandle and specifier for the DMA channel that is used by the core. The core expects two dma channels for transmit. - dma-names : Must be "tx" and "rx" @@ -16,12 +18,12 @@ please check: * dma/dma.txt Example: - i2s0: i2s0@0b005000 { + i2s0: i2s@b005000 { #sound-dai-cells = <0>; - compatible = "zte,zx296702-i2s"; + compatible = "zte,zx296718-i2s", "zte,zx296702-i2s"; reg = <0x0b005000 0x1000>; - clocks = <&lsp0clk ZX296702_I2S0_DIV>; - clock-names = "tx"; + clocks = <&audiocrm AUDIO_I2S0_WCLK>, <&audiocrm AUDIO_I2S0_PCLK>; + clock-names = "wclk", "pclk"; interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; dmas = <&dma 5>, <&dma 6>; dma-names = "tx", "rx"; diff --git a/Documentation/devicetree/bindings/sram/sram.txt b/Documentation/devicetree/bindings/sram/sram.txt index 068c2c03c38f..267da4410aef 100644 --- a/Documentation/devicetree/bindings/sram/sram.txt +++ b/Documentation/devicetree/bindings/sram/sram.txt @@ -42,6 +42,12 @@ Optional properties in the area nodes: and in use by another device or devices - export : indicates that the reserved SRAM area may be accessed outside of the kernel, e.g. by bootloader or userspace +- protect-exec : Same as 'pool' above but with the additional + constraint that code wil be run from the region and + that the memory is maintained as read-only, executable + during code execution. NOTE: This region must be page + aligned on start and end in order to properly allow + manipulation of the page attributes. - label : the name for the reserved partition, if omitted, the label is taken from the node name excluding the unit address. diff --git a/Documentation/devicetree/bindings/ufs/ufs-qcom.txt b/Documentation/devicetree/bindings/ufs/ufs-qcom.txt index b6b5130e5f65..1f69ee1a61ea 100644 --- a/Documentation/devicetree/bindings/ufs/ufs-qcom.txt +++ b/Documentation/devicetree/bindings/ufs/ufs-qcom.txt @@ -29,7 +29,6 @@ Optional properties: - vdda-pll-max-microamp : specifies max. load that can be drawn from pll supply - vddp-ref-clk-supply : phandle to UFS device ref_clk pad power supply - vddp-ref-clk-max-microamp : specifies max. load that can be drawn from this supply -- vddp-ref-clk-always-on : specifies if this supply needs to be kept always on Example: diff --git a/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.txt b/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.txt index 862cd7c79805..d9b42da016f3 100644 --- a/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.txt +++ b/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.txt @@ -2,8 +2,8 @@ Allwinner sun4i A10 musb DRC/OTG controller ------------------------------------------- Required properties: - - compatible : "allwinner,sun4i-a10-musb", "allwinner,sun6i-a31-musb" - or "allwinner,sun8i-a33-musb" + - compatible : "allwinner,sun4i-a10-musb", "allwinner,sun6i-a31-musb", + "allwinner,sun8i-a33-musb" or "allwinner,sun8i-h3-musb" - reg : mmio address range of the musb controller - clocks : clock specifier for the musb controller ahb gate clock - reset : reset specifier for the ahb reset (A31 and newer only) diff --git a/Documentation/devicetree/bindings/usb/dwc3-st.txt b/Documentation/devicetree/bindings/usb/dwc3-st.txt index 01c71b1258f4..50dee3b44665 100644 --- a/Documentation/devicetree/bindings/usb/dwc3-st.txt +++ b/Documentation/devicetree/bindings/usb/dwc3-st.txt @@ -20,10 +20,10 @@ See: Documentation/devicetree/bindings/reset/reset.txt with 'reg' property - pinctl-names : A pinctrl state named "default" must be defined -See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt +See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt - pinctrl-0 : Pin control group -See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt +See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt - ranges : allows valid 1:1 translation between child's address space and parent's address space diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index e3e6983288e3..f658f394c2d3 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -56,6 +56,10 @@ Optional properties: - <DEPRECATED> tx-fifo-resize: determines if the FIFO *has* to be reallocated. + - in addition all properties from usb-xhci.txt from the current directory are + supported as well + + This is usually a subnode to DWC3 glue to which it is connected. dwc3@4a030000 { diff --git a/Documentation/devicetree/bindings/usb/ehci-omap.txt b/Documentation/devicetree/bindings/usb/ehci-omap.txt index 3dc231c832b0..d77e11a975a2 100644 --- a/Documentation/devicetree/bindings/usb/ehci-omap.txt +++ b/Documentation/devicetree/bindings/usb/ehci-omap.txt @@ -29,4 +29,3 @@ usbhsehci: ehci@4a064c00 { &usbhsehci { phys = <&hsusb1_phy 0 &hsusb3_phy>; }; - diff --git a/Documentation/devicetree/bindings/usb/ehci-st.txt b/Documentation/devicetree/bindings/usb/ehci-st.txt index fb45fa5770bb..410d922cfdd7 100644 --- a/Documentation/devicetree/bindings/usb/ehci-st.txt +++ b/Documentation/devicetree/bindings/usb/ehci-st.txt @@ -7,7 +7,7 @@ Required properties: - interrupts : one EHCI interrupt should be described here - pinctrl-names : a pinctrl state named "default" must be defined - pinctrl-0 : phandle referencing pin configuration of the USB controller -See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt +See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt - clocks : phandle list of usb clocks - clock-names : should be "ic" for interconnect clock and "clk48" See: Documentation/devicetree/bindings/clock/clock-bindings.txt diff --git a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt b/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt index e049d199bf0d..1d7c3bc677f7 100644 --- a/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt +++ b/Documentation/devicetree/bindings/usb/mt8173-mtu3.txt @@ -10,7 +10,7 @@ Required properties: - vusb33-supply : regulator of USB avdd3.3v - clocks : a list of phandle + clock-specifier pairs, one for each entry in clock-names - - clock-names : must contain "sys_ck" for clock of controller; + - clock-names : must contain "sys_ck" and "ref_ck" for clock of controller; "wakeup_deb_p0" and "wakeup_deb_p1" are optional, they are depends on "mediatek,enable-wakeup" - phys : a list of phandle + phy specifier pairs @@ -30,7 +30,7 @@ Optional properties: "id_float" and "id_ground" are optinal which depends on "mediatek,enable-manual-drd" - pinctrl-0 : pin control group - See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt + See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt - maximum-speed : valid arguments are "super-speed", "high-speed" and "full-speed"; refer to usb/generic.txt @@ -56,10 +56,10 @@ ssusb: usb@11271000 { phys = <&phy_port0 PHY_TYPE_USB3>, <&phy_port1 PHY_TYPE_USB2>; power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; - clocks = <&topckgen CLK_TOP_USB30_SEL>, + clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>, <&pericfg CLK_PERI_USB0>, <&pericfg CLK_PERI_USB1>; - clock-names = "sys_ck", + clock-names = "sys_ck", "ref_ck", "wakeup_deb_p0", "wakeup_deb_p1"; vusb33-supply = <&mt6397_vusb_reg>; @@ -79,8 +79,8 @@ ssusb: usb@11271000 { reg-names = "mac"; interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>; power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; - clocks = <&topckgen CLK_TOP_USB30_SEL>; - clock-names = "sys_ck"; + clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>; + clock-names = "sys_ck", "ref_ck"; vusb33-supply = <&mt6397_vusb_reg>; status = "disabled"; }; diff --git a/Documentation/devicetree/bindings/usb/mt8173-xhci.txt b/Documentation/devicetree/bindings/usb/mt8173-xhci.txt index 2a930bd52b94..0acfc8acbea1 100644 --- a/Documentation/devicetree/bindings/usb/mt8173-xhci.txt +++ b/Documentation/devicetree/bindings/usb/mt8173-xhci.txt @@ -23,6 +23,7 @@ Required properties: entry in clock-names - clock-names : must contain "sys_ck": for clock of xHCI MAC + "ref_ck": for reference clock of xHCI MAC "wakeup_deb_p0": for USB wakeup debounce clock of port0 "wakeup_deb_p1": for USB wakeup debounce clock of port1 @@ -37,7 +38,7 @@ Optional properties: - usb3-lpm-capable : supports USB3.0 LPM - pinctrl-names : a pinctrl state named "default" must be defined - pinctrl-0 : pin control group - See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt + See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt Example: usb30: usb@11270000 { @@ -47,10 +48,10 @@ usb30: usb@11270000 { reg-names = "mac", "ippc"; interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>; power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; - clocks = <&topckgen CLK_TOP_USB30_SEL>, + clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>, <&pericfg CLK_PERI_USB0>, <&pericfg CLK_PERI_USB1>; - clock-names = "sys_ck", + clock-names = "sys_ck", "ref_ck", "wakeup_deb_p0", "wakeup_deb_p1"; phys = <&phy_port0 PHY_TYPE_USB3>, @@ -67,7 +68,7 @@ usb30: usb@11270000 { In the case, xhci is added as subnode to mtu3. An example and the DT binding details of mtu3 can be found in: -Documentation/devicetree/bindings/usb/mtu3.txt +Documentation/devicetree/bindings/usb/mt8173-mtu3.txt Required properties: - compatible : should contain "mediatek,mt8173-xhci" @@ -82,6 +83,7 @@ Required properties: entry in clock-names - clock-names : must be "sys_ck": for clock of xHCI MAC + "ref_ck": for reference clock of xHCI MAC Optional properties: - vbus-supply : reference to the VBUS regulator; @@ -94,8 +96,8 @@ usb30: usb@11270000 { reg-names = "mac"; interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>; power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; - clocks = <&topckgen CLK_TOP_USB30_SEL>; - clock-names = "sys_ck"; + clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>; + clock-names = "sys_ck", "ref_ck"; vusb33-supply = <&mt6397_vusb_reg>; usb3-lpm-capable; }; diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.txt b/Documentation/devicetree/bindings/usb/qcom,dwc3.txt index 39acb084bce9..73cc0963e823 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.txt +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.txt @@ -18,7 +18,7 @@ A child node must exist to represent the core DWC3 IP block. The name of the node is not important. The content of the node is defined in dwc3.txt. Phy documentation is provided in the following places: -Documentation/devicetree/bindings/phy/qcom,dwc3-usb-phy.txt +Documentation/devicetree/bindings/phy/qcom-dwc3-usb-phy.txt Example device nodes: diff --git a/Documentation/devicetree/bindings/usb/ulpi.txt b/Documentation/devicetree/bindings/usb/ulpi.txt new file mode 100644 index 000000000000..ca179dc4bd50 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/ulpi.txt @@ -0,0 +1,20 @@ +ULPI bus binding +---------------- + +Phys that are behind a ULPI connection can be described with the following +binding. The host controller shall have a "ulpi" named node as a child, and +that node shall have one enabled node underneath it representing the ulpi +device on the bus. + +EXAMPLE +------- + +usb { + compatible = "vendor,usb-controller"; + + ulpi { + phy { + compatible = "vendor,phy"; + }; + }; +}; diff --git a/Documentation/devicetree/bindings/usb/usb-xhci.txt b/Documentation/devicetree/bindings/usb/usb-xhci.txt index 0b7d8576001c..2d80b60eeabe 100644 --- a/Documentation/devicetree/bindings/usb/usb-xhci.txt +++ b/Documentation/devicetree/bindings/usb/usb-xhci.txt @@ -27,6 +27,7 @@ Required properties: Optional properties: - clocks: reference to a clock - usb3-lpm-capable: determines if platform is USB3 LPM capable + - quirk-broken-port-ped: set if the controller has broken port disable mechanism Example: usb@f0931000 { diff --git a/Documentation/devicetree/bindings/usb/usb251xb.txt b/Documentation/devicetree/bindings/usb/usb251xb.txt new file mode 100644 index 000000000000..0c065f77658f --- /dev/null +++ b/Documentation/devicetree/bindings/usb/usb251xb.txt @@ -0,0 +1,83 @@ +Microchip USB 2.0 Hi-Speed Hub Controller + +The device node for the configuration of a Microchip USB251xB/xBi USB 2.0 +Hi-Speed Controller. + +Required properties : + - compatible : Should be "microchip,usb251xb" or one of the specific types: + "microchip,usb2512b", "microchip,usb2512bi", "microchip,usb2513b", + "microchip,usb2513bi", "microchip,usb2514b", "microchip,usb2514bi" + - hub-reset-gpios : Should specify the gpio for hub reset + +Optional properties : + - reg : I2C address on the selected bus (default is <0x2C>) + - skip-config : Skip Hub configuration, but only send the USB-Attach command + - vendor-id : USB Vendor ID of the hub (16 bit, default is 0x0424) + - product-id : USB Product ID of the hub (16 bit, default depends on type) + - device-id : USB Device ID of the hub (16 bit, default is 0x0bb3) + - language-id : USB Language ID (16 bit, default is 0x0000) + - manufacturer : USB Manufacturer string (max 31 characters long) + - product : USB Product string (max 31 characters long) + - serial : USB Serial string (max 31 characters long) + - {bus,self}-powered : selects between self- and bus-powered operation (default + is self-powered) + - disable-hi-speed : disable USB Hi-Speed support + - {multi,single}-tt : selects between multi- and single-transaction-translator + (default is multi-tt) + - disable-eop : disable End of Packet generation in full-speed mode + - {ganged,individual}-sensing : select over-current sense type in self-powered + mode (default is individual) + - {ganged,individual}-port-switching : select port power switching mode + (default is individual) + - dynamic-power-switching : enable auto-switching from self- to bus-powered + operation if the local power source is removed or unavailable + - oc-delay-{100us,4ms,8ms,16ms} : set over current timer delay (default is 8ms) + - compound-device : indicated the hub is part of a compound device + - port-mapping-mode : enable port mapping mode + - string-support : enable string descriptor support (required for manufacturer, + product and serial string configuration) + - non-removable-ports : Should specify the ports which have a non-removable + device connected. + - sp-disabled-ports : Specifies the ports which will be self-power disabled + - bp-disabled-ports : Specifies the ports which will be bus-power disabled + - max-sp-power : Specifies the maximum current the hub consumes from an + upstream port when operating as self-powered hub including the power + consumption of a permanently attached peripheral if the hub is + configured as a compound device. The value is given in mA in a 0 - 500 + range (default is 2). + - max-bp-power : Specifies the maximum current the hub consumes from an + upstream port when operating as bus-powered hub including the power + consumption of a permanently attached peripheral if the hub is + configured as a compound device. The value is given in mA in a 0 - 500 + range (default is 100). + - max-sp-current : Specifies the maximum current the hub consumes from an + upstream port when operating as self-powered hub EXCLUDING the power + consumption of a permanently attached peripheral if the hub is + configured as a compound device. The value is given in mA in a 0 - 500 + range (default is 2). + - max-bp-current : Specifies the maximum current the hub consumes from an + upstream port when operating as bus-powered hub EXCLUDING the power + consumption of a permanently attached peripheral if the hub is + configured as a compound device. The value is given in mA in a 0 - 500 + range (default is 100). + - power-on-time : Specifies the time it takes from the time the host initiates + the power-on sequence to a port until the port has adequate power. The + value is given in ms in a 0 - 510 range (default is 100ms). + +Examples: + usb2512b@2c { + compatible = "microchip,usb2512b"; + hub-reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + }; + + usb2514b@2c { + compatible = "microchip,usb2514b"; + reg = <0x2c>; + reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + vendor-id = /bits/ 16 <0x0000>; + product-id = /bits/ 16 <0x0000>; + string-support; + manufacturer = "Foo"; + product = "Foo-Bar"; + serial = "1234567890A"; + }; diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 16d3b5e7f5d1..ebd46f2eef24 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -40,6 +40,7 @@ atmel Atmel Corporation auo AU Optronics Corporation auvidea Auvidea GmbH avago Avago Technologies +avia avia semiconductor avic Shanghai AVIC Optoelectronics Co., Ltd. axentia Axentia Technologies AB axis Axis Communications AB @@ -75,6 +76,7 @@ dallas Maxim Integrated Products (formerly Dallas Semiconductor) davicom DAVICOM Semiconductor, Inc. delta Delta Electronics, Inc. denx Denx Software Engineering +devantech Devantech, Ltd. digi Digi International Inc. digilent Diglent, Inc. dlg Dialog Semiconductor @@ -102,11 +104,13 @@ everest Everest Semiconductor Co. Ltd. everspin Everspin Technologies, Inc. excito Excito ezchip EZchip Semiconductor +faraday Faraday Technology Corporation fcs Fairchild Semiconductor firefly Firefly focaltech FocalTech Systems Co.,Ltd friendlyarm Guangzhou FriendlyARM Computer Tech Co., Ltd fsl Freescale Semiconductor +fujitsu Fujitsu Ltd. ge General Electric Company geekbuying GeekBuying gef GE Fanuc Intelligent Platforms Embedded Systems, Inc. @@ -118,6 +122,7 @@ gmt Global Mixed-mode Technology, Inc. goodix Shenzhen Huiding Technology Co., Ltd. google Google, Inc. grinn Grinn +grmn Garmin Limited gumstix Gumstix, Inc. gw Gateworks Corporation hannstar HannStar Display Corporation @@ -329,6 +334,7 @@ xes Extreme Engineering Solutions (X-ES) xillybus Xillybus Ltd. xlnx Xilinx zarlink Zarlink Semiconductor +zeitec ZEITEC Semiconductor Co., LTD. zii Zodiac Inflight Innovations zte ZTE Corp. zyxel ZyXEL Communications Corp. |
