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-rw-r--r--Documentation/devicetree/bindings/gpio/gpio.txt7
1 files changed, 0 insertions, 7 deletions
diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt
index f509ecf03ece..c88d2ccb05ca 100644
--- a/Documentation/devicetree/bindings/gpio/gpio.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio.txt
@@ -138,12 +138,6 @@ exposed in the device tree as an individual gpio-controller node, reflecting
the fact that the hardware was synthesized by reusing the same IP block a
few times over.
-A GPIO controller may specify a bank ID. This is a hardware index that
-indicate the logical order of the GPIO controller in the hardware architecture,
-usually in the sequence 0, 1, 2 .. n. The hardware index may be different
-from the order of register ranges and related to the backplane of how this
-one bank is connected to the outside through a pin controller for example.
-
Optionally, a GPIO controller may have a "ngpios" property. This property
indicates the number of in-use slots of available slots for GPIOs. The
typical example is something like this: the hardware register is 32 bits
@@ -165,7 +159,6 @@ gpio-controller@00000000 {
reg = <0x00000000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
- gpio-bank = <0>;
ngpios = <18>;
}
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