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-rw-r--r--arch/x86/boot/pm.c4
-rw-r--r--arch/x86/boot/pmjump.S7
-rw-r--r--include/asm-x86/segment.h3
3 files changed, 14 insertions, 0 deletions
diff --git a/arch/x86/boot/pm.c b/arch/x86/boot/pm.c
index 09fb342cc62e..b23cbdc7d547 100644
--- a/arch/x86/boot/pm.c
+++ b/arch/x86/boot/pm.c
@@ -121,6 +121,10 @@ static void setup_gdt(void)
[GDT_ENTRY_BOOT_CS] = GDT_ENTRY(0xc09b, 0, 0xfffff),
/* DS: data, read/write, 4 GB, base 0 */
[GDT_ENTRY_BOOT_DS] = GDT_ENTRY(0xc093, 0, 0xfffff),
+ /* TSS: 32-bit tss, 104 bytes, base 4096 */
+ /* We only have a TSS here to keep Intel VT happy;
+ we don't actually use it for anything. */
+ [GDT_ENTRY_BOOT_TSS] = GDT_ENTRY(0x0089, 4096, 103),
};
/* Xen HVM incorrectly stores a pointer to the gdt_ptr, instead
of the gdt_ptr contents. Thus, make it static so it will
diff --git a/arch/x86/boot/pmjump.S b/arch/x86/boot/pmjump.S
index ef0da1f2c7fd..f7153d0d476e 100644
--- a/arch/x86/boot/pmjump.S
+++ b/arch/x86/boot/pmjump.S
@@ -36,6 +36,7 @@ protected_mode_jump:
addl %ebx, 2f
movw $__BOOT_DS, %cx
+ movw $__BOOT_TSS, %di
movl %cr0, %edx
orb $1, %dl # Protected mode (PE) bit
@@ -63,6 +64,9 @@ in_pm32:
# a valid stack if some debugging hack wants to use it.
addl %ebx, %esp
+ # Set up TR to make Intel VT happy
+ ltr %di
+
# Clear registers to allow for future extensions to the
# 32-bit boot protocol
xorl %ecx, %ecx
@@ -71,6 +75,9 @@ in_pm32:
xorl %ebp, %ebp
xorl %edi, %edi
+ # Set up LDTR to make Intel VT happy
+ lldt %cx
+
jmpl *%eax # Jump to the 32-bit entrypoint
.size in_pm32, .-in_pm32
diff --git a/include/asm-x86/segment.h b/include/asm-x86/segment.h
index 1ff05a9f5513..57c8d3723836 100644
--- a/include/asm-x86/segment.h
+++ b/include/asm-x86/segment.h
@@ -9,6 +9,9 @@
#define GDT_ENTRY_BOOT_DS (GDT_ENTRY_BOOT_CS + 1)
#define __BOOT_DS (GDT_ENTRY_BOOT_DS * 8)
+#define GDT_ENTRY_BOOT_TSS (GDT_ENTRY_BOOT_CS + 2)
+#define __BOOT_TSS (GDT_ENTRY_BOOT_TSS * 8)
+
#ifdef CONFIG_X86_32
/*
* The layout of the per-CPU GDT under Linux:
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