diff options
| -rw-r--r-- | drivers/thermal/samsung/exynos_tmu.c | 2 | ||||
| -rw-r--r-- | drivers/thermal/samsung/exynos_tmu.h | 2 | ||||
| -rw-r--r-- | drivers/thermal/samsung/exynos_tmu_data.c | 5 |
3 files changed, 1 insertions, 8 deletions
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index fb3841113b72..3f3b8cf0455a 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c @@ -266,7 +266,7 @@ static int exynos_tmu_initialize(struct platform_device *pdev) data->base + reg->threshold_th2); } con = readl(data->base + reg->tmu_ctrl); - con |= (1 << reg->therm_trip_en_shift); + con |= (1 << EXYNOS_TMU_THERM_TRIP_EN_SHIFT); writel(con, data->base + reg->tmu_ctrl); } } diff --git a/drivers/thermal/samsung/exynos_tmu.h b/drivers/thermal/samsung/exynos_tmu.h index 88c16d7302cb..4798313ca5e1 100644 --- a/drivers/thermal/samsung/exynos_tmu.h +++ b/drivers/thermal/samsung/exynos_tmu.h @@ -77,7 +77,6 @@ enum soc_type { * bitfields. The register validity, offsets and bitfield values may vary * slightly across different exynos SOC's. * @tmu_ctrl: TMU main controller register. - * @therm_trip_en_shift: shift bits of tripping enable in tmu_ctrl register. * @tmu_cur_temp: register containing the current temperature of the TMU. * @threshold_th0: Register containing first set of rising levels. * @threshold_th1: Register containing second set of rising levels. @@ -100,7 +99,6 @@ enum soc_type { */ struct exynos_tmu_registers { u32 tmu_ctrl; - u32 therm_trip_en_shift; u32 tmu_cur_temp; diff --git a/drivers/thermal/samsung/exynos_tmu_data.c b/drivers/thermal/samsung/exynos_tmu_data.c index 4a44eb7b11fe..a120a8cd80ad 100644 --- a/drivers/thermal/samsung/exynos_tmu_data.c +++ b/drivers/thermal/samsung/exynos_tmu_data.c @@ -83,7 +83,6 @@ struct exynos_tmu_init_data const exynos4210_default_tmu_data = { #if defined(CONFIG_SOC_EXYNOS3250) static const struct exynos_tmu_registers exynos3250_tmu_registers = { .tmu_ctrl = EXYNOS_TMU_REG_CONTROL, - .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT, .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP, .threshold_th0 = EXYNOS_THD_TEMP_RISE, .threshold_th1 = EXYNOS_THD_TEMP_FALL, @@ -156,7 +155,6 @@ struct exynos_tmu_init_data const exynos3250_default_tmu_data = { #if defined(CONFIG_SOC_EXYNOS4412) || defined(CONFIG_SOC_EXYNOS5250) static const struct exynos_tmu_registers exynos4412_tmu_registers = { .tmu_ctrl = EXYNOS_TMU_REG_CONTROL, - .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT, .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP, .threshold_th0 = EXYNOS_THD_TEMP_RISE, .threshold_th1 = EXYNOS_THD_TEMP_FALL, @@ -242,7 +240,6 @@ struct exynos_tmu_init_data const exynos5250_default_tmu_data = { #if defined(CONFIG_SOC_EXYNOS5260) static const struct exynos_tmu_registers exynos5260_tmu_registers = { .tmu_ctrl = EXYNOS_TMU_REG_CONTROL, - .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT, .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP, .threshold_th0 = EXYNOS_THD_TEMP_RISE, .threshold_th1 = EXYNOS_THD_TEMP_FALL, @@ -317,7 +314,6 @@ struct exynos_tmu_init_data const exynos5260_default_tmu_data = { #if defined(CONFIG_SOC_EXYNOS5420) static const struct exynos_tmu_registers exynos5420_tmu_registers = { .tmu_ctrl = EXYNOS_TMU_REG_CONTROL, - .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT, .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP, .threshold_th0 = EXYNOS_THD_TEMP_RISE, .threshold_th1 = EXYNOS_THD_TEMP_FALL, @@ -400,7 +396,6 @@ struct exynos_tmu_init_data const exynos5420_default_tmu_data = { #if defined(CONFIG_SOC_EXYNOS5440) static const struct exynos_tmu_registers exynos5440_tmu_registers = { .tmu_ctrl = EXYNOS5440_TMU_S0_7_CTRL, - .therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT, .tmu_cur_temp = EXYNOS5440_TMU_S0_7_TEMP, .threshold_th0 = EXYNOS5440_TMU_S0_7_TH0, .threshold_th1 = EXYNOS5440_TMU_S0_7_TH1, |
