diff options
| -rw-r--r-- | drivers/ide/palm_bk3710.c | 26 |
1 files changed, 12 insertions, 14 deletions
diff --git a/drivers/ide/palm_bk3710.c b/drivers/ide/palm_bk3710.c index c7acca0b8733..d1513b4a457c 100644 --- a/drivers/ide/palm_bk3710.c +++ b/drivers/ide/palm_bk3710.c @@ -39,14 +39,6 @@ /* Primary Control Offset */ #define IDE_PALM_ATA_PRI_CTL_OFFSET 0x3F6 -/* - * PalmChip 3710 IDE Controller UDMA timing structure Definition - */ -struct palm_bk3710_udmatiming { - unsigned int rptime; /* Ready to pause time */ - unsigned int cycletime; /* Cycle Time */ -}; - #define BK3710_BMICP 0x00 #define BK3710_BMISP 0x02 #define BK3710_BMIDTP 0x04 @@ -75,13 +67,19 @@ struct palm_bk3710_udmatiming { static unsigned ideclk_period; /* in nanoseconds */ +struct palm_bk3710_udmatiming { + unsigned int rptime; /* tRP -- Ready to pause time (nsec) */ + unsigned int cycletime; /* tCYCTYP2/2 -- avg Cycle Time (nsec) */ + /* tENV is always a minimum of 20 nsec */ +}; + static const struct palm_bk3710_udmatiming palm_bk3710_udmatimings[6] = { - {160, 240}, /* UDMA Mode 0 */ - {125, 160}, /* UDMA Mode 1 */ - {100, 120}, /* UDMA Mode 2 */ - {100, 90}, /* UDMA Mode 3 */ - {100, 60}, /* UDMA Mode 4 */ - {85, 40}, /* UDMA Mode 5 */ + {160, 240 / 2,}, /* UDMA Mode 0 */ + {125, 160 / 2,}, /* UDMA Mode 1 */ + {100, 120 / 2,}, /* UDMA Mode 2 */ + {100, 90 / 2,}, /* UDMA Mode 3 */ + {100, 60 / 2,}, /* UDMA Mode 4 */ + {85, 40 / 2,}, /* UDMA Mode 5 */ }; static void palm_bk3710_setudmamode(void __iomem *base, unsigned int dev, |
