diff options
1015 files changed, 22763 insertions, 11490 deletions
@@ -1510,6 +1510,14 @@ D: Natsemi ethernet D: Cobalt Networks (x86) support D: This-and-That +N: Mark M. Hoffman +E: mhoffman@lightlink.com +D: asb100, lm93 and smsc47b397 hardware monitoring drivers +D: hwmon subsystem core +D: hwmon subsystem maintainer +D: i2c-sis96x and i2c-stub SMBus drivers +S: USA + N: Dirk Hohndel E: hohndel@suse.de D: The XFree86[tm] Project diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt index a33628759d36..d933af370697 100644 --- a/Documentation/devicetree/bindings/gpio/gpio.txt +++ b/Documentation/devicetree/bindings/gpio/gpio.txt @@ -98,7 +98,7 @@ announce the pinrange to the pin ctrl subsystem. For example, compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank"; reg = <0x1460 0x18>; gpio-controller; - gpio-ranges = <&pinctrl1 20 10>, <&pinctrl2 50 20>; + gpio-ranges = <&pinctrl1 0 20 10>, <&pinctrl2 10 50 20>; } @@ -107,8 +107,8 @@ where, Next values specify the base pin and number of pins for the range handled by 'qe_pio_e' gpio. In the given example from base pin 20 to - pin 29 under pinctrl1 and pin 50 to pin 69 under pinctrl2 is handled - by this gpio controller. + pin 29 under pinctrl1 with gpio offset 0 and pin 50 to pin 69 under + pinctrl2 with gpio offset 10 is handled by this gpio controller. The pinctrl node must have "#gpio-range-cells" property to show number of arguments to pass with phandle from gpio controllers node. diff --git a/Documentation/devicetree/bindings/mfd/ab8500.txt b/Documentation/devicetree/bindings/mfd/ab8500.txt index 13b707b7355c..c3a14e0ad0ad 100644 --- a/Documentation/devicetree/bindings/mfd/ab8500.txt +++ b/Documentation/devicetree/bindings/mfd/ab8500.txt @@ -13,9 +13,6 @@ Required parent device properties: 4 = active high level-sensitive 8 = active low level-sensitive -Optional parent device properties: -- reg : contains the PRCMU mailbox address for the AB8500 i2c port - The AB8500 consists of a large and varied group of sub-devices: Device IRQ Names Supply Names Description @@ -86,9 +83,8 @@ Non-standard child device properties: - stericsson,amic2-bias-vamic1 : Analoge Mic wishes to use a non-standard Vamic - stericsson,earpeice-cmv : Earpeice voltage (only: 950 | 1100 | 1270 | 1580) -ab8500@5 { +ab8500 { compatible = "stericsson,ab8500"; - reg = <5>; /* mailbox 5 is i2c */ interrupts = <0 40 0x4>; interrupt-controller; #interrupt-cells = <2>; diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt index 2c81e45f1374..fa1746b639b9 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt @@ -1,7 +1,9 @@ One-register-per-pin type device tree based pinctrl driver Required properties: -- compatible : "pinctrl-single" +- compatible : "pinctrl-single" or "pinconf-single". + "pinctrl-single" means that pinconf isn't supported. + "pinconf-single" means that generic pinconf is supported. - reg : offset and length of the register set for the mux registers @@ -14,9 +16,61 @@ Optional properties: - pinctrl-single,function-off : function off mode for disabled state if available and same for all registers; if not specified, disabling of pin functions is ignored + - pinctrl-single,bit-per-mux : boolean to indicate that one register controls more than one pin +- pinctrl-single,drive-strength : array of value that are used to configure + drive strength in the pinmux register. They're value of drive strength + current and drive strength mask. + + /* drive strength current, mask */ + pinctrl-single,power-source = <0x30 0xf0>; + +- pinctrl-single,bias-pullup : array of value that are used to configure the + input bias pullup in the pinmux register. + + /* input, enabled pullup bits, disabled pullup bits, mask */ + pinctrl-single,bias-pullup = <0 1 0 1>; + +- pinctrl-single,bias-pulldown : array of value that are used to configure the + input bias pulldown in the pinmux register. + + /* input, enabled pulldown bits, disabled pulldown bits, mask */ + pinctrl-single,bias-pulldown = <2 2 0 2>; + + * Two bits to control input bias pullup and pulldown: User should use + pinctrl-single,bias-pullup & pinctrl-single,bias-pulldown. One bit means + pullup, and the other one bit means pulldown. + * Three bits to control input bias enable, pullup and pulldown. User should + use pinctrl-single,bias-pullup & pinctrl-single,bias-pulldown. Input bias + enable bit should be included in pullup or pulldown bits. + * Although driver could set PIN_CONFIG_BIAS_DISABLE, there's no property as + pinctrl-single,bias-disable. Because pinctrl single driver could implement + it by calling pulldown, pullup disabled. + +- pinctrl-single,input-schmitt : array of value that are used to configure + input schmitt in the pinmux register. In some silicons, there're two input + schmitt value (rising-edge & falling-edge) in the pinmux register. + + /* input schmitt value, mask */ + pinctrl-single,input-schmitt = <0x30 0x70>; + +- pinctrl-single,input-schmitt-enable : array of value that are used to + configure input schmitt enable or disable in the pinmux register. + + /* input, enable bits, disable bits, mask */ + pinctrl-single,input-schmitt-enable = <0x30 0x40 0 0x70>; + +- pinctrl-single,gpio-range : list of value that are used to configure a GPIO + range. They're value of subnode phandle, pin base in pinctrl device, pin + number in this range, GPIO function value of this GPIO range. + The number of parameters is depend on #pinctrl-single,gpio-range-cells + property. + + /* pin base, nr pins & gpio function */ + pinctrl-single,gpio-range = <&range 0 3 0 &range 3 9 1>; + This driver assumes that there is only one register for each pin (unless the pinctrl-single,bit-per-mux is set), and uses the common pinctrl bindings as specified in the pinctrl-bindings.txt document in this directory. @@ -42,6 +96,20 @@ Where 0xdc is the offset from the pinctrl register base address for the device pinctrl register, 0x18 is the desired value, and 0xff is the sub mask to be used when applying this change to the register. + +Optional sub-node: In case some pins could be configured as GPIO in the pinmux +register, those pins could be defined as a GPIO range. This sub-node is required +by pinctrl-single,gpio-range property. + +Required properties in sub-node: +- #pinctrl-single,gpio-range-cells : the number of parameters after phandle in + pinctrl-single,gpio-range property. + + range: gpio-range { + #pinctrl-single,gpio-range-cells = <3>; + }; + + Example: /* SoC common file */ @@ -76,6 +144,29 @@ control_devconf0: pinmux@48002274 { pinctrl-single,function-mask = <0x5F>; }; +/* third controller instance for pins in gpio domain */ +pmx_gpio: pinmux@d401e000 { + compatible = "pinconf-single"; + reg = <0xd401e000 0x0330>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <7>; + + /* sparse GPIO range could be supported */ + pinctrl-single,gpio-range = <&range 0 3 0 &range 3 9 1 + &range 12 1 0 &range 13 29 1 + &range 43 1 0 &range 44 49 1 + &range 94 1 1 &range 96 2 1>; + + range: gpio-range { + #pinctrl-single,gpio-range-cells = <3>; + }; +}; + + /* board specific .dts file */ &pmx_core { @@ -96,6 +187,15 @@ control_devconf0: pinmux@48002274 { >; }; + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + 0x208 0 /* UART0_RXD (IOCFG138) */ + 0x20c 0 /* UART0_TXD (IOCFG139) */ + >; + pinctrl-single,bias-pulldown = <0 2 2>; + pinctrl-single,bias-pullup = <0 1 1>; + }; + /* map uart2 pins */ uart2_pins: pinmux_uart2_pins { pinctrl-single,pins = < @@ -122,6 +222,11 @@ control_devconf0: pinmux@48002274 { }; +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; +}; + &uart2 { pinctrl-names = "default"; pinctrl-0 = <&uart2_pins>; diff --git a/Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt b/Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt new file mode 100644 index 000000000000..993695c659e1 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt @@ -0,0 +1,17 @@ +Cadence TTC - Triple Timer Counter + +Required properties: +- compatible : Should be "cdns,ttc". +- reg : Specifies base physical address and size of the registers. +- interrupts : A list of 3 interrupts; one per timer channel. +- clocks: phandle to the source clock + +Example: + +ttc0: ttc0@f8001000 { + interrupt-parent = <&intc>; + interrupts = < 0 10 4 0 11 4 0 12 4 >; + compatible = "cdns,ttc"; + reg = <0xF8001000 0x1000>; + clocks = <&cpu_clk 3>; +}; diff --git a/Documentation/devicetree/bindings/tty/serial/of-serial.txt b/Documentation/devicetree/bindings/tty/serial/of-serial.txt index 1e1145ca4f3c..8f01cb190f25 100644 --- a/Documentation/devicetree/bindings/tty/serial/of-serial.txt +++ b/Documentation/devicetree/bindings/tty/serial/of-serial.txt @@ -11,6 +11,9 @@ Required properties: - "nvidia,tegra20-uart" - "nxp,lpc3220-uart" - "ibm,qpace-nwp-serial" + - "altr,16550-FIFO32" + - "altr,16550-FIFO64" + - "altr,16550-FIFO128" - "serial" if the port type is unknown. - reg : offset and length of the register set for the device. - interrupts : should contain uart interrupt. diff --git a/Documentation/hwmon/lm75 b/Documentation/hwmon/lm75 index c91a1d15fa28..69af1c7db6b7 100644 --- a/Documentation/hwmon/lm75 +++ b/Documentation/hwmon/lm75 @@ -23,7 +23,7 @@ Supported chips: Datasheet: Publicly available at the Maxim website http://www.maxim-ic.com/ * Microchip (TelCom) TCN75 - Prefix: 'lm75' + Prefix: 'tcn75' Addresses scanned: none Datasheet: Publicly available at the Microchip website http://www.microchip.com/ diff --git a/Documentation/i2c/busses/i2c-diolan-u2c b/Documentation/i2c/busses/i2c-diolan-u2c index 30fe4bb9a069..0d6018c316c7 100644 --- a/Documentation/i2c/busses/i2c-diolan-u2c +++ b/Documentation/i2c/busses/i2c-diolan-u2c @@ -5,7 +5,7 @@ Supported adapters: Documentation: http://www.diolan.com/i2c/u2c12.html -Author: Guenter Roeck <guenter.roeck@ericsson.com> +Author: Guenter Roeck <linux@roeck-us.net> Description ----------- diff --git a/Documentation/input/alps.txt b/Documentation/input/alps.txt index 3262b6e4d686..e544c7ff8cfa 100644 --- a/Documentation/input/alps.txt +++ b/Documentation/input/alps.txt @@ -3,10 +3,26 @@ ALPS Touchpad Protocol Introduction ------------ - -Currently the ALPS touchpad driver supports four protocol versions in use by -ALPS touchpads, called versions 1, 2, 3, and 4. Information about the various -protocol versions is contained in the following sections. +Currently the ALPS touchpad driver supports five protocol versions in use by +ALPS touchpads, called versions 1, 2, 3, 4 and 5. + +Since roughly mid-2010 several new ALPS touchpads have been released and +integrated into a variety of laptops and netbooks. These new touchpads +have enough behavior differences that the alps_model_data definition +table, describing the properties of the different versions, is no longer +adequate. The design choices were to re-define the alps_model_data +table, with the risk of regression testing existing devices, or isolate +the new devices outside of the alps_model_data table. The latter design +choice was made. The new touchpad signatures are named: "Rushmore", +"Pinnacle", and "Dolphin", which you will see in the alps.c code. +For the purposes of this document, this group of ALPS touchpads will +generically be called "new ALPS touchpads". + +We experimented with probing the ACPI interface _HID (Hardware ID)/_CID +(Compatibility ID) definition as a way to uniquely identify the +different ALPS variants but there did not appear to be a 1:1 mapping. +In fact, it appeared to be an m:n mapping between the _HID and actual +hardware type. Detection --------- @@ -20,9 +36,13 @@ If the E6 report is successful, the touchpad model is identified using the "E7 report" sequence: E8-E7-E7-E7-E9. The response is the model signature and is matched against known models in the alps_model_data_array. -With protocol versions 3 and 4, the E7 report model signature is always -73-02-64. To differentiate between these versions, the response from the -"Enter Command Mode" sequence must be inspected as described below. +For older touchpads supporting protocol versions 3 and 4, the E7 report +model signature is always 73-02-64. To differentiate between these +versions, the response from the "Enter Command Mode" sequence must be +inspected as described below. + +The new ALPS touchpads have an E7 signature of 73-03-50 or 73-03-0A but +seem to be better differentiated by the EC Command Mode response. Command Mode ------------ @@ -47,6 +67,14 @@ address of the register being read, and the third contains the value of the register. Registers are written by writing the value one nibble at a time using the same encoding used for addresses. +For the new ALPS touchpads, the EC command is used to enter command +mode. The response in the new ALPS touchpads is significantly different, +and more important in determining the behavior. This code has been +separated from the original alps_model_data table and put in the +alps_identify function. For example, there seem to be two hardware init +sequences for the "Dolphin" touchpads as determined by the second byte +of the EC response. + Packet Format ------------- @@ -187,3 +215,28 @@ There are several things worth noting here. well. So far no v4 devices with tracksticks have been encountered. + +ALPS Absolute Mode - Protocol Version 5 +--------------------------------------- +This is basically Protocol Version 3 but with different logic for packet +decode. It uses the same alps_process_touchpad_packet_v3 call with a +specialized decode_fields function pointer to correctly interpret the +packets. This appears to only be used by the Dolphin devices. + +For single-touch, the 6-byte packet format is: + + byte 0: 1 1 0 0 1 0 0 0 + byte 1: 0 x6 x5 x4 x3 x2 x1 x0 + byte 2: 0 y6 y5 y4 y3 y2 y1 y0 + byte 3: 0 M R L 1 m r l + byte 4: y10 y9 y8 y7 x10 x9 x8 x7 + byte 5: 0 z6 z5 z4 z3 z2 z1 z0 + +For mt, the format is: + + byte 0: 1 1 1 n3 1 n2 n1 x24 + byte 1: 1 y7 y6 y5 y4 y3 y2 y1 + byte 2: ? x2 x1 y12 y11 y10 y9 y8 + byte 3: 0 x23 x22 x21 x20 x19 x18 x17 + byte 4: 0 x9 x8 x7 x6 x5 x4 x3 + byte 5: 0 x16 x15 x14 x13 x12 x11 x10 diff --git a/Documentation/networking/ipvs-sysctl.txt b/Documentation/networking/ipvs-sysctl.txt index f2a2488f1bf3..9573d0c48c6e 100644 --- a/Documentation/networking/ipvs-sysctl.txt +++ b/Documentation/networking/ipvs-sysctl.txt @@ -15,6 +15,13 @@ amemthresh - INTEGER enabled and the variable is automatically set to 2, otherwise the strategy is disabled and the variable is set to 1. +backup_only - BOOLEAN + 0 - disabled (default) + not 0 - enabled + + If set, disable the director function while the server is + in backup mode to avoid packet loops for DR/TUN methods. + conntrack - BOOLEAN 0 - disabled (default) not 0 - enabled diff --git a/Documentation/networking/tuntap.txt b/Documentation/networking/tuntap.txt index c0aab985bad9..949d5dcdd9a3 100644 --- a/Documentation/networking/tuntap.txt +++ b/Documentation/networking/tuntap.txt @@ -105,6 +105,83 @@ Copyright (C) 1999-2000 Maxim Krasnyansky <max_mk@yahoo.com> Proto [2 bytes] Raw protocol(IP, IPv6, etc) frame. + 3.3 Multiqueue tuntap interface: + + From version 3.8, Linux supports multiqueue tuntap which can uses multiple + file descriptors (queues) to parallelize packets sending or receiving. The + device allocation is the same as before, and if user wants to create multiple + queues, TUNSETIFF with the same device name must be called many times with + IFF_MULTI_QUEUE flag. + + char *dev should be the name of the device, queues is the number of queues to + be created, fds is used to store and return the file descriptors (queues) + created to the caller. Each file descriptor were served as the interface of a + queue which could be accessed by userspace. + + #include <linux/if.h> + #include <linux/if_tun.h> + + int tun_alloc_mq(char *dev, int queues, int *fds) + { + struct ifreq ifr; + int fd, err, i; + + if (!dev) + return -1; + + memset(&ifr, 0, sizeof(ifr)); + /* Flags: IFF_TUN - TUN device (no Ethernet headers) + * IFF_TAP - TAP device + * + * IFF_NO_PI - Do not provide packet information + * IFF_MULTI_QUEUE - Create a queue of multiqueue device + */ + ifr.ifr_flags = IFF_TAP | IFF_NO_PI | IFF_MULTI_QUEUE; + strcpy(ifr.ifr_name, dev); + + for (i = 0; i < queues; i++) { + if ((fd = open("/dev/net/tun", O_RDWR)) < 0) + goto err; + err = ioctl(fd, TUNSETIFF, (void *)&ifr); + if (err) { + close(fd); + goto err; + } + fds[i] = fd; + } + + return 0; + err: + for (--i; i >= 0; i--) + close(fds[i]); + return err; + } + + A new ioctl(TUNSETQUEUE) were introduced to enable or disable a queue. When + calling it with IFF_DETACH_QUEUE flag, the queue were disabled. And when + calling it with IFF_ATTACH_QUEUE flag, the queue were enabled. The queue were + enabled by default after it was created through TUNSETIFF. + + fd is the file descriptor (queue) that we want to enable or disable, when + enable is true we enable it, otherwise we disable it + + #include <linux/if.h> + #include <linux/if_tun.h> + + int tun_set_queue(int fd, int enable) + { + struct ifreq ifr; + + memset(&ifr, 0, sizeof(ifr)); + + if (enable) + ifr.ifr_flags = IFF_ATTACH_QUEUE; + else + ifr.ifr_flags = IFF_DETACH_QUEUE; + + return ioctl(fd, TUNSETQUEUE, (void *)&ifr); + } + Universal TUN/TAP device driver Frequently Asked Question. 1. What platforms are supported by TUN/TAP driver ? diff --git a/Documentation/sound/alsa/ALSA-Configuration.txt b/Documentation/sound/alsa/ALSA-Configuration.txt index ce6581c8ca26..4499bd948860 100644 --- a/Documentation/sound/alsa/ALSA-Configuration.txt +++ b/Documentation/sound/alsa/ALSA-Configuration.txt @@ -912,7 +912,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. models depending on the codec chip. The list of available models is found in HD-Audio-Models.txt - The model name "genric" is treated as a special case. When this + The model name "generic" is treated as a special case. When this model is given, the driver uses the generic codec parser without "codec-patch". It's sometimes good for testing and debugging. diff --git a/Documentation/sound/alsa/seq_oss.html b/Documentation/sound/alsa/seq_oss.html index d9776cf60c07..9663b45f6fde 100644 --- a/Documentation/sound/alsa/seq_oss.html +++ b/Documentation/sound/alsa/seq_oss.html @@ -285,7 +285,7 @@ sample data. <H4> 7.2.4 Close Callback</H4> The <TT>close</TT> callback is called when this device is closed by the -applicaion. If any private data was allocated in open callback, it must +application. If any private data was allocated in open callback, it must be released in the close callback. The deletion of ALSA port should be done here, too. This callback must not be NULL. <H4> diff --git a/Documentation/trace/ftrace.txt b/Documentation/trace/ftrace.txt index 53d6a3c51d87..a372304aef10 100644 --- a/Documentation/trace/ftrace.txt +++ b/Documentation/trace/ftrace.txt @@ -1873,7 +1873,7 @@ feature: status\input | 0 | 1 | else | --------------+------------+------------+------------+ - not allocated |(do nothing)| alloc+swap | EINVAL | + not allocated |(do nothing)| alloc+swap |(do nothing)| --------------+------------+------------+------------+ allocated | free | swap | clear | --------------+------------+------------+------------+ diff --git a/MAINTAINERS b/MAINTAINERS index 95616582c728..74e58a4d035b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1338,12 +1338,6 @@ S: Maintained F: drivers/platform/x86/asus*.c F: drivers/platform/x86/eeepc*.c -ASUS ASB100 HARDWARE MONITOR DRIVER -M: "Mark M. Hoffman" <mhoffman@lightlink.com> -L: lm-sensors@lm-sensors.org -S: Maintained -F: drivers/hwmon/asb100.c - ASYNCHRONOUS TRANSFERS/TRANSFORMS (IOAT) API M: Dan Williams <djbw@fb.com> W: http://sourceforge.net/projects/xscaleiop @@ -1467,6 +1461,12 @@ F: drivers/dma/at_hdmac.c F: drivers/dma/at_hdmac_regs.h F: include/linux/platform_data/dma-atmel.h +ATMEL I2C DRIVER +M: Ludovic Desroches <ludovic.desroches@atmel.com> +L: linux-i2c@vger.kernel.org +S: Supported +F: drivers/i2c/busses/i2c-at91.c + ATMEL ISI DRIVER M: Josh Wu <josh.wu@atmel.com> L: linux-media@vger.kernel.org @@ -2629,7 +2629,7 @@ F: include/uapi/drm/ INTEL DRM DRIVERS (excluding Poulsbo, Moorestown and derivative chipsets) M: Daniel Vetter <daniel.vetter@ffwll.ch> -L: intel-gfx@lists.freedesktop.org (subscribers-only) +L: intel-gfx@lists.freedesktop.org L: dri-devel@lists.freedesktop.org T: git git://people.freedesktop.org/~danvet/drm-intel S: Supported @@ -3242,6 +3242,12 @@ F: Documentation/firmware_class/ F: drivers/base/firmware*.c F: include/linux/firmware.h +FLASHSYSTEM DRIVER (IBM FlashSystem 70/80 PCI SSD Flash Card) +M: Joshua Morris <josh.h.morris@us.ibm.com> +M: Philip Kelleher <pjk1939@linux.vnet.ibm.com> +S: Maintained +F: drivers/block/rsxx/ + FLOPPY DRIVER M: Jiri Kosina <jkosina@suse.cz> T: git git://git.kernel.org/pub/scm/linux/kernel/git/jikos/floppy.git @@ -3851,7 +3857,7 @@ F: drivers/i2c/busses/i2c-ismt.c F: Documentation/i2c/busses/i2c-ismt I2C/SMBUS STUB DRIVER -M: "Mark M. Hoffman" <mhoffman@lightlink.com> +M: Jean Delvare <khali@linux-fr.org> L: linux-i2c@vger.kernel.org S: Maintained F: drivers/i2c/i2c-stub.c @@ -4005,6 +4011,22 @@ M: Stanislaw Gruszka <stf_xl@wp.pl> S: Maintained F: drivers/usb/atm/ueagle-atm.c +INA209 HARDWARE MONITOR DRIVER +M: Guenter Roeck <linux@roeck-us.net> +L: lm-sensors@lm-sensors.org +S: Maintained +F: Documentation/hwmon/ina209 +F: Documentation/devicetree/bindings/i2c/ina209.txt +F: drivers/hwmon/ina209.c + +INA2XX HARDWARE MONITOR DRIVER +M: Guenter Roeck <linux@roeck-us.net> +L: lm-sensors@lm-sensors.org +S: Maintained +F: Documentation/hwmon/ina2xx +F: drivers/hwmon/ina2xx.c +F: include/linux/platform_data/ina2xx.h + INDUSTRY PACK SUBSYSTEM (IPACK) M: Samuel Iglesias Gonsalvez <siglesias@igalia.com> M: Jens Taprogge <jens.taprogge@taprogge.org> @@ -5098,6 +5120,15 @@ S: Maintained F: Documentation/hwmon/max6650 F: drivers/hwmon/max6650.c +MAX6697 HARDWARE MONITOR DRIVER +M: Guenter Roeck <linux@roeck-us.net> +L: lm-sensors@lm-sensors.org +S: Maintained +F: Documentation/hwmon/max6697 +F: Documentation/devicetree/bindings/i2c/max6697.txt +F: drivers/hwmon/max6697.c +F: include/linux/platform_data/max6697.h + MAXIRADIO FM RADIO RECEIVER DRIVER M: Hans Verkuil <hverkuil@xs4all.nl> L: linux-media@vger.kernel.org @@ -5622,6 +5653,14 @@ S: Maintained F: drivers/video/riva/ F: drivers/video/nvidia/ +NVM EXPRESS DRIVER +M: Matthew Wilcox <willy@linux.intel.com> +L: linux-nvme@lists.infradead.org +T: git git://git.infradead.org/users/willy/linux-nvme.git +S: Supported +F: drivers/block/nvme.c +F: include/linux/nvme.h + OMAP SUPPORT M: Tony Lindgren <tony@atomide.com> L: linux-omap@vger.kernel.org @@ -5650,7 +5689,7 @@ S: Maintained F: arch/arm/*omap*/*clock* OMAP POWER MANAGEMENT SUPPORT -M: Kevin Hilman <khilman@ti.com> +M: Kevin Hilman <khilman@deeprootsystems.com> L: linux-omap@vger.kernel.org S: Maintained F: arch/arm/*omap*/*pm* @@ -5744,7 +5783,7 @@ F: arch/arm/*omap*/usb* OMAP GPIO DRIVER M: Santosh Shilimkar <santosh.shilimkar@ti.com> -M: Kevin Hilman <khilman@ti.com> +M: Kevin Hilman <khilman@deeprootsystems.com> L: linux-omap@vger.kernel.org S: Maintained F: drivers/gpio/gpio-omap.c @@ -6176,7 +6215,7 @@ F: include/linux/power_supply.h F: drivers/power/ PNP SUPPORT -M: Adam Belay <abelay@mit.edu> +M: Rafael J. Wysocki <rafael.j.wysocki@intel.com> M: Bjorn Helgaas <bhelgaas@google.com> S: Maintained F: drivers/pnp/ @@ -6412,6 +6451,8 @@ F: Documentation/networking/LICENSE.qla3xxx F: drivers/net/ethernet/qlogic/qla3xxx.* QLOGIC QLCNIC (1/10)Gb ETHERNET DRIVER +M: Rajesh Borundia <rajesh.borundia@qlogic.com> +M: Shahed Shaikh <shahed.shaikh@qlogic.com> M: Jitendra Kalsaria <jitendra.kalsaria@qlogic.com> M: Sony Chacko <sony.chacko@qlogic.com> M: linux-driver@qlogic.com @@ -6516,12 +6557,6 @@ S: Maintained F: Documentation/blockdev/ramdisk.txt F: drivers/block/brd.c -RAMSAM DRIVER (IBM RamSan 70/80 PCI SSD Flash Card) -M: Joshua Morris <josh.h.morris@us.ibm.com> -M: Philip Kelleher <pjk1939@linux.vnet.ibm.com> -S: Maintained -F: drivers/block/rsxx/ - RANDOM NUMBER DRIVER M: Theodore Ts'o" <tytso@mit.edu> S: Maintained @@ -7138,7 +7173,7 @@ F: arch/arm/mach-s3c2410/bast-irq.c TI DAVINCI MACHINE SUPPORT M: Sekhar Nori <nsekhar@ti.com> -M: Kevin Hilman <khilman@ti.com> +M: Kevin Hilman <khilman@deeprootsystems.com> L: davinci-linux-open-source@linux.davincidsp.com (moderated for non-subscribers) T: git git://gitorious.org/linux-davinci/linux-davinci.git Q: http://patchwork.kernel.org/project/linux-davinci/list/ @@ -7171,13 +7206,6 @@ L: netdev@vger.kernel.org S: Maintained F: drivers/net/ethernet/sis/sis900.* -SIS 96X I2C/SMBUS DRIVER -M: "Mark M. Hoffman" <mhoffman@lightlink.com> -L: linux-i2c@vger.kernel.org -S: Maintained -F: Documentation/i2c/busses/i2c-sis96x -F: drivers/i2c/busses/i2c-sis96x.c - SIS FRAMEBUFFER DRIVER M: Thomas Winischhofer <thomas@winischhofer.net> W: http://www.winischhofer.net/linuxsisvga.shtml @@ -7255,7 +7283,7 @@ F: Documentation/hwmon/sch5627 F: drivers/hwmon/sch5627.c SMSC47B397 HARDWARE MONITOR DRIVER -M: "Mark M. Hoffman" <mhoffman@lightlink.com> +M: Jean Delvare <khali@linux-fr.org> L: lm-sensors@lm-sensors.org S: Maintained F: Documentation/hwmon/smsc47b397 @@ -7678,9 +7706,10 @@ F: include/linux/swiotlb.h SYNOPSYS ARC ARCHITECTURE M: Vineet Gupta <vgupta@synopsys.com> -L: linux-snps-arc@vger.kernel.org S: Supported F: arch/arc/ +F: Documentation/devicetree/bindings/arc/ +F: drivers/tty/serial/arc-uart.c SYSV FILESYSTEM M: Christoph Hellwig <hch@infradead.org> @@ -1,7 +1,7 @@ VERSION = 3 PATCHLEVEL = 9 SUBLEVEL = 0 -EXTRAVERSION = -rc2 +EXTRAVERSION = -rc5 NAME = Unicycling Gorilla # *DOCUMENTATION* diff --git a/arch/Kconfig b/arch/Kconfig index 5a1779c93940..1455579791ec 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -319,13 +319,6 @@ config ARCH_WANT_OLD_COMPAT_IPC select ARCH_WANT_COMPAT_IPC_PARSE_VERSION bool -config HAVE_VIRT_TO_BUS - bool - help - An architecture should select this if it implements the - deprecated interface virt_to_bus(). All new architectures - should probably not select this. - config HAVE_ARCH_SECCOMP_FILTER bool help diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig index 5833aa441481..8a33ba01301f 100644 --- a/arch/alpha/Kconfig +++ b/arch/alpha/Kconfig @@ -9,7 +9,7 @@ config ALPHA select HAVE_PERF_EVENTS select HAVE_DMA_ATTRS select HAVE_GENERIC_HARDIRQS - select HAVE_VIRT_TO_BUS + select VIRT_TO_BUS select GENERIC_IRQ_PROBE select AUTO_IRQ_AFFINITY if SMP select GENERIC_IRQ_SHOW diff --git a/arch/arc/include/asm/dma-mapping.h b/arch/arc/include/asm/dma-mapping.h index 31f77aec0823..45b8e0cea176 100644 --- a/arch/arc/include/asm/dma-mapping.h +++ b/arch/arc/include/asm/dma-mapping.h @@ -126,7 +126,7 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int i; for_each_sg(sg, s, nents, i) - sg->dma_address = dma_map_page(dev, sg_page(s), s->offset, + s->dma_address = dma_map_page(dev, sg_page(s), s->offset, s->length, dir); return nents; diff --git a/arch/arc/include/asm/elf.h b/arch/arc/include/asm/elf.h index f4c8d36ebecb..a26282857683 100644 --- a/arch/arc/include/asm/elf.h +++ b/arch/arc/include/asm/elf.h @@ -72,7 +72,4 @@ extern int elf_check_arch(const struct elf32_hdr *); */ #define ELF_PLATFORM (NULL) -#define SET_PERSONALITY(ex) \ - set_personality(PER_LINUX | (current->personality & (~PER_MASK))) - #endif diff --git a/arch/arc/include/asm/entry.h b/arch/arc/include/asm/entry.h index 23daa326fc9b..eb2ae53187d9 100644 --- a/arch/arc/include/asm/entry.h +++ b/arch/arc/include/asm/entry.h @@ -415,7 +415,7 @@ *-------------------------------------------------------------*/ .macro SAVE_ALL_EXCEPTION marker - st \marker, [sp, 8] + st \marker, [sp, 8] /* orig_r8 */ st r0, [sp, 4] /* orig_r0, needed only for sys calls */ /* Restore r9 used to code the early prologue */ diff --git a/arch/arc/include/asm/kgdb.h b/arch/arc/include/asm/kgdb.h index f3c4934f0ca9..4930957ca3d3 100644 --- a/arch/arc/include/asm/kgdb.h +++ b/arch/arc/include/asm/kgdb.h @@ -13,7 +13,7 @@ #ifdef CONFIG_KGDB -#include <asm/user.h> +#include <asm/ptrace.h> /* to ensure compatibility with Linux 2.6.35, we don't implement the get/set * register API yet */ @@ -53,9 +53,7 @@ enum arc700_linux_regnums { }; #else -static inline void kgdb_trap(struct pt_regs *regs, int param) -{ -} +#define kgdb_trap(regs, param) #endif #endif /* __ARC_KGDB_H__ */ diff --git a/arch/arc/include/asm/ptrace.h b/arch/arc/include/asm/ptrace.h index 8ae783d20a81..6179de7e07c2 100644 --- a/arch/arc/include/asm/ptrace.h +++ b/arch/arc/include/asm/ptrace.h @@ -123,7 +123,7 @@ static inline long regs_return_value(struct pt_regs *regs) #define orig_r8_IS_SCALL 0x0001 #define orig_r8_IS_SCALL_RESTARTED 0x0002 #define orig_r8_IS_BRKPT 0x0004 -#define orig_r8_IS_EXCPN 0x0004 +#define orig_r8_IS_EXCPN 0x0008 #define orig_r8_IS_IRQ1 0x0010 #define orig_r8_IS_IRQ2 0x0020 diff --git a/arch/arc/include/asm/syscalls.h b/arch/arc/include/asm/syscalls.h index e53a5340ba4f..dd785befe7fd 100644 --- a/arch/arc/include/asm/syscalls.h +++ b/arch/arc/include/asm/syscalls.h @@ -16,8 +16,6 @@ #include <linux/types.h> int sys_clone_wrapper(int, int, int, int, int); -int sys_fork_wrapper(void); -int sys_vfork_wrapper(void); int sys_cacheflush(uint32_t, uint32_t uint32_t); int sys_arc_settls(void *); int sys_arc_gettls(void); diff --git a/arch/arc/include/uapi/asm/ptrace.h b/arch/arc/include/uapi/asm/ptrace.h index 6afa4f702075..30333cec0fef 100644 --- a/arch/arc/include/uapi/asm/ptrace.h +++ b/arch/arc/include/uapi/asm/ptrace.h @@ -28,14 +28,14 @@ */ struct user_regs_struct { - struct scratch { + struct { long pad; long bta, lp_start, lp_end, lp_count; long status32, ret, blink, fp, gp; long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0; long sp; } scratch; - struct callee { + struct { long pad; long r25, r24, r23, r22, r21, r20; long r19, r18, r17, r16, r15, r14, r13; diff --git a/arch/arc/kernel/entry.S b/arch/arc/kernel/entry.S index ef6800ba2f03..91eeab81f52d 100644 --- a/arch/arc/kernel/entry.S +++ b/arch/arc/kernel/entry.S @@ -452,7 +452,7 @@ tracesys: ; using ERET won't work since next-PC has already committed lr r12, [efa] GET_CURR_TASK_FIELD_PTR TASK_THREAD, r11 - st r12, [r11, THREAD_FAULT_ADDR] + st r12, [r11, THREAD_FAULT_ADDR] ; thread.fault_address ; PRE Sys Call Ptrace hook mov r0, sp ; pt_regs needed @@ -792,31 +792,6 @@ ARC_EXIT ret_from_fork ;################### Special Sys Call Wrappers ########################## -; TBD: call do_fork directly from here -ARC_ENTRY sys_fork_wrapper - SAVE_CALLEE_SAVED_USER - bl @sys_fork - DISCARD_CALLEE_SAVED_USER - - GET_CURR_THR_INFO_FLAGS r10 - btst r10, TIF_SYSCALL_TRACE - bnz tracesys_exit - - b ret_from_system_call -ARC_EXIT sys_fork_wrapper - -ARC_ENTRY sys_vfork_wrapper - SAVE_CALLEE_SAVED_USER - bl @sys_vfork - DISCARD_CALLEE_SAVED_USER - - GET_CURR_THR_INFO_FLAGS r10 - btst r10, TIF_SYSCALL_TRACE - bnz tracesys_exit - - b ret_from_system_call -ARC_EXIT sys_vfork_wrapper - ARC_ENTRY sys_clone_wrapper SAVE_CALLEE_SAVED_USER bl @sys_clone diff --git a/arch/arc/kernel/kgdb.c b/arch/arc/kernel/kgdb.c index 2888ba5be47e..52bdc83c1495 100644 --- a/arch/arc/kernel/kgdb.c +++ b/arch/arc/kernel/kgdb.c @@ -9,6 +9,7 @@ */ #include <linux/kgdb.h> +#include <linux/sched.h> #include <asm/disasm.h> #include <asm/cacheflush.h> diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c index dc0f968dae0a..2d95ac07df7b 100644 --- a/arch/arc/kernel/setup.c +++ b/arch/arc/kernel/setup.c @@ -232,10 +232,8 @@ char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len) n += scnprintf(buf + n, len - n, "\n"); -#ifdef _ASM_GENERIC_UNISTD_H n += scnprintf(buf + n, len - n, - "OS ABI [v2]\t: asm-generic/{unistd,stat,fcntl}\n"); -#endif + "OS ABI [v3]\t: no-legacy-syscalls\n"); return buf; } diff --git a/arch/arc/kernel/sys.c b/arch/arc/kernel/sys.c index f6bdd07583f3..9d6c1ca26af6 100644 --- a/arch/arc/kernel/sys.c +++ b/arch/arc/kernel/sys.c @@ -6,8 +6,6 @@ #include <asm/syscalls.h> #define sys_clone sys_clone_wrapper -#define sys_fork sys_fork_wrapper -#define sys_vfork sys_vfork_wrapper #undef __SYSCALL #define __SYSCALL(nr, call) [nr] = (call), diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b63902e7cacd..11680092e407 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -49,7 +49,6 @@ config ARM select HAVE_REGS_AND_STACK_ACCESS_API select HAVE_SYSCALL_TRACEPOINTS select HAVE_UID16 - select HAVE_VIRT_TO_BUS select KTIME_SCALAR select PERF_USE_VMALLOC select RTC_LIB @@ -556,7 +555,6 @@ config ARCH_IXP4XX config ARCH_DOVE bool "Marvell Dove" select ARCH_REQUIRE_GPIOLIB - select COMMON_CLK_DOVE select CPU_V7 select GENERIC_CLOCKEVENTS select MIGHT_HAVE_PCI @@ -744,6 +742,7 @@ config ARCH_RPC select NEED_MACH_IO_H select NEED_MACH_MEMORY_H select NO_IOPORT + select VIRT_TO_BUS help On the Acorn Risc-PC, Linux can support the internal IDE disk and CD-ROM interface, serial and parallel port, and the floppy drive. @@ -879,6 +878,7 @@ config ARCH_SHARK select ISA_DMA select NEED_MACH_MEMORY_H select PCI + select VIRT_TO_BUS select ZONE_DMA help Support for the StrongARM based Digital DNARD machine, also known @@ -1006,12 +1006,12 @@ config ARCH_MULTI_V4_V5 bool config ARCH_MULTI_V6 - bool "ARMv6 based platforms (ARM11, Scorpion, ...)" + bool "ARMv6 based platforms (ARM11)" select ARCH_MULTI_V6_V7 select CPU_V6 config ARCH_MULTI_V7 - bool "ARMv7 based platforms (Cortex-A, PJ4, Krait)" + bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)" default y select ARCH_MULTI_V6_V7 select ARCH_VEXPRESS @@ -1462,10 +1462,6 @@ config ISA_DMA bool select ISA_DMA_API -config ARCH_NO_VIRT_TO_BUS - def_bool y - depends on !ARCH_RPC && !ARCH_NETWINDER && !ARCH_SHARK - # Select ISA DMA interface config ISA_DMA_API bool @@ -1597,6 +1593,7 @@ config HAVE_ARM_ARCH_TIMER config HAVE_ARM_TWD bool depends on SMP + select CLKSRC_OF if OF help This options enables support for the ARM timer and watchdog unit @@ -1657,13 +1654,16 @@ config LOCAL_TIMERS accounting to be spread across the timer interval, preventing a "thundering herd" at every timer tick. +# The GPIO number here must be sorted by descending number. In case of +# a multiplatform kernel, we just want the highest value required by the +# selected platforms. config ARCH_NR_GPIO int default 1024 if ARCH_SHMOBILE || ARCH_TEGRA - default 355 if ARCH_U8500 - default 264 if MACH_H4700 default 512 if SOC_OMAP5 + default 355 if ARCH_U8500 default 288 if ARCH_VT8500 || ARCH_SUNXI + default 264 if MACH_H4700 default 0 help Maximum number of GPIOs in the system. @@ -1887,8 +1887,9 @@ config XEN_DOM0 config XEN bool "Xen guest support on ARM (EXPERIMENTAL)" - depends on ARM && OF + depends on ARM && AEABI && OF depends on CPU_V7 && !CPU_V6 + depends on !GENERIC_ATOMIC64 help Say Y if you want to run Linux in a Virtual Machine on Xen on ARM. diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index acddddac7ee4..9b31f4311ea2 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -492,9 +492,10 @@ config DEBUG_IMX_UART_PORT DEBUG_IMX31_UART || \ DEBUG_IMX35_UART || \ DEBUG_IMX51_UART || \ - DEBUG_IMX50_IMX53_UART || \ + DEBUG_IMX53_UART || \ DEBUG_IMX6Q_UART default 1 + depends on ARCH_MXC help Choose UART port on which kernel low-level debug messages should be output. diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile index 71768b8a1ab9..84aa2caf07ed 100644 --- a/arch/arm/boot/Makefile +++ b/arch/arm/boot/Makefile @@ -115,4 +115,4 @@ i: $(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \ $(obj)/Image System.map "$(INSTALL_PATH)" -subdir- := bootp compressed +subdir- := bootp compressed dts diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts index f8e4855bc9a5..070bba4f2585 100644 --- a/arch/arm/boot/dts/armada-370-rd.dts +++ b/arch/arm/boot/dts/armada-370-rd.dts @@ -64,5 +64,13 @@ status = "okay"; /* No CD or WP GPIOs */ }; + + usb@d0050000 { + status = "okay"; + }; + + usb@d0051000 { + status = "okay"; + }; }; }; diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi index 6f1acc75e155..5b708208b607 100644 --- a/arch/arm/boot/dts/armada-370-xp.dtsi +++ b/arch/arm/boot/dts/armada-370-xp.dtsi @@ -31,7 +31,6 @@ mpic: interrupt-controller@d0020000 { compatible = "marvell,mpic"; #interrupt-cells = <1>; - #address-cells = <1>; #size-cells = <1>; interrupt-controller; }; @@ -54,7 +53,7 @@ reg = <0xd0012000 0x100>; reg-shift = <2>; interrupts = <41>; - reg-io-width = <4>; + reg-io-width = <1>; status = "disabled"; }; serial@d0012100 { @@ -62,7 +61,7 @@ reg = <0xd0012100 0x100>; reg-shift = <2>; interrupts = <42>; - reg-io-width = <4>; + reg-io-width = <1>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index 1443949c165e..ca00d8326c87 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -46,7 +46,7 @@ reg = <0xd0012200 0x100>; reg-shift = <2>; interrupts = <43>; - reg-io-width = <4>; + reg-io-width = <1>; status = "disabled"; }; serial@d0012300 { @@ -54,7 +54,7 @@ reg = <0xd0012300 0x100>; reg-shift = <2>; interrupts = <44>; - reg-io-width = <4>; + reg-io-width = <1>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index aa98e641931f..a98c0d50fbbe 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -238,8 +238,32 @@ nand { pinctrl_nand: nand-0 { atmel,pins = - <3 4 0x0 0x1 /* PD5 gpio RDY pin pull_up */ - 3 5 0x0 0x1>; /* PD4 gpio enable pin pull_up */ + <3 0 0x1 0x0 /* PD0 periph A Read Enable */ + 3 1 0x1 0x0 /* PD1 periph A Write Enable */ + 3 2 0x1 0x0 /* PD2 periph A Address Latch Enable */ + 3 3 0x1 0x0 /* PD3 periph A Command Latch Enable */ + 3 4 0x0 0x1 /* PD4 gpio Chip Enable pin pull_up */ + 3 5 0x0 0x1 /* PD5 gpio RDY/BUSY pin pull_up */ + 3 6 0x1 0x0 /* PD6 periph A Data bit 0 */ + 3 7 0x1 0x0 /* PD7 periph A Data bit 1 */ + 3 8 0x1 0x0 /* PD8 periph A Data bit 2 */ + 3 9 0x1 0x0 /* PD9 periph A Data bit 3 */ + 3 10 0x1 0x0 /* PD10 periph A Data bit 4 */ + 3 11 0x1 0x0 /* PD11 periph A Data bit 5 */ + 3 12 0x1 0x0 /* PD12 periph A Data bit 6 */ + 3 13 0x1 0x0>; /* PD13 periph A Data bit 7 */ + }; + + pinctrl_nand_16bits: nand_16bits-0 { + atmel,pins = + <3 14 0x1 0x0 /* PD14 periph A Data bit 8 */ + 3 15 0x1 0x0 /* PD15 periph A Data bit 9 */ + 3 16 0x1 0x0 /* PD16 periph A Data bit 10 */ + 3 17 0x1 0x0 /* PD17 periph A Data bit 11 */ + 3 18 0x1 0x0 /* PD18 periph A Data bit 12 */ + 3 19 0x1 0x0 /* PD19 periph A Data bit 13 */ + 3 20 0x1 0x0 /* PD20 periph A Data bit 14 */ + 3 21 0x1 0x0>; /* PD21 periph A Data bit 15 */ }; }; diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi index 4bf2a8774aa7..7e0481e2441a 100644 --- a/arch/arm/boot/dts/bcm2835.dtsi +++ b/arch/arm/boot/dts/bcm2835.dtsi @@ -105,7 +105,7 @@ compatible = "fixed-clock"; reg = <1>; #clock-cells = <0>; - clock-frequency = <150000000>; + clock-frequency = <250000000>; }; }; }; diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi index 69140ba99f46..9de93096601a 100644 --- a/arch/arm/boot/dts/dbx5x0.dtsi +++ b/arch/arm/boot/dts/dbx5x0.dtsi @@ -319,9 +319,8 @@ }; }; - ab8500@5 { + ab8500 { compatible = "stericsson,ab8500"; - reg = <5>; /* mailbox 5 is i2c */ interrupt-parent = <&intc>; interrupts = <0 40 0x4>; interrupt-controller; diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index 67dbe20868a2..f7509cafc377 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -197,6 +197,11 @@ status = "disabled"; }; + rtc@d8500 { + compatible = "marvell,orion-rtc"; + reg = <0xd8500 0x20>; + }; + crypto: crypto@30000 { compatible = "marvell,orion-crypto"; reg = <0x30000 0x10000>, diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index e1347fceb5bc..1a62bcf18aa3 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -275,18 +275,27 @@ compatible = "arm,pl330", "arm,primecell"; reg = <0x12680000 0x1000>; interrupts = <0 35 0>; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <32>; }; pdma1: pdma@12690000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x12690000 0x1000>; interrupts = <0 36 0>; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <32>; }; mdma1: mdma@12850000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x12850000 0x1000>; interrupts = <0 34 0>; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <1>; }; }; }; diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index 5f3562ad6746..9a99755920c0 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -142,12 +142,18 @@ compatible = "arm,pl330", "arm,primecell"; reg = <0x120000 0x1000>; interrupts = <0 34 0>; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <32>; }; pdma1: pdma@121B0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x121000 0x1000>; interrupts = <0 35 0>; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <32>; }; }; diff --git a/arch/arm/boot/dts/href.dtsi b/arch/arm/boot/dts/href.dtsi index 592fb9dc35bd..379128eb9d98 100644 --- a/arch/arm/boot/dts/href.dtsi +++ b/arch/arm/boot/dts/href.dtsi @@ -221,7 +221,7 @@ }; }; - ab8500@5 { + ab8500 { ab8500-regulators { ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { regulator-name = "V-DISPLAY"; diff --git a/arch/arm/boot/dts/hrefv60plus.dts b/arch/arm/boot/dts/hrefv60plus.dts index 55f4191a626e..2b587a74b813 100644 --- a/arch/arm/boot/dts/hrefv60plus.dts +++ b/arch/arm/boot/dts/hrefv60plus.dts @@ -158,7 +158,7 @@ }; }; - ab8500@5 { + ab8500 { ab8500-regulators { ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { regulator-name = "V-DISPLAY"; diff --git a/arch/arm/boot/dts/imx53-mba53.dts b/arch/arm/boot/dts/imx53-mba53.dts index e54fffd48369..468c0a1d48d9 100644 --- a/arch/arm/boot/dts/imx53-mba53.dts +++ b/arch/arm/boot/dts/imx53-mba53.dts @@ -42,10 +42,9 @@ fsl,pins = <689 0x10000 /* DISP1_DRDY */ 482 0x10000 /* DISP1_HSYNC */ 489 0x10000 /* DISP1_VSYNC */ - 684 0x10000 /* DISP1_DAT_0 */ 515 0x10000 /* DISP1_DAT_22 */ 523 0x10000 /* DISP1_DAT_23 */ - 543 0x10000 /* DISP1_DAT_21 */ + 545 0x10000 /* DISP1_DAT_21 */ 553 0x10000 /* DISP1_DAT_20 */ 558 0x10000 /* DISP1_DAT_19 */ 564 0x10000 /* DISP1_DAT_18 */ diff --git a/arch/arm/boot/dts/kirkwood-dns320.dts b/arch/arm/boot/dts/kirkwood-dns320.dts index 5bb0bf39d3b8..c9c44b2f62d7 100644 --- a/arch/arm/boot/dts/kirkwood-dns320.dts +++ b/arch/arm/boot/dts/kirkwood-dns320.dts @@ -42,12 +42,10 @@ ocp@f1000000 { serial@12000 { - clock-frequency = <166666667>; status = "okay"; }; serial@12100 { - clock-frequency = <166666667>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/kirkwood-dns325.dts b/arch/arm/boot/dts/kirkwood-dns325.dts index d430713ea9b9..e4e4930dc5cf 100644 --- a/arch/arm/boot/dts/kirkwood-dns325.dts +++ b/arch/arm/boot/dts/kirkwood-dns325.dts @@ -50,7 +50,6 @@ }; }; serial@12000 { - clock-frequency = <200000000>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/kirkwood-dockstar.dts b/arch/arm/boot/dts/kirkwood-dockstar.dts index 2e3dd34e21a5..0196cf6b0ef2 100644 --- a/arch/arm/boot/dts/kirkwood-dockstar.dts +++ b/arch/arm/boot/dts/kirkwood-dockstar.dts @@ -37,7 +37,6 @@ }; }; serial@12000 { - clock-frequency = <200000000>; status = "ok"; }; diff --git a/arch/arm/boot/dts/kirkwood-dreamplug.dts b/arch/arm/boot/dts/kirkwood-dreamplug.dts index ef2d8c705709..289e51d86372 100644 --- a/arch/arm/boot/dts/kirkwood-dreamplug.dts +++ b/arch/arm/boot/dts/kirkwood-dreamplug.dts @@ -38,7 +38,6 @@ }; }; serial@12000 { - clock-frequency = <200000000>; status = "ok"; }; diff --git a/arch/arm/boot/dts/kirkwood-goflexnet.dts b/arch/arm/boot/dts/kirkwood-goflexnet.dts index 1b133e0c566e..bd83b8fc7c83 100644 --- a/arch/arm/boot/dts/kirkwood-goflexnet.dts +++ b/arch/arm/boot/dts/kirkwood-goflexnet.dts @@ -73,7 +73,6 @@ }; }; serial@12000 { - clock-frequency = <200000000>; status = "ok"; }; diff --git a/arch/arm/boot/dts/kirkwood-ib62x0.dts b/arch/arm/boot/dts/kirkwood-ib62x0.dts index 71902da33d63..5335b1aa8601 100644 --- a/arch/arm/boot/dts/kirkwood-ib62x0.dts +++ b/arch/arm/boot/dts/kirkwood-ib62x0.dts @@ -51,7 +51,6 @@ }; }; serial@12000 { - clock-frequency = <200000000>; status = "okay"; }; diff --git a/arch/arm/boot/dts/kirkwood-iconnect.dts b/arch/arm/boot/dts/kirkwood-iconnect.dts index 504f16be8b54..12ccf74ac3c4 100644 --- a/arch/arm/boot/dts/kirkwood-iconnect.dts +++ b/arch/arm/boot/dts/kirkwood-iconnect.dts @@ -78,7 +78,6 @@ }; }; serial@12000 { - clock-frequency = <200000000>; status = "ok"; }; diff --git a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts index 6cae4599c4b3..93c3afbef9ee 100644 --- a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts +++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts @@ -115,7 +115,6 @@ }; serial@12000 { - clock-frequency = <200000000>; status = "ok"; }; diff --git a/arch/arm/boot/dts/kirkwood-km_kirkwood.dts b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts index 8db3123ac80f..5bbd0542cdd3 100644 --- a/arch/arm/boot/dts/kirkwood-km_kirkwood.dts +++ b/arch/arm/boot/dts/kirkwood-km_kirkwood.dts @@ -34,7 +34,6 @@ }; serial@12000 { - clock-frequency = <200000000>; status = "ok"; }; diff --git a/arch/arm/boot/dts/kirkwood-lschlv2.dts b/arch/arm/boot/dts/kirkwood-lschlv2.dts index 9510c9ea666c..9f55d95f35f5 100644 --- a/arch/arm/boot/dts/kirkwood-lschlv2.dts +++ b/arch/arm/boot/dts/kirkwood-lschlv2.dts @@ -13,7 +13,6 @@ ocp@f1000000 { serial@12000 { - clock-frequency = <166666667>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/kirkwood-lsxhl.dts b/arch/arm/boot/dts/kirkwood-lsxhl.dts index 739019c4cba9..5c84c118ed8d 100644 --- a/arch/arm/boot/dts/kirkwood-lsxhl.dts +++ b/arch/arm/boot/dts/kirkwood-lsxhl.dts @@ -13,7 +13,6 @@ ocp@f1000000 { serial@12000 { - clock-frequency = <200000000>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/kirkwood-mplcec4.dts b/arch/arm/boot/dts/kirkwood-mplcec4.dts index 662dfd81b1ce..758824118a9a 100644 --- a/arch/arm/boot/dts/kirkwood-mplcec4.dts +++ b/arch/arm/boot/dts/kirkwood-mplcec4.dts @@ -90,7 +90,6 @@ }; serial@12000 { - clock-frequency = <200000000>; status = "ok"; }; diff --git a/arch/arm/boot/dts/kirkwood-ns2-common.dtsi b/arch/arm/boot/dts/kirkwood-ns2-common.dtsi index e8e7ecef1650..6affd924fe11 100644 --- a/arch/arm/boot/dts/kirkwood-ns2-common.dtsi +++ b/arch/arm/boot/dts/kirkwood-ns2-common.dtsi @@ -23,7 +23,6 @@ }; serial@12000 { - clock-frequency = <166666667>; status = "okay"; }; diff --git a/arch/arm/boot/dts/kirkwood-nsa310.dts b/arch/arm/boot/dts/kirkwood-nsa310.dts index 3a178cf708d7..a7412b937a8a 100644 --- a/arch/arm/boot/dts/kirkwood-nsa310.dts +++ b/arch/arm/boot/dts/kirkwood-nsa310.dts @@ -117,7 +117,6 @@ }; serial@12000 { - clock-frequency = <200000000>; status = "ok"; }; diff --git a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts index ede7fe0d7a87..d27f7245f8e7 100644 --- a/arch/arm/boot/dts/kirkwood-openblocks_a6.dts +++ b/arch/arm/boot/dts/kirkwood-openblocks_a6.dts @@ -18,12 +18,10 @@ ocp@f1000000 { serial@12000 { - clock-frequency = <200000000>; status = "ok"; }; serial@12100 { - clock-frequency = <200000000>; status = "ok"; }; diff --git a/arch/arm/boot/dts/kirkwood-topkick.dts b/arch/arm/boot/dts/kirkwood-topkick.dts index 842ff95d60df..66eb45b00b25 100644 --- a/arch/arm/boot/dts/kirkwood-topkick.dts +++ b/arch/arm/boot/dts/kirkwood-topkick.dts @@ -108,7 +108,6 @@ }; serial@12000 { - clock-frequency = <200000000>; status = "ok"; }; diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi index 2c738d9dc82a..fada7e6d24d8 100644 --- a/arch/arm/boot/dts/kirkwood.dtsi +++ b/arch/arm/boot/dts/kirkwood.dtsi @@ -38,6 +38,7 @@ interrupt-controller; #interrupt-cells = <2>; interrupts = <35>, <36>, <37>, <38>; + clocks = <&gate_clk 7>; }; gpio1: gpio@10140 { @@ -49,6 +50,7 @@ interrupt-controller; #interrupt-cells = <2>; interrupts = <39>, <40>, <41>; + clocks = <&gate_clk 7>; }; serial@12000 { @@ -57,7 +59,6 @@ reg-shift = <2>; interrupts = <33>; clocks = <&gate_clk 7>; - /* set clock-frequency in board dts */ status = "disabled"; }; @@ -67,7 +68,6 @@ reg-shift = <2>; interrupts = <34>; clocks = <&gate_clk 7>; - /* set clock-frequency in board dts */ status = "disabled"; }; @@ -75,6 +75,7 @@ compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc"; reg = <0x10300 0x20>; interrupts = <53>; + clocks = <&gate_clk 7>; }; spi@10600 { diff --git a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts index 5a3a58b7e18f..0077fc8510b7 100644 --- a/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts +++ b/arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dts @@ -11,7 +11,7 @@ / { model = "LaCie Ethernet Disk mini V2"; - compatible = "lacie,ethernet-disk-mini-v2", "marvell-orion5x-88f5182", "marvell,orion5x"; + compatible = "lacie,ethernet-disk-mini-v2", "marvell,orion5x-88f5182", "marvell,orion5x"; memory { reg = <0x00000000 0x4000000>; /* 64 MB */ diff --git a/arch/arm/boot/dts/snowball.dts b/arch/arm/boot/dts/snowball.dts index 27f31a5fa494..d3ec32f6b790 100644 --- a/arch/arm/boot/dts/snowball.dts +++ b/arch/arm/boot/dts/snowball.dts @@ -298,7 +298,7 @@ }; }; - ab8500@5 { + ab8500 { ab8500-regulators { ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { regulator-name = "V-DISPLAY"; diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 936d2306e7e1..7e8769bd5977 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -75,6 +75,9 @@ compatible = "arm,pl330", "arm,primecell"; reg = <0xffe01000 0x1000>; interrupts = <0 180 4>; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <32>; }; }; diff --git a/arch/arm/boot/dts/spear1310.dtsi b/arch/arm/boot/dts/spear1310.dtsi index 1513c1927cc8..122ae94076c8 100644 --- a/arch/arm/boot/dts/spear1310.dtsi +++ b/arch/arm/boot/dts/spear1310.dtsi @@ -89,7 +89,7 @@ pinmux: pinmux@e0700000 { compatible = "st,spear1310-pinmux"; reg = <0xe0700000 0x1000>; - #gpio-range-cells = <2>; + #gpio-range-cells = <3>; }; apb { @@ -212,7 +212,7 @@ interrupt-controller; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&pinmux 0 246>; + gpio-ranges = <&pinmux 0 0 246>; status = "disabled"; st-plgpio,ngpio = <246>; diff --git a/arch/arm/boot/dts/spear1340.dtsi b/arch/arm/boot/dts/spear1340.dtsi index 34da11aa6795..c511c4772efd 100644 --- a/arch/arm/boot/dts/spear1340.dtsi +++ b/arch/arm/boot/dts/spear1340.dtsi @@ -63,7 +63,7 @@ pinmux: pinmux@e0700000 { compatible = "st,spear1340-pinmux"; reg = <0xe0700000 0x1000>; - #gpio-range-cells = <2>; + #gpio-range-cells = <3>; }; pwm: pwm@e0180000 { @@ -127,7 +127,7 @@ interrupt-controller; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&pinmux 0 252>; + gpio-ranges = <&pinmux 0 0 252>; status = "disabled"; st-plgpio,ngpio = <250>; diff --git a/arch/arm/boot/dts/spear310.dtsi b/arch/arm/boot/dts/spear310.dtsi index ab45b8c81982..95372080eea6 100644 --- a/arch/arm/boot/dts/spear310.dtsi +++ b/arch/arm/boot/dts/spear310.dtsi @@ -25,7 +25,7 @@ pinmux: pinmux@b4000000 { compatible = "st,spear310-pinmux"; reg = <0xb4000000 0x1000>; - #gpio-range-cells = <2>; + #gpio-range-cells = <3>; }; fsmc: flash@44000000 { @@ -102,7 +102,7 @@ interrupt-controller; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&pinmux 0 102>; + gpio-ranges = <&pinmux 0 0 102>; status = "disabled"; st-plgpio,ngpio = <102>; diff --git a/arch/arm/boot/dts/spear320.dtsi b/arch/arm/boot/dts/spear320.dtsi index caa5520b1fd4..ffea342aeec9 100644 --- a/arch/arm/boot/dts/spear320.dtsi +++ b/arch/arm/boot/dts/spear320.dtsi @@ -24,7 +24,7 @@ pinmux: pinmux@b3000000 { compatible = "st,spear320-pinmux"; reg = <0xb3000000 0x1000>; - #gpio-range-cells = <2>; + #gpio-range-cells = <3>; }; clcd@90000000 { @@ -130,7 +130,7 @@ interrupt-controller; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&pinmux 0 102>; + gpio-ranges = <&pinmux 0 0 102>; status = "disabled"; st-plgpio,ngpio = <102>; diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 9a428931d042..3d3f64d2111a 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -118,6 +118,7 @@ compatible = "arm,cortex-a9-twd-timer"; reg = <0x50040600 0x20>; interrupts = <1 13 0x304>; + clocks = <&tegra_car 132>; }; intc: interrupt-controller { @@ -384,7 +385,7 @@ spi@7000d800 { compatible = "nvidia,tegra20-slink"; - reg = <0x7000d480 0x200>; + reg = <0x7000d800 0x200>; interrupts = <0 83 0x04>; nvidia,dma-request-selector = <&apbdma 17>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 767803e1fd55..dbf46c272562 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -119,6 +119,7 @@ compatible = "arm,cortex-a9-twd-timer"; reg = <0x50040600 0x20>; interrupts = <1 13 0xf04>; + clocks = <&tegra_car 214>; }; intc: interrupt-controller { @@ -371,7 +372,7 @@ spi@7000d800 { compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; - reg = <0x7000d480 0x200>; + reg = <0x7000d800 0x200>; interrupts = <0 83 0x04>; nvidia,dma-request-selector = <&apbdma 17>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index 5914b5654591..2a1df1bc4b99 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -111,56 +111,30 @@ }; ttc0: ttc0@f8001000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "xlnx,ttc"; + interrupt-parent = <&intc>; + interrupts = < 0 10 4 0 11 4 0 12 4 >; + compatible = "cdns,ttc"; reg = <0xF8001000 0x1000>; clocks = <&cpu_clk 3>; clock-names = "cpu_1x"; clock-ranges; - - ttc0_0: ttc0.0 { - status = "disabled"; - reg = <0>; - interrupts = <0 10 4>; - }; - ttc0_1: ttc0.1 { - status = "disabled"; - reg = <1>; - interrupts = <0 11 4>; - }; - ttc0_2: ttc0.2 { - status = "disabled"; - reg = <2>; - interrupts = <0 12 4>; - }; }; ttc1: ttc1@f8002000 { - #interrupt-parent = <&intc>; - #address-cells = <1>; - #size-cells = <0>; - compatible = "xlnx,ttc"; + interrupt-parent = <&intc>; + interrupts = < 0 37 4 0 38 4 0 39 4 >; + compatible = "cdns,ttc"; reg = <0xF8002000 0x1000>; clocks = <&cpu_clk 3>; clock-names = "cpu_1x"; clock-ranges; - - ttc1_0: ttc1.0 { - status = "disabled"; - reg = <0>; - interrupts = <0 37 4>; - }; - ttc1_1: ttc1.1 { - status = "disabled"; - reg = <1>; - interrupts = <0 38 4>; - }; - ttc1_2: ttc1.2 { - status = "disabled"; - reg = <2>; - interrupts = <0 39 4>; - }; }; + scutimer: scutimer@f8f00600 { + interrupt-parent = <&intc>; + interrupts = < 1 13 0x301 >; + compatible = "arm,cortex-a9-twd-timer"; + reg = < 0xf8f00600 0x20 >; + clocks = <&cpu_clk 1>; + } ; }; }; diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts index c772942a399a..86f44d5b0265 100644 --- a/arch/arm/boot/dts/zynq-zc702.dts +++ b/arch/arm/boot/dts/zynq-zc702.dts @@ -32,13 +32,3 @@ &ps_clk { clock-frequency = <33333330>; }; - -&ttc0_0 { - status = "ok"; - compatible = "xlnx,ttc-counter-clocksource"; -}; - -&ttc0_1 { - status = "ok"; - compatible = "xlnx,ttc-counter-clockevent"; -}; diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig index fbbc5bb022d5..6a99e30f81d2 100644 --- a/arch/arm/configs/mxs_defconfig +++ b/arch/arm/configs/mxs_defconfig @@ -116,6 +116,7 @@ CONFIG_SND_SOC=y CONFIG_SND_MXS_SOC=y CONFIG_SND_SOC_MXS_SGTL5000=y CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y CONFIG_USB_CHIPIDEA=y CONFIG_USB_CHIPIDEA_HOST=y CONFIG_USB_STORAGE=y diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig index b16bae2c9a60..bd07864f14a0 100644 --- a/arch/arm/configs/omap2plus_defconfig +++ b/arch/arm/configs/omap2plus_defconfig @@ -126,6 +126,8 @@ CONFIG_INPUT_MISC=y CONFIG_INPUT_TWL4030_PWRBUTTON=y CONFIG_VT_HW_CONSOLE_BINDING=y # CONFIG_LEGACY_PTYS is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_NR_UARTS=32 CONFIG_SERIAL_8250_EXTENDED=y CONFIG_SERIAL_8250_MANY_PORTS=y diff --git a/arch/arm/include/asm/irq.h b/arch/arm/include/asm/irq.h index 35c21c375d81..53c15dec7af6 100644 --- a/arch/arm/include/asm/irq.h +++ b/arch/arm/include/asm/irq.h @@ -30,6 +30,11 @@ extern void asm_do_IRQ(unsigned int, struct pt_regs *); void handle_IRQ(unsigned int, struct pt_regs *); void init_IRQ(void); +#ifdef CONFIG_MULTI_IRQ_HANDLER +extern void (*handle_arch_irq)(struct pt_regs *); +extern void set_handle_irq(void (*handle_irq)(struct pt_regs *)); +#endif + #endif #endif diff --git a/arch/arm/include/asm/mach/irq.h b/arch/arm/include/asm/mach/irq.h index 18c883023339..2092ee1e1300 100644 --- a/arch/arm/include/asm/mach/irq.h +++ b/arch/arm/include/asm/mach/irq.h @@ -20,11 +20,6 @@ struct seq_file; extern void init_FIQ(int); extern int show_fiq_list(struct seq_file *, int); -#ifdef CONFIG_MULTI_IRQ_HANDLER -extern void (*handle_arch_irq)(struct pt_regs *); -extern void set_handle_irq(void (*handle_irq)(struct pt_regs *)); -#endif - /* * This is for easy migration, but should be changed in the source */ @@ -35,35 +30,4 @@ do { \ raw_spin_unlock(&desc->lock); \ } while(0) -#ifndef __ASSEMBLY__ -/* - * Entry/exit functions for chained handlers where the primary IRQ chip - * may implement either fasteoi or level-trigger flow control. - */ -static inline void chained_irq_enter(struct irq_chip *chip, - struct irq_desc *desc) -{ - /* FastEOI controllers require no action on entry. */ - if (chip->irq_eoi) - return; - - if (chip->irq_mask_ack) { - chip->irq_mask_ack(&desc->irq_data); - } else { - chip->irq_mask(&desc->irq_data); - if (chip->irq_ack) - chip->irq_ack(&desc->irq_data); - } -} - -static inline void chained_irq_exit(struct irq_chip *chip, - struct irq_desc *desc) -{ - if (chip->irq_eoi) - chip->irq_eoi(&desc->irq_data); - else - chip->irq_unmask(&desc->irq_data); -} -#endif - #endif diff --git a/arch/arm/include/asm/smp_twd.h b/arch/arm/include/asm/smp_twd.h index 0f01f4677bd2..7b2899c2f7fc 100644 --- a/arch/arm/include/asm/smp_twd.h +++ b/arch/arm/include/asm/smp_twd.h @@ -34,12 +34,4 @@ struct twd_local_timer name __initdata = { \ int twd_local_timer_register(struct twd_local_timer *); -#ifdef CONFIG_HAVE_ARM_TWD -void twd_local_timer_of_register(void); -#else -static inline void twd_local_timer_of_register(void) -{ -} -#endif - #endif diff --git a/arch/arm/include/asm/xen/events.h b/arch/arm/include/asm/xen/events.h index 5c27696de14f..8b1f37bfeeec 100644 --- a/arch/arm/include/asm/xen/events.h +++ b/arch/arm/include/asm/xen/events.h @@ -2,6 +2,7 @@ #define _ASM_ARM_XEN_EVENTS_H #include <asm/ptrace.h> +#include <asm/atomic.h> enum ipi_vector { XEN_PLACEHOLDER_VECTOR, @@ -15,26 +16,8 @@ static inline int xen_irqs_disabled(struct pt_regs *regs) return raw_irqs_disabled_flags(regs->ARM_cpsr); } -/* - * We cannot use xchg because it does not support 8-byte - * values. However it is safe to use {ldr,dtd}exd directly because all - * platforms which Xen can run on support those instructions. - */ -static inline xen_ulong_t xchg_xen_ulong(xen_ulong_t *ptr, xen_ulong_t val) -{ - xen_ulong_t oldval; - unsigned int tmp; - - wmb(); - asm volatile("@ xchg_xen_ulong\n" - "1: ldrexd %0, %H0, [%3]\n" - " strexd %1, %2, %H2, [%3]\n" - " teq %1, #0\n" - " bne 1b" - : "=&r" (oldval), "=&r" (tmp) - : "r" (val), "r" (ptr) - : "memory", "cc"); - return oldval; -} +#define xchg_xen_ulong(ptr, val) atomic64_xchg(container_of((ptr), \ + atomic64_t, \ + counter), (val)) #endif /* _ASM_ARM_XEN_EVENTS_H */ diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 31644f1978d5..79078edbb9bc 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -480,7 +480,7 @@ static void __cpuinit broadcast_timer_setup(struct clock_event_device *evt) evt->features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_DUMMY; - evt->rating = 400; + evt->rating = 100; evt->mult = 1; evt->set_mode = broadcast_timer_set_mode; diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index 3f2565037480..90525d9d290b 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c @@ -362,25 +362,13 @@ int __init twd_local_timer_register(struct twd_local_timer *tlt) } #ifdef CONFIG_OF -const static struct of_device_id twd_of_match[] __initconst = { - { .compatible = "arm,cortex-a9-twd-timer", }, - { .compatible = "arm,cortex-a5-twd-timer", }, - { .compatible = "arm,arm11mp-twd-timer", }, - { }, -}; - -void __init twd_local_timer_of_register(void) +static void __init twd_local_timer_of_register(struct device_node *np) { - struct device_node *np; int err; if (!is_smp() || !setup_max_cpus) return; - np = of_find_matching_node(NULL, twd_of_match); - if (!np) - return; - twd_ppi = irq_of_parse_and_map(np, 0); if (!twd_ppi) { err = -EINVAL; @@ -398,4 +386,7 @@ void __init twd_local_timer_of_register(void) out: WARN(err, "twd_local_timer_of_register failed (%d)\n", err); } +CLOCKSOURCE_OF_DECLARE(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register); +CLOCKSOURCE_OF_DECLARE(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register); +CLOCKSOURCE_OF_DECLARE(arm_twd_11mp, "arm,arm11mp-twd-timer", twd_local_timer_of_register); #endif diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S index d912e7397ecc..94b0650ea98f 100644 --- a/arch/arm/lib/memset.S +++ b/arch/arm/lib/memset.S @@ -14,31 +14,15 @@ .text .align 5 - .word 0 - -1: subs r2, r2, #4 @ 1 do we have enough - blt 5f @ 1 bytes to align with? - cmp r3, #2 @ 1 - strltb r1, [ip], #1 @ 1 - strleb r1, [ip], #1 @ 1 - strb r1, [ip], #1 @ 1 - add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3)) -/* - * The pointer is now aligned and the length is adjusted. Try doing the - * memset again. - */ ENTRY(memset) -/* - * Preserve the contents of r0 for the return value. - */ - mov ip, r0 - ands r3, ip, #3 @ 1 unaligned? - bne 1b @ 1 + ands r3, r0, #3 @ 1 unaligned? + mov ip, r0 @ preserve r0 as return value + bne 6f @ 1 /* * we know that the pointer in ip is aligned to a word boundary. */ - orr r1, r1, r1, lsl #8 +1: orr r1, r1, r1, lsl #8 orr r1, r1, r1, lsl #16 mov r3, r1 cmp r2, #16 @@ -127,4 +111,13 @@ ENTRY(memset) tst r2, #1 strneb r1, [ip], #1 mov pc, lr + +6: subs r2, r2, #4 @ 1 do we have enough + blt 5b @ 1 bytes to align with? + cmp r3, #2 @ 1 + strltb r1, [ip], #1 @ 1 + strleb r1, [ip], #1 @ 1 + strb r1, [ip], #1 @ 1 + add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3)) + b 1b ENDPROC(memset) diff --git a/arch/arm/mach-at91/board-foxg20.c b/arch/arm/mach-at91/board-foxg20.c index 2ea7059b840b..c20a870ea9c9 100644 --- a/arch/arm/mach-at91/board-foxg20.c +++ b/arch/arm/mach-at91/board-foxg20.c @@ -176,6 +176,7 @@ static struct w1_gpio_platform_data w1_gpio_pdata = { /* If you choose to use a pin other than PB16 it needs to be 3.3V */ .pin = AT91_PIN_PB16, .is_open_drain = 1, + .ext_pullup_enable_pin = -EINVAL, }; static struct platform_device w1_device = { diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c index a033b8df9fb2..869cbecf00b7 100644 --- a/arch/arm/mach-at91/board-stamp9g20.c +++ b/arch/arm/mach-at91/board-stamp9g20.c @@ -188,6 +188,7 @@ static struct spi_board_info portuxg20_spi_devices[] = { static struct w1_gpio_platform_data w1_gpio_pdata = { .pin = AT91_PIN_PA29, .is_open_drain = 1, + .ext_pullup_enable_pin = -EINVAL, }; static struct platform_device w1_device = { diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index c5d7e1e9d757..a5afcf76550e 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c @@ -22,10 +22,9 @@ #include <linux/module.h> #include <linux/io.h> #include <linux/irqdomain.h> +#include <linux/irqchip/chained_irq.h> #include <linux/of_address.h> -#include <asm/mach/irq.h> - #include <mach/hardware.h> #include <mach/at91_pio.h> diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h index eed465ab0dd7..5fc23771c154 100644 --- a/arch/arm/mach-at91/include/mach/gpio.h +++ b/arch/arm/mach-at91/include/mach/gpio.h @@ -209,6 +209,14 @@ extern int at91_get_gpio_value(unsigned pin); extern void at91_gpio_suspend(void); extern void at91_gpio_resume(void); +#ifdef CONFIG_PINCTRL_AT91 +extern void at91_pinctrl_gpio_suspend(void); +extern void at91_pinctrl_gpio_resume(void); +#else +static inline void at91_pinctrl_gpio_suspend(void) {} +static inline void at91_pinctrl_gpio_resume(void) {} +#endif + #endif /* __ASSEMBLY__ */ #endif diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c index 8e210262aeee..e0ca59171022 100644 --- a/arch/arm/mach-at91/irq.c +++ b/arch/arm/mach-at91/irq.c @@ -92,23 +92,21 @@ static int at91_aic_set_wake(struct irq_data *d, unsigned value) void at91_irq_suspend(void) { - int i = 0, bit; + int bit = -1; if (has_aic5()) { /* disable enabled irqs */ - while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) { + while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) { at91_aic_write(AT91_AIC5_SSR, bit & AT91_AIC5_INTSEL_MSK); at91_aic_write(AT91_AIC5_IDCR, 1); - i = bit; } /* enable wakeup irqs */ - i = 0; - while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) { + bit = -1; + while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) { at91_aic_write(AT91_AIC5_SSR, bit & AT91_AIC5_INTSEL_MSK); at91_aic_write(AT91_AIC5_IECR, 1); - i = bit; } } else { at91_aic_write(AT91_AIC_IDCR, *backups); @@ -118,23 +116,21 @@ void at91_irq_suspend(void) void at91_irq_resume(void) { - int i = 0, bit; + int bit = -1; if (has_aic5()) { /* disable wakeup irqs */ - while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) { + while ((bit = find_next_bit(wakeups, n_irqs, bit + 1)) < n_irqs) { at91_aic_write(AT91_AIC5_SSR, bit & AT91_AIC5_INTSEL_MSK); at91_aic_write(AT91_AIC5_IDCR, 1); - i = bit; } /* enable irqs disabled for suspend */ - i = 0; - while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) { + bit = -1; + while ((bit = find_next_bit(backups, n_irqs, bit + 1)) < n_irqs) { at91_aic_write(AT91_AIC5_SSR, bit & AT91_AIC5_INTSEL_MSK); at91_aic_write(AT91_AIC5_IECR, 1); - i = bit; } } else { at91_aic_write(AT91_AIC_IDCR, *wakeups); diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index adb6db888a1f..73f1f250403a 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -201,7 +201,10 @@ extern u32 at91_slow_clock_sz; static int at91_pm_enter(suspend_state_t state) { - at91_gpio_suspend(); + if (of_have_populated_dt()) + at91_pinctrl_gpio_suspend(); + else + at91_gpio_suspend(); at91_irq_suspend(); pr_debug("AT91: PM - wake mask %08x, pm state %d\n", @@ -286,7 +289,10 @@ static int at91_pm_enter(suspend_state_t state) error: target_state = PM_SUSPEND_ON; at91_irq_resume(); - at91_gpio_resume(); + if (of_have_populated_dt()) + at91_pinctrl_gpio_resume(); + else + at91_gpio_resume(); return 0; } diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c index a685e9706b7b..45b7c71d9cc1 100644 --- a/arch/arm/mach-davinci/dma.c +++ b/arch/arm/mach-davinci/dma.c @@ -743,6 +743,9 @@ EXPORT_SYMBOL(edma_free_channel); */ int edma_alloc_slot(unsigned ctlr, int slot) { + if (!edma_cc[ctlr]) + return -EINVAL; + if (slot >= 0) slot = EDMA_CHAN_SLOT(slot); diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index d63d399c7bae..7bc0f9aa8b33 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -26,6 +26,7 @@ #include <linux/irqchip.h> #include <linux/of_address.h> #include <linux/irqchip/arm-gic.h> +#include <linux/irqchip/chained_irq.h> #include <asm/proc-fns.h> #include <asm/exception.h> diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 60f7c5be057d..95e04bd5813f 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -20,7 +20,6 @@ #include <linux/jiffies.h> #include <linux/smp.h> #include <linux/io.h> -#include <linux/irqchip/arm-gic.h> #include <asm/cacheflush.h> #include <asm/smp_plat.h> @@ -76,13 +75,6 @@ static DEFINE_SPINLOCK(boot_lock); static void __cpuinit exynos_secondary_init(unsigned int cpu) { /* - * if any interrupts are already enabled for the primary - * core (e.g. timer irq), then they will not have been enabled - * for us: do so - */ - gic_secondary_init(0); - - /* * let the primary processor know we're out of the * pen, then head off into the C entry point */ diff --git a/arch/arm/mach-footbridge/Kconfig b/arch/arm/mach-footbridge/Kconfig index abda5a18a664..0f2111a11315 100644 --- a/arch/arm/mach-footbridge/Kconfig +++ b/arch/arm/mach-footbridge/Kconfig @@ -67,6 +67,7 @@ config ARCH_NETWINDER select ISA select ISA_DMA select PCI + select VIRT_TO_BUS help Say Y here if you intend to run this kernel on the Rebel.COM NetWinder. Information about this machine can be found at: diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c index a4f9f50247d4..76c1170b3528 100644 --- a/arch/arm/mach-highbank/highbank.c +++ b/arch/arm/mach-highbank/highbank.c @@ -32,7 +32,6 @@ #include <asm/cacheflush.h> #include <asm/cputype.h> #include <asm/smp_plat.h> -#include <asm/smp_twd.h> #include <asm/hardware/arm_timer.h> #include <asm/hardware/timer-sp.h> #include <asm/hardware/cache-l2x0.h> @@ -119,10 +118,10 @@ static void __init highbank_timer_init(void) sp804_clocksource_and_sched_clock_init(timer_base + 0x20, "timer1"); sp804_clockevents_init(timer_base, irq, "timer0"); - twd_local_timer_of_register(); - arch_timer_of_register(); arch_timer_sched_clock_init(); + + clocksource_of_init(); } static void highbank_power_off(void) diff --git a/arch/arm/mach-highbank/platsmp.c b/arch/arm/mach-highbank/platsmp.c index 8797a7001720..a984573e0d02 100644 --- a/arch/arm/mach-highbank/platsmp.c +++ b/arch/arm/mach-highbank/platsmp.c @@ -17,7 +17,6 @@ #include <linux/init.h> #include <linux/smp.h> #include <linux/io.h> -#include <linux/irqchip/arm-gic.h> #include <asm/smp_scu.h> @@ -25,11 +24,6 @@ extern void secondary_startup(void); -static void __cpuinit highbank_secondary_init(unsigned int cpu) -{ - gic_secondary_init(0); -} - static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle) { highbank_set_cpu_jump(cpu, secondary_startup); @@ -67,7 +61,6 @@ static void __init highbank_smp_prepare_cpus(unsigned int max_cpus) struct smp_operations highbank_smp_ops __initdata = { .smp_init_cpus = highbank_smp_init_cpus, .smp_prepare_cpus = highbank_smp_prepare_cpus, - .smp_secondary_init = highbank_secondary_init, .smp_boot_secondary = highbank_boot_secondary, #ifdef CONFIG_HOTPLUG_CPU .cpu_die = highbank_cpu_die, diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c index 74e3a34d78b8..e13a8fa5e62c 100644 --- a/arch/arm/mach-imx/clk-imx35.c +++ b/arch/arm/mach-imx/clk-imx35.c @@ -264,6 +264,7 @@ int __init mx35_clocks_init(void) clk_prepare_enable(clk[gpio3_gate]); clk_prepare_enable(clk[iim_gate]); clk_prepare_enable(clk[emi_gate]); + clk_prepare_enable(clk[max_gate]); /* * SCC is needed to boot via mmc after a watchdog reset. The clock code diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index 7b025ee528a5..2f9ff93a4e61 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -172,7 +172,7 @@ static struct clk *clk[clk_max]; static struct clk_onecell_data clk_data; static enum mx6q_clks const clks_init_on[] __initconst = { - mmdc_ch0_axi, rom, + mmdc_ch0_axi, rom, pll1_sys, }; static struct clk_div_table clk_enet_ref_table[] = { diff --git a/arch/arm/mach-imx/headsmp.S b/arch/arm/mach-imx/headsmp.S index 921fc1555854..a58c8b0527cc 100644 --- a/arch/arm/mach-imx/headsmp.S +++ b/arch/arm/mach-imx/headsmp.S @@ -26,16 +26,16 @@ ENDPROC(v7_secondary_startup) #ifdef CONFIG_PM /* - * The following code is located into the .data section. This is to - * allow phys_l2x0_saved_regs to be accessed with a relative load - * as we are running on physical address here. + * The following code must assume it is running from physical address + * where absolute virtual addresses to the data section have to be + * turned into relative ones. */ - .data - .align #ifdef CONFIG_CACHE_L2X0 .macro pl310_resume - ldr r2, phys_l2x0_saved_regs + adr r0, l2x0_saved_regs_offset + ldr r2, [r0] + add r2, r2, r0 ldr r0, [r2, #L2X0_R_PHY_BASE] @ get physical base of l2x0 ldr r1, [r2, #L2X0_R_AUX_CTRL] @ get aux_ctrl value str r1, [r0, #L2X0_AUX_CTRL] @ restore aux_ctrl @@ -43,9 +43,9 @@ ENDPROC(v7_secondary_startup) str r1, [r0, #L2X0_CTRL] @ re-enable L2 .endm - .globl phys_l2x0_saved_regs -phys_l2x0_saved_regs: - .long 0 +l2x0_saved_regs_offset: + .word l2x0_saved_regs - . + #else .macro pl310_resume .endm diff --git a/arch/arm/mach-imx/imx25-dt.c b/arch/arm/mach-imx/imx25-dt.c index 03b65e5ea541..82348391582a 100644 --- a/arch/arm/mach-imx/imx25-dt.c +++ b/arch/arm/mach-imx/imx25-dt.c @@ -27,6 +27,11 @@ static const char * const imx25_dt_board_compat[] __initconst = { NULL }; +static void __init imx25_timer_init(void) +{ + mx25_clocks_init_dt(); +} + DT_MACHINE_START(IMX25_DT, "Freescale i.MX25 (Device Tree Support)") .map_io = mx25_map_io, .init_early = imx25_init_early, diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 9ffd103b27e4..b59ddcb57c78 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -12,6 +12,7 @@ #include <linux/clk.h> #include <linux/clkdev.h> +#include <linux/clocksource.h> #include <linux/cpu.h> #include <linux/delay.h> #include <linux/export.h> @@ -28,11 +29,9 @@ #include <linux/regmap.h> #include <linux/micrel_phy.h> #include <linux/mfd/syscon.h> -#include <asm/smp_twd.h> #include <asm/hardware/cache-l2x0.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <asm/mach/time.h> #include <asm/system_misc.h> #include "common.h" @@ -292,7 +291,7 @@ static void __init imx6q_init_irq(void) static void __init imx6q_timer_init(void) { mx6q_clocks_init(); - twd_local_timer_of_register(); + clocksource_of_init(); imx_print_silicon_rev("i.MX6Q", imx6q_revision()); } diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c index 7c0b03f67b05..77e9a25ed0f6 100644 --- a/arch/arm/mach-imx/platsmp.c +++ b/arch/arm/mach-imx/platsmp.c @@ -12,7 +12,6 @@ #include <linux/init.h> #include <linux/smp.h> -#include <linux/irqchip/arm-gic.h> #include <asm/page.h> #include <asm/smp_scu.h> #include <asm/mach/map.h> @@ -52,16 +51,6 @@ void imx_scu_standby_enable(void) writel_relaxed(val, scu_base); } -static void __cpuinit imx_secondary_init(unsigned int cpu) -{ - /* - * if any interrupts are already enabled for the primary - * core (e.g. timer irq), then they will not have been enabled - * for us: do so - */ - gic_secondary_init(0); -} - static int __cpuinit imx_boot_secondary(unsigned int cpu, struct task_struct *idle) { imx_set_cpu_jump(cpu, v7_secondary_startup); @@ -96,7 +85,6 @@ static void __init imx_smp_prepare_cpus(unsigned int max_cpus) struct smp_operations imx_smp_ops __initdata = { .smp_init_cpus = imx_smp_init_cpus, .smp_prepare_cpus = imx_smp_prepare_cpus, - .smp_secondary_init = imx_secondary_init, .smp_boot_secondary = imx_boot_secondary, #ifdef CONFIG_HOTPLUG_CPU .cpu_die = imx_cpu_die, diff --git a/arch/arm/mach-imx/pm-imx6q.c b/arch/arm/mach-imx/pm-imx6q.c index ee42d20cba19..5faba7a3c95f 100644 --- a/arch/arm/mach-imx/pm-imx6q.c +++ b/arch/arm/mach-imx/pm-imx6q.c @@ -22,8 +22,6 @@ #include "common.h" #include "hardware.h" -extern unsigned long phys_l2x0_saved_regs; - static int imx6q_suspend_finish(unsigned long val) { cpu_do_idle(); @@ -57,18 +55,5 @@ static const struct platform_suspend_ops imx6q_pm_ops = { void __init imx6q_pm_init(void) { - /* - * The l2x0 core code provides an infrastucture to save and restore - * l2x0 registers across suspend/resume cycle. But because imx6q - * retains L2 content during suspend and needs to resume L2 before - * MMU is enabled, it can only utilize register saving support and - * have to take care of restoring on its own. So we save physical - * address of the data structure used by l2x0 core to save registers, - * and later restore the necessary ones in imx6q resume entry. - */ -#ifdef CONFIG_CACHE_L2X0 - phys_l2x0_saved_regs = __pa(&l2x0_saved_regs); -#endif - suspend_set_ops(&imx6q_pm_ops); } diff --git a/arch/arm/mach-ixp4xx/vulcan-setup.c b/arch/arm/mach-ixp4xx/vulcan-setup.c index d42730a1d4ab..d599e354ca57 100644 --- a/arch/arm/mach-ixp4xx/vulcan-setup.c +++ b/arch/arm/mach-ixp4xx/vulcan-setup.c @@ -163,6 +163,7 @@ static struct platform_device vulcan_max6369 = { static struct w1_gpio_platform_data vulcan_w1_gpio_pdata = { .pin = 14, + .ext_pullup_enable_pin = -EINVAL, }; static struct platform_device vulcan_w1_gpio = { diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c index 2e73e9d53f70..d367aa6b47bb 100644 --- a/arch/arm/mach-kirkwood/board-dt.c +++ b/arch/arm/mach-kirkwood/board-dt.c @@ -41,16 +41,12 @@ static void __init kirkwood_legacy_clk_init(void) struct device_node *np = of_find_compatible_node( NULL, NULL, "marvell,kirkwood-gating-clock"); - struct of_phandle_args clkspec; + struct clk *clk; clkspec.np = np; clkspec.args_count = 1; - clkspec.args[0] = CGC_BIT_GE0; - orion_clkdev_add(NULL, "mv643xx_eth_port.0", - of_clk_get_from_provider(&clkspec)); - clkspec.args[0] = CGC_BIT_PEX0; orion_clkdev_add("0", "pcie", of_clk_get_from_provider(&clkspec)); @@ -59,9 +55,24 @@ static void __init kirkwood_legacy_clk_init(void) orion_clkdev_add("1", "pcie", of_clk_get_from_provider(&clkspec)); - clkspec.args[0] = CGC_BIT_GE1; - orion_clkdev_add(NULL, "mv643xx_eth_port.1", + clkspec.args[0] = CGC_BIT_SDIO; + orion_clkdev_add(NULL, "mvsdio", of_clk_get_from_provider(&clkspec)); + + /* + * The ethernet interfaces forget the MAC address assigned by + * u-boot if the clocks are turned off. Until proper DT support + * is available we always enable them for now. + */ + clkspec.args[0] = CGC_BIT_GE0; + clk = of_clk_get_from_provider(&clkspec); + orion_clkdev_add(NULL, "mv643xx_eth_port.0", clk); + clk_prepare_enable(clk); + + clkspec.args[0] = CGC_BIT_GE1; + clk = of_clk_get_from_provider(&clkspec); + orion_clkdev_add(NULL, "mv643xx_eth_port.1", clk); + clk_prepare_enable(clk); } static void __init kirkwood_of_clk_init(void) diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c index d1e2d595e79c..f62b68d926f4 100644 --- a/arch/arm/mach-mmp/gplugd.c +++ b/arch/arm/mach-mmp/gplugd.c @@ -9,6 +9,7 @@ */ #include <linux/init.h> +#include <linux/platform_device.h> #include <linux/gpio.h> #include <asm/mach/arch.h> diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c index 42932865416a..00cdb0a5dac8 100644 --- a/arch/arm/mach-msm/platsmp.c +++ b/arch/arm/mach-msm/platsmp.c @@ -15,7 +15,6 @@ #include <linux/jiffies.h> #include <linux/smp.h> #include <linux/io.h> -#include <linux/irqchip/arm-gic.h> #include <asm/cacheflush.h> #include <asm/cputype.h> @@ -42,13 +41,6 @@ static inline int get_core_count(void) static void __cpuinit msm_secondary_init(unsigned int cpu) { /* - * if any interrupts are already enabled for the primary - * core (e.g. timer irq), then they will not have been enabled - * for us: do so - */ - gic_secondary_init(0); - - /* * let the primary processor know we're out of the * pen, then head off into the C entry point */ diff --git a/arch/arm/mach-mxs/icoll.c b/arch/arm/mach-mxs/icoll.c index 8fb23af154b3..e26eeba46598 100644 --- a/arch/arm/mach-mxs/icoll.c +++ b/arch/arm/mach-mxs/icoll.c @@ -100,7 +100,7 @@ static struct irq_domain_ops icoll_irq_domain_ops = { .xlate = irq_domain_xlate_onecell, }; -void __init icoll_of_init(struct device_node *np, +static void __init icoll_of_init(struct device_node *np, struct device_node *interrupt_parent) { /* diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c index 052186713347..e7b781d3788f 100644 --- a/arch/arm/mach-mxs/mach-mxs.c +++ b/arch/arm/mach-mxs/mach-mxs.c @@ -41,8 +41,6 @@ static struct fb_videomode mx23evk_video_modes[] = { .lower_margin = 4, .hsync_len = 1, .vsync_len = 1, - .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT | - FB_SYNC_DOTCLK_FAILING_ACT, }, }; @@ -59,8 +57,6 @@ static struct fb_videomode mx28evk_video_modes[] = { .lower_margin = 10, .hsync_len = 10, .vsync_len = 10, - .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT | - FB_SYNC_DOTCLK_FAILING_ACT, }, }; @@ -77,7 +73,6 @@ static struct fb_videomode m28evk_video_modes[] = { .lower_margin = 45, .hsync_len = 1, .vsync_len = 1, - .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT, }, }; @@ -94,9 +89,7 @@ static struct fb_videomode apx4devkit_video_modes[] = { .lower_margin = 13, .hsync_len = 48, .vsync_len = 3, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT | - FB_SYNC_DATA_ENABLE_HIGH_ACT | - FB_SYNC_DOTCLK_FAILING_ACT, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, }, }; @@ -113,9 +106,7 @@ static struct fb_videomode apf28dev_video_modes[] = { .lower_margin = 0x15, .hsync_len = 64, .vsync_len = 4, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT | - FB_SYNC_DATA_ENABLE_HIGH_ACT | - FB_SYNC_DOTCLK_FAILING_ACT, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, }, }; @@ -132,7 +123,6 @@ static struct fb_videomode cfa10049_video_modes[] = { .lower_margin = 2, .hsync_len = 15, .vsync_len = 15, - .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT }, }; @@ -259,6 +249,8 @@ static void __init imx23_evk_init(void) mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes); mxsfb_pdata.default_bpp = 32; mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; + mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT | + MXSFB_SYNC_DOTCLK_FAILING_ACT; } static inline void enable_clk_enet_out(void) @@ -278,6 +270,8 @@ static void __init imx28_evk_init(void) mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes); mxsfb_pdata.default_bpp = 32; mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; + mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT | + MXSFB_SYNC_DOTCLK_FAILING_ACT; mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0); } @@ -297,6 +291,7 @@ static void __init m28evk_init(void) mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes); mxsfb_pdata.default_bpp = 16; mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT; + mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT; } static void __init sc_sps1_init(void) @@ -322,6 +317,8 @@ static void __init apx4devkit_init(void) mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes); mxsfb_pdata.default_bpp = 32; mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT; + mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT | + MXSFB_SYNC_DOTCLK_FAILING_ACT; } #define ENET0_MDC__GPIO_4_0 MXS_GPIO_NR(4, 0) @@ -402,17 +399,18 @@ static void __init cfa10049_init(void) { enable_clk_enet_out(); update_fec_mac_prop(OUI_CRYSTALFONTZ); + + mxsfb_pdata.mode_list = cfa10049_video_modes; + mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes); + mxsfb_pdata.default_bpp = 32; + mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT; + mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT; } static void __init cfa10037_init(void) { enable_clk_enet_out(); update_fec_mac_prop(OUI_CRYSTALFONTZ); - - mxsfb_pdata.mode_list = cfa10049_video_modes; - mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes); - mxsfb_pdata.default_bpp = 32; - mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT; } static void __init apf28_init(void) @@ -423,6 +421,8 @@ static void __init apf28_init(void) mxsfb_pdata.mode_count = ARRAY_SIZE(apf28dev_video_modes); mxsfb_pdata.default_bpp = 16; mxsfb_pdata.ld_intf_width = STMLCDIF_16BIT; + mxsfb_pdata.sync = MXSFB_SYNC_DATA_ENABLE_HIGH_ACT | + MXSFB_SYNC_DOTCLK_FAILING_ACT; } static void __init mxs_machine_init(void) diff --git a/arch/arm/mach-mxs/mm.c b/arch/arm/mach-mxs/mm.c index a4294aa9f301..e63b7d87acbd 100644 --- a/arch/arm/mach-mxs/mm.c +++ b/arch/arm/mach-mxs/mm.c @@ -18,6 +18,7 @@ #include <mach/mx23.h> #include <mach/mx28.h> +#include <mach/common.h> /* * Define the MX23 memory map. diff --git a/arch/arm/mach-mxs/ocotp.c b/arch/arm/mach-mxs/ocotp.c index 54add60f94c9..1dff46703753 100644 --- a/arch/arm/mach-mxs/ocotp.c +++ b/arch/arm/mach-mxs/ocotp.c @@ -19,6 +19,7 @@ #include <asm/processor.h> /* for cpu_relax() */ #include <mach/mxs.h> +#include <mach/common.h> #define OCOTP_WORD_OFFSET 0x20 #define OCOTP_WORD_COUNT 0x20 diff --git a/arch/arm/mach-omap1/common.h b/arch/arm/mach-omap1/common.h index fb18831e88aa..14f7e9920479 100644 --- a/arch/arm/mach-omap1/common.h +++ b/arch/arm/mach-omap1/common.h @@ -31,6 +31,8 @@ #include <plat/i2c.h> +#include <mach/irqs.h> + #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) void omap7xx_map_io(void); #else diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 49ac3dfebef9..8111cd9ff3e5 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -311,9 +311,6 @@ config MACH_OMAP_ZOOM2 default y select OMAP_PACKAGE_CBB select REGULATOR_FIXED_VOLTAGE if REGULATOR - select SERIAL_8250 - select SERIAL_8250_CONSOLE - select SERIAL_CORE_CONSOLE config MACH_OMAP_ZOOM3 bool "OMAP3630 Zoom3 board" @@ -321,9 +318,6 @@ config MACH_OMAP_ZOOM3 default y select OMAP_PACKAGE_CBP select REGULATOR_FIXED_VOLTAGE if REGULATOR - select SERIAL_8250 - select SERIAL_8250_CONSOLE - select SERIAL_CORE_CONSOLE config MACH_CM_T35 bool "CompuLab CM-T35/CM-T3730 modules" diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 0274ff7a2a2b..e54a48060198 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -102,6 +102,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") .init_irq = omap_intc_of_init, .handle_irq = omap3_intc_handle_irq, .init_machine = omap_generic_init, + .init_late = omap3_init_late, .init_time = omap3_sync32k_timer_init, .dt_compat = omap3_boards_compat, .restart = omap3xxx_restart, @@ -119,6 +120,7 @@ DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)") .init_irq = omap_intc_of_init, .handle_irq = omap3_intc_handle_irq, .init_machine = omap_generic_init, + .init_late = omap3_init_late, .init_time = omap3_secure_sync32k_timer_init, .dt_compat = omap3_gp_boards_compat, .restart = omap3xxx_restart, diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index f7c4616cbb60..d2ea68ea678a 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c @@ -17,6 +17,7 @@ #include <linux/io.h> #include <linux/gpio.h> #include <linux/leds.h> +#include <linux/usb/phy.h> #include <linux/usb/musb.h> #include <linux/platform_data/spi-omap2-mcspi.h> @@ -98,6 +99,7 @@ static void __init rx51_init(void) sdrc_params = nokia_get_sdram_timings(); omap_sdrc_init(sdrc_params, sdrc_params); + usb_bind_phy("musb-hdrc.0.auto", 0, "twl4030_usb"); usb_musb_init(&musb_board_data); rx51_peripherals_init(); diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 0a6b9c7a63da..40f4a03d728f 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -108,7 +108,6 @@ void omap35xx_init_late(void); void omap3630_init_late(void); void am35xx_init_late(void); void ti81xx_init_late(void); -void omap4430_init_late(void); int omap2_common_pm_late_init(void); #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430) diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index e4b16c8efe8b..410e1bac7815 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -1122,9 +1122,6 @@ int gpmc_calc_timings(struct gpmc_timings *gpmc_t, /* TODO: remove, see function definition */ gpmc_convert_ps_to_ns(gpmc_t); - /* Now the GPMC is initialised, unreserve the chip-selects */ - gpmc_cs_map = 0; - return 0; } @@ -1383,6 +1380,9 @@ static int gpmc_probe(struct platform_device *pdev) if (IS_ERR_VALUE(gpmc_setup_irq())) dev_warn(gpmc_dev, "gpmc_setup_irq failed\n"); + /* Now the GPMC is initialised, unreserve the chip-selects */ + gpmc_cs_map = 0; + rc = gpmc_probe_dt(pdev); if (rc < 0) { clk_disable_unprepare(gpmc_l3_clk); diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 6a217c98db54..f82cf878d6af 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -211,8 +211,6 @@ static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition, return -EINVAL; } - pr_err("%s: Could not find signal %s\n", __func__, muxname); - return -ENODEV; } @@ -234,6 +232,8 @@ int __init omap_mux_get_by_name(const char *muxname, return mux_mode; } + pr_err("%s: Could not find signal %s\n", __func__, muxname); + return -ENODEV; } @@ -739,8 +739,9 @@ static void __init omap_mux_dbg_create_entry( list_for_each_entry(e, &partition->muxmodes, node) { struct omap_mux *m = &e->mux; - (void)debugfs_create_file(m->muxnames[0], S_IWUSR, mux_dbg_dir, - m, &omap_mux_dbg_signal_fops); + (void)debugfs_create_file(m->muxnames[0], S_IWUSR | S_IRUGO, + mux_dbg_dir, m, + &omap_mux_dbg_signal_fops); } } diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index d9727218dd0a..e7a449758ab5 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -67,13 +67,6 @@ static void __cpuinit omap4_secondary_init(unsigned int cpu) 4, 0, 0, 0, 0, 0); /* - * If any interrupts are already enabled for the primary - * core (e.g. timer irq), then they will not have been enabled - * for us: do so - */ - gic_secondary_init(0); - - /* * Synchronise with the boot thread. */ spin_lock(&boot_lock); diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 2bdd4cf17a8f..4fd80257c73e 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -597,7 +597,7 @@ void __init omap4_local_timer_init(void) int err; if (of_have_populated_dt()) { - twd_local_timer_of_register(); + clocksource_of_init(); return; } diff --git a/arch/arm/mach-prima2/platsmp.c b/arch/arm/mach-prima2/platsmp.c index 4b788310f6a6..c7c92e78f0cf 100644 --- a/arch/arm/mach-prima2/platsmp.c +++ b/arch/arm/mach-prima2/platsmp.c @@ -11,7 +11,6 @@ #include <linux/delay.h> #include <linux/of.h> #include <linux/of_address.h> -#include <linux/irqchip/arm-gic.h> #include <asm/page.h> #include <asm/mach/map.h> #include <asm/smp_plat.h> @@ -49,13 +48,6 @@ void __init sirfsoc_map_scu(void) static void __cpuinit sirfsoc_secondary_init(unsigned int cpu) { /* - * if any interrupts are already enabled for the primary - * core (e.g. timer irq), then they will not have been enabled - * for us: do so - */ - gic_secondary_init(0); - - /* * let the primary processor know we're out of the * pen, then head off into the C entry point */ diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c index af41888acbd6..969b0ba7fa70 100644 --- a/arch/arm/mach-pxa/raumfeld.c +++ b/arch/arm/mach-pxa/raumfeld.c @@ -505,6 +505,7 @@ static struct w1_gpio_platform_data w1_gpio_platform_data = { .pin = GPIO_ONE_WIRE, .is_open_drain = 0, .enable_external_pullup = w1_enable_external_pullup, + .ext_pullup_enable_pin = -EINVAL, }; struct platform_device raumfeld_w1_gpio_device = { diff --git a/arch/arm/mach-s3c24xx/irq.c b/arch/arm/mach-s3c24xx/irq.c index cb9f5e011e73..b6fac28a0034 100644 --- a/arch/arm/mach-s3c24xx/irq.c +++ b/arch/arm/mach-s3c24xx/irq.c @@ -25,6 +25,7 @@ #include <linux/ioport.h> #include <linux/device.h> #include <linux/irqdomain.h> +#include <linux/irqchip/chained_irq.h> #include <asm/mach/irq.h> diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c index fcdf52dbcc49..f051f53e35b7 100644 --- a/arch/arm/mach-s5pv210/clock.c +++ b/arch/arm/mach-s5pv210/clock.c @@ -214,11 +214,6 @@ static struct clk clk_pcmcdclk2 = { .name = "pcmcdclk", }; -static struct clk dummy_apb_pclk = { - .name = "apb_pclk", - .id = -1, -}; - static struct clk *clkset_vpllsrc_list[] = { [0] = &clk_fin_vpll, [1] = &clk_sclk_hdmi27m, @@ -305,18 +300,6 @@ static struct clk_ops clk_fout_apll_ops = { static struct clk init_clocks_off[] = { { - .name = "dma", - .devname = "dma-pl330.0", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 3), - }, { - .name = "dma", - .devname = "dma-pl330.1", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 4), - }, { .name = "rot", .parent = &clk_hclk_dsys.clk, .enable = s5pv210_clk_ip0_ctrl, @@ -573,6 +556,20 @@ static struct clk clk_hsmmc3 = { .ctrlbit = (1<<19), }; +static struct clk clk_pdma0 = { + .name = "pdma0", + .parent = &clk_hclk_psys.clk, + .enable = s5pv210_clk_ip0_ctrl, + .ctrlbit = (1 << 3), +}; + +static struct clk clk_pdma1 = { + .name = "pdma1", + .parent = &clk_hclk_psys.clk, + .enable = s5pv210_clk_ip0_ctrl, + .ctrlbit = (1 << 4), +}; + static struct clk *clkset_uart_list[] = { [6] = &clk_mout_mpll.clk, [7] = &clk_mout_epll.clk, @@ -1075,6 +1072,8 @@ static struct clk *clk_cdev[] = { &clk_hsmmc1, &clk_hsmmc2, &clk_hsmmc3, + &clk_pdma0, + &clk_pdma1, }; /* Clock initialisation code */ @@ -1333,6 +1332,8 @@ static struct clk_lookup s5pv210_clk_lookup[] = { CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), CLKDEV_INIT("s5pv210-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), CLKDEV_INIT("s5pv210-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), + CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0), + CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1), }; void __init s5pv210_register_clocks(void) @@ -1361,6 +1362,5 @@ void __init s5pv210_register_clocks(void) for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++) s3c_disable_clocks(clk_cdev[ptr], 1); - s3c24xx_register_clock(&dummy_apb_pclk); s3c_pwmclk_init(); } diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c index 3a38f7b34b94..e373de44a8b6 100644 --- a/arch/arm/mach-s5pv210/mach-goni.c +++ b/arch/arm/mach-s5pv210/mach-goni.c @@ -845,7 +845,7 @@ static struct fimc_source_info goni_camera_sensors[] = { .mux_id = 0, .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING | V4L2_MBUS_VSYNC_ACTIVE_LOW, - .bus_type = FIMC_BUS_TYPE_ITU_601, + .fimc_bus_type = FIMC_BUS_TYPE_ITU_601, .board_info = &noon010pc30_board_info, .i2c_bus_num = 0, .clk_frequency = 16000000UL, diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c index 8ff53a19c48c..c7540710906f 100644 --- a/arch/arm/mach-shmobile/board-ag5evm.c +++ b/arch/arm/mach-shmobile/board-ag5evm.c @@ -23,6 +23,8 @@ #include <linux/init.h> #include <linux/interrupt.h> #include <linux/irq.h> +#include <linux/pinctrl/machine.h> +#include <linux/pinctrl/pinconf-generic.h> #include <linux/platform_device.h> #include <linux/delay.h> #include <linux/io.h> @@ -304,9 +306,9 @@ static int lcd_backlight_set_brightness(int brightness) if (brightness == 0) { /* Reset the chip */ - gpio_set_value(GPIO_PORT235, 0); + gpio_set_value(235, 0); mdelay(24); - gpio_set_value(GPIO_PORT235, 1); + gpio_set_value(235, 1); return 0; } @@ -406,7 +408,7 @@ static struct sh_mobile_sdhi_info sdhi0_info = { .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_GPIO_CD, .tmio_caps = MMC_CAP_SD_HIGHSPEED, .tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, - .cd_gpio = GPIO_PORT251, + .cd_gpio = 251, }; static struct resource sdhi0_resources[] = { @@ -461,7 +463,7 @@ static struct regulator_init_data cn4_power_init_data = { static struct fixed_voltage_config cn4_power_info = { .supply_name = "CN4 SD/MMC Vdd", .microvolts = 3300000, - .gpio = GPIO_PORT114, + .gpio = 114, .enable_high = 1, .init_data = &cn4_power_init_data, }; @@ -479,10 +481,10 @@ static void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state) static int power_gpio = -EINVAL; if (power_gpio < 0) { - int ret = gpio_request_one(GPIO_PORT114, GPIOF_OUT_INIT_LOW, + int ret = gpio_request_one(114, GPIOF_OUT_INIT_LOW, "sdhi1_power"); if (!ret) - power_gpio = GPIO_PORT114; + power_gpio = 114; } /* @@ -493,7 +495,7 @@ static void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state) * regulator driver. We have to live with the race in case the driver * gets unloaded and the GPIO freed between these two steps. */ - gpio_set_value(GPIO_PORT114, state); + gpio_set_value(114, state); } static struct sh_mobile_sdhi_info sh_sdhi1_info = { @@ -550,6 +552,77 @@ static struct platform_device *ag5evm_devices[] __initdata = { &sdhi1_device, }; +static unsigned long pin_pullup_conf[] = { + PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0), +}; + +static const struct pinctrl_map ag5evm_pinctrl_map[] = { + /* FSIA */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0", + "fsia_mclk_in", "fsia"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0", + "fsia_sclk_in", "fsia"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0", + "fsia_data_in", "fsia"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0", + "fsia_data_out", "fsia"), + /* I2C2 & I2C3 */ + PIN_MAP_MUX_GROUP_DEFAULT("i2c-sh_mobile.2", "pfc-sh73a0", + "i2c2_0", "i2c2"), + PIN_MAP_MUX_GROUP_DEFAULT("i2c-sh_mobile.3", "pfc-sh73a0", + "i2c3_0", "i2c3"), + /* IrDA */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_irda.0", "pfc-sh73a0", + "irda_0", "irda"), + /* KEYSC */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0", + "keysc_in8", "keysc"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0", + "keysc_out04", "keysc"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0", + "keysc_out5", "keysc"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0", + "keysc_out6_0", "keysc"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0", + "keysc_out7_0", "keysc"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0", + "keysc_out8_0", "keysc"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0", + "keysc_out9_2", "keysc"), + PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0", + "keysc_in8", pin_pullup_conf), + /* MMCIF */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0", + "mmc0_data8_0", "mmc0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0", + "mmc0_ctrl_0", "mmc0"), + PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mmcif.0", "pfc-sh73a0", + "PORT279", pin_pullup_conf), + PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0", + "mmc0_data8_0", pin_pullup_conf), + /* SCIFA2 */ + PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh73a0", + "scifa2_data_0", "scifa2"), + PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh73a0", + "scifa2_ctrl_0", "scifa2"), + /* SDHI0 (CN15 [SD I/F]) */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0", + "sdhi0_data4", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0", + "sdhi0_ctrl", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0", + "sdhi0_wp", "sdhi0"), + /* SDHI1 (CN4 [WLAN I/F]) */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0", + "sdhi1_data4", "sdhi1"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0", + "sdhi1_ctrl", "sdhi1"), + PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0", + "sdhi1_data4", pin_pullup_conf), + PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0", + "PORT263", pin_pullup_conf), +}; + static void __init ag5evm_init(void) { regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers, @@ -558,96 +631,27 @@ static void __init ag5evm_init(void) ARRAY_SIZE(fixed2v8_power_consumers), 3300000); regulator_register_fixed(3, dummy_supplies, ARRAY_SIZE(dummy_supplies)); + pinctrl_register_mappings(ag5evm_pinctrl_map, + ARRAY_SIZE(ag5evm_pinctrl_map)); sh73a0_pinmux_init(); - /* enable SCIFA2 */ - gpio_request(GPIO_FN_SCIFA2_TXD1, NULL); - gpio_request(GPIO_FN_SCIFA2_RXD1, NULL); - gpio_request(GPIO_FN_SCIFA2_RTS1_, NULL); - gpio_request(GPIO_FN_SCIFA2_CTS1_, NULL); - - /* enable KEYSC */ - gpio_request(GPIO_FN_KEYIN0_PU, NULL); - gpio_request(GPIO_FN_KEYIN1_PU, NULL); - gpio_request(GPIO_FN_KEYIN2_PU, NULL); - gpio_request(GPIO_FN_KEYIN3_PU, NULL); - gpio_request(GPIO_FN_KEYIN4_PU, NULL); - gpio_request(GPIO_FN_KEYIN5_PU, NULL); - gpio_request(GPIO_FN_KEYIN6_PU, NULL); - gpio_request(GPIO_FN_KEYIN7_PU, NULL); - gpio_request(GPIO_FN_KEYOUT0, NULL); - gpio_request(GPIO_FN_KEYOUT1, NULL); - gpio_request(GPIO_FN_KEYOUT2, NULL); - gpio_request(GPIO_FN_KEYOUT3, NULL); - gpio_request(GPIO_FN_KEYOUT4, NULL); - gpio_request(GPIO_FN_KEYOUT5, NULL); - gpio_request(GPIO_FN_PORT59_KEYOUT6, NULL); - gpio_request(GPIO_FN_PORT58_KEYOUT7, NULL); - gpio_request(GPIO_FN_KEYOUT8, NULL); - gpio_request(GPIO_FN_PORT149_KEYOUT9, NULL); - - /* enable I2C channel 2 and 3 */ - gpio_request(GPIO_FN_PORT236_I2C_SDA2, NULL); - gpio_request(GPIO_FN_PORT237_I2C_SCL2, NULL); - gpio_request(GPIO_FN_PORT248_I2C_SCL3, NULL); - gpio_request(GPIO_FN_PORT249_I2C_SDA3, NULL); - /* enable MMCIF */ - gpio_request(GPIO_FN_MMCCLK0, NULL); - gpio_request(GPIO_FN_MMCCMD0_PU, NULL); - gpio_request(GPIO_FN_MMCD0_0_PU, NULL); - gpio_request(GPIO_FN_MMCD0_1_PU, NULL); - gpio_request(GPIO_FN_MMCD0_2_PU, NULL); - gpio_request(GPIO_FN_MMCD0_3_PU, NULL); - gpio_request(GPIO_FN_MMCD0_4_PU, NULL); - gpio_request(GPIO_FN_MMCD0_5_PU, NULL); - gpio_request(GPIO_FN_MMCD0_6_PU, NULL); - gpio_request(GPIO_FN_MMCD0_7_PU, NULL); - gpio_request_one(GPIO_PORT208, GPIOF_OUT_INIT_HIGH, NULL); /* Reset */ + gpio_request_one(208, GPIOF_OUT_INIT_HIGH, NULL); /* Reset */ /* enable SMSC911X */ - gpio_request_one(GPIO_PORT144, GPIOF_IN, NULL); /* PINTA2 */ - gpio_request_one(GPIO_PORT145, GPIOF_OUT_INIT_HIGH, NULL); /* RESET */ - - /* FSI A */ - gpio_request(GPIO_FN_FSIACK, NULL); - gpio_request(GPIO_FN_FSIAILR, NULL); - gpio_request(GPIO_FN_FSIAIBT, NULL); - gpio_request(GPIO_FN_FSIAISLD, NULL); - gpio_request(GPIO_FN_FSIAOSLD, NULL); - - /* IrDA */ - gpio_request(GPIO_FN_PORT241_IRDA_OUT, NULL); - gpio_request(GPIO_FN_PORT242_IRDA_IN, NULL); - gpio_request(GPIO_FN_PORT243_IRDA_FIRSEL, NULL); + gpio_request_one(144, GPIOF_IN, NULL); /* PINTA2 */ + gpio_request_one(145, GPIOF_OUT_INIT_HIGH, NULL); /* RESET */ /* LCD panel */ - gpio_request_one(GPIO_PORT217, GPIOF_OUT_INIT_LOW, NULL); /* RESET */ + gpio_request_one(217, GPIOF_OUT_INIT_LOW, NULL); /* RESET */ mdelay(1); - gpio_set_value(GPIO_PORT217, 1); + gpio_set_value(217, 1); mdelay(100); /* LCD backlight controller */ - gpio_request_one(GPIO_PORT235, GPIOF_OUT_INIT_LOW, NULL); /* RESET */ + gpio_request_one(235, GPIOF_OUT_INIT_LOW, NULL); /* RESET */ lcd_backlight_set_brightness(0); - /* enable SDHI0 on CN15 [SD I/F] */ - gpio_request(GPIO_FN_SDHIWP0, NULL); - gpio_request(GPIO_FN_SDHICMD0, NULL); - gpio_request(GPIO_FN_SDHICLK0, NULL); - gpio_request(GPIO_FN_SDHID0_3, NULL); - gpio_request(GPIO_FN_SDHID0_2, NULL); - gpio_request(GPIO_FN_SDHID0_1, NULL); - gpio_request(GPIO_FN_SDHID0_0, NULL); - - /* enable SDHI1 on CN4 [WLAN I/F] */ - gpio_request(GPIO_FN_SDHICLK1, NULL); - gpio_request(GPIO_FN_SDHICMD1_PU, NULL); - gpio_request(GPIO_FN_SDHID1_3_PU, NULL); - gpio_request(GPIO_FN_SDHID1_2_PU, NULL); - gpio_request(GPIO_FN_SDHID1_1_PU, NULL); - gpio_request(GPIO_FN_SDHID1_0_PU, NULL); - #ifdef CONFIG_CACHE_L2X0 /* Shared attribute override enable, 64K*8way */ l2x0_init(IOMEM(0xf0100000), 0x00460000, 0xc2000fff); diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index 38f1259a0daf..45f78cadec1d 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c @@ -34,6 +34,7 @@ #include <linux/i2c.h> #include <linux/i2c/tsc2007.h> #include <linux/io.h> +#include <linux/pinctrl/machine.h> #include <linux/regulator/fixed.h> #include <linux/regulator/machine.h> #include <linux/smsc911x.h> @@ -273,11 +274,11 @@ static struct platform_device smc911x_device = { /* * The card detect pin of the top SD/MMC slot (CN7) is active low and is - * connected to GPIO A22 of SH7372 (GPIO_PORT41). + * connected to GPIO A22 of SH7372 (GPIO 41). */ static int slot_cn7_get_cd(struct platform_device *pdev) { - return !gpio_get_value(GPIO_PORT41); + return !gpio_get_value(41); } /* MERAM */ static struct sh_mobile_meram_info meram_info = { @@ -838,22 +839,22 @@ static struct platform_device fsi_hdmi_device = { static struct gpio_led ap4evb_leds[] = { { .name = "led4", - .gpio = GPIO_PORT185, + .gpio = 185, .default_state = LEDS_GPIO_DEFSTATE_ON, }, { .name = "led2", - .gpio = GPIO_PORT186, + .gpio = 186, .default_state = LEDS_GPIO_DEFSTATE_ON, }, { .name = "led3", - .gpio = GPIO_PORT187, + .gpio = 187, .default_state = LEDS_GPIO_DEFSTATE_ON, }, { .name = "led1", - .gpio = GPIO_PORT188, + .gpio = 188, .default_state = LEDS_GPIO_DEFSTATE_ON, } }; @@ -1026,10 +1027,10 @@ out: /* TouchScreen */ #ifdef CONFIG_AP4EVB_QHD # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123 -# define GPIO_TSC_PORT GPIO_PORT123 +# define GPIO_TSC_PORT 123 #else /* WVGA */ # define GPIO_TSC_IRQ GPIO_FN_IRQ7_40 -# define GPIO_TSC_PORT GPIO_PORT40 +# define GPIO_TSC_PORT 40 #endif #define IRQ28 evt2irq(0x3380) /* IRQ28A */ @@ -1084,6 +1085,28 @@ static struct i2c_board_info i2c1_devices[] = { }; +static const struct pinctrl_map ap4evb_pinctrl_map[] = { + /* MMCIF */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372", + "mmc0_data8_0", "mmc0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372", + "mmc0_ctrl_0", "mmc0"), + /* SDHI0 */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372", + "sdhi0_data4", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372", + "sdhi0_ctrl", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372", + "sdhi0_cd", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372", + "sdhi0_wp", "sdhi0"), + /* SDHI1 */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372", + "sdhi1_data4", "sdhi1"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372", + "sdhi1_ctrl", "sdhi1"), +}; + #define GPIO_PORT9CR IOMEM(0xE6051009) #define GPIO_PORT10CR IOMEM(0xE605100A) #define USCCR1 IOMEM(0xE6058144) @@ -1110,6 +1133,8 @@ static void __init ap4evb_init(void) /* External clock source */ clk_set_rate(&sh7372_dv_clki_clk, 27000000); + pinctrl_register_mappings(ap4evb_pinctrl_map, + ARRAY_SIZE(ap4evb_pinctrl_map)); sh7372_pinmux_init(); /* enable SCIFA0 */ @@ -1121,40 +1146,10 @@ static void __init ap4evb_init(void) gpio_request(GPIO_FN_IRQ6_39, NULL); /* enable Debug switch (S6) */ - gpio_request_one(GPIO_PORT32, GPIOF_IN | GPIOF_EXPORT, NULL); - gpio_request_one(GPIO_PORT33, GPIOF_IN | GPIOF_EXPORT, NULL); - gpio_request_one(GPIO_PORT34, GPIOF_IN | GPIOF_EXPORT, NULL); - gpio_request_one(GPIO_PORT35, GPIOF_IN | GPIOF_EXPORT, NULL); - - /* SDHI0 */ - gpio_request(GPIO_FN_SDHICD0, NULL); - gpio_request(GPIO_FN_SDHIWP0, NULL); - gpio_request(GPIO_FN_SDHICMD0, NULL); - gpio_request(GPIO_FN_SDHICLK0, NULL); - gpio_request(GPIO_FN_SDHID0_3, NULL); - gpio_request(GPIO_FN_SDHID0_2, NULL); - gpio_request(GPIO_FN_SDHID0_1, NULL); - gpio_request(GPIO_FN_SDHID0_0, NULL); - - /* SDHI1 */ - gpio_request(GPIO_FN_SDHICMD1, NULL); - gpio_request(GPIO_FN_SDHICLK1, NULL); - gpio_request(GPIO_FN_SDHID1_3, NULL); - gpio_request(GPIO_FN_SDHID1_2, NULL); - gpio_request(GPIO_FN_SDHID1_1, NULL); - gpio_request(GPIO_FN_SDHID1_0, NULL); - - /* MMCIF */ - gpio_request(GPIO_FN_MMCD0_0, NULL); - gpio_request(GPIO_FN_MMCD0_1, NULL); - gpio_request(GPIO_FN_MMCD0_2, NULL); - gpio_request(GPIO_FN_MMCD0_3, NULL); - gpio_request(GPIO_FN_MMCD0_4, NULL); - gpio_request(GPIO_FN_MMCD0_5, NULL); - gpio_request(GPIO_FN_MMCD0_6, NULL); - gpio_request(GPIO_FN_MMCD0_7, NULL); - gpio_request(GPIO_FN_MMCCMD0, NULL); - gpio_request(GPIO_FN_MMCCLK0, NULL); + gpio_request_one(32, GPIOF_IN | GPIOF_EXPORT, NULL); + gpio_request_one(33, GPIOF_IN | GPIOF_EXPORT, NULL); + gpio_request_one(34, GPIOF_IN | GPIOF_EXPORT, NULL); + gpio_request_one(35, GPIOF_IN | GPIOF_EXPORT, NULL); /* USB enable */ gpio_request(GPIO_FN_VBUS0_1, NULL); @@ -1172,15 +1167,15 @@ static void __init ap4evb_init(void) gpio_request(GPIO_FN_FSIAILR, NULL); gpio_request(GPIO_FN_FSIAISLD, NULL); gpio_request(GPIO_FN_FSIAOSLD, NULL); - gpio_request_one(GPIO_PORT161, GPIOF_OUT_INIT_LOW, NULL); /* slave */ + gpio_request_one(161, GPIOF_OUT_INIT_LOW, NULL); /* slave */ - gpio_request(GPIO_PORT9, NULL); - gpio_request(GPIO_PORT10, NULL); + gpio_request(9, NULL); + gpio_request(10, NULL); gpio_direction_none(GPIO_PORT9CR); /* FSIAOBT needs no direction */ gpio_direction_none(GPIO_PORT10CR); /* FSIAOLR needs no direction */ /* card detect pin for MMC slot (CN7) */ - gpio_request_one(GPIO_PORT41, GPIOF_IN, NULL); + gpio_request_one(41, GPIOF_IN, NULL); /* setup FSI2 port B (HDMI) */ gpio_request(GPIO_FN_FSIBCK, NULL); @@ -1268,8 +1263,8 @@ static void __init ap4evb_init(void) gpio_request(GPIO_FN_LCDDISP, NULL); gpio_request(GPIO_FN_LCDDCK, NULL); - gpio_request_one(GPIO_PORT189, GPIOF_OUT_INIT_HIGH, NULL); /* backlight */ - gpio_request_one(GPIO_PORT151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */ + gpio_request_one(189, GPIOF_OUT_INIT_HIGH, NULL); /* backlight */ + gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */ lcdc_info.clock_source = LCDC_CLK_BUS; lcdc_info.ch[0].interface_type = RGB18; diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c index e451327278af..9415cb4e6199 100644 --- a/arch/arm/mach-shmobile/board-armadillo800eva.c +++ b/arch/arm/mach-shmobile/board-armadillo800eva.c @@ -28,6 +28,7 @@ #include <linux/platform_device.h> #include <linux/gpio.h> #include <linux/gpio_keys.h> +#include <linux/pinctrl/machine.h> #include <linux/regulator/fixed.h> #include <linux/regulator/machine.h> #include <linux/sh_eth.h> @@ -227,7 +228,7 @@ static void usbhsf_power_ctrl(struct platform_device *pdev, static int usbhsf_get_vbus(struct platform_device *pdev) { - return gpio_get_value(GPIO_PORT209); + return gpio_get_value(209); } static irqreturn_t usbhsf_interrupt(int irq, void *data) @@ -535,10 +536,10 @@ static struct platform_device hdmi_lcdc_device = { { .code = c, .gpio = g, .desc = d, .active_low = 1, __VA_ARGS__ } static struct gpio_keys_button gpio_buttons[] = { - GPIO_KEY(KEY_POWER, GPIO_PORT99, "SW3", .wakeup = 1), - GPIO_KEY(KEY_BACK, GPIO_PORT100, "SW4"), - GPIO_KEY(KEY_MENU, GPIO_PORT97, "SW5"), - GPIO_KEY(KEY_HOME, GPIO_PORT98, "SW6"), + GPIO_KEY(KEY_POWER, 99, "SW3", .wakeup = 1), + GPIO_KEY(KEY_BACK, 100, "SW4"), + GPIO_KEY(KEY_MENU, 97, "SW5"), + GPIO_KEY(KEY_HOME, 98, "SW6"), }; static struct gpio_keys_platform_data gpio_key_info = { @@ -656,6 +657,17 @@ static struct platform_device sdhi1_device = { .resource = sdhi1_resources, }; +static const struct pinctrl_map eva_sdhi1_pinctrl_map[] = { + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a7740", + "sdhi1_data4", "sdhi1"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a7740", + "sdhi1_ctrl", "sdhi1"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a7740", + "sdhi1_cd", "sdhi1"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a7740", + "sdhi1_wp", "sdhi1"), +}; + /* MMCIF */ static struct sh_mmcif_plat_data sh_mmcif_plat = { .sup_pclk = 0, @@ -708,9 +720,9 @@ static int mt9t111_power(struct device *dev, int mode) /* video1 (= CON1 camera) expect 24MHz */ clk_set_rate(mclk, clk_round_rate(mclk, 24000000)); clk_enable(mclk); - gpio_set_value(GPIO_PORT158, 1); + gpio_set_value(158, 1); } else { - gpio_set_value(GPIO_PORT158, 0); + gpio_set_value(158, 0); clk_disable(mclk); } @@ -864,8 +876,8 @@ static struct platform_device fsi_hdmi_device = { /* RTC: RTC connects i2c-gpio. */ static struct i2c_gpio_platform_data i2c_gpio_data = { - .sda_pin = GPIO_PORT208, - .scl_pin = GPIO_PORT91, + .sda_pin = 208, + .scl_pin = 91, .udelay = 5, /* 100 kHz */ }; @@ -914,6 +926,28 @@ static struct platform_device *eva_devices[] __initdata = { &i2c_gpio_device, }; +static const struct pinctrl_map eva_pinctrl_map[] = { + /* LCD0 */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740", + "lcd0_data24_0", "lcd0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740", + "lcd0_lclk_1", "lcd0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740", + "lcd0_sync", "lcd0"), + /* MMCIF */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-r8a7740", + "mmc0_data8_1", "mmc0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-r8a7740", + "mmc0_ctrl_1", "mmc0"), + /* SDHI0 */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7740", + "sdhi0_data4", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7740", + "sdhi0_ctrl", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7740", + "sdhi0_wp", "sdhi0"), +}; + static void __init eva_clock_init(void) { struct clk *system = clk_get(NULL, "system_clk"); @@ -961,6 +995,8 @@ static void __init eva_init(void) regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers, ARRAY_SIZE(fixed3v3_power_consumers), 3300000); + pinctrl_register_mappings(eva_pinctrl_map, ARRAY_SIZE(eva_pinctrl_map)); + r8a7740_pinmux_init(); r8a7740_meram_workaround(); @@ -970,42 +1006,13 @@ static void __init eva_init(void) /* LCDC0 */ gpio_request(GPIO_FN_LCDC0_SELECT, NULL); - gpio_request(GPIO_FN_LCD0_D0, NULL); - gpio_request(GPIO_FN_LCD0_D1, NULL); - gpio_request(GPIO_FN_LCD0_D2, NULL); - gpio_request(GPIO_FN_LCD0_D3, NULL); - gpio_request(GPIO_FN_LCD0_D4, NULL); - gpio_request(GPIO_FN_LCD0_D5, NULL); - gpio_request(GPIO_FN_LCD0_D6, NULL); - gpio_request(GPIO_FN_LCD0_D7, NULL); - gpio_request(GPIO_FN_LCD0_D8, NULL); - gpio_request(GPIO_FN_LCD0_D9, NULL); - gpio_request(GPIO_FN_LCD0_D10, NULL); - gpio_request(GPIO_FN_LCD0_D11, NULL); - gpio_request(GPIO_FN_LCD0_D12, NULL); - gpio_request(GPIO_FN_LCD0_D13, NULL); - gpio_request(GPIO_FN_LCD0_D14, NULL); - gpio_request(GPIO_FN_LCD0_D15, NULL); - gpio_request(GPIO_FN_LCD0_D16, NULL); - gpio_request(GPIO_FN_LCD0_D17, NULL); - gpio_request(GPIO_FN_LCD0_D18_PORT40, NULL); - gpio_request(GPIO_FN_LCD0_D19_PORT4, NULL); - gpio_request(GPIO_FN_LCD0_D20_PORT3, NULL); - gpio_request(GPIO_FN_LCD0_D21_PORT2, NULL); - gpio_request(GPIO_FN_LCD0_D22_PORT0, NULL); - gpio_request(GPIO_FN_LCD0_D23_PORT1, NULL); - gpio_request(GPIO_FN_LCD0_DCK, NULL); - gpio_request(GPIO_FN_LCD0_VSYN, NULL); - gpio_request(GPIO_FN_LCD0_HSYN, NULL); - gpio_request(GPIO_FN_LCD0_DISP, NULL); - gpio_request(GPIO_FN_LCD0_LCLK_PORT165, NULL); - - gpio_request_one(GPIO_PORT61, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */ - gpio_request_one(GPIO_PORT202, GPIOF_OUT_INIT_LOW, NULL); /* LCD0_LED_CONT */ + + gpio_request_one(61, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */ + gpio_request_one(202, GPIOF_OUT_INIT_LOW, NULL); /* LCD0_LED_CONT */ /* Touchscreen */ gpio_request(GPIO_FN_IRQ10, NULL); /* TP_INT */ - gpio_request_one(GPIO_PORT166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */ + gpio_request_one(166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */ /* GETHER */ gpio_request(GPIO_FN_ET_CRS, NULL); @@ -1028,12 +1035,12 @@ static void __init eva_init(void) gpio_request(GPIO_FN_ET_RX_DV, NULL); gpio_request(GPIO_FN_ET_RX_CLK, NULL); - gpio_request_one(GPIO_PORT18, GPIOF_OUT_INIT_HIGH, NULL); /* PHY_RST */ + gpio_request_one(18, GPIOF_OUT_INIT_HIGH, NULL); /* PHY_RST */ /* USB */ - gpio_request_one(GPIO_PORT159, GPIOF_IN, NULL); /* USB_DEVICE_MODE */ + gpio_request_one(159, GPIOF_IN, NULL); /* USB_DEVICE_MODE */ - if (gpio_get_value(GPIO_PORT159)) { + if (gpio_get_value(159)) { /* USB Host */ } else { /* USB Func */ @@ -1042,47 +1049,22 @@ static void __init eva_init(void) * OTOH, usbhs interrupt needs its value (HI/LOW) to decide * USB connection/disconnection (usbhsf_get_vbus()). * This means we needs to select GPIO_FN_IRQ7_PORT209 first, - * and select GPIO_PORT209 here + * and select GPIO 209 here */ gpio_request(GPIO_FN_IRQ7_PORT209, NULL); - gpio_request_one(GPIO_PORT209, GPIOF_IN, NULL); + gpio_request_one(209, GPIOF_IN, NULL); platform_device_register(&usbhsf_device); usb = &usbhsf_device; } /* SDHI0 */ - gpio_request(GPIO_FN_SDHI0_CMD, NULL); - gpio_request(GPIO_FN_SDHI0_CLK, NULL); - gpio_request(GPIO_FN_SDHI0_D0, NULL); - gpio_request(GPIO_FN_SDHI0_D1, NULL); - gpio_request(GPIO_FN_SDHI0_D2, NULL); - gpio_request(GPIO_FN_SDHI0_D3, NULL); - gpio_request(GPIO_FN_SDHI0_WP, NULL); - - gpio_request_one(GPIO_PORT17, GPIOF_OUT_INIT_LOW, NULL); /* SDHI0_18/33_B */ - gpio_request_one(GPIO_PORT74, GPIOF_OUT_INIT_HIGH, NULL); /* SDHI0_PON */ - gpio_request_one(GPIO_PORT75, GPIOF_OUT_INIT_HIGH, NULL); /* SDSLOT1_PON */ + gpio_request_one(17, GPIOF_OUT_INIT_LOW, NULL); /* SDHI0_18/33_B */ + gpio_request_one(74, GPIOF_OUT_INIT_HIGH, NULL); /* SDHI0_PON */ + gpio_request_one(75, GPIOF_OUT_INIT_HIGH, NULL); /* SDSLOT1_PON */ /* we can use GPIO_FN_IRQ31_PORT167 here for SDHI0 CD irq */ - /* - * MMCIF - * - * Here doesn't care SW1.4 status, - * since CON2 is not mounted. - */ - gpio_request(GPIO_FN_MMC1_CLK_PORT103, NULL); - gpio_request(GPIO_FN_MMC1_CMD_PORT104, NULL); - gpio_request(GPIO_FN_MMC1_D0_PORT149, NULL); - gpio_request(GPIO_FN_MMC1_D1_PORT148, NULL); - gpio_request(GPIO_FN_MMC1_D2_PORT147, NULL); - gpio_request(GPIO_FN_MMC1_D3_PORT146, NULL); - gpio_request(GPIO_FN_MMC1_D4_PORT145, NULL); - gpio_request(GPIO_FN_MMC1_D5_PORT144, NULL); - gpio_request(GPIO_FN_MMC1_D6_PORT143, NULL); - gpio_request(GPIO_FN_MMC1_D7_PORT142, NULL); - /* CEU0 */ gpio_request(GPIO_FN_VIO0_D7, NULL); gpio_request(GPIO_FN_VIO0_D6, NULL); @@ -1099,10 +1081,10 @@ static void __init eva_init(void) gpio_request(GPIO_FN_VIO_CKO, NULL); /* CON1/CON15 Camera */ - gpio_request_one(GPIO_PORT173, GPIOF_OUT_INIT_LOW, NULL); /* STANDBY */ - gpio_request_one(GPIO_PORT172, GPIOF_OUT_INIT_HIGH, NULL); /* RST */ + gpio_request_one(173, GPIOF_OUT_INIT_LOW, NULL); /* STANDBY */ + gpio_request_one(172, GPIOF_OUT_INIT_HIGH, NULL); /* RST */ /* see mt9t111_power() */ - gpio_request_one(GPIO_PORT158, GPIOF_OUT_INIT_LOW, NULL); /* CAM_PON */ + gpio_request_one(158, GPIOF_OUT_INIT_LOW, NULL); /* CAM_PON */ /* FSI-WM8978 */ gpio_request(GPIO_FN_FSIAIBT, NULL); @@ -1111,8 +1093,8 @@ static void __init eva_init(void) gpio_request(GPIO_FN_FSIAOSLD, NULL); gpio_request(GPIO_FN_FSIAISLD_PORT5, NULL); - gpio_request(GPIO_PORT7, NULL); - gpio_request(GPIO_PORT8, NULL); + gpio_request(7, NULL); + gpio_request(8, NULL); gpio_direction_none(GPIO_PORT7CR); /* FSIAOBT needs no direction */ gpio_direction_none(GPIO_PORT8CR); /* FSIAOLR needs no direction */ @@ -1129,28 +1111,22 @@ static void __init eva_init(void) * DBGMD/LCDC0/FSIA MUX * DBGMD_SELECT_B should be set after setting PFC Function. */ - gpio_request_one(GPIO_PORT176, GPIOF_OUT_INIT_HIGH, NULL); + gpio_request_one(176, GPIOF_OUT_INIT_HIGH, NULL); /* * We can switch CON8/CON14 by SW1.5, * but it needs after DBGMD_SELECT_B */ - gpio_request_one(GPIO_PORT6, GPIOF_IN, NULL); - if (gpio_get_value(GPIO_PORT6)) { + gpio_request_one(6, GPIOF_IN, NULL); + if (gpio_get_value(6)) { /* CON14 enable */ } else { /* CON8 (SDHI1) enable */ - gpio_request(GPIO_FN_SDHI1_CLK, NULL); - gpio_request(GPIO_FN_SDHI1_CMD, NULL); - gpio_request(GPIO_FN_SDHI1_D0, NULL); - gpio_request(GPIO_FN_SDHI1_D1, NULL); - gpio_request(GPIO_FN_SDHI1_D2, NULL); - gpio_request(GPIO_FN_SDHI1_D3, NULL); - gpio_request(GPIO_FN_SDHI1_CD, NULL); - gpio_request(GPIO_FN_SDHI1_WP, NULL); + pinctrl_register_mappings(eva_sdhi1_pinctrl_map, + ARRAY_SIZE(eva_sdhi1_pinctrl_map)); /* SDSLOT2_PON */ - gpio_request_one(GPIO_PORT16, GPIOF_OUT_INIT_HIGH, NULL); + gpio_request_one(16, GPIOF_OUT_INIT_HIGH, NULL); platform_device_register(&sdhi1_device); } diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c index e50f86691539..70d992c540ae 100644 --- a/arch/arm/mach-shmobile/board-bonito.c +++ b/arch/arm/mach-shmobile/board-bonito.c @@ -24,6 +24,7 @@ #include <linux/init.h> #include <linux/interrupt.h> #include <linux/irq.h> +#include <linux/pinctrl/machine.h> #include <linux/platform_device.h> #include <linux/gpio.h> #include <linux/regulator/fixed.h> @@ -288,6 +289,16 @@ static struct platform_device lcdc0_device = { }, }; +static const struct pinctrl_map lcdc0_pinctrl_map[] = { + /* LCD0 */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740", + "lcd0_data24_1", "lcd0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740", + "lcd0_lclk_1", "lcd0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740", + "lcd0_sync", "lcd0"), +}; + /* * SMSC 9221 */ @@ -392,8 +403,8 @@ static void __init bonito_init(void) /* * base board settings */ - gpio_request_one(GPIO_PORT176, GPIOF_IN, NULL); - if (!gpio_get_value(GPIO_PORT176)) { + gpio_request_one(176, GPIOF_IN, NULL); + if (!gpio_get_value(176)) { u16 bsw2; u16 bsw3; u16 bsw4; @@ -430,38 +441,11 @@ static void __init bonito_init(void) */ if (BIT_ON(bsw2, 3) && /* S38.1 = OFF */ BIT_ON(bsw2, 2)) { /* S38.2 = OFF */ - gpio_request(GPIO_FN_LCDC0_SELECT, NULL); - gpio_request(GPIO_FN_LCD0_D0, NULL); - gpio_request(GPIO_FN_LCD0_D1, NULL); - gpio_request(GPIO_FN_LCD0_D2, NULL); - gpio_request(GPIO_FN_LCD0_D3, NULL); - gpio_request(GPIO_FN_LCD0_D4, NULL); - gpio_request(GPIO_FN_LCD0_D5, NULL); - gpio_request(GPIO_FN_LCD0_D6, NULL); - gpio_request(GPIO_FN_LCD0_D7, NULL); - gpio_request(GPIO_FN_LCD0_D8, NULL); - gpio_request(GPIO_FN_LCD0_D9, NULL); - gpio_request(GPIO_FN_LCD0_D10, NULL); - gpio_request(GPIO_FN_LCD0_D11, NULL); - gpio_request(GPIO_FN_LCD0_D12, NULL); - gpio_request(GPIO_FN_LCD0_D13, NULL); - gpio_request(GPIO_FN_LCD0_D14, NULL); - gpio_request(GPIO_FN_LCD0_D15, NULL); - gpio_request(GPIO_FN_LCD0_D16, NULL); - gpio_request(GPIO_FN_LCD0_D17, NULL); - gpio_request(GPIO_FN_LCD0_D18_PORT163, NULL); - gpio_request(GPIO_FN_LCD0_D19_PORT162, NULL); - gpio_request(GPIO_FN_LCD0_D20_PORT161, NULL); - gpio_request(GPIO_FN_LCD0_D21_PORT158, NULL); - gpio_request(GPIO_FN_LCD0_D22_PORT160, NULL); - gpio_request(GPIO_FN_LCD0_D23_PORT159, NULL); - gpio_request(GPIO_FN_LCD0_DCK, NULL); - gpio_request(GPIO_FN_LCD0_VSYN, NULL); - gpio_request(GPIO_FN_LCD0_HSYN, NULL); - gpio_request(GPIO_FN_LCD0_DISP, NULL); - gpio_request(GPIO_FN_LCD0_LCLK_PORT165, NULL); - - gpio_request_one(GPIO_PORT61, GPIOF_OUT_INIT_HIGH, + pinctrl_register_mappings(lcdc0_pinctrl_map, + ARRAY_SIZE(lcdc0_pinctrl_map)); + gpio_request(GPIO_FN_LCDC0_SELECT, NULL); + + gpio_request_one(61, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */ /* backlight on */ diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c index 2ccc860403ef..ef5ca0ef0cb5 100644 --- a/arch/arm/mach-shmobile/board-kota2.c +++ b/arch/arm/mach-shmobile/board-kota2.c @@ -24,6 +24,8 @@ #include <linux/init.h> #include <linux/interrupt.h> #include <linux/irq.h> +#include <linux/pinctrl/machine.h> +#include <linux/pinctrl/pinconf-generic.h> #include <linux/platform_device.h> #include <linux/delay.h> #include <linux/io.h> @@ -135,17 +137,17 @@ static struct platform_device keysc_device = { #define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 } static struct gpio_keys_button gpio_buttons[] = { - GPIO_KEY(KEY_VOLUMEUP, GPIO_PORT56, "+"), /* S2: VOL+ [IRQ9] */ - GPIO_KEY(KEY_VOLUMEDOWN, GPIO_PORT54, "-"), /* S3: VOL- [IRQ10] */ - GPIO_KEY(KEY_MENU, GPIO_PORT27, "Menu"), /* S4: MENU [IRQ30] */ - GPIO_KEY(KEY_HOMEPAGE, GPIO_PORT26, "Home"), /* S5: HOME [IRQ31] */ - GPIO_KEY(KEY_BACK, GPIO_PORT11, "Back"), /* S6: BACK [IRQ0] */ - GPIO_KEY(KEY_PHONE, GPIO_PORT238, "Tel"), /* S7: TEL [IRQ11] */ - GPIO_KEY(KEY_POWER, GPIO_PORT239, "C1"), /* S8: CAM [IRQ13] */ - GPIO_KEY(KEY_MAIL, GPIO_PORT224, "Mail"), /* S9: MAIL [IRQ3] */ - /* Omitted button "C3?": GPIO_PORT223 - S10: CUST [IRQ8] */ - GPIO_KEY(KEY_CAMERA, GPIO_PORT164, "C2"), /* S11: CAM_HALF [IRQ25] */ - /* Omitted button "?": GPIO_PORT152 - S12: CAM_FULL [No IRQ] */ + GPIO_KEY(KEY_VOLUMEUP, 56, "+"), /* S2: VOL+ [IRQ9] */ + GPIO_KEY(KEY_VOLUMEDOWN, 54, "-"), /* S3: VOL- [IRQ10] */ + GPIO_KEY(KEY_MENU, 27, "Menu"), /* S4: MENU [IRQ30] */ + GPIO_KEY(KEY_HOMEPAGE, 26, "Home"), /* S5: HOME [IRQ31] */ + GPIO_KEY(KEY_BACK, 11, "Back"), /* S6: BACK [IRQ0] */ + GPIO_KEY(KEY_PHONE, 238, "Tel"), /* S7: TEL [IRQ11] */ + GPIO_KEY(KEY_POWER, 239, "C1"), /* S8: CAM [IRQ13] */ + GPIO_KEY(KEY_MAIL, 224, "Mail"), /* S9: MAIL [IRQ3] */ + /* Omitted button "C3?": 223 - S10: CUST [IRQ8] */ + GPIO_KEY(KEY_CAMERA, 164, "C2"), /* S11: CAM_HALF [IRQ25] */ + /* Omitted button "?": 152 - S12: CAM_FULL [No IRQ] */ }; static struct gpio_keys_platform_data gpio_key_info = { @@ -165,9 +167,9 @@ static struct platform_device gpio_keys_device = { #define GPIO_LED(n, g) { .name = n, .gpio = g } static struct gpio_led gpio_leds[] = { - GPIO_LED("G", GPIO_PORT20), /* PORT20 [GPO0] -> LED7 -> "G" */ - GPIO_LED("H", GPIO_PORT21), /* PORT21 [GPO1] -> LED8 -> "H" */ - GPIO_LED("J", GPIO_PORT22), /* PORT22 [GPO2] -> LED9 -> "J" */ + GPIO_LED("G", 20), /* PORT20 [GPO0] -> LED7 -> "G" */ + GPIO_LED("H", 21), /* PORT21 [GPO1] -> LED8 -> "H" */ + GPIO_LED("J", 22), /* PORT22 [GPO2] -> LED9 -> "J" */ }; static struct gpio_led_platform_data gpio_leds_info = { @@ -187,7 +189,7 @@ static struct platform_device gpio_leds_device = { static struct led_renesas_tpu_config led_renesas_tpu12_pdata = { .name = "V2513", .pin_gpio_fn = GPIO_FN_TPU1TO2, - .pin_gpio = GPIO_PORT153, + .pin_gpio = 153, .channel_offset = 0x90, .timer_bit = 2, .max_brightness = 1000, @@ -215,7 +217,7 @@ static struct platform_device leds_tpu12_device = { static struct led_renesas_tpu_config led_renesas_tpu41_pdata = { .name = "V2514", .pin_gpio_fn = GPIO_FN_TPU4TO1, - .pin_gpio = GPIO_PORT199, + .pin_gpio = 199, .channel_offset = 0x50, .timer_bit = 1, .max_brightness = 1000, @@ -243,7 +245,7 @@ static struct platform_device leds_tpu41_device = { static struct led_renesas_tpu_config led_renesas_tpu21_pdata = { .name = "V2515", .pin_gpio_fn = GPIO_FN_TPU2TO1, - .pin_gpio = GPIO_PORT197, + .pin_gpio = 197, .channel_offset = 0x50, .timer_bit = 1, .max_brightness = 1000, @@ -271,7 +273,7 @@ static struct platform_device leds_tpu21_device = { static struct led_renesas_tpu_config led_renesas_tpu30_pdata = { .name = "KEYLED", .pin_gpio_fn = GPIO_FN_TPU3TO0, - .pin_gpio = GPIO_PORT163, + .pin_gpio = 163, .channel_offset = 0x10, .timer_bit = 0, .max_brightness = 1000, @@ -433,6 +435,85 @@ static struct platform_device *kota2_devices[] __initdata = { &sdhi1_device, }; +static unsigned long pin_pullup_conf[] = { + PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0), +}; + +static const struct pinctrl_map kota2_pinctrl_map[] = { + /* KEYSC */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0", + "keysc_in8", "keysc"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0", + "keysc_out04", "keysc"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0", + "keysc_out5", "keysc"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0", + "keysc_out6_0", "keysc"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0", + "keysc_out7_0", "keysc"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0", + "keysc_out8_0", "keysc"), + PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0", + "keysc_in8", pin_pullup_conf), + /* MMCIF */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0", + "mmc0_data8_0", "mmc0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0", + "mmc0_ctrl_0", "mmc0"), + PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mmcif.0", "pfc-sh73a0", + "PORT279", pin_pullup_conf), + PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0", + "mmc0_data8_0", pin_pullup_conf), + /* SCIFA2 (UART2) */ + PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh73a0", + "scifa2_data_0", "scifa2"), + PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh73a0", + "scifa2_ctrl_0", "scifa2"), + /* SCIFA4 (UART1) */ + PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0", + "scifa4_data", "scifa4"), + PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0", + "scifa4_ctrl", "scifa4"), + /* SCIFB (BT) */ + PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.8", "pfc-sh73a0", + "scifb_data_0", "scifb"), + PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.8", "pfc-sh73a0", + "scifb_clk_0", "scifb"), + PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.8", "pfc-sh73a0", + "scifb_ctrl_0", "scifb"), + /* SDHI0 (microSD) */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0", + "sdhi0_data4", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0", + "sdhi0_ctrl", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0", + "sdhi0_cd", "sdhi0"), + PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0", + "sdhi0_data4", pin_pullup_conf), + PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0", + "PORT256", pin_pullup_conf), + PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0", + "PORT251", pin_pullup_conf), + /* SDHI1 (BCM4330) */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0", + "sdhi1_data4", "sdhi1"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0", + "sdhi1_ctrl", "sdhi1"), + PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0", + "sdhi1_data4", pin_pullup_conf), + PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0", + "PORT263", pin_pullup_conf), + /* SMSC911X */ + PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0", + "bsc_data_0_7", "bsc"), + PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0", + "bsc_data_8_15", "bsc"), + PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0", + "bsc_cs5_a", "bsc"), + PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0", + "bsc_we0", "bsc"), +}; + static void __init kota2_init(void) { regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers, @@ -441,97 +522,16 @@ static void __init kota2_init(void) ARRAY_SIZE(fixed3v3_power_consumers), 3300000); regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies)); + pinctrl_register_mappings(kota2_pinctrl_map, + ARRAY_SIZE(kota2_pinctrl_map)); sh73a0_pinmux_init(); - /* SCIFA2 (UART2) */ - gpio_request(GPIO_FN_SCIFA2_TXD1, NULL); - gpio_request(GPIO_FN_SCIFA2_RXD1, NULL); - gpio_request(GPIO_FN_SCIFA2_RTS1_, NULL); - gpio_request(GPIO_FN_SCIFA2_CTS1_, NULL); - - /* SCIFA4 (UART1) */ - gpio_request(GPIO_FN_SCIFA4_TXD, NULL); - gpio_request(GPIO_FN_SCIFA4_RXD, NULL); - gpio_request(GPIO_FN_SCIFA4_RTS_, NULL); - gpio_request(GPIO_FN_SCIFA4_CTS_, NULL); - /* SMSC911X */ - gpio_request(GPIO_FN_D0_NAF0, NULL); - gpio_request(GPIO_FN_D1_NAF1, NULL); - gpio_request(GPIO_FN_D2_NAF2, NULL); - gpio_request(GPIO_FN_D3_NAF3, NULL); - gpio_request(GPIO_FN_D4_NAF4, NULL); - gpio_request(GPIO_FN_D5_NAF5, NULL); - gpio_request(GPIO_FN_D6_NAF6, NULL); - gpio_request(GPIO_FN_D7_NAF7, NULL); - gpio_request(GPIO_FN_D8_NAF8, NULL); - gpio_request(GPIO_FN_D9_NAF9, NULL); - gpio_request(GPIO_FN_D10_NAF10, NULL); - gpio_request(GPIO_FN_D11_NAF11, NULL); - gpio_request(GPIO_FN_D12_NAF12, NULL); - gpio_request(GPIO_FN_D13_NAF13, NULL); - gpio_request(GPIO_FN_D14_NAF14, NULL); - gpio_request(GPIO_FN_D15_NAF15, NULL); - gpio_request(GPIO_FN_CS5A_, NULL); - gpio_request(GPIO_FN_WE0__FWE, NULL); - gpio_request_one(GPIO_PORT144, GPIOF_IN, NULL); /* PINTA2 */ - gpio_request_one(GPIO_PORT145, GPIOF_OUT_INIT_HIGH, NULL); /* RESET */ - - /* KEYSC */ - gpio_request(GPIO_FN_KEYIN0_PU, NULL); - gpio_request(GPIO_FN_KEYIN1_PU, NULL); - gpio_request(GPIO_FN_KEYIN2_PU, NULL); - gpio_request(GPIO_FN_KEYIN3_PU, NULL); - gpio_request(GPIO_FN_KEYIN4_PU, NULL); - gpio_request(GPIO_FN_KEYIN5_PU, NULL); - gpio_request(GPIO_FN_KEYIN6_PU, NULL); - gpio_request(GPIO_FN_KEYIN7_PU, NULL); - gpio_request(GPIO_FN_KEYOUT0, NULL); - gpio_request(GPIO_FN_KEYOUT1, NULL); - gpio_request(GPIO_FN_KEYOUT2, NULL); - gpio_request(GPIO_FN_KEYOUT3, NULL); - gpio_request(GPIO_FN_KEYOUT4, NULL); - gpio_request(GPIO_FN_KEYOUT5, NULL); - gpio_request(GPIO_FN_PORT59_KEYOUT6, NULL); - gpio_request(GPIO_FN_PORT58_KEYOUT7, NULL); - gpio_request(GPIO_FN_KEYOUT8, NULL); + gpio_request_one(144, GPIOF_IN, NULL); /* PINTA2 */ + gpio_request_one(145, GPIOF_OUT_INIT_HIGH, NULL); /* RESET */ /* MMCIF */ - gpio_request(GPIO_FN_MMCCLK0, NULL); - gpio_request(GPIO_FN_MMCD0_0, NULL); - gpio_request(GPIO_FN_MMCD0_1, NULL); - gpio_request(GPIO_FN_MMCD0_2, NULL); - gpio_request(GPIO_FN_MMCD0_3, NULL); - gpio_request(GPIO_FN_MMCD0_4, NULL); - gpio_request(GPIO_FN_MMCD0_5, NULL); - gpio_request(GPIO_FN_MMCD0_6, NULL); - gpio_request(GPIO_FN_MMCD0_7, NULL); - gpio_request(GPIO_FN_MMCCMD0, NULL); - gpio_request_one(GPIO_PORT208, GPIOF_OUT_INIT_HIGH, NULL); /* Reset */ - - /* SDHI0 (microSD) */ - gpio_request(GPIO_FN_SDHICD0_PU, NULL); - gpio_request(GPIO_FN_SDHICMD0_PU, NULL); - gpio_request(GPIO_FN_SDHICLK0, NULL); - gpio_request(GPIO_FN_SDHID0_3_PU, NULL); - gpio_request(GPIO_FN_SDHID0_2_PU, NULL); - gpio_request(GPIO_FN_SDHID0_1_PU, NULL); - gpio_request(GPIO_FN_SDHID0_0_PU, NULL); - - /* SCIFB (BT) */ - gpio_request(GPIO_FN_PORT159_SCIFB_SCK, NULL); - gpio_request(GPIO_FN_PORT160_SCIFB_TXD, NULL); - gpio_request(GPIO_FN_PORT161_SCIFB_CTS_, NULL); - gpio_request(GPIO_FN_PORT162_SCIFB_RXD, NULL); - gpio_request(GPIO_FN_PORT163_SCIFB_RTS_, NULL); - - /* SDHI1 (BCM4330) */ - gpio_request(GPIO_FN_SDHICLK1, NULL); - gpio_request(GPIO_FN_SDHICMD1_PU, NULL); - gpio_request(GPIO_FN_SDHID1_3_PU, NULL); - gpio_request(GPIO_FN_SDHID1_2_PU, NULL); - gpio_request(GPIO_FN_SDHID1_1_PU, NULL); - gpio_request(GPIO_FN_SDHID1_0_PU, NULL); + gpio_request_one(208, GPIOF_OUT_INIT_HIGH, NULL); /* Reset */ #ifdef CONFIG_CACHE_L2X0 /* Early BRESP enable, Shared attribute override enable, 64K*8way */ diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c index d34d12ae496b..446d04db404f 100644 --- a/arch/arm/mach-shmobile/board-kzm9g.c +++ b/arch/arm/mach-shmobile/board-kzm9g.c @@ -30,6 +30,8 @@ #include <linux/mmc/sh_mmcif.h> #include <linux/mmc/sh_mobile_sdhi.h> #include <linux/mfd/tmio.h> +#include <linux/pinctrl/machine.h> +#include <linux/pinctrl/pinconf-generic.h> #include <linux/platform_device.h> #include <linux/regulator/fixed.h> #include <linux/regulator/machine.h> @@ -433,7 +435,7 @@ static struct sh_mobile_sdhi_info sdhi2_info = { TMIO_MMC_WRPROTECT_DISABLE, .tmio_caps = MMC_CAP_SD_HIGHSPEED, .tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, - .cd_gpio = GPIO_PORT13, + .cd_gpio = 13, }; static struct resource sdhi2_resources[] = { @@ -599,6 +601,64 @@ static struct platform_device *kzm_devices[] __initdata = { &fsi_ak4648_device, }; +static unsigned long pin_pullup_conf[] = { + PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0), +}; + +static const struct pinctrl_map kzm_pinctrl_map[] = { + /* FSIA (AK4648) */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0", + "fsia_mclk_in", "fsia"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0", + "fsia_sclk_in", "fsia"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0", + "fsia_data_in", "fsia"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0", + "fsia_data_out", "fsia"), + /* I2C3 */ + PIN_MAP_MUX_GROUP_DEFAULT("i2c-sh_mobile.3", "pfc-sh73a0", + "i2c3_1", "i2c3"), + /* LCD */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-sh73a0", + "lcd_data24", "lcd"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-sh73a0", + "lcd_sync", "lcd"), + /* MMCIF */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0", + "mmc0_data8_0", "mmc0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0", + "mmc0_ctrl_0", "mmc0"), + PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mmcif.0", "pfc-sh73a0", + "PORT279", pin_pullup_conf), + PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0", + "mmc0_data8_0", pin_pullup_conf), + /* SCIFA4 */ + PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0", + "scifa4_data", "scifa4"), + PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0", + "scifa4_ctrl", "scifa4"), + /* SDHI0 */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0", + "sdhi0_data4", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0", + "sdhi0_ctrl", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0", + "sdhi0_cd", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0", + "sdhi0_wp", "sdhi0"), + /* SDHI2 */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-sh73a0", + "sdhi2_data4", "sdhi2"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-sh73a0", + "sdhi2_ctrl", "sdhi2"), + /* SMSC */ + PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0", + "bsc_cs4", "bsc"), + /* USB */ + PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-sh73a0", + "usb_vbus", "usb"), +}; + /* * FIXME * @@ -660,100 +720,26 @@ static void __init kzm_init(void) ARRAY_SIZE(fixed2v8_power_consumers), 2800000); regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies)); - sh73a0_pinmux_init(); - - /* enable SCIFA4 */ - gpio_request(GPIO_FN_SCIFA4_TXD, NULL); - gpio_request(GPIO_FN_SCIFA4_RXD, NULL); - gpio_request(GPIO_FN_SCIFA4_RTS_, NULL); - gpio_request(GPIO_FN_SCIFA4_CTS_, NULL); + pinctrl_register_mappings(kzm_pinctrl_map, ARRAY_SIZE(kzm_pinctrl_map)); - /* CS4 for SMSC/USB */ - gpio_request(GPIO_FN_CS4_, NULL); /* CS4 */ + sh73a0_pinmux_init(); /* SMSC */ - gpio_request_one(GPIO_PORT224, GPIOF_IN, NULL); /* IRQ3 */ + gpio_request_one(224, GPIOF_IN, NULL); /* IRQ3 */ /* LCDC */ - gpio_request(GPIO_FN_LCDD23, NULL); - gpio_request(GPIO_FN_LCDD22, NULL); - gpio_request(GPIO_FN_LCDD21, NULL); - gpio_request(GPIO_FN_LCDD20, NULL); - gpio_request(GPIO_FN_LCDD19, NULL); - gpio_request(GPIO_FN_LCDD18, NULL); - gpio_request(GPIO_FN_LCDD17, NULL); - gpio_request(GPIO_FN_LCDD16, NULL); - gpio_request(GPIO_FN_LCDD15, NULL); - gpio_request(GPIO_FN_LCDD14, NULL); - gpio_request(GPIO_FN_LCDD13, NULL); - gpio_request(GPIO_FN_LCDD12, NULL); - gpio_request(GPIO_FN_LCDD11, NULL); - gpio_request(GPIO_FN_LCDD10, NULL); - gpio_request(GPIO_FN_LCDD9, NULL); - gpio_request(GPIO_FN_LCDD8, NULL); - gpio_request(GPIO_FN_LCDD7, NULL); - gpio_request(GPIO_FN_LCDD6, NULL); - gpio_request(GPIO_FN_LCDD5, NULL); - gpio_request(GPIO_FN_LCDD4, NULL); - gpio_request(GPIO_FN_LCDD3, NULL); - gpio_request(GPIO_FN_LCDD2, NULL); - gpio_request(GPIO_FN_LCDD1, NULL); - gpio_request(GPIO_FN_LCDD0, NULL); - gpio_request(GPIO_FN_LCDDISP, NULL); - gpio_request(GPIO_FN_LCDDCK, NULL); - - gpio_request_one(GPIO_PORT222, GPIOF_OUT_INIT_HIGH, NULL); /* LCDCDON */ - gpio_request_one(GPIO_PORT226, GPIOF_OUT_INIT_HIGH, NULL); /* SC */ + gpio_request_one(222, GPIOF_OUT_INIT_HIGH, NULL); /* LCDCDON */ + gpio_request_one(226, GPIOF_OUT_INIT_HIGH, NULL); /* SC */ /* Touchscreen */ - gpio_request_one(GPIO_PORT223, GPIOF_IN, NULL); /* IRQ8 */ - - /* enable MMCIF */ - gpio_request(GPIO_FN_MMCCLK0, NULL); - gpio_request(GPIO_FN_MMCCMD0_PU, NULL); - gpio_request(GPIO_FN_MMCD0_0_PU, NULL); - gpio_request(GPIO_FN_MMCD0_1_PU, NULL); - gpio_request(GPIO_FN_MMCD0_2_PU, NULL); - gpio_request(GPIO_FN_MMCD0_3_PU, NULL); - gpio_request(GPIO_FN_MMCD0_4_PU, NULL); - gpio_request(GPIO_FN_MMCD0_5_PU, NULL); - gpio_request(GPIO_FN_MMCD0_6_PU, NULL); - gpio_request(GPIO_FN_MMCD0_7_PU, NULL); + gpio_request_one(223, GPIOF_IN, NULL); /* IRQ8 */ /* enable SD */ - gpio_request(GPIO_FN_SDHIWP0, NULL); - gpio_request(GPIO_FN_SDHICD0, NULL); - gpio_request(GPIO_FN_SDHICMD0, NULL); - gpio_request(GPIO_FN_SDHICLK0, NULL); - gpio_request(GPIO_FN_SDHID0_3, NULL); - gpio_request(GPIO_FN_SDHID0_2, NULL); - gpio_request(GPIO_FN_SDHID0_1, NULL); - gpio_request(GPIO_FN_SDHID0_0, NULL); gpio_request(GPIO_FN_SDHI0_VCCQ_MC0_ON, NULL); - gpio_request_one(GPIO_PORT15, GPIOF_OUT_INIT_HIGH, NULL); /* power */ + gpio_request_one(15, GPIOF_OUT_INIT_HIGH, NULL); /* power */ /* enable Micro SD */ - gpio_request(GPIO_FN_SDHID2_0, NULL); - gpio_request(GPIO_FN_SDHID2_1, NULL); - gpio_request(GPIO_FN_SDHID2_2, NULL); - gpio_request(GPIO_FN_SDHID2_3, NULL); - gpio_request(GPIO_FN_SDHICMD2, NULL); - gpio_request(GPIO_FN_SDHICLK2, NULL); - gpio_request_one(GPIO_PORT14, GPIOF_OUT_INIT_HIGH, NULL); /* power */ - - /* I2C 3 */ - gpio_request(GPIO_FN_PORT27_I2C_SCL3, NULL); - gpio_request(GPIO_FN_PORT28_I2C_SDA3, NULL); - - /* enable FSI2 port A (ak4648) */ - gpio_request(GPIO_FN_FSIACK, NULL); - gpio_request(GPIO_FN_FSIAILR, NULL); - gpio_request(GPIO_FN_FSIAIBT, NULL); - gpio_request(GPIO_FN_FSIAISLD, NULL); - gpio_request(GPIO_FN_FSIAOSLD, NULL); - - /* enable USB */ - gpio_request(GPIO_FN_VBUS_0, NULL); + gpio_request_one(14, GPIOF_OUT_INIT_HIGH, NULL); /* power */ #ifdef CONFIG_CACHE_L2X0 /* Early BRESP enable, Shared attribute override enable, 64K*8way */ diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c index db968a585ff0..336ccb4a0f2a 100644 --- a/arch/arm/mach-shmobile/board-mackerel.c +++ b/arch/arm/mach-shmobile/board-mackerel.c @@ -40,6 +40,7 @@ #include <linux/mtd/partitions.h> #include <linux/mtd/physmap.h> #include <linux/mtd/sh_flctl.h> +#include <linux/pinctrl/machine.h> #include <linux/pm_clock.h> #include <linux/regulator/fixed.h> #include <linux/regulator/machine.h> @@ -363,7 +364,7 @@ static struct fb_videomode mackerel_lcdc_modes[] = { static int mackerel_set_brightness(int brightness) { - gpio_set_value(GPIO_PORT31, brightness); + gpio_set_value(31, brightness); return 0; } @@ -819,22 +820,22 @@ static struct platform_device usbhs1_device = { static struct gpio_led mackerel_leds[] = { { .name = "led0", - .gpio = GPIO_PORT0, + .gpio = 0, .default_state = LEDS_GPIO_DEFSTATE_ON, }, { .name = "led1", - .gpio = GPIO_PORT1, + .gpio = 1, .default_state = LEDS_GPIO_DEFSTATE_ON, }, { .name = "led2", - .gpio = GPIO_PORT2, + .gpio = 2, .default_state = LEDS_GPIO_DEFSTATE_ON, }, { .name = "led3", - .gpio = GPIO_PORT159, + .gpio = 159, .default_state = LEDS_GPIO_DEFSTATE_ON, } }; @@ -964,11 +965,11 @@ static struct platform_device nand_flash_device = { /* * The card detect pin of the top SD/MMC slot (CN7) is active low and is - * connected to GPIO A22 of SH7372 (GPIO_PORT41). + * connected to GPIO A22 of SH7372 (GPIO 41). */ static int slot_cn7_get_cd(struct platform_device *pdev) { - return !gpio_get_value(GPIO_PORT41); + return !gpio_get_value(41); } /* SDHI0 */ @@ -977,7 +978,7 @@ static struct sh_mobile_sdhi_info sdhi0_info = { .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, .tmio_flags = TMIO_MMC_USE_GPIO_CD, .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, - .cd_gpio = GPIO_PORT172, + .cd_gpio = 172, }; static struct resource sdhi0_resources[] = { @@ -1060,11 +1061,11 @@ static struct platform_device sdhi1_device = { /* * The card detect pin of the top SD/MMC slot (CN23) is active low and is - * connected to GPIO SCIFB_SCK of SH7372 (GPIO_PORT162). + * connected to GPIO SCIFB_SCK of SH7372 (162). */ static int slot_cn23_get_cd(struct platform_device *pdev) { - return !gpio_get_value(GPIO_PORT162); + return !gpio_get_value(162); } /* SDHI2 */ @@ -1328,6 +1329,33 @@ static struct i2c_board_info i2c1_devices[] = { }, }; +static const struct pinctrl_map mackerel_pinctrl_map[] = { + /* MMCIF */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372", + "mmc0_data8_0", "mmc0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372", + "mmc0_ctrl_0", "mmc0"), + /* SDHI0 */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372", + "sdhi0_data4", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372", + "sdhi0_ctrl", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372", + "sdhi0_wp", "sdhi0"), + /* SDHI1 */ +#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372", + "sdhi1_data4", "sdhi1"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372", + "sdhi1_ctrl", "sdhi1"), +#endif + /* SDHI2 */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-sh7372", + "sdhi2_data4", "sdhi2"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-sh7372", + "sdhi2_ctrl", "sdhi2"), +}; + #define GPIO_PORT9CR IOMEM(0xE6051009) #define GPIO_PORT10CR IOMEM(0xE605100A) #define GPIO_PORT167CR IOMEM(0xE60520A7) @@ -1364,6 +1392,8 @@ static void __init mackerel_init(void) /* External clock source */ clk_set_rate(&sh7372_dv_clki_clk, 27000000); + pinctrl_register_mappings(mackerel_pinctrl_map, + ARRAY_SIZE(mackerel_pinctrl_map)); sh7372_pinmux_init(); /* enable SCIFA0 */ @@ -1403,9 +1433,9 @@ static void __init mackerel_init(void) gpio_request(GPIO_FN_LCDDCK, NULL); /* backlight, off by default */ - gpio_request_one(GPIO_PORT31, GPIOF_OUT_INIT_LOW, NULL); + gpio_request_one(31, GPIOF_OUT_INIT_LOW, NULL); - gpio_request_one(GPIO_PORT151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */ + gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */ /* USBHS0 */ gpio_request(GPIO_FN_VBUS0_0, NULL); @@ -1421,10 +1451,10 @@ static void __init mackerel_init(void) gpio_request(GPIO_FN_FSIAILR, NULL); gpio_request(GPIO_FN_FSIAISLD, NULL); gpio_request(GPIO_FN_FSIAOSLD, NULL); - gpio_request_one(GPIO_PORT161, GPIOF_OUT_INIT_LOW, NULL); /* slave */ + gpio_request_one(161, GPIOF_OUT_INIT_LOW, NULL); /* slave */ - gpio_request(GPIO_PORT9, NULL); - gpio_request(GPIO_PORT10, NULL); + gpio_request(9, NULL); + gpio_request(10, NULL); gpio_direction_none(GPIO_PORT9CR); /* FSIAOBT needs no direction */ gpio_direction_none(GPIO_PORT10CR); /* FSIAOLR needs no direction */ @@ -1453,52 +1483,14 @@ static void __init mackerel_init(void) gpio_request(GPIO_FN_IRQ21, NULL); irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH); - /* enable SDHI0 */ - gpio_request(GPIO_FN_SDHIWP0, NULL); - gpio_request(GPIO_FN_SDHICMD0, NULL); - gpio_request(GPIO_FN_SDHICLK0, NULL); - gpio_request(GPIO_FN_SDHID0_3, NULL); - gpio_request(GPIO_FN_SDHID0_2, NULL); - gpio_request(GPIO_FN_SDHID0_1, NULL); - gpio_request(GPIO_FN_SDHID0_0, NULL); - /* SDHI0 PORT172 card-detect IRQ26 */ gpio_request(GPIO_FN_IRQ26_172, NULL); -#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) - /* enable SDHI1 */ - gpio_request(GPIO_FN_SDHICMD1, NULL); - gpio_request(GPIO_FN_SDHICLK1, NULL); - gpio_request(GPIO_FN_SDHID1_3, NULL); - gpio_request(GPIO_FN_SDHID1_2, NULL); - gpio_request(GPIO_FN_SDHID1_1, NULL); - gpio_request(GPIO_FN_SDHID1_0, NULL); -#endif /* card detect pin for MMC slot (CN7) */ - gpio_request_one(GPIO_PORT41, GPIOF_IN, NULL); - - /* enable SDHI2 */ - gpio_request(GPIO_FN_SDHICMD2, NULL); - gpio_request(GPIO_FN_SDHICLK2, NULL); - gpio_request(GPIO_FN_SDHID2_3, NULL); - gpio_request(GPIO_FN_SDHID2_2, NULL); - gpio_request(GPIO_FN_SDHID2_1, NULL); - gpio_request(GPIO_FN_SDHID2_0, NULL); + gpio_request_one(41, GPIOF_IN, NULL); /* card detect pin for microSD slot (CN23) */ - gpio_request_one(GPIO_PORT162, GPIOF_IN, NULL); - - /* MMCIF */ - gpio_request(GPIO_FN_MMCD0_0, NULL); - gpio_request(GPIO_FN_MMCD0_1, NULL); - gpio_request(GPIO_FN_MMCD0_2, NULL); - gpio_request(GPIO_FN_MMCD0_3, NULL); - gpio_request(GPIO_FN_MMCD0_4, NULL); - gpio_request(GPIO_FN_MMCD0_5, NULL); - gpio_request(GPIO_FN_MMCD0_6, NULL); - gpio_request(GPIO_FN_MMCD0_7, NULL); - gpio_request(GPIO_FN_MMCCMD0, NULL); - gpio_request(GPIO_FN_MMCCLK0, NULL); + gpio_request_one(162, GPIOF_IN, NULL); /* FLCTL */ gpio_request(GPIO_FN_D0_NAF0, NULL); diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c index cdcb799e802f..a88f7f3594c7 100644 --- a/arch/arm/mach-shmobile/board-marzen.c +++ b/arch/arm/mach-shmobile/board-marzen.c @@ -25,13 +25,15 @@ #include <linux/platform_device.h> #include <linux/delay.h> #include <linux/io.h> -#include <linux/gpio.h> +#include <linux/leds.h> #include <linux/dma-mapping.h> +#include <linux/pinctrl/machine.h> #include <linux/regulator/fixed.h> #include <linux/regulator/machine.h> #include <linux/smsc911x.h> #include <linux/spi/spi.h> #include <linux/spi/sh_hspi.h> +#include <linux/mmc/host.h> #include <linux/mmc/sh_mobile_sdhi.h> #include <linux/mfd/tmio.h> #include <linux/usb/otg.h> @@ -167,12 +169,43 @@ static struct platform_device usb_phy_device = { .num_resources = ARRAY_SIZE(usb_phy_resources), }; +/* LEDS */ +static struct gpio_led marzen_leds[] = { + { + .name = "led2", + .gpio = 157, + .default_state = LEDS_GPIO_DEFSTATE_ON, + }, { + .name = "led3", + .gpio = 158, + .default_state = LEDS_GPIO_DEFSTATE_ON, + }, { + .name = "led4", + .gpio = 159, + .default_state = LEDS_GPIO_DEFSTATE_ON, + }, +}; + +static struct gpio_led_platform_data marzen_leds_pdata = { + .leds = marzen_leds, + .num_leds = ARRAY_SIZE(marzen_leds), +}; + +static struct platform_device leds_device = { + .name = "leds-gpio", + .id = 0, + .dev = { + .platform_data = &marzen_leds_pdata, + }, +}; + static struct platform_device *marzen_devices[] __initdata = { ð_device, &sdhi0_device, &thermal_device, &hspi_device, &usb_phy_device, + &leds_device, }; /* USB */ @@ -326,6 +359,41 @@ void __init marzen_init_late(void) ARRAY_SIZE(marzen_late_devices)); } +static const struct pinctrl_map marzen_pinctrl_map[] = { + /* HSPI0 */ + PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7779", + "hspi0", "hspi0"), + /* SCIF2 (CN18: DEBUG0) */ + PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-r8a7779", + "scif2_data_c", "scif2"), + /* SCIF4 (CN19: DEBUG1) */ + PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-r8a7779", + "scif4_data", "scif4"), + /* SDHI0 */ + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779", + "sdhi0_data4", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779", + "sdhi0_ctrl", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779", + "sdhi0_cd", "sdhi0"), + PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779", + "sdhi0_wp", "sdhi0"), + /* SMSC */ + PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-r8a7779", + "intc_irq1_b", "intc"), + PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-r8a7779", + "lbsc_ex_cs0", "lbsc"), + /* USB0 */ + PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform.0", "pfc-r8a7779", + "usb0", "usb0"), + /* USB1 */ + PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform.0", "pfc-r8a7779", + "usb1", "usb1"), + /* USB2 */ + PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform.1", "pfc-r8a7779", + "usb2", "usb2"), +}; + static void __init marzen_init(void) { regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers, @@ -333,44 +401,10 @@ static void __init marzen_init(void) regulator_register_fixed(1, dummy_supplies, ARRAY_SIZE(dummy_supplies)); + pinctrl_register_mappings(marzen_pinctrl_map, + ARRAY_SIZE(marzen_pinctrl_map)); r8a7779_pinmux_init(); - /* SCIF2 (CN18: DEBUG0) */ - gpio_request(GPIO_FN_TX2_C, NULL); - gpio_request(GPIO_FN_RX2_C, NULL); - - /* SCIF4 (CN19: DEBUG1) */ - gpio_request(GPIO_FN_TX4, NULL); - gpio_request(GPIO_FN_RX4, NULL); - - /* LAN89218 */ - gpio_request(GPIO_FN_EX_CS0, NULL); /* nCS */ - gpio_request(GPIO_FN_IRQ1_B, NULL); /* IRQ + PME */ - - /* SD0 (CN20) */ - gpio_request(GPIO_FN_SD0_CLK, NULL); - gpio_request(GPIO_FN_SD0_CMD, NULL); - gpio_request(GPIO_FN_SD0_DAT0, NULL); - gpio_request(GPIO_FN_SD0_DAT1, NULL); - gpio_request(GPIO_FN_SD0_DAT2, NULL); - gpio_request(GPIO_FN_SD0_DAT3, NULL); - gpio_request(GPIO_FN_SD0_CD, NULL); - gpio_request(GPIO_FN_SD0_WP, NULL); - - /* HSPI 0 */ - gpio_request(GPIO_FN_HSPI_CLK0, NULL); - gpio_request(GPIO_FN_HSPI_CS0, NULL); - gpio_request(GPIO_FN_HSPI_TX0, NULL); - gpio_request(GPIO_FN_HSPI_RX0, NULL); - - /* USB (CN21) */ - gpio_request(GPIO_FN_USB_OVC0, NULL); - gpio_request(GPIO_FN_USB_OVC1, NULL); - gpio_request(GPIO_FN_USB_OVC2, NULL); - - /* USB (CN22) */ - gpio_request(GPIO_FN_USB_PENC2, NULL); - r8a7779_add_standard_devices(); platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices)); } diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c index f1277f45381e..cd6855290b1f 100644 --- a/arch/arm/mach-shmobile/clock-r8a7778.c +++ b/arch/arm/mach-shmobile/clock-r8a7778.c @@ -58,11 +58,13 @@ static struct clk *main_clks[] = { }; enum { + MSTP114, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, MSTP016, MSTP015, MSTP_NR }; static struct clk mstp_clks[MSTP_NR] = { + [MSTP114] = SH_CLK_MSTP32(&clkp, MSTPCR1, 14, 0), /* Ether */ [MSTP026] = SH_CLK_MSTP32(&clkp, MSTPCR0, 26, 0), /* SCIF0 */ [MSTP025] = SH_CLK_MSTP32(&clkp, MSTPCR0, 25, 0), /* SCIF1 */ [MSTP024] = SH_CLK_MSTP32(&clkp, MSTPCR0, 24, 0), /* SCIF2 */ @@ -75,6 +77,7 @@ static struct clk mstp_clks[MSTP_NR] = { static struct clk_lookup lookups[] = { /* MSTP32 clocks */ + CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */ CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */ CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */ CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */ diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c index 7d86bfbb5b06..31d5cd4d9787 100644 --- a/arch/arm/mach-shmobile/clock-r8a7779.c +++ b/arch/arm/mach-shmobile/clock-r8a7779.c @@ -26,6 +26,25 @@ #include <mach/clock.h> #include <mach/common.h> +/* + * MD1 = 1 MD1 = 0 + * (PLLA = 1500) (PLLA = 1600) + * (MHz) (MHz) + *------------------------------------------------+-------------------- + * clkz 1000 (2/3) 800 (1/2) + * clkzs 250 (1/6) 200 (1/8) + * clki 750 (1/2) 800 (1/2) + * clks 250 (1/6) 200 (1/8) + * clks1 125 (1/12) 100 (1/16) + * clks3 187.5 (1/8) 200 (1/8) + * clks4 93.7 (1/16) 100 (1/16) + * clkp 62.5 (1/24) 50 (1/32) + * clkg 62.5 (1/24) 66.6 (1/24) + * clkb, CLKOUT + * (MD2 = 0) 62.5 (1/24) 66.6 (1/24) + * (MD2 = 1) 41.6 (1/36) 50 (1/32) +*/ + #define MD(nr) BIT(nr) #define FRQMR IOMEM(0xffc80014) @@ -93,7 +112,7 @@ static struct clk *main_clks[] = { }; enum { MSTP323, MSTP322, MSTP321, MSTP320, - MSTP115, + MSTP115, MSTP114, MSTP103, MSTP101, MSTP100, MSTP030, MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, @@ -107,6 +126,7 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP321] = SH_CLK_MSTP32(&clkp_clk, MSTPCR3, 21, 0), /* SDHI2 */ [MSTP320] = SH_CLK_MSTP32(&clkp_clk, MSTPCR3, 20, 0), /* SDHI3 */ [MSTP115] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 15, 0), /* SATA */ + [MSTP114] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 14, 0), /* Ether */ [MSTP103] = SH_CLK_MSTP32(&clks_clk, MSTPCR1, 3, 0), /* DU */ [MSTP101] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 1, 0), /* USB2 */ [MSTP100] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 0, 0), /* USB0/1 */ @@ -143,6 +163,7 @@ static struct clk_lookup lookups[] = { /* MSTP32 clocks */ CLKDEV_DEV_ID("sata_rcar", &mstp_clks[MSTP115]), /* SATA */ CLKDEV_DEV_ID("fc600000.sata", &mstp_clks[MSTP115]), /* SATA w/DT */ + CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */ CLKDEV_DEV_ID("ehci-platform.1", &mstp_clks[MSTP101]), /* USB EHCI port2 */ CLKDEV_DEV_ID("ohci-platform.1", &mstp_clks[MSTP101]), /* USB OHCI port2 */ CLKDEV_DEV_ID("ehci-platform.0", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */ diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h index 5a879bbe145f..abdc4d4efa28 100644 --- a/arch/arm/mach-shmobile/include/mach/r8a7740.h +++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h @@ -241,48 +241,9 @@ enum { /* LCD0 */ GPIO_FN_LCDC0_SELECT, - GPIO_FN_LCD0_D0, GPIO_FN_LCD0_D1, GPIO_FN_LCD0_D2, - GPIO_FN_LCD0_D3, GPIO_FN_LCD0_D4, GPIO_FN_LCD0_D5, - GPIO_FN_LCD0_D6, GPIO_FN_LCD0_D7, GPIO_FN_LCD0_D8, - GPIO_FN_LCD0_D9, GPIO_FN_LCD0_D10, GPIO_FN_LCD0_D11, - GPIO_FN_LCD0_D12, GPIO_FN_LCD0_D13, GPIO_FN_LCD0_D14, - GPIO_FN_LCD0_D15, GPIO_FN_LCD0_D16, GPIO_FN_LCD0_D17, - GPIO_FN_LCD0_DON, GPIO_FN_LCD0_VCPWC, GPIO_FN_LCD0_VEPWC, - - GPIO_FN_LCD0_DCK, GPIO_FN_LCD0_VSYN, /* for RGB */ - GPIO_FN_LCD0_HSYN, GPIO_FN_LCD0_DISP, /* for RGB */ - - GPIO_FN_LCD0_WR, GPIO_FN_LCD0_RD, /* for SYS */ - GPIO_FN_LCD0_CS, GPIO_FN_LCD0_RS, /* for SYS */ - - GPIO_FN_LCD0_D18_PORT163, GPIO_FN_LCD0_D19_PORT162, - GPIO_FN_LCD0_D20_PORT161, GPIO_FN_LCD0_D21_PORT158, - GPIO_FN_LCD0_D22_PORT160, GPIO_FN_LCD0_D23_PORT159, - GPIO_FN_LCD0_LCLK_PORT165, /* MSEL5CR_6_1 */ - - GPIO_FN_LCD0_D18_PORT40, GPIO_FN_LCD0_D19_PORT4, - GPIO_FN_LCD0_D20_PORT3, GPIO_FN_LCD0_D21_PORT2, - GPIO_FN_LCD0_D22_PORT0, GPIO_FN_LCD0_D23_PORT1, - GPIO_FN_LCD0_LCLK_PORT102, /* MSEL5CR_6_0 */ /* LCD1 */ GPIO_FN_LCDC1_SELECT, - GPIO_FN_LCD1_D0, GPIO_FN_LCD1_D1, GPIO_FN_LCD1_D2, - GPIO_FN_LCD1_D3, GPIO_FN_LCD1_D4, GPIO_FN_LCD1_D5, - GPIO_FN_LCD1_D6, GPIO_FN_LCD1_D7, GPIO_FN_LCD1_D8, - GPIO_FN_LCD1_D9, GPIO_FN_LCD1_D10, GPIO_FN_LCD1_D11, - GPIO_FN_LCD1_D12, GPIO_FN_LCD1_D13, GPIO_FN_LCD1_D14, - GPIO_FN_LCD1_D15, GPIO_FN_LCD1_D16, GPIO_FN_LCD1_D17, - GPIO_FN_LCD1_D18, GPIO_FN_LCD1_D19, GPIO_FN_LCD1_D20, - GPIO_FN_LCD1_D21, GPIO_FN_LCD1_D22, GPIO_FN_LCD1_D23, - GPIO_FN_LCD1_DON, GPIO_FN_LCD1_VCPWC, - GPIO_FN_LCD1_LCLK, GPIO_FN_LCD1_VEPWC, - - GPIO_FN_LCD1_DCK, GPIO_FN_LCD1_VSYN, /* for RGB */ - GPIO_FN_LCD1_HSYN, GPIO_FN_LCD1_DISP, /* for RGB */ - - GPIO_FN_LCD1_WR, GPIO_FN_LCD1_RD, /* for SYS */ - GPIO_FN_LCD1_CS, GPIO_FN_LCD1_RS, /* for SYS */ /* RSPI */ GPIO_FN_RSPI_SSL0_A, GPIO_FN_RSPI_SSL1_A, @@ -346,26 +307,6 @@ enum { GPIO_FN_SIM_D_PORT22, /* SIM_D Port 22/199 */ GPIO_FN_SIM_D_PORT199, - /* SDHI0 */ - GPIO_FN_SDHI0_D0, GPIO_FN_SDHI0_D1, GPIO_FN_SDHI0_D2, - GPIO_FN_SDHI0_D3, GPIO_FN_SDHI0_CD, GPIO_FN_SDHI0_WP, - GPIO_FN_SDHI0_CMD, GPIO_FN_SDHI0_CLK, - - /* SDHI1 */ - GPIO_FN_SDHI1_D0, GPIO_FN_SDHI1_D1, GPIO_FN_SDHI1_D2, - GPIO_FN_SDHI1_D3, GPIO_FN_SDHI1_CD, GPIO_FN_SDHI1_WP, - GPIO_FN_SDHI1_CMD, GPIO_FN_SDHI1_CLK, - - /* SDHI2 */ - GPIO_FN_SDHI2_D0, GPIO_FN_SDHI2_D1, GPIO_FN_SDHI2_D2, - GPIO_FN_SDHI2_D3, GPIO_FN_SDHI2_CLK, GPIO_FN_SDHI2_CMD, - - GPIO_FN_SDHI2_CD_PORT24, /* MSEL5CR_19_0 */ - GPIO_FN_SDHI2_WP_PORT25, - - GPIO_FN_SDHI2_WP_PORT177, /* MSEL5CR_19_1 */ - GPIO_FN_SDHI2_CD_PORT202, - /* MSIOF2 */ GPIO_FN_MSIOF2_TXD, GPIO_FN_MSIOF2_RXD, GPIO_FN_MSIOF2_TSCK, GPIO_FN_MSIOF2_SS2, GPIO_FN_MSIOF2_TSYNC, GPIO_FN_MSIOF2_SS1, @@ -417,21 +358,6 @@ enum { GPIO_FN_MEMC_DREQ1, GPIO_FN_MEMC_A0, - /* MMC */ - GPIO_FN_MMC0_D0_PORT68, GPIO_FN_MMC0_D1_PORT69, - GPIO_FN_MMC0_D2_PORT70, GPIO_FN_MMC0_D3_PORT71, - GPIO_FN_MMC0_D4_PORT72, GPIO_FN_MMC0_D5_PORT73, - GPIO_FN_MMC0_D6_PORT74, GPIO_FN_MMC0_D7_PORT75, - GPIO_FN_MMC0_CLK_PORT66, - GPIO_FN_MMC0_CMD_PORT67, /* MSEL4CR_15_0 */ - - GPIO_FN_MMC1_D0_PORT149, GPIO_FN_MMC1_D1_PORT148, - GPIO_FN_MMC1_D2_PORT147, GPIO_FN_MMC1_D3_PORT146, - GPIO_FN_MMC1_D4_PORT145, GPIO_FN_MMC1_D5_PORT144, - GPIO_FN_MMC1_D6_PORT143, GPIO_FN_MMC1_D7_PORT142, - GPIO_FN_MMC1_CLK_PORT103, - GPIO_FN_MMC1_CMD_PORT104, /* MSEL4CR_15_1 */ - /* MSIOF0 */ GPIO_FN_MSIOF0_SS1, GPIO_FN_MSIOF0_SS2, GPIO_FN_MSIOF0_RXD, GPIO_FN_MSIOF0_TXD, diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h index a755dcafef4d..951149e6bcca 100644 --- a/arch/arm/mach-shmobile/include/mach/r8a7778.h +++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h @@ -18,11 +18,15 @@ #ifndef __ASM_R8A7778_H__ #define __ASM_R8A7778_H__ +#include <linux/sh_eth.h> + extern void r8a7778_add_standard_devices(void); extern void r8a7778_add_standard_devices_dt(void); +extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata); extern void r8a7778_init_delay(void); extern void r8a7778_init_irq(void); extern void r8a7778_init_irq_dt(void); extern void r8a7778_clock_init(void); +extern void r8a7778_init_irq_extpin(int irlm); #endif /* __ASM_R8A7778_H__ */ diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h index af38750f38f7..188b295938a5 100644 --- a/arch/arm/mach-shmobile/include/mach/r8a7779.h +++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h @@ -3,327 +3,7 @@ #include <linux/sh_clk.h> #include <linux/pm_domain.h> - -/* Pin Function Controller: - * GPIO_FN_xx - GPIO used to select pin function - * GPIO_GP_x_x - GPIO mapped to real I/O pin on CPU - */ -enum { - GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3, - GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7, - GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11, - GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15, - GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19, - GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23, - GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27, - GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31, - - GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3, - GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7, - GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11, - GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15, - GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19, - GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23, - GPIO_GP_1_24, GPIO_GP_1_25, GPIO_GP_1_26, GPIO_GP_1_27, - GPIO_GP_1_28, GPIO_GP_1_29, GPIO_GP_1_30, GPIO_GP_1_31, - - GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3, - GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7, - GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11, - GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15, - GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19, - GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23, - GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27, - GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31, - - GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3, - GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7, - GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11, - GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15, - GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19, - GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23, - GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27, - GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31, - - GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3, - GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7, - GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11, - GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15, - GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19, - GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23, - GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27, - GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31, - - GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3, - GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7, - GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11, - GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15, - GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19, - GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23, - GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27, - GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31, - - GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3, - GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7, - GPIO_GP_6_8, - - GPIO_FN_AVS1, GPIO_FN_AVS2, GPIO_FN_A17, GPIO_FN_A18, - GPIO_FN_A19, - - /* IPSR0 */ - GPIO_FN_USB_PENC2, GPIO_FN_SCK0, GPIO_FN_PWM1, GPIO_FN_PWMFSW0, - GPIO_FN_SCIF_CLK, GPIO_FN_TCLK0_C, GPIO_FN_BS, GPIO_FN_SD1_DAT2, - GPIO_FN_MMC0_D2, GPIO_FN_FD2, GPIO_FN_ATADIR0, GPIO_FN_SDSELF, - GPIO_FN_HCTS1, GPIO_FN_TX4_C, GPIO_FN_A0, GPIO_FN_SD1_DAT3, - GPIO_FN_MMC0_D3, GPIO_FN_FD3, GPIO_FN_A20, GPIO_FN_TX5_D, - GPIO_FN_HSPI_TX2_B, GPIO_FN_A21, GPIO_FN_SCK5_D, GPIO_FN_HSPI_CLK2_B, - GPIO_FN_A22, GPIO_FN_RX5_D, GPIO_FN_HSPI_RX2_B, GPIO_FN_VI1_R0, - GPIO_FN_A23, GPIO_FN_FCLE, GPIO_FN_HSPI_CLK2, GPIO_FN_VI1_R1, - GPIO_FN_A24, GPIO_FN_SD1_CD, GPIO_FN_MMC0_D4, GPIO_FN_FD4, - GPIO_FN_HSPI_CS2, GPIO_FN_VI1_R2, GPIO_FN_SSI_WS78_B, GPIO_FN_A25, - GPIO_FN_SD1_WP, GPIO_FN_MMC0_D5, GPIO_FN_FD5, GPIO_FN_HSPI_RX2, - GPIO_FN_VI1_R3, GPIO_FN_TX5_B, GPIO_FN_SSI_SDATA7_B, GPIO_FN_CTS0_B, - GPIO_FN_CLKOUT, GPIO_FN_TX3C_IRDA_TX_C, GPIO_FN_PWM0_B, GPIO_FN_CS0, - GPIO_FN_HSPI_CS2_B, GPIO_FN_CS1_A26, GPIO_FN_HSPI_TX2, - GPIO_FN_SDSELF_B, GPIO_FN_RD_WR, GPIO_FN_FWE, GPIO_FN_ATAG0, - GPIO_FN_VI1_R7, GPIO_FN_HRTS1, GPIO_FN_RX4_C, - - /* IPSR1 */ - GPIO_FN_EX_CS0, GPIO_FN_RX3_C_IRDA_RX_C, GPIO_FN_MMC0_D6, - GPIO_FN_FD6, GPIO_FN_EX_CS1, GPIO_FN_MMC0_D7, GPIO_FN_FD7, - GPIO_FN_EX_CS2, GPIO_FN_SD1_CLK, GPIO_FN_MMC0_CLK, GPIO_FN_FALE, - GPIO_FN_ATACS00, GPIO_FN_EX_CS3, GPIO_FN_SD1_CMD, GPIO_FN_MMC0_CMD, - GPIO_FN_FRE, GPIO_FN_ATACS10, GPIO_FN_VI1_R4, GPIO_FN_RX5_B, - GPIO_FN_HSCK1, GPIO_FN_SSI_SDATA8_B, GPIO_FN_RTS0_B_TANS_B, - GPIO_FN_SSI_SDATA9, GPIO_FN_EX_CS4, GPIO_FN_SD1_DAT0, GPIO_FN_MMC0_D0, - GPIO_FN_FD0, GPIO_FN_ATARD0, GPIO_FN_VI1_R5, GPIO_FN_SCK5_B, - GPIO_FN_HTX1, GPIO_FN_TX2_E, GPIO_FN_TX0_B, GPIO_FN_SSI_SCK9, - GPIO_FN_EX_CS5, GPIO_FN_SD1_DAT1, GPIO_FN_MMC0_D1, GPIO_FN_FD1, - GPIO_FN_ATAWR0, GPIO_FN_VI1_R6, GPIO_FN_HRX1, GPIO_FN_RX2_E, - GPIO_FN_RX0_B, GPIO_FN_SSI_WS9, GPIO_FN_MLB_CLK, GPIO_FN_PWM2, - GPIO_FN_SCK4, GPIO_FN_MLB_SIG, GPIO_FN_PWM3, GPIO_FN_TX4, - GPIO_FN_MLB_DAT, GPIO_FN_PWM4, GPIO_FN_RX4, GPIO_FN_HTX0, - GPIO_FN_TX1, GPIO_FN_SDATA, GPIO_FN_CTS0_C, GPIO_FN_SUB_TCK, - GPIO_FN_CC5_STATE2, GPIO_FN_CC5_STATE10, GPIO_FN_CC5_STATE18, - GPIO_FN_CC5_STATE26, GPIO_FN_CC5_STATE34, - - /* IPSR2 */ - GPIO_FN_HRX0, GPIO_FN_RX1, GPIO_FN_SCKZ, GPIO_FN_RTS0_C_TANS_C, - GPIO_FN_SUB_TDI, GPIO_FN_CC5_STATE3, GPIO_FN_CC5_STATE11, - GPIO_FN_CC5_STATE19, GPIO_FN_CC5_STATE27, GPIO_FN_CC5_STATE35, - GPIO_FN_HSCK0, GPIO_FN_SCK1, GPIO_FN_MTS, GPIO_FN_PWM5, - GPIO_FN_SCK0_C, GPIO_FN_SSI_SDATA9_B, GPIO_FN_SUB_TDO, - GPIO_FN_CC5_STATE0, GPIO_FN_CC5_STATE8, GPIO_FN_CC5_STATE16, - GPIO_FN_CC5_STATE24, GPIO_FN_CC5_STATE32, GPIO_FN_HCTS0, GPIO_FN_CTS1, - GPIO_FN_STM, GPIO_FN_PWM0_D, GPIO_FN_RX0_C, GPIO_FN_SCIF_CLK_C, - GPIO_FN_SUB_TRST, GPIO_FN_TCLK1_B, GPIO_FN_CC5_OSCOUT, GPIO_FN_HRTS0, - GPIO_FN_RTS1_TANS, GPIO_FN_MDATA, GPIO_FN_TX0_C, GPIO_FN_SUB_TMS, - GPIO_FN_CC5_STATE1, GPIO_FN_CC5_STATE9, GPIO_FN_CC5_STATE17, - GPIO_FN_CC5_STATE25, GPIO_FN_CC5_STATE33, GPIO_FN_DU0_DR0, - GPIO_FN_LCDOUT0, GPIO_FN_DREQ0, GPIO_FN_GPS_CLK_B, GPIO_FN_AUDATA0, - GPIO_FN_TX5_C, GPIO_FN_DU0_DR1, GPIO_FN_LCDOUT1, GPIO_FN_DACK0, - GPIO_FN_DRACK0, GPIO_FN_GPS_SIGN_B, GPIO_FN_AUDATA1, GPIO_FN_RX5_C, - GPIO_FN_DU0_DR2, GPIO_FN_LCDOUT2, GPIO_FN_DU0_DR3, GPIO_FN_LCDOUT3, - GPIO_FN_DU0_DR4, GPIO_FN_LCDOUT4, GPIO_FN_DU0_DR5, GPIO_FN_LCDOUT5, - GPIO_FN_DU0_DR6, GPIO_FN_LCDOUT6, GPIO_FN_DU0_DR7, GPIO_FN_LCDOUT7, - GPIO_FN_DU0_DG0, GPIO_FN_LCDOUT8, GPIO_FN_DREQ1, GPIO_FN_SCL2, - GPIO_FN_AUDATA2, - - /* IPSR3 */ - GPIO_FN_DU0_DG1, GPIO_FN_LCDOUT9, GPIO_FN_DACK1, GPIO_FN_SDA2, - GPIO_FN_AUDATA3, GPIO_FN_DU0_DG2, GPIO_FN_LCDOUT10, GPIO_FN_DU0_DG3, - GPIO_FN_LCDOUT11, GPIO_FN_DU0_DG4, GPIO_FN_LCDOUT12, GPIO_FN_DU0_DG5, - GPIO_FN_LCDOUT13, GPIO_FN_DU0_DG6, GPIO_FN_LCDOUT14, GPIO_FN_DU0_DG7, - GPIO_FN_LCDOUT15, GPIO_FN_DU0_DB0, GPIO_FN_LCDOUT16, GPIO_FN_EX_WAIT1, - GPIO_FN_SCL1, GPIO_FN_TCLK1, GPIO_FN_AUDATA4, GPIO_FN_DU0_DB1, - GPIO_FN_LCDOUT17, GPIO_FN_EX_WAIT2, GPIO_FN_SDA1, GPIO_FN_GPS_MAG_B, - GPIO_FN_AUDATA5, GPIO_FN_SCK5_C, GPIO_FN_DU0_DB2, GPIO_FN_LCDOUT18, - GPIO_FN_DU0_DB3, GPIO_FN_LCDOUT19, GPIO_FN_DU0_DB4, GPIO_FN_LCDOUT20, - GPIO_FN_DU0_DB5, GPIO_FN_LCDOUT21, GPIO_FN_DU0_DB6, GPIO_FN_LCDOUT22, - GPIO_FN_DU0_DB7, GPIO_FN_LCDOUT23, GPIO_FN_DU0_DOTCLKIN, - GPIO_FN_QSTVA_QVS, GPIO_FN_TX3_D_IRDA_TX_D, GPIO_FN_SCL3_B, - GPIO_FN_DU0_DOTCLKOUT0, GPIO_FN_QCLK, GPIO_FN_DU0_DOTCLKOUT1, - GPIO_FN_QSTVB_QVE, GPIO_FN_RX3_D_IRDA_RX_D, GPIO_FN_SDA3_B, - GPIO_FN_SDA2_C, GPIO_FN_DACK0_B, GPIO_FN_DRACK0_B, - GPIO_FN_DU0_EXHSYNC_DU0_HSYNC, GPIO_FN_QSTH_QHS, - GPIO_FN_DU0_EXVSYNC_DU0_VSYNC, GPIO_FN_QSTB_QHE, - GPIO_FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, GPIO_FN_QCPV_QDE, - GPIO_FN_CAN1_TX, GPIO_FN_TX2_C, GPIO_FN_SCL2_C, GPIO_FN_REMOCON, - - /* IPSR4 */ - GPIO_FN_DU0_DISP, GPIO_FN_QPOLA, GPIO_FN_CAN_CLK_C, GPIO_FN_SCK2_C, - GPIO_FN_DU0_CDE, GPIO_FN_QPOLB, GPIO_FN_CAN1_RX, GPIO_FN_RX2_C, - GPIO_FN_DREQ0_B, GPIO_FN_SSI_SCK78_B, GPIO_FN_SCK0_B, GPIO_FN_DU1_DR0, - GPIO_FN_VI2_DATA0_VI2_B0, GPIO_FN_PWM6, GPIO_FN_SD3_CLK, - GPIO_FN_TX3_E_IRDA_TX_E, GPIO_FN_AUDCK, GPIO_FN_PWMFSW0_B, - GPIO_FN_DU1_DR1, GPIO_FN_VI2_DATA1_VI2_B1, GPIO_FN_PWM0, - GPIO_FN_SD3_CMD, GPIO_FN_RX3_E_IRDA_RX_E, GPIO_FN_AUDSYNC, - GPIO_FN_CTS0_D, GPIO_FN_DU1_DR2, GPIO_FN_VI2_G0, GPIO_FN_DU1_DR3, - GPIO_FN_VI2_G1, GPIO_FN_DU1_DR4, GPIO_FN_VI2_G2, GPIO_FN_DU1_DR5, - GPIO_FN_VI2_G3, GPIO_FN_DU1_DR6, GPIO_FN_VI2_G4, GPIO_FN_DU1_DR7, - GPIO_FN_VI2_G5, GPIO_FN_DU1_DG0, GPIO_FN_VI2_DATA2_VI2_B2, - GPIO_FN_SCL1_B, GPIO_FN_SD3_DAT2, GPIO_FN_SCK3_E, GPIO_FN_AUDATA6, - GPIO_FN_TX0_D, GPIO_FN_DU1_DG1, GPIO_FN_VI2_DATA3_VI2_B3, - GPIO_FN_SDA1_B, GPIO_FN_SD3_DAT3, GPIO_FN_SCK5, GPIO_FN_AUDATA7, - GPIO_FN_RX0_D, GPIO_FN_DU1_DG2, GPIO_FN_VI2_G6, GPIO_FN_DU1_DG3, - GPIO_FN_VI2_G7, GPIO_FN_DU1_DG4, GPIO_FN_VI2_R0, GPIO_FN_DU1_DG5, - GPIO_FN_VI2_R1, GPIO_FN_DU1_DG6, GPIO_FN_VI2_R2, GPIO_FN_DU1_DG7, - GPIO_FN_VI2_R3, GPIO_FN_DU1_DB0, GPIO_FN_VI2_DATA4_VI2_B4, - GPIO_FN_SCL2_B, GPIO_FN_SD3_DAT0, GPIO_FN_TX5, GPIO_FN_SCK0_D, - - /* IPSR5 */ - GPIO_FN_DU1_DB1, GPIO_FN_VI2_DATA5_VI2_B5, GPIO_FN_SDA2_B, - GPIO_FN_SD3_DAT1, GPIO_FN_RX5, GPIO_FN_RTS0_D_TANS_D, - GPIO_FN_DU1_DB2, GPIO_FN_VI2_R4, GPIO_FN_DU1_DB3, GPIO_FN_VI2_R5, - GPIO_FN_DU1_DB4, GPIO_FN_VI2_R6, GPIO_FN_DU1_DB5, GPIO_FN_VI2_R7, - GPIO_FN_DU1_DB6, GPIO_FN_SCL2_D, GPIO_FN_DU1_DB7, GPIO_FN_SDA2_D, - GPIO_FN_DU1_DOTCLKIN, GPIO_FN_VI2_CLKENB, GPIO_FN_HSPI_CS1, - GPIO_FN_SCL1_D, GPIO_FN_DU1_DOTCLKOUT, GPIO_FN_VI2_FIELD, - GPIO_FN_SDA1_D, GPIO_FN_DU1_EXHSYNC_DU1_HSYNC, GPIO_FN_VI2_HSYNC, - GPIO_FN_VI3_HSYNC, GPIO_FN_DU1_EXVSYNC_DU1_VSYNC, GPIO_FN_VI2_VSYNC, - GPIO_FN_VI3_VSYNC, GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, - GPIO_FN_VI2_CLK, GPIO_FN_TX3_B_IRDA_TX_B, GPIO_FN_SD3_CD, - GPIO_FN_HSPI_TX1, GPIO_FN_VI1_CLKENB, GPIO_FN_VI3_CLKENB, - GPIO_FN_AUDIO_CLKC, GPIO_FN_TX2_D, GPIO_FN_SPEEDIN, - GPIO_FN_GPS_SIGN_D, GPIO_FN_DU1_DISP, GPIO_FN_VI2_DATA6_VI2_B6, - GPIO_FN_TCLK0, GPIO_FN_QSTVA_B_QVS_B, GPIO_FN_HSPI_CLK1, - GPIO_FN_SCK2_D, GPIO_FN_AUDIO_CLKOUT_B, GPIO_FN_GPS_MAG_D, - GPIO_FN_DU1_CDE, GPIO_FN_VI2_DATA7_VI2_B7, GPIO_FN_RX3_B_IRDA_RX_B, - GPIO_FN_SD3_WP, GPIO_FN_HSPI_RX1, GPIO_FN_VI1_FIELD, GPIO_FN_VI3_FIELD, - GPIO_FN_AUDIO_CLKOUT, GPIO_FN_RX2_D, GPIO_FN_GPS_CLK_C, - GPIO_FN_GPS_CLK_D, GPIO_FN_AUDIO_CLKA, GPIO_FN_CAN_TXCLK, - GPIO_FN_AUDIO_CLKB, GPIO_FN_USB_OVC2, GPIO_FN_CAN_DEBUGOUT0, - GPIO_FN_MOUT0, - - /* IPSR6 */ - GPIO_FN_SSI_SCK0129, GPIO_FN_CAN_DEBUGOUT1, GPIO_FN_MOUT1, - GPIO_FN_SSI_WS0129, GPIO_FN_CAN_DEBUGOUT2, GPIO_FN_MOUT2, - GPIO_FN_SSI_SDATA0, GPIO_FN_CAN_DEBUGOUT3, GPIO_FN_MOUT5, - GPIO_FN_SSI_SDATA1, GPIO_FN_CAN_DEBUGOUT4, GPIO_FN_MOUT6, - GPIO_FN_SSI_SDATA2, GPIO_FN_CAN_DEBUGOUT5, GPIO_FN_SSI_SCK34, - GPIO_FN_CAN_DEBUGOUT6, GPIO_FN_CAN0_TX_B, GPIO_FN_IERX, - GPIO_FN_SSI_SCK9_C, GPIO_FN_SSI_WS34, GPIO_FN_CAN_DEBUGOUT7, - GPIO_FN_CAN0_RX_B, GPIO_FN_IETX, GPIO_FN_SSI_WS9_C, - GPIO_FN_SSI_SDATA3, GPIO_FN_PWM0_C, GPIO_FN_CAN_DEBUGOUT8, - GPIO_FN_CAN_CLK_B, GPIO_FN_IECLK, GPIO_FN_SCIF_CLK_B, GPIO_FN_TCLK0_B, - GPIO_FN_SSI_SDATA4, GPIO_FN_CAN_DEBUGOUT9, GPIO_FN_SSI_SDATA9_C, - GPIO_FN_SSI_SCK5, GPIO_FN_ADICLK, GPIO_FN_CAN_DEBUGOUT10, - GPIO_FN_SCK3, GPIO_FN_TCLK0_D, GPIO_FN_SSI_WS5, GPIO_FN_ADICS_SAMP, - GPIO_FN_CAN_DEBUGOUT11, GPIO_FN_TX3_IRDA_TX, GPIO_FN_SSI_SDATA5, - GPIO_FN_ADIDATA, GPIO_FN_CAN_DEBUGOUT12, GPIO_FN_RX3_IRDA_RX, - GPIO_FN_SSI_SCK6, GPIO_FN_ADICHS0, GPIO_FN_CAN0_TX, GPIO_FN_IERX_B, - - /* IPSR7 */ - GPIO_FN_SSI_WS6, GPIO_FN_ADICHS1, GPIO_FN_CAN0_RX, GPIO_FN_IETX_B, - GPIO_FN_SSI_SDATA6, GPIO_FN_ADICHS2, GPIO_FN_CAN_CLK, GPIO_FN_IECLK_B, - GPIO_FN_SSI_SCK78, GPIO_FN_CAN_DEBUGOUT13, GPIO_FN_IRQ0_B, - GPIO_FN_SSI_SCK9_B, GPIO_FN_HSPI_CLK1_C, GPIO_FN_SSI_WS78, - GPIO_FN_CAN_DEBUGOUT14, GPIO_FN_IRQ1_B, GPIO_FN_SSI_WS9_B, - GPIO_FN_HSPI_CS1_C, GPIO_FN_SSI_SDATA7, GPIO_FN_CAN_DEBUGOUT15, - GPIO_FN_IRQ2_B, GPIO_FN_TCLK1_C, GPIO_FN_HSPI_TX1_C, - GPIO_FN_SSI_SDATA8, GPIO_FN_VSP, GPIO_FN_IRQ3_B, GPIO_FN_HSPI_RX1_C, - GPIO_FN_SD0_CLK, GPIO_FN_ATACS01, GPIO_FN_SCK1_B, GPIO_FN_SD0_CMD, - GPIO_FN_ATACS11, GPIO_FN_TX1_B, GPIO_FN_CC5_TDO, GPIO_FN_SD0_DAT0, - GPIO_FN_ATADIR1, GPIO_FN_RX1_B, GPIO_FN_CC5_TRST, GPIO_FN_SD0_DAT1, - GPIO_FN_ATAG1, GPIO_FN_SCK2_B, GPIO_FN_CC5_TMS, GPIO_FN_SD0_DAT2, - GPIO_FN_ATARD1, GPIO_FN_TX2_B, GPIO_FN_CC5_TCK, GPIO_FN_SD0_DAT3, - GPIO_FN_ATAWR1, GPIO_FN_RX2_B, GPIO_FN_CC5_TDI, GPIO_FN_SD0_CD, - GPIO_FN_DREQ2, GPIO_FN_RTS1_B_TANS_B, GPIO_FN_SD0_WP, GPIO_FN_DACK2, - GPIO_FN_CTS1_B, - - /* IPSR8 */ - GPIO_FN_HSPI_CLK0, GPIO_FN_CTS0, GPIO_FN_USB_OVC0, GPIO_FN_AD_CLK, - GPIO_FN_CC5_STATE4, GPIO_FN_CC5_STATE12, GPIO_FN_CC5_STATE20, - GPIO_FN_CC5_STATE28, GPIO_FN_CC5_STATE36, GPIO_FN_HSPI_CS0, - GPIO_FN_RTS0_TANS, GPIO_FN_USB_OVC1, GPIO_FN_AD_DI, - GPIO_FN_CC5_STATE5, GPIO_FN_CC5_STATE13, GPIO_FN_CC5_STATE21, - GPIO_FN_CC5_STATE29, GPIO_FN_CC5_STATE37, GPIO_FN_HSPI_TX0, - GPIO_FN_TX0, GPIO_FN_CAN_DEBUG_HW_TRIGGER, GPIO_FN_AD_DO, - GPIO_FN_CC5_STATE6, GPIO_FN_CC5_STATE14, GPIO_FN_CC5_STATE22, - GPIO_FN_CC5_STATE30, GPIO_FN_CC5_STATE38, GPIO_FN_HSPI_RX0, - GPIO_FN_RX0, GPIO_FN_CAN_STEP0, GPIO_FN_AD_NCS, GPIO_FN_CC5_STATE7, - GPIO_FN_CC5_STATE15, GPIO_FN_CC5_STATE23, GPIO_FN_CC5_STATE31, - GPIO_FN_CC5_STATE39, GPIO_FN_FMCLK, GPIO_FN_RDS_CLK, GPIO_FN_PCMOE, - GPIO_FN_BPFCLK, GPIO_FN_PCMWE, GPIO_FN_FMIN, GPIO_FN_RDS_DATA, - GPIO_FN_VI0_CLK, GPIO_FN_MMC1_CLK, GPIO_FN_VI0_CLKENB, GPIO_FN_TX1_C, - GPIO_FN_HTX1_B, GPIO_FN_MT1_SYNC, GPIO_FN_VI0_FIELD, GPIO_FN_RX1_C, - GPIO_FN_HRX1_B, GPIO_FN_VI0_HSYNC, GPIO_FN_VI0_DATA0_B_VI0_B0_B, - GPIO_FN_CTS1_C, GPIO_FN_TX4_D, GPIO_FN_MMC1_CMD, GPIO_FN_HSCK1_B, - GPIO_FN_VI0_VSYNC, GPIO_FN_VI0_DATA1_B_VI0_B1_B, - GPIO_FN_RTS1_C_TANS_C, GPIO_FN_RX4_D, GPIO_FN_PWMFSW0_C, - - /* IPSR9 */ - GPIO_FN_VI0_DATA0_VI0_B0, GPIO_FN_HRTS1_B, GPIO_FN_MT1_VCXO, - GPIO_FN_VI0_DATA1_VI0_B1, GPIO_FN_HCTS1_B, GPIO_FN_MT1_PWM, - GPIO_FN_VI0_DATA2_VI0_B2, GPIO_FN_MMC1_D0, GPIO_FN_VI0_DATA3_VI0_B3, - GPIO_FN_MMC1_D1, GPIO_FN_VI0_DATA4_VI0_B4, GPIO_FN_MMC1_D2, - GPIO_FN_VI0_DATA5_VI0_B5, GPIO_FN_MMC1_D3, GPIO_FN_VI0_DATA6_VI0_B6, - GPIO_FN_MMC1_D4, GPIO_FN_ARM_TRACEDATA_0, GPIO_FN_VI0_DATA7_VI0_B7, - GPIO_FN_MMC1_D5, GPIO_FN_ARM_TRACEDATA_1, GPIO_FN_VI0_G0, - GPIO_FN_SSI_SCK78_C, GPIO_FN_IRQ0, GPIO_FN_ARM_TRACEDATA_2, - GPIO_FN_VI0_G1, GPIO_FN_SSI_WS78_C, GPIO_FN_IRQ1, - GPIO_FN_ARM_TRACEDATA_3, GPIO_FN_VI0_G2, GPIO_FN_ETH_TXD1, - GPIO_FN_MMC1_D6, GPIO_FN_ARM_TRACEDATA_4, GPIO_FN_TS_SPSYNC0, - GPIO_FN_VI0_G3, GPIO_FN_ETH_CRS_DV, GPIO_FN_MMC1_D7, - GPIO_FN_ARM_TRACEDATA_5, GPIO_FN_TS_SDAT0, GPIO_FN_VI0_G4, - GPIO_FN_ETH_TX_EN, GPIO_FN_SD2_DAT0_B, GPIO_FN_ARM_TRACEDATA_6, - GPIO_FN_VI0_G5, GPIO_FN_ETH_RX_ER, GPIO_FN_SD2_DAT1_B, - GPIO_FN_ARM_TRACEDATA_7, GPIO_FN_VI0_G6, GPIO_FN_ETH_RXD0, - GPIO_FN_SD2_DAT2_B, GPIO_FN_ARM_TRACEDATA_8, GPIO_FN_VI0_G7, - GPIO_FN_ETH_RXD1, GPIO_FN_SD2_DAT3_B, GPIO_FN_ARM_TRACEDATA_9, - - /* IPSR10 */ - GPIO_FN_VI0_R0, GPIO_FN_SSI_SDATA7_C, GPIO_FN_SCK1_C, GPIO_FN_DREQ1_B, - GPIO_FN_ARM_TRACEDATA_10, GPIO_FN_DREQ0_C, GPIO_FN_VI0_R1, - GPIO_FN_SSI_SDATA8_C, GPIO_FN_DACK1_B, GPIO_FN_ARM_TRACEDATA_11, - GPIO_FN_DACK0_C, GPIO_FN_DRACK0_C, GPIO_FN_VI0_R2, GPIO_FN_ETH_LINK, - GPIO_FN_SD2_CLK_B, GPIO_FN_IRQ2, GPIO_FN_ARM_TRACEDATA_12, - GPIO_FN_VI0_R3, GPIO_FN_ETH_MAGIC, GPIO_FN_SD2_CMD_B, GPIO_FN_IRQ3, - GPIO_FN_ARM_TRACEDATA_13, GPIO_FN_VI0_R4, GPIO_FN_ETH_REFCLK, - GPIO_FN_SD2_CD_B, GPIO_FN_HSPI_CLK1_B, GPIO_FN_ARM_TRACEDATA_14, - GPIO_FN_MT1_CLK, GPIO_FN_TS_SCK0, GPIO_FN_VI0_R5, GPIO_FN_ETH_TXD0, - GPIO_FN_SD2_WP_B, GPIO_FN_HSPI_CS1_B, GPIO_FN_ARM_TRACEDATA_15, - GPIO_FN_MT1_D, GPIO_FN_TS_SDEN0, GPIO_FN_VI0_R6, GPIO_FN_ETH_MDC, - GPIO_FN_DREQ2_C, GPIO_FN_HSPI_TX1_B, GPIO_FN_TRACECLK, - GPIO_FN_MT1_BEN, GPIO_FN_PWMFSW0_D, GPIO_FN_VI0_R7, GPIO_FN_ETH_MDIO, - GPIO_FN_DACK2_C, GPIO_FN_HSPI_RX1_B, GPIO_FN_SCIF_CLK_D, - GPIO_FN_TRACECTL, GPIO_FN_MT1_PEN, GPIO_FN_VI1_CLK, GPIO_FN_SIM_D, - GPIO_FN_SDA3, GPIO_FN_VI1_HSYNC, GPIO_FN_VI3_CLK, GPIO_FN_SSI_SCK4, - GPIO_FN_GPS_SIGN_C, GPIO_FN_PWMFSW0_E, GPIO_FN_VI1_VSYNC, - GPIO_FN_AUDIO_CLKOUT_C, GPIO_FN_SSI_WS4, GPIO_FN_SIM_CLK, - GPIO_FN_GPS_MAG_C, GPIO_FN_SPV_TRST, GPIO_FN_SCL3, - - /* IPSR11 */ - GPIO_FN_VI1_DATA0_VI1_B0, GPIO_FN_SD2_DAT0, GPIO_FN_SIM_RST, - GPIO_FN_SPV_TCK, GPIO_FN_ADICLK_B, GPIO_FN_VI1_DATA1_VI1_B1, - GPIO_FN_SD2_DAT1, GPIO_FN_MT0_CLK, GPIO_FN_SPV_TMS, - GPIO_FN_ADICS_B_SAMP_B, GPIO_FN_VI1_DATA2_VI1_B2, GPIO_FN_SD2_DAT2, - GPIO_FN_MT0_D, GPIO_FN_SPVTDI, GPIO_FN_ADIDATA_B, - GPIO_FN_VI1_DATA3_VI1_B3, GPIO_FN_SD2_DAT3, GPIO_FN_MT0_BEN, - GPIO_FN_SPV_TDO, GPIO_FN_ADICHS0_B, GPIO_FN_VI1_DATA4_VI1_B4, - GPIO_FN_SD2_CLK, GPIO_FN_MT0_PEN, GPIO_FN_SPA_TRST, - GPIO_FN_HSPI_CLK1_D, GPIO_FN_ADICHS1_B, GPIO_FN_VI1_DATA5_VI1_B5, - GPIO_FN_SD2_CMD, GPIO_FN_MT0_SYNC, GPIO_FN_SPA_TCK, - GPIO_FN_HSPI_CS1_D, GPIO_FN_ADICHS2_B, GPIO_FN_VI1_DATA6_VI1_B6, - GPIO_FN_SD2_CD, GPIO_FN_MT0_VCXO, GPIO_FN_SPA_TMS, GPIO_FN_HSPI_TX1_D, - GPIO_FN_VI1_DATA7_VI1_B7, GPIO_FN_SD2_WP, GPIO_FN_MT0_PWM, - GPIO_FN_SPA_TDI, GPIO_FN_HSPI_RX1_D, GPIO_FN_VI1_G0, GPIO_FN_VI3_DATA0, - GPIO_FN_DU1_DOTCLKOUT1, GPIO_FN_TS_SCK1, GPIO_FN_DREQ2_B, GPIO_FN_TX2, - GPIO_FN_SPA_TDO, GPIO_FN_HCTS0_B, GPIO_FN_VI1_G1, GPIO_FN_VI3_DATA1, - GPIO_FN_SSI_SCK1, GPIO_FN_TS_SDEN1, GPIO_FN_DACK2_B, GPIO_FN_RX2, - GPIO_FN_HRTS0_B, - - /* IPSR12 */ - GPIO_FN_VI1_G2, GPIO_FN_VI3_DATA2, GPIO_FN_SSI_WS1, GPIO_FN_TS_SPSYNC1, - GPIO_FN_SCK2, GPIO_FN_HSCK0_B, GPIO_FN_VI1_G3, GPIO_FN_VI3_DATA3, - GPIO_FN_SSI_SCK2, GPIO_FN_TS_SDAT1, GPIO_FN_SCL1_C, GPIO_FN_HTX0_B, - GPIO_FN_VI1_G4, GPIO_FN_VI3_DATA4, GPIO_FN_SSI_WS2, GPIO_FN_SDA1_C, - GPIO_FN_SIM_RST_B, GPIO_FN_HRX0_B, GPIO_FN_VI1_G5, GPIO_FN_VI3_DATA5, - GPIO_FN_GPS_CLK, GPIO_FN_FSE, GPIO_FN_TX4_B, GPIO_FN_SIM_D_B, - GPIO_FN_VI1_G6, GPIO_FN_VI3_DATA6, GPIO_FN_GPS_SIGN, GPIO_FN_FRB, - GPIO_FN_RX4_B, GPIO_FN_SIM_CLK_B, GPIO_FN_VI1_G7, GPIO_FN_VI3_DATA7, - GPIO_FN_GPS_MAG, GPIO_FN_FCE, GPIO_FN_SCK4_B, -}; +#include <linux/sh_eth.h> struct platform_device; @@ -352,6 +32,7 @@ extern void r8a7779_earlytimer_init(void); extern void r8a7779_add_early_devices(void); extern void r8a7779_add_standard_devices(void); extern void r8a7779_add_standard_devices_dt(void); +extern void r8a7779_add_ether_device(struct sh_eth_plat_data *pdata); extern void r8a7779_clock_init(void); extern void r8a7779_pinmux_init(void); extern void r8a7779_pm_init(void); diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h index f0ea60d6648a..fd7cba024c39 100644 --- a/arch/arm/mach-shmobile/include/mach/sh7372.h +++ b/arch/arm/mach-shmobile/include/mach/sh7372.h @@ -294,21 +294,6 @@ enum { GPIO_FN_D12_NAF12, GPIO_FN_D13_NAF13, GPIO_FN_D14_NAF14, GPIO_FN_D15_NAF15, - /* - * MMCIF(1) (PORT 84, 85, 86, 87, 88, 89, - * 90, 91, 92, 99) - */ - GPIO_FN_MMCD0_0, GPIO_FN_MMCD0_1, GPIO_FN_MMCD0_2, - GPIO_FN_MMCD0_3, GPIO_FN_MMCD0_4, GPIO_FN_MMCD0_5, - GPIO_FN_MMCD0_6, GPIO_FN_MMCD0_7, - GPIO_FN_MMCCMD0, GPIO_FN_MMCCLK0, - - /* MMCIF(2) (PORT 54, 55, 56, 57, 58, 59, 60, 61, 66, 67) */ - GPIO_FN_MMCD1_0, GPIO_FN_MMCD1_1, GPIO_FN_MMCD1_2, - GPIO_FN_MMCD1_3, GPIO_FN_MMCD1_4, GPIO_FN_MMCD1_5, - GPIO_FN_MMCD1_6, GPIO_FN_MMCD1_7, - GPIO_FN_MMCCLK1, GPIO_FN_MMCCMD1, - /* SPU2 (PORT 65) */ GPIO_FN_VINT_I, @@ -416,20 +401,6 @@ enum { /* HDMI (PORT 169, 170) */ GPIO_FN_HDMI_HPD, GPIO_FN_HDMI_CEC, - /* SDHI0 (PORT 171, 172, 173, 174, 175, 176, 177, 178) */ - GPIO_FN_SDHICLK0, GPIO_FN_SDHICD0, - GPIO_FN_SDHICMD0, GPIO_FN_SDHIWP0, - GPIO_FN_SDHID0_0, GPIO_FN_SDHID0_1, - GPIO_FN_SDHID0_2, GPIO_FN_SDHID0_3, - - /* SDHI1 (PORT 179, 180, 181, 182, 183, 184) */ - GPIO_FN_SDHICLK1, GPIO_FN_SDHICMD1, GPIO_FN_SDHID1_0, - GPIO_FN_SDHID1_1, GPIO_FN_SDHID1_2, GPIO_FN_SDHID1_3, - - /* SDHI2 (PORT 185, 186, 187, 188, 189, 190) */ - GPIO_FN_SDHICLK2, GPIO_FN_SDHICMD2, GPIO_FN_SDHID2_0, - GPIO_FN_SDHID2_1, GPIO_FN_SDHID2_2, GPIO_FN_SDHID2_3, - /* SDENC see MSEL4CR 19 */ GPIO_FN_SDENC_CPG, GPIO_FN_SDENC_DV_CLKI, diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobile/include/mach/sh73a0.h index 936da1b4a9c5..eb7a4320d487 100644 --- a/arch/arm/mach-shmobile/include/mach/sh73a0.h +++ b/arch/arm/mach-shmobile/include/mach/sh73a0.h @@ -94,8 +94,7 @@ enum { GPIO_PORT305, GPIO_PORT306, GPIO_PORT307, GPIO_PORT308, GPIO_PORT309, /* Table 25-1 (Function 0-7) */ - GPIO_FN_VBUS_0, - GPIO_FN_GPI0, + GPIO_FN_GPI0 = 310, GPIO_FN_GPI1, GPIO_FN_GPI2, GPIO_FN_GPI3, @@ -103,15 +102,11 @@ enum { GPIO_FN_GPI5, GPIO_FN_GPI6, GPIO_FN_GPI7, - GPIO_FN_SCIFA7_RXD, - GPIO_FN_SCIFA7_CTS_, GPIO_FN_GPO7, GPIO_FN_MFG0_OUT2, GPIO_FN_GPO6, GPIO_FN_MFG1_OUT2, - GPIO_FN_GPO5, GPIO_FN_SCIFA0_SCK, GPIO_FN_FSICOSLDT3, \ + GPIO_FN_GPO5, GPIO_FN_PORT16_VIO_CKOR, - GPIO_FN_SCIFA0_TXD, - GPIO_FN_SCIFA7_TXD, - GPIO_FN_SCIFA7_RTS_, GPIO_FN_PORT19_VIO_CKO2, + GPIO_FN_PORT19_VIO_CKO2, GPIO_FN_GPO0, GPIO_FN_GPO1, GPIO_FN_GPO2, GPIO_FN_STATUS0, @@ -119,83 +114,44 @@ enum { GPIO_FN_GPO4, GPIO_FN_STATUS2, GPIO_FN_VINT, GPIO_FN_TCKON, - GPIO_FN_XDVFS1, GPIO_FN_PORT27_I2C_SCL2, GPIO_FN_PORT27_I2C_SCL3, \ + GPIO_FN_XDVFS1, GPIO_FN_MFG0_OUT1, GPIO_FN_PORT27_IROUT, - GPIO_FN_XDVFS2, GPIO_FN_PORT28_I2C_SDA2, GPIO_FN_PORT28_I2C_SDA3, \ + GPIO_FN_XDVFS2, GPIO_FN_PORT28_TPU1TO1, GPIO_FN_SIM_RST, GPIO_FN_PORT29_TPU1TO1, GPIO_FN_SIM_CLK, GPIO_FN_PORT30_VIO_CKOR, GPIO_FN_SIM_D, GPIO_FN_PORT31_IROUT, - GPIO_FN_SCIFA4_TXD, - GPIO_FN_SCIFA4_RXD, GPIO_FN_XWUP, - GPIO_FN_SCIFA4_RTS_, - GPIO_FN_SCIFA4_CTS_, - GPIO_FN_FSIBOBT, GPIO_FN_FSIBIBT, - GPIO_FN_FSIBOLR, GPIO_FN_FSIBILR, - GPIO_FN_FSIBOSLD, - GPIO_FN_FSIBISLD, + GPIO_FN_XWUP, GPIO_FN_VACK, GPIO_FN_XTAL1L, - GPIO_FN_SCIFA0_RTS_, GPIO_FN_FSICOSLDT2, - GPIO_FN_SCIFA0_RXD, - GPIO_FN_SCIFA0_CTS_, GPIO_FN_FSICOSLDT1, - GPIO_FN_FSICOBT, GPIO_FN_FSICIBT, GPIO_FN_FSIDOBT, GPIO_FN_FSIDIBT, - GPIO_FN_FSICOLR, GPIO_FN_FSICILR, GPIO_FN_FSIDOLR, GPIO_FN_FSIDILR, - GPIO_FN_FSICOSLD, GPIO_FN_PORT47_FSICSPDIF, - GPIO_FN_FSICISLD, GPIO_FN_FSIDISLD, - GPIO_FN_FSIACK, GPIO_FN_PORT49_IRDA_OUT, GPIO_FN_PORT49_IROUT, \ - GPIO_FN_FSIAOMC, - GPIO_FN_FSIAOLR, GPIO_FN_BBIF2_TSYNC2, GPIO_FN_TPU2TO2, GPIO_FN_FSIAILR, - - GPIO_FN_FSIAOBT, GPIO_FN_BBIF2_TSCK2, GPIO_FN_TPU2TO3, GPIO_FN_FSIAIBT, - GPIO_FN_FSIAOSLD, GPIO_FN_BBIF2_TXD2, - GPIO_FN_FSIASPDIF, GPIO_FN_PORT53_IRDA_IN, GPIO_FN_TPU3TO3, \ - GPIO_FN_FSIBSPDIF, GPIO_FN_PORT53_FSICSPDIF, - GPIO_FN_FSIBCK, GPIO_FN_PORT54_IRDA_FIRSEL, GPIO_FN_TPU3TO2, \ - GPIO_FN_FSIBOMC, GPIO_FN_FSICCK, GPIO_FN_FSICOMC, - GPIO_FN_FSIAISLD, GPIO_FN_TPU0TO0, + GPIO_FN_PORT49_IROUT, + GPIO_FN_BBIF2_TSYNC2, GPIO_FN_TPU2TO2, + + GPIO_FN_BBIF2_TSCK2, GPIO_FN_TPU2TO3, + GPIO_FN_BBIF2_TXD2, + GPIO_FN_TPU3TO3, + GPIO_FN_TPU3TO2, + GPIO_FN_TPU0TO0, GPIO_FN_A0, GPIO_FN_BS_, - GPIO_FN_A12, GPIO_FN_PORT58_KEYOUT7, GPIO_FN_TPU4TO2, - GPIO_FN_A13, GPIO_FN_PORT59_KEYOUT6, GPIO_FN_TPU0TO1, - GPIO_FN_A14, GPIO_FN_KEYOUT5, - GPIO_FN_A15, GPIO_FN_KEYOUT4, - GPIO_FN_A16, GPIO_FN_KEYOUT3, GPIO_FN_MSIOF0_SS1, - GPIO_FN_A17, GPIO_FN_KEYOUT2, GPIO_FN_MSIOF0_TSYNC, - GPIO_FN_A18, GPIO_FN_KEYOUT1, GPIO_FN_MSIOF0_TSCK, - GPIO_FN_A19, GPIO_FN_KEYOUT0, GPIO_FN_MSIOF0_TXD, - GPIO_FN_A20, GPIO_FN_KEYIN0, GPIO_FN_MSIOF0_RSCK, - GPIO_FN_A21, GPIO_FN_KEYIN1, GPIO_FN_MSIOF0_RSYNC, - GPIO_FN_A22, GPIO_FN_KEYIN2, GPIO_FN_MSIOF0_MCK0, - GPIO_FN_A23, GPIO_FN_KEYIN3, GPIO_FN_MSIOF0_MCK1, - GPIO_FN_A24, GPIO_FN_KEYIN4, GPIO_FN_MSIOF0_RXD, - GPIO_FN_A25, GPIO_FN_KEYIN5, GPIO_FN_MSIOF0_SS2, - GPIO_FN_A26, GPIO_FN_KEYIN6, - GPIO_FN_KEYIN7, - GPIO_FN_D0_NAF0, - GPIO_FN_D1_NAF1, - GPIO_FN_D2_NAF2, - GPIO_FN_D3_NAF3, - GPIO_FN_D4_NAF4, - GPIO_FN_D5_NAF5, - GPIO_FN_D6_NAF6, - GPIO_FN_D7_NAF7, - GPIO_FN_D8_NAF8, - GPIO_FN_D9_NAF9, - GPIO_FN_D10_NAF10, - GPIO_FN_D11_NAF11, - GPIO_FN_D12_NAF12, - GPIO_FN_D13_NAF13, - GPIO_FN_D14_NAF14, - GPIO_FN_D15_NAF15, - GPIO_FN_CS4_, - GPIO_FN_CS5A_, GPIO_FN_PORT91_RDWR, - GPIO_FN_CS5B_, GPIO_FN_FCE1_, - GPIO_FN_CS6B_, GPIO_FN_DACK0, - GPIO_FN_FCE0_, GPIO_FN_CS6A_, + GPIO_FN_A12, GPIO_FN_TPU4TO2, + GPIO_FN_A13, GPIO_FN_TPU0TO1, + GPIO_FN_A14, + GPIO_FN_A15, + GPIO_FN_A16, GPIO_FN_MSIOF0_SS1, + GPIO_FN_A17, GPIO_FN_MSIOF0_TSYNC, + GPIO_FN_A18, GPIO_FN_MSIOF0_TSCK, + GPIO_FN_A19, GPIO_FN_MSIOF0_TXD, + GPIO_FN_A20, GPIO_FN_MSIOF0_RSCK, + GPIO_FN_A21, GPIO_FN_MSIOF0_RSYNC, + GPIO_FN_A22, GPIO_FN_MSIOF0_MCK0, + GPIO_FN_A23, GPIO_FN_MSIOF0_MCK1, + GPIO_FN_A24, GPIO_FN_MSIOF0_RXD, + GPIO_FN_A25, GPIO_FN_MSIOF0_SS2, + GPIO_FN_A26, + GPIO_FN_FCE1_, + GPIO_FN_DACK0, + GPIO_FN_FCE0_, GPIO_FN_WAIT_, GPIO_FN_DREQ0, - GPIO_FN_RD__FSC, - GPIO_FN_WE0__FWE, GPIO_FN_RDWR_FWE, - GPIO_FN_WE1_, GPIO_FN_FRB, GPIO_FN_CKO, GPIO_FN_NBRSTOUT_, @@ -204,145 +160,118 @@ enum { GPIO_FN_BBIF2_RXD, GPIO_FN_BBIF2_SYNC, GPIO_FN_BBIF2_SCK, - GPIO_FN_SCIFA3_CTS_, GPIO_FN_MFG3_IN2, - GPIO_FN_SCIFA3_RXD, GPIO_FN_MFG3_IN1, - GPIO_FN_BBIF1_SS2, GPIO_FN_SCIFA3_RTS_, GPIO_FN_MFG3_OUT1, - GPIO_FN_SCIFA3_TXD, + GPIO_FN_MFG3_IN2, + GPIO_FN_MFG3_IN1, + GPIO_FN_BBIF1_SS2, GPIO_FN_MFG3_OUT1, GPIO_FN_HSI_RX_DATA, GPIO_FN_BBIF1_RXD, GPIO_FN_HSI_TX_WAKE, GPIO_FN_BBIF1_TSCK, GPIO_FN_HSI_TX_DATA, GPIO_FN_BBIF1_TSYNC, GPIO_FN_HSI_TX_READY, GPIO_FN_BBIF1_TXD, - GPIO_FN_HSI_RX_READY, GPIO_FN_BBIF1_RSCK, GPIO_FN_PORT115_I2C_SCL2, \ - GPIO_FN_PORT115_I2C_SCL3, - GPIO_FN_HSI_RX_WAKE, GPIO_FN_BBIF1_RSYNC, GPIO_FN_PORT116_I2C_SDA2, \ - GPIO_FN_PORT116_I2C_SDA3, + GPIO_FN_HSI_RX_READY, GPIO_FN_BBIF1_RSCK, + GPIO_FN_HSI_RX_WAKE, GPIO_FN_BBIF1_RSYNC, GPIO_FN_HSI_RX_FLAG, GPIO_FN_BBIF1_SS1, GPIO_FN_BBIF1_FLOW, GPIO_FN_HSI_TX_FLAG, - GPIO_FN_VIO_VD, GPIO_FN_PORT128_LCD2VSYN, GPIO_FN_VIO2_VD, \ - GPIO_FN_LCD2D0, - - GPIO_FN_VIO_HD, GPIO_FN_PORT129_LCD2HSYN, GPIO_FN_PORT129_LCD2CS_, \ - GPIO_FN_VIO2_HD, GPIO_FN_LCD2D1, - GPIO_FN_VIO_D0, GPIO_FN_PORT130_MSIOF2_RXD, GPIO_FN_LCD2D10, - GPIO_FN_VIO_D1, GPIO_FN_PORT131_KEYOUT6, GPIO_FN_PORT131_MSIOF2_SS1, \ - GPIO_FN_PORT131_KEYOUT11, GPIO_FN_LCD2D11, - GPIO_FN_VIO_D2, GPIO_FN_PORT132_KEYOUT7, GPIO_FN_PORT132_MSIOF2_SS2, \ - GPIO_FN_PORT132_KEYOUT10, GPIO_FN_LCD2D12, - GPIO_FN_VIO_D3, GPIO_FN_MSIOF2_TSYNC, GPIO_FN_LCD2D13, - GPIO_FN_VIO_D4, GPIO_FN_MSIOF2_TXD, GPIO_FN_LCD2D14, - GPIO_FN_VIO_D5, GPIO_FN_MSIOF2_TSCK, GPIO_FN_LCD2D15, - GPIO_FN_VIO_D6, GPIO_FN_PORT136_KEYOUT8, GPIO_FN_LCD2D16, - GPIO_FN_VIO_D7, GPIO_FN_PORT137_KEYOUT9, GPIO_FN_LCD2D17, - GPIO_FN_VIO_D8, GPIO_FN_PORT138_KEYOUT8, GPIO_FN_VIO2_D0, \ - GPIO_FN_LCD2D6, - GPIO_FN_VIO_D9, GPIO_FN_PORT139_KEYOUT9, GPIO_FN_VIO2_D1, \ - GPIO_FN_LCD2D7, - GPIO_FN_VIO_D10, GPIO_FN_TPU0TO2, GPIO_FN_VIO2_D2, GPIO_FN_LCD2D8, - GPIO_FN_VIO_D11, GPIO_FN_TPU0TO3, GPIO_FN_VIO2_D3, GPIO_FN_LCD2D9, - GPIO_FN_VIO_D12, GPIO_FN_PORT142_KEYOUT10, GPIO_FN_VIO2_D4, \ - GPIO_FN_LCD2D2, - GPIO_FN_VIO_D13, GPIO_FN_PORT143_KEYOUT11, GPIO_FN_PORT143_KEYOUT6, \ - GPIO_FN_VIO2_D5, GPIO_FN_LCD2D3, - GPIO_FN_VIO_D14, GPIO_FN_PORT144_KEYOUT7, GPIO_FN_VIO2_D6, \ - GPIO_FN_LCD2D4, - GPIO_FN_VIO_D15, GPIO_FN_TPU1TO3, GPIO_FN_PORT145_LCD2DISP, \ - GPIO_FN_PORT145_LCD2RS, GPIO_FN_VIO2_D7, GPIO_FN_LCD2D5, - GPIO_FN_VIO_CLK, GPIO_FN_LCD2DCK, GPIO_FN_PORT146_LCD2WR_, \ - GPIO_FN_VIO2_CLK, GPIO_FN_LCD2D18, - GPIO_FN_VIO_FIELD, GPIO_FN_LCD2RD_, GPIO_FN_VIO2_FIELD, GPIO_FN_LCD2D19, + GPIO_FN_VIO_VD, GPIO_FN_VIO2_VD, + + GPIO_FN_VIO_HD, + GPIO_FN_VIO2_HD, + GPIO_FN_VIO_D0, GPIO_FN_PORT130_MSIOF2_RXD, + GPIO_FN_VIO_D1, GPIO_FN_PORT131_MSIOF2_SS1, + GPIO_FN_VIO_D2, GPIO_FN_PORT132_MSIOF2_SS2, + GPIO_FN_VIO_D3, GPIO_FN_MSIOF2_TSYNC, + GPIO_FN_VIO_D4, GPIO_FN_MSIOF2_TXD, + GPIO_FN_VIO_D5, GPIO_FN_MSIOF2_TSCK, + GPIO_FN_VIO_D6, + GPIO_FN_VIO_D7, + GPIO_FN_VIO_D8, GPIO_FN_VIO2_D0, + GPIO_FN_VIO_D9, GPIO_FN_VIO2_D1, + GPIO_FN_VIO_D10, GPIO_FN_TPU0TO2, GPIO_FN_VIO2_D2, + GPIO_FN_VIO_D11, GPIO_FN_TPU0TO3, GPIO_FN_VIO2_D3, + GPIO_FN_VIO_D12, GPIO_FN_VIO2_D4, + GPIO_FN_VIO_D13, + GPIO_FN_VIO2_D5, + GPIO_FN_VIO_D14, GPIO_FN_VIO2_D6, + GPIO_FN_VIO_D15, GPIO_FN_TPU1TO3, + GPIO_FN_VIO2_D7, + GPIO_FN_VIO_CLK, + GPIO_FN_VIO2_CLK, + GPIO_FN_VIO_FIELD, GPIO_FN_VIO2_FIELD, GPIO_FN_VIO_CKO, - GPIO_FN_A27, GPIO_FN_PORT149_RDWR, GPIO_FN_MFG0_IN1, \ - GPIO_FN_PORT149_KEYOUT9, + GPIO_FN_A27, GPIO_FN_MFG0_IN1, GPIO_FN_MFG0_IN2, GPIO_FN_TS_SPSYNC3, GPIO_FN_MSIOF2_RSCK, GPIO_FN_TS_SDAT3, GPIO_FN_MSIOF2_RSYNC, GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT153_MSIOF2_SS1, - GPIO_FN_SCIFA2_TXD1, GPIO_FN_MSIOF2_MCK0, - GPIO_FN_SCIFA2_RXD1, GPIO_FN_MSIOF2_MCK1, - GPIO_FN_SCIFA2_RTS1_, GPIO_FN_PORT156_MSIOF2_SS2, - GPIO_FN_SCIFA2_CTS1_, GPIO_FN_PORT157_MSIOF2_RXD, - GPIO_FN_DINT_, GPIO_FN_SCIFA2_SCK1, GPIO_FN_TS_SCK3, - GPIO_FN_PORT159_SCIFB_SCK, GPIO_FN_PORT159_SCIFA5_SCK, GPIO_FN_NMI, - GPIO_FN_PORT160_SCIFB_TXD, GPIO_FN_PORT160_SCIFA5_TXD, - GPIO_FN_PORT161_SCIFB_CTS_, GPIO_FN_PORT161_SCIFA5_CTS_, - GPIO_FN_PORT162_SCIFB_RXD, GPIO_FN_PORT162_SCIFA5_RXD, - GPIO_FN_PORT163_SCIFB_RTS_, GPIO_FN_PORT163_SCIFA5_RTS_, \ + GPIO_FN_MSIOF2_MCK0, + GPIO_FN_MSIOF2_MCK1, + GPIO_FN_PORT156_MSIOF2_SS2, + GPIO_FN_PORT157_MSIOF2_RXD, + GPIO_FN_DINT_, GPIO_FN_TS_SCK3, + GPIO_FN_NMI, GPIO_FN_TPU3TO0, - GPIO_FN_LCDD0, - GPIO_FN_LCDD1, GPIO_FN_PORT193_SCIFA5_CTS_, GPIO_FN_BBIF2_TSYNC1, - GPIO_FN_LCDD2, GPIO_FN_PORT194_SCIFA5_RTS_, GPIO_FN_BBIF2_TSCK1, - GPIO_FN_LCDD3, GPIO_FN_PORT195_SCIFA5_RXD, GPIO_FN_BBIF2_TXD1, - GPIO_FN_LCDD4, GPIO_FN_PORT196_SCIFA5_TXD, - GPIO_FN_LCDD5, GPIO_FN_PORT197_SCIFA5_SCK, GPIO_FN_MFG2_OUT2, \ + GPIO_FN_BBIF2_TSYNC1, + GPIO_FN_BBIF2_TSCK1, + GPIO_FN_BBIF2_TXD1, + GPIO_FN_MFG2_OUT2, GPIO_FN_TPU2TO1, - GPIO_FN_LCDD6, - GPIO_FN_LCDD7, GPIO_FN_TPU4TO1, GPIO_FN_MFG4_OUT2, - GPIO_FN_LCDD8, GPIO_FN_D16, - GPIO_FN_LCDD9, GPIO_FN_D17, - GPIO_FN_LCDD10, GPIO_FN_D18, - GPIO_FN_LCDD11, GPIO_FN_D19, - GPIO_FN_LCDD12, GPIO_FN_D20, - GPIO_FN_LCDD13, GPIO_FN_D21, - GPIO_FN_LCDD14, GPIO_FN_D22, - GPIO_FN_LCDD15, GPIO_FN_PORT207_MSIOF0L_SS1, GPIO_FN_D23, - GPIO_FN_LCDD16, GPIO_FN_PORT208_MSIOF0L_SS2, GPIO_FN_D24, - GPIO_FN_LCDD17, GPIO_FN_D25, - GPIO_FN_LCDD18, GPIO_FN_DREQ2, GPIO_FN_PORT210_MSIOF0L_SS1, GPIO_FN_D26, - GPIO_FN_LCDD19, GPIO_FN_PORT211_MSIOF0L_SS2, GPIO_FN_D27, - GPIO_FN_LCDD20, GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0, GPIO_FN_D28, - GPIO_FN_LCDD21, GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1, GPIO_FN_D29, - GPIO_FN_LCDD22, GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_RSCK, GPIO_FN_D30, - GPIO_FN_LCDD23, GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_RSYNC, GPIO_FN_D31, - GPIO_FN_LCDDCK, GPIO_FN_LCDWR_, - GPIO_FN_LCDRD_, GPIO_FN_DACK2, GPIO_FN_PORT217_LCD2RS, \ - GPIO_FN_MSIOF0L_TSYNC, GPIO_FN_VIO2_FIELD3, GPIO_FN_PORT217_LCD2DISP, - GPIO_FN_LCDHSYN, GPIO_FN_LCDCS_, GPIO_FN_LCDCS2_, GPIO_FN_DACK3, \ + GPIO_FN_TPU4TO1, GPIO_FN_MFG4_OUT2, + GPIO_FN_D16, + GPIO_FN_D17, + GPIO_FN_D18, + GPIO_FN_D19, + GPIO_FN_D20, + GPIO_FN_D21, + GPIO_FN_D22, + GPIO_FN_PORT207_MSIOF0L_SS1, GPIO_FN_D23, + GPIO_FN_PORT208_MSIOF0L_SS2, GPIO_FN_D24, + GPIO_FN_D25, + GPIO_FN_DREQ2, GPIO_FN_PORT210_MSIOF0L_SS1, GPIO_FN_D26, + GPIO_FN_PORT211_MSIOF0L_SS2, GPIO_FN_D27, + GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0, GPIO_FN_D28, + GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1, GPIO_FN_D29, + GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_RSCK, GPIO_FN_D30, + GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_RSYNC, GPIO_FN_D31, + GPIO_FN_DACK2, + GPIO_FN_MSIOF0L_TSYNC, GPIO_FN_VIO2_FIELD3, + GPIO_FN_DACK3, GPIO_FN_PORT218_VIO_CKOR, - GPIO_FN_LCDDISP, GPIO_FN_LCDRS, GPIO_FN_PORT219_LCD2WR_, \ GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_TSCK, GPIO_FN_VIO2_CLK3, \ - GPIO_FN_LCD2DCK_2, - GPIO_FN_LCDVSYN, GPIO_FN_LCDVSYN2, - GPIO_FN_LCDLCLK, GPIO_FN_DREQ1, GPIO_FN_PORT221_LCD2CS_, \ + GPIO_FN_DREQ1, GPIO_FN_PWEN, GPIO_FN_MSIOF0L_RXD, GPIO_FN_VIO2_HD3, \ - GPIO_FN_PORT221_LCD2HSYN, - GPIO_FN_LCDDON, GPIO_FN_LCDDON2, GPIO_FN_DACK1, GPIO_FN_OVCN, \ - GPIO_FN_MSIOF0L_TXD, GPIO_FN_VIO2_VD3, GPIO_FN_PORT222_LCD2VSYN, - - GPIO_FN_SCIFA1_TXD, GPIO_FN_OVCN2, - GPIO_FN_EXTLP, GPIO_FN_SCIFA1_SCK, GPIO_FN_PORT226_VIO_CKO2, - GPIO_FN_SCIFA1_RTS_, GPIO_FN_IDIN, - GPIO_FN_SCIFA1_RXD, - GPIO_FN_SCIFA1_CTS_, GPIO_FN_MFG1_IN1, - GPIO_FN_MSIOF1_TXD, GPIO_FN_SCIFA2_TXD2, - GPIO_FN_MSIOF1_TSYNC, GPIO_FN_SCIFA2_CTS2_, - GPIO_FN_MSIOF1_TSCK, GPIO_FN_SCIFA2_SCK2, - GPIO_FN_MSIOF1_RXD, GPIO_FN_SCIFA2_RXD2, - GPIO_FN_MSIOF1_RSCK, GPIO_FN_SCIFA2_RTS2_, GPIO_FN_VIO2_CLK2, \ - GPIO_FN_LCD2D20, + GPIO_FN_DACK1, GPIO_FN_OVCN, + GPIO_FN_MSIOF0L_TXD, GPIO_FN_VIO2_VD3, + + GPIO_FN_OVCN2, + GPIO_FN_EXTLP, GPIO_FN_PORT226_VIO_CKO2, + GPIO_FN_IDIN, + GPIO_FN_MFG1_IN1, + GPIO_FN_MSIOF1_TXD, + GPIO_FN_MSIOF1_TSYNC, + GPIO_FN_MSIOF1_TSCK, + GPIO_FN_MSIOF1_RXD, + GPIO_FN_MSIOF1_RSCK, GPIO_FN_VIO2_CLK2, GPIO_FN_MSIOF1_RSYNC, GPIO_FN_MFG1_IN2, GPIO_FN_VIO2_VD2, \ - GPIO_FN_LCD2D21, - GPIO_FN_MSIOF1_MCK0, GPIO_FN_PORT236_I2C_SDA2, - GPIO_FN_MSIOF1_MCK1, GPIO_FN_PORT237_I2C_SCL2, - GPIO_FN_MSIOF1_SS1, GPIO_FN_VIO2_FIELD2, GPIO_FN_LCD2D22, - GPIO_FN_MSIOF1_SS2, GPIO_FN_VIO2_HD2, GPIO_FN_LCD2D23, - GPIO_FN_SCIFA6_TXD, - GPIO_FN_PORT241_IRDA_OUT, GPIO_FN_PORT241_IROUT, GPIO_FN_MFG4_OUT1, \ + GPIO_FN_MSIOF1_MCK0, + GPIO_FN_MSIOF1_MCK1, + GPIO_FN_MSIOF1_SS1, GPIO_FN_VIO2_FIELD2, + GPIO_FN_MSIOF1_SS2, GPIO_FN_VIO2_HD2, + GPIO_FN_PORT241_IROUT, GPIO_FN_MFG4_OUT1, \ GPIO_FN_TPU4TO0, - GPIO_FN_PORT242_IRDA_IN, GPIO_FN_MFG4_IN2, - GPIO_FN_PORT243_IRDA_FIRSEL, GPIO_FN_PORT243_VIO_CKO2, - GPIO_FN_PORT244_SCIFA5_CTS_, GPIO_FN_MFG2_IN1, \ - GPIO_FN_PORT244_SCIFB_CTS_, GPIO_FN_MSIOF2R_RXD, - GPIO_FN_PORT245_SCIFA5_RTS_, GPIO_FN_MFG2_IN2, \ - GPIO_FN_PORT245_SCIFB_RTS_, GPIO_FN_MSIOF2R_TXD, - GPIO_FN_PORT246_SCIFA5_RXD, GPIO_FN_MFG1_OUT1, \ - GPIO_FN_PORT246_SCIFB_RXD, GPIO_FN_TPU1TO0, - GPIO_FN_PORT247_SCIFA5_TXD, GPIO_FN_MFG3_OUT2, \ - GPIO_FN_PORT247_SCIFB_TXD, GPIO_FN_TPU3TO1, - GPIO_FN_PORT248_SCIFA5_SCK, GPIO_FN_MFG2_OUT1, \ - GPIO_FN_PORT248_SCIFB_SCK, GPIO_FN_TPU2TO0, \ - GPIO_FN_PORT248_I2C_SCL3, GPIO_FN_MSIOF2R_TSCK, + GPIO_FN_MFG4_IN2, + GPIO_FN_PORT243_VIO_CKO2, + GPIO_FN_MFG2_IN1, + GPIO_FN_MSIOF2R_RXD, + GPIO_FN_MFG2_IN2, + GPIO_FN_MSIOF2R_TXD, + GPIO_FN_MFG1_OUT1, + GPIO_FN_TPU1TO0, + GPIO_FN_MFG3_OUT2, + GPIO_FN_TPU3TO1, + GPIO_FN_MFG2_OUT1, + GPIO_FN_TPU2TO0, + GPIO_FN_MSIOF2R_TSCK, GPIO_FN_PORT249_IROUT, GPIO_FN_MFG4_IN1, \ - GPIO_FN_PORT249_I2C_SDA3, GPIO_FN_MSIOF2R_TSYNC, + GPIO_FN_MSIOF2R_TSYNC, GPIO_FN_SDHICLK0, GPIO_FN_SDHICD0, GPIO_FN_SDHID0_0, @@ -435,54 +364,12 @@ enum { GPIO_FN_IRQ9_MEM_INT, GPIO_FN_IRQ9_MCP_INT, GPIO_FN_A11, - GPIO_FN_KEYOUT8, GPIO_FN_TPU4TO3, GPIO_FN_RESETA_N_PU_ON, GPIO_FN_RESETA_N_PU_OFF, GPIO_FN_EDBGREQ_PD, GPIO_FN_EDBGREQ_PU, - /* Functions with pull-ups */ - GPIO_FN_KEYIN0_PU, - GPIO_FN_KEYIN1_PU, - GPIO_FN_KEYIN2_PU, - GPIO_FN_KEYIN3_PU, - GPIO_FN_KEYIN4_PU, - GPIO_FN_KEYIN5_PU, - GPIO_FN_KEYIN6_PU, - GPIO_FN_KEYIN7_PU, - GPIO_FN_SDHICD0_PU, - GPIO_FN_SDHID0_0_PU, - GPIO_FN_SDHID0_1_PU, - GPIO_FN_SDHID0_2_PU, - GPIO_FN_SDHID0_3_PU, - GPIO_FN_SDHICMD0_PU, - GPIO_FN_SDHIWP0_PU, - GPIO_FN_SDHID1_0_PU, - GPIO_FN_SDHID1_1_PU, - GPIO_FN_SDHID1_2_PU, - GPIO_FN_SDHID1_3_PU, - GPIO_FN_SDHICMD1_PU, - GPIO_FN_SDHID2_0_PU, - GPIO_FN_SDHID2_1_PU, - GPIO_FN_SDHID2_2_PU, - GPIO_FN_SDHID2_3_PU, - GPIO_FN_SDHICMD2_PU, - GPIO_FN_MMCCMD0_PU, - GPIO_FN_MMCCMD1_PU, - GPIO_FN_MMCD0_0_PU, - GPIO_FN_MMCD0_1_PU, - GPIO_FN_MMCD0_2_PU, - GPIO_FN_MMCD0_3_PU, - GPIO_FN_MMCD0_4_PU, - GPIO_FN_MMCD0_5_PU, - GPIO_FN_MMCD0_6_PU, - GPIO_FN_MMCD0_7_PU, - GPIO_FN_FSIACK_PU, - GPIO_FN_FSIAILR_PU, - GPIO_FN_FSIAIBT_PU, - GPIO_FN_FSIAISLD_PU, - /* end of GPIO */ GPIO_NR, }; diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c index 01c62bedf9cf..30b4a336308f 100644 --- a/arch/arm/mach-shmobile/setup-r8a7778.c +++ b/arch/arm/mach-shmobile/setup-r8a7778.c @@ -3,6 +3,7 @@ * * Copyright (C) 2013 Renesas Solutions Corp. * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> + * Copyright (C) 2013 Cogent Embedded, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -23,6 +24,7 @@ #include <linux/irqchip/arm-gic.h> #include <linux/of.h> #include <linux/of_platform.h> +#include <linux/platform_data/irq-renesas-intc-irqpin.h> #include <linux/platform_device.h> #include <linux/irqchip.h> #include <linux/serial_sci.h> @@ -78,22 +80,20 @@ static struct sh_timer_config sh_tmu1_platform_data = { .clocksource_rating = 200, }; -#define PLATFORM_INFO(n, i) \ -{ \ - .parent = &platform_bus, \ - .name = #n, \ - .id = i, \ - .res = n ## i ## _resources, \ - .num_res = ARRAY_SIZE(n ## i ##_resources), \ - .data = &n ## i ##_platform_data, \ - .size_data = sizeof(n ## i ## _platform_data), \ -} - -struct platform_device_info platform_devinfo[] = { - PLATFORM_INFO(sh_tmu, 0), - PLATFORM_INFO(sh_tmu, 1), +/* Ether */ +static struct resource ether_resources[] = { + DEFINE_RES_MEM(0xfde00000, 0x400), + DEFINE_RES_IRQ(gic_iid(0x89)), }; +#define r8a7778_register_tmu(idx) \ + platform_device_register_resndata( \ + &platform_bus, "sh_tmu", idx, \ + sh_tmu##idx##_resources, \ + ARRAY_SIZE(sh_tmu##idx##_resources), \ + &sh_tmu##idx##_platform_data, \ + sizeof(sh_tmu##idx##_platform_data)) + void __init r8a7778_add_standard_devices(void) { int i; @@ -114,8 +114,59 @@ void __init r8a7778_add_standard_devices(void) &scif_platform_data[i], sizeof(struct plat_sci_port)); - for (i = 0; i < ARRAY_SIZE(platform_devinfo); i++) - platform_device_register_full(&platform_devinfo[i]); + r8a7778_register_tmu(0); + r8a7778_register_tmu(1); +} + +void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata) +{ + platform_device_register_resndata(&platform_bus, "sh_eth", -1, + ether_resources, + ARRAY_SIZE(ether_resources), + pdata, sizeof(*pdata)); +} + +static struct renesas_intc_irqpin_config irqpin_platform_data = { + .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */ + .sense_bitfield_width = 2, +}; + +static struct resource irqpin_resources[] = { + DEFINE_RES_MEM(0xfe78001c, 4), /* ICR1 */ + DEFINE_RES_MEM(0xfe780010, 4), /* INTPRI */ + DEFINE_RES_MEM(0xfe780024, 4), /* INTREQ */ + DEFINE_RES_MEM(0xfe780044, 4), /* INTMSK0 */ + DEFINE_RES_MEM(0xfe780064, 4), /* INTMSKCLR0 */ + DEFINE_RES_IRQ(gic_iid(0x3b)), /* IRQ0 */ + DEFINE_RES_IRQ(gic_iid(0x3c)), /* IRQ1 */ + DEFINE_RES_IRQ(gic_iid(0x3d)), /* IRQ2 */ + DEFINE_RES_IRQ(gic_iid(0x3e)), /* IRQ3 */ +}; + +void __init r8a7778_init_irq_extpin(int irlm) +{ + void __iomem *icr0 = ioremap_nocache(0xfe780000, PAGE_SIZE); + unsigned long tmp; + + if (!icr0) { + pr_warn("r8a7778: unable to setup external irq pin mode\n"); + return; + } + + tmp = ioread32(icr0); + if (irlm) + tmp |= 1 << 23; /* IRQ0 -> IRQ3 as individual pins */ + else + tmp &= ~(1 << 23); /* IRL mode - not supported */ + tmp |= (1 << 21); /* LVLMODE = 1 */ + iowrite32(tmp, icr0); + iounmap(icr0); + + if (irlm) + platform_device_register_resndata( + &platform_bus, "renesas_intc_irqpin", -1, + irqpin_resources, ARRAY_SIZE(irqpin_resources), + &irqpin_platform_data, sizeof(irqpin_platform_data)); } #define INT2SMSKCR0 0x82288 /* 0xfe782288 */ diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index 042df35e71a0..b0b394842ea5 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -1,8 +1,9 @@ /* * r8a7779 processor support * - * Copyright (C) 2011 Renesas Solutions Corp. + * Copyright (C) 2011, 2013 Renesas Solutions Corp. * Copyright (C) 2011 Magnus Damm + * Copyright (C) 2013 Cogent Embedded, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -22,6 +23,7 @@ #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/of_platform.h> +#include <linux/platform_data/gpio-rcar.h> #include <linux/platform_device.h> #include <linux/delay.h> #include <linux/input.h> @@ -68,11 +70,6 @@ static struct resource r8a7779_pfc_resources[] = { .end = 0xfffc023b, .flags = IORESOURCE_MEM, }, - [1] = { - .start = 0xffc40000, - .end = 0xffc46fff, - .flags = IORESOURCE_MEM, - } }; static struct platform_device r8a7779_pfc_device = { @@ -82,9 +79,59 @@ static struct platform_device r8a7779_pfc_device = { .num_resources = ARRAY_SIZE(r8a7779_pfc_resources), }; +#define R8A7779_GPIO(idx, npins) \ +static struct resource r8a7779_gpio##idx##_resources[] = { \ + [0] = { \ + .start = 0xffc40000 + 0x1000 * (idx), \ + .end = 0xffc4002b + 0x1000 * (idx), \ + .flags = IORESOURCE_MEM, \ + }, \ + [1] = { \ + .start = gic_iid(0xad + (idx)), \ + .flags = IORESOURCE_IRQ, \ + } \ +}; \ + \ +static struct gpio_rcar_config r8a7779_gpio##idx##_platform_data = { \ + .gpio_base = 32 * (idx), \ + .irq_base = 0, \ + .number_of_pins = npins, \ + .pctl_name = "pfc-r8a7779", \ +}; \ + \ +static struct platform_device r8a7779_gpio##idx##_device = { \ + .name = "gpio_rcar", \ + .id = idx, \ + .resource = r8a7779_gpio##idx##_resources, \ + .num_resources = ARRAY_SIZE(r8a7779_gpio##idx##_resources), \ + .dev = { \ + .platform_data = &r8a7779_gpio##idx##_platform_data, \ + }, \ +} + +R8A7779_GPIO(0, 32); +R8A7779_GPIO(1, 32); +R8A7779_GPIO(2, 32); +R8A7779_GPIO(3, 32); +R8A7779_GPIO(4, 32); +R8A7779_GPIO(5, 32); +R8A7779_GPIO(6, 9); + +static struct platform_device *r8a7779_pinctrl_devices[] __initdata = { + &r8a7779_pfc_device, + &r8a7779_gpio0_device, + &r8a7779_gpio1_device, + &r8a7779_gpio2_device, + &r8a7779_gpio3_device, + &r8a7779_gpio4_device, + &r8a7779_gpio5_device, + &r8a7779_gpio6_device, +}; + void __init r8a7779_pinmux_init(void) { - platform_device_register(&r8a7779_pfc_device); + platform_add_devices(r8a7779_pinctrl_devices, + ARRAY_SIZE(r8a7779_pinctrl_devices)); } static struct plat_sci_port scif0_platform_data = { @@ -347,6 +394,18 @@ static struct platform_device sata_device = { }, }; +/* Ether */ +static struct resource ether_resources[] = { + { + .start = 0xfde00000, + .end = 0xfde003ff, + .flags = IORESOURCE_MEM, + }, { + .start = gic_iid(0xb4), + .flags = IORESOURCE_IRQ, + }, +}; + static struct platform_device *r8a7779_devices_dt[] __initdata = { &scif0_device, &scif1_device, @@ -382,6 +441,14 @@ void __init r8a7779_add_standard_devices(void) ARRAY_SIZE(r8a7779_late_devices)); } +void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata) +{ + platform_device_register_resndata(&platform_bus, "sh_eth", -1, + ether_resources, + ARRAY_SIZE(ether_resources), + pdata, sizeof(*pdata)); +} + /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ void __init __weak r8a7779_register_twd(void) { } diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c index 8225c16b371b..e38691b4d0dd 100644 --- a/arch/arm/mach-shmobile/smp-emev2.c +++ b/arch/arm/mach-shmobile/smp-emev2.c @@ -23,7 +23,6 @@ #include <linux/spinlock.h> #include <linux/io.h> #include <linux/delay.h> -#include <linux/irqchip/arm-gic.h> #include <mach/common.h> #include <mach/emev2.h> #include <asm/smp_plat.h> @@ -31,11 +30,6 @@ #define EMEV2_SCU_BASE 0x1e000000 -static void __cpuinit emev2_secondary_init(unsigned int cpu) -{ - gic_secondary_init(0); -} - static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *idle) { arch_send_wakeup_ipi_mask(cpumask_of(cpu_logical_map(cpu))); @@ -69,6 +63,5 @@ static void __init emev2_smp_init_cpus(void) struct smp_operations emev2_smp_ops __initdata = { .smp_init_cpus = emev2_smp_init_cpus, .smp_prepare_cpus = emev2_smp_prepare_cpus, - .smp_secondary_init = emev2_secondary_init, .smp_boot_secondary = emev2_boot_secondary, }; diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index ea4535a5c4e2..a853bf182ed5 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c @@ -23,7 +23,6 @@ #include <linux/spinlock.h> #include <linux/io.h> #include <linux/delay.h> -#include <linux/irqchip/arm-gic.h> #include <mach/common.h> #include <mach/r8a7779.h> #include <asm/cacheflush.h> @@ -82,11 +81,6 @@ static int r8a7779_platform_cpu_kill(unsigned int cpu) return ret ? ret : 1; } -static void __cpuinit r8a7779_secondary_init(unsigned int cpu) -{ - gic_secondary_init(0); -} - static int __cpuinit r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle) { struct r8a7779_pm_ch *ch = NULL; @@ -181,7 +175,6 @@ static int r8a7779_cpu_disable(unsigned int cpu) struct smp_operations r8a7779_smp_ops __initdata = { .smp_init_cpus = r8a7779_smp_init_cpus, .smp_prepare_cpus = r8a7779_smp_prepare_cpus, - .smp_secondary_init = r8a7779_secondary_init, .smp_boot_secondary = r8a7779_boot_secondary, #ifdef CONFIG_HOTPLUG_CPU .cpu_kill = r8a7779_cpu_kill, diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c index 5ae502b16437..bf79626ee5a4 100644 --- a/arch/arm/mach-shmobile/smp-sh73a0.c +++ b/arch/arm/mach-shmobile/smp-sh73a0.c @@ -23,7 +23,6 @@ #include <linux/spinlock.h> #include <linux/io.h> #include <linux/delay.h> -#include <linux/irqchip/arm-gic.h> #include <mach/common.h> #include <asm/cacheflush.h> #include <asm/smp_plat.h> @@ -49,11 +48,6 @@ void __init sh73a0_register_twd(void) } #endif -static void __cpuinit sh73a0_secondary_init(unsigned int cpu) -{ - gic_secondary_init(0); -} - static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle) { cpu = cpu_logical_map(cpu); @@ -134,7 +128,6 @@ static int sh73a0_cpu_disable(unsigned int cpu) struct smp_operations sh73a0_smp_ops __initdata = { .smp_init_cpus = sh73a0_smp_init_cpus, .smp_prepare_cpus = sh73a0_smp_prepare_cpus, - .smp_secondary_init = sh73a0_secondary_init, .smp_boot_secondary = sh73a0_boot_secondary, #ifdef CONFIG_HOTPLUG_CPU .cpu_kill = sh73a0_cpu_kill, diff --git a/arch/arm/mach-socfpga/platsmp.c b/arch/arm/mach-socfpga/platsmp.c index 84c60fa8daa0..ca14d1d5ac7f 100644 --- a/arch/arm/mach-socfpga/platsmp.c +++ b/arch/arm/mach-socfpga/platsmp.c @@ -22,7 +22,6 @@ #include <linux/io.h> #include <linux/of.h> #include <linux/of_address.h> -#include <linux/irqchip/arm-gic.h> #include <asm/cacheflush.h> #include <asm/smp_scu.h> @@ -33,16 +32,6 @@ extern void __iomem *sys_manager_base_addr; extern void __iomem *rst_manager_base_addr; -static void __cpuinit socfpga_secondary_init(unsigned int cpu) -{ - /* - * if any interrupts are already enabled for the primary - * core (e.g. timer irq), then they will not have been enabled - * for us: do so - */ - gic_secondary_init(0); -} - static int __cpuinit socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle) { int trampoline_size = &secondary_trampoline_end - &secondary_trampoline; @@ -109,7 +98,6 @@ static void socfpga_cpu_die(unsigned int cpu) struct smp_operations socfpga_smp_ops __initdata = { .smp_init_cpus = socfpga_smp_init_cpus, .smp_prepare_cpus = socfpga_smp_prepare_cpus, - .smp_secondary_init = socfpga_secondary_init, .smp_boot_secondary = socfpga_boot_secondary, #ifdef CONFIG_HOTPLUG_CPU .cpu_die = socfpga_cpu_die, diff --git a/arch/arm/mach-spear13xx/platsmp.c b/arch/arm/mach-spear13xx/platsmp.c index af4ade61cd95..551c69c9a228 100644 --- a/arch/arm/mach-spear13xx/platsmp.c +++ b/arch/arm/mach-spear13xx/platsmp.c @@ -15,7 +15,6 @@ #include <linux/jiffies.h> #include <linux/io.h> #include <linux/smp.h> -#include <linux/irqchip/arm-gic.h> #include <asm/cacheflush.h> #include <asm/smp_scu.h> #include <mach/spear.h> @@ -28,13 +27,6 @@ static void __iomem *scu_base = IOMEM(VA_SCU_BASE); static void __cpuinit spear13xx_secondary_init(unsigned int cpu) { /* - * if any interrupts are already enabled for the primary - * core (e.g. timer irq), then they will not have been enabled - * for us: do so - */ - gic_secondary_init(0); - - /* * let the primary processor know we're out of the * pen, then head off into the C entry point */ diff --git a/arch/arm/mach-spear13xx/spear13xx.c b/arch/arm/mach-spear13xx/spear13xx.c index c7d2b4a8d8cc..25a10191b021 100644 --- a/arch/arm/mach-spear13xx/spear13xx.c +++ b/arch/arm/mach-spear13xx/spear13xx.c @@ -15,12 +15,12 @@ #include <linux/amba/pl022.h> #include <linux/clk.h> +#include <linux/clocksource.h> #include <linux/dw_dmac.h> #include <linux/err.h> #include <linux/of.h> #include <asm/hardware/cache-l2x0.h> #include <asm/mach/map.h> -#include <asm/smp_twd.h> #include <mach/dma.h> #include <mach/generic.h> #include <mach/spear.h> @@ -179,5 +179,5 @@ void __init spear13xx_timer_init(void) clk_put(pclk); spear_setup_of_timer(); - twd_local_timer_of_register(); + clocksource_of_init(); } diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c index f9d754f90c59..d2b3937c4014 100644 --- a/arch/arm/mach-spear3xx/spear3xx.c +++ b/arch/arm/mach-spear3xx/spear3xx.c @@ -14,7 +14,7 @@ #define pr_fmt(fmt) "SPEAr3xx: " fmt #include <linux/amba/pl022.h> -#include <linux/amba/pl08x.h> +#include <linux/amba/pl080.h> #include <linux/io.h> #include <plat/pl080.h> #include <mach/generic.h> diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c index 2c6b3d55213b..9348d3c496a9 100644 --- a/arch/arm/mach-tegra/platsmp.c +++ b/arch/arm/mach-tegra/platsmp.c @@ -18,7 +18,6 @@ #include <linux/jiffies.h> #include <linux/smp.h> #include <linux/io.h> -#include <linux/irqchip/arm-gic.h> #include <linux/clk/tegra.h> #include <asm/cacheflush.h> @@ -44,13 +43,6 @@ static cpumask_t tegra_cpu_init_mask; static void __cpuinit tegra_secondary_init(unsigned int cpu) { - /* - * if any interrupts are already enabled for the primary - * core (e.g. timer irq), then they will not have been enabled - * for us: do so - */ - gic_secondary_init(0); - cpumask_set_cpu(cpu, &tegra_cpu_init_mask); } diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c index 18f7af339dc9..152b1309b9af 100644 --- a/arch/arm/mach-ux500/platsmp.c +++ b/arch/arm/mach-ux500/platsmp.c @@ -16,7 +16,6 @@ #include <linux/device.h> #include <linux/smp.h> #include <linux/io.h> -#include <linux/irqchip/arm-gic.h> #include <asm/cacheflush.h> #include <asm/smp_plat.h> @@ -58,13 +57,6 @@ static DEFINE_SPINLOCK(boot_lock); static void __cpuinit ux500_secondary_init(unsigned int cpu) { /* - * if any interrupts are already enabled for the primary - * core (e.g. timer irq), then they will not have been enabled - * for us: do so - */ - gic_secondary_init(0); - - /* * let the primary processor know we're out of the * pen, then head off into the C entry point */ diff --git a/arch/arm/mach-ux500/timer.c b/arch/arm/mach-ux500/timer.c index a6af0b8732ba..d07bbe7f04a6 100644 --- a/arch/arm/mach-ux500/timer.c +++ b/arch/arm/mach-ux500/timer.c @@ -7,6 +7,7 @@ #include <linux/io.h> #include <linux/errno.h> #include <linux/clksrc-dbx500-prcmu.h> +#include <linux/clocksource.h> #include <linux/of.h> #include <linux/of_address.h> #include <linux/platform_data/clocksource-nomadik-mtu.h> @@ -32,7 +33,7 @@ static void __init ux500_twd_init(void) twd_local_timer = &u8500_twd_local_timer; if (of_have_populated_dt()) - twd_local_timer_of_register(); + clocksource_of_init(); else { err = twd_local_timer_register(twd_local_timer); if (err) diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c index 915683cb67d6..d0ad78998cb6 100644 --- a/arch/arm/mach-vexpress/v2m.c +++ b/arch/arm/mach-vexpress/v2m.c @@ -5,6 +5,7 @@ #include <linux/amba/bus.h> #include <linux/amba/mmci.h> #include <linux/io.h> +#include <linux/clocksource.h> #include <linux/smp.h> #include <linux/init.h> #include <linux/irqchip.h> @@ -25,7 +26,6 @@ #include <asm/arch_timer.h> #include <asm/mach-types.h> #include <asm/sizes.h> -#include <asm/smp_twd.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/time.h> @@ -435,6 +435,7 @@ static void __init v2m_dt_timer_init(void) vexpress_clk_of_init(); + clocksource_of_init(); do { node = of_find_compatible_node(node, NULL, "arm,sp804"); } while (node && vexpress_get_site_by_node(node) != VEXPRESS_SITE_MB); @@ -445,8 +446,7 @@ static void __init v2m_dt_timer_init(void) irq_of_parse_and_map(node, 0)); } - if (arch_timer_of_register() != 0) - twd_local_timer_of_register(); + arch_timer_of_register(); if (arch_timer_sched_clock_init() != 0) versatile_sched_clock_init(vexpress_get_24mhz_clock_base(), diff --git a/arch/arm/mach-virt/platsmp.c b/arch/arm/mach-virt/platsmp.c index 8badaabe70a1..f4143f5bfa5b 100644 --- a/arch/arm/mach-virt/platsmp.c +++ b/arch/arm/mach-virt/platsmp.c @@ -21,8 +21,6 @@ #include <linux/smp.h> #include <linux/of.h> -#include <linux/irqchip/arm-gic.h> - #include <asm/psci.h> #include <asm/smp_plat.h> @@ -45,14 +43,8 @@ static int __cpuinit virt_boot_secondary(unsigned int cpu, return -ENODEV; } -static void __cpuinit virt_secondary_init(unsigned int cpu) -{ - gic_secondary_init(0); -} - struct smp_operations __initdata virt_smp_ops = { .smp_init_cpus = virt_smp_init_cpus, .smp_prepare_cpus = virt_smp_prepare_cpus, - .smp_secondary_init = virt_secondary_init, .smp_boot_secondary = virt_boot_secondary, }; diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig index adb6c0ea0e53..f4a7e630bde0 100644 --- a/arch/arm/mach-zynq/Kconfig +++ b/arch/arm/mach-zynq/Kconfig @@ -8,6 +8,8 @@ config ARCH_ZYNQ select ICST select MIGHT_HAVE_CACHE_L2X0 select USE_OF + select HAVE_SMP select SPARSE_IRQ + select CADENCE_TTC_TIMER help Support for Xilinx Zynq ARM Cortex A9 Platform diff --git a/arch/arm/mach-zynq/Makefile b/arch/arm/mach-zynq/Makefile index 397268c1b250..1b25d92ebf22 100644 --- a/arch/arm/mach-zynq/Makefile +++ b/arch/arm/mach-zynq/Makefile @@ -3,4 +3,8 @@ # # Common support -obj-y := common.o timer.o +obj-y := common.o slcr.o +CFLAGS_REMOVE_hotplug.o =-march=armv6k +CFLAGS_hotplug.o =-Wa,-march=armv7-a -mcpu=cortex-a9 +obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o +obj-$(CONFIG_SMP) += headsmp.o platsmp.o diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index 5c8983218183..5bfe7035b73d 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c @@ -20,6 +20,7 @@ #include <linux/platform_device.h> #include <linux/clk.h> #include <linux/clk/zynq.h> +#include <linux/clocksource.h> #include <linux/of_address.h> #include <linux/of_irq.h> #include <linux/of_platform.h> @@ -32,20 +33,23 @@ #include <asm/mach-types.h> #include <asm/page.h> #include <asm/pgtable.h> +#include <asm/smp_scu.h> #include <asm/hardware/cache-l2x0.h> #include "common.h" +void __iomem *zynq_scu_base; + static struct of_device_id zynq_of_bus_ids[] __initdata = { { .compatible = "simple-bus", }, {} }; /** - * xilinx_init_machine() - System specific initialization, intended to be - * called from board specific initialization. + * zynq_init_machine - System specific initialization, intended to be + * called from board specific initialization. */ -static void __init xilinx_init_machine(void) +static void __init zynq_init_machine(void) { /* * 64KB way size, 8-way associativity, parity disabled @@ -55,50 +59,56 @@ static void __init xilinx_init_machine(void) of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL); } -#define SCU_PERIPH_PHYS 0xF8F00000 -#define SCU_PERIPH_SIZE SZ_8K -#define SCU_PERIPH_VIRT (VMALLOC_END - SCU_PERIPH_SIZE) +static void __init zynq_timer_init(void) +{ + zynq_slcr_init(); + clocksource_of_init(); +} -static struct map_desc scu_desc __initdata = { - .virtual = SCU_PERIPH_VIRT, - .pfn = __phys_to_pfn(SCU_PERIPH_PHYS), - .length = SCU_PERIPH_SIZE, - .type = MT_DEVICE, +static struct map_desc zynq_cortex_a9_scu_map __initdata = { + .length = SZ_256, + .type = MT_DEVICE, }; -static void __init xilinx_zynq_timer_init(void) +static void __init zynq_scu_map_io(void) { - struct device_node *np; - void __iomem *slcr; - - np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr"); - slcr = of_iomap(np, 0); - WARN_ON(!slcr); + unsigned long base; - xilinx_zynq_clocks_init(slcr); - - xttcps_timer_init(); + base = scu_a9_get_base(); + zynq_cortex_a9_scu_map.pfn = __phys_to_pfn(base); + /* Expected address is in vmalloc area that's why simple assign here */ + zynq_cortex_a9_scu_map.virtual = base; + iotable_init(&zynq_cortex_a9_scu_map, 1); + zynq_scu_base = (void __iomem *)base; + BUG_ON(!zynq_scu_base); } /** - * xilinx_map_io() - Create memory mappings needed for early I/O. + * zynq_map_io - Create memory mappings needed for early I/O. */ -static void __init xilinx_map_io(void) +static void __init zynq_map_io(void) { debug_ll_io_init(); - iotable_init(&scu_desc, 1); + zynq_scu_map_io(); +} + +static void zynq_system_reset(char mode, const char *cmd) +{ + zynq_slcr_system_reset(); } -static const char *xilinx_dt_match[] = { +static const char * const zynq_dt_match[] = { "xlnx,zynq-zc702", "xlnx,zynq-7000", NULL }; MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform") - .map_io = xilinx_map_io, + .smp = smp_ops(zynq_smp_ops), + .map_io = zynq_map_io, .init_irq = irqchip_init, - .init_machine = xilinx_init_machine, - .init_time = xilinx_zynq_timer_init, - .dt_compat = xilinx_dt_match, + .init_machine = zynq_init_machine, + .init_time = zynq_timer_init, + .dt_compat = zynq_dt_match, + .restart = zynq_system_reset, MACHINE_END diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h index 8b4dbbaa01cf..fbbd0e21c404 100644 --- a/arch/arm/mach-zynq/common.h +++ b/arch/arm/mach-zynq/common.h @@ -17,6 +17,24 @@ #ifndef __MACH_ZYNQ_COMMON_H__ #define __MACH_ZYNQ_COMMON_H__ -void __init xttcps_timer_init(void); +extern int zynq_slcr_init(void); +extern void zynq_slcr_system_reset(void); +extern void zynq_slcr_cpu_stop(int cpu); +extern void zynq_slcr_cpu_start(int cpu); + +#ifdef CONFIG_SMP +extern void secondary_startup(void); +extern char zynq_secondary_trampoline; +extern char zynq_secondary_trampoline_jump; +extern char zynq_secondary_trampoline_end; +extern int __cpuinit zynq_cpun_start(u32 address, int cpu); +extern struct smp_operations zynq_smp_ops __initdata; +#endif + +extern void __iomem *zynq_slcr_base; +extern void __iomem *zynq_scu_base; + +/* Hotplug */ +extern void zynq_platform_cpu_die(unsigned int cpu); #endif diff --git a/arch/arm/mach-zynq/headsmp.S b/arch/arm/mach-zynq/headsmp.S new file mode 100644 index 000000000000..d183cd234a9b --- /dev/null +++ b/arch/arm/mach-zynq/headsmp.S @@ -0,0 +1,24 @@ +/* + * Copyright (c) 2013 Steffen Trumtrar <s.trumtrar@pengutronix.de> + * Copyright (c) 2012-2013 Xilinx + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/linkage.h> +#include <linux/init.h> + + __CPUINIT + +ENTRY(zynq_secondary_trampoline) + ldr r0, [pc] + bx r0 +.globl zynq_secondary_trampoline_jump +zynq_secondary_trampoline_jump: + /* Space for jumping address */ + .word /* cpu 1 */ +.globl zynq_secondary_trampoline_end +zynq_secondary_trampoline_end: + +ENDPROC(zynq_secondary_trampoline) diff --git a/arch/arm/mach-zynq/hotplug.c b/arch/arm/mach-zynq/hotplug.c new file mode 100644 index 000000000000..c89672bd1de2 --- /dev/null +++ b/arch/arm/mach-zynq/hotplug.c @@ -0,0 +1,104 @@ +/* + * Copyright (C) 2012-2013 Xilinx + * + * based on linux/arch/arm/mach-realview/hotplug.c + * + * Copyright (C) 2002 ARM Ltd. + * All Rights Reserved + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/smp.h> + +#include <asm/cacheflush.h> +#include <asm/cp15.h> +#include "common.h" + +static inline void zynq_cpu_enter_lowpower(void) +{ + unsigned int v; + + flush_cache_all(); + asm volatile( + " mcr p15, 0, %1, c7, c5, 0\n" + " dsb\n" + /* + * Turn off coherency + */ + " mrc p15, 0, %0, c1, c0, 1\n" + " bic %0, %0, #0x40\n" + " mcr p15, 0, %0, c1, c0, 1\n" + " mrc p15, 0, %0, c1, c0, 0\n" + " bic %0, %0, %2\n" + " mcr p15, 0, %0, c1, c0, 0\n" + : "=&r" (v) + : "r" (0), "Ir" (CR_C) + : "cc"); +} + +static inline void zynq_cpu_leave_lowpower(void) +{ + unsigned int v; + + asm volatile( + " mrc p15, 0, %0, c1, c0, 0\n" + " orr %0, %0, %1\n" + " mcr p15, 0, %0, c1, c0, 0\n" + " mrc p15, 0, %0, c1, c0, 1\n" + " orr %0, %0, #0x40\n" + " mcr p15, 0, %0, c1, c0, 1\n" + : "=&r" (v) + : "Ir" (CR_C) + : "cc"); +} + +static inline void zynq_platform_do_lowpower(unsigned int cpu, int *spurious) +{ + /* + * there is no power-control hardware on this platform, so all + * we can do is put the core into WFI; this is safe as the calling + * code will have already disabled interrupts + */ + for (;;) { + dsb(); + wfi(); + + /* + * Getting here, means that we have come out of WFI without + * having been woken up - this shouldn't happen + * + * Just note it happening - when we're woken, we can report + * its occurrence. + */ + (*spurious)++; + } +} + +/* + * platform-specific code to shutdown a CPU + * + * Called with IRQs disabled + */ +void zynq_platform_cpu_die(unsigned int cpu) +{ + int spurious = 0; + + /* + * we're ready for shutdown now, so do it + */ + zynq_cpu_enter_lowpower(); + zynq_platform_do_lowpower(cpu, &spurious); + + /* + * bring this CPU back into the world of cache + * coherency, and then restore interrupts + */ + zynq_cpu_leave_lowpower(); + + if (spurious) + pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious); +} diff --git a/arch/arm/mach-zynq/platsmp.c b/arch/arm/mach-zynq/platsmp.c new file mode 100644 index 000000000000..5fc167e07619 --- /dev/null +++ b/arch/arm/mach-zynq/platsmp.c @@ -0,0 +1,136 @@ +/* + * This file contains Xilinx specific SMP code, used to start up + * the second processor. + * + * Copyright (C) 2011-2013 Xilinx + * + * based on linux/arch/arm/mach-realview/platsmp.c + * + * Copyright (C) 2002 ARM Ltd. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/export.h> +#include <linux/jiffies.h> +#include <linux/init.h> +#include <linux/io.h> +#include <asm/cacheflush.h> +#include <asm/smp_scu.h> +#include <linux/irqchip/arm-gic.h> +#include "common.h" + +/* + * Store number of cores in the system + * Because of scu_get_core_count() must be in __init section and can't + * be called from zynq_cpun_start() because it is in __cpuinit section. + */ +static int ncores; + +int __cpuinit zynq_cpun_start(u32 address, int cpu) +{ + u32 trampoline_code_size = &zynq_secondary_trampoline_end - + &zynq_secondary_trampoline; + + if (cpu > ncores) { + pr_warn("CPU No. is not available in the system\n"); + return -1; + } + + /* MS: Expectation that SLCR are directly map and accessible */ + /* Not possible to jump to non aligned address */ + if (!(address & 3) && (!address || (address >= trampoline_code_size))) { + /* Store pointer to ioremap area which points to address 0x0 */ + static u8 __iomem *zero; + u32 trampoline_size = &zynq_secondary_trampoline_jump - + &zynq_secondary_trampoline; + + zynq_slcr_cpu_stop(cpu); + + if (__pa(PAGE_OFFSET)) { + zero = ioremap(0, trampoline_code_size); + if (!zero) { + pr_warn("BOOTUP jump vectors not accessible\n"); + return -1; + } + } else { + zero = (__force u8 __iomem *)PAGE_OFFSET; + } + + /* + * This is elegant way how to jump to any address + * 0x0: Load address at 0x8 to r0 + * 0x4: Jump by mov instruction + * 0x8: Jumping address + */ + memcpy((__force void *)zero, &zynq_secondary_trampoline, + trampoline_size); + writel(address, zero + trampoline_size); + + flush_cache_all(); + outer_flush_range(0, trampoline_code_size); + smp_wmb(); + + if (__pa(PAGE_OFFSET)) + iounmap(zero); + + zynq_slcr_cpu_start(cpu); + + return 0; + } + + pr_warn("Can't start CPU%d: Wrong starting address %x\n", cpu, address); + + return -1; +} +EXPORT_SYMBOL(zynq_cpun_start); + +static int __cpuinit zynq_boot_secondary(unsigned int cpu, + struct task_struct *idle) +{ + return zynq_cpun_start(virt_to_phys(secondary_startup), cpu); +} + +/* + * Initialise the CPU possible map early - this describes the CPUs + * which may be present or become present in the system. + */ +static void __init zynq_smp_init_cpus(void) +{ + int i; + + ncores = scu_get_core_count(zynq_scu_base); + + for (i = 0; i < ncores && i < CONFIG_NR_CPUS; i++) + set_cpu_possible(i, true); +} + +static void __init zynq_smp_prepare_cpus(unsigned int max_cpus) +{ + int i; + + /* + * Initialise the present map, which describes the set of CPUs + * actually populated at the present time. + */ + for (i = 0; i < max_cpus; i++) + set_cpu_present(i, true); + + scu_enable(zynq_scu_base); +} + +struct smp_operations zynq_smp_ops __initdata = { + .smp_init_cpus = zynq_smp_init_cpus, + .smp_prepare_cpus = zynq_smp_prepare_cpus, + .smp_boot_secondary = zynq_boot_secondary, +#ifdef CONFIG_HOTPLUG_CPU + .cpu_die = zynq_platform_cpu_die, +#endif +}; diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c new file mode 100644 index 000000000000..c70969b9c258 --- /dev/null +++ b/arch/arm/mach-zynq/slcr.c @@ -0,0 +1,125 @@ +/* + * Xilinx SLCR driver + * + * Copyright (c) 2011-2013 Xilinx Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + * You should have received a copy of the GNU General Public + * License along with this program; if not, write to the Free + * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA + * 02139, USA. + */ + +#include <linux/export.h> +#include <linux/io.h> +#include <linux/fs.h> +#include <linux/interrupt.h> +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/of_address.h> +#include <linux/uaccess.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/string.h> +#include <linux/clk/zynq.h> +#include "common.h" + +#define SLCR_UNLOCK_MAGIC 0xDF0D +#define SLCR_UNLOCK 0x8 /* SCLR unlock register */ + +#define SLCR_PS_RST_CTRL_OFFSET 0x200 /* PS Software Reset Control */ + +#define SLCR_A9_CPU_CLKSTOP 0x10 +#define SLCR_A9_CPU_RST 0x1 + +#define SLCR_A9_CPU_RST_CTRL 0x244 /* CPU Software Reset Control */ +#define SLCR_REBOOT_STATUS 0x258 /* PS Reboot Status */ + +void __iomem *zynq_slcr_base; + +/** + * zynq_slcr_system_reset - Reset the entire system. + */ +void zynq_slcr_system_reset(void) +{ + u32 reboot; + + /* + * Unlock the SLCR then reset the system. + * Note that this seems to require raw i/o + * functions or there's a lockup? + */ + writel(SLCR_UNLOCK_MAGIC, zynq_slcr_base + SLCR_UNLOCK); + + /* + * Clear 0x0F000000 bits of reboot status register to workaround + * the FSBL not loading the bitstream after soft-reboot + * This is a temporary solution until we know more. + */ + reboot = readl(zynq_slcr_base + SLCR_REBOOT_STATUS); + writel(reboot & 0xF0FFFFFF, zynq_slcr_base + SLCR_REBOOT_STATUS); + writel(1, zynq_slcr_base + SLCR_PS_RST_CTRL_OFFSET); +} + +/** + * zynq_slcr_cpu_start - Start cpu + * @cpu: cpu number + */ +void zynq_slcr_cpu_start(int cpu) +{ + /* enable CPUn */ + writel(SLCR_A9_CPU_CLKSTOP << cpu, + zynq_slcr_base + SLCR_A9_CPU_RST_CTRL); + /* enable CLK for CPUn */ + writel(0x0 << cpu, zynq_slcr_base + SLCR_A9_CPU_RST_CTRL); +} + +/** + * zynq_slcr_cpu_stop - Stop cpu + * @cpu: cpu number + */ +void zynq_slcr_cpu_stop(int cpu) +{ + /* stop CLK and reset CPUn */ + writel((SLCR_A9_CPU_CLKSTOP | SLCR_A9_CPU_RST) << cpu, + zynq_slcr_base + SLCR_A9_CPU_RST_CTRL); +} + +/** + * zynq_slcr_init + * Returns 0 on success, negative errno otherwise. + * + * Called early during boot from platform code to remap SLCR area. + */ +int __init zynq_slcr_init(void) +{ + struct device_node *np; + + np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr"); + if (!np) { + pr_err("%s: no slcr node found\n", __func__); + BUG(); + } + + zynq_slcr_base = of_iomap(np, 0); + if (!zynq_slcr_base) { + pr_err("%s: Unable to map I/O memory\n", __func__); + BUG(); + } + + /* unlock the SLCR so that registers can be changed */ + writel(SLCR_UNLOCK_MAGIC, zynq_slcr_base + SLCR_UNLOCK); + + pr_info("%s mapped to %p\n", np->name, zynq_slcr_base); + + xilinx_zynq_clocks_init(zynq_slcr_base); + + of_node_put(np); + + return 0; +} diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c deleted file mode 100644 index f9fbc9c1e7a6..000000000000 --- a/arch/arm/mach-zynq/timer.c +++ /dev/null @@ -1,324 +0,0 @@ -/* - * This file contains driver for the Xilinx PS Timer Counter IP. - * - * Copyright (C) 2011 Xilinx - * - * based on arch/mips/kernel/time.c timer driver - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <linux/interrupt.h> -#include <linux/clockchips.h> -#include <linux/of_address.h> -#include <linux/of_irq.h> -#include <linux/slab.h> -#include <linux/clk-provider.h> -#include "common.h" - -/* - * Timer Register Offset Definitions of Timer 1, Increment base address by 4 - * and use same offsets for Timer 2 - */ -#define XTTCPS_CLK_CNTRL_OFFSET 0x00 /* Clock Control Reg, RW */ -#define XTTCPS_CNT_CNTRL_OFFSET 0x0C /* Counter Control Reg, RW */ -#define XTTCPS_COUNT_VAL_OFFSET 0x18 /* Counter Value Reg, RO */ -#define XTTCPS_INTR_VAL_OFFSET 0x24 /* Interval Count Reg, RW */ -#define XTTCPS_ISR_OFFSET 0x54 /* Interrupt Status Reg, RO */ -#define XTTCPS_IER_OFFSET 0x60 /* Interrupt Enable Reg, RW */ - -#define XTTCPS_CNT_CNTRL_DISABLE_MASK 0x1 - -/* - * Setup the timers to use pre-scaling, using a fixed value for now that will - * work across most input frequency, but it may need to be more dynamic - */ -#define PRESCALE_EXPONENT 11 /* 2 ^ PRESCALE_EXPONENT = PRESCALE */ -#define PRESCALE 2048 /* The exponent must match this */ -#define CLK_CNTRL_PRESCALE ((PRESCALE_EXPONENT - 1) << 1) -#define CLK_CNTRL_PRESCALE_EN 1 -#define CNT_CNTRL_RESET (1<<4) - -/** - * struct xttcps_timer - This definition defines local timer structure - * - * @base_addr: Base address of timer - **/ -struct xttcps_timer { - void __iomem *base_addr; -}; - -struct xttcps_timer_clocksource { - struct xttcps_timer xttc; - struct clocksource cs; -}; - -#define to_xttcps_timer_clksrc(x) \ - container_of(x, struct xttcps_timer_clocksource, cs) - -struct xttcps_timer_clockevent { - struct xttcps_timer xttc; - struct clock_event_device ce; - struct clk *clk; -}; - -#define to_xttcps_timer_clkevent(x) \ - container_of(x, struct xttcps_timer_clockevent, ce) - -/** - * xttcps_set_interval - Set the timer interval value - * - * @timer: Pointer to the timer instance - * @cycles: Timer interval ticks - **/ -static void xttcps_set_interval(struct xttcps_timer *timer, - unsigned long cycles) -{ - u32 ctrl_reg; - - /* Disable the counter, set the counter value and re-enable counter */ - ctrl_reg = __raw_readl(timer->base_addr + XTTCPS_CNT_CNTRL_OFFSET); - ctrl_reg |= XTTCPS_CNT_CNTRL_DISABLE_MASK; - __raw_writel(ctrl_reg, timer->base_addr + XTTCPS_CNT_CNTRL_OFFSET); - - __raw_writel(cycles, timer->base_addr + XTTCPS_INTR_VAL_OFFSET); - - /* - * Reset the counter (0x10) so that it starts from 0, one-shot - * mode makes this needed for timing to be right. - */ - ctrl_reg |= CNT_CNTRL_RESET; - ctrl_reg &= ~XTTCPS_CNT_CNTRL_DISABLE_MASK; - __raw_writel(ctrl_reg, timer->base_addr + XTTCPS_CNT_CNTRL_OFFSET); -} - -/** - * xttcps_clock_event_interrupt - Clock event timer interrupt handler - * - * @irq: IRQ number of the Timer - * @dev_id: void pointer to the xttcps_timer instance - * - * returns: Always IRQ_HANDLED - success - **/ -static irqreturn_t xttcps_clock_event_interrupt(int irq, void *dev_id) -{ - struct xttcps_timer_clockevent *xttce = dev_id; - struct xttcps_timer *timer = &xttce->xttc; - - /* Acknowledge the interrupt and call event handler */ - __raw_readl(timer->base_addr + XTTCPS_ISR_OFFSET); - - xttce->ce.event_handler(&xttce->ce); - - return IRQ_HANDLED; -} - -/** - * __xttc_clocksource_read - Reads the timer counter register - * - * returns: Current timer counter register value - **/ -static cycle_t __xttc_clocksource_read(struct clocksource *cs) -{ - struct xttcps_timer *timer = &to_xttcps_timer_clksrc(cs)->xttc; - - return (cycle_t)__raw_readl(timer->base_addr + - XTTCPS_COUNT_VAL_OFFSET); -} - -/** - * xttcps_set_next_event - Sets the time interval for next event - * - * @cycles: Timer interval ticks - * @evt: Address of clock event instance - * - * returns: Always 0 - success - **/ -static int xttcps_set_next_event(unsigned long cycles, - struct clock_event_device *evt) -{ - struct xttcps_timer_clockevent *xttce = to_xttcps_timer_clkevent(evt); - struct xttcps_timer *timer = &xttce->xttc; - - xttcps_set_interval(timer, cycles); - return 0; -} - -/** - * xttcps_set_mode - Sets the mode of timer - * - * @mode: Mode to be set - * @evt: Address of clock event instance - **/ -static void xttcps_set_mode(enum clock_event_mode mode, - struct clock_event_device *evt) -{ - struct xttcps_timer_clockevent *xttce = to_xttcps_timer_clkevent(evt); - struct xttcps_timer *timer = &xttce->xttc; - u32 ctrl_reg; - - switch (mode) { - case CLOCK_EVT_MODE_PERIODIC: - xttcps_set_interval(timer, - DIV_ROUND_CLOSEST(clk_get_rate(xttce->clk), - PRESCALE * HZ)); - break; - case CLOCK_EVT_MODE_ONESHOT: - case CLOCK_EVT_MODE_UNUSED: - case CLOCK_EVT_MODE_SHUTDOWN: - ctrl_reg = __raw_readl(timer->base_addr + - XTTCPS_CNT_CNTRL_OFFSET); - ctrl_reg |= XTTCPS_CNT_CNTRL_DISABLE_MASK; - __raw_writel(ctrl_reg, - timer->base_addr + XTTCPS_CNT_CNTRL_OFFSET); - break; - case CLOCK_EVT_MODE_RESUME: - ctrl_reg = __raw_readl(timer->base_addr + - XTTCPS_CNT_CNTRL_OFFSET); - ctrl_reg &= ~XTTCPS_CNT_CNTRL_DISABLE_MASK; - __raw_writel(ctrl_reg, - timer->base_addr + XTTCPS_CNT_CNTRL_OFFSET); - break; - } -} - -static void __init zynq_ttc_setup_clocksource(struct device_node *np, - void __iomem *base) -{ - struct xttcps_timer_clocksource *ttccs; - struct clk *clk; - int err; - u32 reg; - - ttccs = kzalloc(sizeof(*ttccs), GFP_KERNEL); - if (WARN_ON(!ttccs)) - return; - - err = of_property_read_u32(np, "reg", ®); - if (WARN_ON(err)) - return; - - clk = of_clk_get_by_name(np, "cpu_1x"); - if (WARN_ON(IS_ERR(clk))) - return; - - err = clk_prepare_enable(clk); - if (WARN_ON(err)) - return; - - ttccs->xttc.base_addr = base + reg * 4; - - ttccs->cs.name = np->name; - ttccs->cs.rating = 200; - ttccs->cs.read = __xttc_clocksource_read; - ttccs->cs.mask = CLOCKSOURCE_MASK(16); - ttccs->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS; - - __raw_writel(0x0, ttccs->xttc.base_addr + XTTCPS_IER_OFFSET); - __raw_writel(CLK_CNTRL_PRESCALE | CLK_CNTRL_PRESCALE_EN, - ttccs->xttc.base_addr + XTTCPS_CLK_CNTRL_OFFSET); - __raw_writel(CNT_CNTRL_RESET, - ttccs->xttc.base_addr + XTTCPS_CNT_CNTRL_OFFSET); - - err = clocksource_register_hz(&ttccs->cs, clk_get_rate(clk) / PRESCALE); - if (WARN_ON(err)) - return; -} - -static void __init zynq_ttc_setup_clockevent(struct device_node *np, - void __iomem *base) -{ - struct xttcps_timer_clockevent *ttcce; - int err, irq; - u32 reg; - - ttcce = kzalloc(sizeof(*ttcce), GFP_KERNEL); - if (WARN_ON(!ttcce)) - return; - - err = of_property_read_u32(np, "reg", ®); - if (WARN_ON(err)) - return; - - ttcce->xttc.base_addr = base + reg * 4; - - ttcce->clk = of_clk_get_by_name(np, "cpu_1x"); - if (WARN_ON(IS_ERR(ttcce->clk))) - return; - - err = clk_prepare_enable(ttcce->clk); - if (WARN_ON(err)) - return; - - irq = irq_of_parse_and_map(np, 0); - if (WARN_ON(!irq)) - return; - - ttcce->ce.name = np->name; - ttcce->ce.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; - ttcce->ce.set_next_event = xttcps_set_next_event; - ttcce->ce.set_mode = xttcps_set_mode; - ttcce->ce.rating = 200; - ttcce->ce.irq = irq; - ttcce->ce.cpumask = cpu_possible_mask; - - __raw_writel(0x23, ttcce->xttc.base_addr + XTTCPS_CNT_CNTRL_OFFSET); - __raw_writel(CLK_CNTRL_PRESCALE | CLK_CNTRL_PRESCALE_EN, - ttcce->xttc.base_addr + XTTCPS_CLK_CNTRL_OFFSET); - __raw_writel(0x1, ttcce->xttc.base_addr + XTTCPS_IER_OFFSET); - - err = request_irq(irq, xttcps_clock_event_interrupt, IRQF_TIMER, - np->name, ttcce); - if (WARN_ON(err)) - return; - - clockevents_config_and_register(&ttcce->ce, - clk_get_rate(ttcce->clk) / PRESCALE, - 1, 0xfffe); -} - -static const __initconst struct of_device_id zynq_ttc_match[] = { - { .compatible = "xlnx,ttc-counter-clocksource", - .data = zynq_ttc_setup_clocksource, }, - { .compatible = "xlnx,ttc-counter-clockevent", - .data = zynq_ttc_setup_clockevent, }, - {} -}; - -/** - * xttcps_timer_init - Initialize the timer - * - * Initializes the timer hardware and register the clock source and clock event - * timers with Linux kernal timer framework - **/ -void __init xttcps_timer_init(void) -{ - struct device_node *np; - - for_each_compatible_node(np, NULL, "xlnx,ttc") { - struct device_node *np_chld; - void __iomem *base; - - base = of_iomap(np, 0); - if (WARN_ON(!base)) - return; - - for_each_available_child_of_node(np, np_chld) { - int (*cb)(struct device_node *np, void __iomem *base); - const struct of_device_id *match; - - match = of_match_node(zynq_ttc_match, np_chld); - if (match) { - cb = match->data; - cb(np_chld, base); - } - } - } -} diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index c7e3759f16d3..e9db6b4bf65a 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c @@ -342,6 +342,7 @@ static int __init atomic_pool_init(void) { struct dma_pool *pool = &atomic_pool; pgprot_t prot = pgprot_dmacoherent(pgprot_kernel); + gfp_t gfp = GFP_KERNEL | GFP_DMA; unsigned long nr_pages = pool->size >> PAGE_SHIFT; unsigned long *bitmap; struct page *page; @@ -361,8 +362,8 @@ static int __init atomic_pool_init(void) ptr = __alloc_from_contiguous(NULL, pool->size, prot, &page, atomic_pool_init); else - ptr = __alloc_remap_buffer(NULL, pool->size, GFP_KERNEL, prot, - &page, atomic_pool_init); + ptr = __alloc_remap_buffer(NULL, pool->size, gfp, prot, &page, + atomic_pool_init); if (ptr) { int i; diff --git a/arch/arm/net/bpf_jit_32.c b/arch/arm/net/bpf_jit_32.c index 6828ef6ce80e..a0bd8a755bdf 100644 --- a/arch/arm/net/bpf_jit_32.c +++ b/arch/arm/net/bpf_jit_32.c @@ -576,7 +576,7 @@ load_ind: /* x = ((*(frame + k)) & 0xf) << 2; */ ctx->seen |= SEEN_X | SEEN_DATA | SEEN_CALL; /* the interpreter should deal with the negative K */ - if (k < 0) + if ((int)k < 0) return -1; /* offset in r1: we might have to take the slow path */ emit_mov_i(r_off, k, ctx); diff --git a/arch/arm/plat-orion/addr-map.c b/arch/arm/plat-orion/addr-map.c index febe3862873c..807ac8e5cbc0 100644 --- a/arch/arm/plat-orion/addr-map.c +++ b/arch/arm/plat-orion/addr-map.c @@ -157,9 +157,12 @@ void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg, u32 size = readl(ddr_window_cpu_base + DDR_SIZE_CS_OFF(i)); /* - * Chip select enabled? + * We only take care of entries for which the chip + * select is enabled, and that don't have high base + * address bits set (devices can only access the first + * 32 bits of the memory). */ - if (size & 1) { + if ((size & 1) && !(base & 0xF)) { struct mbus_dram_window *w; w = &orion_mbus_dram_info.cs[cs++]; diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c index f980cf3d2baa..5d205e74e495 100644 --- a/arch/arm/plat-samsung/irq-vic-timer.c +++ b/arch/arm/plat-samsung/irq-vic-timer.c @@ -16,6 +16,7 @@ #include <linux/kernel.h> #include <linux/interrupt.h> #include <linux/irq.h> +#include <linux/irqchip/chained_irq.h> #include <linux/io.h> #include <mach/map.h> @@ -23,8 +24,6 @@ #include <plat/irq-vic-timer.h> #include <plat/regs-timer.h> -#include <asm/mach/irq.h> - static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc) { struct irq_chip *chip = irq_get_chip(irq); diff --git a/arch/arm/plat-samsung/s5p-irq-gpioint.c b/arch/arm/plat-samsung/s5p-irq-gpioint.c index bae56131a50a..fafdb059043a 100644 --- a/arch/arm/plat-samsung/s5p-irq-gpioint.c +++ b/arch/arm/plat-samsung/s5p-irq-gpioint.c @@ -14,6 +14,7 @@ #include <linux/kernel.h> #include <linux/interrupt.h> #include <linux/irq.h> +#include <linux/irqchip/chained_irq.h> #include <linux/io.h> #include <linux/gpio.h> #include <linux/slab.h> @@ -22,8 +23,6 @@ #include <plat/gpio-core.h> #include <plat/gpio-cfg.h> -#include <asm/mach/irq.h> - #define GPIO_BASE(chip) ((void __iomem *)((unsigned long)((chip)->base) & 0xFFFFF000u)) #define CON_OFFSET 0x700 diff --git a/arch/arm/plat-spear/Kconfig b/arch/arm/plat-spear/Kconfig index 739d016eb273..8a08c31b5e20 100644 --- a/arch/arm/plat-spear/Kconfig +++ b/arch/arm/plat-spear/Kconfig @@ -10,7 +10,7 @@ choice config ARCH_SPEAR13XX bool "ST SPEAr13xx with Device Tree" - select ARCH_HAVE_CPUFREQ + select ARCH_HAS_CPUFREQ select ARM_GIC select CPU_V7 select GPIO_SPEAR_SPICS diff --git a/arch/arm/plat-versatile/platsmp.c b/arch/arm/plat-versatile/platsmp.c index f2ac15561778..1e1b2d769748 100644 --- a/arch/arm/plat-versatile/platsmp.c +++ b/arch/arm/plat-versatile/platsmp.c @@ -14,7 +14,6 @@ #include <linux/device.h> #include <linux/jiffies.h> #include <linux/smp.h> -#include <linux/irqchip/arm-gic.h> #include <asm/cacheflush.h> #include <asm/smp_plat.h> @@ -37,13 +36,6 @@ static DEFINE_SPINLOCK(boot_lock); void __cpuinit versatile_secondary_init(unsigned int cpu) { /* - * if any interrupts are already enabled for the primary - * core (e.g. timer irq), then they will not have been enabled - * for us: do so - */ - gic_secondary_init(0); - - /* * let the primary processor know we're out of the * pen, then head off into the C entry point */ diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index fd70a68387eb..9b6d19f74078 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -9,7 +9,6 @@ config ARM64 select CLONE_BACKWARDS select COMMON_CLK select GENERIC_CLOCKEVENTS - select GENERIC_HARDIRQS_NO_DEPRECATED select GENERIC_IOMAP select GENERIC_IRQ_PROBE select GENERIC_IRQ_SHOW diff --git a/arch/arm64/Kconfig.debug b/arch/arm64/Kconfig.debug index 51493430f142..1a6bfe954d49 100644 --- a/arch/arm64/Kconfig.debug +++ b/arch/arm64/Kconfig.debug @@ -6,17 +6,6 @@ config FRAME_POINTER bool default y -config DEBUG_ERRORS - bool "Verbose kernel error messages" - depends on DEBUG_KERNEL - help - This option controls verbose debugging information which can be - printed when the kernel detects an internal error. This debugging - information is useful to kernel hackers when tracking down problems, - but mostly meaningless to other people. It's safe to say Y unless - you are concerned with the code size or don't want to see these - messages. - config DEBUG_STACK_USAGE bool "Enable stack utilization instrumentation" depends on DEBUG_KERNEL diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 9212c7880da7..09bef29f3a09 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -82,4 +82,3 @@ CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_INFO=y # CONFIG_FTRACE is not set CONFIG_ATOMIC64_SELFTEST=y -CONFIG_DEBUG_ERRORS=y diff --git a/arch/arm64/include/asm/ucontext.h b/arch/arm64/include/asm/ucontext.h index bde960720892..42e04c877428 100644 --- a/arch/arm64/include/asm/ucontext.h +++ b/arch/arm64/include/asm/ucontext.h @@ -22,7 +22,7 @@ struct ucontext { stack_t uc_stack; sigset_t uc_sigmask; /* glibc uses a 1024-bit sigset_t */ - __u8 __unused[(1024 - sizeof(sigset_t)) / 8]; + __u8 __unused[1024 / 8 - sizeof(sigset_t)]; /* last for future expansion */ struct sigcontext uc_mcontext; }; diff --git a/arch/arm64/kernel/arm64ksyms.c b/arch/arm64/kernel/arm64ksyms.c index cef3925eaf60..aa3e948f7885 100644 --- a/arch/arm64/kernel/arm64ksyms.c +++ b/arch/arm64/kernel/arm64ksyms.c @@ -40,7 +40,9 @@ EXPORT_SYMBOL(__copy_to_user); EXPORT_SYMBOL(__clear_user); /* bitops */ +#ifdef CONFIG_SMP EXPORT_SYMBOL(__atomic_hash); +#endif /* physical memory */ EXPORT_SYMBOL(memstart_addr); diff --git a/arch/arm64/kernel/signal32.c b/arch/arm64/kernel/signal32.c index 7f4f3673f2bc..e393174fe859 100644 --- a/arch/arm64/kernel/signal32.c +++ b/arch/arm64/kernel/signal32.c @@ -549,7 +549,6 @@ int compat_setup_rt_frame(int usig, struct k_sigaction *ka, siginfo_t *info, sigset_t *set, struct pt_regs *regs) { struct compat_rt_sigframe __user *frame; - compat_stack_t stack; int err = 0; frame = compat_get_sigframe(ka, regs, sizeof(*frame)); diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index 224b44ab534e..70b8cd4021c4 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -261,7 +261,7 @@ static void __init create_mapping(phys_addr_t phys, unsigned long virt, void __iomem * __init early_io_map(phys_addr_t phys, unsigned long virt) { unsigned long size, mask; - bool page64k = IS_ENABLED(ARM64_64K_PAGES); + bool page64k = IS_ENABLED(CONFIG_ARM64_64K_PAGES); pgd_t *pgd; pud_t *pud; pmd_t *pmd; diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig index 9b89257b2cfd..c1a868d398bd 100644 --- a/arch/avr32/Kconfig +++ b/arch/avr32/Kconfig @@ -7,7 +7,7 @@ config AVR32 select HAVE_OPROFILE select HAVE_KPROBES select HAVE_GENERIC_HARDIRQS - select HAVE_VIRT_TO_BUS + select VIRT_TO_BUS select GENERIC_IRQ_PROBE select GENERIC_ATOMIC64 select HARDIRQS_SW_RESEND diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index 600494c70e96..c3f2e0bc644a 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig @@ -33,7 +33,7 @@ config BLACKFIN select ARCH_HAVE_CUSTOM_GPIO_H select ARCH_WANT_OPTIONAL_GPIOLIB select HAVE_UID16 - select HAVE_VIRT_TO_BUS + select VIRT_TO_BUS select ARCH_WANT_IPC_PARSE_VERSION select HAVE_GENERIC_HARDIRQS select GENERIC_ATOMIC64 diff --git a/arch/cris/Kconfig b/arch/cris/Kconfig index bb0ac66cf533..06dd026533e3 100644 --- a/arch/cris/Kconfig +++ b/arch/cris/Kconfig @@ -43,7 +43,7 @@ config CRIS select GENERIC_ATOMIC64 select HAVE_GENERIC_HARDIRQS select HAVE_UID16 - select HAVE_VIRT_TO_BUS + select VIRT_TO_BUS select ARCH_WANT_IPC_PARSE_VERSION select GENERIC_IRQ_SHOW select GENERIC_IOMAP diff --git a/arch/frv/Kconfig b/arch/frv/Kconfig index 12369b194c7b..2ce731f9aa4d 100644 --- a/arch/frv/Kconfig +++ b/arch/frv/Kconfig @@ -6,7 +6,7 @@ config FRV select HAVE_PERF_EVENTS select HAVE_UID16 select HAVE_GENERIC_HARDIRQS - select HAVE_VIRT_TO_BUS + select VIRT_TO_BUS select GENERIC_IRQ_SHOW select HAVE_DEBUG_BUGVERBOSE select ARCH_HAVE_NMI_SAFE_CMPXCHG diff --git a/arch/h8300/Kconfig b/arch/h8300/Kconfig index ae8551eb3736..79250de1b12a 100644 --- a/arch/h8300/Kconfig +++ b/arch/h8300/Kconfig @@ -5,7 +5,7 @@ config H8300 select HAVE_GENERIC_HARDIRQS select GENERIC_ATOMIC64 select HAVE_UID16 - select HAVE_VIRT_TO_BUS + select VIRT_TO_BUS select ARCH_WANT_IPC_PARSE_VERSION select GENERIC_IRQ_SHOW select GENERIC_CPU_DEVICES diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index 33f3fdc0b214..9a02f71c6b1f 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig @@ -26,7 +26,7 @@ config IA64 select HAVE_MEMBLOCK select HAVE_MEMBLOCK_NODE_MAP select HAVE_VIRT_CPU_ACCOUNTING - select HAVE_VIRT_TO_BUS + select VIRT_TO_BUS select ARCH_DISCARD_MEMBLOCK select GENERIC_IRQ_PROBE select GENERIC_PENDING_IRQ if SMP diff --git a/arch/ia64/kernel/process.c b/arch/ia64/kernel/process.c index e34f565f595a..6f7dc8b7b35c 100644 --- a/arch/ia64/kernel/process.c +++ b/arch/ia64/kernel/process.c @@ -291,7 +291,6 @@ cpu_idle (void) } if (!need_resched()) { - void (*idle)(void); #ifdef CONFIG_SMP min_xtp(); #endif @@ -299,9 +298,7 @@ cpu_idle (void) if (mark_idle) (*mark_idle)(1); - if (!idle) - idle = default_idle; - (*idle)(); + default_idle(); if (mark_idle) (*mark_idle)(0); #ifdef CONFIG_SMP diff --git a/arch/m32r/Kconfig b/arch/m32r/Kconfig index 92623818a1fe..bcd17b206571 100644 --- a/arch/m32r/Kconfig +++ b/arch/m32r/Kconfig @@ -10,7 +10,7 @@ config M32R select ARCH_WANT_IPC_PARSE_VERSION select HAVE_DEBUG_BUGVERBOSE select HAVE_GENERIC_HARDIRQS - select HAVE_VIRT_TO_BUS + select VIRT_TO_BUS select GENERIC_IRQ_PROBE select GENERIC_IRQ_SHOW select GENERIC_ATOMIC64 diff --git a/arch/m32r/include/uapi/asm/stat.h b/arch/m32r/include/uapi/asm/stat.h index da4518f82d6d..98470fe483b6 100644 --- a/arch/m32r/include/uapi/asm/stat.h +++ b/arch/m32r/include/uapi/asm/stat.h @@ -63,10 +63,10 @@ struct stat64 { long long st_size; unsigned long st_blksize; -#if defined(__BIG_ENDIAN) +#if defined(__BYTE_ORDER) ? __BYTE_ORDER == __BIG_ENDIAN : defined(__BIG_ENDIAN) unsigned long __pad4; /* future possible st_blocks high bits */ unsigned long st_blocks; /* Number 512-byte blocks allocated. */ -#elif defined(__LITTLE_ENDIAN) +#elif defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN) unsigned long st_blocks; /* Number 512-byte blocks allocated. */ unsigned long __pad4; /* future possible st_blocks high bits */ #else diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 0e708c78e01c..6de813370b8c 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -8,7 +8,7 @@ config M68K select GENERIC_IRQ_SHOW select GENERIC_ATOMIC64 select HAVE_UID16 - select HAVE_VIRT_TO_BUS + select VIRT_TO_BUS select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS select GENERIC_CPU_DEVICES select GENERIC_STRNCPY_FROM_USER if MMU diff --git a/arch/m68k/Kconfig.machine b/arch/m68k/Kconfig.machine index 7cdf6b010381..7240584d3439 100644 --- a/arch/m68k/Kconfig.machine +++ b/arch/m68k/Kconfig.machine @@ -310,7 +310,6 @@ config COBRA5282 config SOM5282EM bool "EMAC.Inc SOM5282EM board support" depends on M528x - select EMAC_INC help Support for the EMAC.Inc SOM5282EM module. diff --git a/arch/m68k/include/asm/MC68328.h b/arch/m68k/include/asm/MC68328.h index a337e56d09bf..4ebf098b8a1f 100644 --- a/arch/m68k/include/asm/MC68328.h +++ b/arch/m68k/include/asm/MC68328.h @@ -293,7 +293,7 @@ /* * Here go the bitmasks themselves */ -#define IMR_MSPIM (1 << SPIM _IRQ_NUM) /* Mask SPI Master interrupt */ +#define IMR_MSPIM (1 << SPIM_IRQ_NUM) /* Mask SPI Master interrupt */ #define IMR_MTMR2 (1 << TMR2_IRQ_NUM) /* Mask Timer 2 interrupt */ #define IMR_MUART (1 << UART_IRQ_NUM) /* Mask UART interrupt */ #define IMR_MWDT (1 << WDT_IRQ_NUM) /* Mask Watchdog Timer interrupt */ @@ -327,7 +327,7 @@ #define IWR_ADDR 0xfffff308 #define IWR LONG_REF(IWR_ADDR) -#define IWR_SPIM (1 << SPIM _IRQ_NUM) /* SPI Master interrupt */ +#define IWR_SPIM (1 << SPIM_IRQ_NUM) /* SPI Master interrupt */ #define IWR_TMR2 (1 << TMR2_IRQ_NUM) /* Timer 2 interrupt */ #define IWR_UART (1 << UART_IRQ_NUM) /* UART interrupt */ #define IWR_WDT (1 << WDT_IRQ_NUM) /* Watchdog Timer interrupt */ @@ -357,7 +357,7 @@ #define ISR_ADDR 0xfffff30c #define ISR LONG_REF(ISR_ADDR) -#define ISR_SPIM (1 << SPIM _IRQ_NUM) /* SPI Master interrupt */ +#define ISR_SPIM (1 << SPIM_IRQ_NUM) /* SPI Master interrupt */ #define ISR_TMR2 (1 << TMR2_IRQ_NUM) /* Timer 2 interrupt */ #define ISR_UART (1 << UART_IRQ_NUM) /* UART interrupt */ #define ISR_WDT (1 << WDT_IRQ_NUM) /* Watchdog Timer interrupt */ @@ -391,7 +391,7 @@ #define IPR_ADDR 0xfffff310 #define IPR LONG_REF(IPR_ADDR) -#define IPR_SPIM (1 << SPIM _IRQ_NUM) /* SPI Master interrupt */ +#define IPR_SPIM (1 << SPIM_IRQ_NUM) /* SPI Master interrupt */ #define IPR_TMR2 (1 << TMR2_IRQ_NUM) /* Timer 2 interrupt */ #define IPR_UART (1 << UART_IRQ_NUM) /* UART interrupt */ #define IPR_WDT (1 << WDT_IRQ_NUM) /* Watchdog Timer interrupt */ @@ -757,7 +757,7 @@ /* 'EZ328-compatible definitions */ #define TCN_ADDR TCN1_ADDR -#define TCN TCN +#define TCN TCN1 /* * Timer Unit 1 and 2 Status Registers diff --git a/arch/m68k/kernel/setup_no.c b/arch/m68k/kernel/setup_no.c index 71fb29938dba..911ba472e6c4 100644 --- a/arch/m68k/kernel/setup_no.c +++ b/arch/m68k/kernel/setup_no.c @@ -57,6 +57,9 @@ void (*mach_reset)(void); void (*mach_halt)(void); void (*mach_power_off)(void); +#ifdef CONFIG_M68000 +#define CPU_NAME "MC68000" +#endif #ifdef CONFIG_M68328 #define CPU_NAME "MC68328" #endif diff --git a/arch/m68k/mm/init.c b/arch/m68k/mm/init.c index afd8106fd83b..519aad8fa812 100644 --- a/arch/m68k/mm/init.c +++ b/arch/m68k/mm/init.c @@ -188,7 +188,7 @@ void __init mem_init(void) } } -#if !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE) +#if defined(CONFIG_MMU) && !defined(CONFIG_SUN3) && !defined(CONFIG_COLDFIRE) /* insert pointer tables allocated so far into the tablelist */ init_pointer_table((unsigned long)kernel_pg_dir); for (i = 0; i < PTRS_PER_PGD; i++) { diff --git a/arch/m68k/platform/coldfire/m528x.c b/arch/m68k/platform/coldfire/m528x.c index 83b7dad7a84e..b03a9d271837 100644 --- a/arch/m68k/platform/coldfire/m528x.c +++ b/arch/m68k/platform/coldfire/m528x.c @@ -69,7 +69,7 @@ static void __init m528x_uarts_init(void) u8 port; /* make sure PUAPAR is set for UART0 and UART1 */ - port = readb(MCF5282_GPIO_PUAPAR); + port = readb(MCFGPIO_PUAPAR); port |= 0x03 | (0x03 << 2); writeb(port, MCFGPIO_PUAPAR); } diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index 7843d11156e6..1323fa2530eb 100644 --- a/arch/microblaze/Kconfig +++ b/arch/microblaze/Kconfig @@ -19,7 +19,7 @@ config MICROBLAZE select HAVE_DEBUG_KMEMLEAK select IRQ_DOMAIN select HAVE_GENERIC_HARDIRQS - select HAVE_VIRT_TO_BUS + select VIRT_TO_BUS select GENERIC_IRQ_PROBE select GENERIC_IRQ_SHOW select GENERIC_PCI_IOMAP diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index ae9c716c46bb..cd2e21ff562a 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -38,7 +38,7 @@ config MIPS select GENERIC_CLOCKEVENTS select GENERIC_CMOS_UPDATE select HAVE_MOD_ARCH_SPECIFIC - select HAVE_VIRT_TO_BUS + select VIRT_TO_BUS select MODULES_USE_ELF_REL if MODULES select MODULES_USE_ELF_RELA if MODULES && 64BIT select CLONE_BACKWARDS diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig index b06c7360b1c6..428da175d073 100644 --- a/arch/mn10300/Kconfig +++ b/arch/mn10300/Kconfig @@ -8,7 +8,7 @@ config MN10300 select HAVE_ARCH_KGDB select GENERIC_ATOMIC64 select HAVE_NMI_WATCHDOG if MN10300_WD_TIMER - select HAVE_VIRT_TO_BUS + select VIRT_TO_BUS select GENERIC_CLOCKEVENTS select MODULES_USE_ELF_RELA select OLD_SIGSUSPEND3 diff --git a/arch/openrisc/Kconfig b/arch/openrisc/Kconfig index 014a6482ed4c..9ab3bf2eca8d 100644 --- a/arch/openrisc/Kconfig +++ b/arch/openrisc/Kconfig @@ -9,10 +9,9 @@ config OPENRISC select OF_EARLY_FLATTREE select IRQ_DOMAIN select HAVE_MEMBLOCK - select ARCH_WANT_OPTIONAL_GPIOLIB + select ARCH_REQUIRE_GPIOLIB select HAVE_ARCH_TRACEHOOK select HAVE_GENERIC_HARDIRQS - select HAVE_VIRT_TO_BUS select GENERIC_IRQ_CHIP select GENERIC_IRQ_PROBE select GENERIC_IRQ_SHOW diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig index a9ff712a2864..0339181bf3ac 100644 --- a/arch/parisc/Kconfig +++ b/arch/parisc/Kconfig @@ -21,7 +21,7 @@ config PARISC select GENERIC_STRNCPY_FROM_USER select SYSCTL_ARCH_UNALIGN_ALLOW select HAVE_MOD_ARCH_SPECIFIC - select HAVE_VIRT_TO_BUS + select VIRT_TO_BUS select MODULES_USE_ELF_RELA select CLONE_BACKWARDS select TTY # Needed for pdc_cons.c diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index b89d7eb730a2..ea5bb045983a 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -90,6 +90,7 @@ config GENERIC_GPIO config PPC bool default y + select BINFMT_ELF select OF select OF_EARLY_FLATTREE select HAVE_FTRACE_MCOUNT_RECORD @@ -98,7 +99,7 @@ config PPC select HAVE_FUNCTION_GRAPH_TRACER select SYSCTL_EXCEPTION_TRACE select ARCH_WANT_OPTIONAL_GPIOLIB - select HAVE_VIRT_TO_BUS if !PPC64 + select VIRT_TO_BUS if !PPC64 select HAVE_IDE select HAVE_IOREMAP_PROT select HAVE_EFFICIENT_UNALIGNED_ACCESS diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h index 2fdb47a19efd..b59e06f507ea 100644 --- a/arch/powerpc/include/asm/mmu-hash64.h +++ b/arch/powerpc/include/asm/mmu-hash64.h @@ -343,17 +343,16 @@ extern void slb_set_size(u16 size); /* * VSID allocation (256MB segment) * - * We first generate a 38-bit "proto-VSID". For kernel addresses this - * is equal to the ESID | 1 << 37, for user addresses it is: - * (context << USER_ESID_BITS) | (esid & ((1U << USER_ESID_BITS) - 1) + * We first generate a 37-bit "proto-VSID". Proto-VSIDs are generated + * from mmu context id and effective segment id of the address. * - * This splits the proto-VSID into the below range - * 0 - (2^(CONTEXT_BITS + USER_ESID_BITS) - 1) : User proto-VSID range - * 2^(CONTEXT_BITS + USER_ESID_BITS) - 2^(VSID_BITS) : Kernel proto-VSID range - * - * We also have CONTEXT_BITS + USER_ESID_BITS = VSID_BITS - 1 - * That is, we assign half of the space to user processes and half - * to the kernel. + * For user processes max context id is limited to ((1ul << 19) - 5) + * for kernel space, we use the top 4 context ids to map address as below + * NOTE: each context only support 64TB now. + * 0x7fffc - [ 0xc000000000000000 - 0xc0003fffffffffff ] + * 0x7fffd - [ 0xd000000000000000 - 0xd0003fffffffffff ] + * 0x7fffe - [ 0xe000000000000000 - 0xe0003fffffffffff ] + * 0x7ffff - [ 0xf000000000000000 - 0xf0003fffffffffff ] * * The proto-VSIDs are then scrambled into real VSIDs with the * multiplicative hash: @@ -363,41 +362,49 @@ extern void slb_set_size(u16 size); * VSID_MULTIPLIER is prime, so in particular it is * co-prime to VSID_MODULUS, making this a 1:1 scrambling function. * Because the modulus is 2^n-1 we can compute it efficiently without - * a divide or extra multiply (see below). - * - * This scheme has several advantages over older methods: - * - * - We have VSIDs allocated for every kernel address - * (i.e. everything above 0xC000000000000000), except the very top - * segment, which simplifies several things. + * a divide or extra multiply (see below). The scramble function gives + * robust scattering in the hash table (at least based on some initial + * results). * - * - We allow for USER_ESID_BITS significant bits of ESID and - * CONTEXT_BITS bits of context for user addresses. - * i.e. 64T (46 bits) of address space for up to half a million contexts. + * We also consider VSID 0 special. We use VSID 0 for slb entries mapping + * bad address. This enables us to consolidate bad address handling in + * hash_page. * - * - The scramble function gives robust scattering in the hash - * table (at least based on some initial results). The previous - * method was more susceptible to pathological cases giving excessive - * hash collisions. + * We also need to avoid the last segment of the last context, because that + * would give a protovsid of 0x1fffffffff. That will result in a VSID 0 + * because of the modulo operation in vsid scramble. But the vmemmap + * (which is what uses region 0xf) will never be close to 64TB in size + * (it's 56 bytes per page of system memory). */ +#define CONTEXT_BITS 19 +#define ESID_BITS 18 +#define ESID_BITS_1T 6 + +/* + * 256MB segment + * The proto-VSID space has 2^(CONTEX_BITS + ESID_BITS) - 1 segments + * available for user + kernel mapping. The top 4 contexts are used for + * kernel mapping. Each segment contains 2^28 bytes. Each + * context maps 2^46 bytes (64TB) so we can support 2^19-1 contexts + * (19 == 37 + 28 - 46). + */ +#define MAX_USER_CONTEXT ((ASM_CONST(1) << CONTEXT_BITS) - 5) + /* * This should be computed such that protovosid * vsid_mulitplier * doesn't overflow 64 bits. It should also be co-prime to vsid_modulus */ #define VSID_MULTIPLIER_256M ASM_CONST(12538073) /* 24-bit prime */ -#define VSID_BITS_256M 38 +#define VSID_BITS_256M (CONTEXT_BITS + ESID_BITS) #define VSID_MODULUS_256M ((1UL<<VSID_BITS_256M)-1) #define VSID_MULTIPLIER_1T ASM_CONST(12538073) /* 24-bit prime */ -#define VSID_BITS_1T 26 +#define VSID_BITS_1T (CONTEXT_BITS + ESID_BITS_1T) #define VSID_MODULUS_1T ((1UL<<VSID_BITS_1T)-1) -#define CONTEXT_BITS 19 -#define USER_ESID_BITS 18 -#define USER_ESID_BITS_1T 6 -#define USER_VSID_RANGE (1UL << (USER_ESID_BITS + SID_SHIFT)) +#define USER_VSID_RANGE (1UL << (ESID_BITS + SID_SHIFT)) /* * This macro generates asm code to compute the VSID scramble @@ -421,7 +428,8 @@ extern void slb_set_size(u16 size); srdi rx,rt,VSID_BITS_##size; \ clrldi rt,rt,(64-VSID_BITS_##size); \ add rt,rt,rx; /* add high and low bits */ \ - /* Now, r3 == VSID (mod 2^36-1), and lies between 0 and \ + /* NOTE: explanation based on VSID_BITS_##size = 36 \ + * Now, r3 == VSID (mod 2^36-1), and lies between 0 and \ * 2^36-1+2^28-1. That in particular means that if r3 >= \ * 2^36-1, then r3+1 has the 2^36 bit set. So, if r3+1 has \ * the bit clear, r3 already has the answer we want, if it \ @@ -513,34 +521,6 @@ typedef struct { }) #endif /* 1 */ -/* - * This is only valid for addresses >= PAGE_OFFSET - * The proto-VSID space is divided into two class - * User: 0 to 2^(CONTEXT_BITS + USER_ESID_BITS) -1 - * kernel: 2^(CONTEXT_BITS + USER_ESID_BITS) to 2^(VSID_BITS) - 1 - * - * With KERNEL_START at 0xc000000000000000, the proto vsid for - * the kernel ends up with 0xc00000000 (36 bits). With 64TB - * support we need to have kernel proto-VSID in the - * [2^37 to 2^38 - 1] range due to the increased USER_ESID_BITS. - */ -static inline unsigned long get_kernel_vsid(unsigned long ea, int ssize) -{ - unsigned long proto_vsid; - /* - * We need to make sure proto_vsid for the kernel is - * >= 2^(CONTEXT_BITS + USER_ESID_BITS[_1T]) - */ - if (ssize == MMU_SEGSIZE_256M) { - proto_vsid = ea >> SID_SHIFT; - proto_vsid |= (1UL << (CONTEXT_BITS + USER_ESID_BITS)); - return vsid_scramble(proto_vsid, 256M); - } - proto_vsid = ea >> SID_SHIFT_1T; - proto_vsid |= (1UL << (CONTEXT_BITS + USER_ESID_BITS_1T)); - return vsid_scramble(proto_vsid, 1T); -} - /* Returns the segment size indicator for a user address */ static inline int user_segment_size(unsigned long addr) { @@ -550,17 +530,41 @@ static inline int user_segment_size(unsigned long addr) return MMU_SEGSIZE_256M; } -/* This is only valid for user addresses (which are below 2^44) */ static inline unsigned long get_vsid(unsigned long context, unsigned long ea, int ssize) { + /* + * Bad address. We return VSID 0 for that + */ + if ((ea & ~REGION_MASK) >= PGTABLE_RANGE) + return 0; + if (ssize == MMU_SEGSIZE_256M) - return vsid_scramble((context << USER_ESID_BITS) + return vsid_scramble((context << ESID_BITS) | (ea >> SID_SHIFT), 256M); - return vsid_scramble((context << USER_ESID_BITS_1T) + return vsid_scramble((context << ESID_BITS_1T) | (ea >> SID_SHIFT_1T), 1T); } +/* + * This is only valid for addresses >= PAGE_OFFSET + * + * For kernel space, we use the top 4 context ids to map address as below + * 0x7fffc - [ 0xc000000000000000 - 0xc0003fffffffffff ] + * 0x7fffd - [ 0xd000000000000000 - 0xd0003fffffffffff ] + * 0x7fffe - [ 0xe000000000000000 - 0xe0003fffffffffff ] + * 0x7ffff - [ 0xf000000000000000 - 0xf0003fffffffffff ] + */ +static inline unsigned long get_kernel_vsid(unsigned long ea, int ssize) +{ + unsigned long context; + + /* + * kernel take the top 4 context from the available range + */ + context = (MAX_USER_CONTEXT) + ((ea >> 60) - 0xc) + 1; + return get_vsid(context, ea, ssize); +} #endif /* __ASSEMBLY__ */ #endif /* _ASM_POWERPC_MMU_HASH64_H_ */ diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 75a3d71b895d..19599ef352bc 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c @@ -275,7 +275,7 @@ static struct cpu_spec __initdata cpu_specs[] = { .cpu_features = CPU_FTRS_PPC970, .cpu_user_features = COMMON_USER_POWER4 | PPC_FEATURE_HAS_ALTIVEC_COMP, - .mmu_features = MMU_FTR_HPTE_TABLE, + .mmu_features = MMU_FTRS_PPC970, .icache_bsize = 128, .dcache_bsize = 128, .num_pmcs = 8, diff --git a/arch/powerpc/kernel/epapr_paravirt.c b/arch/powerpc/kernel/epapr_paravirt.c index f3eab8594d9f..d44a571e45a7 100644 --- a/arch/powerpc/kernel/epapr_paravirt.c +++ b/arch/powerpc/kernel/epapr_paravirt.c @@ -23,8 +23,10 @@ #include <asm/code-patching.h> #include <asm/machdep.h> +#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64) extern void epapr_ev_idle(void); extern u32 epapr_ev_idle_start[]; +#endif bool epapr_paravirt_enabled; @@ -47,11 +49,15 @@ static int __init epapr_paravirt_init(void) for (i = 0; i < (len / 4); i++) { patch_instruction(epapr_hypercall_start + i, insts[i]); +#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64) patch_instruction(epapr_ev_idle_start + i, insts[i]); +#endif } +#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64) if (of_get_property(hyper_node, "has-idle", NULL)) ppc_md.power_save = epapr_ev_idle; +#endif epapr_paravirt_enabled = true; diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index 87ef8f5ee5bc..56bd92362ce1 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -1066,78 +1066,6 @@ unrecov_user_slb: #endif /* __DISABLED__ */ -/* - * r13 points to the PACA, r9 contains the saved CR, - * r12 contain the saved SRR1, SRR0 is still ready for return - * r3 has the faulting address - * r9 - r13 are saved in paca->exslb. - * r3 is saved in paca->slb_r3 - * We assume we aren't going to take any exceptions during this procedure. - */ -_GLOBAL(slb_miss_realmode) - mflr r10 -#ifdef CONFIG_RELOCATABLE - mtctr r11 -#endif - - stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */ - std r10,PACA_EXSLB+EX_LR(r13) /* save LR */ - - bl .slb_allocate_realmode - - /* All done -- return from exception. */ - - ld r10,PACA_EXSLB+EX_LR(r13) - ld r3,PACA_EXSLB+EX_R3(r13) - lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */ - - mtlr r10 - - andi. r10,r12,MSR_RI /* check for unrecoverable exception */ - beq- 2f - -.machine push -.machine "power4" - mtcrf 0x80,r9 - mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */ -.machine pop - - RESTORE_PPR_PACA(PACA_EXSLB, r9) - ld r9,PACA_EXSLB+EX_R9(r13) - ld r10,PACA_EXSLB+EX_R10(r13) - ld r11,PACA_EXSLB+EX_R11(r13) - ld r12,PACA_EXSLB+EX_R12(r13) - ld r13,PACA_EXSLB+EX_R13(r13) - rfid - b . /* prevent speculative execution */ - -2: mfspr r11,SPRN_SRR0 - ld r10,PACAKBASE(r13) - LOAD_HANDLER(r10,unrecov_slb) - mtspr SPRN_SRR0,r10 - ld r10,PACAKMSR(r13) - mtspr SPRN_SRR1,r10 - rfid - b . - -unrecov_slb: - EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB) - DISABLE_INTS - bl .save_nvgprs -1: addi r3,r1,STACK_FRAME_OVERHEAD - bl .unrecoverable_exception - b 1b - - -#ifdef CONFIG_PPC_970_NAP -power4_fixup_nap: - andc r9,r9,r10 - std r9,TI_LOCAL_FLAGS(r11) - ld r10,_LINK(r1) /* make idle task do the */ - std r10,_NIP(r1) /* equivalent of a blr */ - blr -#endif - .align 7 .globl alignment_common alignment_common: @@ -1336,6 +1264,78 @@ _GLOBAL(opal_mc_secondary_handler) /* + * r13 points to the PACA, r9 contains the saved CR, + * r12 contain the saved SRR1, SRR0 is still ready for return + * r3 has the faulting address + * r9 - r13 are saved in paca->exslb. + * r3 is saved in paca->slb_r3 + * We assume we aren't going to take any exceptions during this procedure. + */ +_GLOBAL(slb_miss_realmode) + mflr r10 +#ifdef CONFIG_RELOCATABLE + mtctr r11 +#endif + + stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */ + std r10,PACA_EXSLB+EX_LR(r13) /* save LR */ + + bl .slb_allocate_realmode + + /* All done -- return from exception. */ + + ld r10,PACA_EXSLB+EX_LR(r13) + ld r3,PACA_EXSLB+EX_R3(r13) + lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */ + + mtlr r10 + + andi. r10,r12,MSR_RI /* check for unrecoverable exception */ + beq- 2f + +.machine push +.machine "power4" + mtcrf 0x80,r9 + mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */ +.machine pop + + RESTORE_PPR_PACA(PACA_EXSLB, r9) + ld r9,PACA_EXSLB+EX_R9(r13) + ld r10,PACA_EXSLB+EX_R10(r13) + ld r11,PACA_EXSLB+EX_R11(r13) + ld r12,PACA_EXSLB+EX_R12(r13) + ld r13,PACA_EXSLB+EX_R13(r13) + rfid + b . /* prevent speculative execution */ + +2: mfspr r11,SPRN_SRR0 + ld r10,PACAKBASE(r13) + LOAD_HANDLER(r10,unrecov_slb) + mtspr SPRN_SRR0,r10 + ld r10,PACAKMSR(r13) + mtspr SPRN_SRR1,r10 + rfid + b . + +unrecov_slb: + EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB) + DISABLE_INTS + bl .save_nvgprs +1: addi r3,r1,STACK_FRAME_OVERHEAD + bl .unrecoverable_exception + b 1b + + +#ifdef CONFIG_PPC_970_NAP +power4_fixup_nap: + andc r9,r9,r10 + std r9,TI_LOCAL_FLAGS(r11) + ld r10,_LINK(r1) /* make idle task do the */ + std r10,_NIP(r1) /* equivalent of a blr */ + blr +#endif + +/* * Hash table stuff */ .align 7 @@ -1452,20 +1452,36 @@ do_ste_alloc: _GLOBAL(do_stab_bolted) stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */ std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */ + mfspr r11,SPRN_DAR /* ea */ + /* + * check for bad kernel/user address + * (ea & ~REGION_MASK) >= PGTABLE_RANGE + */ + rldicr. r9,r11,4,(63 - 46 - 4) + li r9,0 /* VSID = 0 for bad address */ + bne- 0f + + /* + * Calculate VSID: + * This is the kernel vsid, we take the top for context from + * the range. context = (MAX_USER_CONTEXT) + ((ea >> 60) - 0xc) + 1 + * Here we know that (ea >> 60) == 0xc + */ + lis r9,(MAX_USER_CONTEXT + 1)@ha + addi r9,r9,(MAX_USER_CONTEXT + 1)@l + + srdi r10,r11,SID_SHIFT + rldimi r10,r9,ESID_BITS,0 /* proto vsid */ + ASM_VSID_SCRAMBLE(r10, r9, 256M) + rldic r9,r10,12,16 /* r9 = vsid << 12 */ + +0: /* Hash to the primary group */ ld r10,PACASTABVIRT(r13) - mfspr r11,SPRN_DAR - srdi r11,r11,28 + srdi r11,r11,SID_SHIFT rldimi r10,r11,7,52 /* r10 = first ste of the group */ - /* Calculate VSID */ - /* This is a kernel address, so protovsid = ESID | 1 << 37 */ - li r9,0x1 - rldimi r11,r9,(CONTEXT_BITS + USER_ESID_BITS),0 - ASM_VSID_SCRAMBLE(r11, r9, 256M) - rldic r9,r11,12,16 /* r9 = vsid << 12 */ - /* Search the primary group for a free entry */ 1: ld r11,0(r10) /* Test valid bit of the current ste */ andi. r11,r11,0x80 diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c index 7f7fb7fd991b..13f8d168b3f1 100644 --- a/arch/powerpc/kernel/prom_init.c +++ b/arch/powerpc/kernel/prom_init.c @@ -2832,11 +2832,13 @@ static void unreloc_toc(void) { } #else -static void __reloc_toc(void *tocstart, unsigned long offset, - unsigned long nr_entries) +static void __reloc_toc(unsigned long offset, unsigned long nr_entries) { unsigned long i; - unsigned long *toc_entry = (unsigned long *)tocstart; + unsigned long *toc_entry; + + /* Get the start of the TOC by using r2 directly. */ + asm volatile("addi %0,2,-0x8000" : "=b" (toc_entry)); for (i = 0; i < nr_entries; i++) { *toc_entry = *toc_entry + offset; @@ -2850,8 +2852,7 @@ static void reloc_toc(void) unsigned long nr_entries = (__prom_init_toc_end - __prom_init_toc_start) / sizeof(long); - /* Need to add offset to get at __prom_init_toc_start */ - __reloc_toc(__prom_init_toc_start + offset, offset, nr_entries); + __reloc_toc(offset, nr_entries); mb(); } @@ -2864,8 +2865,7 @@ static void unreloc_toc(void) mb(); - /* __prom_init_toc_start has been relocated, no need to add offset */ - __reloc_toc(__prom_init_toc_start, -offset, nr_entries); + __reloc_toc(-offset, nr_entries); } #endif #endif diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c index 245c1b6a0858..f9b30c68ba47 100644 --- a/arch/powerpc/kernel/ptrace.c +++ b/arch/powerpc/kernel/ptrace.c @@ -1428,6 +1428,7 @@ static long ppc_set_hwdebug(struct task_struct *child, brk.address = bp_info->addr & ~7UL; brk.type = HW_BRK_TYPE_TRANSLATE; + brk.len = 8; if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ) brk.type |= HW_BRK_TYPE_READ; if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE) diff --git a/arch/powerpc/kvm/book3s_64_mmu_host.c b/arch/powerpc/kvm/book3s_64_mmu_host.c index ead58e317294..5d7d29a313eb 100644 --- a/arch/powerpc/kvm/book3s_64_mmu_host.c +++ b/arch/powerpc/kvm/book3s_64_mmu_host.c @@ -326,8 +326,8 @@ int kvmppc_mmu_init(struct kvm_vcpu *vcpu) vcpu3s->context_id[0] = err; vcpu3s->proto_vsid_max = ((vcpu3s->context_id[0] + 1) - << USER_ESID_BITS) - 1; - vcpu3s->proto_vsid_first = vcpu3s->context_id[0] << USER_ESID_BITS; + << ESID_BITS) - 1; + vcpu3s->proto_vsid_first = vcpu3s->context_id[0] << ESID_BITS; vcpu3s->proto_vsid_next = vcpu3s->proto_vsid_first; kvmppc_mmu_hpte_init(vcpu); diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c index 1b6e1271719f..f410c3e12c1e 100644 --- a/arch/powerpc/mm/hash_utils_64.c +++ b/arch/powerpc/mm/hash_utils_64.c @@ -195,6 +195,11 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend, unsigned long vpn = hpt_vpn(vaddr, vsid, ssize); unsigned long tprot = prot; + /* + * If we hit a bad address return error. + */ + if (!vsid) + return -1; /* Make kernel text executable */ if (overlaps_kernel_text(vaddr, vaddr + step)) tprot &= ~HPTE_R_N; @@ -759,6 +764,8 @@ void __init early_init_mmu(void) /* Initialize stab / SLB management */ if (mmu_has_feature(MMU_FTR_SLB)) slb_initialize(); + else + stab_initialize(get_paca()->stab_real); } #ifdef CONFIG_SMP @@ -922,11 +929,6 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap) DBG_LOW("hash_page(ea=%016lx, access=%lx, trap=%lx\n", ea, access, trap); - if ((ea & ~REGION_MASK) >= PGTABLE_RANGE) { - DBG_LOW(" out of pgtable range !\n"); - return 1; - } - /* Get region & vsid */ switch (REGION_ID(ea)) { case USER_REGION_ID: @@ -957,6 +959,11 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap) } DBG_LOW(" mm=%p, mm->pgdir=%p, vsid=%016lx\n", mm, mm->pgd, vsid); + /* Bad address. */ + if (!vsid) { + DBG_LOW("Bad address!\n"); + return 1; + } /* Get pgdir */ pgdir = mm->pgd; if (pgdir == NULL) @@ -1126,6 +1133,8 @@ void hash_preload(struct mm_struct *mm, unsigned long ea, /* Get VSID */ ssize = user_segment_size(ea); vsid = get_vsid(mm->context.id, ea, ssize); + if (!vsid) + return; /* Hash doesn't like irqs */ local_irq_save(flags); @@ -1233,6 +1242,9 @@ static void kernel_map_linear_page(unsigned long vaddr, unsigned long lmi) hash = hpt_hash(vpn, PAGE_SHIFT, mmu_kernel_ssize); hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP); + /* Don't create HPTE entries for bad address */ + if (!vsid) + return; ret = ppc_md.hpte_insert(hpteg, vpn, __pa(vaddr), mode, HPTE_V_BOLTED, mmu_linear_psize, mmu_kernel_ssize); diff --git a/arch/powerpc/mm/mmu_context_hash64.c b/arch/powerpc/mm/mmu_context_hash64.c index 40bc5b0ace54..d1d1b92c5b99 100644 --- a/arch/powerpc/mm/mmu_context_hash64.c +++ b/arch/powerpc/mm/mmu_context_hash64.c @@ -29,15 +29,6 @@ static DEFINE_SPINLOCK(mmu_context_lock); static DEFINE_IDA(mmu_context_ida); -/* - * 256MB segment - * The proto-VSID space has 2^(CONTEX_BITS + USER_ESID_BITS) - 1 segments - * available for user mappings. Each segment contains 2^28 bytes. Each - * context maps 2^46 bytes (64TB) so we can support 2^19-1 contexts - * (19 == 37 + 28 - 46). - */ -#define MAX_CONTEXT ((1UL << CONTEXT_BITS) - 1) - int __init_new_context(void) { int index; @@ -56,7 +47,7 @@ again: else if (err) return err; - if (index > MAX_CONTEXT) { + if (index > MAX_USER_CONTEXT) { spin_lock(&mmu_context_lock); ida_remove(&mmu_context_ida, index); spin_unlock(&mmu_context_lock); diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c index e212a271c7a4..654258f165ae 100644 --- a/arch/powerpc/mm/pgtable_64.c +++ b/arch/powerpc/mm/pgtable_64.c @@ -61,7 +61,7 @@ #endif #ifdef CONFIG_PPC_STD_MMU_64 -#if TASK_SIZE_USER64 > (1UL << (USER_ESID_BITS + SID_SHIFT)) +#if TASK_SIZE_USER64 > (1UL << (ESID_BITS + SID_SHIFT)) #error TASK_SIZE_USER64 exceeds user VSID range #endif #endif diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S index 1a16ca227757..17aa6dfceb34 100644 --- a/arch/powerpc/mm/slb_low.S +++ b/arch/powerpc/mm/slb_low.S @@ -31,10 +31,15 @@ * No other registers are examined or changed. */ _GLOBAL(slb_allocate_realmode) - /* r3 = faulting address */ + /* + * check for bad kernel/user address + * (ea & ~REGION_MASK) >= PGTABLE_RANGE + */ + rldicr. r9,r3,4,(63 - 46 - 4) + bne- 8f srdi r9,r3,60 /* get region */ - srdi r10,r3,28 /* get esid */ + srdi r10,r3,SID_SHIFT /* get esid */ cmpldi cr7,r9,0xc /* cmp PAGE_OFFSET for later use */ /* r3 = address, r10 = esid, cr7 = <> PAGE_OFFSET */ @@ -56,12 +61,14 @@ _GLOBAL(slb_allocate_realmode) */ _GLOBAL(slb_miss_kernel_load_linear) li r11,0 - li r9,0x1 /* - * for 1T we shift 12 bits more. slb_finish_load_1T will do - * the necessary adjustment + * context = (MAX_USER_CONTEXT) + ((ea >> 60) - 0xc) + 1 + * r9 = region id. */ - rldimi r10,r9,(CONTEXT_BITS + USER_ESID_BITS),0 + addis r9,r9,(MAX_USER_CONTEXT - 0xc + 1)@ha + addi r9,r9,(MAX_USER_CONTEXT - 0xc + 1)@l + + BEGIN_FTR_SECTION b slb_finish_load END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT) @@ -91,24 +98,19 @@ _GLOBAL(slb_miss_kernel_load_vmemmap) _GLOBAL(slb_miss_kernel_load_io) li r11,0 6: - li r9,0x1 /* - * for 1T we shift 12 bits more. slb_finish_load_1T will do - * the necessary adjustment + * context = (MAX_USER_CONTEXT) + ((ea >> 60) - 0xc) + 1 + * r9 = region id. */ - rldimi r10,r9,(CONTEXT_BITS + USER_ESID_BITS),0 + addis r9,r9,(MAX_USER_CONTEXT - 0xc + 1)@ha + addi r9,r9,(MAX_USER_CONTEXT - 0xc + 1)@l + BEGIN_FTR_SECTION b slb_finish_load END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT) b slb_finish_load_1T -0: /* user address: proto-VSID = context << 15 | ESID. First check - * if the address is within the boundaries of the user region - */ - srdi. r9,r10,USER_ESID_BITS - bne- 8f /* invalid ea bits set */ - - +0: /* when using slices, we extract the psize off the slice bitmaps * and then we need to get the sllp encoding off the mmu_psize_defs * array. @@ -164,15 +166,13 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT) ld r9,PACACONTEXTID(r13) BEGIN_FTR_SECTION cmpldi r10,0x1000 -END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT) - rldimi r10,r9,USER_ESID_BITS,0 -BEGIN_FTR_SECTION bge slb_finish_load_1T END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT) b slb_finish_load 8: /* invalid EA */ li r10,0 /* BAD_VSID */ + li r9,0 /* BAD_VSID */ li r11,SLB_VSID_USER /* flags don't much matter */ b slb_finish_load @@ -221,8 +221,6 @@ _GLOBAL(slb_allocate_user) /* get context to calculate proto-VSID */ ld r9,PACACONTEXTID(r13) - rldimi r10,r9,USER_ESID_BITS,0 - /* fall through slb_finish_load */ #endif /* __DISABLED__ */ @@ -231,9 +229,10 @@ _GLOBAL(slb_allocate_user) /* * Finish loading of an SLB entry and return * - * r3 = EA, r10 = proto-VSID, r11 = flags, clobbers r9, cr7 = <> PAGE_OFFSET + * r3 = EA, r9 = context, r10 = ESID, r11 = flags, clobbers r9, cr7 = <> PAGE_OFFSET */ slb_finish_load: + rldimi r10,r9,ESID_BITS,0 ASM_VSID_SCRAMBLE(r10,r9,256M) /* * bits above VSID_BITS_256M need to be ignored from r10 @@ -298,10 +297,11 @@ _GLOBAL(slb_compare_rr_to_size) /* * Finish loading of a 1T SLB entry (for the kernel linear mapping) and return. * - * r3 = EA, r10 = proto-VSID, r11 = flags, clobbers r9 + * r3 = EA, r9 = context, r10 = ESID(256MB), r11 = flags, clobbers r9 */ slb_finish_load_1T: - srdi r10,r10,40-28 /* get 1T ESID */ + srdi r10,r10,(SID_SHIFT_1T - SID_SHIFT) /* get 1T ESID */ + rldimi r10,r9,ESID_BITS_1T,0 ASM_VSID_SCRAMBLE(r10,r9,1T) /* * bits above VSID_BITS_1T need to be ignored from r10 diff --git a/arch/powerpc/mm/tlb_hash64.c b/arch/powerpc/mm/tlb_hash64.c index 0d82ef50dc3f..023ec8a13f38 100644 --- a/arch/powerpc/mm/tlb_hash64.c +++ b/arch/powerpc/mm/tlb_hash64.c @@ -82,11 +82,11 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr, if (!is_kernel_addr(addr)) { ssize = user_segment_size(addr); vsid = get_vsid(mm->context.id, addr, ssize); - WARN_ON(vsid == 0); } else { vsid = get_kernel_vsid(addr, mmu_kernel_ssize); ssize = mmu_kernel_ssize; } + WARN_ON(vsid == 0); vpn = hpt_vpn(addr, vsid, ssize); rpte = __real_pte(__pte(pte), ptep); diff --git a/arch/powerpc/perf/power7-pmu.c b/arch/powerpc/perf/power7-pmu.c index b554879bd31e..3c475d6267c7 100644 --- a/arch/powerpc/perf/power7-pmu.c +++ b/arch/powerpc/perf/power7-pmu.c @@ -420,7 +420,20 @@ static struct attribute_group power7_pmu_events_group = { .attrs = power7_events_attr, }; +PMU_FORMAT_ATTR(event, "config:0-19"); + +static struct attribute *power7_pmu_format_attr[] = { + &format_attr_event.attr, + NULL, +}; + +struct attribute_group power7_pmu_format_group = { + .name = "format", + .attrs = power7_pmu_format_attr, +}; + static const struct attribute_group *power7_pmu_attr_groups[] = { + &power7_pmu_format_group, &power7_pmu_events_group, NULL, }; diff --git a/arch/powerpc/platforms/85xx/sgy_cts1000.c b/arch/powerpc/platforms/85xx/sgy_cts1000.c index 611e92f291c4..7179726ba5c5 100644 --- a/arch/powerpc/platforms/85xx/sgy_cts1000.c +++ b/arch/powerpc/platforms/85xx/sgy_cts1000.c @@ -69,7 +69,7 @@ static irqreturn_t gpio_halt_irq(int irq, void *__data) return IRQ_HANDLED; }; -static int __devinit gpio_halt_probe(struct platform_device *pdev) +static int gpio_halt_probe(struct platform_device *pdev) { enum of_gpio_flags flags; struct device_node *node = pdev->dev.of_node; @@ -128,7 +128,7 @@ static int __devinit gpio_halt_probe(struct platform_device *pdev) return 0; } -static int __devexit gpio_halt_remove(struct platform_device *pdev) +static int gpio_halt_remove(struct platform_device *pdev) { if (halt_node) { int gpio = of_get_gpio(halt_node, 0); @@ -165,7 +165,7 @@ static struct platform_driver gpio_halt_driver = { .of_match_table = gpio_halt_match, }, .probe = gpio_halt_probe, - .remove = __devexit_p(gpio_halt_remove), + .remove = gpio_halt_remove, }; module_platform_driver(gpio_halt_driver); diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype index cea2f09c4241..18e3b76c78d7 100644 --- a/arch/powerpc/platforms/Kconfig.cputype +++ b/arch/powerpc/platforms/Kconfig.cputype @@ -124,9 +124,8 @@ config 6xx select PPC_HAVE_PMU_SUPPORT config POWER3 - bool depends on PPC64 && PPC_BOOK3S - default y if !POWER4_ONLY + def_bool y config POWER4 depends on PPC64 && PPC_BOOK3S @@ -145,8 +144,7 @@ config TUNE_CELL but somewhat slower on other machines. This option only changes the scheduling of instructions, not the selection of instructions itself, so the resulting kernel will keep running on all other - machines. When building a kernel that is supposed to run only - on Cell, you should also select the POWER4_ONLY option. + machines. # this is temp to handle compat with arch=ppc config 8xx diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig index 4b505370a1d5..eb8fb629f00b 100644 --- a/arch/s390/Kconfig +++ b/arch/s390/Kconfig @@ -134,7 +134,7 @@ config S390 select HAVE_SYSCALL_WRAPPERS select HAVE_UID16 if 32BIT select HAVE_VIRT_CPU_ACCOUNTING - select HAVE_VIRT_TO_BUS + select VIRT_TO_BUS select INIT_ALL_POSSIBLE select KTIME_SCALAR if 32BIT select MODULES_USE_ELF_RELA diff --git a/arch/s390/include/asm/cpu_mf.h b/arch/s390/include/asm/cpu_mf.h index f1eddd150dd7..c879fad404c8 100644 --- a/arch/s390/include/asm/cpu_mf.h +++ b/arch/s390/include/asm/cpu_mf.h @@ -12,6 +12,7 @@ #ifndef _ASM_S390_CPU_MF_H #define _ASM_S390_CPU_MF_H +#include <linux/errno.h> #include <asm/facility.h> #define CPU_MF_INT_SF_IAE (1 << 31) /* invalid entry address */ diff --git a/arch/s390/include/asm/eadm.h b/arch/s390/include/asm/eadm.h index 8d4847191ecc..dc9200ca32ed 100644 --- a/arch/s390/include/asm/eadm.h +++ b/arch/s390/include/asm/eadm.h @@ -34,6 +34,8 @@ struct arsb { u32 reserved[4]; } __packed; +#define EQC_WR_PROHIBIT 22 + struct msb { u8 fmt:4; u8 oc:4; @@ -96,11 +98,13 @@ struct scm_device { #define OP_STATE_TEMP_ERR 2 #define OP_STATE_PERM_ERR 3 +enum scm_event {SCM_CHANGE, SCM_AVAIL}; + struct scm_driver { struct device_driver drv; int (*probe) (struct scm_device *scmdev); int (*remove) (struct scm_device *scmdev); - void (*notify) (struct scm_device *scmdev); + void (*notify) (struct scm_device *scmdev, enum scm_event event); void (*handler) (struct scm_device *scmdev, void *data, int error); }; diff --git a/arch/s390/include/asm/tlbflush.h b/arch/s390/include/asm/tlbflush.h index 1d8fe2b17ef6..6b32af30878c 100644 --- a/arch/s390/include/asm/tlbflush.h +++ b/arch/s390/include/asm/tlbflush.h @@ -74,8 +74,6 @@ static inline void __tlb_flush_idte(unsigned long asce) static inline void __tlb_flush_mm(struct mm_struct * mm) { - if (unlikely(cpumask_empty(mm_cpumask(mm)))) - return; /* * If the machine has IDTE we prefer to do a per mm flush * on all cpus instead of doing a local flush if the mm diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S index 550228523267..94feff7d6132 100644 --- a/arch/s390/kernel/entry.S +++ b/arch/s390/kernel/entry.S @@ -636,7 +636,8 @@ ENTRY(mcck_int_handler) UPDATE_VTIME %r14,%r15,__LC_MCCK_ENTER_TIMER mcck_skip: SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+32,__LC_PANIC_STACK,PAGE_SHIFT - mvc __PT_R0(64,%r11),__LC_GPREGS_SAVE_AREA + stm %r0,%r7,__PT_R0(%r11) + mvc __PT_R8(32,%r11),__LC_GPREGS_SAVE_AREA+32 stm %r8,%r9,__PT_PSW(%r11) xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) l %r1,BASED(.Ldo_machine_check) diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S index 9c837c101297..2e6d60c55f90 100644 --- a/arch/s390/kernel/entry64.S +++ b/arch/s390/kernel/entry64.S @@ -678,8 +678,9 @@ ENTRY(mcck_int_handler) UPDATE_VTIME %r14,__LC_MCCK_ENTER_TIMER LAST_BREAK %r14 mcck_skip: - lghi %r14,__LC_GPREGS_SAVE_AREA - mvc __PT_R0(128,%r11),0(%r14) + lghi %r14,__LC_GPREGS_SAVE_AREA+64 + stmg %r0,%r7,__PT_R0(%r11) + mvc __PT_R8(64,%r11),0(%r14) stmg %r8,%r9,__PT_PSW(%r11) xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) lgr %r2,%r11 # pass pointer to pt_regs diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c index a5360de85ec7..29268859d8ee 100644 --- a/arch/s390/kernel/setup.c +++ b/arch/s390/kernel/setup.c @@ -571,6 +571,8 @@ static void __init setup_memory_end(void) /* Split remaining virtual space between 1:1 mapping & vmemmap array */ tmp = VMALLOC_START / (PAGE_SIZE + sizeof(struct page)); + /* vmemmap contains a multiple of PAGES_PER_SECTION struct pages */ + tmp = SECTION_ALIGN_UP(tmp); tmp = VMALLOC_START - tmp * sizeof(struct page); tmp &= ~((vmax >> 11) - 1); /* align to page table level */ tmp = min(tmp, 1UL << MAX_PHYSMEM_BITS); diff --git a/arch/score/Kconfig b/arch/score/Kconfig index e569aa1fd2ba..c8def8bc9020 100644 --- a/arch/score/Kconfig +++ b/arch/score/Kconfig @@ -12,7 +12,7 @@ config SCORE select GENERIC_CPU_DEVICES select GENERIC_CLOCKEVENTS select HAVE_MOD_ARCH_SPECIFIC - select HAVE_VIRT_TO_BUS + select VIRT_TO_BUS select MODULES_USE_ELF_REL select CLONE_BACKWARDS diff --git a/arch/sh/kernel/cpu/sh2a/pinmux-sh7203.c b/arch/sh/kernel/cpu/sh2a/pinmux-sh7203.c index 96c6c2634cb4..eef17dcc3a41 100644 --- a/arch/sh/kernel/cpu/sh2a/pinmux-sh7203.c +++ b/arch/sh/kernel/cpu/sh2a/pinmux-sh7203.c @@ -8,12 +8,23 @@ * for more details. */ +#include <linux/bug.h> #include <linux/init.h> #include <linux/kernel.h> +#include <linux/ioport.h> #include <cpu/pfc.h> +static struct resource sh7203_pfc_resources[] = { + [0] = { + .start = 0xfffe3800, + .end = 0xfffe3a9f, + .flags = IORESOURCE_MEM, + }, +}; + static int __init plat_pinmux_setup(void) { - return sh_pfc_register("pfc-sh7203", NULL, 0); + return sh_pfc_register("pfc-sh7203", sh7203_pfc_resources, + ARRAY_SIZE(sh7203_pfc_resources)); } arch_initcall(plat_pinmux_setup); diff --git a/arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c b/arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c index b1b7c1bae127..569decbd6d93 100644 --- a/arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c +++ b/arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c @@ -8,12 +8,23 @@ * for more details. */ +#include <linux/bug.h> #include <linux/init.h> #include <linux/kernel.h> +#include <linux/ioport.h> #include <cpu/pfc.h> +static struct resource sh7264_pfc_resources[] = { + [0] = { + .start = 0xfffe3800, + .end = 0xfffe393f, + .flags = IORESOURCE_MEM, + }, +}; + static int __init plat_pinmux_setup(void) { - return sh_pfc_register("pfc-sh7264", NULL, 0); + return sh_pfc_register("pfc-sh7264", sh7264_pfc_resources, + ARRAY_SIZE(sh7264_pfc_resources)); } arch_initcall(plat_pinmux_setup); diff --git a/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c b/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c index dc2a86830456..4c17fb6970b1 100644 --- a/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c +++ b/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c @@ -9,12 +9,23 @@ * for more details. */ +#include <linux/bug.h> #include <linux/init.h> +#include <linux/ioport.h> #include <linux/kernel.h> #include <cpu/pfc.h> +static struct resource sh7269_pfc_resources[] = { + [0] = { + .start = 0xfffe3800, + .end = 0xfffe391f, + .flags = IORESOURCE_MEM, + }, +}; + static int __init plat_pinmux_setup(void) { - return sh_pfc_register("pfc-sh7269", NULL, 0); + return sh_pfc_register("pfc-sh7269", sh7269_pfc_resources, + ARRAY_SIZE(sh7269_pfc_resources)); } arch_initcall(plat_pinmux_setup); diff --git a/arch/sh/kernel/cpu/sh3/pinmux-sh7720.c b/arch/sh/kernel/cpu/sh3/pinmux-sh7720.c index 7d3744ac7b08..26e90a66ebb7 100644 --- a/arch/sh/kernel/cpu/sh3/pinmux-sh7720.c +++ b/arch/sh/kernel/cpu/sh3/pinmux-sh7720.c @@ -8,13 +8,23 @@ * for more details. */ +#include <linux/bug.h> #include <linux/init.h> #include <linux/kernel.h> +#include <linux/ioport.h> #include <cpu/pfc.h> +static struct resource sh7720_pfc_resources[] = { + [0] = { + .start = 0xa4050100, + .end = 0xa405016f, + .flags = IORESOURCE_MEM, + }, +}; + static int __init plat_pinmux_setup(void) { - return sh_pfc_register("pfc-sh7720", NULL, 0); + return sh_pfc_register("pfc-sh7720", sh7720_pfc_resources, + ARRAY_SIZE(sh7720_pfc_resources)); } - arch_initcall(plat_pinmux_setup); diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c index d9bcc4290997..271bbc864929 100644 --- a/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c @@ -1,10 +1,20 @@ +#include <linux/bug.h> #include <linux/init.h> #include <linux/kernel.h> +#include <linux/ioport.h> #include <cpu/pfc.h> +static struct resource sh7722_pfc_resources[] = { + [0] = { + .start = 0xa4050100, + .end = 0xa405018f, + .flags = IORESOURCE_MEM, + }, +}; + static int __init plat_pinmux_setup(void) { - return sh_pfc_register("pfc-sh7722", NULL, 0); + return sh_pfc_register("pfc-sh7722", sh7722_pfc_resources, + ARRAY_SIZE(sh7722_pfc_resources)); } - arch_initcall(plat_pinmux_setup); diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7723.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7723.c index bcec7ad7f783..99c637d5bf7a 100644 --- a/arch/sh/kernel/cpu/sh4a/pinmux-sh7723.c +++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7723.c @@ -8,13 +8,23 @@ * for more details. */ +#include <linux/bug.h> #include <linux/init.h> #include <linux/kernel.h> +#include <linux/ioport.h> #include <cpu/pfc.h> +static struct resource sh7723_pfc_resources[] = { + [0] = { + .start = 0xa4050100, + .end = 0xa405016f, + .flags = IORESOURCE_MEM, + }, +}; + static int __init plat_pinmux_setup(void) { - return sh_pfc_register("pfc-sh7723", NULL, 0); + return sh_pfc_register("pfc-sh7723", sh7723_pfc_resources, + ARRAY_SIZE(sh7723_pfc_resources)); } - arch_initcall(plat_pinmux_setup); diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7724.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7724.c index 5c3541d6aed8..63be4749e341 100644 --- a/arch/sh/kernel/cpu/sh4a/pinmux-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7724.c @@ -13,12 +13,23 @@ * for more details. */ +#include <linux/bug.h> #include <linux/init.h> #include <linux/kernel.h> +#include <linux/ioport.h> #include <cpu/pfc.h> +static struct resource sh7724_pfc_resources[] = { + [0] = { + .start = 0xa4050100, + .end = 0xa405016f, + .flags = IORESOURCE_MEM, + }, +}; + static int __init plat_pinmux_setup(void) { - return sh_pfc_register("pfc-sh7724", NULL, 0); + return sh_pfc_register("pfc-sh7724", sh7724_pfc_resources, + ARRAY_SIZE(sh7724_pfc_resources)); } arch_initcall(plat_pinmux_setup); diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c index cda6bd177b8c..567745d44221 100644 --- a/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c +++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c @@ -13,12 +13,23 @@ * for more details. */ +#include <linux/bug.h> #include <linux/init.h> #include <linux/kernel.h> +#include <linux/ioport.h> #include <cpu/pfc.h> +static struct resource sh7757_pfc_resources[] = { + [0] = { + .start = 0xffec0000, + .end = 0xffec008f, + .flags = IORESOURCE_MEM, + }, +}; + static int __init plat_pinmux_setup(void) { - return sh_pfc_register("pfc-sh7757", NULL, 0); + return sh_pfc_register("pfc-sh7757", sh7757_pfc_resources, + ARRAY_SIZE(sh7757_pfc_resources)); } arch_initcall(plat_pinmux_setup); diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7785.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7785.c index 01055b809f64..e336ab8b5125 100644 --- a/arch/sh/kernel/cpu/sh4a/pinmux-sh7785.c +++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7785.c @@ -8,13 +8,23 @@ * for more details. */ +#include <linux/bug.h> #include <linux/init.h> #include <linux/kernel.h> +#include <linux/ioport.h> #include <cpu/pfc.h> +static struct resource sh7785_pfc_resources[] = { + [0] = { + .start = 0xffe70000, + .end = 0xffe7008f, + .flags = IORESOURCE_MEM, + }, +}; + static int __init plat_pinmux_setup(void) { - return sh_pfc_register("pfc-sh7785", NULL, 0); + return sh_pfc_register("pfc-sh7785", sh7785_pfc_resources, + ARRAY_SIZE(sh7785_pfc_resources)); } - arch_initcall(plat_pinmux_setup); diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c index 3061778d55da..9a459556a2f7 100644 --- a/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c +++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c @@ -13,13 +13,23 @@ * for more details. */ +#include <linux/bug.h> #include <linux/init.h> #include <linux/kernel.h> +#include <linux/ioport.h> #include <cpu/pfc.h> +static struct resource sh7786_pfc_resources[] = { + [0] = { + .start = 0xffcc0000, + .end = 0xffcc008f, + .flags = IORESOURCE_MEM, + }, +}; + static int __init plat_pinmux_setup(void) { - return sh_pfc_register("pfc-sh7786", NULL, 0); + return sh_pfc_register("pfc-sh7786", sh7786_pfc_resources, + ARRAY_SIZE(sh7786_pfc_resources)); } - arch_initcall(plat_pinmux_setup); diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-shx3.c b/arch/sh/kernel/cpu/sh4a/pinmux-shx3.c index ace84acc55ea..444bf25c60fa 100644 --- a/arch/sh/kernel/cpu/sh4a/pinmux-shx3.c +++ b/arch/sh/kernel/cpu/sh4a/pinmux-shx3.c @@ -7,12 +7,23 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. */ +#include <linux/bug.h> #include <linux/init.h> #include <linux/kernel.h> +#include <linux/ioport.h> #include <cpu/pfc.h> -static int __init shx3_pinmux_setup(void) +static struct resource shx3_pfc_resources[] = { + [0] = { + .start = 0xffc70000, + .end = 0xffc7001f, + .flags = IORESOURCE_MEM, + }, +}; + +static int __init plat_pinmux_setup(void) { - return sh_pfc_register("pfc-shx3", NULL, 0); + return sh_pfc_register("pfc-shx3", shx3_pfc_resources, + ARRAY_SIZE(shx3_pfc_resources)); } -arch_initcall(shx3_pinmux_setup); +arch_initcall(plat_pinmux_setup); diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index 289127d5241c..3d361f236308 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig @@ -84,12 +84,6 @@ config ARCH_DEFCONFIG default "arch/sparc/configs/sparc32_defconfig" if SPARC32 default "arch/sparc/configs/sparc64_defconfig" if SPARC64 -# CONFIG_BITS can be used at source level to get 32/64 bits -config BITS - int - default 32 if SPARC32 - default 64 if SPARC64 - config IOMMU_HELPER bool default y if SPARC64 @@ -197,7 +191,7 @@ config RWSEM_XCHGADD_ALGORITHM config GENERIC_HWEIGHT bool - default y if !ULTRA_HAS_POPULATION_COUNT + default y config GENERIC_CALIBRATE_DELAY bool diff --git a/arch/sparc/include/asm/spitfire.h b/arch/sparc/include/asm/spitfire.h index d06a26601753..6b67e50fb9b4 100644 --- a/arch/sparc/include/asm/spitfire.h +++ b/arch/sparc/include/asm/spitfire.h @@ -45,6 +45,7 @@ #define SUN4V_CHIP_NIAGARA3 0x03 #define SUN4V_CHIP_NIAGARA4 0x04 #define SUN4V_CHIP_NIAGARA5 0x05 +#define SUN4V_CHIP_SPARC64X 0x8a #define SUN4V_CHIP_UNKNOWN 0xff #ifndef __ASSEMBLY__ diff --git a/arch/sparc/kernel/cpu.c b/arch/sparc/kernel/cpu.c index a6c94a2bf9d4..5c5125895db8 100644 --- a/arch/sparc/kernel/cpu.c +++ b/arch/sparc/kernel/cpu.c @@ -493,6 +493,12 @@ static void __init sun4v_cpu_probe(void) sparc_pmu_type = "niagara5"; break; + case SUN4V_CHIP_SPARC64X: + sparc_cpu_type = "SPARC64-X"; + sparc_fpu_type = "SPARC64-X integrated FPU"; + sparc_pmu_type = "sparc64-x"; + break; + default: printk(KERN_WARNING "CPU: Unknown sun4v cpu type [%s]\n", prom_cpu_compatible); diff --git a/arch/sparc/kernel/head_64.S b/arch/sparc/kernel/head_64.S index 2feb15c35d9e..26b706a1867d 100644 --- a/arch/sparc/kernel/head_64.S +++ b/arch/sparc/kernel/head_64.S @@ -134,6 +134,8 @@ prom_niagara_prefix: .asciz "SUNW,UltraSPARC-T" prom_sparc_prefix: .asciz "SPARC-" +prom_sparc64x_prefix: + .asciz "SPARC64-X" .align 4 prom_root_compatible: .skip 64 @@ -412,7 +414,7 @@ sun4v_chip_type: cmp %g2, 'T' be,pt %xcc, 70f cmp %g2, 'M' - bne,pn %xcc, 4f + bne,pn %xcc, 49f nop 70: ldub [%g1 + 7], %g2 @@ -425,7 +427,7 @@ sun4v_chip_type: cmp %g2, '5' be,pt %xcc, 5f mov SUN4V_CHIP_NIAGARA5, %g4 - ba,pt %xcc, 4f + ba,pt %xcc, 49f nop 91: sethi %hi(prom_cpu_compatible), %g1 @@ -439,6 +441,25 @@ sun4v_chip_type: mov SUN4V_CHIP_NIAGARA2, %g4 4: + /* Athena */ + sethi %hi(prom_cpu_compatible), %g1 + or %g1, %lo(prom_cpu_compatible), %g1 + sethi %hi(prom_sparc64x_prefix), %g7 + or %g7, %lo(prom_sparc64x_prefix), %g7 + mov 9, %g3 +41: ldub [%g7], %g2 + ldub [%g1], %g4 + cmp %g2, %g4 + bne,pn %icc, 49f + add %g7, 1, %g7 + subcc %g3, 1, %g3 + bne,pt %xcc, 41b + add %g1, 1, %g1 + mov SUN4V_CHIP_SPARC64X, %g4 + ba,pt %xcc, 5f + nop + +49: mov SUN4V_CHIP_UNKNOWN, %g4 5: sethi %hi(sun4v_chip_type), %g2 or %g2, %lo(sun4v_chip_type), %g2 diff --git a/arch/sparc/kernel/leon_pci_grpci2.c b/arch/sparc/kernel/leon_pci_grpci2.c index fc4320886a3a..4d1487138d26 100644 --- a/arch/sparc/kernel/leon_pci_grpci2.c +++ b/arch/sparc/kernel/leon_pci_grpci2.c @@ -186,6 +186,8 @@ struct grpci2_cap_first { #define CAP9_IOMAP_OFS 0x20 #define CAP9_BARSIZE_OFS 0x24 +#define TGT 256 + struct grpci2_priv { struct leon_pci_info info; /* must be on top of this structure */ struct grpci2_regs *regs; @@ -237,8 +239,12 @@ static int grpci2_cfg_r32(struct grpci2_priv *priv, unsigned int bus, if (where & 0x3) return -EINVAL; - if (bus == 0 && PCI_SLOT(devfn) != 0) - devfn += (0x8 * 6); + if (bus == 0) { + devfn += (0x8 * 6); /* start at AD16=Device0 */ + } else if (bus == TGT) { + bus = 0; + devfn = 0; /* special case: bridge controller itself */ + } /* Select bus */ spin_lock_irqsave(&grpci2_dev_lock, flags); @@ -303,8 +309,12 @@ static int grpci2_cfg_w32(struct grpci2_priv *priv, unsigned int bus, if (where & 0x3) return -EINVAL; - if (bus == 0 && PCI_SLOT(devfn) != 0) - devfn += (0x8 * 6); + if (bus == 0) { + devfn += (0x8 * 6); /* start at AD16=Device0 */ + } else if (bus == TGT) { + bus = 0; + devfn = 0; /* special case: bridge controller itself */ + } /* Select bus */ spin_lock_irqsave(&grpci2_dev_lock, flags); @@ -368,7 +378,7 @@ static int grpci2_read_config(struct pci_bus *bus, unsigned int devfn, unsigned int busno = bus->number; int ret; - if (PCI_SLOT(devfn) > 15 || (PCI_SLOT(devfn) == 0 && busno == 0)) { + if (PCI_SLOT(devfn) > 15 || busno > 255) { *val = ~0; return 0; } @@ -406,7 +416,7 @@ static int grpci2_write_config(struct pci_bus *bus, unsigned int devfn, struct grpci2_priv *priv = grpci2priv; unsigned int busno = bus->number; - if (PCI_SLOT(devfn) > 15 || (PCI_SLOT(devfn) == 0 && busno == 0)) + if (PCI_SLOT(devfn) > 15 || busno > 255) return 0; #ifdef GRPCI2_DEBUG_CFGACCESS @@ -578,15 +588,15 @@ void grpci2_hw_init(struct grpci2_priv *priv) REGSTORE(regs->ahbmst_map[i], priv->pci_area); /* Get the GRPCI2 Host PCI ID */ - grpci2_cfg_r32(priv, 0, 0, PCI_VENDOR_ID, &priv->pciid); + grpci2_cfg_r32(priv, TGT, 0, PCI_VENDOR_ID, &priv->pciid); /* Get address to first (always defined) capability structure */ - grpci2_cfg_r8(priv, 0, 0, PCI_CAPABILITY_LIST, &capptr); + grpci2_cfg_r8(priv, TGT, 0, PCI_CAPABILITY_LIST, &capptr); /* Enable/Disable Byte twisting */ - grpci2_cfg_r32(priv, 0, 0, capptr+CAP9_IOMAP_OFS, &io_map); + grpci2_cfg_r32(priv, TGT, 0, capptr+CAP9_IOMAP_OFS, &io_map); io_map = (io_map & ~0x1) | (priv->bt_enabled ? 1 : 0); - grpci2_cfg_w32(priv, 0, 0, capptr+CAP9_IOMAP_OFS, io_map); + grpci2_cfg_w32(priv, TGT, 0, capptr+CAP9_IOMAP_OFS, io_map); /* Setup the Host's PCI Target BARs for other peripherals to access, * and do DMA to the host's memory. The target BARs can be sized and @@ -617,17 +627,18 @@ void grpci2_hw_init(struct grpci2_priv *priv) pciadr = 0; } } - grpci2_cfg_w32(priv, 0, 0, capptr+CAP9_BARSIZE_OFS+i*4, bar_sz); - grpci2_cfg_w32(priv, 0, 0, PCI_BASE_ADDRESS_0+i*4, pciadr); - grpci2_cfg_w32(priv, 0, 0, capptr+CAP9_BAR_OFS+i*4, ahbadr); + grpci2_cfg_w32(priv, TGT, 0, capptr+CAP9_BARSIZE_OFS+i*4, + bar_sz); + grpci2_cfg_w32(priv, TGT, 0, PCI_BASE_ADDRESS_0+i*4, pciadr); + grpci2_cfg_w32(priv, TGT, 0, capptr+CAP9_BAR_OFS+i*4, ahbadr); printk(KERN_INFO " TGT BAR[%d]: 0x%08x (PCI)-> 0x%08x\n", i, pciadr, ahbadr); } /* set as bus master and enable pci memory responses */ - grpci2_cfg_r32(priv, 0, 0, PCI_COMMAND, &data); + grpci2_cfg_r32(priv, TGT, 0, PCI_COMMAND, &data); data |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); - grpci2_cfg_w32(priv, 0, 0, PCI_COMMAND, data); + grpci2_cfg_w32(priv, TGT, 0, PCI_COMMAND, data); /* Enable Error respone (CPU-TRAP) on illegal memory access. */ REGSTORE(regs->ctrl, CTRL_ER | CTRL_PE); diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig index ff496ab1e794..25877aebc685 100644 --- a/arch/tile/Kconfig +++ b/arch/tile/Kconfig @@ -17,7 +17,7 @@ config TILE select GENERIC_IRQ_SHOW select HAVE_DEBUG_BUGVERBOSE select HAVE_SYSCALL_WRAPPERS if TILEGX - select HAVE_VIRT_TO_BUS + select VIRT_TO_BUS select SYS_HYPERVISOR select ARCH_HAVE_NMI_SAFE_CMPXCHG select GENERIC_CLOCKEVENTS diff --git a/arch/tile/configs/tilegx_defconfig b/arch/tile/configs/tilegx_defconfig index 8c5eff6d6df5..47684815e5c8 100644 --- a/arch/tile/configs/tilegx_defconfig +++ b/arch/tile/configs/tilegx_defconfig @@ -330,7 +330,6 @@ CONFIG_MD_RAID0=m CONFIG_MD_RAID1=m CONFIG_MD_RAID10=m CONFIG_MD_RAID456=m -CONFIG_MULTICORE_RAID456=y CONFIG_MD_FAULTY=m CONFIG_BLK_DEV_DM=m CONFIG_DM_DEBUG=y diff --git a/arch/tile/configs/tilepro_defconfig b/arch/tile/configs/tilepro_defconfig index e7a3dfcbcda7..dd2b8f0c631f 100644 --- a/arch/tile/configs/tilepro_defconfig +++ b/arch/tile/configs/tilepro_defconfig @@ -324,7 +324,6 @@ CONFIG_MD_RAID0=m CONFIG_MD_RAID1=m CONFIG_MD_RAID10=m CONFIG_MD_RAID456=m -CONFIG_MULTICORE_RAID456=y CONFIG_MD_FAULTY=m CONFIG_BLK_DEV_DM=m CONFIG_DM_DEBUG=y diff --git a/arch/um/drivers/chan.h b/arch/um/drivers/chan.h index 78f1b8999964..c512b0306dd4 100644 --- a/arch/um/drivers/chan.h +++ b/arch/um/drivers/chan.h @@ -37,7 +37,7 @@ extern int console_write_chan(struct chan *chan, const char *buf, extern int console_open_chan(struct line *line, struct console *co); extern void deactivate_chan(struct chan *chan, int irq); extern void reactivate_chan(struct chan *chan, int irq); -extern void chan_enable_winch(struct chan *chan, struct tty_struct *tty); +extern void chan_enable_winch(struct chan *chan, struct tty_port *port); extern int enable_chan(struct line *line); extern void close_chan(struct line *line); extern int chan_window_size(struct line *line, diff --git a/arch/um/drivers/chan_kern.c b/arch/um/drivers/chan_kern.c index 15c553c239a1..80b47cb71e0a 100644 --- a/arch/um/drivers/chan_kern.c +++ b/arch/um/drivers/chan_kern.c @@ -122,10 +122,10 @@ static int open_chan(struct list_head *chans) return err; } -void chan_enable_winch(struct chan *chan, struct tty_struct *tty) +void chan_enable_winch(struct chan *chan, struct tty_port *port) { if (chan && chan->primary && chan->ops->winch) - register_winch(chan->fd, tty); + register_winch(chan->fd, port); } static void line_timer_cb(struct work_struct *work) diff --git a/arch/um/drivers/chan_user.c b/arch/um/drivers/chan_user.c index 9be670ad23b5..3fd7c3efdb18 100644 --- a/arch/um/drivers/chan_user.c +++ b/arch/um/drivers/chan_user.c @@ -216,7 +216,7 @@ static int winch_thread(void *arg) } } -static int winch_tramp(int fd, struct tty_struct *tty, int *fd_out, +static int winch_tramp(int fd, struct tty_port *port, int *fd_out, unsigned long *stack_out) { struct winch_data data; @@ -271,7 +271,7 @@ static int winch_tramp(int fd, struct tty_struct *tty, int *fd_out, return err; } -void register_winch(int fd, struct tty_struct *tty) +void register_winch(int fd, struct tty_port *port) { unsigned long stack; int pid, thread, count, thread_fd = -1; @@ -281,17 +281,17 @@ void register_winch(int fd, struct tty_struct *tty) return; pid = tcgetpgrp(fd); - if (is_skas_winch(pid, fd, tty)) { - register_winch_irq(-1, fd, -1, tty, 0); + if (is_skas_winch(pid, fd, port)) { + register_winch_irq(-1, fd, -1, port, 0); return; } if (pid == -1) { - thread = winch_tramp(fd, tty, &thread_fd, &stack); + thread = winch_tramp(fd, port, &thread_fd, &stack); if (thread < 0) return; - register_winch_irq(thread_fd, fd, thread, tty, stack); + register_winch_irq(thread_fd, fd, thread, port, stack); count = write(thread_fd, &c, sizeof(c)); if (count != sizeof(c)) diff --git a/arch/um/drivers/chan_user.h b/arch/um/drivers/chan_user.h index dc693298eb8f..03f1b565c5f9 100644 --- a/arch/um/drivers/chan_user.h +++ b/arch/um/drivers/chan_user.h @@ -38,10 +38,10 @@ extern int generic_window_size(int fd, void *unused, unsigned short *rows_out, unsigned short *cols_out); extern void generic_free(void *data); -struct tty_struct; -extern void register_winch(int fd, struct tty_struct *tty); +struct tty_port; +extern void register_winch(int fd, struct tty_port *port); extern void register_winch_irq(int fd, int tty_fd, int pid, - struct tty_struct *tty, unsigned long stack); + struct tty_port *port, unsigned long stack); #define __channel_help(fn, prefix) \ __uml_help(fn, prefix "[0-9]*=<channel description>\n" \ diff --git a/arch/um/drivers/line.c b/arch/um/drivers/line.c index f1b38571f94e..be541cf69fd2 100644 --- a/arch/um/drivers/line.c +++ b/arch/um/drivers/line.c @@ -305,7 +305,7 @@ static int line_activate(struct tty_port *port, struct tty_struct *tty) return ret; if (!line->sigio) { - chan_enable_winch(line->chan_out, tty); + chan_enable_winch(line->chan_out, port); line->sigio = 1; } @@ -315,8 +315,22 @@ static int line_activate(struct tty_port *port, struct tty_struct *tty) return 0; } +static void unregister_winch(struct tty_struct *tty); + +static void line_destruct(struct tty_port *port) +{ + struct tty_struct *tty = tty_port_tty_get(port); + struct line *line = tty->driver_data; + + if (line->sigio) { + unregister_winch(tty); + line->sigio = 0; + } +} + static const struct tty_port_operations line_port_ops = { .activate = line_activate, + .destruct = line_destruct, }; int line_open(struct tty_struct *tty, struct file *filp) @@ -340,18 +354,6 @@ int line_install(struct tty_driver *driver, struct tty_struct *tty, return 0; } -static void unregister_winch(struct tty_struct *tty); - -void line_cleanup(struct tty_struct *tty) -{ - struct line *line = tty->driver_data; - - if (line->sigio) { - unregister_winch(tty); - line->sigio = 0; - } -} - void line_close(struct tty_struct *tty, struct file * filp) { struct line *line = tty->driver_data; @@ -601,7 +603,7 @@ struct winch { int fd; int tty_fd; int pid; - struct tty_struct *tty; + struct tty_port *port; unsigned long stack; struct work_struct work; }; @@ -655,7 +657,7 @@ static irqreturn_t winch_interrupt(int irq, void *data) goto out; } } - tty = winch->tty; + tty = tty_port_tty_get(winch->port); if (tty != NULL) { line = tty->driver_data; if (line != NULL) { @@ -663,6 +665,7 @@ static irqreturn_t winch_interrupt(int irq, void *data) &tty->winsize.ws_col); kill_pgrp(tty->pgrp, SIGWINCH, 1); } + tty_kref_put(tty); } out: if (winch->fd != -1) @@ -670,7 +673,7 @@ static irqreturn_t winch_interrupt(int irq, void *data) return IRQ_HANDLED; } -void register_winch_irq(int fd, int tty_fd, int pid, struct tty_struct *tty, +void register_winch_irq(int fd, int tty_fd, int pid, struct tty_port *port, unsigned long stack) { struct winch *winch; @@ -685,7 +688,7 @@ void register_winch_irq(int fd, int tty_fd, int pid, struct tty_struct *tty, .fd = fd, .tty_fd = tty_fd, .pid = pid, - .tty = tty, + .port = port, .stack = stack }); if (um_request_irq(WINCH_IRQ, fd, IRQ_READ, winch_interrupt, @@ -714,15 +717,18 @@ static void unregister_winch(struct tty_struct *tty) { struct list_head *ele, *next; struct winch *winch; + struct tty_struct *wtty; spin_lock(&winch_handler_lock); list_for_each_safe(ele, next, &winch_handlers) { winch = list_entry(ele, struct winch, list); - if (winch->tty == tty) { + wtty = tty_port_tty_get(winch->port); + if (wtty == tty) { free_winch(winch); break; } + tty_kref_put(wtty); } spin_unlock(&winch_handler_lock); } diff --git a/arch/um/drivers/net_kern.c b/arch/um/drivers/net_kern.c index d8926c303629..39f186252e02 100644 --- a/arch/um/drivers/net_kern.c +++ b/arch/um/drivers/net_kern.c @@ -218,6 +218,7 @@ static int uml_net_start_xmit(struct sk_buff *skb, struct net_device *dev) spin_lock_irqsave(&lp->lock, flags); len = (*lp->write)(lp->fd, skb, lp); + skb_tx_timestamp(skb); if (len == skb->len) { dev->stats.tx_packets++; @@ -281,6 +282,7 @@ static void uml_net_get_drvinfo(struct net_device *dev, static const struct ethtool_ops uml_net_ethtool_ops = { .get_drvinfo = uml_net_get_drvinfo, .get_link = ethtool_op_get_link, + .get_ts_info = ethtool_op_get_ts_info, }; static void uml_net_user_timer_expire(unsigned long _conn) diff --git a/arch/um/drivers/ssl.c b/arch/um/drivers/ssl.c index 16fdd0a0f9d6..b8d14fa52059 100644 --- a/arch/um/drivers/ssl.c +++ b/arch/um/drivers/ssl.c @@ -105,7 +105,6 @@ static const struct tty_operations ssl_ops = { .throttle = line_throttle, .unthrottle = line_unthrottle, .install = ssl_install, - .cleanup = line_cleanup, .hangup = line_hangup, }; diff --git a/arch/um/drivers/stdio_console.c b/arch/um/drivers/stdio_console.c index 827777af3f6d..7b361f36ca96 100644 --- a/arch/um/drivers/stdio_console.c +++ b/arch/um/drivers/stdio_console.c @@ -110,7 +110,6 @@ static const struct tty_operations console_ops = { .set_termios = line_set_termios, .throttle = line_throttle, .unthrottle = line_unthrottle, - .cleanup = line_cleanup, .hangup = line_hangup, }; diff --git a/arch/um/os-Linux/signal.c b/arch/um/os-Linux/signal.c index b1469fe93295..9d9f1b4bf826 100644 --- a/arch/um/os-Linux/signal.c +++ b/arch/um/os-Linux/signal.c @@ -15,7 +15,7 @@ #include <sysdep/mcontext.h> #include "internal.h" -void (*sig_info[NSIG])(int, siginfo_t *, struct uml_pt_regs *) = { +void (*sig_info[NSIG])(int, struct siginfo *, struct uml_pt_regs *) = { [SIGTRAP] = relay_signal, [SIGFPE] = relay_signal, [SIGILL] = relay_signal, diff --git a/arch/um/os-Linux/start_up.c b/arch/um/os-Linux/start_up.c index da4b9e9999fd..337518c5042a 100644 --- a/arch/um/os-Linux/start_up.c +++ b/arch/um/os-Linux/start_up.c @@ -15,6 +15,8 @@ #include <sys/mman.h> #include <sys/stat.h> #include <sys/wait.h> +#include <sys/time.h> +#include <sys/resource.h> #include <asm/unistd.h> #include <init.h> #include <os.h> diff --git a/arch/unicore32/Kconfig b/arch/unicore32/Kconfig index dc50b157fc83..2943e3acdf0c 100644 --- a/arch/unicore32/Kconfig +++ b/arch/unicore32/Kconfig @@ -9,7 +9,7 @@ config UNICORE32 select GENERIC_ATOMIC64 select HAVE_KERNEL_LZO select HAVE_KERNEL_LZMA - select HAVE_VIRT_TO_BUS + select VIRT_TO_BUS select ARCH_HAVE_CUSTOM_GPIO_H select GENERIC_FIND_FIRST_BIT select GENERIC_IRQ_PROBE diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index a4f24f5b1218..70c0f3da0476 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -112,7 +112,7 @@ config X86 select GENERIC_STRNLEN_USER select HAVE_CONTEXT_TRACKING if X86_64 select HAVE_IRQ_TIME_ACCOUNTING - select HAVE_VIRT_TO_BUS + select VIRT_TO_BUS select MODULES_USE_ELF_REL if X86_32 select MODULES_USE_ELF_RELA if X86_64 select CLONE_BACKWARDS if X86_32 diff --git a/arch/x86/include/asm/kprobes.h b/arch/x86/include/asm/kprobes.h index d3ddd17405d0..5a6d2873f80e 100644 --- a/arch/x86/include/asm/kprobes.h +++ b/arch/x86/include/asm/kprobes.h @@ -77,6 +77,7 @@ struct arch_specific_insn { * a post_handler or break_handler). */ int boostable; + bool if_modifier; }; struct arch_optimized_insn { diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index 635a74d22409..4979778cc7fb 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -414,8 +414,8 @@ struct kvm_vcpu_arch { gpa_t time; struct pvclock_vcpu_time_info hv_clock; unsigned int hw_tsc_khz; - unsigned int time_offset; - struct page *time_page; + struct gfn_to_hva_cache pv_time; + bool pv_time_enabled; /* set guest stopped flag in pvclock flags field */ bool pvclock_set_guest_stopped_request; diff --git a/arch/x86/include/asm/xen/hypercall.h b/arch/x86/include/asm/xen/hypercall.h index c20d1ce62dc6..e709884d0ef9 100644 --- a/arch/x86/include/asm/xen/hypercall.h +++ b/arch/x86/include/asm/xen/hypercall.h @@ -382,14 +382,14 @@ HYPERVISOR_console_io(int cmd, int count, char *str) return _hypercall3(int, console_io, cmd, count, str); } -extern int __must_check HYPERVISOR_physdev_op_compat(int, void *); +extern int __must_check xen_physdev_op_compat(int, void *); static inline int HYPERVISOR_physdev_op(int cmd, void *arg) { int rc = _hypercall2(int, physdev_op, cmd, arg); if (unlikely(rc == -ENOSYS)) - rc = HYPERVISOR_physdev_op_compat(cmd, arg); + rc = xen_physdev_op_compat(cmd, arg); return rc; } diff --git a/arch/x86/include/uapi/asm/msr-index.h b/arch/x86/include/uapi/asm/msr-index.h index 892ce40a7470..7a060f4b411f 100644 --- a/arch/x86/include/uapi/asm/msr-index.h +++ b/arch/x86/include/uapi/asm/msr-index.h @@ -44,6 +44,7 @@ #define SNB_C1_AUTO_UNDEMOTE (1UL << 27) #define SNB_C3_AUTO_UNDEMOTE (1UL << 28) +#define MSR_PLATFORM_INFO 0x000000ce #define MSR_MTRRcap 0x000000fe #define MSR_IA32_BBL_CR_CTL 0x00000119 #define MSR_IA32_BBL_CR_CTL3 0x0000011e diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index 529c8931fc02..dab7580c47ae 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c @@ -101,6 +101,10 @@ static struct event_constraint intel_snb_event_constraints[] __read_mostly = FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */ FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */ FIXED_EVENT_CONSTRAINT(0x0300, 2), /* CPU_CLK_UNHALTED.REF */ + INTEL_UEVENT_CONSTRAINT(0x04a3, 0xf), /* CYCLE_ACTIVITY.CYCLES_NO_DISPATCH */ + INTEL_UEVENT_CONSTRAINT(0x05a3, 0xf), /* CYCLE_ACTIVITY.STALLS_L2_PENDING */ + INTEL_UEVENT_CONSTRAINT(0x02a3, 0x4), /* CYCLE_ACTIVITY.CYCLES_L1D_PENDING */ + INTEL_UEVENT_CONSTRAINT(0x06a3, 0x4), /* CYCLE_ACTIVITY.STALLS_L1D_PENDING */ INTEL_EVENT_CONSTRAINT(0x48, 0x4), /* L1D_PEND_MISS.PENDING */ INTEL_UEVENT_CONSTRAINT(0x01c0, 0x2), /* INST_RETIRED.PREC_DIST */ INTEL_EVENT_CONSTRAINT(0xcd, 0x8), /* MEM_TRANS_RETIRED.LOAD_LATENCY */ diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c index 826054a4f2ee..b05a575d56f4 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_ds.c +++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c @@ -729,3 +729,13 @@ void intel_ds_init(void) } } } + +void perf_restore_debug_store(void) +{ + struct debug_store *ds = __this_cpu_read(cpu_hw_events.ds); + + if (!x86_pmu.bts && !x86_pmu.pebs) + return; + + wrmsrl(MSR_IA32_DS_AREA, (unsigned long)ds); +} diff --git a/arch/x86/kernel/kprobes/core.c b/arch/x86/kernel/kprobes/core.c index 3f06e6149981..7bfe318d3d8a 100644 --- a/arch/x86/kernel/kprobes/core.c +++ b/arch/x86/kernel/kprobes/core.c @@ -375,6 +375,9 @@ static void __kprobes arch_copy_kprobe(struct kprobe *p) else p->ainsn.boostable = -1; + /* Check whether the instruction modifies Interrupt Flag or not */ + p->ainsn.if_modifier = is_IF_modifier(p->ainsn.insn); + /* Also, displacement change doesn't affect the first byte */ p->opcode = p->ainsn.insn[0]; } @@ -434,7 +437,7 @@ static void __kprobes set_current_kprobe(struct kprobe *p, struct pt_regs *regs, __this_cpu_write(current_kprobe, p); kcb->kprobe_saved_flags = kcb->kprobe_old_flags = (regs->flags & (X86_EFLAGS_TF | X86_EFLAGS_IF)); - if (is_IF_modifier(p->ainsn.insn)) + if (p->ainsn.if_modifier) kcb->kprobe_saved_flags &= ~X86_EFLAGS_IF; } diff --git a/arch/x86/kernel/microcode_intel_early.c b/arch/x86/kernel/microcode_intel_early.c index 7890bc838952..d893e8ed8ac9 100644 --- a/arch/x86/kernel/microcode_intel_early.c +++ b/arch/x86/kernel/microcode_intel_early.c @@ -90,13 +90,13 @@ microcode_phys(struct microcode_intel **mc_saved_tmp, struct microcode_intel ***mc_saved; mc_saved = (struct microcode_intel ***) - __pa_symbol(&mc_saved_data->mc_saved); + __pa_nodebug(&mc_saved_data->mc_saved); for (i = 0; i < mc_saved_data->mc_saved_count; i++) { struct microcode_intel *p; p = *(struct microcode_intel **) - __pa(mc_saved_data->mc_saved + i); - mc_saved_tmp[i] = (struct microcode_intel *)__pa(p); + __pa_nodebug(mc_saved_data->mc_saved + i); + mc_saved_tmp[i] = (struct microcode_intel *)__pa_nodebug(p); } } #endif @@ -562,7 +562,7 @@ scan_microcode(unsigned long start, unsigned long end, struct cpio_data cd; long offset = 0; #ifdef CONFIG_X86_32 - char *p = (char *)__pa_symbol(ucode_name); + char *p = (char *)__pa_nodebug(ucode_name); #else char *p = ucode_name; #endif @@ -630,8 +630,8 @@ static void __cpuinit print_ucode(struct ucode_cpu_info *uci) if (mc_intel == NULL) return; - delay_ucode_info_p = (int *)__pa_symbol(&delay_ucode_info); - current_mc_date_p = (int *)__pa_symbol(¤t_mc_date); + delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info); + current_mc_date_p = (int *)__pa_nodebug(¤t_mc_date); *delay_ucode_info_p = 1; *current_mc_date_p = mc_intel->hdr.date; @@ -659,8 +659,8 @@ static inline void __cpuinit print_ucode(struct ucode_cpu_info *uci) } #endif -static int apply_microcode_early(struct mc_saved_data *mc_saved_data, - struct ucode_cpu_info *uci) +static int __cpuinit apply_microcode_early(struct mc_saved_data *mc_saved_data, + struct ucode_cpu_info *uci) { struct microcode_intel *mc_intel; unsigned int val[2]; @@ -741,15 +741,15 @@ load_ucode_intel_bsp(void) #ifdef CONFIG_X86_32 struct boot_params *boot_params_p; - boot_params_p = (struct boot_params *)__pa_symbol(&boot_params); + boot_params_p = (struct boot_params *)__pa_nodebug(&boot_params); ramdisk_image = boot_params_p->hdr.ramdisk_image; ramdisk_size = boot_params_p->hdr.ramdisk_size; initrd_start_early = ramdisk_image; initrd_end_early = initrd_start_early + ramdisk_size; _load_ucode_intel_bsp( - (struct mc_saved_data *)__pa_symbol(&mc_saved_data), - (unsigned long *)__pa_symbol(&mc_saved_in_initrd), + (struct mc_saved_data *)__pa_nodebug(&mc_saved_data), + (unsigned long *)__pa_nodebug(&mc_saved_in_initrd), initrd_start_early, initrd_end_early, &uci); #else ramdisk_image = boot_params.hdr.ramdisk_image; @@ -772,10 +772,10 @@ void __cpuinit load_ucode_intel_ap(void) unsigned long *initrd_start_p; mc_saved_in_initrd_p = - (unsigned long *)__pa_symbol(mc_saved_in_initrd); - mc_saved_data_p = (struct mc_saved_data *)__pa_symbol(&mc_saved_data); - initrd_start_p = (unsigned long *)__pa_symbol(&initrd_start); - initrd_start_addr = (unsigned long)__pa_symbol(*initrd_start_p); + (unsigned long *)__pa_nodebug(mc_saved_in_initrd); + mc_saved_data_p = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data); + initrd_start_p = (unsigned long *)__pa_nodebug(&initrd_start); + initrd_start_addr = (unsigned long)__pa_nodebug(*initrd_start_p); #else mc_saved_data_p = &mc_saved_data; mc_saved_in_initrd_p = mc_saved_in_initrd; diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index f71500af1f81..f19ac0aca60d 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -1406,25 +1406,15 @@ static int kvm_guest_time_update(struct kvm_vcpu *v) unsigned long flags, this_tsc_khz; struct kvm_vcpu_arch *vcpu = &v->arch; struct kvm_arch *ka = &v->kvm->arch; - void *shared_kaddr; s64 kernel_ns, max_kernel_ns; u64 tsc_timestamp, host_tsc; - struct pvclock_vcpu_time_info *guest_hv_clock; + struct pvclock_vcpu_time_info guest_hv_clock; u8 pvclock_flags; bool use_master_clock; kernel_ns = 0; host_tsc = 0; - /* Keep irq disabled to prevent changes to the clock */ - local_irq_save(flags); - this_tsc_khz = __get_cpu_var(cpu_tsc_khz); - if (unlikely(this_tsc_khz == 0)) { - local_irq_restore(flags); - kvm_make_request(KVM_REQ_CLOCK_UPDATE, v); - return 1; - } - /* * If the host uses TSC clock, then passthrough TSC as stable * to the guest. @@ -1436,6 +1426,15 @@ static int kvm_guest_time_update(struct kvm_vcpu *v) kernel_ns = ka->master_kernel_ns; } spin_unlock(&ka->pvclock_gtod_sync_lock); + + /* Keep irq disabled to prevent changes to the clock */ + local_irq_save(flags); + this_tsc_khz = __get_cpu_var(cpu_tsc_khz); + if (unlikely(this_tsc_khz == 0)) { + local_irq_restore(flags); + kvm_make_request(KVM_REQ_CLOCK_UPDATE, v); + return 1; + } if (!use_master_clock) { host_tsc = native_read_tsc(); kernel_ns = get_kernel_ns(); @@ -1463,7 +1462,7 @@ static int kvm_guest_time_update(struct kvm_vcpu *v) local_irq_restore(flags); - if (!vcpu->time_page) + if (!vcpu->pv_time_enabled) return 0; /* @@ -1525,12 +1524,12 @@ static int kvm_guest_time_update(struct kvm_vcpu *v) */ vcpu->hv_clock.version += 2; - shared_kaddr = kmap_atomic(vcpu->time_page); - - guest_hv_clock = shared_kaddr + vcpu->time_offset; + if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time, + &guest_hv_clock, sizeof(guest_hv_clock)))) + return 0; /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */ - pvclock_flags = (guest_hv_clock->flags & PVCLOCK_GUEST_STOPPED); + pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED); if (vcpu->pvclock_set_guest_stopped_request) { pvclock_flags |= PVCLOCK_GUEST_STOPPED; @@ -1543,12 +1542,9 @@ static int kvm_guest_time_update(struct kvm_vcpu *v) vcpu->hv_clock.flags = pvclock_flags; - memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock, - sizeof(vcpu->hv_clock)); - - kunmap_atomic(shared_kaddr); - - mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT); + kvm_write_guest_cached(v->kvm, &vcpu->pv_time, + &vcpu->hv_clock, + sizeof(vcpu->hv_clock)); return 0; } @@ -1837,10 +1833,7 @@ static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data) static void kvmclock_reset(struct kvm_vcpu *vcpu) { - if (vcpu->arch.time_page) { - kvm_release_page_dirty(vcpu->arch.time_page); - vcpu->arch.time_page = NULL; - } + vcpu->arch.pv_time_enabled = false; } static void accumulate_steal_time(struct kvm_vcpu *vcpu) @@ -1947,6 +1940,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) break; case MSR_KVM_SYSTEM_TIME_NEW: case MSR_KVM_SYSTEM_TIME: { + u64 gpa_offset; kvmclock_reset(vcpu); vcpu->arch.time = data; @@ -1956,14 +1950,17 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) if (!(data & 1)) break; - /* ...but clean it before doing the actual write */ - vcpu->arch.time_offset = data & ~(PAGE_MASK | 1); + gpa_offset = data & ~(PAGE_MASK | 1); - vcpu->arch.time_page = - gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT); + /* Check that the address is 32-byte aligned. */ + if (gpa_offset & (sizeof(struct pvclock_vcpu_time_info) - 1)) + break; - if (is_error_page(vcpu->arch.time_page)) - vcpu->arch.time_page = NULL; + if (kvm_gfn_to_hva_cache_init(vcpu->kvm, + &vcpu->arch.pv_time, data & ~1ULL)) + vcpu->arch.pv_time_enabled = false; + else + vcpu->arch.pv_time_enabled = true; break; } @@ -2967,7 +2964,7 @@ static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu, */ static int kvm_set_guest_paused(struct kvm_vcpu *vcpu) { - if (!vcpu->arch.time_page) + if (!vcpu->arch.pv_time_enabled) return -EINVAL; vcpu->arch.pvclock_set_guest_stopped_request = true; kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu); @@ -6718,6 +6715,7 @@ int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu) goto fail_free_wbinvd_dirty_mask; vcpu->arch.ia32_tsc_adjust_msr = 0x0; + vcpu->arch.pv_time_enabled = false; kvm_async_pf_hash_reset(vcpu); kvm_pmu_init(vcpu); diff --git a/arch/x86/lib/usercopy_64.c b/arch/x86/lib/usercopy_64.c index 05928aae911e..906fea315791 100644 --- a/arch/x86/lib/usercopy_64.c +++ b/arch/x86/lib/usercopy_64.c @@ -74,10 +74,10 @@ copy_user_handle_tail(char *to, char *from, unsigned len, unsigned zerorest) char c; unsigned zero_len; - for (; len; --len) { + for (; len; --len, to++) { if (__get_user_nocheck(c, from++, sizeof(char))) break; - if (__put_user_nocheck(c, to++, sizeof(char))) + if (__put_user_nocheck(c, to, sizeof(char))) break; } diff --git a/arch/x86/power/cpu.c b/arch/x86/power/cpu.c index 120cee1c3f8d..3c68768d7a75 100644 --- a/arch/x86/power/cpu.c +++ b/arch/x86/power/cpu.c @@ -11,6 +11,7 @@ #include <linux/suspend.h> #include <linux/export.h> #include <linux/smp.h> +#include <linux/perf_event.h> #include <asm/pgtable.h> #include <asm/proto.h> @@ -228,6 +229,7 @@ static void __restore_processor_state(struct saved_context *ctxt) do_fpu_end(); x86_platform.restore_sched_clock_state(); mtrr_bp_restore(); + perf_restore_debug_store(); } /* Needed by apm.c */ diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c index e8e34938c57d..6afbb2ca9a0a 100644 --- a/arch/x86/xen/mmu.c +++ b/arch/x86/xen/mmu.c @@ -1467,8 +1467,6 @@ static void __init xen_write_cr3_init(unsigned long cr3) __xen_write_cr3(true, cr3); xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */ - - pv_mmu_ops.write_cr3 = &xen_write_cr3; } #endif @@ -2122,6 +2120,7 @@ static void __init xen_post_allocator_init(void) #endif #ifdef CONFIG_X86_64 + pv_mmu_ops.write_cr3 = &xen_write_cr3; SetPagePinned(virt_to_page(level3_user_vsyscall)); #endif xen_mark_init_mm_pinned(); diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index 35876ffac11d..b09de49dbec5 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig @@ -9,7 +9,7 @@ config XTENSA select HAVE_IDE select GENERIC_ATOMIC64 select HAVE_GENERIC_HARDIRQS - select HAVE_VIRT_TO_BUS + select VIRT_TO_BUS select GENERIC_IRQ_SHOW select GENERIC_CPU_DEVICES select MODULES_USE_ELF_RELA diff --git a/block/blk-flush.c b/block/blk-flush.c index db8f1b507857..cc2b827a853c 100644 --- a/block/blk-flush.c +++ b/block/blk-flush.c @@ -444,7 +444,7 @@ int blkdev_issue_flush(struct block_device *bdev, gfp_t gfp_mask, * copied from blk_rq_pos(rq). */ if (error_sector) - *error_sector = bio->bi_sector; + *error_sector = bio->bi_sector; if (!bio_flagged(bio, BIO_UPTODATE)) ret = -EIO; diff --git a/block/partition-generic.c b/block/partition-generic.c index 789cdea05893..ae95ee6a58aa 100644 --- a/block/partition-generic.c +++ b/block/partition-generic.c @@ -257,6 +257,7 @@ void delete_partition(struct gendisk *disk, int partno) hd_struct_put(part); } +EXPORT_SYMBOL(delete_partition); static ssize_t whole_disk_show(struct device *dev, struct device_attribute *attr, char *buf) diff --git a/drivers/acpi/apei/cper.c b/drivers/acpi/apei/cper.c index 1e5d8a40101e..fefc2ca7cc3e 100644 --- a/drivers/acpi/apei/cper.c +++ b/drivers/acpi/apei/cper.c @@ -405,7 +405,7 @@ int apei_estatus_check(const struct acpi_hest_generic_status *estatus) return rc; data_len = estatus->data_length; gdata = (struct acpi_hest_generic_data *)(estatus + 1); - while (data_len > sizeof(*gdata)) { + while (data_len >= sizeof(*gdata)) { gedata_len = gdata->error_data_length; if (gedata_len > data_len - sizeof(*gdata)) return -EINVAL; diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c index 0ac546d5e53f..5ff173066127 100644 --- a/drivers/acpi/pci_root.c +++ b/drivers/acpi/pci_root.c @@ -646,6 +646,7 @@ static void handle_root_bridge_insertion(acpi_handle handle) static void handle_root_bridge_removal(struct acpi_device *device) { + acpi_status status; struct acpi_eject_event *ej_event; ej_event = kmalloc(sizeof(*ej_event), GFP_KERNEL); @@ -661,7 +662,9 @@ static void handle_root_bridge_removal(struct acpi_device *device) ej_event->device = device; ej_event->event = ACPI_NOTIFY_EJECT_REQUEST; - acpi_bus_hot_remove_device(ej_event); + status = acpi_os_hotplug_execute(acpi_bus_hot_remove_device, ej_event); + if (ACPI_FAILURE(status)) + kfree(ej_event); } static void _handle_hotplug_event_root(struct work_struct *work) @@ -676,8 +679,9 @@ static void _handle_hotplug_event_root(struct work_struct *work) handle = hp_work->handle; type = hp_work->type; - root = acpi_pci_find_root(handle); + acpi_scan_lock_acquire(); + root = acpi_pci_find_root(handle); acpi_get_name(handle, ACPI_FULL_PATHNAME, &buffer); switch (type) { @@ -711,6 +715,7 @@ static void _handle_hotplug_event_root(struct work_struct *work) break; } + acpi_scan_lock_release(); kfree(hp_work); /* allocated in handle_hotplug_event_bridge */ kfree(buffer.pointer); } diff --git a/drivers/acpi/processor_perflib.c b/drivers/acpi/processor_perflib.c index 53e7ac9403a7..e854582f29a6 100644 --- a/drivers/acpi/processor_perflib.c +++ b/drivers/acpi/processor_perflib.c @@ -465,7 +465,7 @@ static int acpi_processor_get_performance_states(struct acpi_processor *pr) return result; } -static int acpi_processor_get_performance_info(struct acpi_processor *pr) +int acpi_processor_get_performance_info(struct acpi_processor *pr) { int result = 0; acpi_status status = AE_OK; @@ -509,7 +509,7 @@ static int acpi_processor_get_performance_info(struct acpi_processor *pr) #endif return result; } - +EXPORT_SYMBOL_GPL(acpi_processor_get_performance_info); int acpi_processor_notify_smm(struct module *calling_module) { acpi_status status; diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c index 24213033fbae..9c1a435d10e6 100644 --- a/drivers/acpi/sleep.c +++ b/drivers/acpi/sleep.c @@ -193,6 +193,14 @@ static struct dmi_system_id __initdata acpisleep_dmi_table[] = { }, { .callback = init_nvs_nosave, + .ident = "Sony Vaio VGN-FW21M", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"), + DMI_MATCH(DMI_PRODUCT_NAME, "VGN-FW21M"), + }, + }, + { + .callback = init_nvs_nosave, .ident = "Sony Vaio VPCEB17FX", .matches = { DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"), diff --git a/drivers/amba/tegra-ahb.c b/drivers/amba/tegra-ahb.c index 093c43554963..1f44e56cc65d 100644 --- a/drivers/amba/tegra-ahb.c +++ b/drivers/amba/tegra-ahb.c @@ -158,7 +158,7 @@ int tegra_ahb_enable_smmu(struct device_node *dn) EXPORT_SYMBOL(tegra_ahb_enable_smmu); #endif -#ifdef CONFIG_PM_SLEEP +#ifdef CONFIG_PM static int tegra_ahb_suspend(struct device *dev) { int i; diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 3e751b74615e..a5a3ebcbdd2c 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -59,15 +59,16 @@ config ATA_ACPI option libata.noacpi=1 config SATA_ZPODD - bool "SATA Zero Power ODD Support" + bool "SATA Zero Power Optical Disc Drive (ZPODD) support" depends on ATA_ACPI default n help - This option adds support for SATA ZPODD. It requires both - ODD and the platform support, and if enabled, will automatically - power on/off the ODD when certain condition is satisfied. This - does not impact user's experience of the ODD, only power is saved - when ODD is not in use(i.e. no disc inside). + This option adds support for SATA Zero Power Optical Disc + Drive (ZPODD). It requires both the ODD and the platform + support, and if enabled, will automatically power on/off the + ODD when certain condition is satisfied. This does not impact + end user's experience of the ODD, only power is saved when + the ODD is not in use (i.e. no disc inside). If unsure, say N. diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index a99112cfd8b1..6a67b07de494 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -281,6 +281,8 @@ static const struct pci_device_id ahci_pci_tbl[] = { { PCI_VDEVICE(INTEL, 0x1f37), board_ahci }, /* Avoton RAID */ { PCI_VDEVICE(INTEL, 0x1f3e), board_ahci }, /* Avoton RAID */ { PCI_VDEVICE(INTEL, 0x1f3f), board_ahci }, /* Avoton RAID */ + { PCI_VDEVICE(INTEL, 0x2823), board_ahci }, /* Wellsburg RAID */ + { PCI_VDEVICE(INTEL, 0x2827), board_ahci }, /* Wellsburg RAID */ { PCI_VDEVICE(INTEL, 0x8d02), board_ahci }, /* Wellsburg AHCI */ { PCI_VDEVICE(INTEL, 0x8d04), board_ahci }, /* Wellsburg RAID */ { PCI_VDEVICE(INTEL, 0x8d06), board_ahci }, /* Wellsburg RAID */ diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c index d2ba439cfe54..ffdd32d22602 100644 --- a/drivers/ata/ata_piix.c +++ b/drivers/ata/ata_piix.c @@ -1547,6 +1547,10 @@ static bool piix_broken_system_poweroff(struct pci_dev *pdev) static int prefer_ms_hyperv = 1; module_param(prefer_ms_hyperv, int, 0); +MODULE_PARM_DESC(prefer_ms_hyperv, + "Prefer Hyper-V paravirtualization drivers instead of ATA, " + "0 - Use ATA drivers, " + "1 (Default) - Use the paravirtualization drivers."); static void piix_ignore_devices_quirk(struct ata_host *host) { diff --git a/drivers/ata/libata-acpi.c b/drivers/ata/libata-acpi.c index beea3115577e..8a52dab412e2 100644 --- a/drivers/ata/libata-acpi.c +++ b/drivers/ata/libata-acpi.c @@ -1027,7 +1027,7 @@ static void ata_acpi_register_power_resource(struct ata_device *dev) handle = ata_dev_acpi_handle(dev); if (handle) - acpi_dev_pm_remove_dependent(handle, &sdev->sdev_gendev); + acpi_dev_pm_add_dependent(handle, &sdev->sdev_gendev); } static void ata_acpi_unregister_power_resource(struct ata_device *dev) diff --git a/drivers/ata/pata_samsung_cf.c b/drivers/ata/pata_samsung_cf.c index 70b0e01372b3..6ef27e98c508 100644 --- a/drivers/ata/pata_samsung_cf.c +++ b/drivers/ata/pata_samsung_cf.c @@ -661,18 +661,7 @@ static struct platform_driver pata_s3c_driver = { }, }; -static int __init pata_s3c_init(void) -{ - return platform_driver_probe(&pata_s3c_driver, pata_s3c_probe); -} - -static void __exit pata_s3c_exit(void) -{ - platform_driver_unregister(&pata_s3c_driver); -} - -module_init(pata_s3c_init); -module_exit(pata_s3c_exit); +module_platform_driver_probe(pata_s3c_driver, pata_s3c_probe); MODULE_AUTHOR("Abhilash Kesavan, <a.kesavan@samsung.com>"); MODULE_DESCRIPTION("low-level driver for Samsung PATA controller"); diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c index 124b2c1d9c0b..608f82fed632 100644 --- a/drivers/ata/sata_fsl.c +++ b/drivers/ata/sata_fsl.c @@ -1511,8 +1511,7 @@ error_exit_with_cleanup: if (hcr_base) iounmap(hcr_base); - if (host_priv) - kfree(host_priv); + kfree(host_priv); return retval; } diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig index 5dc0daed8fac..b81ddfea1da0 100644 --- a/drivers/block/Kconfig +++ b/drivers/block/Kconfig @@ -532,11 +532,11 @@ config BLK_DEV_RBD If unsure, say N. config BLK_DEV_RSXX - tristate "RamSam PCIe Flash SSD Device Driver" + tristate "IBM FlashSystem 70/80 PCIe SSD Device Driver" depends on PCI help Device driver for IBM's high speed PCIe SSD - storage devices: RamSan-70 and RamSan-80. + storage devices: FlashSystem-70 and FlashSystem-80. To compile this driver as a module, choose M here: the module will be called rsxx. diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c index ade58bc8f3c4..1c1b8e544aa2 100644 --- a/drivers/block/cciss.c +++ b/drivers/block/cciss.c @@ -4206,7 +4206,7 @@ static int cciss_find_cfgtables(ctlr_info_t *h) if (rc) return rc; h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, - cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable)); + cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); if (!h->cfgtable) return -ENOMEM; rc = write_driver_ver_to_cfgtable(h->cfgtable); diff --git a/drivers/block/loop.c b/drivers/block/loop.c index 747bb2af69dc..fe5f6403417f 100644 --- a/drivers/block/loop.c +++ b/drivers/block/loop.c @@ -1044,12 +1044,29 @@ static int loop_clr_fd(struct loop_device *lo) lo->lo_state = Lo_unbound; /* This is safe: open() is still holding a reference. */ module_put(THIS_MODULE); - if (lo->lo_flags & LO_FLAGS_PARTSCAN && bdev) - ioctl_by_bdev(bdev, BLKRRPART, 0); lo->lo_flags = 0; if (!part_shift) lo->lo_disk->flags |= GENHD_FL_NO_PART_SCAN; mutex_unlock(&lo->lo_ctl_mutex); + + /* + * Remove all partitions, since BLKRRPART won't remove user + * added partitions when max_part=0 + */ + if (bdev) { + struct disk_part_iter piter; + struct hd_struct *part; + + mutex_lock_nested(&bdev->bd_mutex, 1); + invalidate_partition(bdev->bd_disk, 0); + disk_part_iter_init(&piter, bdev->bd_disk, + DISK_PITER_INCL_EMPTY); + while ((part = disk_part_iter_next(&piter))) + delete_partition(bdev->bd_disk, part->partno); + disk_part_iter_exit(&piter); + mutex_unlock(&bdev->bd_mutex); + } + /* * Need not hold lo_ctl_mutex to fput backing file. * Calling fput holding lo_ctl_mutex triggers a circular @@ -1623,6 +1640,7 @@ static int loop_add(struct loop_device **l, int i) goto out_free_dev; i = err; + err = -ENOMEM; lo->lo_queue = blk_alloc_queue(GFP_KERNEL); if (!lo->lo_queue) goto out_free_dev; diff --git a/drivers/block/mg_disk.c b/drivers/block/mg_disk.c index 1788f491e0fb..076ae7f1b781 100644 --- a/drivers/block/mg_disk.c +++ b/drivers/block/mg_disk.c @@ -890,8 +890,10 @@ static int mg_probe(struct platform_device *plat_dev) gpio_direction_output(host->rst, 1); /* reset out pin */ - if (!(prv_data->dev_attr & MG_DEV_MASK)) + if (!(prv_data->dev_attr & MG_DEV_MASK)) { + err = -EINVAL; goto probe_err_3a; + } if (prv_data->dev_attr != MG_BOOT_DEV) { rsc = platform_get_resource_byname(plat_dev, IORESOURCE_IO, diff --git a/drivers/block/mtip32xx/mtip32xx.c b/drivers/block/mtip32xx/mtip32xx.c index 11cc9522cdd4..92250af84e7d 100644 --- a/drivers/block/mtip32xx/mtip32xx.c +++ b/drivers/block/mtip32xx/mtip32xx.c @@ -4224,6 +4224,7 @@ static int mtip_pci_probe(struct pci_dev *pdev, dd->isr_workq = create_workqueue(dd->workq_name); if (!dd->isr_workq) { dev_warn(&pdev->dev, "Can't create wq %d\n", dd->instance); + rv = -ENOMEM; goto block_initialize_err; } @@ -4282,7 +4283,8 @@ static int mtip_pci_probe(struct pci_dev *pdev, INIT_WORK(&dd->work[7].work, mtip_workq_sdbf7); pci_set_master(pdev); - if (pci_enable_msi(pdev)) { + rv = pci_enable_msi(pdev); + if (rv) { dev_warn(&pdev->dev, "Unable to enable MSI interrupt.\n"); goto block_initialize_err; diff --git a/drivers/block/nvme.c b/drivers/block/nvme.c index 07fb2dfaae13..9dcefe40380b 100644 --- a/drivers/block/nvme.c +++ b/drivers/block/nvme.c @@ -135,6 +135,7 @@ static inline void _nvme_check_size(void) BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096); BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096); BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); + BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); } typedef void (*nvme_completion_fn)(struct nvme_dev *, void *, @@ -237,7 +238,8 @@ static void *free_cmdid(struct nvme_queue *nvmeq, int cmdid, *fn = special_completion; return CMD_CTX_INVALID; } - *fn = info[cmdid].fn; + if (fn) + *fn = info[cmdid].fn; ctx = info[cmdid].ctx; info[cmdid].fn = special_completion; info[cmdid].ctx = CMD_CTX_COMPLETED; @@ -335,6 +337,7 @@ nvme_alloc_iod(unsigned nseg, unsigned nbytes, gfp_t gfp) iod->offset = offsetof(struct nvme_iod, sg[nseg]); iod->npages = -1; iod->length = nbytes; + iod->nents = 0; } return iod; @@ -375,7 +378,8 @@ static void bio_completion(struct nvme_dev *dev, void *ctx, struct bio *bio = iod->private; u16 status = le16_to_cpup(&cqe->status) >> 1; - dma_unmap_sg(&dev->pci_dev->dev, iod->sg, iod->nents, + if (iod->nents) + dma_unmap_sg(&dev->pci_dev->dev, iod->sg, iod->nents, bio_data_dir(bio) ? DMA_TO_DEVICE : DMA_FROM_DEVICE); nvme_free_iod(dev, iod); if (status) { @@ -589,7 +593,7 @@ static int nvme_submit_bio_queue(struct nvme_queue *nvmeq, struct nvme_ns *ns, result = nvme_map_bio(nvmeq->q_dmadev, iod, bio, dma_dir, psegs); if (result < 0) - goto free_iod; + goto free_cmdid; length = result; cmnd->rw.command_id = cmdid; @@ -609,6 +613,8 @@ static int nvme_submit_bio_queue(struct nvme_queue *nvmeq, struct nvme_ns *ns, return 0; + free_cmdid: + free_cmdid(nvmeq, cmdid, NULL); free_iod: nvme_free_iod(nvmeq->dev, iod); nomem: @@ -835,8 +841,8 @@ static int nvme_identify(struct nvme_dev *dev, unsigned nsid, unsigned cns, return nvme_submit_admin_cmd(dev, &c, NULL); } -static int nvme_get_features(struct nvme_dev *dev, unsigned fid, - unsigned nsid, dma_addr_t dma_addr) +static int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid, + dma_addr_t dma_addr, u32 *result) { struct nvme_command c; @@ -846,7 +852,7 @@ static int nvme_get_features(struct nvme_dev *dev, unsigned fid, c.features.prp1 = cpu_to_le64(dma_addr); c.features.fid = cpu_to_le32(fid); - return nvme_submit_admin_cmd(dev, &c, NULL); + return nvme_submit_admin_cmd(dev, &c, result); } static int nvme_set_features(struct nvme_dev *dev, unsigned fid, @@ -906,6 +912,10 @@ static void nvme_free_queue(struct nvme_dev *dev, int qid) spin_lock_irq(&nvmeq->q_lock); nvme_cancel_ios(nvmeq, false); + while (bio_list_peek(&nvmeq->sq_cong)) { + struct bio *bio = bio_list_pop(&nvmeq->sq_cong); + bio_endio(bio, -EIO); + } spin_unlock_irq(&nvmeq->q_lock); irq_set_affinity_hint(vector, NULL); @@ -1230,12 +1240,17 @@ static int nvme_user_admin_cmd(struct nvme_dev *dev, if (length != cmd.data_len) status = -ENOMEM; else - status = nvme_submit_admin_cmd(dev, &c, NULL); + status = nvme_submit_admin_cmd(dev, &c, &cmd.result); if (cmd.data_len) { nvme_unmap_user_pages(dev, cmd.opcode & 1, iod); nvme_free_iod(dev, iod); } + + if (!status && copy_to_user(&ucmd->result, &cmd.result, + sizeof(cmd.result))) + status = -EFAULT; + return status; } @@ -1523,9 +1538,9 @@ static int nvme_dev_add(struct nvme_dev *dev) continue; res = nvme_get_features(dev, NVME_FEAT_LBA_RANGE, i, - dma_addr + 4096); + dma_addr + 4096, NULL); if (res) - continue; + memset(mem + 4096, 0, 4096); ns = nvme_alloc_ns(dev, i, mem, mem + 4096); if (ns) diff --git a/drivers/block/rbd.c b/drivers/block/rbd.c index 6c81a4c040b9..f556f8a8b3f9 100644 --- a/drivers/block/rbd.c +++ b/drivers/block/rbd.c @@ -1264,6 +1264,32 @@ static bool obj_request_done_test(struct rbd_obj_request *obj_request) return atomic_read(&obj_request->done) != 0; } +static void +rbd_img_obj_request_read_callback(struct rbd_obj_request *obj_request) +{ + dout("%s: obj %p img %p result %d %llu/%llu\n", __func__, + obj_request, obj_request->img_request, obj_request->result, + obj_request->xferred, obj_request->length); + /* + * ENOENT means a hole in the image. We zero-fill the + * entire length of the request. A short read also implies + * zero-fill to the end of the request. Either way we + * update the xferred count to indicate the whole request + * was satisfied. + */ + BUG_ON(obj_request->type != OBJ_REQUEST_BIO); + if (obj_request->result == -ENOENT) { + zero_bio_chain(obj_request->bio_list, 0); + obj_request->result = 0; + obj_request->xferred = obj_request->length; + } else if (obj_request->xferred < obj_request->length && + !obj_request->result) { + zero_bio_chain(obj_request->bio_list, obj_request->xferred); + obj_request->xferred = obj_request->length; + } + obj_request_done_set(obj_request); +} + static void rbd_obj_request_complete(struct rbd_obj_request *obj_request) { dout("%s: obj %p cb %p\n", __func__, obj_request, @@ -1284,23 +1310,10 @@ static void rbd_osd_read_callback(struct rbd_obj_request *obj_request) { dout("%s: obj %p result %d %llu/%llu\n", __func__, obj_request, obj_request->result, obj_request->xferred, obj_request->length); - /* - * ENOENT means a hole in the object. We zero-fill the - * entire length of the request. A short read also implies - * zero-fill to the end of the request. Either way we - * update the xferred count to indicate the whole request - * was satisfied. - */ - if (obj_request->result == -ENOENT) { - zero_bio_chain(obj_request->bio_list, 0); - obj_request->result = 0; - obj_request->xferred = obj_request->length; - } else if (obj_request->xferred < obj_request->length && - !obj_request->result) { - zero_bio_chain(obj_request->bio_list, obj_request->xferred); - obj_request->xferred = obj_request->length; - } - obj_request_done_set(obj_request); + if (obj_request->img_request) + rbd_img_obj_request_read_callback(obj_request); + else + obj_request_done_set(obj_request); } static void rbd_osd_write_callback(struct rbd_obj_request *obj_request) diff --git a/drivers/block/rsxx/Makefile b/drivers/block/rsxx/Makefile index f35cd0b71f7b..b1c53c0aa450 100644 --- a/drivers/block/rsxx/Makefile +++ b/drivers/block/rsxx/Makefile @@ -1,2 +1,2 @@ obj-$(CONFIG_BLK_DEV_RSXX) += rsxx.o -rsxx-y := config.o core.o cregs.o dev.o dma.o +rsxx-objs := config.o core.o cregs.o dev.o dma.o diff --git a/drivers/block/rsxx/config.c b/drivers/block/rsxx/config.c index a295e7e9ee41..10cd530d3e10 100644 --- a/drivers/block/rsxx/config.c +++ b/drivers/block/rsxx/config.c @@ -29,15 +29,13 @@ #include "rsxx_priv.h" #include "rsxx_cfg.h" -static void initialize_config(void *config) +static void initialize_config(struct rsxx_card_cfg *cfg) { - struct rsxx_card_cfg *cfg = config; - cfg->hdr.version = RSXX_CFG_VERSION; cfg->data.block_size = RSXX_HW_BLK_SIZE; cfg->data.stripe_size = RSXX_HW_BLK_SIZE; - cfg->data.vendor_id = RSXX_VENDOR_ID_TMS_IBM; + cfg->data.vendor_id = RSXX_VENDOR_ID_IBM; cfg->data.cache_order = (-1); cfg->data.intr_coal.mode = RSXX_INTR_COAL_DISABLED; cfg->data.intr_coal.count = 0; @@ -181,7 +179,7 @@ int rsxx_load_config(struct rsxx_cardinfo *card) } else { dev_info(CARD_TO_DEV(card), "Initializing card configuration.\n"); - initialize_config(card); + initialize_config(&card->config); st = rsxx_save_config(card); if (st) return st; diff --git a/drivers/block/rsxx/core.c b/drivers/block/rsxx/core.c index e5162487686a..5af21f2db29c 100644 --- a/drivers/block/rsxx/core.c +++ b/drivers/block/rsxx/core.c @@ -30,6 +30,7 @@ #include <linux/reboot.h> #include <linux/slab.h> #include <linux/bitops.h> +#include <linux/delay.h> #include <linux/genhd.h> #include <linux/idr.h> @@ -39,8 +40,8 @@ #define NO_LEGACY 0 -MODULE_DESCRIPTION("IBM RamSan PCIe Flash SSD Device Driver"); -MODULE_AUTHOR("IBM <support@ramsan.com>"); +MODULE_DESCRIPTION("IBM FlashSystem 70/80 PCIe SSD Device Driver"); +MODULE_AUTHOR("Joshua Morris/Philip Kelleher, IBM"); MODULE_LICENSE("GPL"); MODULE_VERSION(DRIVER_VERSION); @@ -52,6 +53,13 @@ static DEFINE_IDA(rsxx_disk_ida); static DEFINE_SPINLOCK(rsxx_ida_lock); /*----------------- Interrupt Control & Handling -------------------*/ + +static void rsxx_mask_interrupts(struct rsxx_cardinfo *card) +{ + card->isr_mask = 0; + card->ier_mask = 0; +} + static void __enable_intr(unsigned int *mask, unsigned int intr) { *mask |= intr; @@ -71,7 +79,8 @@ static void __disable_intr(unsigned int *mask, unsigned int intr) */ void rsxx_enable_ier(struct rsxx_cardinfo *card, unsigned int intr) { - if (unlikely(card->halt)) + if (unlikely(card->halt) || + unlikely(card->eeh_state)) return; __enable_intr(&card->ier_mask, intr); @@ -80,6 +89,9 @@ void rsxx_enable_ier(struct rsxx_cardinfo *card, unsigned int intr) void rsxx_disable_ier(struct rsxx_cardinfo *card, unsigned int intr) { + if (unlikely(card->eeh_state)) + return; + __disable_intr(&card->ier_mask, intr); iowrite32(card->ier_mask, card->regmap + IER); } @@ -87,7 +99,8 @@ void rsxx_disable_ier(struct rsxx_cardinfo *card, unsigned int intr) void rsxx_enable_ier_and_isr(struct rsxx_cardinfo *card, unsigned int intr) { - if (unlikely(card->halt)) + if (unlikely(card->halt) || + unlikely(card->eeh_state)) return; __enable_intr(&card->isr_mask, intr); @@ -97,6 +110,9 @@ void rsxx_enable_ier_and_isr(struct rsxx_cardinfo *card, void rsxx_disable_ier_and_isr(struct rsxx_cardinfo *card, unsigned int intr) { + if (unlikely(card->eeh_state)) + return; + __disable_intr(&card->isr_mask, intr); __disable_intr(&card->ier_mask, intr); iowrite32(card->ier_mask, card->regmap + IER); @@ -115,6 +131,9 @@ static irqreturn_t rsxx_isr(int irq, void *pdata) do { reread_isr = 0; + if (unlikely(card->eeh_state)) + break; + isr = ioread32(card->regmap + ISR); if (isr == 0xffffffff) { /* @@ -161,9 +180,9 @@ static irqreturn_t rsxx_isr(int irq, void *pdata) } /*----------------- Card Event Handler -------------------*/ -static char *rsxx_card_state_to_str(unsigned int state) +static const char * const rsxx_card_state_to_str(unsigned int state) { - static char *state_strings[] = { + static const char * const state_strings[] = { "Unknown", "Shutdown", "Starting", "Formatting", "Uninitialized", "Good", "Shutting Down", "Fault", "Read Only Fault", "dStroying" @@ -304,6 +323,192 @@ static int card_shutdown(struct rsxx_cardinfo *card) return 0; } +static int rsxx_eeh_frozen(struct pci_dev *dev) +{ + struct rsxx_cardinfo *card = pci_get_drvdata(dev); + int i; + int st; + + dev_warn(&dev->dev, "IBM FlashSystem PCI: preparing for slot reset.\n"); + + card->eeh_state = 1; + rsxx_mask_interrupts(card); + + /* + * We need to guarantee that the write for eeh_state and masking + * interrupts does not become reordered. This will prevent a possible + * race condition with the EEH code. + */ + wmb(); + + pci_disable_device(dev); + + st = rsxx_eeh_save_issued_dmas(card); + if (st) + return st; + + rsxx_eeh_save_issued_creg(card); + + for (i = 0; i < card->n_targets; i++) { + if (card->ctrl[i].status.buf) + pci_free_consistent(card->dev, STATUS_BUFFER_SIZE8, + card->ctrl[i].status.buf, + card->ctrl[i].status.dma_addr); + if (card->ctrl[i].cmd.buf) + pci_free_consistent(card->dev, COMMAND_BUFFER_SIZE8, + card->ctrl[i].cmd.buf, + card->ctrl[i].cmd.dma_addr); + } + + return 0; +} + +static void rsxx_eeh_failure(struct pci_dev *dev) +{ + struct rsxx_cardinfo *card = pci_get_drvdata(dev); + int i; + + dev_err(&dev->dev, "IBM FlashSystem PCI: disabling failed card.\n"); + + card->eeh_state = 1; + + for (i = 0; i < card->n_targets; i++) + del_timer_sync(&card->ctrl[i].activity_timer); + + rsxx_eeh_cancel_dmas(card); +} + +static int rsxx_eeh_fifo_flush_poll(struct rsxx_cardinfo *card) +{ + unsigned int status; + int iter = 0; + + /* We need to wait for the hardware to reset */ + while (iter++ < 10) { + status = ioread32(card->regmap + PCI_RECONFIG); + + if (status & RSXX_FLUSH_BUSY) { + ssleep(1); + continue; + } + + if (status & RSXX_FLUSH_TIMEOUT) + dev_warn(CARD_TO_DEV(card), "HW: flash controller timeout\n"); + return 0; + } + + /* Hardware failed resetting itself. */ + return -1; +} + +static pci_ers_result_t rsxx_error_detected(struct pci_dev *dev, + enum pci_channel_state error) +{ + int st; + + if (dev->revision < RSXX_EEH_SUPPORT) + return PCI_ERS_RESULT_NONE; + + if (error == pci_channel_io_perm_failure) { + rsxx_eeh_failure(dev); + return PCI_ERS_RESULT_DISCONNECT; + } + + st = rsxx_eeh_frozen(dev); + if (st) { + dev_err(&dev->dev, "Slot reset setup failed\n"); + rsxx_eeh_failure(dev); + return PCI_ERS_RESULT_DISCONNECT; + } + + return PCI_ERS_RESULT_NEED_RESET; +} + +static pci_ers_result_t rsxx_slot_reset(struct pci_dev *dev) +{ + struct rsxx_cardinfo *card = pci_get_drvdata(dev); + unsigned long flags; + int i; + int st; + + dev_warn(&dev->dev, + "IBM FlashSystem PCI: recovering from slot reset.\n"); + + st = pci_enable_device(dev); + if (st) + goto failed_hw_setup; + + pci_set_master(dev); + + st = rsxx_eeh_fifo_flush_poll(card); + if (st) + goto failed_hw_setup; + + rsxx_dma_queue_reset(card); + + for (i = 0; i < card->n_targets; i++) { + st = rsxx_hw_buffers_init(dev, &card->ctrl[i]); + if (st) + goto failed_hw_buffers_init; + } + + if (card->config_valid) + rsxx_dma_configure(card); + + /* Clears the ISR register from spurious interrupts */ + st = ioread32(card->regmap + ISR); + + card->eeh_state = 0; + + st = rsxx_eeh_remap_dmas(card); + if (st) + goto failed_remap_dmas; + + spin_lock_irqsave(&card->irq_lock, flags); + if (card->n_targets & RSXX_MAX_TARGETS) + rsxx_enable_ier_and_isr(card, CR_INTR_ALL_G); + else + rsxx_enable_ier_and_isr(card, CR_INTR_ALL_C); + spin_unlock_irqrestore(&card->irq_lock, flags); + + rsxx_kick_creg_queue(card); + + for (i = 0; i < card->n_targets; i++) { + spin_lock(&card->ctrl[i].queue_lock); + if (list_empty(&card->ctrl[i].queue)) { + spin_unlock(&card->ctrl[i].queue_lock); + continue; + } + spin_unlock(&card->ctrl[i].queue_lock); + + queue_work(card->ctrl[i].issue_wq, + &card->ctrl[i].issue_dma_work); + } + + dev_info(&dev->dev, "IBM FlashSystem PCI: recovery complete.\n"); + + return PCI_ERS_RESULT_RECOVERED; + +failed_hw_buffers_init: +failed_remap_dmas: + for (i = 0; i < card->n_targets; i++) { + if (card->ctrl[i].status.buf) + pci_free_consistent(card->dev, + STATUS_BUFFER_SIZE8, + card->ctrl[i].status.buf, + card->ctrl[i].status.dma_addr); + if (card->ctrl[i].cmd.buf) + pci_free_consistent(card->dev, + COMMAND_BUFFER_SIZE8, + card->ctrl[i].cmd.buf, + card->ctrl[i].cmd.dma_addr); + } +failed_hw_setup: + rsxx_eeh_failure(dev); + return PCI_ERS_RESULT_DISCONNECT; + +} + /*----------------- Driver Initialization & Setup -------------------*/ /* Returns: 0 if the driver is compatible with the device -1 if the driver is NOT compatible with the device */ @@ -383,6 +588,7 @@ static int rsxx_pci_probe(struct pci_dev *dev, spin_lock_init(&card->irq_lock); card->halt = 0; + card->eeh_state = 0; spin_lock_irq(&card->irq_lock); rsxx_disable_ier_and_isr(card, CR_INTR_ALL); @@ -538,9 +744,6 @@ static void rsxx_pci_remove(struct pci_dev *dev) rsxx_disable_ier_and_isr(card, CR_INTR_EVENT); spin_unlock_irqrestore(&card->irq_lock, flags); - /* Prevent work_structs from re-queuing themselves. */ - card->halt = 1; - cancel_work_sync(&card->event_work); rsxx_destroy_dev(card); @@ -549,6 +752,10 @@ static void rsxx_pci_remove(struct pci_dev *dev) spin_lock_irqsave(&card->irq_lock, flags); rsxx_disable_ier_and_isr(card, CR_INTR_ALL); spin_unlock_irqrestore(&card->irq_lock, flags); + + /* Prevent work_structs from re-queuing themselves. */ + card->halt = 1; + free_irq(dev->irq, card); if (!force_legacy) @@ -592,11 +799,14 @@ static void rsxx_pci_shutdown(struct pci_dev *dev) card_shutdown(card); } +static const struct pci_error_handlers rsxx_err_handler = { + .error_detected = rsxx_error_detected, + .slot_reset = rsxx_slot_reset, +}; + static DEFINE_PCI_DEVICE_TABLE(rsxx_pci_ids) = { - {PCI_DEVICE(PCI_VENDOR_ID_TMS_IBM, PCI_DEVICE_ID_RS70_FLASH)}, - {PCI_DEVICE(PCI_VENDOR_ID_TMS_IBM, PCI_DEVICE_ID_RS70D_FLASH)}, - {PCI_DEVICE(PCI_VENDOR_ID_TMS_IBM, PCI_DEVICE_ID_RS80_FLASH)}, - {PCI_DEVICE(PCI_VENDOR_ID_TMS_IBM, PCI_DEVICE_ID_RS81_FLASH)}, + {PCI_DEVICE(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_FS70_FLASH)}, + {PCI_DEVICE(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_FS80_FLASH)}, {0,}, }; @@ -609,6 +819,7 @@ static struct pci_driver rsxx_pci_driver = { .remove = rsxx_pci_remove, .suspend = rsxx_pci_suspend, .shutdown = rsxx_pci_shutdown, + .err_handler = &rsxx_err_handler, }; static int __init rsxx_core_init(void) diff --git a/drivers/block/rsxx/cregs.c b/drivers/block/rsxx/cregs.c index 80bbe639fccd..4b5c020a0a65 100644 --- a/drivers/block/rsxx/cregs.c +++ b/drivers/block/rsxx/cregs.c @@ -58,7 +58,7 @@ static struct kmem_cache *creg_cmd_pool; #error Unknown endianess!!! Aborting... #endif -static void copy_to_creg_data(struct rsxx_cardinfo *card, +static int copy_to_creg_data(struct rsxx_cardinfo *card, int cnt8, void *buf, unsigned int stream) @@ -66,6 +66,9 @@ static void copy_to_creg_data(struct rsxx_cardinfo *card, int i = 0; u32 *data = buf; + if (unlikely(card->eeh_state)) + return -EIO; + for (i = 0; cnt8 > 0; i++, cnt8 -= 4) { /* * Firmware implementation makes it necessary to byte swap on @@ -76,10 +79,12 @@ static void copy_to_creg_data(struct rsxx_cardinfo *card, else iowrite32(data[i], card->regmap + CREG_DATA(i)); } + + return 0; } -static void copy_from_creg_data(struct rsxx_cardinfo *card, +static int copy_from_creg_data(struct rsxx_cardinfo *card, int cnt8, void *buf, unsigned int stream) @@ -87,6 +92,9 @@ static void copy_from_creg_data(struct rsxx_cardinfo *card, int i = 0; u32 *data = buf; + if (unlikely(card->eeh_state)) + return -EIO; + for (i = 0; cnt8 > 0; i++, cnt8 -= 4) { /* * Firmware implementation makes it necessary to byte swap on @@ -97,41 +105,31 @@ static void copy_from_creg_data(struct rsxx_cardinfo *card, else data[i] = ioread32(card->regmap + CREG_DATA(i)); } -} - -static struct creg_cmd *pop_active_cmd(struct rsxx_cardinfo *card) -{ - struct creg_cmd *cmd; - /* - * Spin lock is needed because this can be called in atomic/interrupt - * context. - */ - spin_lock_bh(&card->creg_ctrl.lock); - cmd = card->creg_ctrl.active_cmd; - card->creg_ctrl.active_cmd = NULL; - spin_unlock_bh(&card->creg_ctrl.lock); - - return cmd; + return 0; } static void creg_issue_cmd(struct rsxx_cardinfo *card, struct creg_cmd *cmd) { + int st; + + if (unlikely(card->eeh_state)) + return; + iowrite32(cmd->addr, card->regmap + CREG_ADD); iowrite32(cmd->cnt8, card->regmap + CREG_CNT); if (cmd->op == CREG_OP_WRITE) { - if (cmd->buf) - copy_to_creg_data(card, cmd->cnt8, - cmd->buf, cmd->stream); + if (cmd->buf) { + st = copy_to_creg_data(card, cmd->cnt8, + cmd->buf, cmd->stream); + if (st) + return; + } } - /* - * Data copy must complete before initiating the command. This is - * needed for weakly ordered processors (i.e. PowerPC), so that all - * neccessary registers are written before we kick the hardware. - */ - wmb(); + if (unlikely(card->eeh_state)) + return; /* Setting the valid bit will kick off the command. */ iowrite32(cmd->op, card->regmap + CREG_CMD); @@ -196,11 +194,11 @@ static int creg_queue_cmd(struct rsxx_cardinfo *card, cmd->cb_private = cb_private; cmd->status = 0; - spin_lock(&card->creg_ctrl.lock); + spin_lock_bh(&card->creg_ctrl.lock); list_add_tail(&cmd->list, &card->creg_ctrl.queue); card->creg_ctrl.q_depth++; creg_kick_queue(card); - spin_unlock(&card->creg_ctrl.lock); + spin_unlock_bh(&card->creg_ctrl.lock); return 0; } @@ -210,7 +208,11 @@ static void creg_cmd_timed_out(unsigned long data) struct rsxx_cardinfo *card = (struct rsxx_cardinfo *) data; struct creg_cmd *cmd; - cmd = pop_active_cmd(card); + spin_lock(&card->creg_ctrl.lock); + cmd = card->creg_ctrl.active_cmd; + card->creg_ctrl.active_cmd = NULL; + spin_unlock(&card->creg_ctrl.lock); + if (cmd == NULL) { card->creg_ctrl.creg_stats.creg_timeout++; dev_warn(CARD_TO_DEV(card), @@ -247,7 +249,11 @@ static void creg_cmd_done(struct work_struct *work) if (del_timer_sync(&card->creg_ctrl.cmd_timer) == 0) card->creg_ctrl.creg_stats.failed_cancel_timer++; - cmd = pop_active_cmd(card); + spin_lock_bh(&card->creg_ctrl.lock); + cmd = card->creg_ctrl.active_cmd; + card->creg_ctrl.active_cmd = NULL; + spin_unlock_bh(&card->creg_ctrl.lock); + if (cmd == NULL) { dev_err(CARD_TO_DEV(card), "Spurious creg interrupt!\n"); @@ -287,7 +293,7 @@ static void creg_cmd_done(struct work_struct *work) goto creg_done; } - copy_from_creg_data(card, cnt8, cmd->buf, cmd->stream); + st = copy_from_creg_data(card, cnt8, cmd->buf, cmd->stream); } creg_done: @@ -296,10 +302,10 @@ creg_done: kmem_cache_free(creg_cmd_pool, cmd); - spin_lock(&card->creg_ctrl.lock); + spin_lock_bh(&card->creg_ctrl.lock); card->creg_ctrl.active = 0; creg_kick_queue(card); - spin_unlock(&card->creg_ctrl.lock); + spin_unlock_bh(&card->creg_ctrl.lock); } static void creg_reset(struct rsxx_cardinfo *card) @@ -324,7 +330,7 @@ static void creg_reset(struct rsxx_cardinfo *card) "Resetting creg interface for recovery\n"); /* Cancel outstanding commands */ - spin_lock(&card->creg_ctrl.lock); + spin_lock_bh(&card->creg_ctrl.lock); list_for_each_entry_safe(cmd, tmp, &card->creg_ctrl.queue, list) { list_del(&cmd->list); card->creg_ctrl.q_depth--; @@ -345,7 +351,7 @@ static void creg_reset(struct rsxx_cardinfo *card) card->creg_ctrl.active = 0; } - spin_unlock(&card->creg_ctrl.lock); + spin_unlock_bh(&card->creg_ctrl.lock); card->creg_ctrl.reset = 0; spin_lock_irqsave(&card->irq_lock, flags); @@ -399,12 +405,12 @@ static int __issue_creg_rw(struct rsxx_cardinfo *card, return st; /* - * This timeout is neccessary for unresponsive hardware. The additional + * This timeout is necessary for unresponsive hardware. The additional * 20 seconds to used to guarantee that each cregs requests has time to * complete. */ - timeout = msecs_to_jiffies((CREG_TIMEOUT_MSEC * - card->creg_ctrl.q_depth) + 20000); + timeout = msecs_to_jiffies(CREG_TIMEOUT_MSEC * + card->creg_ctrl.q_depth + 20000); /* * The creg interface is guaranteed to complete. It has a timeout @@ -690,6 +696,32 @@ int rsxx_reg_access(struct rsxx_cardinfo *card, return 0; } +void rsxx_eeh_save_issued_creg(struct rsxx_cardinfo *card) +{ + struct creg_cmd *cmd = NULL; + + cmd = card->creg_ctrl.active_cmd; + card->creg_ctrl.active_cmd = NULL; + + if (cmd) { + del_timer_sync(&card->creg_ctrl.cmd_timer); + + spin_lock_bh(&card->creg_ctrl.lock); + list_add(&cmd->list, &card->creg_ctrl.queue); + card->creg_ctrl.q_depth++; + card->creg_ctrl.active = 0; + spin_unlock_bh(&card->creg_ctrl.lock); + } +} + +void rsxx_kick_creg_queue(struct rsxx_cardinfo *card) +{ + spin_lock_bh(&card->creg_ctrl.lock); + if (!list_empty(&card->creg_ctrl.queue)) + creg_kick_queue(card); + spin_unlock_bh(&card->creg_ctrl.lock); +} + /*------------ Initialization & Setup --------------*/ int rsxx_creg_setup(struct rsxx_cardinfo *card) { @@ -712,7 +744,7 @@ void rsxx_creg_destroy(struct rsxx_cardinfo *card) int cnt = 0; /* Cancel outstanding commands */ - spin_lock(&card->creg_ctrl.lock); + spin_lock_bh(&card->creg_ctrl.lock); list_for_each_entry_safe(cmd, tmp, &card->creg_ctrl.queue, list) { list_del(&cmd->list); if (cmd->cb) @@ -737,7 +769,7 @@ void rsxx_creg_destroy(struct rsxx_cardinfo *card) "Canceled active creg command\n"); kmem_cache_free(creg_cmd_pool, cmd); } - spin_unlock(&card->creg_ctrl.lock); + spin_unlock_bh(&card->creg_ctrl.lock); cancel_work_sync(&card->creg_ctrl.done_work); } diff --git a/drivers/block/rsxx/dma.c b/drivers/block/rsxx/dma.c index 63176e67662f..0607513cfb41 100644 --- a/drivers/block/rsxx/dma.c +++ b/drivers/block/rsxx/dma.c @@ -28,7 +28,7 @@ struct rsxx_dma { struct list_head list; u8 cmd; - unsigned int laddr; /* Logical address on the ramsan */ + unsigned int laddr; /* Logical address */ struct { u32 off; u32 cnt; @@ -81,9 +81,6 @@ enum rsxx_hw_status { HW_STATUS_FAULT = 0x08, }; -#define STATUS_BUFFER_SIZE8 4096 -#define COMMAND_BUFFER_SIZE8 4096 - static struct kmem_cache *rsxx_dma_pool; struct dma_tracker { @@ -122,7 +119,7 @@ static unsigned int rsxx_get_dma_tgt(struct rsxx_cardinfo *card, u64 addr8) return tgt; } -static void rsxx_dma_queue_reset(struct rsxx_cardinfo *card) +void rsxx_dma_queue_reset(struct rsxx_cardinfo *card) { /* Reset all DMA Command/Status Queues */ iowrite32(DMA_QUEUE_RESET, card->regmap + RESET); @@ -210,7 +207,8 @@ static void dma_intr_coal_auto_tune(struct rsxx_cardinfo *card) u32 q_depth = 0; u32 intr_coal; - if (card->config.data.intr_coal.mode != RSXX_INTR_COAL_AUTO_TUNE) + if (card->config.data.intr_coal.mode != RSXX_INTR_COAL_AUTO_TUNE || + unlikely(card->eeh_state)) return; for (i = 0; i < card->n_targets; i++) @@ -223,31 +221,26 @@ static void dma_intr_coal_auto_tune(struct rsxx_cardinfo *card) } /*----------------- RSXX DMA Handling -------------------*/ -static void rsxx_complete_dma(struct rsxx_cardinfo *card, +static void rsxx_complete_dma(struct rsxx_dma_ctrl *ctrl, struct rsxx_dma *dma, unsigned int status) { if (status & DMA_SW_ERR) - printk_ratelimited(KERN_ERR - "SW Error in DMA(cmd x%02x, laddr x%08x)\n", - dma->cmd, dma->laddr); + ctrl->stats.dma_sw_err++; if (status & DMA_HW_FAULT) - printk_ratelimited(KERN_ERR - "HW Fault in DMA(cmd x%02x, laddr x%08x)\n", - dma->cmd, dma->laddr); + ctrl->stats.dma_hw_fault++; if (status & DMA_CANCELLED) - printk_ratelimited(KERN_ERR - "DMA Cancelled(cmd x%02x, laddr x%08x)\n", - dma->cmd, dma->laddr); + ctrl->stats.dma_cancelled++; if (dma->dma_addr) - pci_unmap_page(card->dev, dma->dma_addr, get_dma_size(dma), + pci_unmap_page(ctrl->card->dev, dma->dma_addr, + get_dma_size(dma), dma->cmd == HW_CMD_BLK_WRITE ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE); if (dma->cb) - dma->cb(card, dma->cb_data, status ? 1 : 0); + dma->cb(ctrl->card, dma->cb_data, status ? 1 : 0); kmem_cache_free(rsxx_dma_pool, dma); } @@ -330,14 +323,15 @@ static void rsxx_handle_dma_error(struct rsxx_dma_ctrl *ctrl, if (requeue_cmd) rsxx_requeue_dma(ctrl, dma); else - rsxx_complete_dma(ctrl->card, dma, status); + rsxx_complete_dma(ctrl, dma, status); } static void dma_engine_stalled(unsigned long data) { struct rsxx_dma_ctrl *ctrl = (struct rsxx_dma_ctrl *)data; - if (atomic_read(&ctrl->stats.hw_q_depth) == 0) + if (atomic_read(&ctrl->stats.hw_q_depth) == 0 || + unlikely(ctrl->card->eeh_state)) return; if (ctrl->cmd.idx != ioread32(ctrl->regmap + SW_CMD_IDX)) { @@ -369,7 +363,8 @@ static void rsxx_issue_dmas(struct work_struct *work) ctrl = container_of(work, struct rsxx_dma_ctrl, issue_dma_work); hw_cmd_buf = ctrl->cmd.buf; - if (unlikely(ctrl->card->halt)) + if (unlikely(ctrl->card->halt) || + unlikely(ctrl->card->eeh_state)) return; while (1) { @@ -397,7 +392,7 @@ static void rsxx_issue_dmas(struct work_struct *work) */ if (unlikely(ctrl->card->dma_fault)) { push_tracker(ctrl->trackers, tag); - rsxx_complete_dma(ctrl->card, dma, DMA_CANCELLED); + rsxx_complete_dma(ctrl, dma, DMA_CANCELLED); continue; } @@ -432,19 +427,15 @@ static void rsxx_issue_dmas(struct work_struct *work) /* Let HW know we've queued commands. */ if (cmds_pending) { - /* - * We must guarantee that the CPU writes to 'ctrl->cmd.buf' - * (which is in PCI-consistent system-memory) from the loop - * above make it into the coherency domain before the - * following PIO "trigger" updating the cmd.idx. A WMB is - * sufficient. We need not explicitly CPU cache-flush since - * the memory is a PCI-consistent (ie; coherent) mapping. - */ - wmb(); - atomic_add(cmds_pending, &ctrl->stats.hw_q_depth); mod_timer(&ctrl->activity_timer, jiffies + DMA_ACTIVITY_TIMEOUT); + + if (unlikely(ctrl->card->eeh_state)) { + del_timer_sync(&ctrl->activity_timer); + return; + } + iowrite32(ctrl->cmd.idx, ctrl->regmap + SW_CMD_IDX); } } @@ -463,7 +454,8 @@ static void rsxx_dma_done(struct work_struct *work) hw_st_buf = ctrl->status.buf; if (unlikely(ctrl->card->halt) || - unlikely(ctrl->card->dma_fault)) + unlikely(ctrl->card->dma_fault) || + unlikely(ctrl->card->eeh_state)) return; count = le16_to_cpu(hw_st_buf[ctrl->status.idx].count); @@ -508,7 +500,7 @@ static void rsxx_dma_done(struct work_struct *work) if (status) rsxx_handle_dma_error(ctrl, dma, status); else - rsxx_complete_dma(ctrl->card, dma, 0); + rsxx_complete_dma(ctrl, dma, 0); push_tracker(ctrl->trackers, tag); @@ -727,20 +719,54 @@ bvec_err: /*----------------- DMA Engine Initialization & Setup -------------------*/ +int rsxx_hw_buffers_init(struct pci_dev *dev, struct rsxx_dma_ctrl *ctrl) +{ + ctrl->status.buf = pci_alloc_consistent(dev, STATUS_BUFFER_SIZE8, + &ctrl->status.dma_addr); + ctrl->cmd.buf = pci_alloc_consistent(dev, COMMAND_BUFFER_SIZE8, + &ctrl->cmd.dma_addr); + if (ctrl->status.buf == NULL || ctrl->cmd.buf == NULL) + return -ENOMEM; + + memset(ctrl->status.buf, 0xac, STATUS_BUFFER_SIZE8); + iowrite32(lower_32_bits(ctrl->status.dma_addr), + ctrl->regmap + SB_ADD_LO); + iowrite32(upper_32_bits(ctrl->status.dma_addr), + ctrl->regmap + SB_ADD_HI); + + memset(ctrl->cmd.buf, 0x83, COMMAND_BUFFER_SIZE8); + iowrite32(lower_32_bits(ctrl->cmd.dma_addr), ctrl->regmap + CB_ADD_LO); + iowrite32(upper_32_bits(ctrl->cmd.dma_addr), ctrl->regmap + CB_ADD_HI); + + ctrl->status.idx = ioread32(ctrl->regmap + HW_STATUS_CNT); + if (ctrl->status.idx > RSXX_MAX_OUTSTANDING_CMDS) { + dev_crit(&dev->dev, "Failed reading status cnt x%x\n", + ctrl->status.idx); + return -EINVAL; + } + iowrite32(ctrl->status.idx, ctrl->regmap + HW_STATUS_CNT); + iowrite32(ctrl->status.idx, ctrl->regmap + SW_STATUS_CNT); + + ctrl->cmd.idx = ioread32(ctrl->regmap + HW_CMD_IDX); + if (ctrl->cmd.idx > RSXX_MAX_OUTSTANDING_CMDS) { + dev_crit(&dev->dev, "Failed reading cmd cnt x%x\n", + ctrl->status.idx); + return -EINVAL; + } + iowrite32(ctrl->cmd.idx, ctrl->regmap + HW_CMD_IDX); + iowrite32(ctrl->cmd.idx, ctrl->regmap + SW_CMD_IDX); + + return 0; +} + static int rsxx_dma_ctrl_init(struct pci_dev *dev, struct rsxx_dma_ctrl *ctrl) { int i; + int st; memset(&ctrl->stats, 0, sizeof(ctrl->stats)); - ctrl->status.buf = pci_alloc_consistent(dev, STATUS_BUFFER_SIZE8, - &ctrl->status.dma_addr); - ctrl->cmd.buf = pci_alloc_consistent(dev, COMMAND_BUFFER_SIZE8, - &ctrl->cmd.dma_addr); - if (ctrl->status.buf == NULL || ctrl->cmd.buf == NULL) - return -ENOMEM; - ctrl->trackers = vmalloc(DMA_TRACKER_LIST_SIZE8); if (!ctrl->trackers) return -ENOMEM; @@ -770,35 +796,9 @@ static int rsxx_dma_ctrl_init(struct pci_dev *dev, INIT_WORK(&ctrl->issue_dma_work, rsxx_issue_dmas); INIT_WORK(&ctrl->dma_done_work, rsxx_dma_done); - memset(ctrl->status.buf, 0xac, STATUS_BUFFER_SIZE8); - iowrite32(lower_32_bits(ctrl->status.dma_addr), - ctrl->regmap + SB_ADD_LO); - iowrite32(upper_32_bits(ctrl->status.dma_addr), - ctrl->regmap + SB_ADD_HI); - - memset(ctrl->cmd.buf, 0x83, COMMAND_BUFFER_SIZE8); - iowrite32(lower_32_bits(ctrl->cmd.dma_addr), ctrl->regmap + CB_ADD_LO); - iowrite32(upper_32_bits(ctrl->cmd.dma_addr), ctrl->regmap + CB_ADD_HI); - - ctrl->status.idx = ioread32(ctrl->regmap + HW_STATUS_CNT); - if (ctrl->status.idx > RSXX_MAX_OUTSTANDING_CMDS) { - dev_crit(&dev->dev, "Failed reading status cnt x%x\n", - ctrl->status.idx); - return -EINVAL; - } - iowrite32(ctrl->status.idx, ctrl->regmap + HW_STATUS_CNT); - iowrite32(ctrl->status.idx, ctrl->regmap + SW_STATUS_CNT); - - ctrl->cmd.idx = ioread32(ctrl->regmap + HW_CMD_IDX); - if (ctrl->cmd.idx > RSXX_MAX_OUTSTANDING_CMDS) { - dev_crit(&dev->dev, "Failed reading cmd cnt x%x\n", - ctrl->status.idx); - return -EINVAL; - } - iowrite32(ctrl->cmd.idx, ctrl->regmap + HW_CMD_IDX); - iowrite32(ctrl->cmd.idx, ctrl->regmap + SW_CMD_IDX); - - wmb(); + st = rsxx_hw_buffers_init(dev, ctrl); + if (st) + return st; return 0; } @@ -834,7 +834,7 @@ static int rsxx_dma_stripe_setup(struct rsxx_cardinfo *card, return 0; } -static int rsxx_dma_configure(struct rsxx_cardinfo *card) +int rsxx_dma_configure(struct rsxx_cardinfo *card) { u32 intr_coal; @@ -980,6 +980,103 @@ void rsxx_dma_destroy(struct rsxx_cardinfo *card) } } +int rsxx_eeh_save_issued_dmas(struct rsxx_cardinfo *card) +{ + int i; + int j; + int cnt; + struct rsxx_dma *dma; + struct list_head *issued_dmas; + + issued_dmas = kzalloc(sizeof(*issued_dmas) * card->n_targets, + GFP_KERNEL); + if (!issued_dmas) + return -ENOMEM; + + for (i = 0; i < card->n_targets; i++) { + INIT_LIST_HEAD(&issued_dmas[i]); + cnt = 0; + for (j = 0; j < RSXX_MAX_OUTSTANDING_CMDS; j++) { + dma = get_tracker_dma(card->ctrl[i].trackers, j); + if (dma == NULL) + continue; + + if (dma->cmd == HW_CMD_BLK_WRITE) + card->ctrl[i].stats.writes_issued--; + else if (dma->cmd == HW_CMD_BLK_DISCARD) + card->ctrl[i].stats.discards_issued--; + else + card->ctrl[i].stats.reads_issued--; + + list_add_tail(&dma->list, &issued_dmas[i]); + push_tracker(card->ctrl[i].trackers, j); + cnt++; + } + + spin_lock(&card->ctrl[i].queue_lock); + list_splice(&issued_dmas[i], &card->ctrl[i].queue); + + atomic_sub(cnt, &card->ctrl[i].stats.hw_q_depth); + card->ctrl[i].stats.sw_q_depth += cnt; + card->ctrl[i].e_cnt = 0; + + list_for_each_entry(dma, &card->ctrl[i].queue, list) { + if (dma->dma_addr) + pci_unmap_page(card->dev, dma->dma_addr, + get_dma_size(dma), + dma->cmd == HW_CMD_BLK_WRITE ? + PCI_DMA_TODEVICE : + PCI_DMA_FROMDEVICE); + } + spin_unlock(&card->ctrl[i].queue_lock); + } + + kfree(issued_dmas); + + return 0; +} + +void rsxx_eeh_cancel_dmas(struct rsxx_cardinfo *card) +{ + struct rsxx_dma *dma; + struct rsxx_dma *tmp; + int i; + + for (i = 0; i < card->n_targets; i++) { + spin_lock(&card->ctrl[i].queue_lock); + list_for_each_entry_safe(dma, tmp, &card->ctrl[i].queue, list) { + list_del(&dma->list); + + rsxx_complete_dma(&card->ctrl[i], dma, DMA_CANCELLED); + } + spin_unlock(&card->ctrl[i].queue_lock); + } +} + +int rsxx_eeh_remap_dmas(struct rsxx_cardinfo *card) +{ + struct rsxx_dma *dma; + int i; + + for (i = 0; i < card->n_targets; i++) { + spin_lock(&card->ctrl[i].queue_lock); + list_for_each_entry(dma, &card->ctrl[i].queue, list) { + dma->dma_addr = pci_map_page(card->dev, dma->page, + dma->pg_off, get_dma_size(dma), + dma->cmd == HW_CMD_BLK_WRITE ? + PCI_DMA_TODEVICE : + PCI_DMA_FROMDEVICE); + if (!dma->dma_addr) { + spin_unlock(&card->ctrl[i].queue_lock); + kmem_cache_free(rsxx_dma_pool, dma); + return -ENOMEM; + } + } + spin_unlock(&card->ctrl[i].queue_lock); + } + + return 0; +} int rsxx_dma_init(void) { diff --git a/drivers/block/rsxx/rsxx.h b/drivers/block/rsxx/rsxx.h index 2e50b65902b7..24ba3642bd89 100644 --- a/drivers/block/rsxx/rsxx.h +++ b/drivers/block/rsxx/rsxx.h @@ -27,15 +27,17 @@ /*----------------- IOCTL Definitions -------------------*/ +#define RSXX_MAX_DATA 8 + struct rsxx_reg_access { __u32 addr; __u32 cnt; __u32 stat; __u32 stream; - __u32 data[8]; + __u32 data[RSXX_MAX_DATA]; }; -#define RSXX_MAX_REG_CNT (8 * (sizeof(__u32))) +#define RSXX_MAX_REG_CNT (RSXX_MAX_DATA * (sizeof(__u32))) #define RSXX_IOC_MAGIC 'r' diff --git a/drivers/block/rsxx/rsxx_cfg.h b/drivers/block/rsxx/rsxx_cfg.h index c025fe5fdb70..f384c943846d 100644 --- a/drivers/block/rsxx/rsxx_cfg.h +++ b/drivers/block/rsxx/rsxx_cfg.h @@ -58,7 +58,7 @@ struct rsxx_card_cfg { }; /* Vendor ID Values */ -#define RSXX_VENDOR_ID_TMS_IBM 0 +#define RSXX_VENDOR_ID_IBM 0 #define RSXX_VENDOR_ID_DSI 1 #define RSXX_VENDOR_COUNT 2 diff --git a/drivers/block/rsxx/rsxx_priv.h b/drivers/block/rsxx/rsxx_priv.h index a1ac907d8f4c..382e8bf5c03b 100644 --- a/drivers/block/rsxx/rsxx_priv.h +++ b/drivers/block/rsxx/rsxx_priv.h @@ -45,16 +45,13 @@ struct proc_cmd; -#define PCI_VENDOR_ID_TMS_IBM 0x15B6 -#define PCI_DEVICE_ID_RS70_FLASH 0x0019 -#define PCI_DEVICE_ID_RS70D_FLASH 0x001A -#define PCI_DEVICE_ID_RS80_FLASH 0x001C -#define PCI_DEVICE_ID_RS81_FLASH 0x001E +#define PCI_DEVICE_ID_FS70_FLASH 0x04A9 +#define PCI_DEVICE_ID_FS80_FLASH 0x04AA #define RS70_PCI_REV_SUPPORTED 4 #define DRIVER_NAME "rsxx" -#define DRIVER_VERSION "3.7" +#define DRIVER_VERSION "4.0" /* Block size is 4096 */ #define RSXX_HW_BLK_SHIFT 12 @@ -67,6 +64,9 @@ struct proc_cmd; #define RSXX_MAX_OUTSTANDING_CMDS 255 #define RSXX_CS_IDX_MASK 0xff +#define STATUS_BUFFER_SIZE8 4096 +#define COMMAND_BUFFER_SIZE8 4096 + #define RSXX_MAX_TARGETS 8 struct dma_tracker_list; @@ -91,6 +91,9 @@ struct rsxx_dma_stats { u32 discards_failed; u32 done_rescheduled; u32 issue_rescheduled; + u32 dma_sw_err; + u32 dma_hw_fault; + u32 dma_cancelled; u32 sw_q_depth; /* Number of DMAs on the SW queue. */ atomic_t hw_q_depth; /* Number of DMAs queued to HW. */ }; @@ -116,6 +119,7 @@ struct rsxx_dma_ctrl { struct rsxx_cardinfo { struct pci_dev *dev; unsigned int halt; + unsigned int eeh_state; void __iomem *regmap; spinlock_t irq_lock; @@ -224,6 +228,7 @@ enum rsxx_pci_regmap { PERF_RD512_HI = 0xac, PERF_WR512_LO = 0xb0, PERF_WR512_HI = 0xb4, + PCI_RECONFIG = 0xb8, }; enum rsxx_intr { @@ -237,6 +242,8 @@ enum rsxx_intr { CR_INTR_DMA5 = 0x00000080, CR_INTR_DMA6 = 0x00000100, CR_INTR_DMA7 = 0x00000200, + CR_INTR_ALL_C = 0x0000003f, + CR_INTR_ALL_G = 0x000003ff, CR_INTR_DMA_ALL = 0x000003f5, CR_INTR_ALL = 0xffffffff, }; @@ -253,8 +260,14 @@ enum rsxx_pci_reset { DMA_QUEUE_RESET = 0x00000001, }; +enum rsxx_hw_fifo_flush { + RSXX_FLUSH_BUSY = 0x00000002, + RSXX_FLUSH_TIMEOUT = 0x00000004, +}; + enum rsxx_pci_revision { RSXX_DISCARD_SUPPORT = 2, + RSXX_EEH_SUPPORT = 3, }; enum rsxx_creg_cmd { @@ -360,11 +373,17 @@ int rsxx_dma_setup(struct rsxx_cardinfo *card); void rsxx_dma_destroy(struct rsxx_cardinfo *card); int rsxx_dma_init(void); void rsxx_dma_cleanup(void); +void rsxx_dma_queue_reset(struct rsxx_cardinfo *card); +int rsxx_dma_configure(struct rsxx_cardinfo *card); int rsxx_dma_queue_bio(struct rsxx_cardinfo *card, struct bio *bio, atomic_t *n_dmas, rsxx_dma_cb cb, void *cb_data); +int rsxx_hw_buffers_init(struct pci_dev *dev, struct rsxx_dma_ctrl *ctrl); +int rsxx_eeh_save_issued_dmas(struct rsxx_cardinfo *card); +void rsxx_eeh_cancel_dmas(struct rsxx_cardinfo *card); +int rsxx_eeh_remap_dmas(struct rsxx_cardinfo *card); /***** cregs.c *****/ int rsxx_creg_write(struct rsxx_cardinfo *card, u32 addr, @@ -389,10 +408,11 @@ int rsxx_creg_setup(struct rsxx_cardinfo *card); void rsxx_creg_destroy(struct rsxx_cardinfo *card); int rsxx_creg_init(void); void rsxx_creg_cleanup(void); - int rsxx_reg_access(struct rsxx_cardinfo *card, struct rsxx_reg_access __user *ucmd, int read); +void rsxx_eeh_save_issued_creg(struct rsxx_cardinfo *card); +void rsxx_kick_creg_queue(struct rsxx_cardinfo *card); diff --git a/drivers/block/xen-blkback/blkback.c b/drivers/block/xen-blkback/blkback.c index de1f319f7bd7..dd5b2fed97e9 100644 --- a/drivers/block/xen-blkback/blkback.c +++ b/drivers/block/xen-blkback/blkback.c @@ -164,7 +164,7 @@ static void make_response(struct xen_blkif *blkif, u64 id, #define foreach_grant_safe(pos, n, rbtree, node) \ for ((pos) = container_of(rb_first((rbtree)), typeof(*(pos)), node), \ - (n) = rb_next(&(pos)->node); \ + (n) = (&(pos)->node != NULL) ? rb_next(&(pos)->node) : NULL; \ &(pos)->node != NULL; \ (pos) = container_of(n, typeof(*(pos)), node), \ (n) = (&(pos)->node != NULL) ? rb_next(&(pos)->node) : NULL) @@ -381,8 +381,8 @@ irqreturn_t xen_blkif_be_int(int irq, void *dev_id) static void print_stats(struct xen_blkif *blkif) { - pr_info("xen-blkback (%s): oo %3d | rd %4d | wr %4d | f %4d" - " | ds %4d\n", + pr_info("xen-blkback (%s): oo %3llu | rd %4llu | wr %4llu | f %4llu" + " | ds %4llu\n", current->comm, blkif->st_oo_req, blkif->st_rd_req, blkif->st_wr_req, blkif->st_f_req, blkif->st_ds_req); @@ -442,7 +442,7 @@ int xen_blkif_schedule(void *arg) } struct seg_buf { - unsigned long buf; + unsigned int offset; unsigned int nsec; }; /* @@ -621,30 +621,21 @@ static int xen_blkbk_map(struct blkif_request *req, * If this is a new persistent grant * save the handler */ - persistent_gnts[i]->handle = map[j].handle; - persistent_gnts[i]->dev_bus_addr = - map[j++].dev_bus_addr; + persistent_gnts[i]->handle = map[j++].handle; } pending_handle(pending_req, i) = persistent_gnts[i]->handle; if (ret) continue; - - seg[i].buf = persistent_gnts[i]->dev_bus_addr | - (req->u.rw.seg[i].first_sect << 9); } else { - pending_handle(pending_req, i) = map[j].handle; + pending_handle(pending_req, i) = map[j++].handle; bitmap_set(pending_req->unmap_seg, i, 1); - if (ret) { - j++; + if (ret) continue; - } - - seg[i].buf = map[j++].dev_bus_addr | - (req->u.rw.seg[i].first_sect << 9); } + seg[i].offset = (req->u.rw.seg[i].first_sect << 9); } return ret; } @@ -679,6 +670,16 @@ static int dispatch_discard_io(struct xen_blkif *blkif, return err; } +static int dispatch_other_io(struct xen_blkif *blkif, + struct blkif_request *req, + struct pending_req *pending_req) +{ + free_req(pending_req); + make_response(blkif, req->u.other.id, req->operation, + BLKIF_RSP_EOPNOTSUPP); + return -EIO; +} + static void xen_blk_drain_io(struct xen_blkif *blkif) { atomic_set(&blkif->drain, 1); @@ -800,17 +801,30 @@ __do_block_io_op(struct xen_blkif *blkif) /* Apply all sanity checks to /private copy/ of request. */ barrier(); - if (unlikely(req.operation == BLKIF_OP_DISCARD)) { + + switch (req.operation) { + case BLKIF_OP_READ: + case BLKIF_OP_WRITE: + case BLKIF_OP_WRITE_BARRIER: + case BLKIF_OP_FLUSH_DISKCACHE: + if (dispatch_rw_block_io(blkif, &req, pending_req)) + goto done; + break; + case BLKIF_OP_DISCARD: free_req(pending_req); if (dispatch_discard_io(blkif, &req)) - break; - } else if (dispatch_rw_block_io(blkif, &req, pending_req)) + goto done; break; + default: + if (dispatch_other_io(blkif, &req, pending_req)) + goto done; + break; + } /* Yield point for this unbounded loop. */ cond_resched(); } - +done: return more_to_do; } @@ -904,7 +918,8 @@ static int dispatch_rw_block_io(struct xen_blkif *blkif, pr_debug(DRV_PFX "access denied: %s of [%llu,%llu] on dev=%04x\n", operation == READ ? "read" : "write", preq.sector_number, - preq.sector_number + preq.nr_sects, preq.dev); + preq.sector_number + preq.nr_sects, + blkif->vbd.pdevice); goto fail_response; } @@ -947,7 +962,7 @@ static int dispatch_rw_block_io(struct xen_blkif *blkif, (bio_add_page(bio, pages[i], seg[i].nsec << 9, - seg[i].buf & ~PAGE_MASK) == 0)) { + seg[i].offset) == 0)) { bio = bio_alloc(GFP_KERNEL, nseg-i); if (unlikely(bio == NULL)) @@ -977,13 +992,7 @@ static int dispatch_rw_block_io(struct xen_blkif *blkif, bio->bi_end_io = end_block_io_op; } - /* - * We set it one so that the last submit_bio does not have to call - * atomic_inc. - */ atomic_set(&pending_req->pendcnt, nbio); - - /* Get a reference count for the disk queue and start sending I/O */ blk_start_plug(&plug); for (i = 0; i < nbio; i++) @@ -1011,6 +1020,7 @@ static int dispatch_rw_block_io(struct xen_blkif *blkif, fail_put_bio: for (i = 0; i < nbio; i++) bio_put(biolist[i]); + atomic_set(&pending_req->pendcnt, 1); __end_block_io_op(pending_req, -EINVAL); msleep(1); /* back off a bit */ return -EIO; diff --git a/drivers/block/xen-blkback/common.h b/drivers/block/xen-blkback/common.h index 6072390c7f57..60103e2517ba 100644 --- a/drivers/block/xen-blkback/common.h +++ b/drivers/block/xen-blkback/common.h @@ -77,11 +77,18 @@ struct blkif_x86_32_request_discard { uint64_t nr_sectors; } __attribute__((__packed__)); +struct blkif_x86_32_request_other { + uint8_t _pad1; + blkif_vdev_t _pad2; + uint64_t id; /* private guest value, echoed in resp */ +} __attribute__((__packed__)); + struct blkif_x86_32_request { uint8_t operation; /* BLKIF_OP_??? */ union { struct blkif_x86_32_request_rw rw; struct blkif_x86_32_request_discard discard; + struct blkif_x86_32_request_other other; } u; } __attribute__((__packed__)); @@ -113,11 +120,19 @@ struct blkif_x86_64_request_discard { uint64_t nr_sectors; } __attribute__((__packed__)); +struct blkif_x86_64_request_other { + uint8_t _pad1; + blkif_vdev_t _pad2; + uint32_t _pad3; /* offsetof(blkif_..,u.discard.id)==8 */ + uint64_t id; /* private guest value, echoed in resp */ +} __attribute__((__packed__)); + struct blkif_x86_64_request { uint8_t operation; /* BLKIF_OP_??? */ union { struct blkif_x86_64_request_rw rw; struct blkif_x86_64_request_discard discard; + struct blkif_x86_64_request_other other; } u; } __attribute__((__packed__)); @@ -172,7 +187,6 @@ struct persistent_gnt { struct page *page; grant_ref_t gnt; grant_handle_t handle; - uint64_t dev_bus_addr; struct rb_node node; }; @@ -208,13 +222,13 @@ struct xen_blkif { /* statistics */ unsigned long st_print; - int st_rd_req; - int st_wr_req; - int st_oo_req; - int st_f_req; - int st_ds_req; - int st_rd_sect; - int st_wr_sect; + unsigned long long st_rd_req; + unsigned long long st_wr_req; + unsigned long long st_oo_req; + unsigned long long st_f_req; + unsigned long long st_ds_req; + unsigned long long st_rd_sect; + unsigned long long st_wr_sect; wait_queue_head_t waiting_to_free; }; @@ -278,6 +292,11 @@ static inline void blkif_get_x86_32_req(struct blkif_request *dst, dst->u.discard.nr_sectors = src->u.discard.nr_sectors; break; default: + /* + * Don't know how to translate this op. Only get the + * ID so failure can be reported to the frontend. + */ + dst->u.other.id = src->u.other.id; break; } } @@ -309,6 +328,11 @@ static inline void blkif_get_x86_64_req(struct blkif_request *dst, dst->u.discard.nr_sectors = src->u.discard.nr_sectors; break; default: + /* + * Don't know how to translate this op. Only get the + * ID so failure can be reported to the frontend. + */ + dst->u.other.id = src->u.other.id; break; } } diff --git a/drivers/block/xen-blkback/xenbus.c b/drivers/block/xen-blkback/xenbus.c index 5e237f630c47..8bfd1bcf95ec 100644 --- a/drivers/block/xen-blkback/xenbus.c +++ b/drivers/block/xen-blkback/xenbus.c @@ -230,13 +230,13 @@ int __init xen_blkif_interface_init(void) } \ static DEVICE_ATTR(name, S_IRUGO, show_##name, NULL) -VBD_SHOW(oo_req, "%d\n", be->blkif->st_oo_req); -VBD_SHOW(rd_req, "%d\n", be->blkif->st_rd_req); -VBD_SHOW(wr_req, "%d\n", be->blkif->st_wr_req); -VBD_SHOW(f_req, "%d\n", be->blkif->st_f_req); -VBD_SHOW(ds_req, "%d\n", be->blkif->st_ds_req); -VBD_SHOW(rd_sect, "%d\n", be->blkif->st_rd_sect); -VBD_SHOW(wr_sect, "%d\n", be->blkif->st_wr_sect); +VBD_SHOW(oo_req, "%llu\n", be->blkif->st_oo_req); +VBD_SHOW(rd_req, "%llu\n", be->blkif->st_rd_req); +VBD_SHOW(wr_req, "%llu\n", be->blkif->st_wr_req); +VBD_SHOW(f_req, "%llu\n", be->blkif->st_f_req); +VBD_SHOW(ds_req, "%llu\n", be->blkif->st_ds_req); +VBD_SHOW(rd_sect, "%llu\n", be->blkif->st_rd_sect); +VBD_SHOW(wr_sect, "%llu\n", be->blkif->st_wr_sect); static struct attribute *xen_vbdstat_attrs[] = { &dev_attr_oo_req.attr, diff --git a/drivers/block/xen-blkfront.c b/drivers/block/xen-blkfront.c index c3dae2e0f290..a894f88762d8 100644 --- a/drivers/block/xen-blkfront.c +++ b/drivers/block/xen-blkfront.c @@ -44,7 +44,7 @@ #include <linux/mutex.h> #include <linux/scatterlist.h> #include <linux/bitmap.h> -#include <linux/llist.h> +#include <linux/list.h> #include <xen/xen.h> #include <xen/xenbus.h> @@ -68,13 +68,12 @@ enum blkif_state { struct grant { grant_ref_t gref; unsigned long pfn; - struct llist_node node; + struct list_head node; }; struct blk_shadow { struct blkif_request req; struct request *request; - unsigned long frame[BLKIF_MAX_SEGMENTS_PER_REQUEST]; struct grant *grants_used[BLKIF_MAX_SEGMENTS_PER_REQUEST]; }; @@ -105,7 +104,7 @@ struct blkfront_info struct work_struct work; struct gnttab_free_callback callback; struct blk_shadow shadow[BLK_RING_SIZE]; - struct llist_head persistent_gnts; + struct list_head persistent_gnts; unsigned int persistent_gnts_c; unsigned long shadow_free; unsigned int feature_flush; @@ -165,6 +164,69 @@ static int add_id_to_freelist(struct blkfront_info *info, return 0; } +static int fill_grant_buffer(struct blkfront_info *info, int num) +{ + struct page *granted_page; + struct grant *gnt_list_entry, *n; + int i = 0; + + while(i < num) { + gnt_list_entry = kzalloc(sizeof(struct grant), GFP_NOIO); + if (!gnt_list_entry) + goto out_of_memory; + + granted_page = alloc_page(GFP_NOIO); + if (!granted_page) { + kfree(gnt_list_entry); + goto out_of_memory; + } + + gnt_list_entry->pfn = page_to_pfn(granted_page); + gnt_list_entry->gref = GRANT_INVALID_REF; + list_add(&gnt_list_entry->node, &info->persistent_gnts); + i++; + } + + return 0; + +out_of_memory: + list_for_each_entry_safe(gnt_list_entry, n, + &info->persistent_gnts, node) { + list_del(&gnt_list_entry->node); + __free_page(pfn_to_page(gnt_list_entry->pfn)); + kfree(gnt_list_entry); + i--; + } + BUG_ON(i != 0); + return -ENOMEM; +} + +static struct grant *get_grant(grant_ref_t *gref_head, + struct blkfront_info *info) +{ + struct grant *gnt_list_entry; + unsigned long buffer_mfn; + + BUG_ON(list_empty(&info->persistent_gnts)); + gnt_list_entry = list_first_entry(&info->persistent_gnts, struct grant, + node); + list_del(&gnt_list_entry->node); + + if (gnt_list_entry->gref != GRANT_INVALID_REF) { + info->persistent_gnts_c--; + return gnt_list_entry; + } + + /* Assign a gref to this page */ + gnt_list_entry->gref = gnttab_claim_grant_reference(gref_head); + BUG_ON(gnt_list_entry->gref == -ENOSPC); + buffer_mfn = pfn_to_mfn(gnt_list_entry->pfn); + gnttab_grant_foreign_access_ref(gnt_list_entry->gref, + info->xbdev->otherend_id, + buffer_mfn, 0); + return gnt_list_entry; +} + static const char *op_name(int op) { static const char *const names[] = { @@ -293,7 +355,6 @@ static int blkif_ioctl(struct block_device *bdev, fmode_t mode, static int blkif_queue_request(struct request *req) { struct blkfront_info *info = req->rq_disk->private_data; - unsigned long buffer_mfn; struct blkif_request *ring_req; unsigned long id; unsigned int fsect, lsect; @@ -306,7 +367,6 @@ static int blkif_queue_request(struct request *req) */ bool new_persistent_gnts; grant_ref_t gref_head; - struct page *granted_page; struct grant *gnt_list_entry = NULL; struct scatterlist *sg; @@ -370,41 +430,8 @@ static int blkif_queue_request(struct request *req) fsect = sg->offset >> 9; lsect = fsect + (sg->length >> 9) - 1; - if (info->persistent_gnts_c) { - BUG_ON(llist_empty(&info->persistent_gnts)); - gnt_list_entry = llist_entry( - llist_del_first(&info->persistent_gnts), - struct grant, node); - - ref = gnt_list_entry->gref; - buffer_mfn = pfn_to_mfn(gnt_list_entry->pfn); - info->persistent_gnts_c--; - } else { - ref = gnttab_claim_grant_reference(&gref_head); - BUG_ON(ref == -ENOSPC); - - gnt_list_entry = - kmalloc(sizeof(struct grant), - GFP_ATOMIC); - if (!gnt_list_entry) - return -ENOMEM; - - granted_page = alloc_page(GFP_ATOMIC); - if (!granted_page) { - kfree(gnt_list_entry); - return -ENOMEM; - } - - gnt_list_entry->pfn = - page_to_pfn(granted_page); - gnt_list_entry->gref = ref; - - buffer_mfn = pfn_to_mfn(page_to_pfn( - granted_page)); - gnttab_grant_foreign_access_ref(ref, - info->xbdev->otherend_id, - buffer_mfn, 0); - } + gnt_list_entry = get_grant(&gref_head, info); + ref = gnt_list_entry->gref; info->shadow[id].grants_used[i] = gnt_list_entry; @@ -435,7 +462,6 @@ static int blkif_queue_request(struct request *req) kunmap_atomic(shared_data); } - info->shadow[id].frame[i] = mfn_to_pfn(buffer_mfn); ring_req->u.rw.seg[i] = (struct blkif_request_segment) { .gref = ref, @@ -790,9 +816,8 @@ static void blkif_restart_queue(struct work_struct *work) static void blkif_free(struct blkfront_info *info, int suspend) { - struct llist_node *all_gnts; - struct grant *persistent_gnt, *tmp; - struct llist_node *n; + struct grant *persistent_gnt; + struct grant *n; /* Prevent new requests being issued until we fix things up. */ spin_lock_irq(&info->io_lock); @@ -803,22 +828,20 @@ static void blkif_free(struct blkfront_info *info, int suspend) blk_stop_queue(info->rq); /* Remove all persistent grants */ - if (info->persistent_gnts_c) { - all_gnts = llist_del_all(&info->persistent_gnts); - persistent_gnt = llist_entry(all_gnts, typeof(*(persistent_gnt)), node); - while (persistent_gnt) { - gnttab_end_foreign_access(persistent_gnt->gref, 0, 0UL); + if (!list_empty(&info->persistent_gnts)) { + list_for_each_entry_safe(persistent_gnt, n, + &info->persistent_gnts, node) { + list_del(&persistent_gnt->node); + if (persistent_gnt->gref != GRANT_INVALID_REF) { + gnttab_end_foreign_access(persistent_gnt->gref, + 0, 0UL); + info->persistent_gnts_c--; + } __free_page(pfn_to_page(persistent_gnt->pfn)); - tmp = persistent_gnt; - n = persistent_gnt->node.next; - if (n) - persistent_gnt = llist_entry(n, typeof(*(persistent_gnt)), node); - else - persistent_gnt = NULL; - kfree(tmp); + kfree(persistent_gnt); } - info->persistent_gnts_c = 0; } + BUG_ON(info->persistent_gnts_c != 0); /* No more gnttab callback work. */ gnttab_cancel_free_callback(&info->callback); @@ -875,7 +898,7 @@ static void blkif_completion(struct blk_shadow *s, struct blkfront_info *info, } /* Add the persistent grant into the list of free grants */ for (i = 0; i < s->req.u.rw.nr_segments; i++) { - llist_add(&s->grants_used[i]->node, &info->persistent_gnts); + list_add(&s->grants_used[i]->node, &info->persistent_gnts); info->persistent_gnts_c++; } } @@ -1013,6 +1036,12 @@ static int setup_blkring(struct xenbus_device *dev, sg_init_table(info->sg, BLKIF_MAX_SEGMENTS_PER_REQUEST); + /* Allocate memory for grants */ + err = fill_grant_buffer(info, BLK_RING_SIZE * + BLKIF_MAX_SEGMENTS_PER_REQUEST); + if (err) + goto fail; + err = xenbus_grant_ring(dev, virt_to_mfn(info->ring.sring)); if (err < 0) { free_page((unsigned long)sring); @@ -1171,7 +1200,7 @@ static int blkfront_probe(struct xenbus_device *dev, spin_lock_init(&info->io_lock); info->xbdev = dev; info->vdevice = vdevice; - init_llist_head(&info->persistent_gnts); + INIT_LIST_HEAD(&info->persistent_gnts); info->persistent_gnts_c = 0; info->connected = BLKIF_STATE_DISCONNECTED; INIT_WORK(&info->work, blkif_restart_queue); @@ -1203,11 +1232,10 @@ static int blkif_recover(struct blkfront_info *info) int j; /* Stage 1: Make a safe copy of the shadow state. */ - copy = kmalloc(sizeof(info->shadow), + copy = kmemdup(info->shadow, sizeof(info->shadow), GFP_NOIO | __GFP_REPEAT | __GFP_HIGH); if (!copy) return -ENOMEM; - memcpy(copy, info->shadow, sizeof(info->shadow)); /* Stage 2: Set up free list. */ memset(&info->shadow, 0, sizeof(info->shadow)); @@ -1236,7 +1264,7 @@ static int blkif_recover(struct blkfront_info *info) gnttab_grant_foreign_access_ref( req->u.rw.seg[j].gref, info->xbdev->otherend_id, - pfn_to_mfn(info->shadow[req->u.rw.id].frame[j]), + pfn_to_mfn(copy[i].grants_used[j]->pfn), 0); } info->shadow[req->u.rw.id].req = *req; diff --git a/drivers/bluetooth/ath3k.c b/drivers/bluetooth/ath3k.c index a8a41e07a221..6aab00ef4379 100644 --- a/drivers/bluetooth/ath3k.c +++ b/drivers/bluetooth/ath3k.c @@ -73,9 +73,13 @@ static struct usb_device_id ath3k_table[] = { { USB_DEVICE(0x03F0, 0x311D) }, /* Atheros AR3012 with sflash firmware*/ + { USB_DEVICE(0x0CF3, 0x0036) }, { USB_DEVICE(0x0CF3, 0x3004) }, + { USB_DEVICE(0x0CF3, 0x3008) }, { USB_DEVICE(0x0CF3, 0x311D) }, + { USB_DEVICE(0x0CF3, 0x817a) }, { USB_DEVICE(0x13d3, 0x3375) }, + { USB_DEVICE(0x04CA, 0x3004) }, { USB_DEVICE(0x04CA, 0x3005) }, { USB_DEVICE(0x04CA, 0x3006) }, { USB_DEVICE(0x04CA, 0x3008) }, @@ -105,9 +109,13 @@ MODULE_DEVICE_TABLE(usb, ath3k_table); static struct usb_device_id ath3k_blist_tbl[] = { /* Atheros AR3012 with sflash firmware*/ + { USB_DEVICE(0x0CF3, 0x0036), .driver_info = BTUSB_ATH3012 }, { USB_DEVICE(0x0cf3, 0x3004), .driver_info = BTUSB_ATH3012 }, + { USB_DEVICE(0x0cf3, 0x3008), .driver_info = BTUSB_ATH3012 }, { USB_DEVICE(0x0cf3, 0x311D), .driver_info = BTUSB_ATH3012 }, + { USB_DEVICE(0x0CF3, 0x817a), .driver_info = BTUSB_ATH3012 }, { USB_DEVICE(0x13d3, 0x3375), .driver_info = BTUSB_ATH3012 }, + { USB_DEVICE(0x04ca, 0x3004), .driver_info = BTUSB_ATH3012 }, { USB_DEVICE(0x04ca, 0x3005), .driver_info = BTUSB_ATH3012 }, { USB_DEVICE(0x04ca, 0x3006), .driver_info = BTUSB_ATH3012 }, { USB_DEVICE(0x04ca, 0x3008), .driver_info = BTUSB_ATH3012 }, diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c index 7e351e345476..2cc5f774a29c 100644 --- a/drivers/bluetooth/btusb.c +++ b/drivers/bluetooth/btusb.c @@ -131,9 +131,13 @@ static struct usb_device_id blacklist_table[] = { { USB_DEVICE(0x03f0, 0x311d), .driver_info = BTUSB_IGNORE }, /* Atheros 3012 with sflash firmware */ + { USB_DEVICE(0x0cf3, 0x0036), .driver_info = BTUSB_ATH3012 }, { USB_DEVICE(0x0cf3, 0x3004), .driver_info = BTUSB_ATH3012 }, + { USB_DEVICE(0x0cf3, 0x3008), .driver_info = BTUSB_ATH3012 }, { USB_DEVICE(0x0cf3, 0x311d), .driver_info = BTUSB_ATH3012 }, + { USB_DEVICE(0x0cf3, 0x817a), .driver_info = BTUSB_ATH3012 }, { USB_DEVICE(0x13d3, 0x3375), .driver_info = BTUSB_ATH3012 }, + { USB_DEVICE(0x04ca, 0x3004), .driver_info = BTUSB_ATH3012 }, { USB_DEVICE(0x04ca, 0x3005), .driver_info = BTUSB_ATH3012 }, { USB_DEVICE(0x04ca, 0x3006), .driver_info = BTUSB_ATH3012 }, { USB_DEVICE(0x04ca, 0x3008), .driver_info = BTUSB_ATH3012 }, diff --git a/drivers/char/hw_random/virtio-rng.c b/drivers/char/hw_random/virtio-rng.c index 10fd71ccf587..6bf4d47324eb 100644 --- a/drivers/char/hw_random/virtio-rng.c +++ b/drivers/char/hw_random/virtio-rng.c @@ -92,14 +92,22 @@ static int probe_common(struct virtio_device *vdev) { int err; + if (vq) { + /* We only support one device for now */ + return -EBUSY; + } /* We expect a single virtqueue. */ vq = virtio_find_single_vq(vdev, random_recv_done, "input"); - if (IS_ERR(vq)) - return PTR_ERR(vq); + if (IS_ERR(vq)) { + err = PTR_ERR(vq); + vq = NULL; + return err; + } err = hwrng_register(&virtio_hwrng); if (err) { vdev->config->del_vqs(vdev); + vq = NULL; return err; } @@ -112,6 +120,7 @@ static void remove_common(struct virtio_device *vdev) busy = false; hwrng_unregister(&virtio_hwrng); vdev->config->del_vqs(vdev); + vq = NULL; } static int virtrng_probe(struct virtio_device *vdev) diff --git a/drivers/clk/clk-vt8500.c b/drivers/clk/clk-vt8500.c index b5538bba7a10..09c63315e579 100644 --- a/drivers/clk/clk-vt8500.c +++ b/drivers/clk/clk-vt8500.c @@ -157,7 +157,7 @@ static int vt8500_dclk_set_rate(struct clk_hw *hw, unsigned long rate, divisor = parent_rate / rate; /* If prate / rate would be decimal, incr the divisor */ - if (rate * divisor < *prate) + if (rate * divisor < parent_rate) divisor++; if (divisor == cdev->div_mask + 1) diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c index 143ce1f899ad..1e2de7305362 100644 --- a/drivers/clk/tegra/clk-tegra20.c +++ b/drivers/clk/tegra/clk-tegra20.c @@ -1292,7 +1292,6 @@ static struct tegra_clk_duplicate tegra_clk_duplicates[] = { TEGRA_CLK_DUPLICATE(usbd, "tegra-ehci.0", NULL), TEGRA_CLK_DUPLICATE(usbd, "tegra-otg", NULL), TEGRA_CLK_DUPLICATE(cclk, NULL, "cpu"), - TEGRA_CLK_DUPLICATE(twd, "smp_twd", NULL), TEGRA_CLK_DUPLICATE(clk_max, NULL, NULL), /* Must be the last entry */ }; diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c index 32c61cb6d0bb..ba6f51bc9f3b 100644 --- a/drivers/clk/tegra/clk-tegra30.c +++ b/drivers/clk/tegra/clk-tegra30.c @@ -1931,7 +1931,6 @@ static struct tegra_clk_duplicate tegra_clk_duplicates[] = { TEGRA_CLK_DUPLICATE(cml1, "tegra_sata_cml", NULL), TEGRA_CLK_DUPLICATE(cml0, "tegra_pcie", "cml"), TEGRA_CLK_DUPLICATE(pciex, "tegra_pcie", "pciex"), - TEGRA_CLK_DUPLICATE(twd, "smp_twd", NULL), TEGRA_CLK_DUPLICATE(vcp, "nvavp", "vcp"), TEGRA_CLK_DUPLICATE(clk_max, NULL, NULL), /* MUST be the last entry */ }; diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index e507ab7df60b..3167fda9bbb3 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -31,6 +31,9 @@ config SUNXI_TIMER config VT8500_TIMER bool +config CADENCE_TTC_TIMER + bool + config CLKSRC_NOMADIK_MTU bool depends on (ARCH_NOMADIK || ARCH_U8500) diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index 4d8283aec5b5..e74c8ce26bf0 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o obj-$(CONFIG_SUNXI_TIMER) += sunxi_timer.o obj-$(CONFIG_ARCH_TEGRA) += tegra20_timer.o obj-$(CONFIG_VT8500_TIMER) += vt8500_timer.o +obj-$(CONFIG_CADENCE_TTC_TIMER) += cadence_ttc_timer.o obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o obj-$(CONFIG_CLKSRC_METAG_GENERIC) += metag_generic.o diff --git a/drivers/clocksource/bcm2835_timer.c b/drivers/clocksource/bcm2835_timer.c index 50c68fef944b..766611d29945 100644 --- a/drivers/clocksource/bcm2835_timer.c +++ b/drivers/clocksource/bcm2835_timer.c @@ -95,23 +95,13 @@ static irqreturn_t bcm2835_time_interrupt(int irq, void *dev_id) } } -static struct of_device_id bcm2835_time_match[] __initconst = { - { .compatible = "brcm,bcm2835-system-timer" }, - {} -}; - -static void __init bcm2835_timer_init(void) +static void __init bcm2835_timer_init(struct device_node *node) { - struct device_node *node; void __iomem *base; u32 freq; int irq; struct bcm2835_timer *timer; - node = of_find_matching_node(NULL, bcm2835_time_match); - if (!node) - panic("No bcm2835 timer node"); - base = of_iomap(node, 0); if (!base) panic("Can't remap registers"); diff --git a/drivers/clocksource/cadence_ttc_timer.c b/drivers/clocksource/cadence_ttc_timer.c new file mode 100644 index 000000000000..685bc60e210a --- /dev/null +++ b/drivers/clocksource/cadence_ttc_timer.c @@ -0,0 +1,436 @@ +/* + * This file contains driver for the Cadence Triple Timer Counter Rev 06 + * + * Copyright (C) 2011-2013 Xilinx + * + * based on arch/mips/kernel/time.c timer driver + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/clk.h> +#include <linux/interrupt.h> +#include <linux/clockchips.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> +#include <linux/slab.h> +#include <linux/clk-provider.h> + +/* + * This driver configures the 2 16-bit count-up timers as follows: + * + * T1: Timer 1, clocksource for generic timekeeping + * T2: Timer 2, clockevent source for hrtimers + * T3: Timer 3, <unused> + * + * The input frequency to the timer module for emulation is 2.5MHz which is + * common to all the timer channels (T1, T2, and T3). With a pre-scaler of 32, + * the timers are clocked at 78.125KHz (12.8 us resolution). + + * The input frequency to the timer module in silicon is configurable and + * obtained from device tree. The pre-scaler of 32 is used. + */ + +/* + * Timer Register Offset Definitions of Timer 1, Increment base address by 4 + * and use same offsets for Timer 2 + */ +#define TTC_CLK_CNTRL_OFFSET 0x00 /* Clock Control Reg, RW */ +#define TTC_CNT_CNTRL_OFFSET 0x0C /* Counter Control Reg, RW */ +#define TTC_COUNT_VAL_OFFSET 0x18 /* Counter Value Reg, RO */ +#define TTC_INTR_VAL_OFFSET 0x24 /* Interval Count Reg, RW */ +#define TTC_ISR_OFFSET 0x54 /* Interrupt Status Reg, RO */ +#define TTC_IER_OFFSET 0x60 /* Interrupt Enable Reg, RW */ + +#define TTC_CNT_CNTRL_DISABLE_MASK 0x1 + +/* + * Setup the timers to use pre-scaling, using a fixed value for now that will + * work across most input frequency, but it may need to be more dynamic + */ +#define PRESCALE_EXPONENT 11 /* 2 ^ PRESCALE_EXPONENT = PRESCALE */ +#define PRESCALE 2048 /* The exponent must match this */ +#define CLK_CNTRL_PRESCALE ((PRESCALE_EXPONENT - 1) << 1) +#define CLK_CNTRL_PRESCALE_EN 1 +#define CNT_CNTRL_RESET (1 << 4) + +/** + * struct ttc_timer - This definition defines local timer structure + * + * @base_addr: Base address of timer + * @clk: Associated clock source + * @clk_rate_change_nb Notifier block for clock rate changes + */ +struct ttc_timer { + void __iomem *base_addr; + struct clk *clk; + struct notifier_block clk_rate_change_nb; +}; + +#define to_ttc_timer(x) \ + container_of(x, struct ttc_timer, clk_rate_change_nb) + +struct ttc_timer_clocksource { + struct ttc_timer ttc; + struct clocksource cs; +}; + +#define to_ttc_timer_clksrc(x) \ + container_of(x, struct ttc_timer_clocksource, cs) + +struct ttc_timer_clockevent { + struct ttc_timer ttc; + struct clock_event_device ce; +}; + +#define to_ttc_timer_clkevent(x) \ + container_of(x, struct ttc_timer_clockevent, ce) + +/** + * ttc_set_interval - Set the timer interval value + * + * @timer: Pointer to the timer instance + * @cycles: Timer interval ticks + **/ +static void ttc_set_interval(struct ttc_timer *timer, + unsigned long cycles) +{ + u32 ctrl_reg; + + /* Disable the counter, set the counter value and re-enable counter */ + ctrl_reg = __raw_readl(timer->base_addr + TTC_CNT_CNTRL_OFFSET); + ctrl_reg |= TTC_CNT_CNTRL_DISABLE_MASK; + __raw_writel(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET); + + __raw_writel(cycles, timer->base_addr + TTC_INTR_VAL_OFFSET); + + /* + * Reset the counter (0x10) so that it starts from 0, one-shot + * mode makes this needed for timing to be right. + */ + ctrl_reg |= CNT_CNTRL_RESET; + ctrl_reg &= ~TTC_CNT_CNTRL_DISABLE_MASK; + __raw_writel(ctrl_reg, timer->base_addr + TTC_CNT_CNTRL_OFFSET); +} + +/** + * ttc_clock_event_interrupt - Clock event timer interrupt handler + * + * @irq: IRQ number of the Timer + * @dev_id: void pointer to the ttc_timer instance + * + * returns: Always IRQ_HANDLED - success + **/ +static irqreturn_t ttc_clock_event_interrupt(int irq, void *dev_id) +{ + struct ttc_timer_clockevent *ttce = dev_id; + struct ttc_timer *timer = &ttce->ttc; + + /* Acknowledge the interrupt and call event handler */ + __raw_readl(timer->base_addr + TTC_ISR_OFFSET); + + ttce->ce.event_handler(&ttce->ce); + + return IRQ_HANDLED; +} + +/** + * __ttc_clocksource_read - Reads the timer counter register + * + * returns: Current timer counter register value + **/ +static cycle_t __ttc_clocksource_read(struct clocksource *cs) +{ + struct ttc_timer *timer = &to_ttc_timer_clksrc(cs)->ttc; + + return (cycle_t)__raw_readl(timer->base_addr + + TTC_COUNT_VAL_OFFSET); +} + +/** + * ttc_set_next_event - Sets the time interval for next event + * + * @cycles: Timer interval ticks + * @evt: Address of clock event instance + * + * returns: Always 0 - success + **/ +static int ttc_set_next_event(unsigned long cycles, + struct clock_event_device *evt) +{ + struct ttc_timer_clockevent *ttce = to_ttc_timer_clkevent(evt); + struct ttc_timer *timer = &ttce->ttc; + + ttc_set_interval(timer, cycles); + return 0; +} + +/** + * ttc_set_mode - Sets the mode of timer + * + * @mode: Mode to be set + * @evt: Address of clock event instance + **/ +static void ttc_set_mode(enum clock_event_mode mode, + struct clock_event_device *evt) +{ + struct ttc_timer_clockevent *ttce = to_ttc_timer_clkevent(evt); + struct ttc_timer *timer = &ttce->ttc; + u32 ctrl_reg; + + switch (mode) { + case CLOCK_EVT_MODE_PERIODIC: + ttc_set_interval(timer, + DIV_ROUND_CLOSEST(clk_get_rate(ttce->ttc.clk), + PRESCALE * HZ)); + break; + case CLOCK_EVT_MODE_ONESHOT: + case CLOCK_EVT_MODE_UNUSED: + case CLOCK_EVT_MODE_SHUTDOWN: + ctrl_reg = __raw_readl(timer->base_addr + + TTC_CNT_CNTRL_OFFSET); + ctrl_reg |= TTC_CNT_CNTRL_DISABLE_MASK; + __raw_writel(ctrl_reg, + timer->base_addr + TTC_CNT_CNTRL_OFFSET); + break; + case CLOCK_EVT_MODE_RESUME: + ctrl_reg = __raw_readl(timer->base_addr + + TTC_CNT_CNTRL_OFFSET); + ctrl_reg &= ~TTC_CNT_CNTRL_DISABLE_MASK; + __raw_writel(ctrl_reg, + timer->base_addr + TTC_CNT_CNTRL_OFFSET); + break; + } +} + +static int ttc_rate_change_clocksource_cb(struct notifier_block *nb, + unsigned long event, void *data) +{ + struct clk_notifier_data *ndata = data; + struct ttc_timer *ttc = to_ttc_timer(nb); + struct ttc_timer_clocksource *ttccs = container_of(ttc, + struct ttc_timer_clocksource, ttc); + + switch (event) { + case POST_RATE_CHANGE: + /* + * Do whatever is necessary to maintain a proper time base + * + * I cannot find a way to adjust the currently used clocksource + * to the new frequency. __clocksource_updatefreq_hz() sounds + * good, but does not work. Not sure what's that missing. + * + * This approach works, but triggers two clocksource switches. + * The first after unregister to clocksource jiffies. And + * another one after the register to the newly registered timer. + * + * Alternatively we could 'waste' another HW timer to ping pong + * between clock sources. That would also use one register and + * one unregister call, but only trigger one clocksource switch + * for the cost of another HW timer used by the OS. + */ + clocksource_unregister(&ttccs->cs); + clocksource_register_hz(&ttccs->cs, + ndata->new_rate / PRESCALE); + /* fall through */ + case PRE_RATE_CHANGE: + case ABORT_RATE_CHANGE: + default: + return NOTIFY_DONE; + } +} + +static void __init ttc_setup_clocksource(struct clk *clk, void __iomem *base) +{ + struct ttc_timer_clocksource *ttccs; + int err; + + ttccs = kzalloc(sizeof(*ttccs), GFP_KERNEL); + if (WARN_ON(!ttccs)) + return; + + ttccs->ttc.clk = clk; + + err = clk_prepare_enable(ttccs->ttc.clk); + if (WARN_ON(err)) { + kfree(ttccs); + return; + } + + ttccs->ttc.clk_rate_change_nb.notifier_call = + ttc_rate_change_clocksource_cb; + ttccs->ttc.clk_rate_change_nb.next = NULL; + if (clk_notifier_register(ttccs->ttc.clk, + &ttccs->ttc.clk_rate_change_nb)) + pr_warn("Unable to register clock notifier.\n"); + + ttccs->ttc.base_addr = base; + ttccs->cs.name = "ttc_clocksource"; + ttccs->cs.rating = 200; + ttccs->cs.read = __ttc_clocksource_read; + ttccs->cs.mask = CLOCKSOURCE_MASK(16); + ttccs->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS; + + /* + * Setup the clock source counter to be an incrementing counter + * with no interrupt and it rolls over at 0xFFFF. Pre-scale + * it by 32 also. Let it start running now. + */ + __raw_writel(0x0, ttccs->ttc.base_addr + TTC_IER_OFFSET); + __raw_writel(CLK_CNTRL_PRESCALE | CLK_CNTRL_PRESCALE_EN, + ttccs->ttc.base_addr + TTC_CLK_CNTRL_OFFSET); + __raw_writel(CNT_CNTRL_RESET, + ttccs->ttc.base_addr + TTC_CNT_CNTRL_OFFSET); + + err = clocksource_register_hz(&ttccs->cs, + clk_get_rate(ttccs->ttc.clk) / PRESCALE); + if (WARN_ON(err)) { + kfree(ttccs); + return; + } +} + +static int ttc_rate_change_clockevent_cb(struct notifier_block *nb, + unsigned long event, void *data) +{ + struct clk_notifier_data *ndata = data; + struct ttc_timer *ttc = to_ttc_timer(nb); + struct ttc_timer_clockevent *ttcce = container_of(ttc, + struct ttc_timer_clockevent, ttc); + + switch (event) { + case POST_RATE_CHANGE: + { + unsigned long flags; + + /* + * clockevents_update_freq should be called with IRQ disabled on + * the CPU the timer provides events for. The timer we use is + * common to both CPUs, not sure if we need to run on both + * cores. + */ + local_irq_save(flags); + clockevents_update_freq(&ttcce->ce, + ndata->new_rate / PRESCALE); + local_irq_restore(flags); + + /* fall through */ + } + case PRE_RATE_CHANGE: + case ABORT_RATE_CHANGE: + default: + return NOTIFY_DONE; + } +} + +static void __init ttc_setup_clockevent(struct clk *clk, + void __iomem *base, u32 irq) +{ + struct ttc_timer_clockevent *ttcce; + int err; + + ttcce = kzalloc(sizeof(*ttcce), GFP_KERNEL); + if (WARN_ON(!ttcce)) + return; + + ttcce->ttc.clk = clk; + + err = clk_prepare_enable(ttcce->ttc.clk); + if (WARN_ON(err)) { + kfree(ttcce); + return; + } + + ttcce->ttc.clk_rate_change_nb.notifier_call = + ttc_rate_change_clockevent_cb; + ttcce->ttc.clk_rate_change_nb.next = NULL; + if (clk_notifier_register(ttcce->ttc.clk, + &ttcce->ttc.clk_rate_change_nb)) + pr_warn("Unable to register clock notifier.\n"); + + ttcce->ttc.base_addr = base; + ttcce->ce.name = "ttc_clockevent"; + ttcce->ce.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; + ttcce->ce.set_next_event = ttc_set_next_event; + ttcce->ce.set_mode = ttc_set_mode; + ttcce->ce.rating = 200; + ttcce->ce.irq = irq; + ttcce->ce.cpumask = cpu_possible_mask; + + /* + * Setup the clock event timer to be an interval timer which + * is prescaled by 32 using the interval interrupt. Leave it + * disabled for now. + */ + __raw_writel(0x23, ttcce->ttc.base_addr + TTC_CNT_CNTRL_OFFSET); + __raw_writel(CLK_CNTRL_PRESCALE | CLK_CNTRL_PRESCALE_EN, + ttcce->ttc.base_addr + TTC_CLK_CNTRL_OFFSET); + __raw_writel(0x1, ttcce->ttc.base_addr + TTC_IER_OFFSET); + + err = request_irq(irq, ttc_clock_event_interrupt, + IRQF_DISABLED | IRQF_TIMER, + ttcce->ce.name, ttcce); + if (WARN_ON(err)) { + kfree(ttcce); + return; + } + + clockevents_config_and_register(&ttcce->ce, + clk_get_rate(ttcce->ttc.clk) / PRESCALE, 1, 0xfffe); +} + +/** + * ttc_timer_init - Initialize the timer + * + * Initializes the timer hardware and register the clock source and clock event + * timers with Linux kernal timer framework + */ +static void __init ttc_timer_init(struct device_node *timer) +{ + unsigned int irq; + void __iomem *timer_baseaddr; + struct clk *clk; + static int initialized; + + if (initialized) + return; + + initialized = 1; + + /* + * Get the 1st Triple Timer Counter (TTC) block from the device tree + * and use it. Note that the event timer uses the interrupt and it's the + * 2nd TTC hence the irq_of_parse_and_map(,1) + */ + timer_baseaddr = of_iomap(timer, 0); + if (!timer_baseaddr) { + pr_err("ERROR: invalid timer base address\n"); + BUG(); + } + + irq = irq_of_parse_and_map(timer, 1); + if (irq <= 0) { + pr_err("ERROR: invalid interrupt number\n"); + BUG(); + } + + clk = of_clk_get_by_name(timer, "cpu_1x"); + if (IS_ERR(clk)) { + pr_err("ERROR: timer input clock not found\n"); + BUG(); + } + + ttc_setup_clocksource(clk, timer_baseaddr); + ttc_setup_clockevent(clk, timer_baseaddr + 4, irq); + + pr_info("%s #0 at %p, irq=%d\n", timer->name, timer_baseaddr, irq); +} + +CLOCKSOURCE_OF_DECLARE(ttc, "cdns,ttc", ttc_timer_init); diff --git a/drivers/clocksource/clksrc-of.c b/drivers/clocksource/clksrc-of.c index bdabdaa8d00f..37f5325bec95 100644 --- a/drivers/clocksource/clksrc-of.c +++ b/drivers/clocksource/clksrc-of.c @@ -16,6 +16,7 @@ #include <linux/init.h> #include <linux/of.h> +#include <linux/clocksource.h> extern struct of_device_id __clksrc_of_table[]; @@ -26,10 +27,10 @@ void __init clocksource_of_init(void) { struct device_node *np; const struct of_device_id *match; - void (*init_func)(void); + clocksource_of_init_fn init_func; for_each_matching_node_and_match(np, __clksrc_of_table, &match) { init_func = match->data; - init_func(); + init_func(np); } } diff --git a/drivers/clocksource/tegra20_timer.c b/drivers/clocksource/tegra20_timer.c index 0bde03feb095..2e4d8a666c36 100644 --- a/drivers/clocksource/tegra20_timer.c +++ b/drivers/clocksource/tegra20_timer.c @@ -154,29 +154,12 @@ static struct irqaction tegra_timer_irq = { .dev_id = &tegra_clockevent, }; -static const struct of_device_id timer_match[] __initconst = { - { .compatible = "nvidia,tegra20-timer" }, - {} -}; - -static const struct of_device_id rtc_match[] __initconst = { - { .compatible = "nvidia,tegra20-rtc" }, - {} -}; - -static void __init tegra20_init_timer(void) +static void __init tegra20_init_timer(struct device_node *np) { - struct device_node *np; struct clk *clk; unsigned long rate; int ret; - np = of_find_matching_node(NULL, timer_match); - if (!np) { - pr_err("Failed to find timer DT node\n"); - BUG(); - } - timer_reg_base = of_iomap(np, 0); if (!timer_reg_base) { pr_err("Can't map timer registers\n"); @@ -200,30 +183,6 @@ static void __init tegra20_init_timer(void) of_node_put(np); - np = of_find_matching_node(NULL, rtc_match); - if (!np) { - pr_err("Failed to find RTC DT node\n"); - BUG(); - } - - rtc_base = of_iomap(np, 0); - if (!rtc_base) { - pr_err("Can't map RTC registers"); - BUG(); - } - - /* - * rtc registers are used by read_persistent_clock, keep the rtc clock - * enabled - */ - clk = clk_get_sys("rtc-tegra", NULL); - if (IS_ERR(clk)) - pr_warn("Unable to get rtc-tegra clock\n"); - else - clk_prepare_enable(clk); - - of_node_put(np); - switch (rate) { case 12000000: timer_writel(0x000b, TIMERUS_USEC_CFG); @@ -259,12 +218,34 @@ static void __init tegra20_init_timer(void) tegra_clockevent.irq = tegra_timer_irq.irq; clockevents_config_and_register(&tegra_clockevent, 1000000, 0x1, 0x1fffffff); -#ifdef CONFIG_HAVE_ARM_TWD - twd_local_timer_of_register(); -#endif +} +CLOCKSOURCE_OF_DECLARE(tegra20_timer, "nvidia,tegra20-timer", tegra20_init_timer); + +static void __init tegra20_init_rtc(struct device_node *np) +{ + struct clk *clk; + + rtc_base = of_iomap(np, 0); + if (!rtc_base) { + pr_err("Can't map RTC registers"); + BUG(); + } + + /* + * rtc registers are used by read_persistent_clock, keep the rtc clock + * enabled + */ + clk = clk_get_sys("rtc-tegra", NULL); + if (IS_ERR(clk)) + pr_warn("Unable to get rtc-tegra clock\n"); + else + clk_prepare_enable(clk); + + of_node_put(np); + register_persistent_clock(NULL, tegra_read_persistent_clock); } -CLOCKSOURCE_OF_DECLARE(tegra20, "nvidia,tegra20-timer", tegra20_init_timer); +CLOCKSOURCE_OF_DECLARE(tegra20_rtc, "nvidia,tegra20-rtc", tegra20_init_rtc); #ifdef CONFIG_PM static u32 usec_config; diff --git a/drivers/clocksource/vt8500_timer.c b/drivers/clocksource/vt8500_timer.c index 8efc86b5b5dd..64f553f04fa4 100644 --- a/drivers/clocksource/vt8500_timer.c +++ b/drivers/clocksource/vt8500_timer.c @@ -129,22 +129,10 @@ static struct irqaction irq = { .dev_id = &clockevent, }; -static struct of_device_id vt8500_timer_ids[] = { - { .compatible = "via,vt8500-timer" }, - { } -}; - -static void __init vt8500_timer_init(void) +static void __init vt8500_timer_init(struct device_node *np) { - struct device_node *np; int timer_irq; - np = of_find_matching_node(NULL, vt8500_timer_ids); - if (!np) { - pr_err("%s: Timer description missing from Device Tree\n", - __func__); - return; - } regbase = of_iomap(np, 0); if (!regbase) { pr_err("%s: Missing iobase description in Device Tree\n", @@ -177,4 +165,4 @@ static void __init vt8500_timer_init(void) 4, 0xf0000000); } -CLOCKSOURCE_OF_DECLARE(vt8500, "via,vt8500-timer", vt8500_timer_init) +CLOCKSOURCE_OF_DECLARE(vt8500, "via,vt8500-timer", vt8500_timer_init); diff --git a/drivers/cpufreq/acpi-cpufreq.c b/drivers/cpufreq/acpi-cpufreq.c index 937bc286591f..57a8774f0b4e 100644 --- a/drivers/cpufreq/acpi-cpufreq.c +++ b/drivers/cpufreq/acpi-cpufreq.c @@ -730,7 +730,6 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) { cpumask_copy(policy->cpus, perf->shared_cpu_map); } - cpumask_copy(policy->related_cpus, perf->shared_cpu_map); #ifdef CONFIG_SMP dmi_check_system(sw_any_bug_dmi_table); @@ -742,7 +741,6 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) { cpumask_clear(policy->cpus); cpumask_set_cpu(cpu, policy->cpus); - cpumask_copy(policy->related_cpus, cpu_sibling_mask(cpu)); policy->shared_type = CPUFREQ_SHARED_TYPE_HW; pr_info_once(PFX "overriding BIOS provided _PSD data\n"); } diff --git a/drivers/cpufreq/cpufreq_stats.c b/drivers/cpufreq/cpufreq_stats.c index 2fd779eb1ed1..bfd6273fd873 100644 --- a/drivers/cpufreq/cpufreq_stats.c +++ b/drivers/cpufreq/cpufreq_stats.c @@ -180,15 +180,19 @@ static void cpufreq_stats_free_sysfs(unsigned int cpu) { struct cpufreq_policy *policy = cpufreq_cpu_get(cpu); - if (!cpufreq_frequency_get_table(cpu)) + if (!policy) return; - if (policy && !policy_is_shared(policy)) { + if (!cpufreq_frequency_get_table(cpu)) + goto put_ref; + + if (!policy_is_shared(policy)) { pr_debug("%s: Free sysfs stat\n", __func__); sysfs_remove_group(&policy->kobj, &stats_attr_group); } - if (policy) - cpufreq_cpu_put(policy); + +put_ref: + cpufreq_cpu_put(policy); } static int cpufreq_stats_create_table(struct cpufreq_policy *policy, diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c index f6dd1e761129..ad72922919ed 100644 --- a/drivers/cpufreq/intel_pstate.c +++ b/drivers/cpufreq/intel_pstate.c @@ -358,14 +358,14 @@ static void intel_pstate_sysfs_expose_params(void) static int intel_pstate_min_pstate(void) { u64 value; - rdmsrl(0xCE, value); + rdmsrl(MSR_PLATFORM_INFO, value); return (value >> 40) & 0xFF; } static int intel_pstate_max_pstate(void) { u64 value; - rdmsrl(0xCE, value); + rdmsrl(MSR_PLATFORM_INFO, value); return (value >> 8) & 0xFF; } @@ -373,7 +373,7 @@ static int intel_pstate_turbo_pstate(void) { u64 value; int nont, ret; - rdmsrl(0x1AD, value); + rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value); nont = intel_pstate_max_pstate(); ret = ((value) & 255); if (ret <= nont) @@ -454,7 +454,7 @@ static inline void intel_pstate_calc_busy(struct cpudata *cpu, sample->idletime_us * 100, sample->duration_us); core_pct = div64_u64(sample->aperf * 100, sample->mperf); - sample->freq = cpu->pstate.turbo_pstate * core_pct * 1000; + sample->freq = cpu->pstate.max_pstate * core_pct * 1000; sample->core_pct_busy = div_s64((sample->pstate_pct_busy * core_pct), 100); @@ -752,6 +752,29 @@ static struct cpufreq_driver intel_pstate_driver = { static int __initdata no_load; +static int intel_pstate_msrs_not_valid(void) +{ + /* Check that all the msr's we are using are valid. */ + u64 aperf, mperf, tmp; + + rdmsrl(MSR_IA32_APERF, aperf); + rdmsrl(MSR_IA32_MPERF, mperf); + + if (!intel_pstate_min_pstate() || + !intel_pstate_max_pstate() || + !intel_pstate_turbo_pstate()) + return -ENODEV; + + rdmsrl(MSR_IA32_APERF, tmp); + if (!(tmp - aperf)) + return -ENODEV; + + rdmsrl(MSR_IA32_MPERF, tmp); + if (!(tmp - mperf)) + return -ENODEV; + + return 0; +} static int __init intel_pstate_init(void) { int cpu, rc = 0; @@ -764,6 +787,9 @@ static int __init intel_pstate_init(void) if (!id) return -ENODEV; + if (intel_pstate_msrs_not_valid()) + return -ENODEV; + pr_info("Intel P-state driver initializing.\n"); all_cpu_data = vmalloc(sizeof(void *) * num_possible_cpus()); diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam/caamalg.c index b2a0a0726a54..cf268b14ae9a 100644 --- a/drivers/crypto/caam/caamalg.c +++ b/drivers/crypto/caam/caamalg.c @@ -1650,11 +1650,7 @@ struct caam_alg_template { }; static struct caam_alg_template driver_algs[] = { - /* - * single-pass ipsec_esp descriptor - * authencesn(*,*) is also registered, although not present - * explicitly here. - */ + /* single-pass ipsec_esp descriptor */ { .name = "authenc(hmac(md5),cbc(aes))", .driver_name = "authenc-hmac-md5-cbc-aes-caam", @@ -2217,9 +2213,7 @@ static int __init caam_algapi_init(void) for (i = 0; i < ARRAY_SIZE(driver_algs); i++) { /* TODO: check if h/w supports alg */ struct caam_crypto_alg *t_alg; - bool done = false; -authencesn: t_alg = caam_alg_alloc(ctrldev, &driver_algs[i]); if (IS_ERR(t_alg)) { err = PTR_ERR(t_alg); @@ -2233,25 +2227,8 @@ authencesn: dev_warn(ctrldev, "%s alg registration failed\n", t_alg->crypto_alg.cra_driver_name); kfree(t_alg); - } else { + } else list_add_tail(&t_alg->entry, &priv->alg_list); - if (driver_algs[i].type == CRYPTO_ALG_TYPE_AEAD && - !memcmp(driver_algs[i].name, "authenc", 7) && - !done) { - char *name; - - name = driver_algs[i].name; - memmove(name + 10, name + 7, strlen(name) - 7); - memcpy(name + 7, "esn", 3); - - name = driver_algs[i].driver_name; - memmove(name + 10, name + 7, strlen(name) - 7); - memcpy(name + 7, "esn", 3); - - done = true; - goto authencesn; - } - } } if (!list_empty(&priv->alg_list)) dev_info(ctrldev, "%s algorithms registered in /proc/crypto\n", diff --git a/drivers/crypto/caam/compat.h b/drivers/crypto/caam/compat.h index cf15e7813801..762aeff626ac 100644 --- a/drivers/crypto/caam/compat.h +++ b/drivers/crypto/caam/compat.h @@ -23,7 +23,6 @@ #include <linux/types.h> #include <linux/debugfs.h> #include <linux/circ_buf.h> -#include <linux/string.h> #include <net/xfrm.h> #include <crypto/algapi.h> diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c index 09b184adf31b..5b2b5e61e4f9 100644 --- a/drivers/crypto/talitos.c +++ b/drivers/crypto/talitos.c @@ -38,7 +38,6 @@ #include <linux/spinlock.h> #include <linux/rtnetlink.h> #include <linux/slab.h> -#include <linux/string.h> #include <crypto/algapi.h> #include <crypto/aes.h> @@ -1974,11 +1973,7 @@ struct talitos_alg_template { }; static struct talitos_alg_template driver_algs[] = { - /* - * AEAD algorithms. These use a single-pass ipsec_esp descriptor. - * authencesn(*,*) is also registered, although not present - * explicitly here. - */ + /* AEAD algorithms. These use a single-pass ipsec_esp descriptor */ { .type = CRYPTO_ALG_TYPE_AEAD, .alg.crypto = { .cra_name = "authenc(hmac(sha1),cbc(aes))", @@ -2820,9 +2815,7 @@ static int talitos_probe(struct platform_device *ofdev) if (hw_supports(dev, driver_algs[i].desc_hdr_template)) { struct talitos_crypto_alg *t_alg; char *name = NULL; - bool authenc = false; -authencesn: t_alg = talitos_alg_alloc(dev, &driver_algs[i]); if (IS_ERR(t_alg)) { err = PTR_ERR(t_alg); @@ -2837,8 +2830,6 @@ authencesn: err = crypto_register_alg( &t_alg->algt.alg.crypto); name = t_alg->algt.alg.crypto.cra_driver_name; - authenc = authenc ? !authenc : - !(bool)memcmp(name, "authenc", 7); break; case CRYPTO_ALG_TYPE_AHASH: err = crypto_register_ahash( @@ -2851,25 +2842,8 @@ authencesn: dev_err(dev, "%s alg registration failed\n", name); kfree(t_alg); - } else { + } else list_add_tail(&t_alg->entry, &priv->alg_list); - if (authenc) { - struct crypto_alg *alg = - &driver_algs[i].alg.crypto; - - name = alg->cra_name; - memmove(name + 10, name + 7, - strlen(name) - 7); - memcpy(name + 7, "esn", 3); - - name = alg->cra_driver_name; - memmove(name + 10, name + 7, - strlen(name) - 7); - memcpy(name + 7, "esn", 3); - - goto authencesn; - } - } } } if (!list_empty(&priv->alg_list)) diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c index c599558faeda..43a5329d4483 100644 --- a/drivers/dma/dw_dmac.c +++ b/drivers/dma/dw_dmac.c @@ -1001,6 +1001,13 @@ static inline void convert_burst(u32 *maxburst) *maxburst = 0; } +static inline void convert_slave_id(struct dw_dma_chan *dwc) +{ + struct dw_dma *dw = to_dw_dma(dwc->chan.device); + + dwc->dma_sconfig.slave_id -= dw->request_line_base; +} + static int set_runtime_config(struct dma_chan *chan, struct dma_slave_config *sconfig) { @@ -1015,6 +1022,7 @@ set_runtime_config(struct dma_chan *chan, struct dma_slave_config *sconfig) convert_burst(&dwc->dma_sconfig.src_maxburst); convert_burst(&dwc->dma_sconfig.dst_maxburst); + convert_slave_id(dwc); return 0; } @@ -1276,9 +1284,9 @@ static struct dma_chan *dw_dma_xlate(struct of_phandle_args *dma_spec, if (dma_spec->args_count != 3) return NULL; - fargs.req = be32_to_cpup(dma_spec->args+0); - fargs.src = be32_to_cpup(dma_spec->args+1); - fargs.dst = be32_to_cpup(dma_spec->args+2); + fargs.req = dma_spec->args[0]; + fargs.src = dma_spec->args[1]; + fargs.dst = dma_spec->args[2]; if (WARN_ON(fargs.req >= DW_DMA_MAX_NR_REQUESTS || fargs.src >= dw->nr_masters || @@ -1628,6 +1636,7 @@ dw_dma_parse_dt(struct platform_device *pdev) static int dw_probe(struct platform_device *pdev) { + const struct platform_device_id *match; struct dw_dma_platform_data *pdata; struct resource *io; struct dw_dma *dw; @@ -1711,6 +1720,11 @@ static int dw_probe(struct platform_device *pdev) memcpy(dw->data_width, pdata->data_width, 4); } + /* Get the base request line if set */ + match = platform_get_device_id(pdev); + if (match) + dw->request_line_base = (unsigned int)match->driver_data; + /* Calculate all channel mask before DMA setup */ dw->all_chan_mask = (1 << nr_channels) - 1; @@ -1906,7 +1920,8 @@ MODULE_DEVICE_TABLE(of, dw_dma_id_table); #endif static const struct platform_device_id dw_dma_ids[] = { - { "INTL9C60", 0 }, + /* Name, Request Line Base */ + { "INTL9C60", (kernel_ulong_t)16 }, { } }; diff --git a/drivers/dma/dw_dmac_regs.h b/drivers/dma/dw_dmac_regs.h index cf0ce5c77d60..4d02c3669b75 100644 --- a/drivers/dma/dw_dmac_regs.h +++ b/drivers/dma/dw_dmac_regs.h @@ -247,6 +247,7 @@ struct dw_dma { /* hardware configuration */ unsigned char nr_masters; unsigned char data_width[4]; + unsigned int request_line_base; struct dw_dma_chan chan[0]; }; diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 910b0116c128..e1d13c463c90 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -2048,12 +2048,18 @@ static int init_csrows(struct mem_ctl_info *mci) edac_dbg(1, "MC node: %d, csrow: %d\n", pvt->mc_node_id, i); - if (row_dct0) + if (row_dct0) { nr_pages = amd64_csrow_nr_pages(pvt, 0, i); + csrow->channels[0]->dimm->nr_pages = nr_pages; + } /* K8 has only one DCT */ - if (boot_cpu_data.x86 != 0xf && row_dct1) - nr_pages += amd64_csrow_nr_pages(pvt, 1, i); + if (boot_cpu_data.x86 != 0xf && row_dct1) { + int row_dct1_pages = amd64_csrow_nr_pages(pvt, 1, i); + + csrow->channels[1]->dimm->nr_pages = row_dct1_pages; + nr_pages += row_dct1_pages; + } mtype = amd64_determine_memory_type(pvt, i); @@ -2072,9 +2078,7 @@ static int init_csrows(struct mem_ctl_info *mci) dimm = csrow->channels[j]->dimm; dimm->mtype = mtype; dimm->edac_mode = edac_mode; - dimm->nr_pages = nr_pages; } - csrow->nr_pages = nr_pages; } return empty; @@ -2419,7 +2423,6 @@ static int amd64_init_one_instance(struct pci_dev *F2) mci->pvt_info = pvt; mci->pdev = &pvt->F2->dev; - mci->csbased = 1; setup_mci_misc_attrs(mci, fam_type); diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c index cdb81aa73ab7..27e86d938262 100644 --- a/drivers/edac/edac_mc.c +++ b/drivers/edac/edac_mc.c @@ -86,7 +86,7 @@ static void edac_mc_dump_dimm(struct dimm_info *dimm, int number) edac_dimm_info_location(dimm, location, sizeof(location)); edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n", - dimm->mci->mem_is_per_rank ? "rank" : "dimm", + dimm->mci->csbased ? "rank" : "dimm", number, location, dimm->csrow, dimm->cschannel); edac_dbg(4, " dimm = %p\n", dimm); edac_dbg(4, " dimm->label = '%s'\n", dimm->label); @@ -341,7 +341,7 @@ struct mem_ctl_info *edac_mc_alloc(unsigned mc_num, memcpy(mci->layers, layers, sizeof(*layer) * n_layers); mci->nr_csrows = tot_csrows; mci->num_cschannel = tot_channels; - mci->mem_is_per_rank = per_rank; + mci->csbased = per_rank; /* * Alocate and fill the csrow/channels structs @@ -1235,7 +1235,7 @@ void edac_mc_handle_error(const enum hw_event_mc_err_type type, * incrementing the compat API counters */ edac_dbg(4, "%s csrows map: (%d,%d)\n", - mci->mem_is_per_rank ? "rank" : "dimm", + mci->csbased ? "rank" : "dimm", dimm->csrow, dimm->cschannel); if (row == -1) row = dimm->csrow; diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c index 4f4b6137d74e..5899a76eec3b 100644 --- a/drivers/edac/edac_mc_sysfs.c +++ b/drivers/edac/edac_mc_sysfs.c @@ -143,7 +143,7 @@ static const char *edac_caps[] = { * and the per-dimm/per-rank one */ #define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \ - struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store) + static struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store) struct dev_ch_attribute { struct device_attribute attr; @@ -180,9 +180,6 @@ static ssize_t csrow_size_show(struct device *dev, int i; u32 nr_pages = 0; - if (csrow->mci->csbased) - return sprintf(data, "%u\n", PAGES_TO_MiB(csrow->nr_pages)); - for (i = 0; i < csrow->nr_channels; i++) nr_pages += csrow->channels[i]->dimm->nr_pages; return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages)); @@ -612,7 +609,7 @@ static int edac_create_dimm_object(struct mem_ctl_info *mci, device_initialize(&dimm->dev); dimm->dev.parent = &mci->dev; - if (mci->mem_is_per_rank) + if (mci->csbased) dev_set_name(&dimm->dev, "rank%d", index); else dev_set_name(&dimm->dev, "dimm%d", index); @@ -778,14 +775,10 @@ static ssize_t mci_size_mb_show(struct device *dev, for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) { struct csrow_info *csrow = mci->csrows[csrow_idx]; - if (csrow->mci->csbased) { - total_pages += csrow->nr_pages; - } else { - for (j = 0; j < csrow->nr_channels; j++) { - struct dimm_info *dimm = csrow->channels[j]->dimm; + for (j = 0; j < csrow->nr_channels; j++) { + struct dimm_info *dimm = csrow->channels[j]->dimm; - total_pages += dimm->nr_pages; - } + total_pages += dimm->nr_pages; } } diff --git a/drivers/extcon/extcon-max77693.c b/drivers/extcon/extcon-max77693.c index b70e3815c459..8f3c947b0029 100644 --- a/drivers/extcon/extcon-max77693.c +++ b/drivers/extcon/extcon-max77693.c @@ -32,6 +32,38 @@ #define DEV_NAME "max77693-muic" #define DELAY_MS_DEFAULT 20000 /* unit: millisecond */ +/* + * Default value of MAX77693 register to bring up MUIC device. + * If user don't set some initial value for MUIC device through platform data, + * extcon-max77693 driver use 'default_init_data' to bring up base operation + * of MAX77693 MUIC device. + */ +struct max77693_reg_data default_init_data[] = { + { + /* STATUS2 - [3]ChgDetRun */ + .addr = MAX77693_MUIC_REG_STATUS2, + .data = STATUS2_CHGDETRUN_MASK, + }, { + /* INTMASK1 - Unmask [3]ADC1KM,[0]ADCM */ + .addr = MAX77693_MUIC_REG_INTMASK1, + .data = INTMASK1_ADC1K_MASK + | INTMASK1_ADC_MASK, + }, { + /* INTMASK2 - Unmask [0]ChgTypM */ + .addr = MAX77693_MUIC_REG_INTMASK2, + .data = INTMASK2_CHGTYP_MASK, + }, { + /* INTMASK3 - Mask all of interrupts */ + .addr = MAX77693_MUIC_REG_INTMASK3, + .data = 0x0, + }, { + /* CDETCTRL2 */ + .addr = MAX77693_MUIC_REG_CDETCTRL2, + .data = CDETCTRL2_VIDRMEN_MASK + | CDETCTRL2_DXOVPEN_MASK, + }, +}; + enum max77693_muic_adc_debounce_time { ADC_DEBOUNCE_TIME_5MS = 0, ADC_DEBOUNCE_TIME_10MS, @@ -1045,8 +1077,9 @@ static int max77693_muic_probe(struct platform_device *pdev) { struct max77693_dev *max77693 = dev_get_drvdata(pdev->dev.parent); struct max77693_platform_data *pdata = dev_get_platdata(max77693->dev); - struct max77693_muic_platform_data *muic_pdata = pdata->muic_data; struct max77693_muic_info *info; + struct max77693_reg_data *init_data; + int num_init_data; int delay_jiffies; int ret; int i; @@ -1145,15 +1178,25 @@ static int max77693_muic_probe(struct platform_device *pdev) goto err_irq; } - /* Initialize MUIC register by using platform data */ - for (i = 0 ; i < muic_pdata->num_init_data ; i++) { - enum max77693_irq_source irq_src = MAX77693_IRQ_GROUP_NR; + + /* Initialize MUIC register by using platform data or default data */ + if (pdata->muic_data) { + init_data = pdata->muic_data->init_data; + num_init_data = pdata->muic_data->num_init_data; + } else { + init_data = default_init_data; + num_init_data = ARRAY_SIZE(default_init_data); + } + + for (i = 0 ; i < num_init_data ; i++) { + enum max77693_irq_source irq_src + = MAX77693_IRQ_GROUP_NR; max77693_write_reg(info->max77693->regmap_muic, - muic_pdata->init_data[i].addr, - muic_pdata->init_data[i].data); + init_data[i].addr, + init_data[i].data); - switch (muic_pdata->init_data[i].addr) { + switch (init_data[i].addr) { case MAX77693_MUIC_REG_INTMASK1: irq_src = MUIC_INT1; break; @@ -1167,22 +1210,40 @@ static int max77693_muic_probe(struct platform_device *pdev) if (irq_src < MAX77693_IRQ_GROUP_NR) info->max77693->irq_masks_cur[irq_src] - = muic_pdata->init_data[i].data; + = init_data[i].data; } - /* - * Default usb/uart path whether UART/USB or AUX_UART/AUX_USB - * h/w path of COMP2/COMN1 on CONTROL1 register. - */ - if (muic_pdata->path_uart) - info->path_uart = muic_pdata->path_uart; - else - info->path_uart = CONTROL1_SW_UART; + if (pdata->muic_data) { + struct max77693_muic_platform_data *muic_pdata = pdata->muic_data; - if (muic_pdata->path_usb) - info->path_usb = muic_pdata->path_usb; - else + /* + * Default usb/uart path whether UART/USB or AUX_UART/AUX_USB + * h/w path of COMP2/COMN1 on CONTROL1 register. + */ + if (muic_pdata->path_uart) + info->path_uart = muic_pdata->path_uart; + else + info->path_uart = CONTROL1_SW_UART; + + if (muic_pdata->path_usb) + info->path_usb = muic_pdata->path_usb; + else + info->path_usb = CONTROL1_SW_USB; + + /* + * Default delay time for detecting cable state + * after certain time. + */ + if (muic_pdata->detcable_delay_ms) + delay_jiffies = + msecs_to_jiffies(muic_pdata->detcable_delay_ms); + else + delay_jiffies = msecs_to_jiffies(DELAY_MS_DEFAULT); + } else { info->path_usb = CONTROL1_SW_USB; + info->path_uart = CONTROL1_SW_UART; + delay_jiffies = msecs_to_jiffies(DELAY_MS_DEFAULT); + } /* Set initial path for UART */ max77693_muic_set_path(info, info->path_uart, true); @@ -1208,10 +1269,6 @@ static int max77693_muic_probe(struct platform_device *pdev) * driver should notify cable state to upper layer. */ INIT_DELAYED_WORK(&info->wq_detcable, max77693_muic_detect_cable_wq); - if (muic_pdata->detcable_delay_ms) - delay_jiffies = msecs_to_jiffies(muic_pdata->detcable_delay_ms); - else - delay_jiffies = msecs_to_jiffies(DELAY_MS_DEFAULT); schedule_delayed_work(&info->wq_detcable, delay_jiffies); return ret; diff --git a/drivers/extcon/extcon-max8997.c b/drivers/extcon/extcon-max8997.c index e636d950ad6c..69641bcae325 100644 --- a/drivers/extcon/extcon-max8997.c +++ b/drivers/extcon/extcon-max8997.c @@ -712,29 +712,45 @@ static int max8997_muic_probe(struct platform_device *pdev) goto err_irq; } - /* Initialize registers according to platform data */ if (pdata->muic_pdata) { - struct max8997_muic_platform_data *mdata = info->muic_pdata; - - for (i = 0; i < mdata->num_init_data; i++) { - max8997_write_reg(info->muic, mdata->init_data[i].addr, - mdata->init_data[i].data); + struct max8997_muic_platform_data *muic_pdata + = pdata->muic_pdata; + + /* Initialize registers according to platform data */ + for (i = 0; i < muic_pdata->num_init_data; i++) { + max8997_write_reg(info->muic, + muic_pdata->init_data[i].addr, + muic_pdata->init_data[i].data); } - } - /* - * Default usb/uart path whether UART/USB or AUX_UART/AUX_USB - * h/w path of COMP2/COMN1 on CONTROL1 register. - */ - if (pdata->muic_pdata->path_uart) - info->path_uart = pdata->muic_pdata->path_uart; - else - info->path_uart = CONTROL1_SW_UART; + /* + * Default usb/uart path whether UART/USB or AUX_UART/AUX_USB + * h/w path of COMP2/COMN1 on CONTROL1 register. + */ + if (muic_pdata->path_uart) + info->path_uart = muic_pdata->path_uart; + else + info->path_uart = CONTROL1_SW_UART; - if (pdata->muic_pdata->path_usb) - info->path_usb = pdata->muic_pdata->path_usb; - else + if (muic_pdata->path_usb) + info->path_usb = muic_pdata->path_usb; + else + info->path_usb = CONTROL1_SW_USB; + + /* + * Default delay time for detecting cable state + * after certain time. + */ + if (muic_pdata->detcable_delay_ms) + delay_jiffies = + msecs_to_jiffies(muic_pdata->detcable_delay_ms); + else + delay_jiffies = msecs_to_jiffies(DELAY_MS_DEFAULT); + } else { + info->path_uart = CONTROL1_SW_UART; info->path_usb = CONTROL1_SW_USB; + delay_jiffies = msecs_to_jiffies(DELAY_MS_DEFAULT); + } /* Set initial path for UART */ max8997_muic_set_path(info, info->path_uart, true); @@ -751,10 +767,6 @@ static int max8997_muic_probe(struct platform_device *pdev) * driver should notify cable state to upper layer. */ INIT_DELAYED_WORK(&info->wq_detcable, max8997_muic_detect_cable_wq); - if (pdata->muic_pdata->detcable_delay_ms) - delay_jiffies = msecs_to_jiffies(pdata->muic_pdata->detcable_delay_ms); - else - delay_jiffies = msecs_to_jiffies(DELAY_MS_DEFAULT); schedule_delayed_work(&info->wq_detcable, delay_jiffies); return 0; diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig index 9b00072a020f..42c759a4d047 100644 --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig @@ -53,6 +53,24 @@ config EFI_VARS Subsequent efibootmgr releases may be found at: <http://linux.dell.com/efibootmgr> +config EFI_VARS_PSTORE + bool "Register efivars backend for pstore" + depends on EFI_VARS && PSTORE + default y + help + Say Y here to enable use efivars as a backend to pstore. This + will allow writing console messages, crash dumps, or anything + else supported by pstore to EFI variables. + +config EFI_VARS_PSTORE_DEFAULT_DISABLE + bool "Disable using efivars as a pstore backend by default" + depends on EFI_VARS_PSTORE + default n + help + Saying Y here will disable the use of efivars as a storage + backend for pstore by default. This setting can be overridden + using the efivars module's pstore_disable parameter. + config EFI_PCDP bool "Console device selection via EFI PCDP or HCDP table" depends on ACPI && EFI && IA64 diff --git a/drivers/firmware/efivars.c b/drivers/firmware/efivars.c index fe62aa392239..7acafb80fd4c 100644 --- a/drivers/firmware/efivars.c +++ b/drivers/firmware/efivars.c @@ -103,6 +103,11 @@ MODULE_VERSION(EFIVARS_VERSION); */ #define GUID_LEN 36 +static bool efivars_pstore_disable = + IS_ENABLED(CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE); + +module_param_named(pstore_disable, efivars_pstore_disable, bool, 0644); + /* * The maximum size of VariableName + Data = 1024 * Therefore, it's reasonable to save that much @@ -165,6 +170,7 @@ efivar_create_sysfs_entry(struct efivars *efivars, static void efivar_update_sysfs_entries(struct work_struct *); static DECLARE_WORK(efivar_work, efivar_update_sysfs_entries); +static bool efivar_wq_enabled = true; /* Return the number of unicode characters in data */ static unsigned long @@ -1309,9 +1315,7 @@ static const struct inode_operations efivarfs_dir_inode_operations = { .create = efivarfs_create, }; -static struct pstore_info efi_pstore_info; - -#ifdef CONFIG_PSTORE +#ifdef CONFIG_EFI_VARS_PSTORE static int efi_pstore_open(struct pstore_info *psi) { @@ -1441,7 +1445,7 @@ static int efi_pstore_write(enum pstore_type_id type, spin_unlock_irqrestore(&efivars->lock, flags); - if (reason == KMSG_DUMP_OOPS) + if (reason == KMSG_DUMP_OOPS && efivar_wq_enabled) schedule_work(&efivar_work); *id = part; @@ -1514,38 +1518,6 @@ static int efi_pstore_erase(enum pstore_type_id type, u64 id, int count, return 0; } -#else -static int efi_pstore_open(struct pstore_info *psi) -{ - return 0; -} - -static int efi_pstore_close(struct pstore_info *psi) -{ - return 0; -} - -static ssize_t efi_pstore_read(u64 *id, enum pstore_type_id *type, int *count, - struct timespec *timespec, - char **buf, struct pstore_info *psi) -{ - return -1; -} - -static int efi_pstore_write(enum pstore_type_id type, - enum kmsg_dump_reason reason, u64 *id, - unsigned int part, int count, size_t size, - struct pstore_info *psi) -{ - return 0; -} - -static int efi_pstore_erase(enum pstore_type_id type, u64 id, int count, - struct timespec time, struct pstore_info *psi) -{ - return 0; -} -#endif static struct pstore_info efi_pstore_info = { .owner = THIS_MODULE, @@ -1557,6 +1529,24 @@ static struct pstore_info efi_pstore_info = { .erase = efi_pstore_erase, }; +static void efivar_pstore_register(struct efivars *efivars) +{ + efivars->efi_pstore_info = efi_pstore_info; + efivars->efi_pstore_info.buf = kmalloc(4096, GFP_KERNEL); + if (efivars->efi_pstore_info.buf) { + efivars->efi_pstore_info.bufsize = 1024; + efivars->efi_pstore_info.data = efivars; + spin_lock_init(&efivars->efi_pstore_info.buf_lock); + pstore_register(&efivars->efi_pstore_info); + } +} +#else +static void efivar_pstore_register(struct efivars *efivars) +{ + return; +} +#endif + static ssize_t efivar_create(struct file *filp, struct kobject *kobj, struct bin_attribute *bin_attr, char *buf, loff_t pos, size_t count) @@ -1716,6 +1706,31 @@ static bool variable_is_present(efi_char16_t *variable_name, efi_guid_t *vendor) return found; } +/* + * Returns the size of variable_name, in bytes, including the + * terminating NULL character, or variable_name_size if no NULL + * character is found among the first variable_name_size bytes. + */ +static unsigned long var_name_strnsize(efi_char16_t *variable_name, + unsigned long variable_name_size) +{ + unsigned long len; + efi_char16_t c; + + /* + * The variable name is, by definition, a NULL-terminated + * string, so make absolutely sure that variable_name_size is + * the value we expect it to be. If not, return the real size. + */ + for (len = 2; len <= variable_name_size; len += sizeof(c)) { + c = variable_name[(len / sizeof(c)) - 1]; + if (!c) + break; + } + + return min(len, variable_name_size); +} + static void efivar_update_sysfs_entries(struct work_struct *work) { struct efivars *efivars = &__efivars; @@ -1756,10 +1771,13 @@ static void efivar_update_sysfs_entries(struct work_struct *work) if (!found) { kfree(variable_name); break; - } else + } else { + variable_name_size = var_name_strnsize(variable_name, + variable_name_size); efivar_create_sysfs_entry(efivars, variable_name_size, variable_name, &vendor); + } } } @@ -1958,6 +1976,35 @@ void unregister_efivars(struct efivars *efivars) } EXPORT_SYMBOL_GPL(unregister_efivars); +/* + * Print a warning when duplicate EFI variables are encountered and + * disable the sysfs workqueue since the firmware is buggy. + */ +static void dup_variable_bug(efi_char16_t *s16, efi_guid_t *vendor_guid, + unsigned long len16) +{ + size_t i, len8 = len16 / sizeof(efi_char16_t); + char *s8; + + /* + * Disable the workqueue since the algorithm it uses for + * detecting new variables won't work with this buggy + * implementation of GetNextVariableName(). + */ + efivar_wq_enabled = false; + + s8 = kzalloc(len8, GFP_KERNEL); + if (!s8) + return; + + for (i = 0; i < len8; i++) + s8[i] = s16[i]; + + printk(KERN_WARNING "efivars: duplicate variable: %s-%pUl\n", + s8, vendor_guid); + kfree(s8); +} + int register_efivars(struct efivars *efivars, const struct efivar_operations *ops, struct kobject *parent_kobj) @@ -2006,6 +2053,24 @@ int register_efivars(struct efivars *efivars, &vendor_guid); switch (status) { case EFI_SUCCESS: + variable_name_size = var_name_strnsize(variable_name, + variable_name_size); + + /* + * Some firmware implementations return the + * same variable name on multiple calls to + * get_next_variable(). Terminate the loop + * immediately as there is no guarantee that + * we'll ever see a different variable name, + * and may end up looping here forever. + */ + if (variable_is_present(variable_name, &vendor_guid)) { + dup_variable_bug(variable_name, &vendor_guid, + variable_name_size); + status = EFI_NOT_FOUND; + break; + } + efivar_create_sysfs_entry(efivars, variable_name_size, variable_name, @@ -2025,15 +2090,8 @@ int register_efivars(struct efivars *efivars, if (error) unregister_efivars(efivars); - efivars->efi_pstore_info = efi_pstore_info; - - efivars->efi_pstore_info.buf = kmalloc(4096, GFP_KERNEL); - if (efivars->efi_pstore_info.buf) { - efivars->efi_pstore_info.bufsize = 1024; - efivars->efi_pstore_info.data = efivars; - spin_lock_init(&efivars->efi_pstore_info.buf_lock); - pstore_register(&efivars->efi_pstore_info); - } + if (!efivars_pstore_disable) + efivar_pstore_register(efivars); register_filesystem(&efivarfs_type); diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 93aaadf99f28..d766e3cbef18 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -204,6 +204,12 @@ config GPIO_PXA help Say yes here to support the PXA GPIO device +config GPIO_RCAR + tristate "Renesas R-Car GPIO" + depends on ARM + help + Say yes here to support GPIO on Renesas R-Car SoCs. + config GPIO_SPEAR_SPICS bool "ST SPEAr13xx SPI Chip Select as GPIO support" depends on PLAT_SPEAR diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 22e07bc9fcb5..b41c74d45287 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -57,6 +57,7 @@ obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o obj-$(CONFIG_GPIO_RC5T583) += gpio-rc5t583.o obj-$(CONFIG_GPIO_RDC321X) += gpio-rdc321x.o +obj-$(CONFIG_GPIO_RCAR) += gpio-rcar.o obj-$(CONFIG_PLAT_SAMSUNG) += gpio-samsung.o obj-$(CONFIG_ARCH_SA1100) += gpio-sa1100.o obj-$(CONFIG_GPIO_SCH) += gpio-sch.o diff --git a/drivers/gpio/gpio-msm-v2.c b/drivers/gpio/gpio-msm-v2.c index 55a7e7769af6..dd2eddeb1e0c 100644 --- a/drivers/gpio/gpio-msm-v2.c +++ b/drivers/gpio/gpio-msm-v2.c @@ -23,13 +23,12 @@ #include <linux/init.h> #include <linux/interrupt.h> #include <linux/io.h> +#include <linux/irqchip/chained_irq.h> #include <linux/irq.h> #include <linux/module.h> #include <linux/platform_device.h> #include <linux/spinlock.h> -#include <asm/mach/irq.h> - #include <mach/msm_gpiomux.h> #include <mach/msm_iomap.h> diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c index 7472182967ce..61a6fde6c089 100644 --- a/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c @@ -42,6 +42,7 @@ #include <linux/io.h> #include <linux/of_irq.h> #include <linux/of_device.h> +#include <linux/clk.h> #include <linux/pinctrl/consumer.h> /* @@ -496,6 +497,7 @@ static int mvebu_gpio_probe(struct platform_device *pdev) struct resource *res; struct irq_chip_generic *gc; struct irq_chip_type *ct; + struct clk *clk; unsigned int ngpios; int soc_variant; int i, cpu, id; @@ -529,6 +531,11 @@ static int mvebu_gpio_probe(struct platform_device *pdev) return id; } + clk = devm_clk_get(&pdev->dev, NULL); + /* Not all SoCs require a clock.*/ + if (!IS_ERR(clk)) + clk_prepare_enable(clk); + mvchip->soc_variant = soc_variant; mvchip->chip.label = dev_name(&pdev->dev); mvchip->chip.dev = &pdev->dev; diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c index 7877335c4cc8..7176743915d3 100644 --- a/drivers/gpio/gpio-mxc.c +++ b/drivers/gpio/gpio-mxc.c @@ -24,6 +24,7 @@ #include <linux/io.h> #include <linux/irq.h> #include <linux/irqdomain.h> +#include <linux/irqchip/chained_irq.h> #include <linux/gpio.h> #include <linux/platform_device.h> #include <linux/slab.h> @@ -32,7 +33,6 @@ #include <linux/of_device.h> #include <linux/module.h> #include <asm-generic/bug.h> -#include <asm/mach/irq.h> enum mxc_gpio_hwtype { IMX1_GPIO, /* runs on i.mx1 */ diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 159f5c57eb45..a612ea1c53cb 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -25,11 +25,10 @@ #include <linux/of.h> #include <linux/of_device.h> #include <linux/irqdomain.h> +#include <linux/irqchip/chained_irq.h> #include <linux/gpio.h> #include <linux/platform_data/gpio-omap.h> -#include <asm/mach/irq.h> - #define OFF_MODE 1 static LIST_HEAD(omap_gpio_list); diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c index b820869ca93c..5c06f3062599 100644 --- a/drivers/gpio/gpio-pl061.c +++ b/drivers/gpio/gpio-pl061.c @@ -15,6 +15,8 @@ #include <linux/io.h> #include <linux/ioport.h> #include <linux/irq.h> +#include <linux/irqchip/chained_irq.h> +#include <linux/irqdomain.h> #include <linux/bitops.h> #include <linux/workqueue.h> #include <linux/gpio.h> @@ -22,8 +24,8 @@ #include <linux/amba/bus.h> #include <linux/amba/pl061.h> #include <linux/slab.h> +#include <linux/pinctrl/consumer.h> #include <linux/pm.h> -#include <asm/mach/irq.h> #define GPIODIR 0x400 #define GPIOIS 0x404 @@ -51,8 +53,7 @@ struct pl061_gpio { spinlock_t lock; void __iomem *base; - int irq_base; - struct irq_chip_generic *irq_gc; + struct irq_domain *domain; struct gpio_chip gc; #ifdef CONFIG_PM @@ -60,6 +61,17 @@ struct pl061_gpio { #endif }; +static int pl061_gpio_request(struct gpio_chip *chip, unsigned offset) +{ + /* + * Map back to global GPIO space and request muxing, the direction + * parameter does not matter for this controller. + */ + int gpio = chip->base + offset; + + return pinctrl_request_gpio(gpio); +} + static int pl061_direction_input(struct gpio_chip *gc, unsigned offset) { struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); @@ -122,24 +134,20 @@ static int pl061_to_irq(struct gpio_chip *gc, unsigned offset) { struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); - if (chip->irq_base <= 0) - return -EINVAL; - - return chip->irq_base + offset; + return irq_create_mapping(chip->domain, offset); } static int pl061_irq_type(struct irq_data *d, unsigned trigger) { - struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); - struct pl061_gpio *chip = gc->private; - int offset = d->irq - chip->irq_base; + struct pl061_gpio *chip = irq_data_get_irq_chip_data(d); + int offset = irqd_to_hwirq(d); unsigned long flags; u8 gpiois, gpioibe, gpioiev; if (offset < 0 || offset >= PL061_GPIO_NR) return -EINVAL; - raw_spin_lock_irqsave(&gc->lock, flags); + spin_lock_irqsave(&chip->lock, flags); gpioiev = readb(chip->base + GPIOIEV); @@ -168,7 +176,7 @@ static int pl061_irq_type(struct irq_data *d, unsigned trigger) writeb(gpioiev, chip->base + GPIOIEV); - raw_spin_unlock_irqrestore(&gc->lock, flags); + spin_unlock_irqrestore(&chip->lock, flags); return 0; } @@ -192,31 +200,61 @@ static void pl061_irq_handler(unsigned irq, struct irq_desc *desc) chained_irq_exit(irqchip, desc); } -static void __init pl061_init_gc(struct pl061_gpio *chip, int irq_base) +static void pl061_irq_mask(struct irq_data *d) { - struct irq_chip_type *ct; + struct pl061_gpio *chip = irq_data_get_irq_chip_data(d); + u8 mask = 1 << (irqd_to_hwirq(d) % PL061_GPIO_NR); + u8 gpioie; + + spin_lock(&chip->lock); + gpioie = readb(chip->base + GPIOIE) & ~mask; + writeb(gpioie, chip->base + GPIOIE); + spin_unlock(&chip->lock); +} + +static void pl061_irq_unmask(struct irq_data *d) +{ + struct pl061_gpio *chip = irq_data_get_irq_chip_data(d); + u8 mask = 1 << (irqd_to_hwirq(d) % PL061_GPIO_NR); + u8 gpioie; + + spin_lock(&chip->lock); + gpioie = readb(chip->base + GPIOIE) | mask; + writeb(gpioie, chip->base + GPIOIE); + spin_unlock(&chip->lock); +} - chip->irq_gc = irq_alloc_generic_chip("gpio-pl061", 1, irq_base, - chip->base, handle_simple_irq); - chip->irq_gc->private = chip; +static struct irq_chip pl061_irqchip = { + .name = "pl061 gpio", + .irq_mask = pl061_irq_mask, + .irq_unmask = pl061_irq_unmask, + .irq_set_type = pl061_irq_type, +}; + +static int pl061_irq_map(struct irq_domain *d, unsigned int virq, + irq_hw_number_t hw) +{ + struct pl061_gpio *chip = d->host_data; - ct = chip->irq_gc->chip_types; - ct->chip.irq_mask = irq_gc_mask_clr_bit; - ct->chip.irq_unmask = irq_gc_mask_set_bit; - ct->chip.irq_set_type = pl061_irq_type; - ct->chip.irq_set_wake = irq_gc_set_wake; - ct->regs.mask = GPIOIE; + irq_set_chip_and_handler_name(virq, &pl061_irqchip, handle_simple_irq, + "pl061"); + irq_set_chip_data(virq, chip); + irq_set_irq_type(virq, IRQ_TYPE_NONE); - irq_setup_generic_chip(chip->irq_gc, IRQ_MSK(PL061_GPIO_NR), - IRQ_GC_INIT_NESTED_LOCK, IRQ_NOREQUEST, 0); + return 0; } +static const struct irq_domain_ops pl061_domain_ops = { + .map = pl061_irq_map, + .xlate = irq_domain_xlate_twocell, +}; + static int pl061_probe(struct amba_device *adev, const struct amba_id *id) { struct device *dev = &adev->dev; struct pl061_platform_data *pdata = dev->platform_data; struct pl061_gpio *chip; - int ret, irq, i; + int ret, irq, i, irq_base; chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); if (chip == NULL) @@ -224,24 +262,31 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id) if (pdata) { chip->gc.base = pdata->gpio_base; - chip->irq_base = pdata->irq_base; - } else if (adev->dev.of_node) { + irq_base = pdata->irq_base; + if (irq_base <= 0) + return -ENODEV; + } else { chip->gc.base = -1; - chip->irq_base = 0; - } else - return -ENODEV; + irq_base = 0; + } if (!devm_request_mem_region(dev, adev->res.start, - resource_size(&adev->res), "pl061")) + resource_size(&adev->res), "pl061")) return -EBUSY; chip->base = devm_ioremap(dev, adev->res.start, - resource_size(&adev->res)); - if (chip->base == NULL) + resource_size(&adev->res)); + if (!chip->base) return -ENOMEM; + chip->domain = irq_domain_add_simple(adev->dev.of_node, PL061_GPIO_NR, + irq_base, &pl061_domain_ops, chip); + if (!chip->domain) + return -ENODEV; + spin_lock_init(&chip->lock); + chip->gc.request = pl061_gpio_request; chip->gc.direction_input = pl061_direction_input; chip->gc.direction_output = pl061_direction_output; chip->gc.get = pl061_get_value; @@ -259,12 +304,6 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id) /* * irq_chip support */ - - if (chip->irq_base <= 0) - return 0; - - pl061_init_gc(chip, chip->irq_base); - writeb(0, chip->base + GPIOIE); /* disable irqs */ irq = adev->irq[0]; if (irq < 0) diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c index 9cc108d2b770..7523b6d108d0 100644 --- a/drivers/gpio/gpio-pxa.c +++ b/drivers/gpio/gpio-pxa.c @@ -19,6 +19,7 @@ #include <linux/init.h> #include <linux/irq.h> #include <linux/irqdomain.h> +#include <linux/irqchip/chained_irq.h> #include <linux/io.h> #include <linux/of.h> #include <linux/of_device.h> @@ -26,8 +27,6 @@ #include <linux/syscore_ops.h> #include <linux/slab.h> -#include <asm/mach/irq.h> - #include <mach/irqs.h> /* diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c new file mode 100644 index 000000000000..b4ca450947b8 --- /dev/null +++ b/drivers/gpio/gpio-rcar.c @@ -0,0 +1,396 @@ +/* + * Renesas R-Car GPIO Support + * + * Copyright (C) 2013 Magnus Damm + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/err.h> +#include <linux/gpio.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/io.h> +#include <linux/ioport.h> +#include <linux/irq.h> +#include <linux/irqdomain.h> +#include <linux/module.h> +#include <linux/pinctrl/consumer.h> +#include <linux/platform_data/gpio-rcar.h> +#include <linux/platform_device.h> +#include <linux/spinlock.h> +#include <linux/slab.h> + +struct gpio_rcar_priv { + void __iomem *base; + spinlock_t lock; + struct gpio_rcar_config config; + struct platform_device *pdev; + struct gpio_chip gpio_chip; + struct irq_chip irq_chip; + struct irq_domain *irq_domain; +}; + +#define IOINTSEL 0x00 +#define INOUTSEL 0x04 +#define OUTDT 0x08 +#define INDT 0x0c +#define INTDT 0x10 +#define INTCLR 0x14 +#define INTMSK 0x18 +#define MSKCLR 0x1c +#define POSNEG 0x20 +#define EDGLEVEL 0x24 +#define FILONOFF 0x28 + +static inline u32 gpio_rcar_read(struct gpio_rcar_priv *p, int offs) +{ + return ioread32(p->base + offs); +} + +static inline void gpio_rcar_write(struct gpio_rcar_priv *p, int offs, + u32 value) +{ + iowrite32(value, p->base + offs); +} + +static void gpio_rcar_modify_bit(struct gpio_rcar_priv *p, int offs, + int bit, bool value) +{ + u32 tmp = gpio_rcar_read(p, offs); + + if (value) + tmp |= BIT(bit); + else + tmp &= ~BIT(bit); + + gpio_rcar_write(p, offs, tmp); +} + +static void gpio_rcar_irq_disable(struct irq_data *d) +{ + struct gpio_rcar_priv *p = irq_data_get_irq_chip_data(d); + + gpio_rcar_write(p, INTMSK, ~BIT(irqd_to_hwirq(d))); +} + +static void gpio_rcar_irq_enable(struct irq_data *d) +{ + struct gpio_rcar_priv *p = irq_data_get_irq_chip_data(d); + + gpio_rcar_write(p, MSKCLR, BIT(irqd_to_hwirq(d))); +} + +static void gpio_rcar_config_interrupt_input_mode(struct gpio_rcar_priv *p, + unsigned int hwirq, + bool active_high_rising_edge, + bool level_trigger) +{ + unsigned long flags; + + /* follow steps in the GPIO documentation for + * "Setting Edge-Sensitive Interrupt Input Mode" and + * "Setting Level-Sensitive Interrupt Input Mode" + */ + + spin_lock_irqsave(&p->lock, flags); + + /* Configure postive or negative logic in POSNEG */ + gpio_rcar_modify_bit(p, POSNEG, hwirq, !active_high_rising_edge); + + /* Configure edge or level trigger in EDGLEVEL */ + gpio_rcar_modify_bit(p, EDGLEVEL, hwirq, !level_trigger); + + /* Select "Interrupt Input Mode" in IOINTSEL */ + gpio_rcar_modify_bit(p, IOINTSEL, hwirq, true); + + /* Write INTCLR in case of edge trigger */ + if (!level_trigger) + gpio_rcar_write(p, INTCLR, BIT(hwirq)); + + spin_unlock_irqrestore(&p->lock, flags); +} + +static int gpio_rcar_irq_set_type(struct irq_data *d, unsigned int type) +{ + struct gpio_rcar_priv *p = irq_data_get_irq_chip_data(d); + unsigned int hwirq = irqd_to_hwirq(d); + + dev_dbg(&p->pdev->dev, "sense irq = %d, type = %d\n", hwirq, type); + + switch (type & IRQ_TYPE_SENSE_MASK) { + case IRQ_TYPE_LEVEL_HIGH: + gpio_rcar_config_interrupt_input_mode(p, hwirq, true, true); + break; + case IRQ_TYPE_LEVEL_LOW: + gpio_rcar_config_interrupt_input_mode(p, hwirq, false, true); + break; + case IRQ_TYPE_EDGE_RISING: + gpio_rcar_config_interrupt_input_mode(p, hwirq, true, false); + break; + case IRQ_TYPE_EDGE_FALLING: + gpio_rcar_config_interrupt_input_mode(p, hwirq, false, false); + break; + default: + return -EINVAL; + } + return 0; +} + +static irqreturn_t gpio_rcar_irq_handler(int irq, void *dev_id) +{ + struct gpio_rcar_priv *p = dev_id; + u32 pending; + unsigned int offset, irqs_handled = 0; + + while ((pending = gpio_rcar_read(p, INTDT))) { + offset = __ffs(pending); + gpio_rcar_write(p, INTCLR, BIT(offset)); + generic_handle_irq(irq_find_mapping(p->irq_domain, offset)); + irqs_handled++; + } + + return irqs_handled ? IRQ_HANDLED : IRQ_NONE; +} + +static inline struct gpio_rcar_priv *gpio_to_priv(struct gpio_chip *chip) +{ + return container_of(chip, struct gpio_rcar_priv, gpio_chip); +} + +static void gpio_rcar_config_general_input_output_mode(struct gpio_chip *chip, + unsigned int gpio, + bool output) +{ + struct gpio_rcar_priv *p = gpio_to_priv(chip); + unsigned long flags; + + /* follow steps in the GPIO documentation for + * "Setting General Output Mode" and + * "Setting General Input Mode" + */ + + spin_lock_irqsave(&p->lock, flags); + + /* Configure postive logic in POSNEG */ + gpio_rcar_modify_bit(p, POSNEG, gpio, false); + + /* Select "General Input/Output Mode" in IOINTSEL */ + gpio_rcar_modify_bit(p, IOINTSEL, gpio, false); + + /* Select Input Mode or Output Mode in INOUTSEL */ + gpio_rcar_modify_bit(p, INOUTSEL, gpio, output); + + spin_unlock_irqrestore(&p->lock, flags); +} + +static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset) +{ + return pinctrl_request_gpio(chip->base + offset); +} + +static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset) +{ + pinctrl_free_gpio(chip->base + offset); + + /* Set the GPIO as an input to ensure that the next GPIO request won't + * drive the GPIO pin as an output. + */ + gpio_rcar_config_general_input_output_mode(chip, offset, false); +} + +static int gpio_rcar_direction_input(struct gpio_chip *chip, unsigned offset) +{ + gpio_rcar_config_general_input_output_mode(chip, offset, false); + return 0; +} + +static int gpio_rcar_get(struct gpio_chip *chip, unsigned offset) +{ + return (int)(gpio_rcar_read(gpio_to_priv(chip), INDT) & BIT(offset)); +} + +static void gpio_rcar_set(struct gpio_chip *chip, unsigned offset, int value) +{ + struct gpio_rcar_priv *p = gpio_to_priv(chip); + unsigned long flags; + + spin_lock_irqsave(&p->lock, flags); + gpio_rcar_modify_bit(p, OUTDT, offset, value); + spin_unlock_irqrestore(&p->lock, flags); +} + +static int gpio_rcar_direction_output(struct gpio_chip *chip, unsigned offset, + int value) +{ + /* write GPIO value to output before selecting output mode of pin */ + gpio_rcar_set(chip, offset, value); + gpio_rcar_config_general_input_output_mode(chip, offset, true); + return 0; +} + +static int gpio_rcar_to_irq(struct gpio_chip *chip, unsigned offset) +{ + return irq_create_mapping(gpio_to_priv(chip)->irq_domain, offset); +} + +static int gpio_rcar_irq_domain_map(struct irq_domain *h, unsigned int virq, + irq_hw_number_t hw) +{ + struct gpio_rcar_priv *p = h->host_data; + + dev_dbg(&p->pdev->dev, "map hw irq = %d, virq = %d\n", (int)hw, virq); + + irq_set_chip_data(virq, h->host_data); + irq_set_chip_and_handler(virq, &p->irq_chip, handle_level_irq); + set_irq_flags(virq, IRQF_VALID); /* kill me now */ + return 0; +} + +static struct irq_domain_ops gpio_rcar_irq_domain_ops = { + .map = gpio_rcar_irq_domain_map, +}; + +static int gpio_rcar_probe(struct platform_device *pdev) +{ + struct gpio_rcar_config *pdata = pdev->dev.platform_data; + struct gpio_rcar_priv *p; + struct resource *io, *irq; + struct gpio_chip *gpio_chip; + struct irq_chip *irq_chip; + const char *name = dev_name(&pdev->dev); + int ret; + + p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL); + if (!p) { + dev_err(&pdev->dev, "failed to allocate driver data\n"); + ret = -ENOMEM; + goto err0; + } + + /* deal with driver instance configuration */ + if (pdata) + p->config = *pdata; + + p->pdev = pdev; + platform_set_drvdata(pdev, p); + spin_lock_init(&p->lock); + + io = platform_get_resource(pdev, IORESOURCE_MEM, 0); + irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + + if (!io || !irq) { + dev_err(&pdev->dev, "missing IRQ or IOMEM\n"); + ret = -EINVAL; + goto err0; + } + + p->base = devm_ioremap_nocache(&pdev->dev, io->start, + resource_size(io)); + if (!p->base) { + dev_err(&pdev->dev, "failed to remap I/O memory\n"); + ret = -ENXIO; + goto err0; + } + + gpio_chip = &p->gpio_chip; + gpio_chip->request = gpio_rcar_request; + gpio_chip->free = gpio_rcar_free; + gpio_chip->direction_input = gpio_rcar_direction_input; + gpio_chip->get = gpio_rcar_get; + gpio_chip->direction_output = gpio_rcar_direction_output; + gpio_chip->set = gpio_rcar_set; + gpio_chip->to_irq = gpio_rcar_to_irq; + gpio_chip->label = name; + gpio_chip->owner = THIS_MODULE; + gpio_chip->base = p->config.gpio_base; + gpio_chip->ngpio = p->config.number_of_pins; + + irq_chip = &p->irq_chip; + irq_chip->name = name; + irq_chip->irq_mask = gpio_rcar_irq_disable; + irq_chip->irq_unmask = gpio_rcar_irq_enable; + irq_chip->irq_enable = gpio_rcar_irq_enable; + irq_chip->irq_disable = gpio_rcar_irq_disable; + irq_chip->irq_set_type = gpio_rcar_irq_set_type; + irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_SET_TYPE_MASKED; + + p->irq_domain = irq_domain_add_simple(pdev->dev.of_node, + p->config.number_of_pins, + p->config.irq_base, + &gpio_rcar_irq_domain_ops, p); + if (!p->irq_domain) { + ret = -ENXIO; + dev_err(&pdev->dev, "cannot initialize irq domain\n"); + goto err1; + } + + if (devm_request_irq(&pdev->dev, irq->start, + gpio_rcar_irq_handler, 0, name, p)) { + dev_err(&pdev->dev, "failed to request IRQ\n"); + ret = -ENOENT; + goto err1; + } + + ret = gpiochip_add(gpio_chip); + if (ret) { + dev_err(&pdev->dev, "failed to add GPIO controller\n"); + goto err1; + } + + dev_info(&pdev->dev, "driving %d GPIOs\n", p->config.number_of_pins); + + /* warn in case of mismatch if irq base is specified */ + if (p->config.irq_base) { + ret = irq_find_mapping(p->irq_domain, 0); + if (p->config.irq_base != ret) + dev_warn(&pdev->dev, "irq base mismatch (%u/%u)\n", + p->config.irq_base, ret); + } + + ret = gpiochip_add_pin_range(gpio_chip, p->config.pctl_name, 0, + gpio_chip->base, gpio_chip->ngpio); + if (ret < 0) + dev_warn(&pdev->dev, "failed to add pin range\n"); + + return 0; + +err1: + irq_domain_remove(p->irq_domain); +err0: + return ret; +} + +static int gpio_rcar_remove(struct platform_device *pdev) +{ + struct gpio_rcar_priv *p = platform_get_drvdata(pdev); + int ret; + + ret = gpiochip_remove(&p->gpio_chip); + if (ret) + return ret; + + irq_domain_remove(p->irq_domain); + return 0; +} + +static struct platform_driver gpio_rcar_device_driver = { + .probe = gpio_rcar_probe, + .remove = gpio_rcar_remove, + .driver = { + .name = "gpio_rcar", + } +}; + +module_platform_driver(gpio_rcar_device_driver); + +MODULE_AUTHOR("Magnus Damm"); +MODULE_DESCRIPTION("Renesas R-Car GPIO Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c index 414ad912232f..8e2155548888 100644 --- a/drivers/gpio/gpio-tegra.c +++ b/drivers/gpio/gpio-tegra.c @@ -27,11 +27,10 @@ #include <linux/platform_device.h> #include <linux/module.h> #include <linux/irqdomain.h> +#include <linux/irqchip/chained_irq.h> #include <linux/pinctrl/consumer.h> #include <linux/pm.h> -#include <asm/mach/irq.h> - #define GPIO_BANK(x) ((x) >> 5) #define GPIO_PORT(x) (((x) >> 3) & 0x3) #define GPIO_BIT(x) ((x) & 0x7) diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c index a71a54a3e3f7..465f4ca57e80 100644 --- a/drivers/gpio/gpiolib-of.c +++ b/drivers/gpio/gpiolib-of.c @@ -193,7 +193,7 @@ static void of_gpiochip_add_pin_range(struct gpio_chip *chip) if (!np) return; - do { + for (;; index++) { ret = of_parse_phandle_with_args(np, "gpio-ranges", "#gpio-range-cells", index, &pinspec); if (ret) @@ -203,27 +203,15 @@ static void of_gpiochip_add_pin_range(struct gpio_chip *chip) if (!pctldev) break; - /* - * This assumes that the n GPIO pins are consecutive in the - * GPIO number space, and that the pins are also consecutive - * in their local number space. Currently it is not possible - * to add different ranges for one and the same GPIO chip, - * as the code assumes that we have one consecutive range - * on both, mapping 1-to-1. - * - * TODO: make the OF bindings handle multiple sparse ranges - * on the same GPIO chip. - */ ret = gpiochip_add_pin_range(chip, pinctrl_dev_get_devname(pctldev), - 0, /* offset in gpiochip */ pinspec.args[0], - pinspec.args[1]); + pinspec.args[1], + pinspec.args[2]); if (ret) break; - - } while (index++); + } } #else diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index c194f4e680ad..e2acfdbf7d3c 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -1634,7 +1634,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; - unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4; + unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4; unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); /* ignore tiny modes */ @@ -1715,6 +1715,7 @@ set_size: } mode->type = DRM_MODE_TYPE_DRIVER; + mode->vrefresh = drm_mode_vrefresh(mode); drm_mode_set_name(mode); return mode; diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c index 36493ce71f9a..98cc14725ba9 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c @@ -38,11 +38,12 @@ /* position control register for hardware window 0, 2 ~ 4.*/ #define VIDOSD_A(win) (VIDOSD_BASE + 0x00 + (win) * 16) #define VIDOSD_B(win) (VIDOSD_BASE + 0x04 + (win) * 16) -/* size control register for hardware window 0. */ -#define VIDOSD_C_SIZE_W0 (VIDOSD_BASE + 0x08) -/* alpha control register for hardware window 1 ~ 4. */ -#define VIDOSD_C(win) (VIDOSD_BASE + 0x18 + (win) * 16) -/* size control register for hardware window 1 ~ 4. */ +/* + * size control register for hardware windows 0 and alpha control register + * for hardware windows 1 ~ 4 + */ +#define VIDOSD_C(win) (VIDOSD_BASE + 0x08 + (win) * 16) +/* size control register for hardware windows 1 ~ 2. */ #define VIDOSD_D(win) (VIDOSD_BASE + 0x0C + (win) * 16) #define VIDWx_BUF_START(win, buf) (VIDW_BUF_START(buf) + (win) * 8) @@ -50,9 +51,9 @@ #define VIDWx_BUF_SIZE(win, buf) (VIDW_BUF_SIZE(buf) + (win) * 4) /* color key control register for hardware window 1 ~ 4. */ -#define WKEYCON0_BASE(x) ((WKEYCON0 + 0x140) + (x * 8)) +#define WKEYCON0_BASE(x) ((WKEYCON0 + 0x140) + ((x - 1) * 8)) /* color key value register for hardware window 1 ~ 4. */ -#define WKEYCON1_BASE(x) ((WKEYCON1 + 0x140) + (x * 8)) +#define WKEYCON1_BASE(x) ((WKEYCON1 + 0x140) + ((x - 1) * 8)) /* FIMD has totally five hardware windows. */ #define WINDOWS_NR 5 @@ -109,9 +110,9 @@ struct fimd_context { #ifdef CONFIG_OF static const struct of_device_id fimd_driver_dt_match[] = { - { .compatible = "samsung,exynos4-fimd", + { .compatible = "samsung,exynos4210-fimd", .data = &exynos4_fimd_driver_data }, - { .compatible = "samsung,exynos5-fimd", + { .compatible = "samsung,exynos5250-fimd", .data = &exynos5_fimd_driver_data }, {}, }; @@ -581,7 +582,7 @@ static void fimd_win_commit(struct device *dev, int zpos) if (win != 3 && win != 4) { u32 offset = VIDOSD_D(win); if (win == 0) - offset = VIDOSD_C_SIZE_W0; + offset = VIDOSD_C(win); val = win_data->ovl_width * win_data->ovl_height; writel(val, ctx->regs + offset); diff --git a/drivers/gpu/drm/exynos/exynos_drm_g2d.c b/drivers/gpu/drm/exynos/exynos_drm_g2d.c index 3b0da0378acf..47a493c8a71f 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_g2d.c +++ b/drivers/gpu/drm/exynos/exynos_drm_g2d.c @@ -48,8 +48,14 @@ /* registers for base address */ #define G2D_SRC_BASE_ADDR 0x0304 +#define G2D_SRC_COLOR_MODE 0x030C +#define G2D_SRC_LEFT_TOP 0x0310 +#define G2D_SRC_RIGHT_BOTTOM 0x0314 #define G2D_SRC_PLANE2_BASE_ADDR 0x0318 #define G2D_DST_BASE_ADDR 0x0404 +#define G2D_DST_COLOR_MODE 0x040C +#define G2D_DST_LEFT_TOP 0x0410 +#define G2D_DST_RIGHT_BOTTOM 0x0414 #define G2D_DST_PLANE2_BASE_ADDR 0x0418 #define G2D_PAT_BASE_ADDR 0x0500 #define G2D_MSK_BASE_ADDR 0x0520 @@ -82,7 +88,7 @@ #define G2D_DMA_LIST_DONE_COUNT_OFFSET 17 /* G2D_DMA_HOLD_CMD */ -#define G2D_USET_HOLD (1 << 2) +#define G2D_USER_HOLD (1 << 2) #define G2D_LIST_HOLD (1 << 1) #define G2D_BITBLT_HOLD (1 << 0) @@ -91,13 +97,27 @@ #define G2D_START_NHOLT (1 << 1) #define G2D_START_BITBLT (1 << 0) +/* buffer color format */ +#define G2D_FMT_XRGB8888 0 +#define G2D_FMT_ARGB8888 1 +#define G2D_FMT_RGB565 2 +#define G2D_FMT_XRGB1555 3 +#define G2D_FMT_ARGB1555 4 +#define G2D_FMT_XRGB4444 5 +#define G2D_FMT_ARGB4444 6 +#define G2D_FMT_PACKED_RGB888 7 +#define G2D_FMT_A8 11 +#define G2D_FMT_L8 12 + +/* buffer valid length */ +#define G2D_LEN_MIN 1 +#define G2D_LEN_MAX 8000 + #define G2D_CMDLIST_SIZE (PAGE_SIZE / 4) #define G2D_CMDLIST_NUM 64 #define G2D_CMDLIST_POOL_SIZE (G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM) #define G2D_CMDLIST_DATA_NUM (G2D_CMDLIST_SIZE / sizeof(u32) - 2) -#define MAX_BUF_ADDR_NR 6 - /* maximum buffer pool size of userptr is 64MB as default */ #define MAX_POOL (64 * 1024 * 1024) @@ -106,6 +126,17 @@ enum { BUF_TYPE_USERPTR, }; +enum g2d_reg_type { + REG_TYPE_NONE = -1, + REG_TYPE_SRC, + REG_TYPE_SRC_PLANE2, + REG_TYPE_DST, + REG_TYPE_DST_PLANE2, + REG_TYPE_PAT, + REG_TYPE_MSK, + MAX_REG_TYPE_NR +}; + /* cmdlist data structure */ struct g2d_cmdlist { u32 head; @@ -113,6 +144,42 @@ struct g2d_cmdlist { u32 last; /* last data offset */ }; +/* + * A structure of buffer description + * + * @format: color format + * @left_x: the x coordinates of left top corner + * @top_y: the y coordinates of left top corner + * @right_x: the x coordinates of right bottom corner + * @bottom_y: the y coordinates of right bottom corner + * + */ +struct g2d_buf_desc { + unsigned int format; + unsigned int left_x; + unsigned int top_y; + unsigned int right_x; + unsigned int bottom_y; +}; + +/* + * A structure of buffer information + * + * @map_nr: manages the number of mapped buffers + * @reg_types: stores regitster type in the order of requested command + * @handles: stores buffer handle in its reg_type position + * @types: stores buffer type in its reg_type position + * @descs: stores buffer description in its reg_type position + * + */ +struct g2d_buf_info { + unsigned int map_nr; + enum g2d_reg_type reg_types[MAX_REG_TYPE_NR]; + unsigned long handles[MAX_REG_TYPE_NR]; + unsigned int types[MAX_REG_TYPE_NR]; + struct g2d_buf_desc descs[MAX_REG_TYPE_NR]; +}; + struct drm_exynos_pending_g2d_event { struct drm_pending_event base; struct drm_exynos_g2d_event event; @@ -131,14 +198,11 @@ struct g2d_cmdlist_userptr { bool in_pool; bool out_of_list; }; - struct g2d_cmdlist_node { struct list_head list; struct g2d_cmdlist *cmdlist; - unsigned int map_nr; - unsigned long handles[MAX_BUF_ADDR_NR]; - unsigned int obj_type[MAX_BUF_ADDR_NR]; dma_addr_t dma_addr; + struct g2d_buf_info buf_info; struct drm_exynos_pending_g2d_event *event; }; @@ -188,6 +252,7 @@ static int g2d_init_cmdlist(struct g2d_data *g2d) struct exynos_drm_subdrv *subdrv = &g2d->subdrv; int nr; int ret; + struct g2d_buf_info *buf_info; init_dma_attrs(&g2d->cmdlist_dma_attrs); dma_set_attr(DMA_ATTR_WRITE_COMBINE, &g2d->cmdlist_dma_attrs); @@ -209,11 +274,17 @@ static int g2d_init_cmdlist(struct g2d_data *g2d) } for (nr = 0; nr < G2D_CMDLIST_NUM; nr++) { + unsigned int i; + node[nr].cmdlist = g2d->cmdlist_pool_virt + nr * G2D_CMDLIST_SIZE; node[nr].dma_addr = g2d->cmdlist_pool + nr * G2D_CMDLIST_SIZE; + buf_info = &node[nr].buf_info; + for (i = 0; i < MAX_REG_TYPE_NR; i++) + buf_info->reg_types[i] = REG_TYPE_NONE; + list_add_tail(&node[nr].list, &g2d->free_cmdlist); } @@ -450,7 +521,7 @@ static dma_addr_t *g2d_userptr_get_dma_addr(struct drm_device *drm_dev, DMA_BIDIRECTIONAL); if (ret < 0) { DRM_ERROR("failed to map sgt with dma region.\n"); - goto err_free_sgt; + goto err_sg_free_table; } g2d_userptr->dma_addr = sgt->sgl[0].dma_address; @@ -467,8 +538,10 @@ static dma_addr_t *g2d_userptr_get_dma_addr(struct drm_device *drm_dev, return &g2d_userptr->dma_addr; -err_free_sgt: +err_sg_free_table: sg_free_table(sgt); + +err_free_sgt: kfree(sgt); sgt = NULL; @@ -506,36 +579,172 @@ static void g2d_userptr_free_all(struct drm_device *drm_dev, g2d->current_pool = 0; } +static enum g2d_reg_type g2d_get_reg_type(int reg_offset) +{ + enum g2d_reg_type reg_type; + + switch (reg_offset) { + case G2D_SRC_BASE_ADDR: + case G2D_SRC_COLOR_MODE: + case G2D_SRC_LEFT_TOP: + case G2D_SRC_RIGHT_BOTTOM: + reg_type = REG_TYPE_SRC; + break; + case G2D_SRC_PLANE2_BASE_ADDR: + reg_type = REG_TYPE_SRC_PLANE2; + break; + case G2D_DST_BASE_ADDR: + case G2D_DST_COLOR_MODE: + case G2D_DST_LEFT_TOP: + case G2D_DST_RIGHT_BOTTOM: + reg_type = REG_TYPE_DST; + break; + case G2D_DST_PLANE2_BASE_ADDR: + reg_type = REG_TYPE_DST_PLANE2; + break; + case G2D_PAT_BASE_ADDR: + reg_type = REG_TYPE_PAT; + break; + case G2D_MSK_BASE_ADDR: + reg_type = REG_TYPE_MSK; + break; + default: + reg_type = REG_TYPE_NONE; + DRM_ERROR("Unknown register offset![%d]\n", reg_offset); + break; + }; + + return reg_type; +} + +static unsigned long g2d_get_buf_bpp(unsigned int format) +{ + unsigned long bpp; + + switch (format) { + case G2D_FMT_XRGB8888: + case G2D_FMT_ARGB8888: + bpp = 4; + break; + case G2D_FMT_RGB565: + case G2D_FMT_XRGB1555: + case G2D_FMT_ARGB1555: + case G2D_FMT_XRGB4444: + case G2D_FMT_ARGB4444: + bpp = 2; + break; + case G2D_FMT_PACKED_RGB888: + bpp = 3; + break; + default: + bpp = 1; + break; + } + + return bpp; +} + +static bool g2d_check_buf_desc_is_valid(struct g2d_buf_desc *buf_desc, + enum g2d_reg_type reg_type, + unsigned long size) +{ + unsigned int width, height; + unsigned long area; + + /* + * check source and destination buffers only. + * so the others are always valid. + */ + if (reg_type != REG_TYPE_SRC && reg_type != REG_TYPE_DST) + return true; + + width = buf_desc->right_x - buf_desc->left_x; + if (width < G2D_LEN_MIN || width > G2D_LEN_MAX) { + DRM_ERROR("width[%u] is out of range!\n", width); + return false; + } + + height = buf_desc->bottom_y - buf_desc->top_y; + if (height < G2D_LEN_MIN || height > G2D_LEN_MAX) { + DRM_ERROR("height[%u] is out of range!\n", height); + return false; + } + + area = (unsigned long)width * (unsigned long)height * + g2d_get_buf_bpp(buf_desc->format); + if (area > size) { + DRM_ERROR("area[%lu] is out of range[%lu]!\n", area, size); + return false; + } + + return true; +} + static int g2d_map_cmdlist_gem(struct g2d_data *g2d, struct g2d_cmdlist_node *node, struct drm_device *drm_dev, struct drm_file *file) { struct g2d_cmdlist *cmdlist = node->cmdlist; + struct g2d_buf_info *buf_info = &node->buf_info; int offset; + int ret; int i; - for (i = 0; i < node->map_nr; i++) { + for (i = 0; i < buf_info->map_nr; i++) { + struct g2d_buf_desc *buf_desc; + enum g2d_reg_type reg_type; + int reg_pos; unsigned long handle; dma_addr_t *addr; - offset = cmdlist->last - (i * 2 + 1); - handle = cmdlist->data[offset]; + reg_pos = cmdlist->last - 2 * (i + 1); + + offset = cmdlist->data[reg_pos]; + handle = cmdlist->data[reg_pos + 1]; + + reg_type = g2d_get_reg_type(offset); + if (reg_type == REG_TYPE_NONE) { + ret = -EFAULT; + goto err; + } + + buf_desc = &buf_info->descs[reg_type]; + + if (buf_info->types[reg_type] == BUF_TYPE_GEM) { + unsigned long size; + + size = exynos_drm_gem_get_size(drm_dev, handle, file); + if (!size) { + ret = -EFAULT; + goto err; + } + + if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type, + size)) { + ret = -EFAULT; + goto err; + } - if (node->obj_type[i] == BUF_TYPE_GEM) { addr = exynos_drm_gem_get_dma_addr(drm_dev, handle, file); if (IS_ERR(addr)) { - node->map_nr = i; - return -EFAULT; + ret = -EFAULT; + goto err; } } else { struct drm_exynos_g2d_userptr g2d_userptr; if (copy_from_user(&g2d_userptr, (void __user *)handle, sizeof(struct drm_exynos_g2d_userptr))) { - node->map_nr = i; - return -EFAULT; + ret = -EFAULT; + goto err; + } + + if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type, + g2d_userptr.size)) { + ret = -EFAULT; + goto err; } addr = g2d_userptr_get_dma_addr(drm_dev, @@ -544,16 +753,21 @@ static int g2d_map_cmdlist_gem(struct g2d_data *g2d, file, &handle); if (IS_ERR(addr)) { - node->map_nr = i; - return -EFAULT; + ret = -EFAULT; + goto err; } } - cmdlist->data[offset] = *addr; - node->handles[i] = handle; + cmdlist->data[reg_pos + 1] = *addr; + buf_info->reg_types[i] = reg_type; + buf_info->handles[reg_type] = handle; } return 0; + +err: + buf_info->map_nr = i; + return ret; } static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d, @@ -561,22 +775,33 @@ static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d, struct drm_file *filp) { struct exynos_drm_subdrv *subdrv = &g2d->subdrv; + struct g2d_buf_info *buf_info = &node->buf_info; int i; - for (i = 0; i < node->map_nr; i++) { - unsigned long handle = node->handles[i]; + for (i = 0; i < buf_info->map_nr; i++) { + struct g2d_buf_desc *buf_desc; + enum g2d_reg_type reg_type; + unsigned long handle; + + reg_type = buf_info->reg_types[i]; + + buf_desc = &buf_info->descs[reg_type]; + handle = buf_info->handles[reg_type]; - if (node->obj_type[i] == BUF_TYPE_GEM) + if (buf_info->types[reg_type] == BUF_TYPE_GEM) exynos_drm_gem_put_dma_addr(subdrv->drm_dev, handle, filp); else g2d_userptr_put_dma_addr(subdrv->drm_dev, handle, false); - node->handles[i] = 0; + buf_info->reg_types[i] = REG_TYPE_NONE; + buf_info->handles[reg_type] = 0; + buf_info->types[reg_type] = 0; + memset(buf_desc, 0x00, sizeof(*buf_desc)); } - node->map_nr = 0; + buf_info->map_nr = 0; } static void g2d_dma_start(struct g2d_data *g2d, @@ -589,10 +814,6 @@ static void g2d_dma_start(struct g2d_data *g2d, pm_runtime_get_sync(g2d->dev); clk_enable(g2d->gate_clk); - /* interrupt enable */ - writel_relaxed(G2D_INTEN_ACF | G2D_INTEN_UCF | G2D_INTEN_GCF, - g2d->regs + G2D_INTEN); - writel_relaxed(node->dma_addr, g2d->regs + G2D_DMA_SFR_BASE_ADDR); writel_relaxed(G2D_DMA_START, g2d->regs + G2D_DMA_COMMAND); } @@ -643,7 +864,6 @@ static void g2d_runqueue_worker(struct work_struct *work) struct g2d_data *g2d = container_of(work, struct g2d_data, runqueue_work); - mutex_lock(&g2d->runqueue_mutex); clk_disable(g2d->gate_clk); pm_runtime_put_sync(g2d->dev); @@ -724,20 +944,14 @@ static int g2d_check_reg_offset(struct device *dev, int i; for (i = 0; i < nr; i++) { - index = cmdlist->last - 2 * (i + 1); + struct g2d_buf_info *buf_info = &node->buf_info; + struct g2d_buf_desc *buf_desc; + enum g2d_reg_type reg_type; + unsigned long value; - if (for_addr) { - /* check userptr buffer type. */ - reg_offset = (cmdlist->data[index] & - ~0x7fffffff) >> 31; - if (reg_offset) { - node->obj_type[i] = BUF_TYPE_USERPTR; - cmdlist->data[index] &= ~G2D_BUF_USERPTR; - } - } + index = cmdlist->last - 2 * (i + 1); reg_offset = cmdlist->data[index] & ~0xfffff000; - if (reg_offset < G2D_VALID_START || reg_offset > G2D_VALID_END) goto err; if (reg_offset % 4) @@ -753,8 +967,60 @@ static int g2d_check_reg_offset(struct device *dev, if (!for_addr) goto err; - if (node->obj_type[i] != BUF_TYPE_USERPTR) - node->obj_type[i] = BUF_TYPE_GEM; + reg_type = g2d_get_reg_type(reg_offset); + if (reg_type == REG_TYPE_NONE) + goto err; + + /* check userptr buffer type. */ + if ((cmdlist->data[index] & ~0x7fffffff) >> 31) { + buf_info->types[reg_type] = BUF_TYPE_USERPTR; + cmdlist->data[index] &= ~G2D_BUF_USERPTR; + } else + buf_info->types[reg_type] = BUF_TYPE_GEM; + break; + case G2D_SRC_COLOR_MODE: + case G2D_DST_COLOR_MODE: + if (for_addr) + goto err; + + reg_type = g2d_get_reg_type(reg_offset); + if (reg_type == REG_TYPE_NONE) + goto err; + + buf_desc = &buf_info->descs[reg_type]; + value = cmdlist->data[index + 1]; + + buf_desc->format = value & 0xf; + break; + case G2D_SRC_LEFT_TOP: + case G2D_DST_LEFT_TOP: + if (for_addr) + goto err; + + reg_type = g2d_get_reg_type(reg_offset); + if (reg_type == REG_TYPE_NONE) + goto err; + + buf_desc = &buf_info->descs[reg_type]; + value = cmdlist->data[index + 1]; + + buf_desc->left_x = value & 0x1fff; + buf_desc->top_y = (value & 0x1fff0000) >> 16; + break; + case G2D_SRC_RIGHT_BOTTOM: + case G2D_DST_RIGHT_BOTTOM: + if (for_addr) + goto err; + + reg_type = g2d_get_reg_type(reg_offset); + if (reg_type == REG_TYPE_NONE) + goto err; + + buf_desc = &buf_info->descs[reg_type]; + value = cmdlist->data[index + 1]; + + buf_desc->right_x = value & 0x1fff; + buf_desc->bottom_y = (value & 0x1fff0000) >> 16; break; default: if (for_addr) @@ -860,9 +1126,23 @@ int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data, cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR; cmdlist->data[cmdlist->last++] = 0; + /* + * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG + * and GCF bit should be set to INTEN register if user wants + * G2D interrupt event once current command list execution is + * finished. + * Otherwise only ACF bit should be set to INTEN register so + * that one interrupt is occured after all command lists + * have been completed. + */ if (node->event) { + cmdlist->data[cmdlist->last++] = G2D_INTEN; + cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF | G2D_INTEN_GCF; cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD; cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD; + } else { + cmdlist->data[cmdlist->last++] = G2D_INTEN; + cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF; } /* Check size of cmdlist: last 2 is about G2D_BITBLT_START */ @@ -887,7 +1167,7 @@ int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data, if (ret < 0) goto err_free_event; - node->map_nr = req->cmd_buf_nr; + node->buf_info.map_nr = req->cmd_buf_nr; if (req->cmd_buf_nr) { struct drm_exynos_g2d_cmd *cmd_buf; diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.c b/drivers/gpu/drm/exynos/exynos_drm_gem.c index 67e17ce112b6..0e6fe000578c 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_gem.c +++ b/drivers/gpu/drm/exynos/exynos_drm_gem.c @@ -164,6 +164,27 @@ out: exynos_gem_obj = NULL; } +unsigned long exynos_drm_gem_get_size(struct drm_device *dev, + unsigned int gem_handle, + struct drm_file *file_priv) +{ + struct exynos_drm_gem_obj *exynos_gem_obj; + struct drm_gem_object *obj; + + obj = drm_gem_object_lookup(dev, file_priv, gem_handle); + if (!obj) { + DRM_ERROR("failed to lookup gem object.\n"); + return 0; + } + + exynos_gem_obj = to_exynos_gem_obj(obj); + + drm_gem_object_unreference_unlocked(obj); + + return exynos_gem_obj->buffer->size; +} + + struct exynos_drm_gem_obj *exynos_drm_gem_init(struct drm_device *dev, unsigned long size) { diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.h b/drivers/gpu/drm/exynos/exynos_drm_gem.h index 35ebac47dc2b..468766bee450 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_gem.h +++ b/drivers/gpu/drm/exynos/exynos_drm_gem.h @@ -130,6 +130,11 @@ int exynos_drm_gem_userptr_ioctl(struct drm_device *dev, void *data, int exynos_drm_gem_get_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); +/* get buffer size to gem handle. */ +unsigned long exynos_drm_gem_get_size(struct drm_device *dev, + unsigned int gem_handle, + struct drm_file *file_priv); + /* initialize gem object. */ int exynos_drm_gem_init_object(struct drm_gem_object *obj); diff --git a/drivers/gpu/drm/exynos/exynos_drm_vidi.c b/drivers/gpu/drm/exynos/exynos_drm_vidi.c index 13ccbd4bcfaa..9504b0cd825a 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_vidi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_vidi.c @@ -117,13 +117,12 @@ static struct edid *vidi_get_edid(struct device *dev, } edid_len = (1 + ctx->raw_edid->extensions) * EDID_LENGTH; - edid = kzalloc(edid_len, GFP_KERNEL); + edid = kmemdup(ctx->raw_edid, edid_len, GFP_KERNEL); if (!edid) { DRM_DEBUG_KMS("failed to allocate edid\n"); return ERR_PTR(-ENOMEM); } - memcpy(edid, ctx->raw_edid, edid_len); return edid; } @@ -563,12 +562,11 @@ int vidi_connection_ioctl(struct drm_device *drm_dev, void *data, return -EINVAL; } edid_len = (1 + raw_edid->extensions) * EDID_LENGTH; - ctx->raw_edid = kzalloc(edid_len, GFP_KERNEL); + ctx->raw_edid = kmemdup(raw_edid, edid_len, GFP_KERNEL); if (!ctx->raw_edid) { DRM_DEBUG_KMS("failed to allocate raw_edid.\n"); return -ENOMEM; } - memcpy(ctx->raw_edid, raw_edid, edid_len); } else { /* * with connection = 0, free raw_edid diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index e919aba29b3d..2f4f72f07047 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -818,7 +818,7 @@ static void mixer_win_disable(void *ctx, int win) mixer_ctx->win_data[win].enabled = false; } -int mixer_check_timing(void *ctx, struct fb_videomode *timing) +static int mixer_check_timing(void *ctx, struct fb_videomode *timing) { struct mixer_context *mixer_ctx = ctx; u32 w, h; diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index aae31489c893..7299ea45dd03 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -103,7 +103,7 @@ static const char *cache_level_str(int type) static void describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj) { - seq_printf(m, "%p: %s%s %8zdKiB %02x %02x %d %d %d%s%s%s", + seq_printf(m, "%pK: %s%s %8zdKiB %02x %02x %d %d %d%s%s%s", &obj->base, get_pin_flag(obj), get_tiling_flag(obj), diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 0a8eceb75902..e9b57893db2b 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -125,6 +125,11 @@ MODULE_PARM_DESC(preliminary_hw_support, "Enable Haswell and ValleyView Support. " "(default: false)"); +int i915_disable_power_well __read_mostly = 0; +module_param_named(disable_power_well, i915_disable_power_well, int, 0600); +MODULE_PARM_DESC(disable_power_well, + "Disable the power well when possible (default: false)"); + static struct drm_driver driver; extern int intel_agp_enabled; diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index e95337c97459..01769e2a9953 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1398,6 +1398,7 @@ extern int i915_enable_fbc __read_mostly; extern bool i915_enable_hangcheck __read_mostly; extern int i915_enable_ppgtt __read_mostly; extern unsigned int i915_preliminary_hw_support __read_mostly; +extern int i915_disable_power_well __read_mostly; extern int i915_suspend(struct drm_device *dev, pm_message_t state); extern int i915_resume(struct drm_device *dev); diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index 2f2daebd0eef..3b11ab0fbc96 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -732,6 +732,8 @@ validate_exec_list(struct drm_i915_gem_exec_object2 *exec, int count) { int i; + int relocs_total = 0; + int relocs_max = INT_MAX / sizeof(struct drm_i915_gem_relocation_entry); for (i = 0; i < count; i++) { char __user *ptr = (char __user *)(uintptr_t)exec[i].relocs_ptr; @@ -740,10 +742,13 @@ validate_exec_list(struct drm_i915_gem_exec_object2 *exec, if (exec[i].flags & __EXEC_OBJECT_UNKNOWN_FLAGS) return -EINVAL; - /* First check for malicious input causing overflow */ - if (exec[i].relocation_count > - INT_MAX / sizeof(struct drm_i915_gem_relocation_entry)) + /* First check for malicious input causing overflow in + * the worst case where we need to allocate the entire + * relocation tree as a single array. + */ + if (exec[i].relocation_count > relocs_max - relocs_total) return -EINVAL; + relocs_total += exec[i].relocation_count; length = exec[i].relocation_count * sizeof(struct drm_i915_gem_relocation_entry); diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 287b42c9d1a8..b20d50192fcc 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5771,6 +5771,11 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc, num_connectors++; } + if (is_cpu_edp) + intel_crtc->cpu_transcoder = TRANSCODER_EDP; + else + intel_crtc->cpu_transcoder = pipe; + /* We are not sure yet this won't happen. */ WARN(!HAS_PCH_LPT(dev), "Unexpected PCH type %d\n", INTEL_PCH_TYPE(dev)); @@ -5837,11 +5842,6 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, int pipe = intel_crtc->pipe; int ret; - if (IS_HASWELL(dev) && intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP)) - intel_crtc->cpu_transcoder = TRANSCODER_EDP; - else - intel_crtc->cpu_transcoder = pipe; - drm_vblank_pre_modeset(dev, pipe); ret = dev_priv->display.crtc_mode_set(crtc, mode, adjusted_mode, diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 6f728e5ee793..d7d4afe01341 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -820,6 +820,7 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, struct intel_link_m_n m_n; int pipe = intel_crtc->pipe; enum transcoder cpu_transcoder = intel_crtc->cpu_transcoder; + int target_clock; /* * Find the lane count in the intel_encoder private @@ -835,13 +836,22 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, } } + target_clock = mode->clock; + for_each_encoder_on_crtc(dev, crtc, intel_encoder) { + if (intel_encoder->type == INTEL_OUTPUT_EDP) { + target_clock = intel_edp_target_clock(intel_encoder, + mode); + break; + } + } + /* * Compute the GMCH and Link ratios. The '3' here is * the number of bytes_per_pixel post-LUT, which we always * set up for 8-bits of R/G/B, or 3 bytes total. */ intel_link_compute_m_n(intel_crtc->bpp, lane_count, - mode->clock, adjusted_mode->clock, &m_n); + target_clock, adjusted_mode->clock, &m_n); if (IS_HASWELL(dev)) { I915_WRITE(PIPE_DATA_M1(cpu_transcoder), @@ -1930,7 +1940,7 @@ intel_dp_start_link_train(struct intel_dp *intel_dp) for (i = 0; i < intel_dp->lane_count; i++) if ((intel_dp->train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0) break; - if (i == intel_dp->lane_count && voltage_tries == 5) { + if (i == intel_dp->lane_count) { ++loop_tries; if (loop_tries == 5) { DRM_DEBUG_KMS("too many full retries, give up\n"); diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c index acf8aec9ada7..ef4744e1bf0b 100644 --- a/drivers/gpu/drm/i915/intel_i2c.c +++ b/drivers/gpu/drm/i915/intel_i2c.c @@ -203,7 +203,13 @@ intel_gpio_setup(struct intel_gmbus *bus, u32 pin) algo->data = bus; } -#define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 4) +/* + * gmbus on gen4 seems to be able to generate legacy interrupts even when in MSI + * mode. This results in spurious interrupt warnings if the legacy irq no. is + * shared with another device. The kernel then disables that interrupt source + * and so prevents the other device from working properly. + */ +#define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 5) static int gmbus_wait_hw_status(struct drm_i915_private *dev_priv, u32 gmbus2_status, @@ -214,6 +220,9 @@ gmbus_wait_hw_status(struct drm_i915_private *dev_priv, u32 gmbus2 = 0; DEFINE_WAIT(wait); + if (!HAS_GMBUS_IRQ(dev_priv->dev)) + gmbus4_irq_en = 0; + /* Important: The hw handles only the first bit, so set only one! Since * we also need to check for NAKs besides the hw ready/idle signal, we * need to wake up periodically and check that ourselves. */ diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index a3730e0289e5..bee8cb6108a7 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c @@ -321,9 +321,6 @@ void intel_panel_enable_backlight(struct drm_device *dev, if (dev_priv->backlight_level == 0) dev_priv->backlight_level = intel_panel_get_max_backlight(dev); - dev_priv->backlight_enabled = true; - intel_panel_actually_set_backlight(dev, dev_priv->backlight_level); - if (INTEL_INFO(dev)->gen >= 4) { uint32_t reg, tmp; @@ -359,12 +356,12 @@ void intel_panel_enable_backlight(struct drm_device *dev, } set_level: - /* Check the current backlight level and try to set again if it's zero. - * On some machines, BLC_PWM_CPU_CTL is cleared to zero automatically - * when BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1 are written. + /* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1. + * BLC_PWM_CPU_CTL may be cleared to zero automatically when these + * registers are set. */ - if (!intel_panel_get_backlight(dev)) - intel_panel_actually_set_backlight(dev, dev_priv->backlight_level); + dev_priv->backlight_enabled = true; + intel_panel_actually_set_backlight(dev, dev_priv->backlight_level); } static void intel_panel_init_backlight(struct drm_device *dev) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index a1794c6df1bf..adca00783e61 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4079,6 +4079,9 @@ void intel_set_power_well(struct drm_device *dev, bool enable) if (!IS_HASWELL(dev)) return; + if (!i915_disable_power_well && !enable) + return; + tmp = I915_READ(HSW_PWR_WELL_DRIVER); is_enabled = tmp & HSW_PWR_WELL_STATE; enable_requested = tmp & HSW_PWR_WELL_ENABLE; diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c index a274b9906ef8..fe22bb780e1d 100644 --- a/drivers/gpu/drm/mgag200/mgag200_mode.c +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c @@ -382,19 +382,19 @@ static int mga_g200eh_set_plls(struct mga_device *mdev, long clock) m = n = p = 0; vcomax = 800000; vcomin = 400000; - pllreffreq = 3333; + pllreffreq = 33333; delta = 0xffffffff; permitteddelta = clock * 5 / 1000; - for (testp = 16; testp > 0; testp--) { + for (testp = 16; testp > 0; testp >>= 1) { if (clock * testp > vcomax) continue; if (clock * testp < vcomin) continue; for (testm = 1; testm < 33; testm++) { - for (testn = 1; testn < 257; testn++) { + for (testn = 17; testn < 257; testn++) { computed = (pllreffreq * testn) / (testm * testp); if (computed > clock) @@ -404,11 +404,11 @@ static int mga_g200eh_set_plls(struct mga_device *mdev, long clock) if (tmpdelta < delta) { delta = tmpdelta; n = testn - 1; - m = (testm - 1) | ((n >> 1) & 0x80); + m = (testm - 1); p = testp - 1; } if ((clock * testp) >= 600000) - p |= 80; + p |= 0x80; } } } diff --git a/drivers/gpu/drm/nouveau/core/core/object.c b/drivers/gpu/drm/nouveau/core/core/object.c index 0daab62ea14c..3b2e7b6304d3 100644 --- a/drivers/gpu/drm/nouveau/core/core/object.c +++ b/drivers/gpu/drm/nouveau/core/core/object.c @@ -278,7 +278,6 @@ nouveau_object_del(struct nouveau_object *client, u32 _parent, u32 _handle) struct nouveau_object *parent = NULL; struct nouveau_object *namedb = NULL; struct nouveau_handle *handle = NULL; - int ret = -EINVAL; parent = nouveau_handle_ref(client, _parent); if (!parent) @@ -295,7 +294,7 @@ nouveau_object_del(struct nouveau_object *client, u32 _parent, u32 _handle) } nouveau_object_ref(NULL, &parent); - return ret; + return handle ? 0 : -EINVAL; } int diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c index 5fa13267bd9f..02e369f80449 100644 --- a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c +++ b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c @@ -544,13 +544,13 @@ nv50_disp_curs_ofuncs = { static void nv50_disp_base_vblank_enable(struct nouveau_event *event, int head) { - nv_mask(event->priv, 0x61002c, (1 << head), (1 << head)); + nv_mask(event->priv, 0x61002c, (4 << head), (4 << head)); } static void nv50_disp_base_vblank_disable(struct nouveau_event *event, int head) { - nv_mask(event->priv, 0x61002c, (1 << head), (0 << head)); + nv_mask(event->priv, 0x61002c, (4 << head), 0); } static int diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/therm.h b/drivers/gpu/drm/nouveau/core/include/subdev/therm.h index 6b17b614629f..0b20fc0d19c1 100644 --- a/drivers/gpu/drm/nouveau/core/include/subdev/therm.h +++ b/drivers/gpu/drm/nouveau/core/include/subdev/therm.h @@ -4,7 +4,7 @@ #include <core/device.h> #include <core/subdev.h> -enum nouveau_therm_mode { +enum nouveau_therm_fan_mode { NOUVEAU_THERM_CTRL_NONE = 0, NOUVEAU_THERM_CTRL_MANUAL = 1, NOUVEAU_THERM_CTRL_AUTO = 2, diff --git a/drivers/gpu/drm/nouveau/core/subdev/therm/base.c b/drivers/gpu/drm/nouveau/core/subdev/therm/base.c index f794dc89a3b2..a00a5a76e2d6 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/therm/base.c +++ b/drivers/gpu/drm/nouveau/core/subdev/therm/base.c @@ -134,7 +134,7 @@ nouveau_therm_alarm(struct nouveau_alarm *alarm) } int -nouveau_therm_mode(struct nouveau_therm *therm, int mode) +nouveau_therm_fan_mode(struct nouveau_therm *therm, int mode) { struct nouveau_therm_priv *priv = (void *)therm; struct nouveau_device *device = nv_device(therm); @@ -149,10 +149,15 @@ nouveau_therm_mode(struct nouveau_therm *therm, int mode) (mode != NOUVEAU_THERM_CTRL_NONE && device->card_type >= NV_C0)) return -EINVAL; + /* do not allow automatic fan management if the thermal sensor is + * not available */ + if (priv->mode == 2 && therm->temp_get(therm) < 0) + return -EINVAL; + if (priv->mode == mode) return 0; - nv_info(therm, "Thermal management: %s\n", name[mode]); + nv_info(therm, "fan management: %s\n", name[mode]); nouveau_therm_update(therm, mode); return 0; } @@ -213,7 +218,7 @@ nouveau_therm_attr_set(struct nouveau_therm *therm, priv->fan->bios.max_duty = value; return 0; case NOUVEAU_THERM_ATTR_FAN_MODE: - return nouveau_therm_mode(therm, value); + return nouveau_therm_fan_mode(therm, value); case NOUVEAU_THERM_ATTR_THRS_FAN_BOOST: priv->bios_sensor.thrs_fan_boost.temp = value; priv->sensor.program_alarms(therm); @@ -263,7 +268,7 @@ _nouveau_therm_init(struct nouveau_object *object) return ret; if (priv->suspend >= 0) - nouveau_therm_mode(therm, priv->mode); + nouveau_therm_fan_mode(therm, priv->mode); priv->sensor.program_alarms(therm); return 0; } @@ -313,11 +318,12 @@ nouveau_therm_create_(struct nouveau_object *parent, int nouveau_therm_preinit(struct nouveau_therm *therm) { - nouveau_therm_ic_ctor(therm); nouveau_therm_sensor_ctor(therm); + nouveau_therm_ic_ctor(therm); nouveau_therm_fan_ctor(therm); - nouveau_therm_mode(therm, NOUVEAU_THERM_CTRL_NONE); + nouveau_therm_fan_mode(therm, NOUVEAU_THERM_CTRL_NONE); + nouveau_therm_sensor_preinit(therm); return 0; } diff --git a/drivers/gpu/drm/nouveau/core/subdev/therm/ic.c b/drivers/gpu/drm/nouveau/core/subdev/therm/ic.c index e24090bac195..8b3adec5fbb1 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/therm/ic.c +++ b/drivers/gpu/drm/nouveau/core/subdev/therm/ic.c @@ -32,6 +32,7 @@ probe_monitoring_device(struct nouveau_i2c_port *i2c, struct i2c_board_info *info) { struct nouveau_therm_priv *priv = (void *)nouveau_therm(i2c); + struct nvbios_therm_sensor *sensor = &priv->bios_sensor; struct i2c_client *client; request_module("%s%s", I2C_MODULE_PREFIX, info->type); @@ -46,8 +47,9 @@ probe_monitoring_device(struct nouveau_i2c_port *i2c, } nv_info(priv, - "Found an %s at address 0x%x (controlled by lm_sensors)\n", - info->type, info->addr); + "Found an %s at address 0x%x (controlled by lm_sensors, " + "temp offset %+i C)\n", + info->type, info->addr, sensor->offset_constant); priv->ic = client; return true; diff --git a/drivers/gpu/drm/nouveau/core/subdev/therm/nv40.c b/drivers/gpu/drm/nouveau/core/subdev/therm/nv40.c index 0f5363edb964..a70d1b7e397b 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/therm/nv40.c +++ b/drivers/gpu/drm/nouveau/core/subdev/therm/nv40.c @@ -29,54 +29,83 @@ struct nv40_therm_priv { struct nouveau_therm_priv base; }; +enum nv40_sensor_style { INVALID_STYLE = -1, OLD_STYLE = 0, NEW_STYLE = 1 }; + +static enum nv40_sensor_style +nv40_sensor_style(struct nouveau_therm *therm) +{ + struct nouveau_device *device = nv_device(therm); + + switch (device->chipset) { + case 0x43: + case 0x44: + case 0x4a: + case 0x47: + return OLD_STYLE; + + case 0x46: + case 0x49: + case 0x4b: + case 0x4e: + case 0x4c: + case 0x67: + case 0x68: + case 0x63: + return NEW_STYLE; + default: + return INVALID_STYLE; + } +} + static int nv40_sensor_setup(struct nouveau_therm *therm) { - struct nouveau_device *device = nv_device(therm); + enum nv40_sensor_style style = nv40_sensor_style(therm); /* enable ADC readout and disable the ALARM threshold */ - if (device->chipset >= 0x46) { + if (style == NEW_STYLE) { nv_mask(therm, 0x15b8, 0x80000000, 0); nv_wr32(therm, 0x15b0, 0x80003fff); - mdelay(10); /* wait for the temperature to stabilize */ + mdelay(20); /* wait for the temperature to stabilize */ return nv_rd32(therm, 0x15b4) & 0x3fff; - } else { + } else if (style == OLD_STYLE) { nv_wr32(therm, 0x15b0, 0xff); + mdelay(20); /* wait for the temperature to stabilize */ return nv_rd32(therm, 0x15b4) & 0xff; - } + } else + return -ENODEV; } static int nv40_temp_get(struct nouveau_therm *therm) { struct nouveau_therm_priv *priv = (void *)therm; - struct nouveau_device *device = nv_device(therm); struct nvbios_therm_sensor *sensor = &priv->bios_sensor; + enum nv40_sensor_style style = nv40_sensor_style(therm); int core_temp; - if (device->chipset >= 0x46) { + if (style == NEW_STYLE) { nv_wr32(therm, 0x15b0, 0x80003fff); core_temp = nv_rd32(therm, 0x15b4) & 0x3fff; - } else { + } else if (style == OLD_STYLE) { nv_wr32(therm, 0x15b0, 0xff); core_temp = nv_rd32(therm, 0x15b4) & 0xff; - } - - /* Setup the sensor if the temperature is 0 */ - if (core_temp == 0) - core_temp = nv40_sensor_setup(therm); + } else + return -ENODEV; - if (sensor->slope_div == 0) - sensor->slope_div = 1; - if (sensor->offset_den == 0) - sensor->offset_den = 1; - if (sensor->slope_mult < 1) - sensor->slope_mult = 1; + /* if the slope or the offset is unset, do no use the sensor */ + if (!sensor->slope_div || !sensor->slope_mult || + !sensor->offset_num || !sensor->offset_den) + return -ENODEV; core_temp = core_temp * sensor->slope_mult / sensor->slope_div; core_temp = core_temp + sensor->offset_num / sensor->offset_den; core_temp = core_temp + sensor->offset_constant - 8; + /* reserve negative temperatures for errors */ + if (core_temp < 0) + core_temp = 0; + return core_temp; } diff --git a/drivers/gpu/drm/nouveau/core/subdev/therm/priv.h b/drivers/gpu/drm/nouveau/core/subdev/therm/priv.h index 06b98706b3fc..438d9824b774 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/therm/priv.h +++ b/drivers/gpu/drm/nouveau/core/subdev/therm/priv.h @@ -102,7 +102,7 @@ struct nouveau_therm_priv { struct i2c_client *ic; }; -int nouveau_therm_mode(struct nouveau_therm *therm, int mode); +int nouveau_therm_fan_mode(struct nouveau_therm *therm, int mode); int nouveau_therm_attr_get(struct nouveau_therm *therm, enum nouveau_therm_attr_type type); int nouveau_therm_attr_set(struct nouveau_therm *therm, @@ -122,6 +122,7 @@ int nouveau_therm_fan_sense(struct nouveau_therm *therm); int nouveau_therm_preinit(struct nouveau_therm *); +void nouveau_therm_sensor_preinit(struct nouveau_therm *); void nouveau_therm_sensor_set_threshold_state(struct nouveau_therm *therm, enum nouveau_therm_thrs thrs, enum nouveau_therm_thrs_state st); diff --git a/drivers/gpu/drm/nouveau/core/subdev/therm/temp.c b/drivers/gpu/drm/nouveau/core/subdev/therm/temp.c index b37624af8297..470f6a47b656 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/therm/temp.c +++ b/drivers/gpu/drm/nouveau/core/subdev/therm/temp.c @@ -34,10 +34,6 @@ nouveau_therm_temp_set_defaults(struct nouveau_therm *therm) { struct nouveau_therm_priv *priv = (void *)therm; - priv->bios_sensor.slope_mult = 1; - priv->bios_sensor.slope_div = 1; - priv->bios_sensor.offset_num = 0; - priv->bios_sensor.offset_den = 1; priv->bios_sensor.offset_constant = 0; priv->bios_sensor.thrs_fan_boost.temp = 90; @@ -60,11 +56,6 @@ nouveau_therm_temp_safety_checks(struct nouveau_therm *therm) struct nouveau_therm_priv *priv = (void *)therm; struct nvbios_therm_sensor *s = &priv->bios_sensor; - if (!priv->bios_sensor.slope_div) - priv->bios_sensor.slope_div = 1; - if (!priv->bios_sensor.offset_den) - priv->bios_sensor.offset_den = 1; - /* enforce a minimum hysteresis on thresholds */ s->thrs_fan_boost.hysteresis = max_t(u8, s->thrs_fan_boost.hysteresis, 2); s->thrs_down_clock.hysteresis = max_t(u8, s->thrs_down_clock.hysteresis, 2); @@ -106,16 +97,16 @@ void nouveau_therm_sensor_event(struct nouveau_therm *therm, const char *thresolds[] = { "fanboost", "downclock", "critical", "shutdown" }; - uint8_t temperature = therm->temp_get(therm); + int temperature = therm->temp_get(therm); if (thrs < 0 || thrs > 3) return; if (dir == NOUVEAU_THERM_THRS_FALLING) - nv_info(therm, "temperature (%u C) went below the '%s' threshold\n", + nv_info(therm, "temperature (%i C) went below the '%s' threshold\n", temperature, thresolds[thrs]); else - nv_info(therm, "temperature (%u C) hit the '%s' threshold\n", + nv_info(therm, "temperature (%i C) hit the '%s' threshold\n", temperature, thresolds[thrs]); active = (dir == NOUVEAU_THERM_THRS_RISING); @@ -123,7 +114,7 @@ void nouveau_therm_sensor_event(struct nouveau_therm *therm, case NOUVEAU_THERM_THRS_FANBOOST: if (active) { nouveau_therm_fan_set(therm, true, 100); - nouveau_therm_mode(therm, NOUVEAU_THERM_CTRL_AUTO); + nouveau_therm_fan_mode(therm, NOUVEAU_THERM_CTRL_AUTO); } break; case NOUVEAU_THERM_THRS_DOWNCLOCK: @@ -202,7 +193,7 @@ alarm_timer_callback(struct nouveau_alarm *alarm) NOUVEAU_THERM_THRS_SHUTDOWN); /* schedule the next poll in one second */ - if (list_empty(&alarm->head)) + if (therm->temp_get(therm) >= 0 && list_empty(&alarm->head)) ptimer->alarm(ptimer, 1000 * 1000 * 1000, alarm); spin_unlock_irqrestore(&priv->sensor.alarm_program_lock, flags); @@ -225,6 +216,17 @@ nouveau_therm_program_alarms_polling(struct nouveau_therm *therm) alarm_timer_callback(&priv->sensor.therm_poll_alarm); } +void +nouveau_therm_sensor_preinit(struct nouveau_therm *therm) +{ + const char *sensor_avail = "yes"; + + if (therm->temp_get(therm) < 0) + sensor_avail = "no"; + + nv_info(therm, "internal sensor: %s\n", sensor_avail); +} + int nouveau_therm_sensor_ctor(struct nouveau_therm *therm) { diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.c b/drivers/gpu/drm/nouveau/nouveau_abi16.c index 41241922263f..3b6dc883e150 100644 --- a/drivers/gpu/drm/nouveau/nouveau_abi16.c +++ b/drivers/gpu/drm/nouveau/nouveau_abi16.c @@ -116,6 +116,11 @@ nouveau_abi16_chan_fini(struct nouveau_abi16 *abi16, { struct nouveau_abi16_ntfy *ntfy, *temp; + /* wait for all activity to stop before releasing notify object, which + * may be still in use */ + if (chan->chan && chan->ntfy) + nouveau_channel_idle(chan->chan); + /* cleanup notifier state */ list_for_each_entry_safe(ntfy, temp, &chan->notifiers, head) { nouveau_abi16_ntfy_fini(chan, ntfy); diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index 11ca82148edc..7ff10711a4d0 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -801,7 +801,7 @@ nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, stride = 16 * 4; height = amount / stride; - if (new_mem->mem_type == TTM_PL_VRAM && + if (old_mem->mem_type == TTM_PL_VRAM && nouveau_bo_tile_layout(nvbo)) { ret = RING_SPACE(chan, 8); if (ret) @@ -823,7 +823,7 @@ nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, BEGIN_NV04(chan, NvSubCopy, 0x0200, 1); OUT_RING (chan, 1); } - if (old_mem->mem_type == TTM_PL_VRAM && + if (new_mem->mem_type == TTM_PL_VRAM && nouveau_bo_tile_layout(nvbo)) { ret = RING_SPACE(chan, 8); if (ret) diff --git a/drivers/gpu/drm/nouveau/nouveau_pm.c b/drivers/gpu/drm/nouveau/nouveau_pm.c index bb54098c6d97..936b442a6ab7 100644 --- a/drivers/gpu/drm/nouveau/nouveau_pm.c +++ b/drivers/gpu/drm/nouveau/nouveau_pm.c @@ -402,8 +402,12 @@ nouveau_hwmon_show_temp(struct device *d, struct device_attribute *a, char *buf) struct drm_device *dev = dev_get_drvdata(d); struct nouveau_drm *drm = nouveau_drm(dev); struct nouveau_therm *therm = nouveau_therm(drm->device); + int temp = therm->temp_get(therm); - return snprintf(buf, PAGE_SIZE, "%d\n", therm->temp_get(therm) * 1000); + if (temp < 0) + return temp; + + return snprintf(buf, PAGE_SIZE, "%d\n", temp * 1000); } static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, nouveau_hwmon_show_temp, NULL, 0); @@ -871,7 +875,12 @@ static SENSOR_DEVICE_ATTR(pwm1_max, S_IRUGO | S_IWUSR, nouveau_hwmon_get_pwm1_max, nouveau_hwmon_set_pwm1_max, 0); -static struct attribute *hwmon_attributes[] = { +static struct attribute *hwmon_default_attributes[] = { + &sensor_dev_attr_name.dev_attr.attr, + &sensor_dev_attr_update_rate.dev_attr.attr, + NULL +}; +static struct attribute *hwmon_temp_attributes[] = { &sensor_dev_attr_temp1_input.dev_attr.attr, &sensor_dev_attr_temp1_auto_point1_pwm.dev_attr.attr, &sensor_dev_attr_temp1_auto_point1_temp.dev_attr.attr, @@ -882,8 +891,6 @@ static struct attribute *hwmon_attributes[] = { &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr, &sensor_dev_attr_temp1_emergency.dev_attr.attr, &sensor_dev_attr_temp1_emergency_hyst.dev_attr.attr, - &sensor_dev_attr_name.dev_attr.attr, - &sensor_dev_attr_update_rate.dev_attr.attr, NULL }; static struct attribute *hwmon_fan_rpm_attributes[] = { @@ -898,8 +905,11 @@ static struct attribute *hwmon_pwm_fan_attributes[] = { NULL }; -static const struct attribute_group hwmon_attrgroup = { - .attrs = hwmon_attributes, +static const struct attribute_group hwmon_default_attrgroup = { + .attrs = hwmon_default_attributes, +}; +static const struct attribute_group hwmon_temp_attrgroup = { + .attrs = hwmon_temp_attributes, }; static const struct attribute_group hwmon_fan_rpm_attrgroup = { .attrs = hwmon_fan_rpm_attributes, @@ -931,13 +941,22 @@ nouveau_hwmon_init(struct drm_device *dev) } dev_set_drvdata(hwmon_dev, dev); - /* default sysfs entries */ - ret = sysfs_create_group(&hwmon_dev->kobj, &hwmon_attrgroup); + /* set the default attributes */ + ret = sysfs_create_group(&hwmon_dev->kobj, &hwmon_default_attrgroup); if (ret) { if (ret) goto error; } + /* if the card has a working thermal sensor */ + if (therm->temp_get(therm) >= 0) { + ret = sysfs_create_group(&hwmon_dev->kobj, &hwmon_temp_attrgroup); + if (ret) { + if (ret) + goto error; + } + } + /* if the card has a pwm fan */ /*XXX: incorrect, need better detection for this, some boards have * the gpio entries for pwm fan control even when there's no @@ -979,11 +998,10 @@ nouveau_hwmon_fini(struct drm_device *dev) struct nouveau_pm *pm = nouveau_pm(dev); if (pm->hwmon) { - sysfs_remove_group(&pm->hwmon->kobj, &hwmon_attrgroup); - sysfs_remove_group(&pm->hwmon->kobj, - &hwmon_pwm_fan_attrgroup); - sysfs_remove_group(&pm->hwmon->kobj, - &hwmon_fan_rpm_attrgroup); + sysfs_remove_group(&pm->hwmon->kobj, &hwmon_default_attrgroup); + sysfs_remove_group(&pm->hwmon->kobj, &hwmon_temp_attrgroup); + sysfs_remove_group(&pm->hwmon->kobj, &hwmon_pwm_fan_attrgroup); + sysfs_remove_group(&pm->hwmon->kobj, &hwmon_fan_rpm_attrgroup); hwmon_device_unregister(pm->hwmon); } diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c index 87a5a56ed358..7f0e6c3f37d1 100644 --- a/drivers/gpu/drm/nouveau/nv50_display.c +++ b/drivers/gpu/drm/nouveau/nv50_display.c @@ -524,6 +524,8 @@ nv50_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb, swap_interval <<= 4; if (swap_interval == 0) swap_interval |= 0x100; + if (chan == NULL) + evo_sync(crtc->dev); push = evo_wait(sync, 128); if (unlikely(push == NULL)) @@ -586,8 +588,6 @@ nv50_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb, sync->addr ^= 0x10; sync->data++; FIRE_RING (chan); - } else { - evo_sync(crtc->dev); } /* queue the flip */ @@ -2276,6 +2276,7 @@ nv50_display_create(struct drm_device *dev) NV_WARN(drm, "failed to create encoder %d/%d/%d: %d\n", dcbe->location, dcbe->type, ffs(dcbe->or) - 1, ret); + ret = 0; } } diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index d4c633e12863..27769e724b6d 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c @@ -468,13 +468,19 @@ static void cayman_gpu_init(struct radeon_device *rdev) (rdev->pdev->device == 0x9907) || (rdev->pdev->device == 0x9908) || (rdev->pdev->device == 0x9909) || + (rdev->pdev->device == 0x990B) || + (rdev->pdev->device == 0x990C) || + (rdev->pdev->device == 0x990F) || (rdev->pdev->device == 0x9910) || - (rdev->pdev->device == 0x9917)) { + (rdev->pdev->device == 0x9917) || + (rdev->pdev->device == 0x9999)) { rdev->config.cayman.max_simds_per_se = 6; rdev->config.cayman.max_backends_per_se = 2; } else if ((rdev->pdev->device == 0x9903) || (rdev->pdev->device == 0x9904) || (rdev->pdev->device == 0x990A) || + (rdev->pdev->device == 0x990D) || + (rdev->pdev->device == 0x990E) || (rdev->pdev->device == 0x9913) || (rdev->pdev->device == 0x9918)) { rdev->config.cayman.max_simds_per_se = 4; @@ -483,6 +489,9 @@ static void cayman_gpu_init(struct radeon_device *rdev) (rdev->pdev->device == 0x9990) || (rdev->pdev->device == 0x9991) || (rdev->pdev->device == 0x9994) || + (rdev->pdev->device == 0x9995) || + (rdev->pdev->device == 0x9996) || + (rdev->pdev->device == 0x999A) || (rdev->pdev->device == 0x99A0)) { rdev->config.cayman.max_simds_per_se = 3; rdev->config.cayman.max_backends_per_se = 1; @@ -616,11 +625,22 @@ static void cayman_gpu_init(struct radeon_device *rdev) WREG32(DMA_TILING_CONFIG + DMA0_REGISTER_OFFSET, gb_addr_config); WREG32(DMA_TILING_CONFIG + DMA1_REGISTER_OFFSET, gb_addr_config); - tmp = gb_addr_config & NUM_PIPES_MASK; - tmp = r6xx_remap_render_backend(rdev, tmp, - rdev->config.cayman.max_backends_per_se * - rdev->config.cayman.max_shader_engines, - CAYMAN_MAX_BACKENDS, disabled_rb_mask); + if ((rdev->config.cayman.max_backends_per_se == 1) && + (rdev->flags & RADEON_IS_IGP)) { + if ((disabled_rb_mask & 3) == 1) { + /* RB0 disabled, RB1 enabled */ + tmp = 0x11111111; + } else { + /* RB1 disabled, RB0 enabled */ + tmp = 0x00000000; + } + } else { + tmp = gb_addr_config & NUM_PIPES_MASK; + tmp = r6xx_remap_render_backend(rdev, tmp, + rdev->config.cayman.max_backends_per_se * + rdev->config.cayman.max_shader_engines, + CAYMAN_MAX_BACKENDS, disabled_rb_mask); + } WREG32(GB_BACKEND_MAP, tmp); cgts_tcc_disable = 0xffff0000; @@ -1771,6 +1791,7 @@ int cayman_resume(struct radeon_device *rdev) int cayman_suspend(struct radeon_device *rdev) { r600_audio_fini(rdev); + radeon_vm_manager_fini(rdev); cayman_cp_enable(rdev, false); cayman_dma_stop(rdev); evergreen_irq_suspend(rdev); diff --git a/drivers/gpu/drm/radeon/radeon_benchmark.c b/drivers/gpu/drm/radeon/radeon_benchmark.c index bedda9caadd9..6e05a2e75a46 100644 --- a/drivers/gpu/drm/radeon/radeon_benchmark.c +++ b/drivers/gpu/drm/radeon/radeon_benchmark.c @@ -122,10 +122,7 @@ static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size, goto out_cleanup; } - /* r100 doesn't have dma engine so skip the test */ - /* also, VRAM-to-VRAM test doesn't make much sense for DMA */ - /* skip it as well if domains are the same */ - if ((rdev->asic->copy.dma) && (sdomain != ddomain)) { + if (rdev->asic->copy.dma) { time = radeon_benchmark_do_move(rdev, size, saddr, daddr, RADEON_BENCHMARK_COPY_DMA, n); if (time < 0) @@ -135,13 +132,15 @@ static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size, sdomain, ddomain, "dma"); } - time = radeon_benchmark_do_move(rdev, size, saddr, daddr, - RADEON_BENCHMARK_COPY_BLIT, n); - if (time < 0) - goto out_cleanup; - if (time > 0) - radeon_benchmark_log_results(n, size, time, - sdomain, ddomain, "blit"); + if (rdev->asic->copy.blit) { + time = radeon_benchmark_do_move(rdev, size, saddr, daddr, + RADEON_BENCHMARK_COPY_BLIT, n); + if (time < 0) + goto out_cleanup; + if (time > 0) + radeon_benchmark_log_results(n, size, time, + sdomain, ddomain, "blit"); + } out_cleanup: if (sobj) { diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 9128120da044..bafbe3216952 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c @@ -4469,6 +4469,7 @@ int si_resume(struct radeon_device *rdev) int si_suspend(struct radeon_device *rdev) { + radeon_vm_manager_fini(rdev); si_cp_enable(rdev, false); cayman_dma_stop(rdev); si_irq_suspend(rdev); diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h index 92e47e5c9564..c4388776f4e4 100644 --- a/drivers/hid/hid-ids.h +++ b/drivers/hid/hid-ids.h @@ -590,6 +590,9 @@ #define USB_VENDOR_ID_MONTEREY 0x0566 #define USB_DEVICE_ID_GENIUS_KB29E 0x3004 +#define USB_VENDOR_ID_MSI 0x1770 +#define USB_DEVICE_ID_MSI_GX680R_LED_PANEL 0xff00 + #define USB_VENDOR_ID_NATIONAL_SEMICONDUCTOR 0x0400 #define USB_DEVICE_ID_N_S_HARMONY 0xc359 @@ -684,6 +687,9 @@ #define USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH_3001 0x3001 #define USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH_3008 0x3008 +#define USB_VENDOR_ID_REALTEK 0x0bda +#define USB_DEVICE_ID_REALTEK_READER 0x0152 + #define USB_VENDOR_ID_ROCCAT 0x1e7d #define USB_DEVICE_ID_ROCCAT_ARVO 0x30d4 #define USB_DEVICE_ID_ROCCAT_ISKU 0x319c diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c index 7a1ebb867cf4..82e9211b3ca9 100644 --- a/drivers/hid/hid-multitouch.c +++ b/drivers/hid/hid-multitouch.c @@ -621,6 +621,7 @@ static void mt_process_mt_event(struct hid_device *hid, struct hid_field *field, { struct mt_device *td = hid_get_drvdata(hid); __s32 quirks = td->mtclass.quirks; + struct input_dev *input = field->hidinput->input; if (hid->claimed & HID_CLAIMED_INPUT) { switch (usage->hid) { @@ -670,13 +671,16 @@ static void mt_process_mt_event(struct hid_device *hid, struct hid_field *field, break; default: + if (usage->type) + input_event(input, usage->type, usage->code, + value); return; } if (usage->usage_index + 1 == field->report_count) { /* we only take into account the last report. */ if (usage->hid == td->last_slot_field) - mt_complete_slot(td, field->hidinput->input); + mt_complete_slot(td, input); if (field->index == td->last_field_index && td->num_received >= td->num_expected) diff --git a/drivers/hid/usbhid/hid-quirks.c b/drivers/hid/usbhid/hid-quirks.c index e0e6abf1cd3b..19b8360f2330 100644 --- a/drivers/hid/usbhid/hid-quirks.c +++ b/drivers/hid/usbhid/hid-quirks.c @@ -73,6 +73,7 @@ static const struct hid_blacklist { { USB_VENDOR_ID_FORMOSA, USB_DEVICE_ID_FORMOSA_IR_RECEIVER, HID_QUIRK_NO_INIT_REPORTS }, { USB_VENDOR_ID_FREESCALE, USB_DEVICE_ID_FREESCALE_MX28, HID_QUIRK_NOGET }, { USB_VENDOR_ID_MGE, USB_DEVICE_ID_MGE_UPS, HID_QUIRK_NOGET }, + { USB_VENDOR_ID_MSI, USB_DEVICE_ID_MSI_GX680R_LED_PANEL, HID_QUIRK_NO_INIT_REPORTS }, { USB_VENDOR_ID_NOVATEK, USB_DEVICE_ID_NOVATEK_MOUSE, HID_QUIRK_NO_INIT_REPORTS }, { USB_VENDOR_ID_PIXART, USB_DEVICE_ID_PIXART_OPTICAL_TOUCH_SCREEN, HID_QUIRK_NO_INIT_REPORTS }, { USB_VENDOR_ID_PIXART, USB_DEVICE_ID_PIXART_OPTICAL_TOUCH_SCREEN1, HID_QUIRK_NO_INIT_REPORTS }, @@ -80,6 +81,7 @@ static const struct hid_blacklist { { USB_VENDOR_ID_PRODIGE, USB_DEVICE_ID_PRODIGE_CORDLESS, HID_QUIRK_NOGET }, { USB_VENDOR_ID_QUANTA, USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH_3001, HID_QUIRK_NOGET }, { USB_VENDOR_ID_QUANTA, USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH_3008, HID_QUIRK_NOGET }, + { USB_VENDOR_ID_REALTEK, USB_DEVICE_ID_REALTEK_READER, HID_QUIRK_NO_INIT_REPORTS }, { USB_VENDOR_ID_SENNHEISER, USB_DEVICE_ID_SENNHEISER_BTD500USB, HID_QUIRK_NOGET }, { USB_VENDOR_ID_SIGMATEL, USB_DEVICE_ID_SIGMATEL_STMP3780, HID_QUIRK_NOGET }, { USB_VENDOR_ID_SUN, USB_DEVICE_ID_RARITAN_KVM_DONGLE, HID_QUIRK_NOGET }, diff --git a/drivers/hwmon/lineage-pem.c b/drivers/hwmon/lineage-pem.c index 41df29f59b0e..ebbb9f4f27a3 100644 --- a/drivers/hwmon/lineage-pem.c +++ b/drivers/hwmon/lineage-pem.c @@ -422,6 +422,7 @@ static struct attribute *pem_input_attributes[] = { &sensor_dev_attr_in2_input.dev_attr.attr, &sensor_dev_attr_curr1_input.dev_attr.attr, &sensor_dev_attr_power1_input.dev_attr.attr, + NULL }; static const struct attribute_group pem_input_group = { @@ -432,6 +433,7 @@ static struct attribute *pem_fan_attributes[] = { &sensor_dev_attr_fan1_input.dev_attr.attr, &sensor_dev_attr_fan2_input.dev_attr.attr, &sensor_dev_attr_fan3_input.dev_attr.attr, + NULL }; static const struct attribute_group pem_fan_group = { diff --git a/drivers/hwmon/lm75.h b/drivers/hwmon/lm75.h index 668ff4721323..5cde94e56f17 100644 --- a/drivers/hwmon/lm75.h +++ b/drivers/hwmon/lm75.h @@ -25,7 +25,7 @@ which contains this code, we don't worry about the wasted space. */ -#include <linux/hwmon.h> +#include <linux/kernel.h> /* straight from the datasheet */ #define LM75_TEMP_MIN (-55000) diff --git a/drivers/hwmon/pmbus/ltc2978.c b/drivers/hwmon/pmbus/ltc2978.c index a58de38e23d8..6d6130752f94 100644 --- a/drivers/hwmon/pmbus/ltc2978.c +++ b/drivers/hwmon/pmbus/ltc2978.c @@ -59,7 +59,7 @@ enum chips { ltc2978, ltc3880 }; struct ltc2978_data { enum chips id; int vin_min, vin_max; - int temp_min, temp_max; + int temp_min, temp_max[2]; int vout_min[8], vout_max[8]; int iout_max[2]; int temp2_max; @@ -113,9 +113,10 @@ static int ltc2978_read_word_data_common(struct i2c_client *client, int page, ret = pmbus_read_word_data(client, page, LTC2978_MFR_TEMPERATURE_PEAK); if (ret >= 0) { - if (lin11_to_val(ret) > lin11_to_val(data->temp_max)) - data->temp_max = ret; - ret = data->temp_max; + if (lin11_to_val(ret) + > lin11_to_val(data->temp_max[page])) + data->temp_max[page] = ret; + ret = data->temp_max[page]; } break; case PMBUS_VIRT_RESET_VOUT_HISTORY: @@ -266,7 +267,7 @@ static int ltc2978_write_word_data(struct i2c_client *client, int page, break; case PMBUS_VIRT_RESET_TEMP_HISTORY: data->temp_min = 0x7bff; - data->temp_max = 0x7c00; + data->temp_max[page] = 0x7c00; ret = ltc2978_clear_peaks(client, page, data->id); break; default: @@ -323,7 +324,8 @@ static int ltc2978_probe(struct i2c_client *client, data->vin_min = 0x7bff; data->vin_max = 0x7c00; data->temp_min = 0x7bff; - data->temp_max = 0x7c00; + for (i = 0; i < ARRAY_SIZE(data->temp_max); i++) + data->temp_max[i] = 0x7c00; data->temp2_max = 0x7c00; switch (data->id) { diff --git a/drivers/hwmon/pmbus/pmbus_core.c b/drivers/hwmon/pmbus/pmbus_core.c index 80eef50c50fd..9add60920ac0 100644 --- a/drivers/hwmon/pmbus/pmbus_core.c +++ b/drivers/hwmon/pmbus/pmbus_core.c @@ -766,12 +766,14 @@ static ssize_t pmbus_show_label(struct device *dev, static int pmbus_add_attribute(struct pmbus_data *data, struct attribute *attr) { if (data->num_attributes >= data->max_attributes - 1) { - data->max_attributes += PMBUS_ATTR_ALLOC_SIZE; - data->group.attrs = krealloc(data->group.attrs, - sizeof(struct attribute *) * - data->max_attributes, GFP_KERNEL); - if (data->group.attrs == NULL) + int new_max_attrs = data->max_attributes + PMBUS_ATTR_ALLOC_SIZE; + void *new_attrs = krealloc(data->group.attrs, + new_max_attrs * sizeof(void *), + GFP_KERNEL); + if (!new_attrs) return -ENOMEM; + data->group.attrs = new_attrs; + data->max_attributes = new_max_attrs; } data->group.attrs[data->num_attributes++] = attr; diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 46cde098c11c..e380c6eef3af 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -4,7 +4,6 @@ menuconfig I2C tristate "I2C support" - depends on !S390 select RT_MUTEXES ---help--- I2C (pronounce: I-squared-C) is a slow serial bus protocol used in @@ -76,6 +75,7 @@ config I2C_HELPER_AUTO config I2C_SMBUS tristate "SMBus-specific protocols" if !I2C_HELPER_AUTO + depends on GENERIC_HARDIRQS help Say Y here if you want support for SMBus extensions to the I2C specification. At the moment, the only supported extension is diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index a3725de92384..adfee98486b1 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -114,7 +114,7 @@ config I2C_I801 config I2C_ISCH tristate "Intel SCH SMBus 1.0" - depends on PCI + depends on PCI && GENERIC_HARDIRQS select LPC_SCH help Say Y here if you want to use SMBus controller on the Intel SCH @@ -543,6 +543,7 @@ config I2C_NUC900 config I2C_OCORES tristate "OpenCores I2C Controller" + depends on GENERIC_HARDIRQS help If you say yes to this option, support will be included for the OpenCores I2C controller. For details see @@ -777,7 +778,7 @@ config I2C_DIOLAN_U2C config I2C_PARPORT tristate "Parallel port adapter" - depends on PARPORT + depends on PARPORT && GENERIC_HARDIRQS select I2C_ALGOBIT select I2C_SMBUS help @@ -802,6 +803,7 @@ config I2C_PARPORT config I2C_PARPORT_LIGHT tristate "Parallel port adapter (light)" + depends on GENERIC_HARDIRQS select I2C_ALGOBIT select I2C_SMBUS help diff --git a/drivers/i2c/busses/i2c-ismt.c b/drivers/i2c/busses/i2c-ismt.c index e9205ee8cf94..130f02cc9d94 100644 --- a/drivers/i2c/busses/i2c-ismt.c +++ b/drivers/i2c/busses/i2c-ismt.c @@ -80,6 +80,7 @@ /* PCI DIDs for the Intel SMBus Message Transport (SMT) Devices */ #define PCI_DEVICE_ID_INTEL_S1200_SMT0 0x0c59 #define PCI_DEVICE_ID_INTEL_S1200_SMT1 0x0c5a +#define PCI_DEVICE_ID_INTEL_AVOTON_SMT 0x1f15 #define ISMT_DESC_ENTRIES 32 /* number of descriptor entries */ #define ISMT_MAX_RETRIES 3 /* number of SMBus retries to attempt */ @@ -185,6 +186,7 @@ struct ismt_priv { static const DEFINE_PCI_DEVICE_TABLE(ismt_ids) = { { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT0) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT1) }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMT) }, { 0, } }; diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 36704e3ab3fa..b714776b6ddd 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -411,7 +411,11 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) int clk_multiplier = I2C_CLK_MULTIPLIER_STD_FAST_MODE; u32 clk_divisor; - tegra_i2c_clock_enable(i2c_dev); + err = tegra_i2c_clock_enable(i2c_dev); + if (err < 0) { + dev_err(i2c_dev->dev, "Clock enable failed %d\n", err); + return err; + } tegra_periph_reset_assert(i2c_dev->div_clk); udelay(2); @@ -628,7 +632,12 @@ static int tegra_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], if (i2c_dev->is_suspended) return -EBUSY; - tegra_i2c_clock_enable(i2c_dev); + ret = tegra_i2c_clock_enable(i2c_dev); + if (ret < 0) { + dev_err(i2c_dev->dev, "Clock enable failed %d\n", ret); + return ret; + } + for (i = 0; i < num; i++) { enum msg_end_type end_type = MSG_END_STOP; if (i < (num - 1)) { diff --git a/drivers/i2c/muxes/i2c-mux-pca9541.c b/drivers/i2c/muxes/i2c-mux-pca9541.c index f3b8f9a6a89b..966a18a5d12d 100644 --- a/drivers/i2c/muxes/i2c-mux-pca9541.c +++ b/drivers/i2c/muxes/i2c-mux-pca9541.c @@ -3,7 +3,7 @@ * * Copyright (c) 2010 Ericsson AB. * - * Author: Guenter Roeck <guenter.roeck@ericsson.com> + * Author: Guenter Roeck <linux@roeck-us.net> * * Derived from: * pca954x.c diff --git a/drivers/iio/common/st_sensors/st_sensors_core.c b/drivers/iio/common/st_sensors/st_sensors_core.c index 0198324a8b0c..bd33473f8e38 100644 --- a/drivers/iio/common/st_sensors/st_sensors_core.c +++ b/drivers/iio/common/st_sensors/st_sensors_core.c @@ -62,7 +62,7 @@ st_sensors_match_odr_error: int st_sensors_set_odr(struct iio_dev *indio_dev, unsigned int odr) { int err; - struct st_sensor_odr_avl odr_out; + struct st_sensor_odr_avl odr_out = {0, 0}; struct st_sensor_data *sdata = iio_priv(indio_dev); err = st_sensors_match_odr(sdata->sensor, odr, &odr_out); @@ -114,7 +114,7 @@ st_sensors_match_odr_error: static int st_sensors_set_fullscale(struct iio_dev *indio_dev, unsigned int fs) { - int err, i; + int err, i = 0; struct st_sensor_data *sdata = iio_priv(indio_dev); err = st_sensors_match_fs(sdata->sensor, fs, &i); @@ -139,14 +139,13 @@ st_accel_set_fullscale_error: int st_sensors_set_enable(struct iio_dev *indio_dev, bool enable) { - bool found; u8 tmp_value; int err = -EINVAL; - struct st_sensor_odr_avl odr_out; + bool found = false; + struct st_sensor_odr_avl odr_out = {0, 0}; struct st_sensor_data *sdata = iio_priv(indio_dev); if (enable) { - found = false; tmp_value = sdata->sensor->pw.value_on; if ((sdata->sensor->odr.addr == sdata->sensor->pw.addr) && (sdata->sensor->odr.mask == sdata->sensor->pw.mask)) { diff --git a/drivers/iio/dac/ad5064.c b/drivers/iio/dac/ad5064.c index 2fe1d4edcb2f..74f2d52795f6 100644 --- a/drivers/iio/dac/ad5064.c +++ b/drivers/iio/dac/ad5064.c @@ -27,7 +27,6 @@ #define AD5064_ADDR(x) ((x) << 20) #define AD5064_CMD(x) ((x) << 24) -#define AD5064_ADDR_DAC(chan) (chan) #define AD5064_ADDR_ALL_DAC 0xF #define AD5064_CMD_WRITE_INPUT_N 0x0 @@ -131,15 +130,15 @@ static int ad5064_write(struct ad5064_state *st, unsigned int cmd, } static int ad5064_sync_powerdown_mode(struct ad5064_state *st, - unsigned int channel) + const struct iio_chan_spec *chan) { unsigned int val; int ret; - val = (0x1 << channel); + val = (0x1 << chan->address); - if (st->pwr_down[channel]) - val |= st->pwr_down_mode[channel] << 8; + if (st->pwr_down[chan->channel]) + val |= st->pwr_down_mode[chan->channel] << 8; ret = ad5064_write(st, AD5064_CMD_POWERDOWN_DAC, 0, val, 0); @@ -169,7 +168,7 @@ static int ad5064_set_powerdown_mode(struct iio_dev *indio_dev, mutex_lock(&indio_dev->mlock); st->pwr_down_mode[chan->channel] = mode + 1; - ret = ad5064_sync_powerdown_mode(st, chan->channel); + ret = ad5064_sync_powerdown_mode(st, chan); mutex_unlock(&indio_dev->mlock); return ret; @@ -205,7 +204,7 @@ static ssize_t ad5064_write_dac_powerdown(struct iio_dev *indio_dev, mutex_lock(&indio_dev->mlock); st->pwr_down[chan->channel] = pwr_down; - ret = ad5064_sync_powerdown_mode(st, chan->channel); + ret = ad5064_sync_powerdown_mode(st, chan); mutex_unlock(&indio_dev->mlock); return ret ? ret : len; } @@ -258,7 +257,7 @@ static int ad5064_write_raw(struct iio_dev *indio_dev, switch (mask) { case IIO_CHAN_INFO_RAW: - if (val > (1 << chan->scan_type.realbits) || val < 0) + if (val >= (1 << chan->scan_type.realbits) || val < 0) return -EINVAL; mutex_lock(&indio_dev->mlock); @@ -292,34 +291,44 @@ static const struct iio_chan_spec_ext_info ad5064_ext_info[] = { { }, }; -#define AD5064_CHANNEL(chan, bits) { \ +#define AD5064_CHANNEL(chan, addr, bits) { \ .type = IIO_VOLTAGE, \ .indexed = 1, \ .output = 1, \ .channel = (chan), \ .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \ - .address = AD5064_ADDR_DAC(chan), \ + .address = addr, \ .scan_type = IIO_ST('u', (bits), 16, 20 - (bits)), \ .ext_info = ad5064_ext_info, \ } #define DECLARE_AD5064_CHANNELS(name, bits) \ const struct iio_chan_spec name[] = { \ - AD5064_CHANNEL(0, bits), \ - AD5064_CHANNEL(1, bits), \ - AD5064_CHANNEL(2, bits), \ - AD5064_CHANNEL(3, bits), \ - AD5064_CHANNEL(4, bits), \ - AD5064_CHANNEL(5, bits), \ - AD5064_CHANNEL(6, bits), \ - AD5064_CHANNEL(7, bits), \ + AD5064_CHANNEL(0, 0, bits), \ + AD5064_CHANNEL(1, 1, bits), \ + AD5064_CHANNEL(2, 2, bits), \ + AD5064_CHANNEL(3, 3, bits), \ + AD5064_CHANNEL(4, 4, bits), \ + AD5064_CHANNEL(5, 5, bits), \ + AD5064_CHANNEL(6, 6, bits), \ + AD5064_CHANNEL(7, 7, bits), \ +} + +#define DECLARE_AD5065_CHANNELS(name, bits) \ +const struct iio_chan_spec name[] = { \ + AD5064_CHANNEL(0, 0, bits), \ + AD5064_CHANNEL(1, 3, bits), \ } static DECLARE_AD5064_CHANNELS(ad5024_channels, 12); static DECLARE_AD5064_CHANNELS(ad5044_channels, 14); static DECLARE_AD5064_CHANNELS(ad5064_channels, 16); +static DECLARE_AD5065_CHANNELS(ad5025_channels, 12); +static DECLARE_AD5065_CHANNELS(ad5045_channels, 14); +static DECLARE_AD5065_CHANNELS(ad5065_channels, 16); + static const struct ad5064_chip_info ad5064_chip_info_tbl[] = { [ID_AD5024] = { .shared_vref = false, @@ -328,7 +337,7 @@ static const struct ad5064_chip_info ad5064_chip_info_tbl[] = { }, [ID_AD5025] = { .shared_vref = false, - .channels = ad5024_channels, + .channels = ad5025_channels, .num_channels = 2, }, [ID_AD5044] = { @@ -338,7 +347,7 @@ static const struct ad5064_chip_info ad5064_chip_info_tbl[] = { }, [ID_AD5045] = { .shared_vref = false, - .channels = ad5044_channels, + .channels = ad5045_channels, .num_channels = 2, }, [ID_AD5064] = { @@ -353,7 +362,7 @@ static const struct ad5064_chip_info ad5064_chip_info_tbl[] = { }, [ID_AD5065] = { .shared_vref = false, - .channels = ad5064_channels, + .channels = ad5065_channels, .num_channels = 2, }, [ID_AD5628_1] = { @@ -429,6 +438,7 @@ static int ad5064_probe(struct device *dev, enum ad5064_type type, { struct iio_dev *indio_dev; struct ad5064_state *st; + unsigned int midscale; unsigned int i; int ret; @@ -465,11 +475,6 @@ static int ad5064_probe(struct device *dev, enum ad5064_type type, goto error_free_reg; } - for (i = 0; i < st->chip_info->num_channels; ++i) { - st->pwr_down_mode[i] = AD5064_LDAC_PWRDN_1K; - st->dac_cache[i] = 0x8000; - } - indio_dev->dev.parent = dev; indio_dev->name = name; indio_dev->info = &ad5064_info; @@ -477,6 +482,13 @@ static int ad5064_probe(struct device *dev, enum ad5064_type type, indio_dev->channels = st->chip_info->channels; indio_dev->num_channels = st->chip_info->num_channels; + midscale = (1 << indio_dev->channels[0].scan_type.realbits) / 2; + + for (i = 0; i < st->chip_info->num_channels; ++i) { + st->pwr_down_mode[i] = AD5064_LDAC_PWRDN_1K; + st->dac_cache[i] = midscale; + } + ret = iio_device_register(indio_dev); if (ret) goto error_disable_reg; diff --git a/drivers/iio/imu/inv_mpu6050/Kconfig b/drivers/iio/imu/inv_mpu6050/Kconfig index b5cfa3a354cf..361b2328453d 100644 --- a/drivers/iio/imu/inv_mpu6050/Kconfig +++ b/drivers/iio/imu/inv_mpu6050/Kconfig @@ -5,6 +5,7 @@ config INV_MPU6050_IIO tristate "Invensense MPU6050 devices" depends on I2C && SYSFS + select IIO_BUFFER select IIO_TRIGGERED_BUFFER help This driver supports the Invensense MPU6050 devices. diff --git a/drivers/infiniband/hw/cxgb4/cm.c b/drivers/infiniband/hw/cxgb4/cm.c index 565bfb161c1a..a3fde52840ca 100644 --- a/drivers/infiniband/hw/cxgb4/cm.c +++ b/drivers/infiniband/hw/cxgb4/cm.c @@ -1575,6 +1575,12 @@ static int c4iw_reconnect(struct c4iw_ep *ep) neigh = dst_neigh_lookup(ep->dst, &ep->com.cm_id->remote_addr.sin_addr.s_addr); + if (!neigh) { + pr_err("%s - cannot alloc neigh.\n", __func__); + err = -ENOMEM; + goto fail4; + } + /* get a l2t entry */ if (neigh->dev->flags & IFF_LOOPBACK) { PDBG("%s LOOPBACK\n", __func__); @@ -3053,6 +3059,12 @@ static int rx_pkt(struct c4iw_dev *dev, struct sk_buff *skb) dst = &rt->dst; neigh = dst_neigh_lookup_skb(dst, skb); + if (!neigh) { + pr_err("%s - failed to allocate neigh!\n", + __func__); + goto free_dst; + } + if (neigh->dev->flags & IFF_LOOPBACK) { pdev = ip_dev_find(&init_net, iph->daddr); e = cxgb4_l2t_get(dev->rdev.lldi.l2t, neigh, diff --git a/drivers/infiniband/hw/cxgb4/qp.c b/drivers/infiniband/hw/cxgb4/qp.c index 17ba4f8bc12d..70b1808a08f4 100644 --- a/drivers/infiniband/hw/cxgb4/qp.c +++ b/drivers/infiniband/hw/cxgb4/qp.c @@ -186,8 +186,10 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq, wq->rq.queue = dma_alloc_coherent(&(rdev->lldi.pdev->dev), wq->rq.memsize, &(wq->rq.dma_addr), GFP_KERNEL); - if (!wq->rq.queue) + if (!wq->rq.queue) { + ret = -ENOMEM; goto free_sq; + } PDBG("%s sq base va 0x%p pa 0x%llx rq base va 0x%p pa 0x%llx\n", __func__, wq->sq.queue, (unsigned long long)virt_to_phys(wq->sq.queue), diff --git a/drivers/infiniband/hw/ipath/ipath_verbs.c b/drivers/infiniband/hw/ipath/ipath_verbs.c index 439c35d4a669..ea93870266eb 100644 --- a/drivers/infiniband/hw/ipath/ipath_verbs.c +++ b/drivers/infiniband/hw/ipath/ipath_verbs.c @@ -620,7 +620,7 @@ void ipath_ib_rcv(struct ipath_ibdev *dev, void *rhdr, void *data, goto bail; } - opcode = be32_to_cpu(ohdr->bth[0]) >> 24; + opcode = (be32_to_cpu(ohdr->bth[0]) >> 24) & 0x7f; dev->opstats[opcode].n_bytes += tlen; dev->opstats[opcode].n_packets++; diff --git a/drivers/infiniband/hw/mlx4/cm.c b/drivers/infiniband/hw/mlx4/cm.c index e0d79b2395e4..add98d01476c 100644 --- a/drivers/infiniband/hw/mlx4/cm.c +++ b/drivers/infiniband/hw/mlx4/cm.c @@ -362,7 +362,6 @@ void mlx4_ib_cm_paravirt_init(struct mlx4_ib_dev *dev) INIT_LIST_HEAD(&dev->sriov.cm_list); dev->sriov.sl_id_map = RB_ROOT; idr_init(&dev->sriov.pv_id_table); - idr_pre_get(&dev->sriov.pv_id_table, GFP_KERNEL); } /* slave = -1 ==> all slaves */ diff --git a/drivers/infiniband/hw/qib/Kconfig b/drivers/infiniband/hw/qib/Kconfig index 8349f9c5064c..1e603a375069 100644 --- a/drivers/infiniband/hw/qib/Kconfig +++ b/drivers/infiniband/hw/qib/Kconfig @@ -1,7 +1,7 @@ config INFINIBAND_QIB - tristate "QLogic PCIe HCA support" + tristate "Intel PCIe HCA support" depends on 64BIT ---help--- - This is a low-level driver for QLogic PCIe QLE InfiniBand host - channel adapters. This driver does not support the QLogic + This is a low-level driver for Intel PCIe QLE InfiniBand host + channel adapters. This driver does not support the Intel HyperTransport card (model QHT7140). diff --git a/drivers/infiniband/hw/qib/qib_driver.c b/drivers/infiniband/hw/qib/qib_driver.c index 5423edcab51f..216092477dfc 100644 --- a/drivers/infiniband/hw/qib/qib_driver.c +++ b/drivers/infiniband/hw/qib/qib_driver.c @@ -1,4 +1,5 @@ /* + * Copyright (c) 2013 Intel Corporation. All rights reserved. * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved. * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. * @@ -63,8 +64,8 @@ MODULE_PARM_DESC(compat_ddr_negotiate, "Attempt pre-IBTA 1.2 DDR speed negotiation"); MODULE_LICENSE("Dual BSD/GPL"); -MODULE_AUTHOR("QLogic <support@qlogic.com>"); -MODULE_DESCRIPTION("QLogic IB driver"); +MODULE_AUTHOR("Intel <ibsupport@intel.com>"); +MODULE_DESCRIPTION("Intel IB driver"); MODULE_VERSION(QIB_DRIVER_VERSION); /* diff --git a/drivers/infiniband/hw/qib/qib_iba6120.c b/drivers/infiniband/hw/qib/qib_iba6120.c index a099ac171e22..0232ae56b1fa 100644 --- a/drivers/infiniband/hw/qib/qib_iba6120.c +++ b/drivers/infiniband/hw/qib/qib_iba6120.c @@ -1,4 +1,5 @@ /* + * Copyright (c) 2013 Intel Corporation. All rights reserved. * Copyright (c) 2006, 2007, 2008, 2009, 2010 QLogic Corporation. * All rights reserved. * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. @@ -51,7 +52,7 @@ static u32 qib_6120_iblink_state(u64); /* * This file contains all the chip-specific register information and - * access functions for the QLogic QLogic_IB PCI-Express chip. + * access functions for the Intel Intel_IB PCI-Express chip. * */ diff --git a/drivers/infiniband/hw/qib/qib_init.c b/drivers/infiniband/hw/qib/qib_init.c index 50e33aa0b4e3..173f805790da 100644 --- a/drivers/infiniband/hw/qib/qib_init.c +++ b/drivers/infiniband/hw/qib/qib_init.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012 Intel Corporation. All rights reserved. + * Copyright (c) 2012, 2013 Intel Corporation. All rights reserved. * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved. * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. * @@ -1138,7 +1138,7 @@ void qib_disable_after_error(struct qib_devdata *dd) static void qib_remove_one(struct pci_dev *); static int qib_init_one(struct pci_dev *, const struct pci_device_id *); -#define DRIVER_LOAD_MSG "QLogic " QIB_DRV_NAME " loaded: " +#define DRIVER_LOAD_MSG "Intel " QIB_DRV_NAME " loaded: " #define PFX QIB_DRV_NAME ": " static DEFINE_PCI_DEVICE_TABLE(qib_pci_tbl) = { @@ -1355,7 +1355,7 @@ static int qib_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) dd = qib_init_iba6120_funcs(pdev, ent); #else qib_early_err(&pdev->dev, - "QLogic PCIE device 0x%x cannot work if CONFIG_PCI_MSI is not enabled\n", + "Intel PCIE device 0x%x cannot work if CONFIG_PCI_MSI is not enabled\n", ent->device); dd = ERR_PTR(-ENODEV); #endif @@ -1371,7 +1371,7 @@ static int qib_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) default: qib_early_err(&pdev->dev, - "Failing on unknown QLogic deviceid 0x%x\n", + "Failing on unknown Intel deviceid 0x%x\n", ent->device); ret = -ENODEV; } diff --git a/drivers/infiniband/hw/qib/qib_sd7220.c b/drivers/infiniband/hw/qib/qib_sd7220.c index 50a8a0d4fe67..08a6c6d39e56 100644 --- a/drivers/infiniband/hw/qib/qib_sd7220.c +++ b/drivers/infiniband/hw/qib/qib_sd7220.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012 Intel Corporation. All rights reserved. + * Copyright (c) 2013 Intel Corporation. All rights reserved. * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved. * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. * @@ -44,7 +44,7 @@ #include "qib.h" #include "qib_7220.h" -#define SD7220_FW_NAME "qlogic/sd7220.fw" +#define SD7220_FW_NAME "intel/sd7220.fw" MODULE_FIRMWARE(SD7220_FW_NAME); /* diff --git a/drivers/infiniband/hw/qib/qib_verbs.c b/drivers/infiniband/hw/qib/qib_verbs.c index ba51a4715a1d..7c0ab16a2fe2 100644 --- a/drivers/infiniband/hw/qib/qib_verbs.c +++ b/drivers/infiniband/hw/qib/qib_verbs.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012 Intel Corporation. All rights reserved. + * Copyright (c) 2012, 2013 Intel Corporation. All rights reserved. * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved. * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved. * @@ -2224,7 +2224,7 @@ int qib_register_ib_device(struct qib_devdata *dd) ibdev->dma_ops = &qib_dma_mapping_ops; snprintf(ibdev->node_desc, sizeof(ibdev->node_desc), - "QLogic Infiniband HCA %s", init_utsname()->nodename); + "Intel Infiniband HCA %s", init_utsname()->nodename); ret = ib_register_device(ibdev, qib_create_port_files); if (ret) diff --git a/drivers/infiniband/ulp/ipoib/ipoib_cm.c b/drivers/infiniband/ulp/ipoib/ipoib_cm.c index 67b0c1d23678..1ef880de3a41 100644 --- a/drivers/infiniband/ulp/ipoib/ipoib_cm.c +++ b/drivers/infiniband/ulp/ipoib/ipoib_cm.c @@ -758,9 +758,13 @@ void ipoib_cm_send(struct net_device *dev, struct sk_buff *skb, struct ipoib_cm_ if (++priv->tx_outstanding == ipoib_sendq_size) { ipoib_dbg(priv, "TX ring 0x%x full, stopping kernel net queue\n", tx->qp->qp_num); - if (ib_req_notify_cq(priv->send_cq, IB_CQ_NEXT_COMP)) - ipoib_warn(priv, "request notify on send CQ failed\n"); netif_stop_queue(dev); + rc = ib_req_notify_cq(priv->send_cq, + IB_CQ_NEXT_COMP | IB_CQ_REPORT_MISSED_EVENTS); + if (rc < 0) + ipoib_warn(priv, "request notify on send CQ failed\n"); + else if (rc) + ipoib_send_comp_handler(priv->send_cq, dev); } } } diff --git a/drivers/input/joystick/analog.c b/drivers/input/joystick/analog.c index 7cd74e29cbc8..9135606c8649 100644 --- a/drivers/input/joystick/analog.c +++ b/drivers/input/joystick/analog.c @@ -158,14 +158,10 @@ static unsigned int get_time_pit(void) #define GET_TIME(x) rdtscl(x) #define DELTA(x,y) ((y)-(x)) #define TIME_NAME "TSC" -#elif defined(__alpha__) +#elif defined(__alpha__) || defined(CONFIG_MN10300) || defined(CONFIG_ARM) || defined(CONFIG_TILE) #define GET_TIME(x) do { x = get_cycles(); } while (0) #define DELTA(x,y) ((y)-(x)) -#define TIME_NAME "PCC" -#elif defined(CONFIG_MN10300) || defined(CONFIG_TILE) -#define GET_TIME(x) do { x = get_cycles(); } while (0) -#define DELTA(x, y) ((x) - (y)) -#define TIME_NAME "TSC" +#define TIME_NAME "get_cycles" #else #define FAKE_TIME static unsigned long analog_faketime = 0; diff --git a/drivers/input/keyboard/tc3589x-keypad.c b/drivers/input/keyboard/tc3589x-keypad.c index 2fb0d76a04c4..208de7cbb7fa 100644 --- a/drivers/input/keyboard/tc3589x-keypad.c +++ b/drivers/input/keyboard/tc3589x-keypad.c @@ -70,8 +70,6 @@ #define TC3589x_EVT_INT_CLR 0x2 #define TC3589x_KBD_INT_CLR 0x1 -#define TC3589x_KBD_KEYMAP_SIZE 64 - /** * struct tc_keypad - data structure used by keypad driver * @tc3589x: pointer to tc35893 @@ -88,7 +86,7 @@ struct tc_keypad { const struct tc3589x_keypad_platform_data *board; unsigned int krow; unsigned int kcol; - unsigned short keymap[TC3589x_KBD_KEYMAP_SIZE]; + unsigned short *keymap; bool keypad_stopped; }; @@ -338,12 +336,14 @@ static int tc3589x_keypad_probe(struct platform_device *pdev) error = matrix_keypad_build_keymap(plat->keymap_data, NULL, TC3589x_MAX_KPROW, TC3589x_MAX_KPCOL, - keypad->keymap, input); + NULL, input); if (error) { dev_err(&pdev->dev, "Failed to build keymap\n"); goto err_free_mem; } + keypad->keymap = input->keycode; + input_set_capability(input, EV_MSC, MSC_SCAN); if (!plat->no_autorepeat) __set_bit(EV_REP, input->evbit); diff --git a/drivers/input/mouse/alps.c b/drivers/input/mouse/alps.c index 7b99fc7c9438..0238e0e14335 100644 --- a/drivers/input/mouse/alps.c +++ b/drivers/input/mouse/alps.c @@ -490,6 +490,29 @@ static void alps_decode_rushmore(struct alps_fields *f, unsigned char *p) f->y_map |= (p[5] & 0x20) << 6; } +static void alps_decode_dolphin(struct alps_fields *f, unsigned char *p) +{ + f->first_mp = !!(p[0] & 0x02); + f->is_mp = !!(p[0] & 0x20); + + f->fingers = ((p[0] & 0x6) >> 1 | + (p[0] & 0x10) >> 2); + f->x_map = ((p[2] & 0x60) >> 5) | + ((p[4] & 0x7f) << 2) | + ((p[5] & 0x7f) << 9) | + ((p[3] & 0x07) << 16) | + ((p[3] & 0x70) << 15) | + ((p[0] & 0x01) << 22); + f->y_map = (p[1] & 0x7f) | + ((p[2] & 0x1f) << 7); + + f->x = ((p[1] & 0x7f) | ((p[4] & 0x0f) << 7)); + f->y = ((p[2] & 0x7f) | ((p[4] & 0xf0) << 3)); + f->z = (p[0] & 4) ? 0 : p[5] & 0x7f; + + alps_decode_buttons_v3(f, p); +} + static void alps_process_touchpad_packet_v3(struct psmouse *psmouse) { struct alps_data *priv = psmouse->private; @@ -874,7 +897,8 @@ static psmouse_ret_t alps_process_byte(struct psmouse *psmouse) } /* Bytes 2 - pktsize should have 0 in the highest bit */ - if (psmouse->pktcnt >= 2 && psmouse->pktcnt <= psmouse->pktsize && + if (priv->proto_version != ALPS_PROTO_V5 && + psmouse->pktcnt >= 2 && psmouse->pktcnt <= psmouse->pktsize && (psmouse->packet[psmouse->pktcnt - 1] & 0x80)) { psmouse_dbg(psmouse, "refusing packet[%i] = %x\n", psmouse->pktcnt - 1, @@ -994,8 +1018,7 @@ static int alps_rpt_cmd(struct psmouse *psmouse, int init_command, return 0; } -static int alps_enter_command_mode(struct psmouse *psmouse, - unsigned char *resp) +static int alps_enter_command_mode(struct psmouse *psmouse) { unsigned char param[4]; @@ -1004,14 +1027,12 @@ static int alps_enter_command_mode(struct psmouse *psmouse, return -1; } - if (param[0] != 0x88 || (param[1] != 0x07 && param[1] != 0x08)) { + if ((param[0] != 0x88 || (param[1] != 0x07 && param[1] != 0x08)) && + param[0] != 0x73) { psmouse_dbg(psmouse, "unknown response while entering command mode\n"); return -1; } - - if (resp) - *resp = param[2]; return 0; } @@ -1176,7 +1197,7 @@ static int alps_passthrough_mode_v3(struct psmouse *psmouse, { int reg_val, ret = -1; - if (alps_enter_command_mode(psmouse, NULL)) + if (alps_enter_command_mode(psmouse)) return -1; reg_val = alps_command_mode_read_reg(psmouse, reg_base + 0x0008); @@ -1216,7 +1237,7 @@ static int alps_probe_trackstick_v3(struct psmouse *psmouse, int reg_base) { int ret = -EIO, reg_val; - if (alps_enter_command_mode(psmouse, NULL)) + if (alps_enter_command_mode(psmouse)) goto error; reg_val = alps_command_mode_read_reg(psmouse, reg_base + 0x08); @@ -1279,7 +1300,7 @@ static int alps_setup_trackstick_v3(struct psmouse *psmouse, int reg_base) * supported by this driver. If bit 1 isn't set the packet * format is different. */ - if (alps_enter_command_mode(psmouse, NULL) || + if (alps_enter_command_mode(psmouse) || alps_command_mode_write_reg(psmouse, reg_base + 0x08, 0x82) || alps_exit_command_mode(psmouse)) @@ -1306,7 +1327,7 @@ static int alps_hw_init_v3(struct psmouse *psmouse) alps_setup_trackstick_v3(psmouse, ALPS_REG_BASE_PINNACLE) == -EIO) goto error; - if (alps_enter_command_mode(psmouse, NULL) || + if (alps_enter_command_mode(psmouse) || alps_absolute_mode_v3(psmouse)) { psmouse_err(psmouse, "Failed to enter absolute mode\n"); goto error; @@ -1381,7 +1402,7 @@ static int alps_hw_init_rushmore_v3(struct psmouse *psmouse) priv->flags &= ~ALPS_DUALPOINT; } - if (alps_enter_command_mode(psmouse, NULL) || + if (alps_enter_command_mode(psmouse) || alps_command_mode_read_reg(psmouse, 0xc2d9) == -1 || alps_command_mode_write_reg(psmouse, 0xc2cb, 0x00)) goto error; @@ -1431,7 +1452,7 @@ static int alps_hw_init_v4(struct psmouse *psmouse) struct ps2dev *ps2dev = &psmouse->ps2dev; unsigned char param[4]; - if (alps_enter_command_mode(psmouse, NULL)) + if (alps_enter_command_mode(psmouse)) goto error; if (alps_absolute_mode_v4(psmouse)) { @@ -1499,6 +1520,23 @@ error: return -1; } +static int alps_hw_init_dolphin_v1(struct psmouse *psmouse) +{ + struct ps2dev *ps2dev = &psmouse->ps2dev; + unsigned char param[2]; + + /* This is dolphin "v1" as empirically defined by florin9doi */ + param[0] = 0x64; + param[1] = 0x28; + + if (ps2_command(ps2dev, NULL, PSMOUSE_CMD_SETSTREAM) || + ps2_command(ps2dev, ¶m[0], PSMOUSE_CMD_SETRATE) || + ps2_command(ps2dev, ¶m[1], PSMOUSE_CMD_SETRATE)) + return -1; + + return 0; +} + static void alps_set_defaults(struct alps_data *priv) { priv->byte0 = 0x8f; @@ -1532,6 +1570,21 @@ static void alps_set_defaults(struct alps_data *priv) priv->nibble_commands = alps_v4_nibble_commands; priv->addr_command = PSMOUSE_CMD_DISABLE; break; + case ALPS_PROTO_V5: + priv->hw_init = alps_hw_init_dolphin_v1; + priv->process_packet = alps_process_packet_v3; + priv->decode_fields = alps_decode_dolphin; + priv->set_abs_params = alps_set_abs_params_mt; + priv->nibble_commands = alps_v3_nibble_commands; + priv->addr_command = PSMOUSE_CMD_RESET_WRAP; + priv->byte0 = 0xc8; + priv->mask0 = 0xc8; + priv->flags = 0; + priv->x_max = 1360; + priv->y_max = 660; + priv->x_bits = 23; + priv->y_bits = 12; + break; } } @@ -1592,6 +1645,12 @@ static int alps_identify(struct psmouse *psmouse, struct alps_data *priv) if (alps_match_table(psmouse, priv, e7, ec) == 0) { return 0; + } else if (e7[0] == 0x73 && e7[1] == 0x03 && e7[2] == 0x50 && + ec[0] == 0x73 && ec[1] == 0x01) { + priv->proto_version = ALPS_PROTO_V5; + alps_set_defaults(priv); + + return 0; } else if (ec[0] == 0x88 && ec[1] == 0x08) { priv->proto_version = ALPS_PROTO_V3; alps_set_defaults(priv); diff --git a/drivers/input/mouse/alps.h b/drivers/input/mouse/alps.h index 970480551b6e..eee59853b9ce 100644 --- a/drivers/input/mouse/alps.h +++ b/drivers/input/mouse/alps.h @@ -16,6 +16,7 @@ #define ALPS_PROTO_V2 2 #define ALPS_PROTO_V3 3 #define ALPS_PROTO_V4 4 +#define ALPS_PROTO_V5 5 /** * struct alps_model_info - touchpad ID table diff --git a/drivers/input/mouse/cypress_ps2.c b/drivers/input/mouse/cypress_ps2.c index 1673dc6c8092..f51765fff054 100644 --- a/drivers/input/mouse/cypress_ps2.c +++ b/drivers/input/mouse/cypress_ps2.c @@ -236,6 +236,13 @@ static int cypress_read_fw_version(struct psmouse *psmouse) cytp->fw_version = param[2] & FW_VERSION_MASX; cytp->tp_metrics_supported = (param[2] & TP_METRICS_MASK) ? 1 : 0; + /* + * Trackpad fw_version 11 (in Dell XPS12) yields a bogus response to + * CYTP_CMD_READ_TP_METRICS so do not try to use it. LP: #1103594. + */ + if (cytp->fw_version >= 11) + cytp->tp_metrics_supported = 0; + psmouse_dbg(psmouse, "cytp->fw_version = %d\n", cytp->fw_version); psmouse_dbg(psmouse, "cytp->tp_metrics_supported = %d\n", cytp->tp_metrics_supported); @@ -258,6 +265,9 @@ static int cypress_read_tp_metrics(struct psmouse *psmouse) cytp->tp_res_x = cytp->tp_max_abs_x / cytp->tp_width; cytp->tp_res_y = cytp->tp_max_abs_y / cytp->tp_high; + if (!cytp->tp_metrics_supported) + return 0; + memset(param, 0, sizeof(param)); if (cypress_send_ext_cmd(psmouse, CYTP_CMD_READ_TP_METRICS, param) == 0) { /* Update trackpad parameters. */ @@ -315,18 +325,15 @@ static int cypress_read_tp_metrics(struct psmouse *psmouse) static int cypress_query_hardware(struct psmouse *psmouse) { - struct cytp_data *cytp = psmouse->private; int ret; ret = cypress_read_fw_version(psmouse); if (ret) return ret; - if (cytp->tp_metrics_supported) { - ret = cypress_read_tp_metrics(psmouse); - if (ret) - return ret; - } + ret = cypress_read_tp_metrics(psmouse); + if (ret) + return ret; return 0; } diff --git a/drivers/input/tablet/wacom_wac.c b/drivers/input/tablet/wacom_wac.c index 41b6fbf60112..1daa97913b7d 100644 --- a/drivers/input/tablet/wacom_wac.c +++ b/drivers/input/tablet/wacom_wac.c @@ -2017,6 +2017,9 @@ static const struct wacom_features wacom_features_0x100 = static const struct wacom_features wacom_features_0x101 = { "Wacom ISDv4 101", WACOM_PKGLEN_MTTPC, 26202, 16325, 255, 0, MTTPC, WACOM_INTUOS_RES, WACOM_INTUOS_RES }; +static const struct wacom_features wacom_features_0x10D = + { "Wacom ISDv4 10D", WACOM_PKGLEN_MTTPC, 26202, 16325, 255, + 0, MTTPC, WACOM_INTUOS_RES, WACOM_INTUOS_RES }; static const struct wacom_features wacom_features_0x4001 = { "Wacom ISDv4 4001", WACOM_PKGLEN_MTTPC, 26202, 16325, 255, 0, MTTPC, WACOM_INTUOS_RES, WACOM_INTUOS_RES }; @@ -2201,6 +2204,7 @@ const struct usb_device_id wacom_ids[] = { { USB_DEVICE_WACOM(0xEF) }, { USB_DEVICE_WACOM(0x100) }, { USB_DEVICE_WACOM(0x101) }, + { USB_DEVICE_WACOM(0x10D) }, { USB_DEVICE_WACOM(0x4001) }, { USB_DEVICE_WACOM(0x47) }, { USB_DEVICE_WACOM(0xF4) }, diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c index 4f702b3ec1a3..434c3df250ca 100644 --- a/drivers/input/touchscreen/ads7846.c +++ b/drivers/input/touchscreen/ads7846.c @@ -236,7 +236,12 @@ static void __ads7846_disable(struct ads7846 *ts) /* Must be called with ts->lock held */ static void __ads7846_enable(struct ads7846 *ts) { - regulator_enable(ts->reg); + int error; + + error = regulator_enable(ts->reg); + if (error != 0) + dev_err(&ts->spi->dev, "Failed to enable supply: %d\n", error); + ads7846_restart(ts); } diff --git a/drivers/input/touchscreen/mms114.c b/drivers/input/touchscreen/mms114.c index 4a29ddf6bf1e..1443532fe6c4 100644 --- a/drivers/input/touchscreen/mms114.c +++ b/drivers/input/touchscreen/mms114.c @@ -314,15 +314,27 @@ static int mms114_start(struct mms114_data *data) struct i2c_client *client = data->client; int error; - if (data->core_reg) - regulator_enable(data->core_reg); - if (data->io_reg) - regulator_enable(data->io_reg); + error = regulator_enable(data->core_reg); + if (error) { + dev_err(&client->dev, "Failed to enable avdd: %d\n", error); + return error; + } + + error = regulator_enable(data->io_reg); + if (error) { + dev_err(&client->dev, "Failed to enable vdd: %d\n", error); + regulator_disable(data->core_reg); + return error; + } + mdelay(MMS114_POWERON_DELAY); error = mms114_setup_regs(data); - if (error < 0) + if (error < 0) { + regulator_disable(data->io_reg); + regulator_disable(data->core_reg); return error; + } if (data->pdata->cfg_pin) data->pdata->cfg_pin(true); @@ -335,16 +347,20 @@ static int mms114_start(struct mms114_data *data) static void mms114_stop(struct mms114_data *data) { struct i2c_client *client = data->client; + int error; disable_irq(client->irq); if (data->pdata->cfg_pin) data->pdata->cfg_pin(false); - if (data->io_reg) - regulator_disable(data->io_reg); - if (data->core_reg) - regulator_disable(data->core_reg); + error = regulator_disable(data->io_reg); + if (error) + dev_warn(&client->dev, "Failed to disable vdd: %d\n", error); + + error = regulator_disable(data->core_reg); + if (error) + dev_warn(&client->dev, "Failed to disable avdd: %d\n", error); } static int mms114_input_open(struct input_dev *dev) diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index 5c514d0711d1..c332fb98480d 100644 --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -130,7 +130,7 @@ config IRQ_REMAP # OMAP IOMMU support config OMAP_IOMMU bool "OMAP IOMMU Support" - depends on ARCH_OMAP + depends on ARCH_OMAP2PLUS select IOMMU_API config OMAP_IOVMM diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c index 98f555dafb55..b287ca33833d 100644 --- a/drivers/iommu/amd_iommu.c +++ b/drivers/iommu/amd_iommu.c @@ -2466,18 +2466,16 @@ static int device_change_notifier(struct notifier_block *nb, /* allocate a protection domain if a device is added */ dma_domain = find_protection_domain(devid); - if (dma_domain) - goto out; - dma_domain = dma_ops_domain_alloc(); - if (!dma_domain) - goto out; - dma_domain->target_dev = devid; - - spin_lock_irqsave(&iommu_pd_list_lock, flags); - list_add_tail(&dma_domain->list, &iommu_pd_list); - spin_unlock_irqrestore(&iommu_pd_list_lock, flags); - - dev_data = get_dev_data(dev); + if (!dma_domain) { + dma_domain = dma_ops_domain_alloc(); + if (!dma_domain) + goto out; + dma_domain->target_dev = devid; + + spin_lock_irqsave(&iommu_pd_list_lock, flags); + list_add_tail(&dma_domain->list, &iommu_pd_list); + spin_unlock_irqrestore(&iommu_pd_list_lock, flags); + } dev->archdata.dma_ops = &amd_iommu_dma_ops; diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c index b6ecddb63cd0..e3c2d74b7684 100644 --- a/drivers/iommu/amd_iommu_init.c +++ b/drivers/iommu/amd_iommu_init.c @@ -980,7 +980,7 @@ static void __init free_iommu_all(void) * BIOS should disable L2B micellaneous clock gating by setting * L2_L2B_CK_GATE_CONTROL[CKGateL2BMiscDisable](D0F2xF4_x90[2]) = 1b */ -static void __init amd_iommu_erratum_746_workaround(struct amd_iommu *iommu) +static void amd_iommu_erratum_746_workaround(struct amd_iommu *iommu) { u32 value; diff --git a/drivers/iommu/irq_remapping.c b/drivers/iommu/irq_remapping.c index d56f8c17c5fe..7c11ff368d07 100644 --- a/drivers/iommu/irq_remapping.c +++ b/drivers/iommu/irq_remapping.c @@ -2,7 +2,6 @@ #include <linux/cpumask.h> #include <linux/kernel.h> #include <linux/string.h> -#include <linux/cpumask.h> #include <linux/errno.h> #include <linux/msi.h> #include <linux/irq.h> diff --git a/drivers/irqchip/exynos-combiner.c b/drivers/irqchip/exynos-combiner.c index 04d86a9803f4..6a5201351507 100644 --- a/drivers/irqchip/exynos-combiner.c +++ b/drivers/irqchip/exynos-combiner.c @@ -13,6 +13,7 @@ #include <linux/init.h> #include <linux/io.h> #include <linux/irqdomain.h> +#include <linux/irqchip/chained_irq.h> #include <linux/of_address.h> #include <linux/of_irq.h> #include <asm/mach/irq.h> diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 644d72468423..add1fd84fc4b 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -28,6 +28,7 @@ #include <linux/module.h> #include <linux/list.h> #include <linux/smp.h> +#include <linux/cpu.h> #include <linux/cpu_pm.h> #include <linux/cpumask.h> #include <linux/io.h> @@ -38,12 +39,12 @@ #include <linux/interrupt.h> #include <linux/percpu.h> #include <linux/slab.h> +#include <linux/irqchip/chained_irq.h> #include <linux/irqchip/arm-gic.h> #include <asm/irq.h> #include <asm/exception.h> #include <asm/smp_plat.h> -#include <asm/mach/irq.h> #include "irqchip.h" @@ -323,7 +324,7 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) cascade_irq = irq_find_mapping(chip_data->domain, gic_irq); if (unlikely(gic_irq < 32 || gic_irq > 1020)) - do_bad_IRQ(cascade_irq, desc); + handle_bad_irq(cascade_irq, desc); else generic_handle_irq(cascade_irq); @@ -648,7 +649,7 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) /* Convert our logical CPU mask into a physical one. */ for_each_cpu(cpu, mask) - map |= 1 << cpu_logical_map(cpu); + map |= gic_cpu_map[cpu]; /* * Ensure that stores to Normal memory are visible to the @@ -699,6 +700,25 @@ static int gic_irq_domain_xlate(struct irq_domain *d, return 0; } +#ifdef CONFIG_SMP +static int __cpuinit gic_secondary_init(struct notifier_block *nfb, + unsigned long action, void *hcpu) +{ + if (action == CPU_STARTING) + gic_cpu_init(&gic_data[0]); + return NOTIFY_OK; +} + +/* + * Notifier for enabling the GIC CPU interface. Set an arbitrarily high + * priority because the GIC needs to be up before the ARM generic timers. + */ +static struct notifier_block __cpuinitdata gic_cpu_notifier = { + .notifier_call = gic_secondary_init, + .priority = 100, +}; +#endif + const struct irq_domain_ops gic_irq_domain_ops = { .map = gic_irq_domain_map, .xlate = gic_irq_domain_xlate, @@ -789,6 +809,7 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, #ifdef CONFIG_SMP set_smp_cross_call(gic_raise_softirq); + register_cpu_notifier(&gic_cpu_notifier); #endif set_handle_irq(gic_handle_irq); @@ -799,13 +820,6 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, gic_pm_init(gic); } -void __cpuinit gic_secondary_init(unsigned int gic_nr) -{ - BUG_ON(gic_nr >= MAX_GIC_NR); - - gic_cpu_init(&gic_data[gic_nr]); -} - #ifdef CONFIG_OF static int gic_cnt __initdata = 0; diff --git a/drivers/irqchip/irq-vic.c b/drivers/irqchip/irq-vic.c index 3cf97aaebe40..884d11c7355f 100644 --- a/drivers/irqchip/irq-vic.c +++ b/drivers/irqchip/irq-vic.c @@ -23,6 +23,7 @@ #include <linux/init.h> #include <linux/list.h> #include <linux/io.h> +#include <linux/irq.h> #include <linux/irqdomain.h> #include <linux/of.h> #include <linux/of_address.h> @@ -33,7 +34,7 @@ #include <linux/irqchip/arm-vic.h> #include <asm/exception.h> -#include <asm/mach/irq.h> +#include <asm/irq.h> #include "irqchip.h" diff --git a/drivers/isdn/hisax/Kconfig b/drivers/isdn/hisax/Kconfig index 5313c9ea44dc..d9edcc94c2a8 100644 --- a/drivers/isdn/hisax/Kconfig +++ b/drivers/isdn/hisax/Kconfig @@ -237,7 +237,8 @@ config HISAX_MIC config HISAX_NETJET bool "NETjet card" - depends on PCI && (BROKEN || !(SPARC || PPC || PARISC || M68K || (MIPS && !CPU_LITTLE_ENDIAN) || FRV || (XTENSA && !CPU_LITTLE_ENDIAN))) + depends on PCI && (BROKEN || !(PPC || PARISC || M68K || (MIPS && !CPU_LITTLE_ENDIAN) || FRV || (XTENSA && !CPU_LITTLE_ENDIAN))) + depends on VIRT_TO_BUS help This enables HiSax support for the NetJet from Traverse Technologies. @@ -248,7 +249,8 @@ config HISAX_NETJET config HISAX_NETJET_U bool "NETspider U card" - depends on PCI && (BROKEN || !(SPARC || PPC || PARISC || M68K || (MIPS && !CPU_LITTLE_ENDIAN) || FRV || (XTENSA && !CPU_LITTLE_ENDIAN))) + depends on PCI && (BROKEN || !(PPC || PARISC || M68K || (MIPS && !CPU_LITTLE_ENDIAN) || FRV || (XTENSA && !CPU_LITTLE_ENDIAN))) + depends on VIRT_TO_BUS help This enables HiSax support for the Netspider U interface ISDN card from Traverse Technologies. diff --git a/drivers/isdn/i4l/isdn_tty.c b/drivers/isdn/i4l/isdn_tty.c index d8a7d8323414..ebaebdf30f98 100644 --- a/drivers/isdn/i4l/isdn_tty.c +++ b/drivers/isdn/i4l/isdn_tty.c @@ -902,7 +902,9 @@ isdn_tty_send_msg(modem_info *info, atemu *m, char *msg) int j; int l; - l = strlen(msg); + l = min(strlen(msg), sizeof(cmd.parm) - sizeof(cmd.parm.cmsg) + + sizeof(cmd.parm.cmsg.para) - 2); + if (!l) { isdn_tty_modem_result(RESULT_ERROR, info); return; diff --git a/drivers/md/dm-bufio.c b/drivers/md/dm-bufio.c index 3c955e10a618..c6083132c4b8 100644 --- a/drivers/md/dm-bufio.c +++ b/drivers/md/dm-bufio.c @@ -1025,6 +1025,8 @@ void dm_bufio_prefetch(struct dm_bufio_client *c, { struct blk_plug plug; + BUG_ON(dm_bufio_in_request()); + blk_start_plug(&plug); dm_bufio_lock(c); diff --git a/drivers/md/dm-cache-metadata.c b/drivers/md/dm-cache-metadata.c index fbd3625f2748..83e995fece88 100644 --- a/drivers/md/dm-cache-metadata.c +++ b/drivers/md/dm-cache-metadata.c @@ -83,6 +83,8 @@ struct cache_disk_superblock { __le32 read_misses; __le32 write_hits; __le32 write_misses; + + __le32 policy_version[CACHE_POLICY_VERSION_SIZE]; } __packed; struct dm_cache_metadata { @@ -109,6 +111,7 @@ struct dm_cache_metadata { bool clean_when_opened:1; char policy_name[CACHE_POLICY_NAME_SIZE]; + unsigned policy_version[CACHE_POLICY_VERSION_SIZE]; size_t policy_hint_size; struct dm_cache_statistics stats; }; @@ -268,7 +271,8 @@ static int __write_initial_superblock(struct dm_cache_metadata *cmd) memset(disk_super->uuid, 0, sizeof(disk_super->uuid)); disk_super->magic = cpu_to_le64(CACHE_SUPERBLOCK_MAGIC); disk_super->version = cpu_to_le32(CACHE_VERSION); - memset(disk_super->policy_name, 0, CACHE_POLICY_NAME_SIZE); + memset(disk_super->policy_name, 0, sizeof(disk_super->policy_name)); + memset(disk_super->policy_version, 0, sizeof(disk_super->policy_version)); disk_super->policy_hint_size = 0; r = dm_sm_copy_root(cmd->metadata_sm, &disk_super->metadata_space_map_root, @@ -284,7 +288,6 @@ static int __write_initial_superblock(struct dm_cache_metadata *cmd) disk_super->metadata_block_size = cpu_to_le32(DM_CACHE_METADATA_BLOCK_SIZE >> SECTOR_SHIFT); disk_super->data_block_size = cpu_to_le32(cmd->data_block_size); disk_super->cache_blocks = cpu_to_le32(0); - memset(disk_super->policy_name, 0, sizeof(disk_super->policy_name)); disk_super->read_hits = cpu_to_le32(0); disk_super->read_misses = cpu_to_le32(0); @@ -478,6 +481,9 @@ static void read_superblock_fields(struct dm_cache_metadata *cmd, cmd->data_block_size = le32_to_cpu(disk_super->data_block_size); cmd->cache_blocks = to_cblock(le32_to_cpu(disk_super->cache_blocks)); strncpy(cmd->policy_name, disk_super->policy_name, sizeof(cmd->policy_name)); + cmd->policy_version[0] = le32_to_cpu(disk_super->policy_version[0]); + cmd->policy_version[1] = le32_to_cpu(disk_super->policy_version[1]); + cmd->policy_version[2] = le32_to_cpu(disk_super->policy_version[2]); cmd->policy_hint_size = le32_to_cpu(disk_super->policy_hint_size); cmd->stats.read_hits = le32_to_cpu(disk_super->read_hits); @@ -572,6 +578,9 @@ static int __commit_transaction(struct dm_cache_metadata *cmd, disk_super->discard_nr_blocks = cpu_to_le64(from_dblock(cmd->discard_nr_blocks)); disk_super->cache_blocks = cpu_to_le32(from_cblock(cmd->cache_blocks)); strncpy(disk_super->policy_name, cmd->policy_name, sizeof(disk_super->policy_name)); + disk_super->policy_version[0] = cpu_to_le32(cmd->policy_version[0]); + disk_super->policy_version[1] = cpu_to_le32(cmd->policy_version[1]); + disk_super->policy_version[2] = cpu_to_le32(cmd->policy_version[2]); disk_super->read_hits = cpu_to_le32(cmd->stats.read_hits); disk_super->read_misses = cpu_to_le32(cmd->stats.read_misses); @@ -854,18 +863,43 @@ struct thunk { bool hints_valid; }; +static bool policy_unchanged(struct dm_cache_metadata *cmd, + struct dm_cache_policy *policy) +{ + const char *policy_name = dm_cache_policy_get_name(policy); + const unsigned *policy_version = dm_cache_policy_get_version(policy); + size_t policy_hint_size = dm_cache_policy_get_hint_size(policy); + + /* + * Ensure policy names match. + */ + if (strncmp(cmd->policy_name, policy_name, sizeof(cmd->policy_name))) + return false; + + /* + * Ensure policy major versions match. + */ + if (cmd->policy_version[0] != policy_version[0]) + return false; + + /* + * Ensure policy hint sizes match. + */ + if (cmd->policy_hint_size != policy_hint_size) + return false; + + return true; +} + static bool hints_array_initialized(struct dm_cache_metadata *cmd) { return cmd->hint_root && cmd->policy_hint_size; } static bool hints_array_available(struct dm_cache_metadata *cmd, - const char *policy_name) + struct dm_cache_policy *policy) { - bool policy_names_match = !strncmp(cmd->policy_name, policy_name, - sizeof(cmd->policy_name)); - - return cmd->clean_when_opened && policy_names_match && + return cmd->clean_when_opened && policy_unchanged(cmd, policy) && hints_array_initialized(cmd); } @@ -899,7 +933,8 @@ static int __load_mapping(void *context, uint64_t cblock, void *leaf) return r; } -static int __load_mappings(struct dm_cache_metadata *cmd, const char *policy_name, +static int __load_mappings(struct dm_cache_metadata *cmd, + struct dm_cache_policy *policy, load_mapping_fn fn, void *context) { struct thunk thunk; @@ -909,18 +944,19 @@ static int __load_mappings(struct dm_cache_metadata *cmd, const char *policy_nam thunk.cmd = cmd; thunk.respect_dirty_flags = cmd->clean_when_opened; - thunk.hints_valid = hints_array_available(cmd, policy_name); + thunk.hints_valid = hints_array_available(cmd, policy); return dm_array_walk(&cmd->info, cmd->root, __load_mapping, &thunk); } -int dm_cache_load_mappings(struct dm_cache_metadata *cmd, const char *policy_name, +int dm_cache_load_mappings(struct dm_cache_metadata *cmd, + struct dm_cache_policy *policy, load_mapping_fn fn, void *context) { int r; down_read(&cmd->root_lock); - r = __load_mappings(cmd, policy_name, fn, context); + r = __load_mappings(cmd, policy, fn, context); up_read(&cmd->root_lock); return r; @@ -979,7 +1015,7 @@ static int __dirty(struct dm_cache_metadata *cmd, dm_cblock_t cblock, bool dirty /* nothing to be done */ return 0; - value = pack_value(oblock, flags | (dirty ? M_DIRTY : 0)); + value = pack_value(oblock, (flags & ~M_DIRTY) | (dirty ? M_DIRTY : 0)); __dm_bless_for_disk(&value); r = dm_array_set_value(&cmd->info, cmd->root, from_cblock(cblock), @@ -1070,13 +1106,15 @@ static int begin_hints(struct dm_cache_metadata *cmd, struct dm_cache_policy *po __le32 value; size_t hint_size; const char *policy_name = dm_cache_policy_get_name(policy); + const unsigned *policy_version = dm_cache_policy_get_version(policy); if (!policy_name[0] || (strlen(policy_name) > sizeof(cmd->policy_name) - 1)) return -EINVAL; - if (strcmp(cmd->policy_name, policy_name)) { + if (!policy_unchanged(cmd, policy)) { strncpy(cmd->policy_name, policy_name, sizeof(cmd->policy_name)); + memcpy(cmd->policy_version, policy_version, sizeof(cmd->policy_version)); hint_size = dm_cache_policy_get_hint_size(policy); if (!hint_size) diff --git a/drivers/md/dm-cache-metadata.h b/drivers/md/dm-cache-metadata.h index 135864ea0eee..f45cef21f3d0 100644 --- a/drivers/md/dm-cache-metadata.h +++ b/drivers/md/dm-cache-metadata.h @@ -89,7 +89,7 @@ typedef int (*load_mapping_fn)(void *context, dm_oblock_t oblock, dm_cblock_t cblock, bool dirty, uint32_t hint, bool hint_valid); int dm_cache_load_mappings(struct dm_cache_metadata *cmd, - const char *policy_name, + struct dm_cache_policy *policy, load_mapping_fn fn, void *context); diff --git a/drivers/md/dm-cache-policy-cleaner.c b/drivers/md/dm-cache-policy-cleaner.c index cc05d70b3cb8..b04d1f904d07 100644 --- a/drivers/md/dm-cache-policy-cleaner.c +++ b/drivers/md/dm-cache-policy-cleaner.c @@ -17,7 +17,6 @@ /*----------------------------------------------------------------*/ #define DM_MSG_PREFIX "cache cleaner" -#define CLEANER_VERSION "1.0.0" /* Cache entry struct. */ struct wb_cache_entry { @@ -434,6 +433,7 @@ static struct dm_cache_policy *wb_create(dm_cblock_t cache_size, static struct dm_cache_policy_type wb_policy_type = { .name = "cleaner", + .version = {1, 0, 0}, .hint_size = 0, .owner = THIS_MODULE, .create = wb_create @@ -446,7 +446,10 @@ static int __init wb_init(void) if (r < 0) DMERR("register failed %d", r); else - DMINFO("version " CLEANER_VERSION " loaded"); + DMINFO("version %u.%u.%u loaded", + wb_policy_type.version[0], + wb_policy_type.version[1], + wb_policy_type.version[2]); return r; } diff --git a/drivers/md/dm-cache-policy-internal.h b/drivers/md/dm-cache-policy-internal.h index 52a75beeced5..0928abdc49f0 100644 --- a/drivers/md/dm-cache-policy-internal.h +++ b/drivers/md/dm-cache-policy-internal.h @@ -117,6 +117,8 @@ void dm_cache_policy_destroy(struct dm_cache_policy *p); */ const char *dm_cache_policy_get_name(struct dm_cache_policy *p); +const unsigned *dm_cache_policy_get_version(struct dm_cache_policy *p); + size_t dm_cache_policy_get_hint_size(struct dm_cache_policy *p); /*----------------------------------------------------------------*/ diff --git a/drivers/md/dm-cache-policy-mq.c b/drivers/md/dm-cache-policy-mq.c index 964153255076..dc112a7137fe 100644 --- a/drivers/md/dm-cache-policy-mq.c +++ b/drivers/md/dm-cache-policy-mq.c @@ -14,7 +14,6 @@ #include <linux/vmalloc.h> #define DM_MSG_PREFIX "cache-policy-mq" -#define MQ_VERSION "1.0.0" static struct kmem_cache *mq_entry_cache; @@ -1133,6 +1132,7 @@ bad_cache_alloc: static struct dm_cache_policy_type mq_policy_type = { .name = "mq", + .version = {1, 0, 0}, .hint_size = 4, .owner = THIS_MODULE, .create = mq_create @@ -1140,6 +1140,7 @@ static struct dm_cache_policy_type mq_policy_type = { static struct dm_cache_policy_type default_policy_type = { .name = "default", + .version = {1, 0, 0}, .hint_size = 4, .owner = THIS_MODULE, .create = mq_create @@ -1164,7 +1165,10 @@ static int __init mq_init(void) r = dm_cache_policy_register(&default_policy_type); if (!r) { - DMINFO("version " MQ_VERSION " loaded"); + DMINFO("version %u.%u.%u loaded", + mq_policy_type.version[0], + mq_policy_type.version[1], + mq_policy_type.version[2]); return 0; } diff --git a/drivers/md/dm-cache-policy.c b/drivers/md/dm-cache-policy.c index 2cbf5fdaac52..21c03c570c06 100644 --- a/drivers/md/dm-cache-policy.c +++ b/drivers/md/dm-cache-policy.c @@ -150,6 +150,14 @@ const char *dm_cache_policy_get_name(struct dm_cache_policy *p) } EXPORT_SYMBOL_GPL(dm_cache_policy_get_name); +const unsigned *dm_cache_policy_get_version(struct dm_cache_policy *p) +{ + struct dm_cache_policy_type *t = p->private; + + return t->version; +} +EXPORT_SYMBOL_GPL(dm_cache_policy_get_version); + size_t dm_cache_policy_get_hint_size(struct dm_cache_policy *p) { struct dm_cache_policy_type *t = p->private; diff --git a/drivers/md/dm-cache-policy.h b/drivers/md/dm-cache-policy.h index f0f51b260544..558bdfdabf5f 100644 --- a/drivers/md/dm-cache-policy.h +++ b/drivers/md/dm-cache-policy.h @@ -196,6 +196,7 @@ struct dm_cache_policy { * We maintain a little register of the different policy types. */ #define CACHE_POLICY_NAME_SIZE 16 +#define CACHE_POLICY_VERSION_SIZE 3 struct dm_cache_policy_type { /* For use by the register code only. */ @@ -206,6 +207,7 @@ struct dm_cache_policy_type { * what gets passed on the target line to select your policy. */ char name[CACHE_POLICY_NAME_SIZE]; + unsigned version[CACHE_POLICY_VERSION_SIZE]; /* * Policies may store a hint for each each cache block. diff --git a/drivers/md/dm-cache-target.c b/drivers/md/dm-cache-target.c index 0f4e84b15c30..66120bd46d15 100644 --- a/drivers/md/dm-cache-target.c +++ b/drivers/md/dm-cache-target.c @@ -142,6 +142,7 @@ struct cache { spinlock_t lock; struct bio_list deferred_bios; struct bio_list deferred_flush_bios; + struct bio_list deferred_writethrough_bios; struct list_head quiesced_migrations; struct list_head completed_migrations; struct list_head need_commit_migrations; @@ -158,7 +159,7 @@ struct cache { /* * origin_blocks entries, discarded if set. */ - sector_t discard_block_size; /* a power of 2 times sectors per block */ + uint32_t discard_block_size; /* a power of 2 times sectors per block */ dm_dblock_t discard_nr_blocks; unsigned long *discard_bitset; @@ -199,6 +200,11 @@ struct per_bio_data { bool tick:1; unsigned req_nr:2; struct dm_deferred_entry *all_io_entry; + + /* writethrough fields */ + struct cache *cache; + dm_cblock_t cblock; + bio_end_io_t *saved_bi_end_io; }; struct dm_cache_migration { @@ -412,17 +418,24 @@ static bool block_size_is_power_of_two(struct cache *cache) return cache->sectors_per_block_shift >= 0; } +static dm_block_t block_div(dm_block_t b, uint32_t n) +{ + do_div(b, n); + + return b; +} + static dm_dblock_t oblock_to_dblock(struct cache *cache, dm_oblock_t oblock) { - sector_t discard_blocks = cache->discard_block_size; + uint32_t discard_blocks = cache->discard_block_size; dm_block_t b = from_oblock(oblock); if (!block_size_is_power_of_two(cache)) - (void) sector_div(discard_blocks, cache->sectors_per_block); + discard_blocks = discard_blocks / cache->sectors_per_block; else discard_blocks >>= cache->sectors_per_block_shift; - (void) sector_div(b, discard_blocks); + b = block_div(b, discard_blocks); return to_dblock(b); } @@ -609,6 +622,56 @@ static void issue(struct cache *cache, struct bio *bio) spin_unlock_irqrestore(&cache->lock, flags); } +static void defer_writethrough_bio(struct cache *cache, struct bio *bio) +{ + unsigned long flags; + + spin_lock_irqsave(&cache->lock, flags); + bio_list_add(&cache->deferred_writethrough_bios, bio); + spin_unlock_irqrestore(&cache->lock, flags); + + wake_worker(cache); +} + +static void writethrough_endio(struct bio *bio, int err) +{ + struct per_bio_data *pb = get_per_bio_data(bio); + bio->bi_end_io = pb->saved_bi_end_io; + + if (err) { + bio_endio(bio, err); + return; + } + + remap_to_cache(pb->cache, bio, pb->cblock); + + /* + * We can't issue this bio directly, since we're in interrupt + * context. So it get's put on a bio list for processing by the + * worker thread. + */ + defer_writethrough_bio(pb->cache, bio); +} + +/* + * When running in writethrough mode we need to send writes to clean blocks + * to both the cache and origin devices. In future we'd like to clone the + * bio and send them in parallel, but for now we're doing them in + * series as this is easier. + */ +static void remap_to_origin_then_cache(struct cache *cache, struct bio *bio, + dm_oblock_t oblock, dm_cblock_t cblock) +{ + struct per_bio_data *pb = get_per_bio_data(bio); + + pb->cache = cache; + pb->cblock = cblock; + pb->saved_bi_end_io = bio->bi_end_io; + bio->bi_end_io = writethrough_endio; + + remap_to_origin_clear_discard(pb->cache, bio, oblock); +} + /*---------------------------------------------------------------- * Migration processing * @@ -1002,7 +1065,7 @@ static void process_discard_bio(struct cache *cache, struct bio *bio) dm_block_t end_block = bio->bi_sector + bio_sectors(bio); dm_block_t b; - (void) sector_div(end_block, cache->discard_block_size); + end_block = block_div(end_block, cache->discard_block_size); for (b = start_block; b < end_block; b++) set_discard(cache, to_dblock(b)); @@ -1070,14 +1133,9 @@ static void process_bio(struct cache *cache, struct prealloc *structs, inc_hit_counter(cache, bio); pb->all_io_entry = dm_deferred_entry_inc(cache->all_io_ds); - if (is_writethrough_io(cache, bio, lookup_result.cblock)) { - /* - * No need to mark anything dirty in write through mode. - */ - pb->req_nr == 0 ? - remap_to_cache(cache, bio, lookup_result.cblock) : - remap_to_origin_clear_discard(cache, bio, block); - } else + if (is_writethrough_io(cache, bio, lookup_result.cblock)) + remap_to_origin_then_cache(cache, bio, block, lookup_result.cblock); + else remap_to_cache_dirty(cache, bio, block, lookup_result.cblock); issue(cache, bio); @@ -1086,17 +1144,8 @@ static void process_bio(struct cache *cache, struct prealloc *structs, case POLICY_MISS: inc_miss_counter(cache, bio); pb->all_io_entry = dm_deferred_entry_inc(cache->all_io_ds); - - if (pb->req_nr != 0) { - /* - * This is a duplicate writethrough io that is no - * longer needed because the block has been demoted. - */ - bio_endio(bio, 0); - } else { - remap_to_origin_clear_discard(cache, bio, block); - issue(cache, bio); - } + remap_to_origin_clear_discard(cache, bio, block); + issue(cache, bio); break; case POLICY_NEW: @@ -1217,6 +1266,23 @@ static void process_deferred_flush_bios(struct cache *cache, bool submit_bios) submit_bios ? generic_make_request(bio) : bio_io_error(bio); } +static void process_deferred_writethrough_bios(struct cache *cache) +{ + unsigned long flags; + struct bio_list bios; + struct bio *bio; + + bio_list_init(&bios); + + spin_lock_irqsave(&cache->lock, flags); + bio_list_merge(&bios, &cache->deferred_writethrough_bios); + bio_list_init(&cache->deferred_writethrough_bios); + spin_unlock_irqrestore(&cache->lock, flags); + + while ((bio = bio_list_pop(&bios))) + generic_make_request(bio); +} + static void writeback_some_dirty_blocks(struct cache *cache) { int r = 0; @@ -1313,6 +1379,7 @@ static int more_work(struct cache *cache) else return !bio_list_empty(&cache->deferred_bios) || !bio_list_empty(&cache->deferred_flush_bios) || + !bio_list_empty(&cache->deferred_writethrough_bios) || !list_empty(&cache->quiesced_migrations) || !list_empty(&cache->completed_migrations) || !list_empty(&cache->need_commit_migrations); @@ -1331,6 +1398,8 @@ static void do_worker(struct work_struct *ws) writeback_some_dirty_blocks(cache); + process_deferred_writethrough_bios(cache); + if (commit_if_needed(cache)) { process_deferred_flush_bios(cache, false); @@ -1756,8 +1825,11 @@ static int create_cache_policy(struct cache *cache, struct cache_args *ca, } r = set_config_values(cache->policy, ca->policy_argc, ca->policy_argv); - if (r) + if (r) { + *error = "Error setting cache policy's config values"; dm_cache_policy_destroy(cache->policy); + cache->policy = NULL; + } return r; } @@ -1793,8 +1865,6 @@ static sector_t calculate_discard_block_size(sector_t cache_block_size, #define DEFAULT_MIGRATION_THRESHOLD (2048 * 100) -static unsigned cache_num_write_bios(struct dm_target *ti, struct bio *bio); - static int cache_create(struct cache_args *ca, struct cache **result) { int r = 0; @@ -1821,9 +1891,6 @@ static int cache_create(struct cache_args *ca, struct cache **result) memcpy(&cache->features, &ca->features, sizeof(cache->features)); - if (cache->features.write_through) - ti->num_write_bios = cache_num_write_bios; - cache->callbacks.congested_fn = cache_is_congested; dm_table_add_target_callbacks(ti->table, &cache->callbacks); @@ -1835,7 +1902,7 @@ static int cache_create(struct cache_args *ca, struct cache **result) /* FIXME: factor out this whole section */ origin_blocks = cache->origin_sectors = ca->origin_sectors; - (void) sector_div(origin_blocks, ca->block_size); + origin_blocks = block_div(origin_blocks, ca->block_size); cache->origin_blocks = to_oblock(origin_blocks); cache->sectors_per_block = ca->block_size; @@ -1848,7 +1915,7 @@ static int cache_create(struct cache_args *ca, struct cache **result) dm_block_t cache_size = ca->cache_sectors; cache->sectors_per_block_shift = -1; - (void) sector_div(cache_size, ca->block_size); + cache_size = block_div(cache_size, ca->block_size); cache->cache_size = to_cblock(cache_size); } else { cache->sectors_per_block_shift = __ffs(ca->block_size); @@ -1873,6 +1940,7 @@ static int cache_create(struct cache_args *ca, struct cache **result) spin_lock_init(&cache->lock); bio_list_init(&cache->deferred_bios); bio_list_init(&cache->deferred_flush_bios); + bio_list_init(&cache->deferred_writethrough_bios); INIT_LIST_HEAD(&cache->quiesced_migrations); INIT_LIST_HEAD(&cache->completed_migrations); INIT_LIST_HEAD(&cache->need_commit_migrations); @@ -2002,6 +2070,8 @@ static int cache_ctr(struct dm_target *ti, unsigned argc, char **argv) goto out; r = cache_create(ca, &cache); + if (r) + goto out; r = copy_ctr_args(cache, argc - 3, (const char **)argv + 3); if (r) { @@ -2016,20 +2086,6 @@ out: return r; } -static unsigned cache_num_write_bios(struct dm_target *ti, struct bio *bio) -{ - int r; - struct cache *cache = ti->private; - dm_oblock_t block = get_bio_block(cache, bio); - dm_cblock_t cblock; - - r = policy_lookup(cache->policy, block, &cblock); - if (r < 0) - return 2; /* assume the worst */ - - return (!r && !is_dirty(cache, cblock)) ? 2 : 1; -} - static int cache_map(struct dm_target *ti, struct bio *bio) { struct cache *cache = ti->private; @@ -2097,18 +2153,12 @@ static int cache_map(struct dm_target *ti, struct bio *bio) inc_hit_counter(cache, bio); pb->all_io_entry = dm_deferred_entry_inc(cache->all_io_ds); - if (is_writethrough_io(cache, bio, lookup_result.cblock)) { - /* - * No need to mark anything dirty in write through mode. - */ - pb->req_nr == 0 ? - remap_to_cache(cache, bio, lookup_result.cblock) : - remap_to_origin_clear_discard(cache, bio, block); - cell_defer(cache, cell, false); - } else { + if (is_writethrough_io(cache, bio, lookup_result.cblock)) + remap_to_origin_then_cache(cache, bio, block, lookup_result.cblock); + else remap_to_cache_dirty(cache, bio, block, lookup_result.cblock); - cell_defer(cache, cell, false); - } + + cell_defer(cache, cell, false); break; case POLICY_MISS: @@ -2319,8 +2369,7 @@ static int cache_preresume(struct dm_target *ti) } if (!cache->loaded_mappings) { - r = dm_cache_load_mappings(cache->cmd, - dm_cache_policy_get_name(cache->policy), + r = dm_cache_load_mappings(cache->cmd, cache->policy, load_mapping, cache); if (r) { DMERR("could not load cache mappings"); @@ -2535,7 +2584,7 @@ static void cache_io_hints(struct dm_target *ti, struct queue_limits *limits) static struct target_type cache_target = { .name = "cache", - .version = {1, 0, 0}, + .version = {1, 1, 0}, .module = THIS_MODULE, .ctr = cache_ctr, .dtr = cache_dtr, diff --git a/drivers/md/dm-thin.c b/drivers/md/dm-thin.c index 009339d62828..004ad1652b73 100644 --- a/drivers/md/dm-thin.c +++ b/drivers/md/dm-thin.c @@ -1577,6 +1577,11 @@ static bool data_dev_supports_discard(struct pool_c *pt) return q && blk_queue_discard(q); } +static bool is_factor(sector_t block_size, uint32_t n) +{ + return !sector_div(block_size, n); +} + /* * If discard_passdown was enabled verify that the data device * supports discards. Disable discard_passdown if not. @@ -1602,7 +1607,7 @@ static void disable_passdown_if_not_supported(struct pool_c *pt) else if (data_limits->discard_granularity > block_size) reason = "discard granularity larger than a block"; - else if (block_size & (data_limits->discard_granularity - 1)) + else if (!is_factor(block_size, data_limits->discard_granularity)) reason = "discard granularity not a factor of block size"; if (reason) { @@ -2544,7 +2549,7 @@ static struct target_type pool_target = { .name = "thin-pool", .features = DM_TARGET_SINGLETON | DM_TARGET_ALWAYS_WRITEABLE | DM_TARGET_IMMUTABLE, - .version = {1, 6, 1}, + .version = {1, 7, 0}, .module = THIS_MODULE, .ctr = pool_ctr, .dtr = pool_dtr, @@ -2831,7 +2836,7 @@ static int thin_iterate_devices(struct dm_target *ti, static struct target_type thin_target = { .name = "thin", - .version = {1, 7, 1}, + .version = {1, 8, 0}, .module = THIS_MODULE, .ctr = thin_ctr, .dtr = thin_dtr, diff --git a/drivers/md/dm-verity.c b/drivers/md/dm-verity.c index 6ad538375c3c..a746f1d21c66 100644 --- a/drivers/md/dm-verity.c +++ b/drivers/md/dm-verity.c @@ -93,6 +93,13 @@ struct dm_verity_io { */ }; +struct dm_verity_prefetch_work { + struct work_struct work; + struct dm_verity *v; + sector_t block; + unsigned n_blocks; +}; + static struct shash_desc *io_hash_desc(struct dm_verity *v, struct dm_verity_io *io) { return (struct shash_desc *)(io + 1); @@ -424,15 +431,18 @@ static void verity_end_io(struct bio *bio, int error) * The root buffer is not prefetched, it is assumed that it will be cached * all the time. */ -static void verity_prefetch_io(struct dm_verity *v, struct dm_verity_io *io) +static void verity_prefetch_io(struct work_struct *work) { + struct dm_verity_prefetch_work *pw = + container_of(work, struct dm_verity_prefetch_work, work); + struct dm_verity *v = pw->v; int i; for (i = v->levels - 2; i >= 0; i--) { sector_t hash_block_start; sector_t hash_block_end; - verity_hash_at_level(v, io->block, i, &hash_block_start, NULL); - verity_hash_at_level(v, io->block + io->n_blocks - 1, i, &hash_block_end, NULL); + verity_hash_at_level(v, pw->block, i, &hash_block_start, NULL); + verity_hash_at_level(v, pw->block + pw->n_blocks - 1, i, &hash_block_end, NULL); if (!i) { unsigned cluster = ACCESS_ONCE(dm_verity_prefetch_cluster); @@ -452,6 +462,25 @@ no_prefetch_cluster: dm_bufio_prefetch(v->bufio, hash_block_start, hash_block_end - hash_block_start + 1); } + + kfree(pw); +} + +static void verity_submit_prefetch(struct dm_verity *v, struct dm_verity_io *io) +{ + struct dm_verity_prefetch_work *pw; + + pw = kmalloc(sizeof(struct dm_verity_prefetch_work), + GFP_NOIO | __GFP_NORETRY | __GFP_NOMEMALLOC | __GFP_NOWARN); + + if (!pw) + return; + + INIT_WORK(&pw->work, verity_prefetch_io); + pw->v = v; + pw->block = io->block; + pw->n_blocks = io->n_blocks; + queue_work(v->verify_wq, &pw->work); } /* @@ -498,7 +527,7 @@ static int verity_map(struct dm_target *ti, struct bio *bio) memcpy(io->io_vec, bio_iovec(bio), io->io_vec_size * sizeof(struct bio_vec)); - verity_prefetch_io(v, io); + verity_submit_prefetch(v, io); generic_make_request(bio); @@ -858,7 +887,7 @@ bad: static struct target_type verity_target = { .name = "verity", - .version = {1, 1, 1}, + .version = {1, 2, 0}, .module = THIS_MODULE, .ctr = verity_ctr, .dtr = verity_dtr, diff --git a/drivers/md/md.c b/drivers/md/md.c index fcb878f88796..aeceedfc530b 100644 --- a/drivers/md/md.c +++ b/drivers/md/md.c @@ -7663,10 +7663,8 @@ static int remove_and_add_spares(struct mddev *mddev) removed++; } } - if (removed) - sysfs_notify(&mddev->kobj, NULL, - "degraded"); - + if (removed && mddev->kobj.sd) + sysfs_notify(&mddev->kobj, NULL, "degraded"); rdev_for_each(rdev, mddev) { if (rdev->raid_disk >= 0 && diff --git a/drivers/md/md.h b/drivers/md/md.h index eca59c3074ef..d90fb1a879e1 100644 --- a/drivers/md/md.h +++ b/drivers/md/md.h @@ -506,7 +506,7 @@ static inline char * mdname (struct mddev * mddev) static inline int sysfs_link_rdev(struct mddev *mddev, struct md_rdev *rdev) { char nm[20]; - if (!test_bit(Replacement, &rdev->flags)) { + if (!test_bit(Replacement, &rdev->flags) && mddev->kobj.sd) { sprintf(nm, "rd%d", rdev->raid_disk); return sysfs_create_link(&mddev->kobj, &rdev->kobj, nm); } else @@ -516,7 +516,7 @@ static inline int sysfs_link_rdev(struct mddev *mddev, struct md_rdev *rdev) static inline void sysfs_unlink_rdev(struct mddev *mddev, struct md_rdev *rdev) { char nm[20]; - if (!test_bit(Replacement, &rdev->flags)) { + if (!test_bit(Replacement, &rdev->flags) && mddev->kobj.sd) { sprintf(nm, "rd%d", rdev->raid_disk); sysfs_remove_link(&mddev->kobj, nm); } diff --git a/drivers/md/persistent-data/dm-btree-remove.c b/drivers/md/persistent-data/dm-btree-remove.c index c4f28133ef82..b88757cd0d1d 100644 --- a/drivers/md/persistent-data/dm-btree-remove.c +++ b/drivers/md/persistent-data/dm-btree-remove.c @@ -139,15 +139,8 @@ struct child { struct btree_node *n; }; -static struct dm_btree_value_type le64_type = { - .context = NULL, - .size = sizeof(__le64), - .inc = NULL, - .dec = NULL, - .equal = NULL -}; - -static int init_child(struct dm_btree_info *info, struct btree_node *parent, +static int init_child(struct dm_btree_info *info, struct dm_btree_value_type *vt, + struct btree_node *parent, unsigned index, struct child *result) { int r, inc; @@ -164,7 +157,7 @@ static int init_child(struct dm_btree_info *info, struct btree_node *parent, result->n = dm_block_data(result->block); if (inc) - inc_children(info->tm, result->n, &le64_type); + inc_children(info->tm, result->n, vt); *((__le64 *) value_ptr(parent, index)) = cpu_to_le64(dm_block_location(result->block)); @@ -236,7 +229,7 @@ static void __rebalance2(struct dm_btree_info *info, struct btree_node *parent, } static int rebalance2(struct shadow_spine *s, struct dm_btree_info *info, - unsigned left_index) + struct dm_btree_value_type *vt, unsigned left_index) { int r; struct btree_node *parent; @@ -244,11 +237,11 @@ static int rebalance2(struct shadow_spine *s, struct dm_btree_info *info, parent = dm_block_data(shadow_current(s)); - r = init_child(info, parent, left_index, &left); + r = init_child(info, vt, parent, left_index, &left); if (r) return r; - r = init_child(info, parent, left_index + 1, &right); + r = init_child(info, vt, parent, left_index + 1, &right); if (r) { exit_child(info, &left); return r; @@ -368,7 +361,7 @@ static void __rebalance3(struct dm_btree_info *info, struct btree_node *parent, } static int rebalance3(struct shadow_spine *s, struct dm_btree_info *info, - unsigned left_index) + struct dm_btree_value_type *vt, unsigned left_index) { int r; struct btree_node *parent = dm_block_data(shadow_current(s)); @@ -377,17 +370,17 @@ static int rebalance3(struct shadow_spine *s, struct dm_btree_info *info, /* * FIXME: fill out an array? */ - r = init_child(info, parent, left_index, &left); + r = init_child(info, vt, parent, left_index, &left); if (r) return r; - r = init_child(info, parent, left_index + 1, ¢er); + r = init_child(info, vt, parent, left_index + 1, ¢er); if (r) { exit_child(info, &left); return r; } - r = init_child(info, parent, left_index + 2, &right); + r = init_child(info, vt, parent, left_index + 2, &right); if (r) { exit_child(info, &left); exit_child(info, ¢er); @@ -434,7 +427,8 @@ static int get_nr_entries(struct dm_transaction_manager *tm, } static int rebalance_children(struct shadow_spine *s, - struct dm_btree_info *info, uint64_t key) + struct dm_btree_info *info, + struct dm_btree_value_type *vt, uint64_t key) { int i, r, has_left_sibling, has_right_sibling; uint32_t child_entries; @@ -472,13 +466,13 @@ static int rebalance_children(struct shadow_spine *s, has_right_sibling = i < (le32_to_cpu(n->header.nr_entries) - 1); if (!has_left_sibling) - r = rebalance2(s, info, i); + r = rebalance2(s, info, vt, i); else if (!has_right_sibling) - r = rebalance2(s, info, i - 1); + r = rebalance2(s, info, vt, i - 1); else - r = rebalance3(s, info, i - 1); + r = rebalance3(s, info, vt, i - 1); return r; } @@ -529,7 +523,7 @@ static int remove_raw(struct shadow_spine *s, struct dm_btree_info *info, if (le32_to_cpu(n->header.flags) & LEAF_NODE) return do_leaf(n, key, index); - r = rebalance_children(s, info, key); + r = rebalance_children(s, info, vt, key); if (r) break; @@ -550,6 +544,14 @@ static int remove_raw(struct shadow_spine *s, struct dm_btree_info *info, return r; } +static struct dm_btree_value_type le64_type = { + .context = NULL, + .size = sizeof(__le64), + .inc = NULL, + .dec = NULL, + .equal = NULL +}; + int dm_btree_remove(struct dm_btree_info *info, dm_block_t root, uint64_t *keys, dm_block_t *new_root) { diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c index 3ee2912889e7..24909eb13fec 100644 --- a/drivers/md/raid5.c +++ b/drivers/md/raid5.c @@ -671,9 +671,11 @@ static void ops_run_io(struct stripe_head *sh, struct stripe_head_state *s) bi->bi_next = NULL; if (rrdev) set_bit(R5_DOUBLE_LOCKED, &sh->dev[i].flags); - trace_block_bio_remap(bdev_get_queue(bi->bi_bdev), - bi, disk_devt(conf->mddev->gendisk), - sh->dev[i].sector); + + if (conf->mddev->gendisk) + trace_block_bio_remap(bdev_get_queue(bi->bi_bdev), + bi, disk_devt(conf->mddev->gendisk), + sh->dev[i].sector); generic_make_request(bi); } if (rrdev) { @@ -701,9 +703,10 @@ static void ops_run_io(struct stripe_head *sh, struct stripe_head_state *s) rbi->bi_io_vec[0].bv_offset = 0; rbi->bi_size = STRIPE_SIZE; rbi->bi_next = NULL; - trace_block_bio_remap(bdev_get_queue(rbi->bi_bdev), - rbi, disk_devt(conf->mddev->gendisk), - sh->dev[i].sector); + if (conf->mddev->gendisk) + trace_block_bio_remap(bdev_get_queue(rbi->bi_bdev), + rbi, disk_devt(conf->mddev->gendisk), + sh->dev[i].sector); generic_make_request(rbi); } if (!rdev && !rrdev) { @@ -2280,17 +2283,6 @@ schedule_reconstruction(struct stripe_head *sh, struct stripe_head_state *s, int level = conf->level; if (rcw) { - /* if we are not expanding this is a proper write request, and - * there will be bios with new data to be drained into the - * stripe cache - */ - if (!expand) { - sh->reconstruct_state = reconstruct_state_drain_run; - set_bit(STRIPE_OP_BIODRAIN, &s->ops_request); - } else - sh->reconstruct_state = reconstruct_state_run; - - set_bit(STRIPE_OP_RECONSTRUCT, &s->ops_request); for (i = disks; i--; ) { struct r5dev *dev = &sh->dev[i]; @@ -2303,6 +2295,21 @@ schedule_reconstruction(struct stripe_head *sh, struct stripe_head_state *s, s->locked++; } } + /* if we are not expanding this is a proper write request, and + * there will be bios with new data to be drained into the + * stripe cache + */ + if (!expand) { + if (!s->locked) + /* False alarm, nothing to do */ + return; + sh->reconstruct_state = reconstruct_state_drain_run; + set_bit(STRIPE_OP_BIODRAIN, &s->ops_request); + } else + sh->reconstruct_state = reconstruct_state_run; + + set_bit(STRIPE_OP_RECONSTRUCT, &s->ops_request); + if (s->locked + conf->max_degraded == disks) if (!test_and_set_bit(STRIPE_FULL_WRITE, &sh->state)) atomic_inc(&conf->pending_full_writes); @@ -2311,11 +2318,6 @@ schedule_reconstruction(struct stripe_head *sh, struct stripe_head_state *s, BUG_ON(!(test_bit(R5_UPTODATE, &sh->dev[pd_idx].flags) || test_bit(R5_Wantcompute, &sh->dev[pd_idx].flags))); - sh->reconstruct_state = reconstruct_state_prexor_drain_run; - set_bit(STRIPE_OP_PREXOR, &s->ops_request); - set_bit(STRIPE_OP_BIODRAIN, &s->ops_request); - set_bit(STRIPE_OP_RECONSTRUCT, &s->ops_request); - for (i = disks; i--; ) { struct r5dev *dev = &sh->dev[i]; if (i == pd_idx) @@ -2330,6 +2332,13 @@ schedule_reconstruction(struct stripe_head *sh, struct stripe_head_state *s, s->locked++; } } + if (!s->locked) + /* False alarm - nothing to do */ + return; + sh->reconstruct_state = reconstruct_state_prexor_drain_run; + set_bit(STRIPE_OP_PREXOR, &s->ops_request); + set_bit(STRIPE_OP_BIODRAIN, &s->ops_request); + set_bit(STRIPE_OP_RECONSTRUCT, &s->ops_request); } /* keep the parity disk(s) locked while asynchronous operations @@ -2564,6 +2573,8 @@ handle_failed_sync(struct r5conf *conf, struct stripe_head *sh, int i; clear_bit(STRIPE_SYNCING, &sh->state); + if (test_and_clear_bit(R5_Overlap, &sh->dev[sh->pd_idx].flags)) + wake_up(&conf->wait_for_overlap); s->syncing = 0; s->replacing = 0; /* There is nothing more to do for sync/check/repair. @@ -2737,6 +2748,7 @@ static void handle_stripe_clean_event(struct r5conf *conf, { int i; struct r5dev *dev; + int discard_pending = 0; for (i = disks; i--; ) if (sh->dev[i].written) { @@ -2765,9 +2777,23 @@ static void handle_stripe_clean_event(struct r5conf *conf, STRIPE_SECTORS, !test_bit(STRIPE_DEGRADED, &sh->state), 0); - } - } else if (test_bit(R5_Discard, &sh->dev[i].flags)) - clear_bit(R5_Discard, &sh->dev[i].flags); + } else if (test_bit(R5_Discard, &dev->flags)) + discard_pending = 1; + } + if (!discard_pending && + test_bit(R5_Discard, &sh->dev[sh->pd_idx].flags)) { + clear_bit(R5_Discard, &sh->dev[sh->pd_idx].flags); + clear_bit(R5_UPTODATE, &sh->dev[sh->pd_idx].flags); + if (sh->qd_idx >= 0) { + clear_bit(R5_Discard, &sh->dev[sh->qd_idx].flags); + clear_bit(R5_UPTODATE, &sh->dev[sh->qd_idx].flags); + } + /* now that discard is done we can proceed with any sync */ + clear_bit(STRIPE_DISCARD, &sh->state); + if (test_bit(STRIPE_SYNC_REQUESTED, &sh->state)) + set_bit(STRIPE_HANDLE, &sh->state); + + } if (test_and_clear_bit(STRIPE_FULL_WRITE, &sh->state)) if (atomic_dec_and_test(&conf->pending_full_writes)) @@ -2826,8 +2852,10 @@ static void handle_stripe_dirtying(struct r5conf *conf, set_bit(STRIPE_HANDLE, &sh->state); if (rmw < rcw && rmw > 0) { /* prefer read-modify-write, but need to get some data */ - blk_add_trace_msg(conf->mddev->queue, "raid5 rmw %llu %d", - (unsigned long long)sh->sector, rmw); + if (conf->mddev->queue) + blk_add_trace_msg(conf->mddev->queue, + "raid5 rmw %llu %d", + (unsigned long long)sh->sector, rmw); for (i = disks; i--; ) { struct r5dev *dev = &sh->dev[i]; if ((dev->towrite || i == sh->pd_idx) && @@ -2877,7 +2905,7 @@ static void handle_stripe_dirtying(struct r5conf *conf, } } } - if (rcw) + if (rcw && conf->mddev->queue) blk_add_trace_msg(conf->mddev->queue, "raid5 rcw %llu %d %d %d", (unsigned long long)sh->sector, rcw, qread, test_bit(STRIPE_DELAYED, &sh->state)); @@ -3417,9 +3445,15 @@ static void handle_stripe(struct stripe_head *sh) return; } - if (test_and_clear_bit(STRIPE_SYNC_REQUESTED, &sh->state)) { - set_bit(STRIPE_SYNCING, &sh->state); - clear_bit(STRIPE_INSYNC, &sh->state); + if (test_bit(STRIPE_SYNC_REQUESTED, &sh->state)) { + spin_lock(&sh->stripe_lock); + /* Cannot process 'sync' concurrently with 'discard' */ + if (!test_bit(STRIPE_DISCARD, &sh->state) && + test_and_clear_bit(STRIPE_SYNC_REQUESTED, &sh->state)) { + set_bit(STRIPE_SYNCING, &sh->state); + clear_bit(STRIPE_INSYNC, &sh->state); + } + spin_unlock(&sh->stripe_lock); } clear_bit(STRIPE_DELAYED, &sh->state); @@ -3579,6 +3613,8 @@ static void handle_stripe(struct stripe_head *sh) test_bit(STRIPE_INSYNC, &sh->state)) { md_done_sync(conf->mddev, STRIPE_SECTORS, 1); clear_bit(STRIPE_SYNCING, &sh->state); + if (test_and_clear_bit(R5_Overlap, &sh->dev[sh->pd_idx].flags)) + wake_up(&conf->wait_for_overlap); } /* If the failed drives are just a ReadError, then we might need @@ -3982,9 +4018,10 @@ static int chunk_aligned_read(struct mddev *mddev, struct bio * raid_bio) atomic_inc(&conf->active_aligned_reads); spin_unlock_irq(&conf->device_lock); - trace_block_bio_remap(bdev_get_queue(align_bi->bi_bdev), - align_bi, disk_devt(mddev->gendisk), - raid_bio->bi_sector); + if (mddev->gendisk) + trace_block_bio_remap(bdev_get_queue(align_bi->bi_bdev), + align_bi, disk_devt(mddev->gendisk), + raid_bio->bi_sector); generic_make_request(align_bi); return 1; } else { @@ -4078,7 +4115,8 @@ static void raid5_unplug(struct blk_plug_cb *blk_cb, bool from_schedule) } spin_unlock_irq(&conf->device_lock); } - trace_block_unplug(mddev->queue, cnt, !from_schedule); + if (mddev->queue) + trace_block_unplug(mddev->queue, cnt, !from_schedule); kfree(cb); } @@ -4141,6 +4179,13 @@ static void make_discard_request(struct mddev *mddev, struct bio *bi) sh = get_active_stripe(conf, logical_sector, 0, 0, 0); prepare_to_wait(&conf->wait_for_overlap, &w, TASK_UNINTERRUPTIBLE); + set_bit(R5_Overlap, &sh->dev[sh->pd_idx].flags); + if (test_bit(STRIPE_SYNCING, &sh->state)) { + release_stripe(sh); + schedule(); + goto again; + } + clear_bit(R5_Overlap, &sh->dev[sh->pd_idx].flags); spin_lock_irq(&sh->stripe_lock); for (d = 0; d < conf->raid_disks; d++) { if (d == sh->pd_idx || d == sh->qd_idx) @@ -4153,6 +4198,7 @@ static void make_discard_request(struct mddev *mddev, struct bio *bi) goto again; } } + set_bit(STRIPE_DISCARD, &sh->state); finish_wait(&conf->wait_for_overlap, &w); for (d = 0; d < conf->raid_disks; d++) { if (d == sh->pd_idx || d == sh->qd_idx) diff --git a/drivers/md/raid5.h b/drivers/md/raid5.h index 18b2c4a8a1fd..b0b663b119a8 100644 --- a/drivers/md/raid5.h +++ b/drivers/md/raid5.h @@ -221,10 +221,6 @@ struct stripe_head { struct stripe_operations { int target, target2; enum sum_check_flags zero_sum_result; - #ifdef CONFIG_MULTICORE_RAID456 - unsigned long request; - wait_queue_head_t wait_for_ops; - #endif } ops; struct r5dev { /* rreq and rvec are used for the replacement device when @@ -323,6 +319,7 @@ enum { STRIPE_COMPUTE_RUN, STRIPE_OPS_REQ_PENDING, STRIPE_ON_UNPLUG_LIST, + STRIPE_DISCARD, }; /* diff --git a/drivers/media/i2c/m5mols/m5mols_core.c b/drivers/media/i2c/m5mols/m5mols_core.c index d4e7567b367c..0b899cb6cda1 100644 --- a/drivers/media/i2c/m5mols/m5mols_core.c +++ b/drivers/media/i2c/m5mols/m5mols_core.c @@ -724,7 +724,7 @@ static int m5mols_s_stream(struct v4l2_subdev *sd, int enable) if (enable) { if (is_code(code, M5MOLS_RESTYPE_MONITOR)) ret = m5mols_start_monitor(info); - if (is_code(code, M5MOLS_RESTYPE_CAPTURE)) + else if (is_code(code, M5MOLS_RESTYPE_CAPTURE)) ret = m5mols_start_capture(info); else ret = -EINVAL; diff --git a/drivers/media/pci/bt8xx/bttv-driver.c b/drivers/media/pci/bt8xx/bttv-driver.c index ccd18e4ee789..54579e4c740b 100644 --- a/drivers/media/pci/bt8xx/bttv-driver.c +++ b/drivers/media/pci/bt8xx/bttv-driver.c @@ -250,17 +250,19 @@ static u8 SRAM_Table[][60] = vdelay start of active video in 2 * field lines relative to trailing edge of /VRESET pulse (VDELAY register). sheight height of active video in 2 * field lines. + extraheight Added to sheight for cropcap.bounds.height only videostart0 ITU-R frame line number of the line corresponding to vdelay in the first field. */ #define CROPCAP(minhdelayx1, hdelayx1, swidth, totalwidth, sqwidth, \ - vdelay, sheight, videostart0) \ + vdelay, sheight, extraheight, videostart0) \ .cropcap.bounds.left = minhdelayx1, \ /* * 2 because vertically we count field lines times two, */ \ /* e.g. 23 * 2 to 23 * 2 + 576 in PAL-BGHI defrect. */ \ .cropcap.bounds.top = (videostart0) * 2 - (vdelay) + MIN_VDELAY, \ /* 4 is a safety margin at the end of the line. */ \ .cropcap.bounds.width = (totalwidth) - (minhdelayx1) - 4, \ - .cropcap.bounds.height = (sheight) + (vdelay) - MIN_VDELAY, \ + .cropcap.bounds.height = (sheight) + (extraheight) + (vdelay) - \ + MIN_VDELAY, \ .cropcap.defrect.left = hdelayx1, \ .cropcap.defrect.top = (videostart0) * 2, \ .cropcap.defrect.width = swidth, \ @@ -301,9 +303,10 @@ const struct bttv_tvnorm bttv_tvnorms[] = { /* totalwidth */ 1135, /* sqwidth */ 944, /* vdelay */ 0x20, - /* bt878 (and bt848?) can capture another - line below active video. */ - /* sheight */ (576 + 2) + 0x20 - 2, + /* sheight */ 576, + /* bt878 (and bt848?) can capture another + line below active video. */ + /* extraheight */ 2, /* videostart0 */ 23) },{ .v4l2_id = V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_KR, @@ -330,6 +333,7 @@ const struct bttv_tvnorm bttv_tvnorms[] = { /* sqwidth */ 780, /* vdelay */ 0x1a, /* sheight */ 480, + /* extraheight */ 0, /* videostart0 */ 23) },{ .v4l2_id = V4L2_STD_SECAM, @@ -355,6 +359,7 @@ const struct bttv_tvnorm bttv_tvnorms[] = { /* sqwidth */ 944, /* vdelay */ 0x20, /* sheight */ 576, + /* extraheight */ 0, /* videostart0 */ 23) },{ .v4l2_id = V4L2_STD_PAL_Nc, @@ -380,6 +385,7 @@ const struct bttv_tvnorm bttv_tvnorms[] = { /* sqwidth */ 780, /* vdelay */ 0x1a, /* sheight */ 576, + /* extraheight */ 0, /* videostart0 */ 23) },{ .v4l2_id = V4L2_STD_PAL_M, @@ -405,6 +411,7 @@ const struct bttv_tvnorm bttv_tvnorms[] = { /* sqwidth */ 780, /* vdelay */ 0x1a, /* sheight */ 480, + /* extraheight */ 0, /* videostart0 */ 23) },{ .v4l2_id = V4L2_STD_PAL_N, @@ -430,6 +437,7 @@ const struct bttv_tvnorm bttv_tvnorms[] = { /* sqwidth */ 944, /* vdelay */ 0x20, /* sheight */ 576, + /* extraheight */ 0, /* videostart0 */ 23) },{ .v4l2_id = V4L2_STD_NTSC_M_JP, @@ -455,6 +463,7 @@ const struct bttv_tvnorm bttv_tvnorms[] = { /* sqwidth */ 780, /* vdelay */ 0x16, /* sheight */ 480, + /* extraheight */ 0, /* videostart0 */ 23) },{ /* that one hopefully works with the strange timing @@ -484,6 +493,7 @@ const struct bttv_tvnorm bttv_tvnorms[] = { /* sqwidth */ 944, /* vdelay */ 0x1a, /* sheight */ 480, + /* extraheight */ 0, /* videostart0 */ 23) } }; diff --git a/drivers/media/platform/exynos-gsc/gsc-core.c b/drivers/media/platform/exynos-gsc/gsc-core.c index 82d9f6ac12f3..33b5ffc8d66d 100644 --- a/drivers/media/platform/exynos-gsc/gsc-core.c +++ b/drivers/media/platform/exynos-gsc/gsc-core.c @@ -1054,16 +1054,18 @@ static int gsc_m2m_suspend(struct gsc_dev *gsc) static int gsc_m2m_resume(struct gsc_dev *gsc) { + struct gsc_ctx *ctx; unsigned long flags; spin_lock_irqsave(&gsc->slock, flags); /* Clear for full H/W setup in first run after resume */ + ctx = gsc->m2m.ctx; gsc->m2m.ctx = NULL; spin_unlock_irqrestore(&gsc->slock, flags); if (test_and_clear_bit(ST_M2M_SUSPENDED, &gsc->state)) - gsc_m2m_job_finish(gsc->m2m.ctx, - VB2_BUF_STATE_ERROR); + gsc_m2m_job_finish(ctx, VB2_BUF_STATE_ERROR); + return 0; } @@ -1204,7 +1206,7 @@ static int gsc_resume(struct device *dev) /* Do not resume if the device was idle before system suspend */ spin_lock_irqsave(&gsc->slock, flags); if (!test_and_clear_bit(ST_SUSPEND, &gsc->state) || - !gsc_m2m_active(gsc)) { + !gsc_m2m_opened(gsc)) { spin_unlock_irqrestore(&gsc->slock, flags); return 0; } diff --git a/drivers/media/platform/s5p-fimc/fimc-core.c b/drivers/media/platform/s5p-fimc/fimc-core.c index e3916bde45cf..0f513dd19f86 100644 --- a/drivers/media/platform/s5p-fimc/fimc-core.c +++ b/drivers/media/platform/s5p-fimc/fimc-core.c @@ -850,16 +850,18 @@ static int fimc_m2m_suspend(struct fimc_dev *fimc) static int fimc_m2m_resume(struct fimc_dev *fimc) { + struct fimc_ctx *ctx; unsigned long flags; spin_lock_irqsave(&fimc->slock, flags); /* Clear for full H/W setup in first run after resume */ + ctx = fimc->m2m.ctx; fimc->m2m.ctx = NULL; spin_unlock_irqrestore(&fimc->slock, flags); if (test_and_clear_bit(ST_M2M_SUSPENDED, &fimc->state)) - fimc_m2m_job_finish(fimc->m2m.ctx, - VB2_BUF_STATE_ERROR); + fimc_m2m_job_finish(ctx, VB2_BUF_STATE_ERROR); + return 0; } diff --git a/drivers/media/platform/s5p-fimc/fimc-lite-reg.c b/drivers/media/platform/s5p-fimc/fimc-lite-reg.c index f0af0754a7b4..ac9663ce2a49 100644 --- a/drivers/media/platform/s5p-fimc/fimc-lite-reg.c +++ b/drivers/media/platform/s5p-fimc/fimc-lite-reg.c @@ -128,10 +128,10 @@ static const u32 src_pixfmt_map[8][3] = { void flite_hw_set_source_format(struct fimc_lite *dev, struct flite_frame *f) { enum v4l2_mbus_pixelcode pixelcode = dev->fmt->mbus_code; - unsigned int i = ARRAY_SIZE(src_pixfmt_map); + int i = ARRAY_SIZE(src_pixfmt_map); u32 cfg; - while (i-- >= 0) { + while (--i >= 0) { if (src_pixfmt_map[i][0] == pixelcode) break; } @@ -224,9 +224,9 @@ static void flite_hw_set_out_order(struct fimc_lite *dev, struct flite_frame *f) { V4L2_MBUS_FMT_VYUY8_2X8, FLITE_REG_CIODMAFMT_CRYCBY }, }; u32 cfg = readl(dev->regs + FLITE_REG_CIODMAFMT); - unsigned int i = ARRAY_SIZE(pixcode); + int i = ARRAY_SIZE(pixcode); - while (i-- >= 0) + while (--i >= 0) if (pixcode[i][0] == dev->fmt->mbus_code) break; cfg &= ~FLITE_REG_CIODMAFMT_YCBCR_ORDER_MASK; diff --git a/drivers/media/platform/s5p-fimc/fimc-lite.c b/drivers/media/platform/s5p-fimc/fimc-lite.c index bfc4206935c8..bbc35de7db27 100644 --- a/drivers/media/platform/s5p-fimc/fimc-lite.c +++ b/drivers/media/platform/s5p-fimc/fimc-lite.c @@ -1408,6 +1408,7 @@ static const struct v4l2_ctrl_config fimc_lite_ctrl = { .id = V4L2_CTRL_CLASS_USER | 0x1001, .type = V4L2_CTRL_TYPE_BOOLEAN, .name = "Test Pattern 640x480", + .step = 1, }; static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc) diff --git a/drivers/media/platform/s5p-fimc/fimc-mdevice.c b/drivers/media/platform/s5p-fimc/fimc-mdevice.c index a17fcb2d5d41..cd38d708ab58 100644 --- a/drivers/media/platform/s5p-fimc/fimc-mdevice.c +++ b/drivers/media/platform/s5p-fimc/fimc-mdevice.c @@ -827,7 +827,7 @@ static int fimc_md_link_notify(struct media_pad *source, struct fimc_pipeline *pipeline; struct v4l2_subdev *sd; struct mutex *lock; - int ret = 0; + int i, ret = 0; int ref_count; if (media_entity_type(sink->entity) != MEDIA_ENT_T_V4L2_SUBDEV) @@ -854,29 +854,28 @@ static int fimc_md_link_notify(struct media_pad *source, return 0; } + mutex_lock(lock); + ref_count = fimc ? fimc->vid_cap.refcnt : fimc_lite->ref_count; + if (!(flags & MEDIA_LNK_FL_ENABLED)) { - int i; - mutex_lock(lock); - ret = __fimc_pipeline_close(pipeline); + if (ref_count > 0) { + ret = __fimc_pipeline_close(pipeline); + if (!ret && fimc) + fimc_ctrls_delete(fimc->vid_cap.ctx); + } for (i = 0; i < IDX_MAX; i++) pipeline->subdevs[i] = NULL; - if (fimc) - fimc_ctrls_delete(fimc->vid_cap.ctx); - mutex_unlock(lock); - return ret; + } else if (ref_count > 0) { + /* + * Link activation. Enable power of pipeline elements only if + * the pipeline is already in use, i.e. its video node is open. + * Recreate the controls destroyed during the link deactivation. + */ + ret = __fimc_pipeline_open(pipeline, + source->entity, true); + if (!ret && fimc) + ret = fimc_capture_ctrls_create(fimc); } - /* - * Link activation. Enable power of pipeline elements only if the - * pipeline is already in use, i.e. its video node is opened. - * Recreate the controls destroyed during the link deactivation. - */ - mutex_lock(lock); - - ref_count = fimc ? fimc->vid_cap.refcnt : fimc_lite->ref_count; - if (ref_count > 0) - ret = __fimc_pipeline_open(pipeline, source->entity, true); - if (!ret && fimc) - ret = fimc_capture_ctrls_create(fimc); mutex_unlock(lock); return ret ? -EPIPE : ret; diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c index e84703c314ce..1cb6d57987c6 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c @@ -276,7 +276,7 @@ static void s5p_mfc_handle_frame_new(struct s5p_mfc_ctx *ctx, unsigned int err) unsigned int frame_type; dspl_y_addr = s5p_mfc_hw_call(dev->mfc_ops, get_dspl_y_adr, dev); - frame_type = s5p_mfc_hw_call(dev->mfc_ops, get_dec_frame_type, dev); + frame_type = s5p_mfc_hw_call(dev->mfc_ops, get_disp_frame_type, ctx); /* If frame is same as previous then skip and do not dequeue */ if (frame_type == S5P_FIMV_DECODE_FRAME_SKIPPED) { diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c index 2356fd52a169..4f6b553c4b2d 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c @@ -232,6 +232,7 @@ static struct mfc_control controls[] = { .minimum = 0, .maximum = 1, .default_value = 0, + .step = 1, .menu_skip_mask = 0, }, { diff --git a/drivers/media/rc/Kconfig b/drivers/media/rc/Kconfig index 19f3563c61da..5a79c333d45e 100644 --- a/drivers/media/rc/Kconfig +++ b/drivers/media/rc/Kconfig @@ -291,7 +291,7 @@ config IR_TTUSBIR config IR_RX51 tristate "Nokia N900 IR transmitter diode" - depends on OMAP_DM_TIMER && LIRC && !ARCH_MULTIPLATFORM + depends on OMAP_DM_TIMER && ARCH_OMAP2PLUS && LIRC && !ARCH_MULTIPLATFORM ---help--- Say Y or M here if you want to enable support for the IR transmitter diode built in the Nokia N900 (RX51) device. diff --git a/drivers/media/v4l2-core/Makefile b/drivers/media/v4l2-core/Makefile index a9d355230e8e..768aaf62d5dc 100644 --- a/drivers/media/v4l2-core/Makefile +++ b/drivers/media/v4l2-core/Makefile @@ -10,7 +10,7 @@ ifeq ($(CONFIG_COMPAT),y) videodev-objs += v4l2-compat-ioctl32.o endif -obj-$(CONFIG_VIDEO_DEV) += videodev.o +obj-$(CONFIG_VIDEO_V4L2) += videodev.o obj-$(CONFIG_VIDEO_V4L2_INT_DEVICE) += v4l2-int-device.o obj-$(CONFIG_VIDEO_V4L2) += v4l2-common.o diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 671f5b171c73..c346941a2515 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -858,6 +858,7 @@ config EZX_PCAP config AB8500_CORE bool "ST-Ericsson AB8500 Mixed Signal Power Management chip" depends on GENERIC_HARDIRQS && ABX500_CORE && MFD_DB8500_PRCMU + select POWER_SUPPLY select MFD_CORE select IRQ_DOMAIN help diff --git a/drivers/mfd/ab8500-gpadc.c b/drivers/mfd/ab8500-gpadc.c index b1f3561b023f..5f341a50ee5a 100644 --- a/drivers/mfd/ab8500-gpadc.c +++ b/drivers/mfd/ab8500-gpadc.c @@ -594,9 +594,12 @@ static int ab8500_gpadc_runtime_suspend(struct device *dev) static int ab8500_gpadc_runtime_resume(struct device *dev) { struct ab8500_gpadc *gpadc = dev_get_drvdata(dev); + int ret; - regulator_enable(gpadc->regu); - return 0; + ret = regulator_enable(gpadc->regu); + if (ret) + dev_err(dev, "Failed to enable vtvout LDO: %d\n", ret); + return ret; } static int ab8500_gpadc_runtime_idle(struct device *dev) @@ -643,7 +646,7 @@ static int ab8500_gpadc_probe(struct platform_device *pdev) } /* VTVout LDO used to power up ab8500-GPADC */ - gpadc->regu = regulator_get(&pdev->dev, "vddadc"); + gpadc->regu = devm_regulator_get(&pdev->dev, "vddadc"); if (IS_ERR(gpadc->regu)) { ret = PTR_ERR(gpadc->regu); dev_err(gpadc->dev, "failed to get vtvout LDO\n"); @@ -652,7 +655,11 @@ static int ab8500_gpadc_probe(struct platform_device *pdev) platform_set_drvdata(pdev, gpadc); - regulator_enable(gpadc->regu); + ret = regulator_enable(gpadc->regu); + if (ret) { + dev_err(gpadc->dev, "Failed to enable vtvout LDO: %d\n", ret); + goto fail_enable; + } pm_runtime_set_autosuspend_delay(gpadc->dev, GPADC_AUDOSUSPEND_DELAY); pm_runtime_use_autosuspend(gpadc->dev); @@ -663,6 +670,8 @@ static int ab8500_gpadc_probe(struct platform_device *pdev) list_add_tail(&gpadc->node, &ab8500_gpadc_list); dev_dbg(gpadc->dev, "probe success\n"); return 0; + +fail_enable: fail_irq: free_irq(gpadc->irq, gpadc); fail: diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c index 6b5edf64de2b..4febc5c7fdee 100644 --- a/drivers/mfd/omap-usb-host.c +++ b/drivers/mfd/omap-usb-host.c @@ -460,15 +460,15 @@ static void omap_usbhs_init(struct device *dev) switch (omap->usbhs_rev) { case OMAP_USBHS_REV1: - omap_usbhs_rev1_hostconfig(omap, reg); + reg = omap_usbhs_rev1_hostconfig(omap, reg); break; case OMAP_USBHS_REV2: - omap_usbhs_rev2_hostconfig(omap, reg); + reg = omap_usbhs_rev2_hostconfig(omap, reg); break; default: /* newer revisions */ - omap_usbhs_rev2_hostconfig(omap, reg); + reg = omap_usbhs_rev2_hostconfig(omap, reg); break; } diff --git a/drivers/mfd/palmas.c b/drivers/mfd/palmas.c index bbdbc50a3cca..73bf76df1044 100644 --- a/drivers/mfd/palmas.c +++ b/drivers/mfd/palmas.c @@ -257,9 +257,24 @@ static struct regmap_irq_chip palmas_irq_chip = { PALMAS_INT1_MASK), }; -static void palmas_dt_to_pdata(struct device_node *node, +static int palmas_set_pdata_irq_flag(struct i2c_client *i2c, struct palmas_platform_data *pdata) { + struct irq_data *irq_data = irq_get_irq_data(i2c->irq); + if (!irq_data) { + dev_err(&i2c->dev, "Invalid IRQ: %d\n", i2c->irq); + return -EINVAL; + } + + pdata->irq_flags = irqd_get_trigger_type(irq_data); + dev_info(&i2c->dev, "Irq flag is 0x%08x\n", pdata->irq_flags); + return 0; +} + +static void palmas_dt_to_pdata(struct i2c_client *i2c, + struct palmas_platform_data *pdata) +{ + struct device_node *node = i2c->dev.of_node; int ret; u32 prop; @@ -283,6 +298,8 @@ static void palmas_dt_to_pdata(struct device_node *node, pdata->power_ctrl = PALMAS_POWER_CTRL_NSLEEP_MASK | PALMAS_POWER_CTRL_ENABLE1_MASK | PALMAS_POWER_CTRL_ENABLE2_MASK; + if (i2c->irq) + palmas_set_pdata_irq_flag(i2c, pdata); } static int palmas_i2c_probe(struct i2c_client *i2c, @@ -304,7 +321,7 @@ static int palmas_i2c_probe(struct i2c_client *i2c, if (!pdata) return -ENOMEM; - palmas_dt_to_pdata(node, pdata); + palmas_dt_to_pdata(i2c, pdata); } if (!pdata) @@ -344,6 +361,19 @@ static int palmas_i2c_probe(struct i2c_client *i2c, } } + /* Change interrupt line output polarity */ + if (pdata->irq_flags & IRQ_TYPE_LEVEL_HIGH) + reg = PALMAS_POLARITY_CTRL_INT_POLARITY; + else + reg = 0; + ret = palmas_update_bits(palmas, PALMAS_PU_PD_OD_BASE, + PALMAS_POLARITY_CTRL, PALMAS_POLARITY_CTRL_INT_POLARITY, + reg); + if (ret < 0) { + dev_err(palmas->dev, "POLARITY_CTRL updat failed: %d\n", ret); + goto err; + } + /* Change IRQ into clear on read mode for efficiency */ slave = PALMAS_BASE_TO_SLAVE(PALMAS_INTERRUPT_BASE); addr = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE, PALMAS_INT_CTRL); @@ -352,7 +382,7 @@ static int palmas_i2c_probe(struct i2c_client *i2c, regmap_write(palmas->regmap[slave], addr, reg); ret = regmap_add_irq_chip(palmas->regmap[slave], palmas->irq, - IRQF_ONESHOT | IRQF_TRIGGER_LOW, 0, &palmas_irq_chip, + IRQF_ONESHOT | pdata->irq_flags, 0, &palmas_irq_chip, &palmas->irq_data); if (ret < 0) goto err; diff --git a/drivers/mfd/tps65912-core.c b/drivers/mfd/tps65912-core.c index 4658b5bdcd84..aeb8e40ab424 100644 --- a/drivers/mfd/tps65912-core.c +++ b/drivers/mfd/tps65912-core.c @@ -169,6 +169,7 @@ err: void tps65912_device_exit(struct tps65912 *tps65912) { mfd_remove_devices(tps65912->dev); + tps65912_irq_exit(tps65912); kfree(tps65912); } diff --git a/drivers/mfd/twl4030-audio.c b/drivers/mfd/twl4030-audio.c index e16edca92670..d2ab222138c2 100644 --- a/drivers/mfd/twl4030-audio.c +++ b/drivers/mfd/twl4030-audio.c @@ -118,7 +118,7 @@ EXPORT_SYMBOL_GPL(twl4030_audio_enable_resource); * Disable the resource. * The function returns with error or the content of the register */ -int twl4030_audio_disable_resource(unsigned id) +int twl4030_audio_disable_resource(enum twl4030_audio_res id) { struct twl4030_audio *audio = platform_get_drvdata(twl4030_audio_dev); int val; diff --git a/drivers/mfd/twl4030-madc.c b/drivers/mfd/twl4030-madc.c index 88ff9dc83305..942b666a2a07 100644 --- a/drivers/mfd/twl4030-madc.c +++ b/drivers/mfd/twl4030-madc.c @@ -800,7 +800,7 @@ static int twl4030_madc_remove(struct platform_device *pdev) static struct platform_driver twl4030_madc_driver = { .probe = twl4030_madc_probe, - .remove = __exit_p(twl4030_madc_remove), + .remove = twl4030_madc_remove, .driver = { .name = "twl4030_madc", .owner = THIS_MODULE, diff --git a/drivers/misc/mei/hw-me.c b/drivers/misc/mei/hw-me.c index 45ea7185c003..642c6223fa6c 100644 --- a/drivers/misc/mei/hw-me.c +++ b/drivers/misc/mei/hw-me.c @@ -152,6 +152,20 @@ static void mei_me_intr_disable(struct mei_device *dev) } /** + * mei_me_hw_reset_release - release device from the reset + * + * @dev: the device structure + */ +static void mei_me_hw_reset_release(struct mei_device *dev) +{ + struct mei_me_hw *hw = to_me_hw(dev); + u32 hcsr = mei_hcsr_read(hw); + + hcsr |= H_IG; + hcsr &= ~H_RST; + mei_hcsr_set(hw, hcsr); +} +/** * mei_me_hw_reset - resets fw via mei csr register. * * @dev: the device structure @@ -169,18 +183,14 @@ static void mei_me_hw_reset(struct mei_device *dev, bool intr_enable) if (intr_enable) hcsr |= H_IE; else - hcsr &= ~H_IE; - - mei_hcsr_set(hw, hcsr); - - hcsr = mei_hcsr_read(hw) | H_IG; - hcsr &= ~H_RST; + hcsr |= ~H_IE; mei_hcsr_set(hw, hcsr); - hcsr = mei_hcsr_read(hw); + if (dev->dev_state == MEI_DEV_POWER_DOWN) + mei_me_hw_reset_release(dev); - dev_dbg(&dev->pdev->dev, "current HCSR = 0x%08x.\n", hcsr); + dev_dbg(&dev->pdev->dev, "current HCSR = 0x%08x.\n", mei_hcsr_read(hw)); } /** @@ -466,7 +476,8 @@ irqreturn_t mei_me_irq_thread_handler(int irq, void *dev_id) mutex_unlock(&dev->device_lock); return IRQ_HANDLED; } else { - dev_dbg(&dev->pdev->dev, "FW not ready.\n"); + dev_dbg(&dev->pdev->dev, "Reset Completed.\n"); + mei_me_hw_reset_release(dev); mutex_unlock(&dev->device_lock); return IRQ_HANDLED; } diff --git a/drivers/misc/mei/init.c b/drivers/misc/mei/init.c index 6ec530168afb..356179991a2e 100644 --- a/drivers/misc/mei/init.c +++ b/drivers/misc/mei/init.c @@ -183,6 +183,24 @@ void mei_reset(struct mei_device *dev, int interrupts_enabled) mei_cl_all_write_clear(dev); } +void mei_stop(struct mei_device *dev) +{ + dev_dbg(&dev->pdev->dev, "stopping the device.\n"); + + mutex_lock(&dev->device_lock); + + cancel_delayed_work(&dev->timer_work); + + mei_wd_stop(dev); + + dev->dev_state = MEI_DEV_POWER_DOWN; + mei_reset(dev, 0); + + mutex_unlock(&dev->device_lock); + + flush_scheduled_work(); +} + diff --git a/drivers/misc/mei/mei_dev.h b/drivers/misc/mei/mei_dev.h index cb80166161f0..97873812e33b 100644 --- a/drivers/misc/mei/mei_dev.h +++ b/drivers/misc/mei/mei_dev.h @@ -381,6 +381,7 @@ static inline unsigned long mei_secs_to_jiffies(unsigned long sec) void mei_device_init(struct mei_device *dev); void mei_reset(struct mei_device *dev, int interrupts); int mei_hw_init(struct mei_device *dev); +void mei_stop(struct mei_device *dev); /* * MEI interrupt functions prototype diff --git a/drivers/misc/mei/pci-me.c b/drivers/misc/mei/pci-me.c index b40ec0601ab0..b8b5c9c3ad03 100644 --- a/drivers/misc/mei/pci-me.c +++ b/drivers/misc/mei/pci-me.c @@ -247,44 +247,14 @@ static void mei_remove(struct pci_dev *pdev) hw = to_me_hw(dev); - mutex_lock(&dev->device_lock); - - cancel_delayed_work(&dev->timer_work); - mei_wd_stop(dev); + dev_err(&pdev->dev, "stop\n"); + mei_stop(dev); mei_pdev = NULL; - if (dev->iamthif_cl.state == MEI_FILE_CONNECTED) { - dev->iamthif_cl.state = MEI_FILE_DISCONNECTING; - mei_cl_disconnect(&dev->iamthif_cl); - } - if (dev->wd_cl.state == MEI_FILE_CONNECTED) { - dev->wd_cl.state = MEI_FILE_DISCONNECTING; - mei_cl_disconnect(&dev->wd_cl); - } - - /* Unregistering watchdog device */ mei_watchdog_unregister(dev); - /* remove entry if already in list */ - dev_dbg(&pdev->dev, "list del iamthif and wd file list.\n"); - - if (dev->open_handle_count > 0) - dev->open_handle_count--; - mei_cl_unlink(&dev->wd_cl); - - if (dev->open_handle_count > 0) - dev->open_handle_count--; - mei_cl_unlink(&dev->iamthif_cl); - - dev->iamthif_current_cb = NULL; - dev->me_clients_num = 0; - - mutex_unlock(&dev->device_lock); - - flush_scheduled_work(); - /* disable interrupts */ mei_disable_interrupts(dev); @@ -308,28 +278,20 @@ static int mei_pci_suspend(struct device *device) { struct pci_dev *pdev = to_pci_dev(device); struct mei_device *dev = pci_get_drvdata(pdev); - int err; if (!dev) return -ENODEV; - mutex_lock(&dev->device_lock); - cancel_delayed_work(&dev->timer_work); + dev_err(&pdev->dev, "suspend\n"); - /* Stop watchdog if exists */ - err = mei_wd_stop(dev); - /* Set new mei state */ - if (dev->dev_state == MEI_DEV_ENABLED || - dev->dev_state == MEI_DEV_RECOVERING_FROM_RESET) { - dev->dev_state = MEI_DEV_POWER_DOWN; - mei_reset(dev, 0); - } - mutex_unlock(&dev->device_lock); + mei_stop(dev); + + mei_disable_interrupts(dev); free_irq(pdev->irq, dev); pci_disable_msi(pdev); - return err; + return 0; } static int mei_pci_resume(struct device *device) diff --git a/drivers/misc/vmw_vmci/vmci_datagram.c b/drivers/misc/vmw_vmci/vmci_datagram.c index ed5c433cd493..f3cdd904fe4d 100644 --- a/drivers/misc/vmw_vmci/vmci_datagram.c +++ b/drivers/misc/vmw_vmci/vmci_datagram.c @@ -42,9 +42,11 @@ struct datagram_entry { struct delayed_datagram_info { struct datagram_entry *entry; - struct vmci_datagram msg; struct work_struct work; bool in_dg_host_queue; + /* msg and msg_payload must be together. */ + struct vmci_datagram msg; + u8 msg_payload[]; }; /* Number of in-flight host->host datagrams */ diff --git a/drivers/mtd/bcm47xxpart.c b/drivers/mtd/bcm47xxpart.c index 63feb75cc8e0..9279a9174f84 100644 --- a/drivers/mtd/bcm47xxpart.c +++ b/drivers/mtd/bcm47xxpart.c @@ -19,6 +19,12 @@ /* 10 parts were found on sflash on Netgear WNDR4500 */ #define BCM47XXPART_MAX_PARTS 12 +/* + * Amount of bytes we read when analyzing each block of flash memory. + * Set it big enough to allow detecting partition and reading important data. + */ +#define BCM47XXPART_BYTES_TO_READ 0x404 + /* Magics */ #define BOARD_DATA_MAGIC 0x5246504D /* MPFR */ #define POT_MAGIC1 0x54544f50 /* POTT */ @@ -57,17 +63,15 @@ static int bcm47xxpart_parse(struct mtd_info *master, struct trx_header *trx; int trx_part = -1; int last_trx_part = -1; - int max_bytes_to_read = 0x8004; + int possible_nvram_sizes[] = { 0x8000, 0xF000, 0x10000, }; if (blocksize <= 0x10000) blocksize = 0x10000; - if (blocksize == 0x20000) - max_bytes_to_read = 0x18004; /* Alloc */ parts = kzalloc(sizeof(struct mtd_partition) * BCM47XXPART_MAX_PARTS, GFP_KERNEL); - buf = kzalloc(max_bytes_to_read, GFP_KERNEL); + buf = kzalloc(BCM47XXPART_BYTES_TO_READ, GFP_KERNEL); /* Parse block by block looking for magics */ for (offset = 0; offset <= master->size - blocksize; @@ -82,7 +86,7 @@ static int bcm47xxpart_parse(struct mtd_info *master, } /* Read beginning of the block */ - if (mtd_read(master, offset, max_bytes_to_read, + if (mtd_read(master, offset, BCM47XXPART_BYTES_TO_READ, &bytes_read, (uint8_t *)buf) < 0) { pr_err("mtd_read error while parsing (offset: 0x%X)!\n", offset); @@ -96,20 +100,6 @@ static int bcm47xxpart_parse(struct mtd_info *master, continue; } - /* Standard NVRAM */ - if (buf[0x000 / 4] == NVRAM_HEADER || - buf[0x1000 / 4] == NVRAM_HEADER || - buf[0x8000 / 4] == NVRAM_HEADER || - (blocksize == 0x20000 && ( - buf[0x10000 / 4] == NVRAM_HEADER || - buf[0x11000 / 4] == NVRAM_HEADER || - buf[0x18000 / 4] == NVRAM_HEADER))) { - bcm47xxpart_add_part(&parts[curr_part++], "nvram", - offset, 0); - offset = rounddown(offset, blocksize); - continue; - } - /* * board_data starts with board_id which differs across boards, * but we can use 'MPFR' (hopefully) magic at 0x100 @@ -178,6 +168,30 @@ static int bcm47xxpart_parse(struct mtd_info *master, continue; } } + + /* Look for NVRAM at the end of the last block. */ + for (i = 0; i < ARRAY_SIZE(possible_nvram_sizes); i++) { + if (curr_part > BCM47XXPART_MAX_PARTS) { + pr_warn("Reached maximum number of partitions, scanning stopped!\n"); + break; + } + + offset = master->size - possible_nvram_sizes[i]; + if (mtd_read(master, offset, 0x4, &bytes_read, + (uint8_t *)buf) < 0) { + pr_err("mtd_read error while reading at offset 0x%X!\n", + offset); + continue; + } + + /* Standard NVRAM */ + if (buf[0] == NVRAM_HEADER) { + bcm47xxpart_add_part(&parts[curr_part++], "nvram", + master->size - blocksize, 0); + break; + } + } + kfree(buf); /* diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 43214151b882..42c63927609d 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -1523,6 +1523,14 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from, oobreadlen -= toread; } } + + if (chip->options & NAND_NEED_READRDY) { + /* Apply delay or wait for ready/busy pin */ + if (!chip->dev_ready) + udelay(chip->chip_delay); + else + nand_wait_ready(mtd); + } } else { memcpy(buf, chip->buffers->databuf + col, bytes); buf += bytes; @@ -1787,6 +1795,14 @@ static int nand_do_read_oob(struct mtd_info *mtd, loff_t from, len = min(len, readlen); buf = nand_transfer_oob(chip, buf, ops, len); + if (chip->options & NAND_NEED_READRDY) { + /* Apply delay or wait for ready/busy pin */ + if (!chip->dev_ready) + udelay(chip->chip_delay); + else + nand_wait_ready(mtd); + } + readlen -= len; if (!readlen) break; diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c index e3aa2748a6e7..9c612388e5de 100644 --- a/drivers/mtd/nand/nand_ids.c +++ b/drivers/mtd/nand/nand_ids.c @@ -22,49 +22,51 @@ * 512 512 Byte page size */ struct nand_flash_dev nand_flash_ids[] = { +#define SP_OPTIONS NAND_NEED_READRDY +#define SP_OPTIONS16 (SP_OPTIONS | NAND_BUSWIDTH_16) #ifdef CONFIG_MTD_NAND_MUSEUM_IDS - {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0}, - {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0}, - {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0}, - {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0}, - {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0}, - {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0}, - {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0}, - {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0}, - {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0}, - {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0}, - - {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0}, - {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0}, - {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16}, - {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16}, + {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, SP_OPTIONS}, + {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, SP_OPTIONS}, + {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, SP_OPTIONS}, + {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, SP_OPTIONS}, + {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, SP_OPTIONS}, + {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, SP_OPTIONS}, + {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, SP_OPTIONS}, + {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, SP_OPTIONS}, + {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, SP_OPTIONS}, + {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, SP_OPTIONS}, + + {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, SP_OPTIONS}, + {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, SP_OPTIONS}, + {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, SP_OPTIONS16}, + {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, SP_OPTIONS16}, #endif - {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0}, - {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0}, - {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16}, - {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16}, - - {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0}, - {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0}, - {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16}, - {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16}, - - {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0}, - {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0}, - {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16}, - {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16}, - - {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0}, - {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0}, - {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0}, - {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16}, - {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16}, - {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16}, - {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16}, - - {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0}, + {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, SP_OPTIONS}, + {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, SP_OPTIONS}, + {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, SP_OPTIONS16}, + {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, SP_OPTIONS16}, + + {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, SP_OPTIONS}, + {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, SP_OPTIONS}, + {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, SP_OPTIONS16}, + {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, SP_OPTIONS16}, + + {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, SP_OPTIONS}, + {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, SP_OPTIONS}, + {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, SP_OPTIONS16}, + {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, SP_OPTIONS16}, + + {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, SP_OPTIONS}, + {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, SP_OPTIONS}, + {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, SP_OPTIONS}, + {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, SP_OPTIONS16}, + {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, SP_OPTIONS16}, + {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, SP_OPTIONS16}, + {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, SP_OPTIONS16}, + + {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, SP_OPTIONS}, /* * These are the new chips with large page size. The pagesize and the diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c index 7bd068a6056a..6bbd90e1123c 100644 --- a/drivers/net/bonding/bond_main.c +++ b/drivers/net/bonding/bond_main.c @@ -1746,6 +1746,8 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev) bond_compute_features(bond); + bond_update_speed_duplex(new_slave); + read_lock(&bond->lock); new_slave->last_arp_rx = jiffies - @@ -1798,8 +1800,6 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev) new_slave->link == BOND_LINK_DOWN ? "DOWN" : (new_slave->link == BOND_LINK_UP ? "UP" : "BACK")); - bond_update_speed_duplex(new_slave); - if (USES_PRIMARY(bond->params.mode) && bond->params.primary[0]) { /* if there is a primary slave, remember it */ if (strcmp(bond->params.primary, new_slave->dev->name) == 0) { @@ -1964,7 +1964,6 @@ static int __bond_release_one(struct net_device *bond_dev, } block_netpoll_tx(); - call_netdevice_notifiers(NETDEV_RELEASE, bond_dev); write_lock_bh(&bond->lock); slave = bond_get_slave_by_dev(bond, slave_dev); @@ -2066,8 +2065,10 @@ static int __bond_release_one(struct net_device *bond_dev, write_unlock_bh(&bond->lock); unblock_netpoll_tx(); - if (bond->slave_cnt == 0) + if (bond->slave_cnt == 0) { call_netdevice_notifiers(NETDEV_CHANGEADDR, bond->dev); + call_netdevice_notifiers(NETDEV_RELEASE, bond->dev); + } bond_compute_features(bond); if (!(bond_dev->features & NETIF_F_VLAN_CHALLENGED) && @@ -2373,8 +2374,6 @@ static void bond_miimon_commit(struct bonding *bond) bond_set_backup_slave(slave); } - bond_update_speed_duplex(slave); - pr_info("%s: link status definitely up for interface %s, %u Mbps %s duplex.\n", bond->dev->name, slave->dev->name, slave->speed, slave->duplex ? "full" : "half"); diff --git a/drivers/net/bonding/bond_sysfs.c b/drivers/net/bonding/bond_sysfs.c index 1c9e09fbdff8..db103e03ba05 100644 --- a/drivers/net/bonding/bond_sysfs.c +++ b/drivers/net/bonding/bond_sysfs.c @@ -183,6 +183,11 @@ int bond_create_slave_symlinks(struct net_device *master, sprintf(linkname, "slave_%s", slave->name); ret = sysfs_create_link(&(master->dev.kobj), &(slave->dev.kobj), linkname); + + /* free the master link created earlier in case of error */ + if (ret) + sysfs_remove_link(&(slave->dev.kobj), "master"); + return ret; } diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c index a923bc4d5a1f..4046f97378c2 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c @@ -2760,6 +2760,7 @@ load_error2: bp->port.pmf = 0; load_error1: bnx2x_napi_disable(bp); + bnx2x_del_all_napi(bp); /* clear pf_load status, as it was already set */ if (IS_PF(bp)) diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.c index 568205436a15..91ecd6a00d05 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.c @@ -2139,12 +2139,12 @@ static u8 bnx2x_dcbnl_get_cap(struct net_device *netdev, int capid, u8 *cap) break; default: BNX2X_ERR("Non valid capability ID\n"); - rval = -EINVAL; + rval = 1; break; } } else { DP(BNX2X_MSG_DCB, "DCB disabled\n"); - rval = -EINVAL; + rval = 1; } DP(BNX2X_MSG_DCB, "capid %d:%x\n", capid, *cap); @@ -2170,12 +2170,12 @@ static int bnx2x_dcbnl_get_numtcs(struct net_device *netdev, int tcid, u8 *num) break; default: BNX2X_ERR("Non valid TC-ID\n"); - rval = -EINVAL; + rval = 1; break; } } else { DP(BNX2X_MSG_DCB, "DCB disabled\n"); - rval = -EINVAL; + rval = 1; } return rval; @@ -2188,7 +2188,7 @@ static int bnx2x_dcbnl_set_numtcs(struct net_device *netdev, int tcid, u8 num) return -EINVAL; } -static u8 bnx2x_dcbnl_get_pfc_state(struct net_device *netdev) +static u8 bnx2x_dcbnl_get_pfc_state(struct net_device *netdev) { struct bnx2x *bp = netdev_priv(netdev); DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcbx_local_feat.pfc.enabled); @@ -2390,12 +2390,12 @@ static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid, break; default: BNX2X_ERR("Non valid featrue-ID\n"); - rval = -EINVAL; + rval = 1; break; } } else { DP(BNX2X_MSG_DCB, "DCB disabled\n"); - rval = -EINVAL; + rval = 1; } return rval; @@ -2431,12 +2431,12 @@ static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid, break; default: BNX2X_ERR("Non valid featrue-ID\n"); - rval = -EINVAL; + rval = 1; break; } } else { DP(BNX2X_MSG_DCB, "dcbnl call not valid\n"); - rval = -EINVAL; + rval = 1; } return rval; diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c index 31c5787970db..77ebae0ac64a 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c @@ -8647,7 +8647,9 @@ void bnx2x_handle_module_detect_int(struct link_params *params) MDIO_WC_DEVAD, MDIO_WC_REG_DIGITAL5_MISC6, &rx_tx_in_reset); - if (!rx_tx_in_reset) { + if ((!rx_tx_in_reset) && + (params->link_flags & + PHY_INITIALIZED)) { bnx2x_warpcore_reset_lane(bp, phy, 1); bnx2x_warpcore_config_sfi(phy, params); bnx2x_warpcore_reset_lane(bp, phy, 0); @@ -12527,6 +12529,8 @@ int bnx2x_phy_init(struct link_params *params, struct link_vars *vars) vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE; vars->mac_type = MAC_TYPE_NONE; vars->phy_flags = 0; + vars->check_kr2_recovery_cnt = 0; + params->link_flags = PHY_INITIALIZED; /* Driver opens NIG-BRB filters */ bnx2x_set_rx_filter(params, 1); /* Check if link flap can be avoided */ @@ -12691,6 +12695,7 @@ int bnx2x_lfa_reset(struct link_params *params, struct bnx2x *bp = params->bp; vars->link_up = 0; vars->phy_flags = 0; + params->link_flags &= ~PHY_INITIALIZED; if (!params->lfa_base) return bnx2x_link_reset(params, vars, 1); /* @@ -13411,6 +13416,7 @@ static void bnx2x_disable_kr2(struct link_params *params, vars->link_attr_sync &= ~LINK_ATTR_SYNC_KR2_ENABLE; bnx2x_update_link_attr(params, vars->link_attr_sync); + vars->check_kr2_recovery_cnt = CHECK_KR2_RECOVERY_CNT; /* Restart AN on leading lane */ bnx2x_warpcore_restart_AN_KR(phy, params); } @@ -13439,6 +13445,15 @@ static void bnx2x_check_kr2_wa(struct link_params *params, return; } + /* Once KR2 was disabled, wait 5 seconds before checking KR2 recovery + * since some switches tend to reinit the AN process and clear the + * advertised BP/NP after ~2 seconds causing the KR2 to be disabled + * and recovered many times + */ + if (vars->check_kr2_recovery_cnt > 0) { + vars->check_kr2_recovery_cnt--; + return; + } lane = bnx2x_get_warpcore_lane(phy, params); CL22_WR_OVER_CL45(bp, phy, MDIO_REG_BANK_AER_BLOCK, MDIO_AER_BLOCK_AER_REG, lane); diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h index be5c195d03dd..56c2aae4e2c8 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h @@ -309,6 +309,7 @@ struct link_params { req_flow_ctrl is set to AUTO */ u16 link_flags; #define LINK_FLAGS_INT_DISABLED (1<<0) +#define PHY_INITIALIZED (1<<1) u32 lfa_base; }; @@ -342,7 +343,8 @@ struct link_vars { u32 link_status; u32 eee_status; u8 fault_detected; - u8 rsrv1; + u8 check_kr2_recovery_cnt; +#define CHECK_KR2_RECOVERY_CNT 5 u16 periodic_flags; #define PERIODIC_FLAGS_LINK_EVENT 0x0001 diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h index 364e37ecbc5c..198f6f1c9ad5 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_stats.h @@ -459,8 +459,9 @@ struct bnx2x_fw_port_stats_old { #define UPDATE_QSTAT(s, t) \ do { \ - qstats->t##_hi = qstats_old->t##_hi + le32_to_cpu(s.hi); \ qstats->t##_lo = qstats_old->t##_lo + le32_to_cpu(s.lo); \ + qstats->t##_hi = qstats_old->t##_hi + le32_to_cpu(s.hi) \ + + ((qstats->t##_lo < qstats_old->t##_lo) ? 1 : 0); \ } while (0) #define UPDATE_QSTAT_OLD(f) \ diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c index fdb9b5655414..67d2663b3974 100644 --- a/drivers/net/ethernet/broadcom/tg3.c +++ b/drivers/net/ethernet/broadcom/tg3.c @@ -1869,6 +1869,8 @@ static void tg3_link_report(struct tg3 *tp) tg3_ump_link_report(tp); } + + tp->link_up = netif_carrier_ok(tp->dev); } static u16 tg3_advert_flowctrl_1000X(u8 flow_ctrl) @@ -2522,12 +2524,6 @@ static int tg3_phy_reset_5703_4_5(struct tg3 *tp) return err; } -static void tg3_carrier_on(struct tg3 *tp) -{ - netif_carrier_on(tp->dev); - tp->link_up = true; -} - static void tg3_carrier_off(struct tg3 *tp) { netif_carrier_off(tp->dev); @@ -2553,7 +2549,7 @@ static int tg3_phy_reset(struct tg3 *tp) return -EBUSY; if (netif_running(tp->dev) && tp->link_up) { - tg3_carrier_off(tp); + netif_carrier_off(tp->dev); tg3_link_report(tp); } @@ -4134,6 +4130,14 @@ static void tg3_phy_copper_begin(struct tg3 *tp) tp->link_config.active_speed = tp->link_config.speed; tp->link_config.active_duplex = tp->link_config.duplex; + if (tg3_asic_rev(tp) == ASIC_REV_5714) { + /* With autoneg disabled, 5715 only links up when the + * advertisement register has the configured speed + * enabled. + */ + tg3_writephy(tp, MII_ADVERTISE, ADVERTISE_ALL); + } + bmcr = 0; switch (tp->link_config.speed) { default: @@ -4262,9 +4266,9 @@ static bool tg3_test_and_report_link_chg(struct tg3 *tp, int curr_link_up) { if (curr_link_up != tp->link_up) { if (curr_link_up) { - tg3_carrier_on(tp); + netif_carrier_on(tp->dev); } else { - tg3_carrier_off(tp); + netif_carrier_off(tp->dev); if (tp->phy_flags & TG3_PHYFLG_MII_SERDES) tp->phy_flags &= ~TG3_PHYFLG_PARALLEL_DETECT; } diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c index 4ce62031f62f..8049268ce0f2 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c @@ -497,8 +497,9 @@ int t4_memory_write(struct adapter *adap, int mtype, u32 addr, u32 len, } #define EEPROM_STAT_ADDR 0x7bfc -#define VPD_BASE 0 #define VPD_LEN 512 +#define VPD_BASE 0x400 +#define VPD_BASE_OLD 0 /** * t4_seeprom_wp - enable/disable EEPROM write protection @@ -524,7 +525,7 @@ int t4_seeprom_wp(struct adapter *adapter, bool enable) int get_vpd_params(struct adapter *adapter, struct vpd_params *p) { u32 cclk_param, cclk_val; - int i, ret; + int i, ret, addr; int ec, sn; u8 *vpd, csum; unsigned int vpdr_len, kw_offset, id_len; @@ -533,7 +534,12 @@ int get_vpd_params(struct adapter *adapter, struct vpd_params *p) if (!vpd) return -ENOMEM; - ret = pci_read_vpd(adapter->pdev, VPD_BASE, VPD_LEN, vpd); + ret = pci_read_vpd(adapter->pdev, VPD_BASE, sizeof(u32), vpd); + if (ret < 0) + goto out; + addr = *vpd == 0x82 ? VPD_BASE : VPD_BASE_OLD; + + ret = pci_read_vpd(adapter->pdev, addr, VPD_LEN, vpd); if (ret < 0) goto out; diff --git a/drivers/net/ethernet/dec/tulip/Kconfig b/drivers/net/ethernet/dec/tulip/Kconfig index 0c37fb2cc867..1df33c799c00 100644 --- a/drivers/net/ethernet/dec/tulip/Kconfig +++ b/drivers/net/ethernet/dec/tulip/Kconfig @@ -108,6 +108,7 @@ config TULIP_DM910X config DE4X5 tristate "Generic DECchip & DIGITAL EtherWORKS PCI/EISA" depends on (PCI || EISA) + depends on VIRT_TO_BUS || ALPHA || PPC || SPARC select CRC32 ---help--- This is support for the DIGITAL series of PCI/EISA Ethernet cards. diff --git a/drivers/net/ethernet/emulex/benet/be.h b/drivers/net/ethernet/emulex/benet/be.h index 28ceb8414185..29aff55f2eea 100644 --- a/drivers/net/ethernet/emulex/benet/be.h +++ b/drivers/net/ethernet/emulex/benet/be.h @@ -349,6 +349,7 @@ struct be_adapter { struct pci_dev *pdev; struct net_device *netdev; + u8 __iomem *csr; /* CSR BAR used only for BE2/3 */ u8 __iomem *db; /* Door Bell */ struct mutex mbox_lock; /* For serializing mbox cmds to BE card */ diff --git a/drivers/net/ethernet/emulex/benet/be_cmds.c b/drivers/net/ethernet/emulex/benet/be_cmds.c index 071aea79d218..3c9b4f12e3e5 100644 --- a/drivers/net/ethernet/emulex/benet/be_cmds.c +++ b/drivers/net/ethernet/emulex/benet/be_cmds.c @@ -473,19 +473,17 @@ static int be_mbox_notify_wait(struct be_adapter *adapter) return 0; } -static int be_POST_stage_get(struct be_adapter *adapter, u16 *stage) +static u16 be_POST_stage_get(struct be_adapter *adapter) { u32 sem; - u32 reg = skyhawk_chip(adapter) ? SLIPORT_SEMAPHORE_OFFSET_SH : - SLIPORT_SEMAPHORE_OFFSET_BE; - pci_read_config_dword(adapter->pdev, reg, &sem); - *stage = sem & POST_STAGE_MASK; - - if ((sem >> POST_ERR_SHIFT) & POST_ERR_MASK) - return -1; + if (BEx_chip(adapter)) + sem = ioread32(adapter->csr + SLIPORT_SEMAPHORE_OFFSET_BEx); else - return 0; + pci_read_config_dword(adapter->pdev, + SLIPORT_SEMAPHORE_OFFSET_SH, &sem); + + return sem & POST_STAGE_MASK; } int lancer_wait_ready(struct be_adapter *adapter) @@ -579,19 +577,17 @@ int be_fw_wait_ready(struct be_adapter *adapter) } do { - status = be_POST_stage_get(adapter, &stage); - if (status) { - dev_err(dev, "POST error; stage=0x%x\n", stage); - return -1; - } else if (stage != POST_STAGE_ARMFW_RDY) { - if (msleep_interruptible(2000)) { - dev_err(dev, "Waiting for POST aborted\n"); - return -EINTR; - } - timeout += 2; - } else { + stage = be_POST_stage_get(adapter); + if (stage == POST_STAGE_ARMFW_RDY) return 0; + + dev_info(dev, "Waiting for POST, %ds elapsed\n", + timeout); + if (msleep_interruptible(2000)) { + dev_err(dev, "Waiting for POST aborted\n"); + return -EINTR; } + timeout += 2; } while (timeout < 60); dev_err(dev, "POST timeout; stage=0x%x\n", stage); diff --git a/drivers/net/ethernet/emulex/benet/be_hw.h b/drivers/net/ethernet/emulex/benet/be_hw.h index 541d4530d5bf..62dc220695f7 100644 --- a/drivers/net/ethernet/emulex/benet/be_hw.h +++ b/drivers/net/ethernet/emulex/benet/be_hw.h @@ -32,8 +32,8 @@ #define MPU_EP_CONTROL 0 /********** MPU semphore: used for SH & BE *************/ -#define SLIPORT_SEMAPHORE_OFFSET_BE 0x7c -#define SLIPORT_SEMAPHORE_OFFSET_SH 0x94 +#define SLIPORT_SEMAPHORE_OFFSET_BEx 0xac /* CSR BAR offset */ +#define SLIPORT_SEMAPHORE_OFFSET_SH 0x94 /* PCI-CFG offset */ #define POST_STAGE_MASK 0x0000FFFF #define POST_ERR_MASK 0x1 #define POST_ERR_SHIFT 31 diff --git a/drivers/net/ethernet/emulex/benet/be_main.c b/drivers/net/ethernet/emulex/benet/be_main.c index 3860888ac711..08e54f3d288b 100644 --- a/drivers/net/ethernet/emulex/benet/be_main.c +++ b/drivers/net/ethernet/emulex/benet/be_main.c @@ -3688,6 +3688,8 @@ static void be_netdev_init(struct net_device *netdev) static void be_unmap_pci_bars(struct be_adapter *adapter) { + if (adapter->csr) + pci_iounmap(adapter->pdev, adapter->csr); if (adapter->db) pci_iounmap(adapter->pdev, adapter->db); } @@ -3721,6 +3723,12 @@ static int be_map_pci_bars(struct be_adapter *adapter) adapter->if_type = (sli_intf & SLI_INTF_IF_TYPE_MASK) >> SLI_INTF_IF_TYPE_SHIFT; + if (BEx_chip(adapter) && be_physfn(adapter)) { + adapter->csr = pci_iomap(adapter->pdev, 2, 0); + if (adapter->csr == NULL) + return -ENOMEM; + } + addr = pci_iomap(adapter->pdev, db_bar(adapter), 0); if (addr == NULL) goto pci_map_err; @@ -4329,6 +4337,8 @@ static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev) pci_restore_state(pdev); /* Check if card is ok and fw is ready */ + dev_info(&adapter->pdev->dev, + "Waiting for FW to be ready after EEH reset\n"); status = be_fw_wait_ready(adapter); if (status) return PCI_ERS_RESULT_DISCONNECT; diff --git a/drivers/net/ethernet/freescale/fec.c b/drivers/net/ethernet/freescale/fec.c index 069a155d16ed..911d0253dbb2 100644 --- a/drivers/net/ethernet/freescale/fec.c +++ b/drivers/net/ethernet/freescale/fec.c @@ -934,24 +934,28 @@ static void fec_enet_adjust_link(struct net_device *ndev) goto spin_unlock; } - /* Duplex link change */ if (phy_dev->link) { - if (fep->full_duplex != phy_dev->duplex) { - fec_restart(ndev, phy_dev->duplex); - /* prevent unnecessary second fec_restart() below */ + if (!fep->link) { fep->link = phy_dev->link; status_change = 1; } - } - /* Link on or off change */ - if (phy_dev->link != fep->link) { - fep->link = phy_dev->link; - if (phy_dev->link) + if (fep->full_duplex != phy_dev->duplex) + status_change = 1; + + if (phy_dev->speed != fep->speed) { + fep->speed = phy_dev->speed; + status_change = 1; + } + + /* if any of the above changed restart the FEC */ + if (status_change) fec_restart(ndev, phy_dev->duplex); - else + } else { + if (fep->link) { fec_stop(ndev); - status_change = 1; + status_change = 1; + } } spin_unlock: @@ -1328,7 +1332,7 @@ static int fec_enet_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd) static void fec_enet_free_buffers(struct net_device *ndev) { struct fec_enet_private *fep = netdev_priv(ndev); - int i; + unsigned int i; struct sk_buff *skb; struct bufdesc *bdp; @@ -1352,7 +1356,7 @@ static void fec_enet_free_buffers(struct net_device *ndev) static int fec_enet_alloc_buffers(struct net_device *ndev) { struct fec_enet_private *fep = netdev_priv(ndev); - int i; + unsigned int i; struct sk_buff *skb; struct bufdesc *bdp; @@ -1437,6 +1441,7 @@ fec_enet_close(struct net_device *ndev) struct fec_enet_private *fep = netdev_priv(ndev); /* Don't know what to do yet. */ + napi_disable(&fep->napi); fep->opened = 0; netif_stop_queue(ndev); fec_stop(ndev); @@ -1593,7 +1598,7 @@ static int fec_enet_init(struct net_device *ndev) struct fec_enet_private *fep = netdev_priv(ndev); struct bufdesc *cbd_base; struct bufdesc *bdp; - int i; + unsigned int i; /* Allocate memory for buffer descriptors. */ cbd_base = dma_alloc_coherent(NULL, PAGE_SIZE, &fep->bd_dma, diff --git a/drivers/net/ethernet/freescale/fec.h b/drivers/net/ethernet/freescale/fec.h index f5390071efd0..eb4372962839 100644 --- a/drivers/net/ethernet/freescale/fec.h +++ b/drivers/net/ethernet/freescale/fec.h @@ -240,6 +240,7 @@ struct fec_enet_private { phy_interface_t phy_interface; int link; int full_duplex; + int speed; struct completion mdio_done; int irq[FEC_IRQ_NUM]; int bufdesc_ex; diff --git a/drivers/net/ethernet/freescale/fec_ptp.c b/drivers/net/ethernet/freescale/fec_ptp.c index 1f17ca0f2201..0d8df400a479 100644 --- a/drivers/net/ethernet/freescale/fec_ptp.c +++ b/drivers/net/ethernet/freescale/fec_ptp.c @@ -128,6 +128,7 @@ void fec_ptp_start_cyclecounter(struct net_device *ndev) spin_unlock_irqrestore(&fep->tmreg_lock, flags); } +EXPORT_SYMBOL(fec_ptp_start_cyclecounter); /** * fec_ptp_adjfreq - adjust ptp cycle frequency @@ -318,6 +319,7 @@ int fec_ptp_ioctl(struct net_device *ndev, struct ifreq *ifr, int cmd) return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ? -EFAULT : 0; } +EXPORT_SYMBOL(fec_ptp_ioctl); /** * fec_time_keep - call timecounter_read every second to avoid timer overrun @@ -383,3 +385,4 @@ void fec_ptp_init(struct net_device *ndev, struct platform_device *pdev) pr_info("registered PHC device on %s\n", ndev->name); } } +EXPORT_SYMBOL(fec_ptp_init); diff --git a/drivers/net/ethernet/intel/e1000e/ethtool.c b/drivers/net/ethernet/intel/e1000e/ethtool.c index 2c1813737f6d..f91a8f3f9d48 100644 --- a/drivers/net/ethernet/intel/e1000e/ethtool.c +++ b/drivers/net/ethernet/intel/e1000e/ethtool.c @@ -36,6 +36,7 @@ #include <linux/delay.h> #include <linux/vmalloc.h> #include <linux/mdio.h> +#include <linux/pm_runtime.h> #include "e1000.h" @@ -2229,7 +2230,19 @@ static int e1000e_get_ts_info(struct net_device *netdev, return 0; } +static int e1000e_ethtool_begin(struct net_device *netdev) +{ + return pm_runtime_get_sync(netdev->dev.parent); +} + +static void e1000e_ethtool_complete(struct net_device *netdev) +{ + pm_runtime_put_sync(netdev->dev.parent); +} + static const struct ethtool_ops e1000_ethtool_ops = { + .begin = e1000e_ethtool_begin, + .complete = e1000e_ethtool_complete, .get_settings = e1000_get_settings, .set_settings = e1000_set_settings, .get_drvinfo = e1000_get_drvinfo, diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c index dff7bff8b8e0..121a865c7fbd 100644 --- a/drivers/net/ethernet/intel/e1000e/ich8lan.c +++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c @@ -782,6 +782,59 @@ release: } /** + * e1000_k1_workaround_lpt_lp - K1 workaround on Lynxpoint-LP + * @hw: pointer to the HW structure + * @link: link up bool flag + * + * When K1 is enabled for 1Gbps, the MAC can miss 2 DMA completion indications + * preventing further DMA write requests. Workaround the issue by disabling + * the de-assertion of the clock request when in 1Gpbs mode. + **/ +static s32 e1000_k1_workaround_lpt_lp(struct e1000_hw *hw, bool link) +{ + u32 fextnvm6 = er32(FEXTNVM6); + s32 ret_val = 0; + + if (link && (er32(STATUS) & E1000_STATUS_SPEED_1000)) { + u16 kmrn_reg; + + ret_val = hw->phy.ops.acquire(hw); + if (ret_val) + return ret_val; + + ret_val = + e1000e_read_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_K1_CONFIG, + &kmrn_reg); + if (ret_val) + goto release; + + ret_val = + e1000e_write_kmrn_reg_locked(hw, + E1000_KMRNCTRLSTA_K1_CONFIG, + kmrn_reg & + ~E1000_KMRNCTRLSTA_K1_ENABLE); + if (ret_val) + goto release; + + usleep_range(10, 20); + + ew32(FEXTNVM6, fextnvm6 | E1000_FEXTNVM6_REQ_PLL_CLK); + + ret_val = + e1000e_write_kmrn_reg_locked(hw, + E1000_KMRNCTRLSTA_K1_CONFIG, + kmrn_reg); +release: + hw->phy.ops.release(hw); + } else { + /* clear FEXTNVM6 bit 8 on link down or 10/100 */ + ew32(FEXTNVM6, fextnvm6 & ~E1000_FEXTNVM6_REQ_PLL_CLK); + } + + return ret_val; +} + +/** * e1000_check_for_copper_link_ich8lan - Check for link (Copper) * @hw: pointer to the HW structure * @@ -818,6 +871,14 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) return ret_val; } + /* Work-around I218 hang issue */ + if ((hw->adapter->pdev->device == E1000_DEV_ID_PCH_LPTLP_I218_LM) || + (hw->adapter->pdev->device == E1000_DEV_ID_PCH_LPTLP_I218_V)) { + ret_val = e1000_k1_workaround_lpt_lp(hw, link); + if (ret_val) + return ret_val; + } + /* Clear link partner's EEE ability */ hw->dev_spec.ich8lan.eee_lp_ability = 0; @@ -3954,8 +4015,16 @@ void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw) phy_ctrl = er32(PHY_CTRL); phy_ctrl |= E1000_PHY_CTRL_GBE_DISABLE; + if (hw->phy.type == e1000_phy_i217) { - u16 phy_reg; + u16 phy_reg, device_id = hw->adapter->pdev->device; + + if ((device_id == E1000_DEV_ID_PCH_LPTLP_I218_LM) || + (device_id == E1000_DEV_ID_PCH_LPTLP_I218_V)) { + u32 fextnvm6 = er32(FEXTNVM6); + + ew32(FEXTNVM6, fextnvm6 & ~E1000_FEXTNVM6_REQ_PLL_CLK); + } ret_val = hw->phy.ops.acquire(hw); if (ret_val) diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.h b/drivers/net/ethernet/intel/e1000e/ich8lan.h index b6d3174d7d2d..8bf4655c2e17 100644 --- a/drivers/net/ethernet/intel/e1000e/ich8lan.h +++ b/drivers/net/ethernet/intel/e1000e/ich8lan.h @@ -92,6 +92,8 @@ #define E1000_FEXTNVM4_BEACON_DURATION_8USEC 0x7 #define E1000_FEXTNVM4_BEACON_DURATION_16USEC 0x3 +#define E1000_FEXTNVM6_REQ_PLL_CLK 0x00000100 + #define PCIE_ICH8_SNOOP_ALL PCIE_NO_SNOOP_ALL #define E1000_ICH_RAR_ENTRIES 7 diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c index a177b8b65c44..948b86ffa4f0 100644 --- a/drivers/net/ethernet/intel/e1000e/netdev.c +++ b/drivers/net/ethernet/intel/e1000e/netdev.c @@ -4303,6 +4303,7 @@ static int e1000_open(struct net_device *netdev) netif_start_queue(netdev); adapter->idle_check = true; + hw->mac.get_link_status = true; pm_runtime_put(&pdev->dev); /* fire a link status change interrupt to start the watchdog */ @@ -4662,6 +4663,7 @@ static void e1000_phy_read_status(struct e1000_adapter *adapter) (adapter->hw.phy.media_type == e1000_media_type_copper)) { int ret_val; + pm_runtime_get_sync(&adapter->pdev->dev); ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr); ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr); ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise); @@ -4672,6 +4674,7 @@ static void e1000_phy_read_status(struct e1000_adapter *adapter) ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus); if (ret_val) e_warn("Error reading PHY register\n"); + pm_runtime_put_sync(&adapter->pdev->dev); } else { /* Do not read PHY registers if link is not up * Set values to typical power-on defaults @@ -5887,8 +5890,7 @@ release: return retval; } -static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake, - bool runtime) +static int __e1000_shutdown(struct pci_dev *pdev, bool runtime) { struct net_device *netdev = pci_get_drvdata(pdev); struct e1000_adapter *adapter = netdev_priv(netdev); @@ -5912,10 +5914,6 @@ static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake, } e1000e_reset_interrupt_capability(adapter); - retval = pci_save_state(pdev); - if (retval) - return retval; - status = er32(STATUS); if (status & E1000_STATUS_LU) wufc &= ~E1000_WUFC_LNKC; @@ -5971,13 +5969,6 @@ static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake, ew32(WUFC, 0); } - *enable_wake = !!wufc; - - /* make sure adapter isn't asleep if manageability is enabled */ - if ((adapter->flags & FLAG_MNG_PT_ENABLED) || - (hw->mac.ops.check_mng_mode(hw))) - *enable_wake = true; - if (adapter->hw.phy.type == e1000_phy_igp_3) e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw); @@ -5986,27 +5977,7 @@ static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake, */ e1000e_release_hw_control(adapter); - pci_disable_device(pdev); - - return 0; -} - -static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake) -{ - if (sleep && wake) { - pci_prepare_to_sleep(pdev); - return; - } - - pci_wake_from_d3(pdev, wake); - pci_set_power_state(pdev, PCI_D3hot); -} - -static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep, - bool wake) -{ - struct net_device *netdev = pci_get_drvdata(pdev); - struct e1000_adapter *adapter = netdev_priv(netdev); + pci_clear_master(pdev); /* The pci-e switch on some quad port adapters will report a * correctable error when the MAC transitions from D0 to D3. To @@ -6021,12 +5992,13 @@ static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep, pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, (devctl & ~PCI_EXP_DEVCTL_CERE)); - e1000_power_off(pdev, sleep, wake); + pci_save_state(pdev); + pci_prepare_to_sleep(pdev); pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl); - } else { - e1000_power_off(pdev, sleep, wake); } + + return 0; } #ifdef CONFIG_PCIEASPM @@ -6084,9 +6056,7 @@ static int __e1000_resume(struct pci_dev *pdev) if (aspm_disable_flag) e1000e_disable_aspm(pdev, aspm_disable_flag); - pci_set_power_state(pdev, PCI_D0); - pci_restore_state(pdev); - pci_save_state(pdev); + pci_set_master(pdev); e1000e_set_interrupt_capability(adapter); if (netif_running(netdev)) { @@ -6152,14 +6122,8 @@ static int __e1000_resume(struct pci_dev *pdev) static int e1000_suspend(struct device *dev) { struct pci_dev *pdev = to_pci_dev(dev); - int retval; - bool wake; - - retval = __e1000_shutdown(pdev, &wake, false); - if (!retval) - e1000_complete_shutdown(pdev, true, wake); - return retval; + return __e1000_shutdown(pdev, false); } static int e1000_resume(struct device *dev) @@ -6182,13 +6146,10 @@ static int e1000_runtime_suspend(struct device *dev) struct net_device *netdev = pci_get_drvdata(pdev); struct e1000_adapter *adapter = netdev_priv(netdev); - if (e1000e_pm_ready(adapter)) { - bool wake; - - __e1000_shutdown(pdev, &wake, true); - } + if (!e1000e_pm_ready(adapter)) + return 0; - return 0; + return __e1000_shutdown(pdev, true); } static int e1000_idle(struct device *dev) @@ -6226,12 +6187,7 @@ static int e1000_runtime_resume(struct device *dev) static void e1000_shutdown(struct pci_dev *pdev) { - bool wake = false; - - __e1000_shutdown(pdev, &wake, false); - - if (system_state == SYSTEM_POWER_OFF) - e1000_complete_shutdown(pdev, false, wake); + __e1000_shutdown(pdev, false); } #ifdef CONFIG_NET_POLL_CONTROLLER @@ -6352,9 +6308,9 @@ static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) "Cannot re-enable PCI device after reset.\n"); result = PCI_ERS_RESULT_DISCONNECT; } else { - pci_set_master(pdev); pdev->state_saved = true; pci_restore_state(pdev); + pci_set_master(pdev); pci_enable_wake(pdev, PCI_D3hot, 0); pci_enable_wake(pdev, PCI_D3cold, 0); @@ -6783,7 +6739,11 @@ static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent) /* initialize the wol settings based on the eeprom settings */ adapter->wol = adapter->eeprom_wol; - device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); + + /* make sure adapter isn't asleep if manageability is enabled */ + if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) || + (hw->mac.ops.check_mng_mode(hw))) + device_wakeup_enable(&pdev->dev); /* save off EEPROM version number */ e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers); diff --git a/drivers/net/ethernet/intel/e1000e/regs.h b/drivers/net/ethernet/intel/e1000e/regs.h index 794fe1497666..a7e6a3e37257 100644 --- a/drivers/net/ethernet/intel/e1000e/regs.h +++ b/drivers/net/ethernet/intel/e1000e/regs.h @@ -42,6 +42,7 @@ #define E1000_FEXTNVM 0x00028 /* Future Extended NVM - RW */ #define E1000_FEXTNVM3 0x0003C /* Future Extended NVM 3 - RW */ #define E1000_FEXTNVM4 0x00024 /* Future Extended NVM 4 - RW */ +#define E1000_FEXTNVM6 0x00010 /* Future Extended NVM 6 - RW */ #define E1000_FEXTNVM7 0x000E4 /* Future Extended NVM 7 - RW */ #define E1000_FCT 0x00030 /* Flow Control Type - RW */ #define E1000_VET 0x00038 /* VLAN Ether Type - RW */ diff --git a/drivers/net/ethernet/intel/igb/e1000_82575.c b/drivers/net/ethernet/intel/igb/e1000_82575.c index 84e7e0909def..12b1d8480808 100644 --- a/drivers/net/ethernet/intel/igb/e1000_82575.c +++ b/drivers/net/ethernet/intel/igb/e1000_82575.c @@ -1361,11 +1361,16 @@ static s32 igb_setup_copper_link_82575(struct e1000_hw *hw) switch (hw->phy.type) { case e1000_phy_i210: case e1000_phy_m88: - if (hw->phy.id == I347AT4_E_PHY_ID || - hw->phy.id == M88E1112_E_PHY_ID) + switch (hw->phy.id) { + case I347AT4_E_PHY_ID: + case M88E1112_E_PHY_ID: + case I210_I_PHY_ID: ret_val = igb_copper_link_setup_m88_gen2(hw); - else + break; + default: ret_val = igb_copper_link_setup_m88(hw); + break; + } break; case e1000_phy_igp_3: ret_val = igb_copper_link_setup_igp(hw); @@ -1813,27 +1818,32 @@ out: **/ void igb_vmdq_set_anti_spoofing_pf(struct e1000_hw *hw, bool enable, int pf) { - u32 dtxswc; + u32 reg_val, reg_offset; switch (hw->mac.type) { case e1000_82576: + reg_offset = E1000_DTXSWC; + break; case e1000_i350: - dtxswc = rd32(E1000_DTXSWC); - if (enable) { - dtxswc |= (E1000_DTXSWC_MAC_SPOOF_MASK | - E1000_DTXSWC_VLAN_SPOOF_MASK); - /* The PF can spoof - it has to in order to - * support emulation mode NICs */ - dtxswc ^= (1 << pf | 1 << (pf + MAX_NUM_VFS)); - } else { - dtxswc &= ~(E1000_DTXSWC_MAC_SPOOF_MASK | - E1000_DTXSWC_VLAN_SPOOF_MASK); - } - wr32(E1000_DTXSWC, dtxswc); + reg_offset = E1000_TXSWC; break; default: - break; + return; + } + + reg_val = rd32(reg_offset); + if (enable) { + reg_val |= (E1000_DTXSWC_MAC_SPOOF_MASK | + E1000_DTXSWC_VLAN_SPOOF_MASK); + /* The PF can spoof - it has to in order to + * support emulation mode NICs + */ + reg_val ^= (1 << pf | 1 << (pf + MAX_NUM_VFS)); + } else { + reg_val &= ~(E1000_DTXSWC_MAC_SPOOF_MASK | + E1000_DTXSWC_VLAN_SPOOF_MASK); } + wr32(reg_offset, reg_val); } /** diff --git a/drivers/net/ethernet/intel/igb/igb.h b/drivers/net/ethernet/intel/igb/igb.h index d27edbc63923..25151401c2ab 100644 --- a/drivers/net/ethernet/intel/igb/igb.h +++ b/drivers/net/ethernet/intel/igb/igb.h @@ -447,7 +447,7 @@ struct igb_adapter { #endif struct i2c_algo_bit_data i2c_algo; struct i2c_adapter i2c_adap; - struct igb_i2c_client_list *i2c_clients; + struct i2c_client *i2c_client; }; #define IGB_FLAG_HAS_MSI (1 << 0) diff --git a/drivers/net/ethernet/intel/igb/igb_hwmon.c b/drivers/net/ethernet/intel/igb/igb_hwmon.c index 0a9b073d0b03..0478a1abe541 100644 --- a/drivers/net/ethernet/intel/igb/igb_hwmon.c +++ b/drivers/net/ethernet/intel/igb/igb_hwmon.c @@ -39,6 +39,10 @@ #include <linux/pci.h> #ifdef CONFIG_IGB_HWMON +static struct i2c_board_info i350_sensor_info = { + I2C_BOARD_INFO("i350bb", (0Xf8 >> 1)), +}; + /* hwmon callback functions */ static ssize_t igb_hwmon_show_location(struct device *dev, struct device_attribute *attr, @@ -188,6 +192,7 @@ int igb_sysfs_init(struct igb_adapter *adapter) unsigned int i; int n_attrs; int rc = 0; + struct i2c_client *client = NULL; /* If this method isn't defined we don't support thermals */ if (adapter->hw.mac.ops.init_thermal_sensor_thresh == NULL) @@ -198,6 +203,15 @@ int igb_sysfs_init(struct igb_adapter *adapter) if (rc) goto exit; + /* init i2c_client */ + client = i2c_new_device(&adapter->i2c_adap, &i350_sensor_info); + if (client == NULL) { + dev_info(&adapter->pdev->dev, + "Failed to create new i2c device..\n"); + goto exit; + } + adapter->i2c_client = client; + /* Allocation space for max attributes * max num sensors * values (loc, temp, max, caution) */ diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c index ed79a1c53b59..8496adfc6a68 100644 --- a/drivers/net/ethernet/intel/igb/igb_main.c +++ b/drivers/net/ethernet/intel/igb/igb_main.c @@ -1923,10 +1923,6 @@ void igb_set_fw_version(struct igb_adapter *adapter) return; } -static const struct i2c_board_info i350_sensor_info = { - I2C_BOARD_INFO("i350bb", 0Xf8), -}; - /* igb_init_i2c - Init I2C interface * @adapter: pointer to adapter structure * @@ -2546,8 +2542,8 @@ static void igb_probe_vfs(struct igb_adapter *adapter) if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) return; - igb_enable_sriov(pdev, max_vfs); pci_sriov_set_totalvfs(pdev, 7); + igb_enable_sriov(pdev, max_vfs); #endif /* CONFIG_PCI_IOV */ } @@ -2656,7 +2652,7 @@ static int igb_sw_init(struct igb_adapter *adapter) if (max_vfs > 7) { dev_warn(&pdev->dev, "Maximum of 7 VFs per PF, using max\n"); - adapter->vfs_allocated_count = 7; + max_vfs = adapter->vfs_allocated_count = 7; } else adapter->vfs_allocated_count = max_vfs; if (adapter->vfs_allocated_count) @@ -6227,13 +6223,6 @@ static struct sk_buff *igb_build_rx_buffer(struct igb_ring *rx_ring, /* If we spanned a buffer we have a huge mess so test for it */ BUG_ON(unlikely(!igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP))); - /* Guarantee this function can be used by verifying buffer sizes */ - BUILD_BUG_ON(SKB_WITH_OVERHEAD(IGB_RX_BUFSZ) < (NET_SKB_PAD + - NET_IP_ALIGN + - IGB_TS_HDR_LEN + - ETH_FRAME_LEN + - ETH_FCS_LEN)); - rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean]; page = rx_buffer->page; prefetchw(page); @@ -7724,67 +7713,6 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba) } } -static DEFINE_SPINLOCK(i2c_clients_lock); - -/* igb_get_i2c_client - returns matching client - * in adapters's client list. - * @adapter: adapter struct - * @dev_addr: device address of i2c needed. - */ -static struct i2c_client * -igb_get_i2c_client(struct igb_adapter *adapter, u8 dev_addr) -{ - ulong flags; - struct igb_i2c_client_list *client_list; - struct i2c_client *client = NULL; - struct i2c_board_info client_info = { - I2C_BOARD_INFO("igb", 0x00), - }; - - spin_lock_irqsave(&i2c_clients_lock, flags); - client_list = adapter->i2c_clients; - - /* See if we already have an i2c_client */ - while (client_list) { - if (client_list->client->addr == (dev_addr >> 1)) { - client = client_list->client; - goto exit; - } else { - client_list = client_list->next; - } - } - - /* no client_list found, create a new one */ - client_list = kzalloc(sizeof(*client_list), GFP_ATOMIC); - if (client_list == NULL) - goto exit; - - /* dev_addr passed to us is left-shifted by 1 bit - * i2c_new_device call expects it to be flush to the right. - */ - client_info.addr = dev_addr >> 1; - client_info.platform_data = adapter; - client_list->client = i2c_new_device(&adapter->i2c_adap, &client_info); - if (client_list->client == NULL) { - dev_info(&adapter->pdev->dev, - "Failed to create new i2c device..\n"); - goto err_no_client; - } - - /* insert new client at head of list */ - client_list->next = adapter->i2c_clients; - adapter->i2c_clients = client_list; - - client = client_list->client; - goto exit; - -err_no_client: - kfree(client_list); -exit: - spin_unlock_irqrestore(&i2c_clients_lock, flags); - return client; -} - /* igb_read_i2c_byte - Reads 8 bit word over I2C * @hw: pointer to hardware structure * @byte_offset: byte offset to read @@ -7798,7 +7726,7 @@ s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset, u8 dev_addr, u8 *data) { struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw); - struct i2c_client *this_client = igb_get_i2c_client(adapter, dev_addr); + struct i2c_client *this_client = adapter->i2c_client; s32 status; u16 swfw_mask = 0; @@ -7835,7 +7763,7 @@ s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset, u8 dev_addr, u8 data) { struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw); - struct i2c_client *this_client = igb_get_i2c_client(adapter, dev_addr); + struct i2c_client *this_client = adapter->i2c_client; s32 status; u16 swfw_mask = E1000_SWFW_PHY0_SM; diff --git a/drivers/net/ethernet/intel/igb/igb_ptp.c b/drivers/net/ethernet/intel/igb/igb_ptp.c index 0987822359f0..0a237507ee85 100644 --- a/drivers/net/ethernet/intel/igb/igb_ptp.c +++ b/drivers/net/ethernet/intel/igb/igb_ptp.c @@ -740,7 +740,7 @@ void igb_ptp_init(struct igb_adapter *adapter) case e1000_82576: snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr); adapter->ptp_caps.owner = THIS_MODULE; - adapter->ptp_caps.max_adj = 1000000000; + adapter->ptp_caps.max_adj = 999999881; adapter->ptp_caps.n_ext_ts = 0; adapter->ptp_caps.pps = 0; adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82576; diff --git a/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c b/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c index c3db6cd69b68..2b6cb5ca48ee 100644 --- a/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c +++ b/drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c @@ -944,9 +944,17 @@ free_queue_irqs: free_irq(adapter->msix_entries[vector].vector, adapter->q_vector[vector]); } - pci_disable_msix(adapter->pdev); - kfree(adapter->msix_entries); - adapter->msix_entries = NULL; + /* This failure is non-recoverable - it indicates the system is + * out of MSIX vector resources and the VF driver cannot run + * without them. Set the number of msix vectors to zero + * indicating that not enough can be allocated. The error + * will be returned to the user indicating device open failed. + * Any further attempts to force the driver to open will also + * fail. The only way to recover is to unload the driver and + * reload it again. If the system has recovered some MSIX + * vectors then it may succeed. + */ + adapter->num_msix_vectors = 0; return err; } @@ -2572,6 +2580,15 @@ static int ixgbevf_open(struct net_device *netdev) struct ixgbe_hw *hw = &adapter->hw; int err; + /* A previous failure to open the device because of a lack of + * available MSIX vector resources may have reset the number + * of msix vectors variable to zero. The only way to recover + * is to unload/reload the driver and hope that the system has + * been able to recover some MSIX vector resources. + */ + if (!adapter->num_msix_vectors) + return -ENOMEM; + /* disallow open during test */ if (test_bit(__IXGBEVF_TESTING, &adapter->state)) return -EBUSY; @@ -2628,7 +2645,6 @@ static int ixgbevf_open(struct net_device *netdev) err_req_irq: ixgbevf_down(adapter); - ixgbevf_free_irq(adapter); err_setup_rx: ixgbevf_free_all_rx_resources(adapter); err_setup_tx: diff --git a/drivers/net/ethernet/lantiq_etop.c b/drivers/net/ethernet/lantiq_etop.c index 6a2127489af7..bfdb06860397 100644 --- a/drivers/net/ethernet/lantiq_etop.c +++ b/drivers/net/ethernet/lantiq_etop.c @@ -769,7 +769,7 @@ ltq_etop_probe(struct platform_device *pdev) return 0; err_free: - kfree(dev); + free_netdev(dev); err_out: return err; } diff --git a/drivers/net/ethernet/marvell/mv643xx_eth.c b/drivers/net/ethernet/marvell/mv643xx_eth.c index 29140502b71a..6562c736a1d8 100644 --- a/drivers/net/ethernet/marvell/mv643xx_eth.c +++ b/drivers/net/ethernet/marvell/mv643xx_eth.c @@ -1081,6 +1081,45 @@ static void txq_set_fixed_prio_mode(struct tx_queue *txq) /* mii management interface *************************************************/ +static void mv643xx_adjust_pscr(struct mv643xx_eth_private *mp) +{ + u32 pscr = rdlp(mp, PORT_SERIAL_CONTROL); + u32 autoneg_disable = FORCE_LINK_PASS | + DISABLE_AUTO_NEG_SPEED_GMII | + DISABLE_AUTO_NEG_FOR_FLOW_CTRL | + DISABLE_AUTO_NEG_FOR_DUPLEX; + + if (mp->phy->autoneg == AUTONEG_ENABLE) { + /* enable auto negotiation */ + pscr &= ~autoneg_disable; + goto out_write; + } + + pscr |= autoneg_disable; + + if (mp->phy->speed == SPEED_1000) { + /* force gigabit, half duplex not supported */ + pscr |= SET_GMII_SPEED_TO_1000; + pscr |= SET_FULL_DUPLEX_MODE; + goto out_write; + } + + pscr &= ~SET_GMII_SPEED_TO_1000; + + if (mp->phy->speed == SPEED_100) + pscr |= SET_MII_SPEED_TO_100; + else + pscr &= ~SET_MII_SPEED_TO_100; + + if (mp->phy->duplex == DUPLEX_FULL) + pscr |= SET_FULL_DUPLEX_MODE; + else + pscr &= ~SET_FULL_DUPLEX_MODE; + +out_write: + wrlp(mp, PORT_SERIAL_CONTROL, pscr); +} + static irqreturn_t mv643xx_eth_err_irq(int irq, void *dev_id) { struct mv643xx_eth_shared_private *msp = dev_id; @@ -1499,6 +1538,7 @@ static int mv643xx_eth_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) { struct mv643xx_eth_private *mp = netdev_priv(dev); + int ret; if (mp->phy == NULL) return -EINVAL; @@ -1508,7 +1548,10 @@ mv643xx_eth_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) */ cmd->advertising &= ~ADVERTISED_1000baseT_Half; - return phy_ethtool_sset(mp->phy, cmd); + ret = phy_ethtool_sset(mp->phy, cmd); + if (!ret) + mv643xx_adjust_pscr(mp); + return ret; } static void mv643xx_eth_get_drvinfo(struct net_device *dev, @@ -2442,11 +2485,15 @@ static int mv643xx_eth_stop(struct net_device *dev) static int mv643xx_eth_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) { struct mv643xx_eth_private *mp = netdev_priv(dev); + int ret; - if (mp->phy != NULL) - return phy_mii_ioctl(mp->phy, ifr, cmd); + if (mp->phy == NULL) + return -ENOTSUPP; - return -EOPNOTSUPP; + ret = phy_mii_ioctl(mp->phy, ifr, cmd); + if (!ret) + mv643xx_adjust_pscr(mp); + return ret; } static int mv643xx_eth_change_mtu(struct net_device *dev, int new_mtu) diff --git a/drivers/net/ethernet/mellanox/mlx4/cq.c b/drivers/net/ethernet/mellanox/mlx4/cq.c index 7e64033d7de3..0706623cfb96 100644 --- a/drivers/net/ethernet/mellanox/mlx4/cq.c +++ b/drivers/net/ethernet/mellanox/mlx4/cq.c @@ -226,7 +226,7 @@ void __mlx4_cq_free_icm(struct mlx4_dev *dev, int cqn) static void mlx4_cq_free_icm(struct mlx4_dev *dev, int cqn) { - u64 in_param; + u64 in_param = 0; int err; if (mlx4_is_mfunc(dev)) { diff --git a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c index bb4d8d99f36d..f278b10ef714 100644 --- a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c +++ b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c @@ -565,34 +565,38 @@ static void mlx4_en_put_qp(struct mlx4_en_priv *priv) struct mlx4_en_dev *mdev = priv->mdev; struct mlx4_dev *dev = mdev->dev; int qpn = priv->base_qpn; - u64 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr); - - en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n", - priv->dev->dev_addr); - mlx4_unregister_mac(dev, priv->port, mac); + u64 mac; - if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) { + if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) { + mac = mlx4_en_mac_to_u64(priv->dev->dev_addr); + en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n", + priv->dev->dev_addr); + mlx4_unregister_mac(dev, priv->port, mac); + } else { struct mlx4_mac_entry *entry; struct hlist_node *tmp; struct hlist_head *bucket; - unsigned int mac_hash; + unsigned int i; - mac_hash = priv->dev->dev_addr[MLX4_EN_MAC_HASH_IDX]; - bucket = &priv->mac_hash[mac_hash]; - hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { - if (ether_addr_equal_64bits(entry->mac, - priv->dev->dev_addr)) { - en_dbg(DRV, priv, "Releasing qp: port %d, MAC %pM, qpn %d\n", - priv->port, priv->dev->dev_addr, qpn); + for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) { + bucket = &priv->mac_hash[i]; + hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { + mac = mlx4_en_mac_to_u64(entry->mac); + en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n", + entry->mac); mlx4_en_uc_steer_release(priv, entry->mac, qpn, entry->reg_id); - mlx4_qp_release_range(dev, qpn, 1); + mlx4_unregister_mac(dev, priv->port, mac); hlist_del_rcu(&entry->hlist); kfree_rcu(entry, rcu); - break; } } + + en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n", + priv->port, qpn); + mlx4_qp_release_range(dev, qpn, 1); + priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC; } } @@ -650,28 +654,10 @@ u64 mlx4_en_mac_to_u64(u8 *addr) return mac; } -static int mlx4_en_set_mac(struct net_device *dev, void *addr) -{ - struct mlx4_en_priv *priv = netdev_priv(dev); - struct mlx4_en_dev *mdev = priv->mdev; - struct sockaddr *saddr = addr; - - if (!is_valid_ether_addr(saddr->sa_data)) - return -EADDRNOTAVAIL; - - memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN); - queue_work(mdev->workqueue, &priv->mac_task); - return 0; -} - -static void mlx4_en_do_set_mac(struct work_struct *work) +static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv) { - struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, - mac_task); - struct mlx4_en_dev *mdev = priv->mdev; int err = 0; - mutex_lock(&mdev->state_lock); if (priv->port_up) { /* Remove old MAC and insert the new one */ err = mlx4_en_replace_mac(priv, priv->base_qpn, @@ -683,7 +669,26 @@ static void mlx4_en_do_set_mac(struct work_struct *work) } else en_dbg(HW, priv, "Port is down while registering mac, exiting...\n"); + return err; +} + +static int mlx4_en_set_mac(struct net_device *dev, void *addr) +{ + struct mlx4_en_priv *priv = netdev_priv(dev); + struct mlx4_en_dev *mdev = priv->mdev; + struct sockaddr *saddr = addr; + int err; + + if (!is_valid_ether_addr(saddr->sa_data)) + return -EADDRNOTAVAIL; + + memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN); + + mutex_lock(&mdev->state_lock); + err = mlx4_en_do_set_mac(priv); mutex_unlock(&mdev->state_lock); + + return err; } static void mlx4_en_clear_list(struct net_device *dev) @@ -1348,7 +1353,7 @@ static void mlx4_en_do_get_stats(struct work_struct *work) queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); } if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) { - queue_work(mdev->workqueue, &priv->mac_task); + mlx4_en_do_set_mac(priv); mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0; } mutex_unlock(&mdev->state_lock); @@ -1632,6 +1637,17 @@ void mlx4_en_stop_port(struct net_device *dev, int detach) /* Flush multicast filter */ mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG); + /* Remove flow steering rules for the port*/ + if (mdev->dev->caps.steering_mode == + MLX4_STEERING_MODE_DEVICE_MANAGED) { + ASSERT_RTNL(); + list_for_each_entry_safe(flow, tmp_flow, + &priv->ethtool_list, list) { + mlx4_flow_detach(mdev->dev, flow->id); + list_del(&flow->list); + } + } + mlx4_en_destroy_drop_qp(priv); /* Free TX Rings */ @@ -1652,17 +1668,6 @@ void mlx4_en_stop_port(struct net_device *dev, int detach) if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAGS2_REASSIGN_MAC_EN)) mdev->mac_removed[priv->port] = 1; - /* Remove flow steering rules for the port*/ - if (mdev->dev->caps.steering_mode == - MLX4_STEERING_MODE_DEVICE_MANAGED) { - ASSERT_RTNL(); - list_for_each_entry_safe(flow, tmp_flow, - &priv->ethtool_list, list) { - mlx4_flow_detach(mdev->dev, flow->id); - list_del(&flow->list); - } - } - /* Free RX Rings */ for (i = 0; i < priv->rx_ring_num; i++) { mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]); @@ -1828,9 +1833,11 @@ int mlx4_en_alloc_resources(struct mlx4_en_priv *priv) } #ifdef CONFIG_RFS_ACCEL - priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->mdev->dev->caps.comp_pool); - if (!priv->dev->rx_cpu_rmap) - goto err; + if (priv->mdev->dev->caps.comp_pool) { + priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->mdev->dev->caps.comp_pool); + if (!priv->dev->rx_cpu_rmap) + goto err; + } #endif return 0; @@ -2078,7 +2085,6 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, priv->msg_enable = MLX4_EN_MSG_LEVEL; spin_lock_init(&priv->stats_lock); INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode); - INIT_WORK(&priv->mac_task, mlx4_en_do_set_mac); INIT_WORK(&priv->watchdog_task, mlx4_en_restart); INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate); INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats); diff --git a/drivers/net/ethernet/mellanox/mlx4/eq.c b/drivers/net/ethernet/mellanox/mlx4/eq.c index 251ae2f93116..8e3123a1df88 100644 --- a/drivers/net/ethernet/mellanox/mlx4/eq.c +++ b/drivers/net/ethernet/mellanox/mlx4/eq.c @@ -771,7 +771,7 @@ int mlx4_MAP_EQ_wrapper(struct mlx4_dev *dev, int slave, struct mlx4_slave_event_eq_info *event_eq = priv->mfunc.master.slave_state[slave].event_eq; u32 in_modifier = vhcr->in_modifier; - u32 eqn = in_modifier & 0x1FF; + u32 eqn = in_modifier & 0x3FF; u64 in_param = vhcr->in_param; int err = 0; int i; diff --git a/drivers/net/ethernet/mellanox/mlx4/fw.c b/drivers/net/ethernet/mellanox/mlx4/fw.c index 50917eb3013e..f6245579962d 100644 --- a/drivers/net/ethernet/mellanox/mlx4/fw.c +++ b/drivers/net/ethernet/mellanox/mlx4/fw.c @@ -787,6 +787,14 @@ int mlx4_QUERY_DEV_CAP_wrapper(struct mlx4_dev *dev, int slave, bmme_flags &= ~MLX4_BMME_FLAG_TYPE_2_WIN; MLX4_PUT(outbox->buf, bmme_flags, QUERY_DEV_CAP_BMME_FLAGS_OFFSET); + /* turn off device-managed steering capability if not enabled */ + if (dev->caps.steering_mode != MLX4_STEERING_MODE_DEVICE_MANAGED) { + MLX4_GET(field, outbox->buf, + QUERY_DEV_CAP_FLOW_STEERING_RANGE_EN_OFFSET); + field &= 0x7f; + MLX4_PUT(outbox->buf, field, + QUERY_DEV_CAP_FLOW_STEERING_RANGE_EN_OFFSET); + } return 0; } diff --git a/drivers/net/ethernet/mellanox/mlx4/main.c b/drivers/net/ethernet/mellanox/mlx4/main.c index d180bc46826a..16abde20e1fc 100644 --- a/drivers/net/ethernet/mellanox/mlx4/main.c +++ b/drivers/net/ethernet/mellanox/mlx4/main.c @@ -1555,7 +1555,7 @@ void __mlx4_counter_free(struct mlx4_dev *dev, u32 idx) void mlx4_counter_free(struct mlx4_dev *dev, u32 idx) { - u64 in_param; + u64 in_param = 0; if (mlx4_is_mfunc(dev)) { set_param_l(&in_param, idx); diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4.h b/drivers/net/ethernet/mellanox/mlx4/mlx4.h index cf883345af88..d738454116a0 100644 --- a/drivers/net/ethernet/mellanox/mlx4/mlx4.h +++ b/drivers/net/ethernet/mellanox/mlx4/mlx4.h @@ -1235,7 +1235,7 @@ int mlx4_get_qp_per_mgm(struct mlx4_dev *dev); static inline void set_param_l(u64 *arg, u32 val) { - *((u32 *)arg) = val; + *arg = (*arg & 0xffffffff00000000ULL) | (u64) val; } static inline void set_param_h(u64 *arg, u32 val) diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h index c313d7e943a9..f710b7ce0dcb 100644 --- a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h +++ b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h @@ -509,7 +509,6 @@ struct mlx4_en_priv { struct mlx4_en_cq rx_cq[MAX_RX_RINGS]; struct mlx4_qp drop_qp; struct work_struct rx_mode_task; - struct work_struct mac_task; struct work_struct watchdog_task; struct work_struct linkstate_task; struct delayed_work stats_task; diff --git a/drivers/net/ethernet/mellanox/mlx4/mr.c b/drivers/net/ethernet/mellanox/mlx4/mr.c index 602ca9bf78e4..f91719a08cba 100644 --- a/drivers/net/ethernet/mellanox/mlx4/mr.c +++ b/drivers/net/ethernet/mellanox/mlx4/mr.c @@ -183,7 +183,7 @@ u32 __mlx4_alloc_mtt_range(struct mlx4_dev *dev, int order) static u32 mlx4_alloc_mtt_range(struct mlx4_dev *dev, int order) { - u64 in_param; + u64 in_param = 0; u64 out_param; int err; @@ -240,7 +240,7 @@ void __mlx4_free_mtt_range(struct mlx4_dev *dev, u32 offset, int order) static void mlx4_free_mtt_range(struct mlx4_dev *dev, u32 offset, int order) { - u64 in_param; + u64 in_param = 0; int err; if (mlx4_is_mfunc(dev)) { @@ -351,7 +351,7 @@ void __mlx4_mpt_release(struct mlx4_dev *dev, u32 index) static void mlx4_mpt_release(struct mlx4_dev *dev, u32 index) { - u64 in_param; + u64 in_param = 0; if (mlx4_is_mfunc(dev)) { set_param_l(&in_param, index); @@ -374,7 +374,7 @@ int __mlx4_mpt_alloc_icm(struct mlx4_dev *dev, u32 index) static int mlx4_mpt_alloc_icm(struct mlx4_dev *dev, u32 index) { - u64 param; + u64 param = 0; if (mlx4_is_mfunc(dev)) { set_param_l(¶m, index); @@ -395,7 +395,7 @@ void __mlx4_mpt_free_icm(struct mlx4_dev *dev, u32 index) static void mlx4_mpt_free_icm(struct mlx4_dev *dev, u32 index) { - u64 in_param; + u64 in_param = 0; if (mlx4_is_mfunc(dev)) { set_param_l(&in_param, index); diff --git a/drivers/net/ethernet/mellanox/mlx4/pd.c b/drivers/net/ethernet/mellanox/mlx4/pd.c index 1ac88637ad9d..00f223acada7 100644 --- a/drivers/net/ethernet/mellanox/mlx4/pd.c +++ b/drivers/net/ethernet/mellanox/mlx4/pd.c @@ -101,7 +101,7 @@ void __mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn) void mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn) { - u64 in_param; + u64 in_param = 0; int err; if (mlx4_is_mfunc(dev)) { diff --git a/drivers/net/ethernet/mellanox/mlx4/port.c b/drivers/net/ethernet/mellanox/mlx4/port.c index 719ead15e491..10c57c86388b 100644 --- a/drivers/net/ethernet/mellanox/mlx4/port.c +++ b/drivers/net/ethernet/mellanox/mlx4/port.c @@ -175,7 +175,7 @@ EXPORT_SYMBOL_GPL(__mlx4_register_mac); int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac) { - u64 out_param; + u64 out_param = 0; int err; if (mlx4_is_mfunc(dev)) { @@ -222,7 +222,7 @@ EXPORT_SYMBOL_GPL(__mlx4_unregister_mac); void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac) { - u64 out_param; + u64 out_param = 0; if (mlx4_is_mfunc(dev)) { set_param_l(&out_param, port); @@ -361,7 +361,7 @@ out: int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index) { - u64 out_param; + u64 out_param = 0; int err; if (mlx4_is_mfunc(dev)) { @@ -406,7 +406,7 @@ out: void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, int index) { - u64 in_param; + u64 in_param = 0; int err; if (mlx4_is_mfunc(dev)) { diff --git a/drivers/net/ethernet/mellanox/mlx4/qp.c b/drivers/net/ethernet/mellanox/mlx4/qp.c index 81e2abe07bbb..e891b058c1be 100644 --- a/drivers/net/ethernet/mellanox/mlx4/qp.c +++ b/drivers/net/ethernet/mellanox/mlx4/qp.c @@ -222,7 +222,7 @@ int __mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, int mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, int *base) { - u64 in_param; + u64 in_param = 0; u64 out_param; int err; @@ -255,7 +255,7 @@ void __mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int cnt) void mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int cnt) { - u64 in_param; + u64 in_param = 0; int err; if (mlx4_is_mfunc(dev)) { @@ -319,7 +319,7 @@ err_out: static int mlx4_qp_alloc_icm(struct mlx4_dev *dev, int qpn) { - u64 param; + u64 param = 0; if (mlx4_is_mfunc(dev)) { set_param_l(¶m, qpn); @@ -344,7 +344,7 @@ void __mlx4_qp_free_icm(struct mlx4_dev *dev, int qpn) static void mlx4_qp_free_icm(struct mlx4_dev *dev, int qpn) { - u64 in_param; + u64 in_param = 0; if (mlx4_is_mfunc(dev)) { set_param_l(&in_param, qpn); diff --git a/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c b/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c index 083fb48dc3d7..1391b52f443a 100644 --- a/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c +++ b/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c @@ -99,6 +99,7 @@ struct res_qp { struct list_head mcg_list; spinlock_t mcg_spl; int local_qpn; + atomic_t ref_count; }; enum res_mtt_states { @@ -197,6 +198,7 @@ enum res_fs_rule_states { struct res_fs_rule { struct res_common com; + int qpn; }; static void *res_tracker_lookup(struct rb_root *root, u64 res_id) @@ -355,7 +357,7 @@ static int mpt_mask(struct mlx4_dev *dev) return dev->caps.num_mpts - 1; } -static void *find_res(struct mlx4_dev *dev, int res_id, +static void *find_res(struct mlx4_dev *dev, u64 res_id, enum mlx4_resource type) { struct mlx4_priv *priv = mlx4_priv(dev); @@ -447,6 +449,7 @@ static struct res_common *alloc_qp_tr(int id) ret->local_qpn = id; INIT_LIST_HEAD(&ret->mcg_list); spin_lock_init(&ret->mcg_spl); + atomic_set(&ret->ref_count, 0); return &ret->com; } @@ -554,7 +557,7 @@ static struct res_common *alloc_xrcdn_tr(int id) return &ret->com; } -static struct res_common *alloc_fs_rule_tr(u64 id) +static struct res_common *alloc_fs_rule_tr(u64 id, int qpn) { struct res_fs_rule *ret; @@ -564,7 +567,7 @@ static struct res_common *alloc_fs_rule_tr(u64 id) ret->com.res_id = id; ret->com.state = RES_FS_RULE_ALLOCATED; - + ret->qpn = qpn; return &ret->com; } @@ -602,7 +605,7 @@ static struct res_common *alloc_tr(u64 id, enum mlx4_resource type, int slave, ret = alloc_xrcdn_tr(id); break; case RES_FS_RULE: - ret = alloc_fs_rule_tr(id); + ret = alloc_fs_rule_tr(id, extra); break; default: return NULL; @@ -671,10 +674,14 @@ undo: static int remove_qp_ok(struct res_qp *res) { - if (res->com.state == RES_QP_BUSY) + if (res->com.state == RES_QP_BUSY || atomic_read(&res->ref_count) || + !list_empty(&res->mcg_list)) { + pr_err("resource tracker: fail to remove qp, state %d, ref_count %d\n", + res->com.state, atomic_read(&res->ref_count)); return -EBUSY; - else if (res->com.state != RES_QP_RESERVED) + } else if (res->com.state != RES_QP_RESERVED) { return -EPERM; + } return 0; } @@ -2990,6 +2997,9 @@ int mlx4_QP_ATTACH_wrapper(struct mlx4_dev *dev, int slave, u8 steer_type_mask = 2; enum mlx4_steer_type type = (gid[7] & steer_type_mask) >> 1; + if (dev->caps.steering_mode != MLX4_STEERING_MODE_B0) + return -EINVAL; + qpn = vhcr->in_modifier & 0xffffff; err = get_res(dev, slave, qpn, RES_QP, &rqp); if (err) @@ -3121,6 +3131,7 @@ int mlx4_QP_FLOW_STEERING_ATTACH_wrapper(struct mlx4_dev *dev, int slave, struct list_head *rlist = &tracker->slave_list[slave].res_list[RES_MAC]; int err; int qpn; + struct res_qp *rqp; struct mlx4_net_trans_rule_hw_ctrl *ctrl; struct _rule_hw *rule_header; int header_id; @@ -3131,7 +3142,7 @@ int mlx4_QP_FLOW_STEERING_ATTACH_wrapper(struct mlx4_dev *dev, int slave, ctrl = (struct mlx4_net_trans_rule_hw_ctrl *)inbox->buf; qpn = be32_to_cpu(ctrl->qpn) & 0xffffff; - err = get_res(dev, slave, qpn, RES_QP, NULL); + err = get_res(dev, slave, qpn, RES_QP, &rqp); if (err) { pr_err("Steering rule with qpn 0x%x rejected.\n", qpn); return err; @@ -3172,14 +3183,16 @@ int mlx4_QP_FLOW_STEERING_ATTACH_wrapper(struct mlx4_dev *dev, int slave, if (err) goto err_put; - err = add_res_range(dev, slave, vhcr->out_param, 1, RES_FS_RULE, 0); + err = add_res_range(dev, slave, vhcr->out_param, 1, RES_FS_RULE, qpn); if (err) { mlx4_err(dev, "Fail to add flow steering resources.\n "); /* detach rule*/ mlx4_cmd(dev, vhcr->out_param, 0, 0, MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); + goto err_put; } + atomic_inc(&rqp->ref_count); err_put: put_res(dev, slave, qpn, RES_QP); return err; @@ -3192,20 +3205,35 @@ int mlx4_QP_FLOW_STEERING_DETACH_wrapper(struct mlx4_dev *dev, int slave, struct mlx4_cmd_info *cmd) { int err; + struct res_qp *rqp; + struct res_fs_rule *rrule; if (dev->caps.steering_mode != MLX4_STEERING_MODE_DEVICE_MANAGED) return -EOPNOTSUPP; + err = get_res(dev, slave, vhcr->in_param, RES_FS_RULE, &rrule); + if (err) + return err; + /* Release the rule form busy state before removal */ + put_res(dev, slave, vhcr->in_param, RES_FS_RULE); + err = get_res(dev, slave, rrule->qpn, RES_QP, &rqp); + if (err) + return err; + err = rem_res_range(dev, slave, vhcr->in_param, 1, RES_FS_RULE, 0); if (err) { mlx4_err(dev, "Fail to remove flow steering resources.\n "); - return err; + goto out; } err = mlx4_cmd(dev, vhcr->in_param, 0, 0, MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); + if (!err) + atomic_dec(&rqp->ref_count); +out: + put_res(dev, slave, rrule->qpn, RES_QP); return err; } @@ -3803,6 +3831,7 @@ void mlx4_delete_all_resources_for_slave(struct mlx4_dev *dev, int slave) mutex_lock(&priv->mfunc.master.res_tracker.slave_list[slave].mutex); /*VLAN*/ rem_slave_macs(dev, slave); + rem_slave_fs_rule(dev, slave); rem_slave_qps(dev, slave); rem_slave_srqs(dev, slave); rem_slave_cqs(dev, slave); @@ -3811,6 +3840,5 @@ void mlx4_delete_all_resources_for_slave(struct mlx4_dev *dev, int slave) rem_slave_mtts(dev, slave); rem_slave_counters(dev, slave); rem_slave_xrcdns(dev, slave); - rem_slave_fs_rule(dev, slave); mutex_unlock(&priv->mfunc.master.res_tracker.slave_list[slave].mutex); } diff --git a/drivers/net/ethernet/mellanox/mlx4/srq.c b/drivers/net/ethernet/mellanox/mlx4/srq.c index feda6c00829f..e329fe1f11b7 100644 --- a/drivers/net/ethernet/mellanox/mlx4/srq.c +++ b/drivers/net/ethernet/mellanox/mlx4/srq.c @@ -149,7 +149,7 @@ void __mlx4_srq_free_icm(struct mlx4_dev *dev, int srqn) static void mlx4_srq_free_icm(struct mlx4_dev *dev, int srqn) { - u64 in_param; + u64 in_param = 0; if (mlx4_is_mfunc(dev)) { set_param_l(&in_param, srqn); diff --git a/drivers/net/ethernet/nxp/lpc_eth.c b/drivers/net/ethernet/nxp/lpc_eth.c index c4122c86f829..efa29b712d5f 100644 --- a/drivers/net/ethernet/nxp/lpc_eth.c +++ b/drivers/net/ethernet/nxp/lpc_eth.c @@ -1472,7 +1472,8 @@ static int lpc_eth_drv_probe(struct platform_device *pdev) } platform_set_drvdata(pdev, ndev); - if (lpc_mii_init(pldat) != 0) + ret = lpc_mii_init(pldat); + if (ret) goto err_out_unregister_netdev; netdev_info(ndev, "LPC mac at 0x%08x irq %d\n", diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c index 39ab4d09faaa..73ce7dd6b954 100644 --- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c +++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c @@ -1726,9 +1726,9 @@ pch_gbe_clean_rx(struct pch_gbe_adapter *adapter, skb->protocol = eth_type_trans(skb, netdev); if (tcp_ip_status & PCH_GBE_RXD_ACC_STAT_TCPIPOK) - skb->ip_summed = CHECKSUM_NONE; - else skb->ip_summed = CHECKSUM_UNNECESSARY; + else + skb->ip_summed = CHECKSUM_NONE; napi_gro_receive(&adapter->napi, skb); (*work_done)++; diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c index 33e96176e4d8..bf5e3cf97c4d 100644 --- a/drivers/net/ethernet/renesas/sh_eth.c +++ b/drivers/net/ethernet/renesas/sh_eth.c @@ -2220,6 +2220,7 @@ static void sh_eth_tsu_init(struct sh_eth_private *mdp) /* MDIO bus release function */ static int sh_mdio_release(struct net_device *ndev) { + struct sh_eth_private *mdp = netdev_priv(ndev); struct mii_bus *bus = dev_get_drvdata(&ndev->dev); /* unregister mdio bus */ @@ -2234,6 +2235,9 @@ static int sh_mdio_release(struct net_device *ndev) /* free bitbang info */ free_mdio_bitbang(bus); + /* free bitbang memory */ + kfree(mdp->bitbang); + return 0; } @@ -2262,6 +2266,7 @@ static int sh_mdio_init(struct net_device *ndev, int id, bitbang->ctrl.ops = &bb_ops; /* MII controller setting */ + mdp->bitbang = bitbang; mdp->mii_bus = alloc_mdio_bitbang(&bitbang->ctrl); if (!mdp->mii_bus) { ret = -ENOMEM; @@ -2441,6 +2446,11 @@ static int sh_eth_drv_probe(struct platform_device *pdev) } mdp->tsu_addr = ioremap(rtsu->start, resource_size(rtsu)); + if (mdp->tsu_addr == NULL) { + ret = -ENOMEM; + dev_err(&pdev->dev, "TSU ioremap failed.\n"); + goto out_release; + } mdp->port = devno % 2; ndev->features = NETIF_F_HW_VLAN_FILTER; } diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h index bae84fd2e73a..e6655678458e 100644 --- a/drivers/net/ethernet/renesas/sh_eth.h +++ b/drivers/net/ethernet/renesas/sh_eth.h @@ -705,6 +705,7 @@ struct sh_eth_private { const u16 *reg_offset; void __iomem *addr; void __iomem *tsu_addr; + struct bb_info *bitbang; u32 num_rx_ring; u32 num_tx_ring; dma_addr_t rx_desc_dma; diff --git a/drivers/net/ethernet/sfc/efx.h b/drivers/net/ethernet/sfc/efx.h index 50247dfe8f57..d2f790df6dcb 100644 --- a/drivers/net/ethernet/sfc/efx.h +++ b/drivers/net/ethernet/sfc/efx.h @@ -171,9 +171,9 @@ static inline void efx_device_detach_sync(struct efx_nic *efx) * TX scheduler is stopped when we're done and before * netif_device_present() becomes false. */ - netif_tx_lock(dev); + netif_tx_lock_bh(dev); netif_device_detach(dev); - netif_tx_unlock(dev); + netif_tx_unlock_bh(dev); } #endif /* EFX_EFX_H */ diff --git a/drivers/net/ethernet/sfc/nic.c b/drivers/net/ethernet/sfc/nic.c index 0ad790cc473c..eaa8e874a3cb 100644 --- a/drivers/net/ethernet/sfc/nic.c +++ b/drivers/net/ethernet/sfc/nic.c @@ -376,7 +376,8 @@ efx_may_push_tx_desc(struct efx_tx_queue *tx_queue, unsigned int write_count) return false; tx_queue->empty_read_count = 0; - return ((empty_read_count ^ write_count) & ~EFX_EMPTY_COUNT_VALID) == 0; + return ((empty_read_count ^ write_count) & ~EFX_EMPTY_COUNT_VALID) == 0 + && tx_queue->write_count - write_count == 1; } /* For each entry inserted into the software descriptor ring, create a diff --git a/drivers/net/ethernet/sfc/rx.c b/drivers/net/ethernet/sfc/rx.c index 879ff5849bbd..bb579a6128c8 100644 --- a/drivers/net/ethernet/sfc/rx.c +++ b/drivers/net/ethernet/sfc/rx.c @@ -215,7 +215,7 @@ static int efx_init_rx_buffers_page(struct efx_rx_queue *rx_queue) rx_buf = efx_rx_buffer(rx_queue, index); rx_buf->dma_addr = dma_addr + EFX_PAGE_IP_ALIGN; rx_buf->u.page = page; - rx_buf->page_offset = page_offset; + rx_buf->page_offset = page_offset + EFX_PAGE_IP_ALIGN; rx_buf->len = efx->rx_buffer_len - EFX_PAGE_IP_ALIGN; rx_buf->flags = EFX_RX_BUF_PAGE; ++rx_queue->added_count; diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c index 01ffbc486982..df32a090d08e 100644 --- a/drivers/net/ethernet/ti/cpsw.c +++ b/drivers/net/ethernet/ti/cpsw.c @@ -905,7 +905,7 @@ static netdev_tx_t cpsw_ndo_start_xmit(struct sk_buff *skb, /* If there is no more tx desc left free then we need to * tell the kernel to stop sending us tx frames. */ - if (unlikely(cpdma_check_free_tx_desc(priv->txch))) + if (unlikely(!cpdma_check_free_tx_desc(priv->txch))) netif_stop_queue(ndev); return NETDEV_TX_OK; @@ -1364,7 +1364,7 @@ static int cpsw_probe_dt(struct cpsw_platform_data *data, struct platform_device *mdio; parp = of_get_property(slave_node, "phy_id", &lenp); - if ((parp == NULL) && (lenp != (sizeof(void *) * 2))) { + if ((parp == NULL) || (lenp != (sizeof(void *) * 2))) { pr_err("Missing slave[%d] phy_id property\n", i); ret = -EINVAL; goto error_ret; diff --git a/drivers/net/ethernet/ti/davinci_emac.c b/drivers/net/ethernet/ti/davinci_emac.c index 52c05366599a..ae1b77aa199f 100644 --- a/drivers/net/ethernet/ti/davinci_emac.c +++ b/drivers/net/ethernet/ti/davinci_emac.c @@ -1102,7 +1102,7 @@ static int emac_dev_xmit(struct sk_buff *skb, struct net_device *ndev) /* If there is no more tx desc left free then we need to * tell the kernel to stop sending us tx frames. */ - if (unlikely(cpdma_check_free_tx_desc(priv->txchan))) + if (unlikely(!cpdma_check_free_tx_desc(priv->txchan))) netif_stop_queue(ndev); return NETDEV_TX_OK; diff --git a/drivers/net/hippi/rrunner.c b/drivers/net/hippi/rrunner.c index e5b19b056909..3c4d6274bb9b 100644 --- a/drivers/net/hippi/rrunner.c +++ b/drivers/net/hippi/rrunner.c @@ -202,6 +202,9 @@ static int rr_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) return 0; out: + if (rrpriv->evt_ring) + pci_free_consistent(pdev, EVT_RING_SIZE, rrpriv->evt_ring, + rrpriv->evt_ring_dma); if (rrpriv->rx_ring) pci_free_consistent(pdev, RX_TOTAL_SIZE, rrpriv->rx_ring, rrpriv->rx_ring_dma); diff --git a/drivers/net/macvlan.c b/drivers/net/macvlan.c index 417b2af1aa80..73abbc1655d5 100644 --- a/drivers/net/macvlan.c +++ b/drivers/net/macvlan.c @@ -660,6 +660,7 @@ void macvlan_common_setup(struct net_device *dev) ether_setup(dev); dev->priv_flags &= ~(IFF_XMIT_DST_RELEASE | IFF_TX_SKB_SHARING); + dev->priv_flags |= IFF_UNICAST_FLT; dev->netdev_ops = &macvlan_netdev_ops; dev->destructor = free_netdev; dev->header_ops = &macvlan_hard_header_ops, diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c index 37add21a3d7d..59ac143dec25 100644 --- a/drivers/net/netconsole.c +++ b/drivers/net/netconsole.c @@ -666,6 +666,7 @@ static int netconsole_netdev_event(struct notifier_block *this, goto done; spin_lock_irqsave(&target_list_lock, flags); +restart: list_for_each_entry(nt, &target_list, list) { netconsole_target_get(nt); if (nt->np.dev == dev) { @@ -678,15 +679,17 @@ static int netconsole_netdev_event(struct notifier_block *this, case NETDEV_UNREGISTER: /* * rtnl_lock already held + * we might sleep in __netpoll_cleanup() */ - if (nt->np.dev) { - __netpoll_cleanup(&nt->np); - dev_put(nt->np.dev); - nt->np.dev = NULL; - } + spin_unlock_irqrestore(&target_list_lock, flags); + __netpoll_cleanup(&nt->np); + spin_lock_irqsave(&target_list_lock, flags); + dev_put(nt->np.dev); + nt->np.dev = NULL; nt->enabled = 0; stopped = true; - break; + netconsole_target_put(nt); + goto restart; } } netconsole_target_put(nt); diff --git a/drivers/net/team/team.c b/drivers/net/team/team.c index 05c5efe84591..bf3419297875 100644 --- a/drivers/net/team/team.c +++ b/drivers/net/team/team.c @@ -1138,6 +1138,8 @@ static int team_port_del(struct team *team, struct net_device *port_dev) netdev_upper_dev_unlink(port_dev, dev); team_port_disable_netpoll(port); vlan_vids_del_by_dev(port_dev, dev); + dev_uc_unsync(port_dev, dev); + dev_mc_unsync(port_dev, dev); dev_close(port_dev); team_port_leave(team, port); diff --git a/drivers/net/tun.c b/drivers/net/tun.c index 2c6a22e278ea..b7c457adc0dc 100644 --- a/drivers/net/tun.c +++ b/drivers/net/tun.c @@ -747,6 +747,8 @@ static netdev_tx_t tun_net_xmit(struct sk_buff *skb, struct net_device *dev) goto drop; skb_orphan(skb); + nf_reset(skb); + /* Enqueue packet */ skb_queue_tail(&tfile->socket.sk->sk_receive_queue, skb); diff --git a/drivers/net/usb/Kconfig b/drivers/net/usb/Kconfig index 3b6e9b83342d..7c769d8e25ad 100644 --- a/drivers/net/usb/Kconfig +++ b/drivers/net/usb/Kconfig @@ -268,7 +268,7 @@ config USB_NET_SMSC75XX select CRC16 select CRC32 help - This option adds support for SMSC LAN95XX based USB 2.0 + This option adds support for SMSC LAN75XX based USB 2.0 Gigabit Ethernet adapters. config USB_NET_SMSC95XX diff --git a/drivers/net/usb/cdc_mbim.c b/drivers/net/usb/cdc_mbim.c index 248d2dc765a5..16c842997291 100644 --- a/drivers/net/usb/cdc_mbim.c +++ b/drivers/net/usb/cdc_mbim.c @@ -68,18 +68,9 @@ static int cdc_mbim_bind(struct usbnet *dev, struct usb_interface *intf) struct cdc_ncm_ctx *ctx; struct usb_driver *subdriver = ERR_PTR(-ENODEV); int ret = -ENODEV; - u8 data_altsetting = CDC_NCM_DATA_ALTSETTING_NCM; + u8 data_altsetting = cdc_ncm_select_altsetting(dev, intf); struct cdc_mbim_state *info = (void *)&dev->data; - /* see if interface supports MBIM alternate setting */ - if (intf->num_altsetting == 2) { - if (!cdc_ncm_comm_intf_is_mbim(intf->cur_altsetting)) - usb_set_interface(dev->udev, - intf->cur_altsetting->desc.bInterfaceNumber, - CDC_NCM_COMM_ALTSETTING_MBIM); - data_altsetting = CDC_NCM_DATA_ALTSETTING_MBIM; - } - /* Probably NCM, defer for cdc_ncm_bind */ if (!cdc_ncm_comm_intf_is_mbim(intf->cur_altsetting)) goto err; diff --git a/drivers/net/usb/cdc_ncm.c b/drivers/net/usb/cdc_ncm.c index 61b74a2b89ac..4709fa3497cf 100644 --- a/drivers/net/usb/cdc_ncm.c +++ b/drivers/net/usb/cdc_ncm.c @@ -55,6 +55,14 @@ #define DRIVER_VERSION "14-Mar-2012" +#if IS_ENABLED(CONFIG_USB_NET_CDC_MBIM) +static bool prefer_mbim = true; +#else +static bool prefer_mbim; +#endif +module_param(prefer_mbim, bool, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(prefer_mbim, "Prefer MBIM setting on dual NCM/MBIM functions"); + static void cdc_ncm_txpath_bh(unsigned long param); static void cdc_ncm_tx_timeout_start(struct cdc_ncm_ctx *ctx); static enum hrtimer_restart cdc_ncm_tx_timer_cb(struct hrtimer *hr_timer); @@ -550,9 +558,12 @@ void cdc_ncm_unbind(struct usbnet *dev, struct usb_interface *intf) } EXPORT_SYMBOL_GPL(cdc_ncm_unbind); -static int cdc_ncm_bind(struct usbnet *dev, struct usb_interface *intf) +/* Select the MBIM altsetting iff it is preferred and available, + * returning the number of the corresponding data interface altsetting + */ +u8 cdc_ncm_select_altsetting(struct usbnet *dev, struct usb_interface *intf) { - int ret; + struct usb_host_interface *alt; /* The MBIM spec defines a NCM compatible default altsetting, * which we may have matched: @@ -568,23 +579,27 @@ static int cdc_ncm_bind(struct usbnet *dev, struct usb_interface *intf) * endpoint descriptors, shall be constructed according to * the rules given in section 6 (USB Device Model) of this * specification." - * - * Do not bind to such interfaces, allowing cdc_mbim to handle - * them */ -#if IS_ENABLED(CONFIG_USB_NET_CDC_MBIM) - if ((intf->num_altsetting == 2) && - !usb_set_interface(dev->udev, - intf->cur_altsetting->desc.bInterfaceNumber, - CDC_NCM_COMM_ALTSETTING_MBIM)) { - if (cdc_ncm_comm_intf_is_mbim(intf->cur_altsetting)) - return -ENODEV; - else - usb_set_interface(dev->udev, - intf->cur_altsetting->desc.bInterfaceNumber, - CDC_NCM_COMM_ALTSETTING_NCM); + if (prefer_mbim && intf->num_altsetting == 2) { + alt = usb_altnum_to_altsetting(intf, CDC_NCM_COMM_ALTSETTING_MBIM); + if (alt && cdc_ncm_comm_intf_is_mbim(alt) && + !usb_set_interface(dev->udev, + intf->cur_altsetting->desc.bInterfaceNumber, + CDC_NCM_COMM_ALTSETTING_MBIM)) + return CDC_NCM_DATA_ALTSETTING_MBIM; } -#endif + return CDC_NCM_DATA_ALTSETTING_NCM; +} +EXPORT_SYMBOL_GPL(cdc_ncm_select_altsetting); + +static int cdc_ncm_bind(struct usbnet *dev, struct usb_interface *intf) +{ + int ret; + + /* MBIM backwards compatible function? */ + cdc_ncm_select_altsetting(dev, intf); + if (cdc_ncm_comm_intf_is_mbim(intf->cur_altsetting)) + return -ENODEV; /* NCM data altsetting is always 1 */ ret = cdc_ncm_bind_common(dev, intf, 1); diff --git a/drivers/net/usb/qmi_wwan.c b/drivers/net/usb/qmi_wwan.c index efb5c7c33a28..968d5d50751d 100644 --- a/drivers/net/usb/qmi_wwan.c +++ b/drivers/net/usb/qmi_wwan.c @@ -139,16 +139,9 @@ static int qmi_wwan_bind(struct usbnet *dev, struct usb_interface *intf) BUILD_BUG_ON((sizeof(((struct usbnet *)0)->data) < sizeof(struct qmi_wwan_state))); - /* control and data is shared? */ - if (intf->cur_altsetting->desc.bNumEndpoints == 3) { - info->control = intf; - info->data = intf; - goto shared; - } - - /* else require a single interrupt status endpoint on control intf */ - if (intf->cur_altsetting->desc.bNumEndpoints != 1) - goto err; + /* set up initial state */ + info->control = intf; + info->data = intf; /* and a number of CDC descriptors */ while (len > 3) { @@ -207,25 +200,14 @@ next_desc: buf += h->bLength; } - /* did we find all the required ones? */ - if (!(found & (1 << USB_CDC_HEADER_TYPE)) || - !(found & (1 << USB_CDC_UNION_TYPE))) { - dev_err(&intf->dev, "CDC functional descriptors missing\n"); - goto err; - } - - /* verify CDC Union */ - if (desc->bInterfaceNumber != cdc_union->bMasterInterface0) { - dev_err(&intf->dev, "bogus CDC Union: master=%u\n", cdc_union->bMasterInterface0); - goto err; - } - - /* need to save these for unbind */ - info->control = intf; - info->data = usb_ifnum_to_if(dev->udev, cdc_union->bSlaveInterface0); - if (!info->data) { - dev_err(&intf->dev, "bogus CDC Union: slave=%u\n", cdc_union->bSlaveInterface0); - goto err; + /* Use separate control and data interfaces if we found a CDC Union */ + if (cdc_union) { + info->data = usb_ifnum_to_if(dev->udev, cdc_union->bSlaveInterface0); + if (desc->bInterfaceNumber != cdc_union->bMasterInterface0 || !info->data) { + dev_err(&intf->dev, "bogus CDC Union: master=%u, slave=%u\n", + cdc_union->bMasterInterface0, cdc_union->bSlaveInterface0); + goto err; + } } /* errors aren't fatal - we can live with the dynamic address */ @@ -235,11 +217,12 @@ next_desc: } /* claim data interface and set it up */ - status = usb_driver_claim_interface(driver, info->data, dev); - if (status < 0) - goto err; + if (info->control != info->data) { + status = usb_driver_claim_interface(driver, info->data, dev); + if (status < 0) + goto err; + } -shared: status = qmi_wwan_register_subdriver(dev); if (status < 0 && info->control != info->data) { usb_set_intfdata(info->data, NULL); diff --git a/drivers/net/vmxnet3/vmxnet3_drv.c b/drivers/net/vmxnet3/vmxnet3_drv.c index 4aad350e4dae..eae7a03d4f9b 100644 --- a/drivers/net/vmxnet3/vmxnet3_drv.c +++ b/drivers/net/vmxnet3/vmxnet3_drv.c @@ -2958,6 +2958,7 @@ vmxnet3_probe_device(struct pci_dev *pdev, adapter->num_rx_queues = num_rx_queues; adapter->num_tx_queues = num_tx_queues; + adapter->rx_buf_per_pkt = 1; size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues; size += sizeof(struct Vmxnet3_RxQueueDesc) * adapter->num_rx_queues; diff --git a/drivers/net/vmxnet3/vmxnet3_ethtool.c b/drivers/net/vmxnet3/vmxnet3_ethtool.c index a0feb17a0238..63a124340cbe 100644 --- a/drivers/net/vmxnet3/vmxnet3_ethtool.c +++ b/drivers/net/vmxnet3/vmxnet3_ethtool.c @@ -472,6 +472,12 @@ vmxnet3_set_ringparam(struct net_device *netdev, VMXNET3_RX_RING_MAX_SIZE) return -EINVAL; + /* if adapter not yet initialized, do nothing */ + if (adapter->rx_buf_per_pkt == 0) { + netdev_err(netdev, "adapter not completely initialized, " + "ring size cannot be changed yet\n"); + return -EOPNOTSUPP; + } /* round it up to a multiple of VMXNET3_RING_SIZE_ALIGN */ new_tx_ring_size = (param->tx_pending + VMXNET3_RING_SIZE_MASK) & diff --git a/drivers/net/vmxnet3/vmxnet3_int.h b/drivers/net/vmxnet3/vmxnet3_int.h index 3198384689d9..35418146fa17 100644 --- a/drivers/net/vmxnet3/vmxnet3_int.h +++ b/drivers/net/vmxnet3/vmxnet3_int.h @@ -70,10 +70,10 @@ /* * Version numbers */ -#define VMXNET3_DRIVER_VERSION_STRING "1.1.29.0-k" +#define VMXNET3_DRIVER_VERSION_STRING "1.1.30.0-k" /* a 32-bit int, each byte encode a verion number in VMXNET3_DRIVER_VERSION */ -#define VMXNET3_DRIVER_VERSION_NUM 0x01011D00 +#define VMXNET3_DRIVER_VERSION_NUM 0x01011E00 #if defined(CONFIG_PCI_MSI) /* RSS only makes sense if MSI-X is supported. */ diff --git a/drivers/net/vxlan.c b/drivers/net/vxlan.c index f10e58ac9c1b..7cee7a3068ec 100644 --- a/drivers/net/vxlan.c +++ b/drivers/net/vxlan.c @@ -961,6 +961,8 @@ static netdev_tx_t vxlan_xmit(struct sk_buff *skb, struct net_device *dev) iph->ttl = ttl ? : ip4_dst_hoplimit(&rt->dst); tunnel_ip_select_ident(skb, old_iph, &rt->dst); + nf_reset(skb); + vxlan_set_owner(dev, skb); /* See iptunnel_xmit() */ @@ -1504,6 +1506,14 @@ static __net_init int vxlan_init_net(struct net *net) static __net_exit void vxlan_exit_net(struct net *net) { struct vxlan_net *vn = net_generic(net, vxlan_net_id); + struct vxlan_dev *vxlan; + unsigned h; + + rtnl_lock(); + for (h = 0; h < VNI_HASH_SIZE; ++h) + hlist_for_each_entry(vxlan, &vn->vni_list[h], hlist) + dev_close(vxlan->dev); + rtnl_unlock(); if (vn->sock) { sk_release_kernel(vn->sock->sk); diff --git a/drivers/net/wireless/ath/ath9k/ar9003_calib.c b/drivers/net/wireless/ath/ath9k/ar9003_calib.c index 4cc13940c895..f76c3ca07a45 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c @@ -1023,6 +1023,7 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah, AR_PHY_AGC_CONTROL_FLTR_CAL | AR_PHY_AGC_CONTROL_PKDET_CAL; + /* Use chip chainmask only for calibration */ ar9003_hw_set_chain_masks(ah, ah->caps.rx_chainmask, ah->caps.tx_chainmask); if (rtt) { @@ -1150,6 +1151,9 @@ skip_tx_iqcal: ar9003_hw_rtt_disable(ah); } + /* Revert chainmask to runtime parameters */ + ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask); + /* Initialize list pointers */ ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL; diff --git a/drivers/net/wireless/ath/ath9k/link.c b/drivers/net/wireless/ath/ath9k/link.c index ade3afb21f91..39c84ecf6a42 100644 --- a/drivers/net/wireless/ath/ath9k/link.c +++ b/drivers/net/wireless/ath/ath9k/link.c @@ -28,21 +28,21 @@ void ath_tx_complete_poll_work(struct work_struct *work) int i; bool needreset = false; - for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) - if (ATH_TXQ_SETUP(sc, i)) { - txq = &sc->tx.txq[i]; - ath_txq_lock(sc, txq); - if (txq->axq_depth) { - if (txq->axq_tx_inprogress) { - needreset = true; - ath_txq_unlock(sc, txq); - break; - } else { - txq->axq_tx_inprogress = true; - } + for (i = 0; i < IEEE80211_NUM_ACS; i++) { + txq = sc->tx.txq_map[i]; + + ath_txq_lock(sc, txq); + if (txq->axq_depth) { + if (txq->axq_tx_inprogress) { + needreset = true; + ath_txq_unlock(sc, txq); + break; + } else { + txq->axq_tx_inprogress = true; } - ath_txq_unlock_complete(sc, txq); } + ath_txq_unlock_complete(sc, txq); + } if (needreset) { ath_dbg(ath9k_hw_common(sc->sc_ah), RESET, diff --git a/drivers/net/wireless/iwlegacy/3945-mac.c b/drivers/net/wireless/iwlegacy/3945-mac.c index 3630a41df50d..c353b5f19c8c 100644 --- a/drivers/net/wireless/iwlegacy/3945-mac.c +++ b/drivers/net/wireless/iwlegacy/3945-mac.c @@ -475,6 +475,7 @@ il3945_tx_skb(struct il_priv *il, dma_addr_t txcmd_phys; int txq_id = skb_get_queue_mapping(skb); u16 len, idx, hdr_len; + u16 firstlen, secondlen; u8 id; u8 unicast; u8 sta_id; @@ -589,21 +590,22 @@ il3945_tx_skb(struct il_priv *il, len = sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) + hdr_len; - len = (len + 3) & ~3; + firstlen = (len + 3) & ~3; /* Physical address of this Tx command's header (not MAC header!), * within command buffer array. */ txcmd_phys = - pci_map_single(il->pci_dev, &out_cmd->hdr, len, PCI_DMA_TODEVICE); + pci_map_single(il->pci_dev, &out_cmd->hdr, firstlen, + PCI_DMA_TODEVICE); if (unlikely(pci_dma_mapping_error(il->pci_dev, txcmd_phys))) goto drop_unlock; /* Set up TFD's 2nd entry to point directly to remainder of skb, * if any (802.11 null frames have no payload). */ - len = skb->len - hdr_len; - if (len) { + secondlen = skb->len - hdr_len; + if (secondlen > 0) { phys_addr = - pci_map_single(il->pci_dev, skb->data + hdr_len, len, + pci_map_single(il->pci_dev, skb->data + hdr_len, secondlen, PCI_DMA_TODEVICE); if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr))) goto drop_unlock; @@ -611,12 +613,12 @@ il3945_tx_skb(struct il_priv *il, /* Add buffer containing Tx command and MAC(!) header to TFD's * first entry */ - il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, len, 1, 0); + il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, 1, 0); dma_unmap_addr_set(out_meta, mapping, txcmd_phys); - dma_unmap_len_set(out_meta, len, len); - if (len) - il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, len, 0, - U32_PAD(len)); + dma_unmap_len_set(out_meta, len, firstlen); + if (secondlen > 0) + il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, secondlen, 0, + U32_PAD(secondlen)); if (!ieee80211_has_morefrags(hdr->frame_control)) { txq->need_update = 1; diff --git a/drivers/net/wireless/iwlwifi/dvm/sta.c b/drivers/net/wireless/iwlwifi/dvm/sta.c index 94ef33838bc6..b775769f8322 100644 --- a/drivers/net/wireless/iwlwifi/dvm/sta.c +++ b/drivers/net/wireless/iwlwifi/dvm/sta.c @@ -151,7 +151,7 @@ int iwl_send_add_sta(struct iwl_priv *priv, sta_id, sta->sta.addr, flags & CMD_ASYNC ? "a" : ""); if (!(flags & CMD_ASYNC)) { - cmd.flags |= CMD_WANT_SKB | CMD_WANT_HCMD; + cmd.flags |= CMD_WANT_SKB; might_sleep(); } diff --git a/drivers/net/wireless/iwlwifi/iwl-devtrace.h b/drivers/net/wireless/iwlwifi/iwl-devtrace.h index 10f01793d7a6..81aa91fab5aa 100644 --- a/drivers/net/wireless/iwlwifi/iwl-devtrace.h +++ b/drivers/net/wireless/iwlwifi/iwl-devtrace.h @@ -363,7 +363,7 @@ TRACE_EVENT(iwlwifi_dev_hcmd, __entry->flags = cmd->flags; memcpy(__get_dynamic_array(hcmd), hdr, sizeof(*hdr)); - for (i = 0; i < IWL_MAX_CMD_TFDS; i++) { + for (i = 0; i < IWL_MAX_CMD_TBS_PER_TFD; i++) { if (!cmd->len[i]) continue; memcpy((u8 *)__get_dynamic_array(hcmd) + offset, diff --git a/drivers/net/wireless/iwlwifi/iwl-drv.c b/drivers/net/wireless/iwlwifi/iwl-drv.c index 6f228bb2b844..fbfd2d137117 100644 --- a/drivers/net/wireless/iwlwifi/iwl-drv.c +++ b/drivers/net/wireless/iwlwifi/iwl-drv.c @@ -1102,7 +1102,6 @@ void iwl_drv_stop(struct iwl_drv *drv) /* shared module parameters */ struct iwl_mod_params iwlwifi_mod_params = { - .amsdu_size_8K = 1, .restart_fw = 1, .plcp_check = true, .bt_coex_active = true, @@ -1207,7 +1206,7 @@ MODULE_PARM_DESC(11n_disable, "disable 11n functionality, bitmap: 1: full, 2: agg TX, 4: agg RX"); module_param_named(amsdu_size_8K, iwlwifi_mod_params.amsdu_size_8K, int, S_IRUGO); -MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size"); +MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size (default 0)"); module_param_named(fw_restart, iwlwifi_mod_params.restart_fw, int, S_IRUGO); MODULE_PARM_DESC(fw_restart, "restart firmware in case of error"); diff --git a/drivers/net/wireless/iwlwifi/iwl-modparams.h b/drivers/net/wireless/iwlwifi/iwl-modparams.h index e5e3a79eae2f..2c2a729092f5 100644 --- a/drivers/net/wireless/iwlwifi/iwl-modparams.h +++ b/drivers/net/wireless/iwlwifi/iwl-modparams.h @@ -91,7 +91,7 @@ enum iwl_power_level { * @sw_crypto: using hardware encryption, default = 0 * @disable_11n: disable 11n capabilities, default = 0, * use IWL_DISABLE_HT_* constants - * @amsdu_size_8K: enable 8K amsdu size, default = 1 + * @amsdu_size_8K: enable 8K amsdu size, default = 0 * @restart_fw: restart firmware, default = 1 * @plcp_check: enable plcp health check, default = true * @wd_disable: enable stuck queue check, default = 0 diff --git a/drivers/net/wireless/iwlwifi/iwl-trans.h b/drivers/net/wireless/iwlwifi/iwl-trans.h index 8c7bec6b9a0b..0cac2b7af78b 100644 --- a/drivers/net/wireless/iwlwifi/iwl-trans.h +++ b/drivers/net/wireless/iwlwifi/iwl-trans.h @@ -186,19 +186,13 @@ struct iwl_rx_packet { * @CMD_ASYNC: Return right away and don't want for the response * @CMD_WANT_SKB: valid only with CMD_SYNC. The caller needs the buffer of the * response. The caller needs to call iwl_free_resp when done. - * @CMD_WANT_HCMD: The caller needs to get the HCMD that was sent in the - * response handler. Chunks flagged by %IWL_HCMD_DFL_NOCOPY won't be - * copied. The pointer passed to the response handler is in the transport - * ownership and don't need to be freed by the op_mode. This also means - * that the pointer is invalidated after the op_mode's handler returns. * @CMD_ON_DEMAND: This command is sent by the test mode pipe. */ enum CMD_MODE { CMD_SYNC = 0, CMD_ASYNC = BIT(0), CMD_WANT_SKB = BIT(1), - CMD_WANT_HCMD = BIT(2), - CMD_ON_DEMAND = BIT(3), + CMD_ON_DEMAND = BIT(2), }; #define DEF_CMD_PAYLOAD_SIZE 320 @@ -217,7 +211,11 @@ struct iwl_device_cmd { #define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd)) -#define IWL_MAX_CMD_TFDS 2 +/* + * number of transfer buffers (fragments) per transmit frame descriptor; + * this is just the driver's idea, the hardware supports 20 + */ +#define IWL_MAX_CMD_TBS_PER_TFD 2 /** * struct iwl_hcmd_dataflag - flag for each one of the chunks of the command @@ -254,15 +252,15 @@ enum iwl_hcmd_dataflag { * @id: id of the host command */ struct iwl_host_cmd { - const void *data[IWL_MAX_CMD_TFDS]; + const void *data[IWL_MAX_CMD_TBS_PER_TFD]; struct iwl_rx_packet *resp_pkt; unsigned long _rx_page_addr; u32 _rx_page_order; int handler_status; u32 flags; - u16 len[IWL_MAX_CMD_TFDS]; - u8 dataflags[IWL_MAX_CMD_TFDS]; + u16 len[IWL_MAX_CMD_TBS_PER_TFD]; + u8 dataflags[IWL_MAX_CMD_TBS_PER_TFD]; u8 id; }; diff --git a/drivers/net/wireless/iwlwifi/mvm/fw-api.h b/drivers/net/wireless/iwlwifi/mvm/fw-api.h index 23eebda848b0..2adb61f103f4 100644 --- a/drivers/net/wireless/iwlwifi/mvm/fw-api.h +++ b/drivers/net/wireless/iwlwifi/mvm/fw-api.h @@ -762,18 +762,20 @@ struct iwl_phy_context_cmd { #define IWL_RX_INFO_PHY_CNT 8 #define IWL_RX_INFO_AGC_IDX 1 #define IWL_RX_INFO_RSSI_AB_IDX 2 -#define IWL_RX_INFO_RSSI_C_IDX 3 -#define IWL_OFDM_AGC_DB_MSK 0xfe00 -#define IWL_OFDM_AGC_DB_POS 9 +#define IWL_OFDM_AGC_A_MSK 0x0000007f +#define IWL_OFDM_AGC_A_POS 0 +#define IWL_OFDM_AGC_B_MSK 0x00003f80 +#define IWL_OFDM_AGC_B_POS 7 +#define IWL_OFDM_AGC_CODE_MSK 0x3fe00000 +#define IWL_OFDM_AGC_CODE_POS 20 #define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff -#define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00 #define IWL_OFDM_RSSI_A_POS 0 +#define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00 +#define IWL_OFDM_RSSI_ALLBAND_A_POS 8 #define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000 -#define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000 #define IWL_OFDM_RSSI_B_POS 16 -#define IWL_OFDM_RSSI_INBAND_C_MSK 0x00ff -#define IWL_OFDM_RSSI_ALLBAND_C_MSK 0xff00 -#define IWL_OFDM_RSSI_C_POS 0 +#define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000 +#define IWL_OFDM_RSSI_ALLBAND_B_POS 24 /** * struct iwl_rx_phy_info - phy info diff --git a/drivers/net/wireless/iwlwifi/mvm/fw.c b/drivers/net/wireless/iwlwifi/mvm/fw.c index d3d959db03a9..500f818dba04 100644 --- a/drivers/net/wireless/iwlwifi/mvm/fw.c +++ b/drivers/net/wireless/iwlwifi/mvm/fw.c @@ -79,17 +79,8 @@ #define UCODE_VALID_OK cpu_to_le32(0x1) /* Default calibration values for WkP - set to INIT image w/o running */ -static const u8 wkp_calib_values_bb_filter[] = { 0xbf, 0x00, 0x5f, 0x00, 0x2f, - 0x00, 0x18, 0x00 }; -static const u8 wkp_calib_values_rx_dc[] = { 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, - 0x7f, 0x7f, 0x7f }; -static const u8 wkp_calib_values_tx_lo[] = { 0x00, 0x00, 0x00, 0x00 }; -static const u8 wkp_calib_values_tx_iq[] = { 0xff, 0x00, 0xff, 0x00, 0x00, - 0x00 }; -static const u8 wkp_calib_values_rx_iq[] = { 0xff, 0x00, 0x00, 0x00 }; static const u8 wkp_calib_values_rx_iq_skew[] = { 0x00, 0x00, 0x01, 0x00 }; static const u8 wkp_calib_values_tx_iq_skew[] = { 0x01, 0x00, 0x00, 0x00 }; -static const u8 wkp_calib_values_xtal[] = { 0xd2, 0xd2 }; struct iwl_calib_default_data { u16 size; @@ -99,12 +90,7 @@ struct iwl_calib_default_data { #define CALIB_SIZE_N_DATA(_buf) {.size = sizeof(_buf), .data = &_buf} static const struct iwl_calib_default_data wkp_calib_default_data[12] = { - [5] = CALIB_SIZE_N_DATA(wkp_calib_values_rx_dc), - [6] = CALIB_SIZE_N_DATA(wkp_calib_values_bb_filter), - [7] = CALIB_SIZE_N_DATA(wkp_calib_values_tx_lo), - [8] = CALIB_SIZE_N_DATA(wkp_calib_values_tx_iq), [9] = CALIB_SIZE_N_DATA(wkp_calib_values_tx_iq_skew), - [10] = CALIB_SIZE_N_DATA(wkp_calib_values_rx_iq), [11] = CALIB_SIZE_N_DATA(wkp_calib_values_rx_iq_skew), }; @@ -241,20 +227,6 @@ static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, return 0; } -#define IWL_HW_REV_ID_RAINBOW 0x2 -#define IWL_PROJ_TYPE_LHP 0x5 - -static u32 iwl_mvm_build_phy_cfg(struct iwl_mvm *mvm) -{ - struct iwl_nvm_data *data = mvm->nvm_data; - /* Temp calls to static definitions, will be changed to CSR calls */ - u8 hw_rev_id = IWL_HW_REV_ID_RAINBOW; - u8 project_type = IWL_PROJ_TYPE_LHP; - - return data->radio_cfg_dash | (data->radio_cfg_step << 2) | - (hw_rev_id << 4) | ((project_type & 0x7f) << 6) | - (data->valid_tx_ant << 16) | (data->valid_rx_ant << 20); -} static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) { @@ -262,7 +234,7 @@ static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) enum iwl_ucode_type ucode_type = mvm->cur_ucode; /* Set parameters */ - phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_build_phy_cfg(mvm)); + phy_cfg_cmd.phy_cfg = cpu_to_le32(mvm->fw->phy_config); phy_cfg_cmd.calib_control.event_trigger = mvm->fw->default_calib[ucode_type].event_trigger; phy_cfg_cmd.calib_control.flow_trigger = @@ -275,103 +247,6 @@ static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) sizeof(phy_cfg_cmd), &phy_cfg_cmd); } -/* Starting with the new PHY DB implementation - New calibs are enabled */ -/* Value - 0x405e7 */ -#define IWL_CALIB_DEFAULT_FLOW_INIT (IWL_CALIB_CFG_XTAL_IDX |\ - IWL_CALIB_CFG_TEMPERATURE_IDX |\ - IWL_CALIB_CFG_VOLTAGE_READ_IDX |\ - IWL_CALIB_CFG_DC_IDX |\ - IWL_CALIB_CFG_BB_FILTER_IDX |\ - IWL_CALIB_CFG_LO_LEAKAGE_IDX |\ - IWL_CALIB_CFG_TX_IQ_IDX |\ - IWL_CALIB_CFG_RX_IQ_IDX |\ - IWL_CALIB_CFG_AGC_IDX) - -#define IWL_CALIB_DEFAULT_EVENT_INIT 0x0 - -/* Value 0x41567 */ -#define IWL_CALIB_DEFAULT_FLOW_RUN (IWL_CALIB_CFG_XTAL_IDX |\ - IWL_CALIB_CFG_TEMPERATURE_IDX |\ - IWL_CALIB_CFG_VOLTAGE_READ_IDX |\ - IWL_CALIB_CFG_BB_FILTER_IDX |\ - IWL_CALIB_CFG_DC_IDX |\ - IWL_CALIB_CFG_TX_IQ_IDX |\ - IWL_CALIB_CFG_RX_IQ_IDX |\ - IWL_CALIB_CFG_SENSITIVITY_IDX |\ - IWL_CALIB_CFG_AGC_IDX) - -#define IWL_CALIB_DEFAULT_EVENT_RUN (IWL_CALIB_CFG_XTAL_IDX |\ - IWL_CALIB_CFG_TEMPERATURE_IDX |\ - IWL_CALIB_CFG_VOLTAGE_READ_IDX |\ - IWL_CALIB_CFG_TX_PWR_IDX |\ - IWL_CALIB_CFG_DC_IDX |\ - IWL_CALIB_CFG_TX_IQ_IDX |\ - IWL_CALIB_CFG_SENSITIVITY_IDX) - -/* - * Sets the calibrations trigger values that will be sent to the FW for runtime - * and init calibrations. - * The ones given in the FW TLV are not correct. - */ -static void iwl_set_default_calib_trigger(struct iwl_mvm *mvm) -{ - struct iwl_tlv_calib_ctrl default_calib; - - /* - * WkP FW TLV calib bits are wrong, overwrite them. - * This defines the dynamic calibrations which are implemented in the - * uCode both for init(flow) calculation and event driven calibs. - */ - - /* Init Image */ - default_calib.event_trigger = cpu_to_le32(IWL_CALIB_DEFAULT_EVENT_INIT); - default_calib.flow_trigger = cpu_to_le32(IWL_CALIB_DEFAULT_FLOW_INIT); - - if (default_calib.event_trigger != - mvm->fw->default_calib[IWL_UCODE_INIT].event_trigger) - IWL_ERR(mvm, - "Updating the event calib for INIT image: 0x%x -> 0x%x\n", - mvm->fw->default_calib[IWL_UCODE_INIT].event_trigger, - default_calib.event_trigger); - if (default_calib.flow_trigger != - mvm->fw->default_calib[IWL_UCODE_INIT].flow_trigger) - IWL_ERR(mvm, - "Updating the flow calib for INIT image: 0x%x -> 0x%x\n", - mvm->fw->default_calib[IWL_UCODE_INIT].flow_trigger, - default_calib.flow_trigger); - - memcpy((void *)&mvm->fw->default_calib[IWL_UCODE_INIT], - &default_calib, sizeof(struct iwl_tlv_calib_ctrl)); - IWL_ERR(mvm, - "Setting uCode init calibrations event 0x%x, trigger 0x%x\n", - default_calib.event_trigger, - default_calib.flow_trigger); - - /* Run time image */ - default_calib.event_trigger = cpu_to_le32(IWL_CALIB_DEFAULT_EVENT_RUN); - default_calib.flow_trigger = cpu_to_le32(IWL_CALIB_DEFAULT_FLOW_RUN); - - if (default_calib.event_trigger != - mvm->fw->default_calib[IWL_UCODE_REGULAR].event_trigger) - IWL_ERR(mvm, - "Updating the event calib for RT image: 0x%x -> 0x%x\n", - mvm->fw->default_calib[IWL_UCODE_REGULAR].event_trigger, - default_calib.event_trigger); - if (default_calib.flow_trigger != - mvm->fw->default_calib[IWL_UCODE_REGULAR].flow_trigger) - IWL_ERR(mvm, - "Updating the flow calib for RT image: 0x%x -> 0x%x\n", - mvm->fw->default_calib[IWL_UCODE_REGULAR].flow_trigger, - default_calib.flow_trigger); - - memcpy((void *)&mvm->fw->default_calib[IWL_UCODE_REGULAR], - &default_calib, sizeof(struct iwl_tlv_calib_ctrl)); - IWL_ERR(mvm, - "Setting uCode runtime calibs event 0x%x, trigger 0x%x\n", - default_calib.event_trigger, - default_calib.flow_trigger); -} - static int iwl_set_default_calibrations(struct iwl_mvm *mvm) { u8 cmd_raw[16]; /* holds the variable size commands */ @@ -446,8 +321,10 @@ int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) ret = iwl_nvm_check_version(mvm->nvm_data, mvm->trans); WARN_ON(ret); - /* Override the calibrations from TLV and the const of fw */ - iwl_set_default_calib_trigger(mvm); + /* Send TX valid antennas before triggering calibrations */ + ret = iwl_send_tx_ant_cfg(mvm, mvm->nvm_data->valid_tx_ant); + if (ret) + goto error; /* WkP doesn't have all calibrations, need to set default values */ if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_7000) { diff --git a/drivers/net/wireless/iwlwifi/mvm/mvm.h b/drivers/net/wireless/iwlwifi/mvm/mvm.h index 537711b10478..bdae700c769e 100644 --- a/drivers/net/wireless/iwlwifi/mvm/mvm.h +++ b/drivers/net/wireless/iwlwifi/mvm/mvm.h @@ -80,7 +80,8 @@ #define IWL_INVALID_MAC80211_QUEUE 0xff #define IWL_MVM_MAX_ADDRESSES 2 -#define IWL_RSSI_OFFSET 44 +/* RSSI offset for WkP */ +#define IWL_RSSI_OFFSET 50 enum iwl_mvm_tx_fifo { IWL_MVM_TX_FIFO_BK = 0, diff --git a/drivers/net/wireless/iwlwifi/mvm/ops.c b/drivers/net/wireless/iwlwifi/mvm/ops.c index aa59adf87db3..d0f9c1e0475e 100644 --- a/drivers/net/wireless/iwlwifi/mvm/ops.c +++ b/drivers/net/wireless/iwlwifi/mvm/ops.c @@ -624,12 +624,8 @@ static void iwl_mvm_free_skb(struct iwl_op_mode *op_mode, struct sk_buff *skb) ieee80211_free_txskb(mvm->hw, skb); } -static void iwl_mvm_nic_error(struct iwl_op_mode *op_mode) +static void iwl_mvm_nic_restart(struct iwl_mvm *mvm) { - struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); - - iwl_mvm_dump_nic_error_log(mvm); - iwl_abort_notification_waits(&mvm->notif_wait); /* @@ -663,9 +659,21 @@ static void iwl_mvm_nic_error(struct iwl_op_mode *op_mode) } } +static void iwl_mvm_nic_error(struct iwl_op_mode *op_mode) +{ + struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); + + iwl_mvm_dump_nic_error_log(mvm); + + iwl_mvm_nic_restart(mvm); +} + static void iwl_mvm_cmd_queue_full(struct iwl_op_mode *op_mode) { + struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode); + WARN_ON(1); + iwl_mvm_nic_restart(mvm); } static const struct iwl_op_mode_ops iwl_mvm_ops = { diff --git a/drivers/net/wireless/iwlwifi/mvm/rx.c b/drivers/net/wireless/iwlwifi/mvm/rx.c index 3f40ab05bbd8..b0b190d0ec23 100644 --- a/drivers/net/wireless/iwlwifi/mvm/rx.c +++ b/drivers/net/wireless/iwlwifi/mvm/rx.c @@ -131,33 +131,42 @@ static void iwl_mvm_pass_packet_to_mac80211(struct iwl_mvm *mvm, static int iwl_mvm_calc_rssi(struct iwl_mvm *mvm, struct iwl_rx_phy_info *phy_info) { - u32 rssi_a, rssi_b, rssi_c, max_rssi, agc_db; + int rssi_a, rssi_b, rssi_a_dbm, rssi_b_dbm, max_rssi_dbm; + int rssi_all_band_a, rssi_all_band_b; + u32 agc_a, agc_b, max_agc; u32 val; - /* Find max rssi among 3 possible receivers. + /* Find max rssi among 2 possible receivers. * These values are measured by the Digital Signal Processor (DSP). * They should stay fairly constant even as the signal strength varies, * if the radio's Automatic Gain Control (AGC) is working right. * AGC value (see below) will provide the "interesting" info. */ + val = le32_to_cpu(phy_info->non_cfg_phy[IWL_RX_INFO_AGC_IDX]); + agc_a = (val & IWL_OFDM_AGC_A_MSK) >> IWL_OFDM_AGC_A_POS; + agc_b = (val & IWL_OFDM_AGC_B_MSK) >> IWL_OFDM_AGC_B_POS; + max_agc = max_t(u32, agc_a, agc_b); + val = le32_to_cpu(phy_info->non_cfg_phy[IWL_RX_INFO_RSSI_AB_IDX]); rssi_a = (val & IWL_OFDM_RSSI_INBAND_A_MSK) >> IWL_OFDM_RSSI_A_POS; rssi_b = (val & IWL_OFDM_RSSI_INBAND_B_MSK) >> IWL_OFDM_RSSI_B_POS; - val = le32_to_cpu(phy_info->non_cfg_phy[IWL_RX_INFO_RSSI_C_IDX]); - rssi_c = (val & IWL_OFDM_RSSI_INBAND_C_MSK) >> IWL_OFDM_RSSI_C_POS; - - val = le32_to_cpu(phy_info->non_cfg_phy[IWL_RX_INFO_AGC_IDX]); - agc_db = (val & IWL_OFDM_AGC_DB_MSK) >> IWL_OFDM_AGC_DB_POS; + rssi_all_band_a = (val & IWL_OFDM_RSSI_ALLBAND_A_MSK) >> + IWL_OFDM_RSSI_ALLBAND_A_POS; + rssi_all_band_b = (val & IWL_OFDM_RSSI_ALLBAND_B_MSK) >> + IWL_OFDM_RSSI_ALLBAND_B_POS; - max_rssi = max_t(u32, rssi_a, rssi_b); - max_rssi = max_t(u32, max_rssi, rssi_c); + /* + * dBm = rssi dB - agc dB - constant. + * Higher AGC (higher radio gain) means lower signal. + */ + rssi_a_dbm = rssi_a - IWL_RSSI_OFFSET - agc_a; + rssi_b_dbm = rssi_b - IWL_RSSI_OFFSET - agc_b; + max_rssi_dbm = max_t(int, rssi_a_dbm, rssi_b_dbm); - IWL_DEBUG_STATS(mvm, "Rssi In A %d B %d C %d Max %d AGC dB %d\n", - rssi_a, rssi_b, rssi_c, max_rssi, agc_db); + IWL_DEBUG_STATS(mvm, "Rssi In A %d B %d Max %d AGCA %d AGCB %d\n", + rssi_a_dbm, rssi_b_dbm, max_rssi_dbm, agc_a, agc_b); - /* dBm = max_rssi dB - agc dB - constant. - * Higher AGC (higher radio gain) means lower signal. */ - return max_rssi - agc_db - IWL_RSSI_OFFSET; + return max_rssi_dbm; } /* diff --git a/drivers/net/wireless/iwlwifi/mvm/sta.c b/drivers/net/wireless/iwlwifi/mvm/sta.c index 861a7f9f8e7f..274f44e2ef60 100644 --- a/drivers/net/wireless/iwlwifi/mvm/sta.c +++ b/drivers/net/wireless/iwlwifi/mvm/sta.c @@ -770,6 +770,16 @@ int iwl_mvm_sta_tx_agg_stop(struct iwl_mvm *mvm, struct ieee80211_vif *vif, u16 txq_id; int err; + + /* + * If mac80211 is cleaning its state, then say that we finished since + * our state has been cleared anyway. + */ + if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) { + ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); + return 0; + } + spin_lock_bh(&mvmsta->lock); txq_id = tid_data->txq_id; diff --git a/drivers/net/wireless/iwlwifi/mvm/tx.c b/drivers/net/wireless/iwlwifi/mvm/tx.c index 6b67ce3f679c..6645efe5c03e 100644 --- a/drivers/net/wireless/iwlwifi/mvm/tx.c +++ b/drivers/net/wireless/iwlwifi/mvm/tx.c @@ -607,12 +607,8 @@ static void iwl_mvm_rx_tx_cmd_single(struct iwl_mvm *mvm, /* Single frame failure in an AMPDU queue => send BAR */ if (txq_id >= IWL_FIRST_AMPDU_QUEUE && - !(info->flags & IEEE80211_TX_STAT_ACK)) { - /* there must be only one skb in the skb_list */ - WARN_ON_ONCE(skb_freed > 1 || - !skb_queue_empty(&skbs)); + !(info->flags & IEEE80211_TX_STAT_ACK)) info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK; - } /* W/A FW bug: seq_ctl is wrong when the queue is flushed */ if (status == TX_STATUS_FAIL_FIFO_FLUSHED) { diff --git a/drivers/net/wireless/iwlwifi/pcie/internal.h b/drivers/net/wireless/iwlwifi/pcie/internal.h index 3d62e8055352..148843e7f34f 100644 --- a/drivers/net/wireless/iwlwifi/pcie/internal.h +++ b/drivers/net/wireless/iwlwifi/pcie/internal.h @@ -137,10 +137,6 @@ static inline int iwl_queue_dec_wrap(int index, int n_bd) struct iwl_cmd_meta { /* only for SYNC commands, iff the reply skb is wanted */ struct iwl_host_cmd *source; - - DEFINE_DMA_UNMAP_ADDR(mapping); - DEFINE_DMA_UNMAP_LEN(len); - u32 flags; }; @@ -185,25 +181,36 @@ struct iwl_queue { /* * The FH will write back to the first TB only, so we need * to copy some data into the buffer regardless of whether - * it should be mapped or not. This indicates how much to - * copy, even for HCMDs it must be big enough to fit the - * DRAM scratch from the TX cmd, at least 16 bytes. + * it should be mapped or not. This indicates how big the + * first TB must be to include the scratch buffer. Since + * the scratch is 4 bytes at offset 12, it's 16 now. If we + * make it bigger then allocations will be bigger and copy + * slower, so that's probably not useful. */ -#define IWL_HCMD_MIN_COPY_SIZE 16 +#define IWL_HCMD_SCRATCHBUF_SIZE 16 struct iwl_pcie_txq_entry { struct iwl_device_cmd *cmd; - struct iwl_device_cmd *copy_cmd; struct sk_buff *skb; /* buffer to free after command completes */ const void *free_buf; struct iwl_cmd_meta meta; }; +struct iwl_pcie_txq_scratch_buf { + struct iwl_cmd_header hdr; + u8 buf[8]; + __le32 scratch; +}; + /** * struct iwl_txq - Tx Queue for DMA * @q: generic Rx/Tx queue descriptor * @tfds: transmit frame descriptors (DMA memory) + * @scratchbufs: start of command headers, including scratch buffers, for + * the writeback -- this is DMA memory and an array holding one buffer + * for each command on the queue + * @scratchbufs_dma: DMA address for the scratchbufs start * @entries: transmit entries (driver state) * @lock: queue lock * @stuck_timer: timer that fires if queue gets stuck @@ -217,6 +224,8 @@ struct iwl_pcie_txq_entry { struct iwl_txq { struct iwl_queue q; struct iwl_tfd *tfds; + struct iwl_pcie_txq_scratch_buf *scratchbufs; + dma_addr_t scratchbufs_dma; struct iwl_pcie_txq_entry *entries; spinlock_t lock; struct timer_list stuck_timer; @@ -225,6 +234,13 @@ struct iwl_txq { u8 active; }; +static inline dma_addr_t +iwl_pcie_get_scratchbuf_dma(struct iwl_txq *txq, int idx) +{ + return txq->scratchbufs_dma + + sizeof(struct iwl_pcie_txq_scratch_buf) * idx; +} + /** * struct iwl_trans_pcie - PCIe transport specific data * @rxq: all the RX queue data diff --git a/drivers/net/wireless/iwlwifi/pcie/rx.c b/drivers/net/wireless/iwlwifi/pcie/rx.c index b0ae06d2456f..567e67ad1f61 100644 --- a/drivers/net/wireless/iwlwifi/pcie/rx.c +++ b/drivers/net/wireless/iwlwifi/pcie/rx.c @@ -637,22 +637,14 @@ static void iwl_pcie_rx_handle_rb(struct iwl_trans *trans, index = SEQ_TO_INDEX(sequence); cmd_index = get_cmd_index(&txq->q, index); - if (reclaim) { - struct iwl_pcie_txq_entry *ent; - ent = &txq->entries[cmd_index]; - cmd = ent->copy_cmd; - WARN_ON_ONCE(!cmd && ent->meta.flags & CMD_WANT_HCMD); - } else { + if (reclaim) + cmd = txq->entries[cmd_index].cmd; + else cmd = NULL; - } err = iwl_op_mode_rx(trans->op_mode, &rxcb, cmd); if (reclaim) { - /* The original command isn't needed any more */ - kfree(txq->entries[cmd_index].copy_cmd); - txq->entries[cmd_index].copy_cmd = NULL; - /* nor is the duplicated part of the command */ kfree(txq->entries[cmd_index].free_buf); txq->entries[cmd_index].free_buf = NULL; } diff --git a/drivers/net/wireless/iwlwifi/pcie/tx.c b/drivers/net/wireless/iwlwifi/pcie/tx.c index 8b625a7f5685..8595c16f74de 100644 --- a/drivers/net/wireless/iwlwifi/pcie/tx.c +++ b/drivers/net/wireless/iwlwifi/pcie/tx.c @@ -191,12 +191,9 @@ static void iwl_pcie_txq_stuck_timer(unsigned long data) } for (i = q->read_ptr; i != q->write_ptr; - i = iwl_queue_inc_wrap(i, q->n_bd)) { - struct iwl_tx_cmd *tx_cmd = - (struct iwl_tx_cmd *)txq->entries[i].cmd->payload; + i = iwl_queue_inc_wrap(i, q->n_bd)) IWL_ERR(trans, "scratch %d = 0x%08x\n", i, - get_unaligned_le32(&tx_cmd->scratch)); - } + le32_to_cpu(txq->scratchbufs[i].scratch)); iwl_op_mode_nic_error(trans->op_mode); } @@ -367,8 +364,8 @@ static inline u8 iwl_pcie_tfd_get_num_tbs(struct iwl_tfd *tfd) } static void iwl_pcie_tfd_unmap(struct iwl_trans *trans, - struct iwl_cmd_meta *meta, struct iwl_tfd *tfd, - enum dma_data_direction dma_dir) + struct iwl_cmd_meta *meta, + struct iwl_tfd *tfd) { int i; int num_tbs; @@ -382,17 +379,12 @@ static void iwl_pcie_tfd_unmap(struct iwl_trans *trans, return; } - /* Unmap tx_cmd */ - if (num_tbs) - dma_unmap_single(trans->dev, - dma_unmap_addr(meta, mapping), - dma_unmap_len(meta, len), - DMA_BIDIRECTIONAL); + /* first TB is never freed - it's the scratchbuf data */ - /* Unmap chunks, if any. */ for (i = 1; i < num_tbs; i++) dma_unmap_single(trans->dev, iwl_pcie_tfd_tb_get_addr(tfd, i), - iwl_pcie_tfd_tb_get_len(tfd, i), dma_dir); + iwl_pcie_tfd_tb_get_len(tfd, i), + DMA_TO_DEVICE); tfd->num_tbs = 0; } @@ -406,8 +398,7 @@ static void iwl_pcie_tfd_unmap(struct iwl_trans *trans, * Does NOT advance any TFD circular buffer read/write indexes * Does NOT free the TFD itself (which is within circular buffer) */ -static void iwl_pcie_txq_free_tfd(struct iwl_trans *trans, struct iwl_txq *txq, - enum dma_data_direction dma_dir) +static void iwl_pcie_txq_free_tfd(struct iwl_trans *trans, struct iwl_txq *txq) { struct iwl_tfd *tfd_tmp = txq->tfds; @@ -418,8 +409,7 @@ static void iwl_pcie_txq_free_tfd(struct iwl_trans *trans, struct iwl_txq *txq, lockdep_assert_held(&txq->lock); /* We have only q->n_window txq->entries, but we use q->n_bd tfds */ - iwl_pcie_tfd_unmap(trans, &txq->entries[idx].meta, &tfd_tmp[rd_ptr], - dma_dir); + iwl_pcie_tfd_unmap(trans, &txq->entries[idx].meta, &tfd_tmp[rd_ptr]); /* free SKB */ if (txq->entries) { @@ -479,6 +469,7 @@ static int iwl_pcie_txq_alloc(struct iwl_trans *trans, { struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); size_t tfd_sz = sizeof(struct iwl_tfd) * TFD_QUEUE_SIZE_MAX; + size_t scratchbuf_sz; int i; if (WARN_ON(txq->entries || txq->tfds)) @@ -514,9 +505,25 @@ static int iwl_pcie_txq_alloc(struct iwl_trans *trans, IWL_ERR(trans, "dma_alloc_coherent(%zd) failed\n", tfd_sz); goto error; } + + BUILD_BUG_ON(IWL_HCMD_SCRATCHBUF_SIZE != sizeof(*txq->scratchbufs)); + BUILD_BUG_ON(offsetof(struct iwl_pcie_txq_scratch_buf, scratch) != + sizeof(struct iwl_cmd_header) + + offsetof(struct iwl_tx_cmd, scratch)); + + scratchbuf_sz = sizeof(*txq->scratchbufs) * slots_num; + + txq->scratchbufs = dma_alloc_coherent(trans->dev, scratchbuf_sz, + &txq->scratchbufs_dma, + GFP_KERNEL); + if (!txq->scratchbufs) + goto err_free_tfds; + txq->q.id = txq_id; return 0; +err_free_tfds: + dma_free_coherent(trans->dev, tfd_sz, txq->tfds, txq->q.dma_addr); error: if (txq->entries && txq_id == trans_pcie->cmd_queue) for (i = 0; i < slots_num; i++) @@ -565,22 +572,13 @@ static void iwl_pcie_txq_unmap(struct iwl_trans *trans, int txq_id) struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); struct iwl_txq *txq = &trans_pcie->txq[txq_id]; struct iwl_queue *q = &txq->q; - enum dma_data_direction dma_dir; if (!q->n_bd) return; - /* In the command queue, all the TBs are mapped as BIDI - * so unmap them as such. - */ - if (txq_id == trans_pcie->cmd_queue) - dma_dir = DMA_BIDIRECTIONAL; - else - dma_dir = DMA_TO_DEVICE; - spin_lock_bh(&txq->lock); while (q->write_ptr != q->read_ptr) { - iwl_pcie_txq_free_tfd(trans, txq, dma_dir); + iwl_pcie_txq_free_tfd(trans, txq); q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd); } spin_unlock_bh(&txq->lock); @@ -610,7 +608,6 @@ static void iwl_pcie_txq_free(struct iwl_trans *trans, int txq_id) if (txq_id == trans_pcie->cmd_queue) for (i = 0; i < txq->q.n_window; i++) { kfree(txq->entries[i].cmd); - kfree(txq->entries[i].copy_cmd); kfree(txq->entries[i].free_buf); } @@ -619,6 +616,10 @@ static void iwl_pcie_txq_free(struct iwl_trans *trans, int txq_id) dma_free_coherent(dev, sizeof(struct iwl_tfd) * txq->q.n_bd, txq->tfds, txq->q.dma_addr); txq->q.dma_addr = 0; + + dma_free_coherent(dev, + sizeof(*txq->scratchbufs) * txq->q.n_window, + txq->scratchbufs, txq->scratchbufs_dma); } kfree(txq->entries); @@ -962,7 +963,7 @@ void iwl_trans_pcie_reclaim(struct iwl_trans *trans, int txq_id, int ssn, iwl_pcie_txq_inval_byte_cnt_tbl(trans, txq); - iwl_pcie_txq_free_tfd(trans, txq, DMA_TO_DEVICE); + iwl_pcie_txq_free_tfd(trans, txq); } iwl_pcie_txq_progress(trans_pcie, txq); @@ -1152,29 +1153,29 @@ static int iwl_pcie_enqueue_hcmd(struct iwl_trans *trans, void *dup_buf = NULL; dma_addr_t phys_addr; int idx; - u16 copy_size, cmd_size, dma_size; + u16 copy_size, cmd_size, scratch_size; bool had_nocopy = false; int i; u32 cmd_pos; - const u8 *cmddata[IWL_MAX_CMD_TFDS]; - u16 cmdlen[IWL_MAX_CMD_TFDS]; + const u8 *cmddata[IWL_MAX_CMD_TBS_PER_TFD]; + u16 cmdlen[IWL_MAX_CMD_TBS_PER_TFD]; copy_size = sizeof(out_cmd->hdr); cmd_size = sizeof(out_cmd->hdr); /* need one for the header if the first is NOCOPY */ - BUILD_BUG_ON(IWL_MAX_CMD_TFDS > IWL_NUM_OF_TBS - 1); + BUILD_BUG_ON(IWL_MAX_CMD_TBS_PER_TFD > IWL_NUM_OF_TBS - 1); - for (i = 0; i < IWL_MAX_CMD_TFDS; i++) { + for (i = 0; i < IWL_MAX_CMD_TBS_PER_TFD; i++) { cmddata[i] = cmd->data[i]; cmdlen[i] = cmd->len[i]; if (!cmd->len[i]) continue; - /* need at least IWL_HCMD_MIN_COPY_SIZE copied */ - if (copy_size < IWL_HCMD_MIN_COPY_SIZE) { - int copy = IWL_HCMD_MIN_COPY_SIZE - copy_size; + /* need at least IWL_HCMD_SCRATCHBUF_SIZE copied */ + if (copy_size < IWL_HCMD_SCRATCHBUF_SIZE) { + int copy = IWL_HCMD_SCRATCHBUF_SIZE - copy_size; if (copy > cmdlen[i]) copy = cmdlen[i]; @@ -1260,15 +1261,15 @@ static int iwl_pcie_enqueue_hcmd(struct iwl_trans *trans, /* and copy the data that needs to be copied */ cmd_pos = offsetof(struct iwl_device_cmd, payload); copy_size = sizeof(out_cmd->hdr); - for (i = 0; i < IWL_MAX_CMD_TFDS; i++) { + for (i = 0; i < IWL_MAX_CMD_TBS_PER_TFD; i++) { int copy = 0; if (!cmd->len) continue; - /* need at least IWL_HCMD_MIN_COPY_SIZE copied */ - if (copy_size < IWL_HCMD_MIN_COPY_SIZE) { - copy = IWL_HCMD_MIN_COPY_SIZE - copy_size; + /* need at least IWL_HCMD_SCRATCHBUF_SIZE copied */ + if (copy_size < IWL_HCMD_SCRATCHBUF_SIZE) { + copy = IWL_HCMD_SCRATCHBUF_SIZE - copy_size; if (copy > cmd->len[i]) copy = cmd->len[i]; @@ -1286,50 +1287,38 @@ static int iwl_pcie_enqueue_hcmd(struct iwl_trans *trans, } } - WARN_ON_ONCE(txq->entries[idx].copy_cmd); - - /* - * since out_cmd will be the source address of the FH, it will write - * the retry count there. So when the user needs to receivce the HCMD - * that corresponds to the response in the response handler, it needs - * to set CMD_WANT_HCMD. - */ - if (cmd->flags & CMD_WANT_HCMD) { - txq->entries[idx].copy_cmd = - kmemdup(out_cmd, cmd_pos, GFP_ATOMIC); - if (unlikely(!txq->entries[idx].copy_cmd)) { - idx = -ENOMEM; - goto out; - } - } - IWL_DEBUG_HC(trans, "Sending command %s (#%x), seq: 0x%04X, %d bytes at %d[%d]:%d\n", get_cmd_string(trans_pcie, out_cmd->hdr.cmd), out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence), cmd_size, q->write_ptr, idx, trans_pcie->cmd_queue); - /* - * If the entire command is smaller than IWL_HCMD_MIN_COPY_SIZE, we must - * still map at least that many bytes for the hardware to write back to. - * We have enough space, so that's not a problem. - */ - dma_size = max_t(u16, copy_size, IWL_HCMD_MIN_COPY_SIZE); + /* start the TFD with the scratchbuf */ + scratch_size = min_t(int, copy_size, IWL_HCMD_SCRATCHBUF_SIZE); + memcpy(&txq->scratchbufs[q->write_ptr], &out_cmd->hdr, scratch_size); + iwl_pcie_txq_build_tfd(trans, txq, + iwl_pcie_get_scratchbuf_dma(txq, q->write_ptr), + scratch_size, 1); + + /* map first command fragment, if any remains */ + if (copy_size > scratch_size) { + phys_addr = dma_map_single(trans->dev, + ((u8 *)&out_cmd->hdr) + scratch_size, + copy_size - scratch_size, + DMA_TO_DEVICE); + if (dma_mapping_error(trans->dev, phys_addr)) { + iwl_pcie_tfd_unmap(trans, out_meta, + &txq->tfds[q->write_ptr]); + idx = -ENOMEM; + goto out; + } - phys_addr = dma_map_single(trans->dev, &out_cmd->hdr, dma_size, - DMA_BIDIRECTIONAL); - if (unlikely(dma_mapping_error(trans->dev, phys_addr))) { - idx = -ENOMEM; - goto out; + iwl_pcie_txq_build_tfd(trans, txq, phys_addr, + copy_size - scratch_size, 0); } - dma_unmap_addr_set(out_meta, mapping, phys_addr); - dma_unmap_len_set(out_meta, len, dma_size); - - iwl_pcie_txq_build_tfd(trans, txq, phys_addr, copy_size, 1); - /* map the remaining (adjusted) nocopy/dup fragments */ - for (i = 0; i < IWL_MAX_CMD_TFDS; i++) { + for (i = 0; i < IWL_MAX_CMD_TBS_PER_TFD; i++) { const void *data = cmddata[i]; if (!cmdlen[i]) @@ -1340,11 +1329,10 @@ static int iwl_pcie_enqueue_hcmd(struct iwl_trans *trans, if (cmd->dataflags[i] & IWL_HCMD_DFL_DUP) data = dup_buf; phys_addr = dma_map_single(trans->dev, (void *)data, - cmdlen[i], DMA_BIDIRECTIONAL); + cmdlen[i], DMA_TO_DEVICE); if (dma_mapping_error(trans->dev, phys_addr)) { iwl_pcie_tfd_unmap(trans, out_meta, - &txq->tfds[q->write_ptr], - DMA_BIDIRECTIONAL); + &txq->tfds[q->write_ptr]); idx = -ENOMEM; goto out; } @@ -1418,7 +1406,7 @@ void iwl_pcie_hcmd_complete(struct iwl_trans *trans, cmd = txq->entries[cmd_index].cmd; meta = &txq->entries[cmd_index].meta; - iwl_pcie_tfd_unmap(trans, meta, &txq->tfds[index], DMA_BIDIRECTIONAL); + iwl_pcie_tfd_unmap(trans, meta, &txq->tfds[index]); /* Input error checking is done when commands are added to queue. */ if (meta->flags & CMD_WANT_SKB) { @@ -1597,10 +1585,9 @@ int iwl_trans_pcie_tx(struct iwl_trans *trans, struct sk_buff *skb, struct iwl_cmd_meta *out_meta; struct iwl_txq *txq; struct iwl_queue *q; - dma_addr_t phys_addr = 0; - dma_addr_t txcmd_phys; - dma_addr_t scratch_phys; - u16 len, firstlen, secondlen; + dma_addr_t tb0_phys, tb1_phys, scratch_phys; + void *tb1_addr; + u16 len, tb1_len, tb2_len; u8 wait_write_ptr = 0; __le16 fc = hdr->frame_control; u8 hdr_len = ieee80211_hdrlen(fc); @@ -1638,85 +1625,80 @@ int iwl_trans_pcie_tx(struct iwl_trans *trans, struct sk_buff *skb, cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) | INDEX_TO_SEQ(q->write_ptr))); + tb0_phys = iwl_pcie_get_scratchbuf_dma(txq, q->write_ptr); + scratch_phys = tb0_phys + sizeof(struct iwl_cmd_header) + + offsetof(struct iwl_tx_cmd, scratch); + + tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys); + tx_cmd->dram_msb_ptr = iwl_get_dma_hi_addr(scratch_phys); + /* Set up first empty entry in queue's array of Tx/cmd buffers */ out_meta = &txq->entries[q->write_ptr].meta; /* - * Use the first empty entry in this queue's command buffer array - * to contain the Tx command and MAC header concatenated together - * (payload data will be in another buffer). - * Size of this varies, due to varying MAC header length. - * If end is not dword aligned, we'll have 2 extra bytes at the end - * of the MAC header (device reads on dword boundaries). - * We'll tell device about this padding later. + * The second TB (tb1) points to the remainder of the TX command + * and the 802.11 header - dword aligned size + * (This calculation modifies the TX command, so do it before the + * setup of the first TB) */ - len = sizeof(struct iwl_tx_cmd) + - sizeof(struct iwl_cmd_header) + hdr_len; - firstlen = (len + 3) & ~3; + len = sizeof(struct iwl_tx_cmd) + sizeof(struct iwl_cmd_header) + + hdr_len - IWL_HCMD_SCRATCHBUF_SIZE; + tb1_len = (len + 3) & ~3; /* Tell NIC about any 2-byte padding after MAC header */ - if (firstlen != len) + if (tb1_len != len) tx_cmd->tx_flags |= TX_CMD_FLG_MH_PAD_MSK; - /* Physical address of this Tx command's header (not MAC header!), - * within command buffer array. */ - txcmd_phys = dma_map_single(trans->dev, - &dev_cmd->hdr, firstlen, - DMA_BIDIRECTIONAL); - if (unlikely(dma_mapping_error(trans->dev, txcmd_phys))) - goto out_err; - dma_unmap_addr_set(out_meta, mapping, txcmd_phys); - dma_unmap_len_set(out_meta, len, firstlen); + /* The first TB points to the scratchbuf data - min_copy bytes */ + memcpy(&txq->scratchbufs[q->write_ptr], &dev_cmd->hdr, + IWL_HCMD_SCRATCHBUF_SIZE); + iwl_pcie_txq_build_tfd(trans, txq, tb0_phys, + IWL_HCMD_SCRATCHBUF_SIZE, 1); - if (!ieee80211_has_morefrags(fc)) { - txq->need_update = 1; - } else { - wait_write_ptr = 1; - txq->need_update = 0; - } + /* there must be data left over for TB1 or this code must be changed */ + BUILD_BUG_ON(sizeof(struct iwl_tx_cmd) < IWL_HCMD_SCRATCHBUF_SIZE); - /* Set up TFD's 2nd entry to point directly to remainder of skb, - * if any (802.11 null frames have no payload). */ - secondlen = skb->len - hdr_len; - if (secondlen > 0) { - phys_addr = dma_map_single(trans->dev, skb->data + hdr_len, - secondlen, DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(trans->dev, phys_addr))) { - dma_unmap_single(trans->dev, - dma_unmap_addr(out_meta, mapping), - dma_unmap_len(out_meta, len), - DMA_BIDIRECTIONAL); + /* map the data for TB1 */ + tb1_addr = ((u8 *)&dev_cmd->hdr) + IWL_HCMD_SCRATCHBUF_SIZE; + tb1_phys = dma_map_single(trans->dev, tb1_addr, tb1_len, DMA_TO_DEVICE); + if (unlikely(dma_mapping_error(trans->dev, tb1_phys))) + goto out_err; + iwl_pcie_txq_build_tfd(trans, txq, tb1_phys, tb1_len, 0); + + /* + * Set up TFD's third entry to point directly to remainder + * of skb, if any (802.11 null frames have no payload). + */ + tb2_len = skb->len - hdr_len; + if (tb2_len > 0) { + dma_addr_t tb2_phys = dma_map_single(trans->dev, + skb->data + hdr_len, + tb2_len, DMA_TO_DEVICE); + if (unlikely(dma_mapping_error(trans->dev, tb2_phys))) { + iwl_pcie_tfd_unmap(trans, out_meta, + &txq->tfds[q->write_ptr]); goto out_err; } + iwl_pcie_txq_build_tfd(trans, txq, tb2_phys, tb2_len, 0); } - /* Attach buffers to TFD */ - iwl_pcie_txq_build_tfd(trans, txq, txcmd_phys, firstlen, 1); - if (secondlen > 0) - iwl_pcie_txq_build_tfd(trans, txq, phys_addr, secondlen, 0); - - scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) + - offsetof(struct iwl_tx_cmd, scratch); - - /* take back ownership of DMA buffer to enable update */ - dma_sync_single_for_cpu(trans->dev, txcmd_phys, firstlen, - DMA_BIDIRECTIONAL); - tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys); - tx_cmd->dram_msb_ptr = iwl_get_dma_hi_addr(scratch_phys); - /* Set up entry for this TFD in Tx byte-count array */ iwl_pcie_txq_update_byte_cnt_tbl(trans, txq, le16_to_cpu(tx_cmd->len)); - dma_sync_single_for_device(trans->dev, txcmd_phys, firstlen, - DMA_BIDIRECTIONAL); - trace_iwlwifi_dev_tx(trans->dev, skb, &txq->tfds[txq->q.write_ptr], sizeof(struct iwl_tfd), - &dev_cmd->hdr, firstlen, - skb->data + hdr_len, secondlen); + &dev_cmd->hdr, IWL_HCMD_SCRATCHBUF_SIZE + tb1_len, + skb->data + hdr_len, tb2_len); trace_iwlwifi_dev_tx_data(trans->dev, skb, - skb->data + hdr_len, secondlen); + skb->data + hdr_len, tb2_len); + + if (!ieee80211_has_morefrags(fc)) { + txq->need_update = 1; + } else { + wait_write_ptr = 1; + txq->need_update = 0; + } /* start timer if queue currently empty */ if (txq->need_update && q->read_ptr == q->write_ptr && diff --git a/drivers/net/wireless/mwifiex/cmdevt.c b/drivers/net/wireless/mwifiex/cmdevt.c index 20a6c5555873..b5c8b962ce12 100644 --- a/drivers/net/wireless/mwifiex/cmdevt.c +++ b/drivers/net/wireless/mwifiex/cmdevt.c @@ -157,6 +157,20 @@ static int mwifiex_dnld_cmd_to_fw(struct mwifiex_private *priv, return -1; } + cmd_code = le16_to_cpu(host_cmd->command); + cmd_size = le16_to_cpu(host_cmd->size); + + if (adapter->hw_status == MWIFIEX_HW_STATUS_RESET && + cmd_code != HostCmd_CMD_FUNC_SHUTDOWN && + cmd_code != HostCmd_CMD_FUNC_INIT) { + dev_err(adapter->dev, + "DNLD_CMD: FW in reset state, ignore cmd %#x\n", + cmd_code); + mwifiex_complete_cmd(adapter, cmd_node); + mwifiex_insert_cmd_to_free_q(adapter, cmd_node); + return -1; + } + /* Set command sequence number */ adapter->seq_num++; host_cmd->seq_num = cpu_to_le16(HostCmd_SET_SEQ_NO_BSS_INFO @@ -168,9 +182,6 @@ static int mwifiex_dnld_cmd_to_fw(struct mwifiex_private *priv, adapter->curr_cmd = cmd_node; spin_unlock_irqrestore(&adapter->mwifiex_cmd_lock, flags); - cmd_code = le16_to_cpu(host_cmd->command); - cmd_size = le16_to_cpu(host_cmd->size); - /* Adjust skb length */ if (cmd_node->cmd_skb->len > cmd_size) /* @@ -484,8 +495,6 @@ int mwifiex_send_cmd_sync(struct mwifiex_private *priv, uint16_t cmd_no, ret = mwifiex_send_cmd_async(priv, cmd_no, cmd_action, cmd_oid, data_buf); - if (!ret) - ret = mwifiex_wait_queue_complete(adapter); return ret; } @@ -588,9 +597,10 @@ int mwifiex_send_cmd_async(struct mwifiex_private *priv, uint16_t cmd_no, if (cmd_no == HostCmd_CMD_802_11_SCAN) { mwifiex_queue_scan_cmd(priv, cmd_node); } else { - adapter->cmd_queued = cmd_node; mwifiex_insert_cmd_to_pending_q(adapter, cmd_node, true); queue_work(adapter->workqueue, &adapter->main_work); + if (cmd_node->wait_q_enabled) + ret = mwifiex_wait_queue_complete(adapter, cmd_node); } return ret; diff --git a/drivers/net/wireless/mwifiex/init.c b/drivers/net/wireless/mwifiex/init.c index e38aa9b3663d..0ff4c37ab42a 100644 --- a/drivers/net/wireless/mwifiex/init.c +++ b/drivers/net/wireless/mwifiex/init.c @@ -709,6 +709,14 @@ mwifiex_shutdown_drv(struct mwifiex_adapter *adapter) return ret; } + /* cancel current command */ + if (adapter->curr_cmd) { + dev_warn(adapter->dev, "curr_cmd is still in processing\n"); + del_timer(&adapter->cmd_timer); + mwifiex_insert_cmd_to_free_q(adapter, adapter->curr_cmd); + adapter->curr_cmd = NULL; + } + /* shut down mwifiex */ dev_dbg(adapter->dev, "info: shutdown mwifiex...\n"); diff --git a/drivers/net/wireless/mwifiex/join.c b/drivers/net/wireless/mwifiex/join.c index 246aa62a4817..2fe0ceba4400 100644 --- a/drivers/net/wireless/mwifiex/join.c +++ b/drivers/net/wireless/mwifiex/join.c @@ -1117,10 +1117,9 @@ mwifiex_cmd_802_11_ad_hoc_join(struct mwifiex_private *priv, adhoc_join->bss_descriptor.bssid, adhoc_join->bss_descriptor.ssid); - for (i = 0; bss_desc->supported_rates[i] && - i < MWIFIEX_SUPPORTED_RATES; - i++) - ; + for (i = 0; i < MWIFIEX_SUPPORTED_RATES && + bss_desc->supported_rates[i]; i++) + ; rates_size = i; /* Copy Data Rates from the Rates recorded in scan response */ diff --git a/drivers/net/wireless/mwifiex/main.h b/drivers/net/wireless/mwifiex/main.h index 553adfb0aa81..7035ade9af74 100644 --- a/drivers/net/wireless/mwifiex/main.h +++ b/drivers/net/wireless/mwifiex/main.h @@ -723,7 +723,6 @@ struct mwifiex_adapter { u16 cmd_wait_q_required; struct mwifiex_wait_queue cmd_wait_q; u8 scan_wait_q_woken; - struct cmd_ctrl_node *cmd_queued; spinlock_t queue_lock; /* lock for tx queues */ struct completion fw_load; u8 country_code[IEEE80211_COUNTRY_STRING_LEN]; @@ -1018,7 +1017,8 @@ int mwifiex_request_set_multicast_list(struct mwifiex_private *priv, struct mwifiex_multicast_list *mcast_list); int mwifiex_copy_mcast_addr(struct mwifiex_multicast_list *mlist, struct net_device *dev); -int mwifiex_wait_queue_complete(struct mwifiex_adapter *adapter); +int mwifiex_wait_queue_complete(struct mwifiex_adapter *adapter, + struct cmd_ctrl_node *cmd_queued); int mwifiex_bss_start(struct mwifiex_private *priv, struct cfg80211_bss *bss, struct cfg80211_ssid *req_ssid); int mwifiex_cancel_hs(struct mwifiex_private *priv, int cmd_type); diff --git a/drivers/net/wireless/mwifiex/scan.c b/drivers/net/wireless/mwifiex/scan.c index bb60c2754a97..d215b4d3c51b 100644 --- a/drivers/net/wireless/mwifiex/scan.c +++ b/drivers/net/wireless/mwifiex/scan.c @@ -1388,10 +1388,13 @@ int mwifiex_scan_networks(struct mwifiex_private *priv, list_del(&cmd_node->list); spin_unlock_irqrestore(&adapter->scan_pending_q_lock, flags); - adapter->cmd_queued = cmd_node; mwifiex_insert_cmd_to_pending_q(adapter, cmd_node, true); queue_work(adapter->workqueue, &adapter->main_work); + + /* Perform internal scan synchronously */ + if (!priv->scan_request) + mwifiex_wait_queue_complete(adapter, cmd_node); } else { spin_unlock_irqrestore(&adapter->scan_pending_q_lock, flags); @@ -1946,9 +1949,6 @@ int mwifiex_request_scan(struct mwifiex_private *priv, /* Normal scan */ ret = mwifiex_scan_networks(priv, NULL); - if (!ret) - ret = mwifiex_wait_queue_complete(priv->adapter); - up(&priv->async_sem); return ret; diff --git a/drivers/net/wireless/mwifiex/sta_ioctl.c b/drivers/net/wireless/mwifiex/sta_ioctl.c index 9f33c92c90f5..13100f8de3db 100644 --- a/drivers/net/wireless/mwifiex/sta_ioctl.c +++ b/drivers/net/wireless/mwifiex/sta_ioctl.c @@ -54,16 +54,10 @@ int mwifiex_copy_mcast_addr(struct mwifiex_multicast_list *mlist, * This function waits on a cmd wait queue. It also cancels the pending * request after waking up, in case of errors. */ -int mwifiex_wait_queue_complete(struct mwifiex_adapter *adapter) +int mwifiex_wait_queue_complete(struct mwifiex_adapter *adapter, + struct cmd_ctrl_node *cmd_queued) { int status; - struct cmd_ctrl_node *cmd_queued; - - if (!adapter->cmd_queued) - return 0; - - cmd_queued = adapter->cmd_queued; - adapter->cmd_queued = NULL; dev_dbg(adapter->dev, "cmd pending\n"); atomic_inc(&adapter->cmd_pending); diff --git a/drivers/net/wireless/rt2x00/Kconfig b/drivers/net/wireless/rt2x00/Kconfig index 44d6ead43341..2bf4efa33186 100644 --- a/drivers/net/wireless/rt2x00/Kconfig +++ b/drivers/net/wireless/rt2x00/Kconfig @@ -55,10 +55,10 @@ config RT61PCI config RT2800PCI tristate "Ralink rt27xx/rt28xx/rt30xx (PCI/PCIe/PCMCIA) support" - depends on PCI || RALINK_RT288X || RALINK_RT305X + depends on PCI || SOC_RT288X || SOC_RT305X select RT2800_LIB select RT2X00_LIB_PCI if PCI - select RT2X00_LIB_SOC if RALINK_RT288X || RALINK_RT305X + select RT2X00_LIB_SOC if SOC_RT288X || SOC_RT305X select RT2X00_LIB_FIRMWARE select RT2X00_LIB_CRYPTO select CRC_CCITT diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c index 48a01aa21f1c..ded73da4de0b 100644 --- a/drivers/net/wireless/rt2x00/rt2800pci.c +++ b/drivers/net/wireless/rt2x00/rt2800pci.c @@ -89,7 +89,7 @@ static void rt2800pci_mcu_status(struct rt2x00_dev *rt2x00dev, const u8 token) rt2x00pci_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0); } -#if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT305X) +#if defined(CONFIG_SOC_RT288X) || defined(CONFIG_SOC_RT305X) static int rt2800pci_read_eeprom_soc(struct rt2x00_dev *rt2x00dev) { void __iomem *base_addr = ioremap(0x1F040000, EEPROM_SIZE); @@ -107,7 +107,7 @@ static inline int rt2800pci_read_eeprom_soc(struct rt2x00_dev *rt2x00dev) { return -ENOMEM; } -#endif /* CONFIG_RALINK_RT288X || CONFIG_RALINK_RT305X */ +#endif /* CONFIG_SOC_RT288X || CONFIG_SOC_RT305X */ #ifdef CONFIG_PCI static void rt2800pci_eepromregister_read(struct eeprom_93cx6 *eeprom) @@ -1177,7 +1177,7 @@ MODULE_DEVICE_TABLE(pci, rt2800pci_device_table); #endif /* CONFIG_PCI */ MODULE_LICENSE("GPL"); -#if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT305X) +#if defined(CONFIG_SOC_RT288X) || defined(CONFIG_SOC_RT305X) static int rt2800soc_probe(struct platform_device *pdev) { return rt2x00soc_probe(pdev, &rt2800pci_ops); @@ -1194,7 +1194,7 @@ static struct platform_driver rt2800soc_driver = { .suspend = rt2x00soc_suspend, .resume = rt2x00soc_resume, }; -#endif /* CONFIG_RALINK_RT288X || CONFIG_RALINK_RT305X */ +#endif /* CONFIG_SOC_RT288X || CONFIG_SOC_RT305X */ #ifdef CONFIG_PCI static int rt2800pci_probe(struct pci_dev *pci_dev, @@ -1217,7 +1217,7 @@ static int __init rt2800pci_init(void) { int ret = 0; -#if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT305X) +#if defined(CONFIG_SOC_RT288X) || defined(CONFIG_SOC_RT305X) ret = platform_driver_register(&rt2800soc_driver); if (ret) return ret; @@ -1225,7 +1225,7 @@ static int __init rt2800pci_init(void) #ifdef CONFIG_PCI ret = pci_register_driver(&rt2800pci_driver); if (ret) { -#if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT305X) +#if defined(CONFIG_SOC_RT288X) || defined(CONFIG_SOC_RT305X) platform_driver_unregister(&rt2800soc_driver); #endif return ret; @@ -1240,7 +1240,7 @@ static void __exit rt2800pci_exit(void) #ifdef CONFIG_PCI pci_unregister_driver(&rt2800pci_driver); #endif -#if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT305X) +#if defined(CONFIG_SOC_RT288X) || defined(CONFIG_SOC_RT305X) platform_driver_unregister(&rt2800soc_driver); #endif } diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c b/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c index b1ccff474c79..c08d0f4c5f3d 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c +++ b/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c @@ -1377,74 +1377,57 @@ void rtl92cu_card_disable(struct ieee80211_hw *hw) void rtl92cu_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid) { - /* dummy routine needed for callback from rtl_op_configure_filter() */ -} - -/*========================================================================== */ - -static void _rtl92cu_set_check_bssid(struct ieee80211_hw *hw, - enum nl80211_iftype type) -{ struct rtl_priv *rtlpriv = rtl_priv(hw); - u32 reg_rcr = rtl_read_dword(rtlpriv, REG_RCR); struct rtl_hal *rtlhal = rtl_hal(rtlpriv); - struct rtl_phy *rtlphy = &(rtlpriv->phy); - u8 filterout_non_associated_bssid = false; + u32 reg_rcr = rtl_read_dword(rtlpriv, REG_RCR); - switch (type) { - case NL80211_IFTYPE_ADHOC: - case NL80211_IFTYPE_STATION: - filterout_non_associated_bssid = true; - break; - case NL80211_IFTYPE_UNSPECIFIED: - case NL80211_IFTYPE_AP: - default: - break; - } - if (filterout_non_associated_bssid) { + if (rtlpriv->psc.rfpwr_state != ERFON) + return; + + if (check_bssid) { + u8 tmp; if (IS_NORMAL_CHIP(rtlhal->version)) { - switch (rtlphy->current_io_type) { - case IO_CMD_RESUME_DM_BY_SCAN: - reg_rcr |= (RCR_CBSSID_DATA | RCR_CBSSID_BCN); - rtlpriv->cfg->ops->set_hw_reg(hw, - HW_VAR_RCR, (u8 *)(®_rcr)); - /* enable update TSF */ - _rtl92cu_set_bcn_ctrl_reg(hw, 0, BIT(4)); - break; - case IO_CMD_PAUSE_DM_BY_SCAN: - reg_rcr &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN); - rtlpriv->cfg->ops->set_hw_reg(hw, - HW_VAR_RCR, (u8 *)(®_rcr)); - /* disable update TSF */ - _rtl92cu_set_bcn_ctrl_reg(hw, BIT(4), 0); - break; - } + reg_rcr |= (RCR_CBSSID_DATA | RCR_CBSSID_BCN); + tmp = BIT(4); } else { - reg_rcr |= (RCR_CBSSID); - rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, - (u8 *)(®_rcr)); - _rtl92cu_set_bcn_ctrl_reg(hw, 0, (BIT(4)|BIT(5))); + reg_rcr |= RCR_CBSSID; + tmp = BIT(4) | BIT(5); } - } else if (filterout_non_associated_bssid == false) { + rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, + (u8 *) (®_rcr)); + _rtl92cu_set_bcn_ctrl_reg(hw, 0, tmp); + } else { + u8 tmp; if (IS_NORMAL_CHIP(rtlhal->version)) { - reg_rcr &= (~(RCR_CBSSID_DATA | RCR_CBSSID_BCN)); - rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, - (u8 *)(®_rcr)); - _rtl92cu_set_bcn_ctrl_reg(hw, BIT(4), 0); + reg_rcr &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN); + tmp = BIT(4); } else { - reg_rcr &= (~RCR_CBSSID); - rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, - (u8 *)(®_rcr)); - _rtl92cu_set_bcn_ctrl_reg(hw, (BIT(4)|BIT(5)), 0); + reg_rcr &= ~RCR_CBSSID; + tmp = BIT(4) | BIT(5); } + reg_rcr &= (~(RCR_CBSSID_DATA | RCR_CBSSID_BCN)); + rtlpriv->cfg->ops->set_hw_reg(hw, + HW_VAR_RCR, (u8 *) (®_rcr)); + _rtl92cu_set_bcn_ctrl_reg(hw, tmp, 0); } } +/*========================================================================== */ + int rtl92cu_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type) { + struct rtl_priv *rtlpriv = rtl_priv(hw); + if (_rtl92cu_set_media_status(hw, type)) return -EOPNOTSUPP; - _rtl92cu_set_check_bssid(hw, type); + + if (rtlpriv->mac80211.link_state == MAC80211_LINKED) { + if (type != NL80211_IFTYPE_AP) + rtl92cu_set_check_bssid(hw, true); + } else { + rtl92cu_set_check_bssid(hw, false); + } + return 0; } @@ -2058,8 +2041,6 @@ void rtl92cu_update_hal_rate_table(struct ieee80211_hw *hw, (shortgi_rate << 4) | (shortgi_rate); } rtl_write_dword(rtlpriv, REG_ARFR0 + ratr_index * 4, ratr_value); - RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, "%x\n", - rtl_read_dword(rtlpriv, REG_ARFR0)); } void rtl92cu_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level) diff --git a/drivers/net/wireless/rtlwifi/usb.c b/drivers/net/wireless/rtlwifi/usb.c index 156b52732f3d..5847d6d0881e 100644 --- a/drivers/net/wireless/rtlwifi/usb.c +++ b/drivers/net/wireless/rtlwifi/usb.c @@ -851,6 +851,7 @@ static void _rtl_usb_transmit(struct ieee80211_hw *hw, struct sk_buff *skb, if (unlikely(!_urb)) { RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Can't allocate urb. Drop skb!\n"); + kfree_skb(skb); return; } _rtl_submit_tx_urb(hw, _urb); diff --git a/drivers/pci/rom.c b/drivers/pci/rom.c index ab886b7ee327..b41ac7756a4b 100644 --- a/drivers/pci/rom.c +++ b/drivers/pci/rom.c @@ -100,6 +100,27 @@ size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size) return min((size_t)(image - rom), size); } +static loff_t pci_find_rom(struct pci_dev *pdev, size_t *size) +{ + struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; + loff_t start; + + /* assign the ROM an address if it doesn't have one */ + if (res->parent == NULL && pci_assign_resource(pdev, PCI_ROM_RESOURCE)) + return 0; + start = pci_resource_start(pdev, PCI_ROM_RESOURCE); + *size = pci_resource_len(pdev, PCI_ROM_RESOURCE); + + if (*size == 0) + return 0; + + /* Enable ROM space decodes */ + if (pci_enable_rom(pdev)) + return 0; + + return start; +} + /** * pci_map_rom - map a PCI ROM to kernel space * @pdev: pointer to pci device struct @@ -114,21 +135,15 @@ size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size) void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size) { struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; - loff_t start; + loff_t start = 0; void __iomem *rom; /* - * Some devices may provide ROMs via a source other than the BAR - */ - if (pdev->rom && pdev->romlen) { - *size = pdev->romlen; - return phys_to_virt(pdev->rom); - /* * IORESOURCE_ROM_SHADOW set on x86, x86_64 and IA64 supports legacy * memory map if the VGA enable bit of the Bridge Control register is * set for embedded VGA. */ - } else if (res->flags & IORESOURCE_ROM_SHADOW) { + if (res->flags & IORESOURCE_ROM_SHADOW) { /* primary video rom always starts here */ start = (loff_t)0xC0000; *size = 0x20000; /* cover C000:0 through E000:0 */ @@ -139,21 +154,21 @@ void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size) return (void __iomem *)(unsigned long) pci_resource_start(pdev, PCI_ROM_RESOURCE); } else { - /* assign the ROM an address if it doesn't have one */ - if (res->parent == NULL && - pci_assign_resource(pdev,PCI_ROM_RESOURCE)) - return NULL; - start = pci_resource_start(pdev, PCI_ROM_RESOURCE); - *size = pci_resource_len(pdev, PCI_ROM_RESOURCE); - if (*size == 0) - return NULL; - - /* Enable ROM space decodes */ - if (pci_enable_rom(pdev)) - return NULL; + start = pci_find_rom(pdev, size); } } + /* + * Some devices may provide ROMs via a source other than the BAR + */ + if (!start && pdev->rom && pdev->romlen) { + *size = pdev->romlen; + return phys_to_virt(pdev->rom); + } + + if (!start) + return NULL; + rom = ioremap(start, *size); if (!rom) { /* restore enable if ioremap fails */ diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 34f51d2d90d2..5a690ce6d60d 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -166,6 +166,7 @@ config PINCTRL_SINGLE depends on OF select PINMUX select PINCONF + select GENERIC_PINCONF help This selects the device tree based generic pinctrl driver. diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c index b0de6e7f1fdb..f8a632dc877b 100644 --- a/drivers/pinctrl/core.c +++ b/drivers/pinctrl/core.c @@ -27,6 +27,7 @@ #include <linux/pinctrl/consumer.h> #include <linux/pinctrl/pinctrl.h> #include <linux/pinctrl/machine.h> +#include <asm-generic/gpio.h> #include "core.h" #include "devicetree.h" #include "pinmux.h" @@ -277,6 +278,39 @@ pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio) } /** + * pinctrl_ready_for_gpio_range() - check if other GPIO pins of + * the same GPIO chip are in range + * @gpio: gpio pin to check taken from the global GPIO pin space + * + * This function is complement of pinctrl_match_gpio_range(). If the return + * value of pinctrl_match_gpio_range() is NULL, this function could be used + * to check whether pinctrl device is ready or not. Maybe some GPIO pins + * of the same GPIO chip don't have back-end pinctrl interface. + * If the return value is true, it means that pinctrl device is ready & the + * certain GPIO pin doesn't have back-end pinctrl device. If the return value + * is false, it means that pinctrl device may not be ready. + */ +static bool pinctrl_ready_for_gpio_range(unsigned gpio) +{ + struct pinctrl_dev *pctldev; + struct pinctrl_gpio_range *range = NULL; + struct gpio_chip *chip = gpio_to_chip(gpio); + + /* Loop over the pin controllers */ + list_for_each_entry(pctldev, &pinctrldev_list, node) { + /* Loop over the ranges */ + list_for_each_entry(range, &pctldev->gpio_ranges, node) { + /* Check if any gpio range overlapped with gpio chip */ + if (range->base + range->npins - 1 < chip->base || + range->base > chip->base + chip->ngpio - 1) + continue; + return true; + } + } + return false; +} + +/** * pinctrl_get_device_gpio_range() - find device for GPIO range * @gpio: the pin to locate the pin controller for * @outdev: the pin control device if found @@ -443,6 +477,8 @@ int pinctrl_request_gpio(unsigned gpio) ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); if (ret) { + if (pinctrl_ready_for_gpio_range(gpio)) + ret = 0; mutex_unlock(&pinctrl_mutex); return ret; } @@ -979,9 +1015,8 @@ static int devm_pinctrl_match(struct device *dev, void *res, void *data) */ void devm_pinctrl_put(struct pinctrl *p) { - WARN_ON(devres_destroy(p->dev, devm_pinctrl_release, + WARN_ON(devres_release(p->dev, devm_pinctrl_release, devm_pinctrl_match, p)); - pinctrl_put(p); } EXPORT_SYMBOL_GPL(devm_pinctrl_put); diff --git a/drivers/pinctrl/devicetree.c b/drivers/pinctrl/devicetree.c index fd40a11ad645..c7b7cb477129 100644 --- a/drivers/pinctrl/devicetree.c +++ b/drivers/pinctrl/devicetree.c @@ -41,7 +41,7 @@ static void dt_free_map(struct pinctrl_dev *pctldev, struct pinctrl_map *map, unsigned num_maps) { if (pctldev) { - struct pinctrl_ops *ops = pctldev->desc->pctlops; + const struct pinctrl_ops *ops = pctldev->desc->pctlops; ops->dt_free_map(pctldev, map, num_maps); } else { /* There is no pctldev for PIN_MAP_TYPE_DUMMY_STATE */ @@ -122,7 +122,7 @@ static int dt_to_map_one_config(struct pinctrl *p, const char *statename, { struct device_node *np_pctldev; struct pinctrl_dev *pctldev; - struct pinctrl_ops *ops; + const struct pinctrl_ops *ops; int ret; struct pinctrl_map *map; unsigned num_maps; diff --git a/drivers/pinctrl/mvebu/pinctrl-mvebu.c b/drivers/pinctrl/mvebu/pinctrl-mvebu.c index c689c04a4f52..7f34a2b212d2 100644 --- a/drivers/pinctrl/mvebu/pinctrl-mvebu.c +++ b/drivers/pinctrl/mvebu/pinctrl-mvebu.c @@ -263,7 +263,7 @@ static void mvebu_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, return; } -static struct pinconf_ops mvebu_pinconf_ops = { +static const struct pinconf_ops mvebu_pinconf_ops = { .pin_config_group_get = mvebu_pinconf_group_get, .pin_config_group_set = mvebu_pinconf_group_set, .pin_config_group_dbg_show = mvebu_pinconf_group_dbg_show, @@ -369,7 +369,7 @@ static int mvebu_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, return -ENOTSUPP; } -static struct pinmux_ops mvebu_pinmux_ops = { +static const struct pinmux_ops mvebu_pinmux_ops = { .get_functions_count = mvebu_pinmux_get_funcs_count, .get_function_name = mvebu_pinmux_get_func_name, .get_function_groups = mvebu_pinmux_get_groups, @@ -470,7 +470,7 @@ static void mvebu_pinctrl_dt_free_map(struct pinctrl_dev *pctldev, kfree(map); } -static struct pinctrl_ops mvebu_pinctrl_ops = { +static const struct pinctrl_ops mvebu_pinctrl_ops = { .get_groups_count = mvebu_pinctrl_get_groups_count, .get_group_name = mvebu_pinctrl_get_group_name, .get_group_pins = mvebu_pinctrl_get_group_pins, @@ -620,7 +620,7 @@ int mvebu_pinctrl_probe(struct platform_device *pdev) /* special soc specific control */ if (ctrl->mpp_get || ctrl->mpp_set) { - if (!ctrl->name || !ctrl->mpp_set || !ctrl->mpp_set) { + if (!ctrl->name || !ctrl->mpp_get || !ctrl->mpp_set) { dev_err(&pdev->dev, "wrong soc control info\n"); return -EINVAL; } diff --git a/drivers/pinctrl/pinconf-generic.c b/drivers/pinctrl/pinconf-generic.c index 06c304ac6f7d..9c436858812c 100644 --- a/drivers/pinctrl/pinconf-generic.c +++ b/drivers/pinctrl/pinconf-generic.c @@ -12,6 +12,7 @@ #define pr_fmt(fmt) "generic pinconfig core: " fmt #include <linux/kernel.h> +#include <linux/module.h> #include <linux/init.h> #include <linux/device.h> #include <linux/slab.h> @@ -120,4 +121,17 @@ void pinconf_generic_dump_group(struct pinctrl_dev *pctldev, } } +void pinconf_generic_dump_config(struct pinctrl_dev *pctldev, + struct seq_file *s, unsigned long config) +{ + int i; + + for(i = 0; i < ARRAY_SIZE(conf_items); i++) { + if (pinconf_to_config_param(config) != conf_items[i].param) + continue; + seq_printf(s, "%s: 0x%x", conf_items[i].display, + pinconf_to_config_argument(config)); + } +} +EXPORT_SYMBOL_GPL(pinconf_generic_dump_config); #endif diff --git a/drivers/pinctrl/pinconf.c b/drivers/pinctrl/pinconf.c index ac8d382a79bb..dae927f91088 100644 --- a/drivers/pinctrl/pinconf.c +++ b/drivers/pinctrl/pinconf.c @@ -622,7 +622,7 @@ static const struct file_operations pinconf_dbg_pinname_fops = { static int pinconf_dbg_state_print(struct seq_file *s, void *d) { if (strlen(dbg_state_name)) - seq_printf(s, "%s\n", dbg_pinname); + seq_printf(s, "%s\n", dbg_state_name); else seq_printf(s, "No pin state set\n"); return 0; @@ -670,7 +670,7 @@ static int pinconf_dbg_config_print(struct seq_file *s, void *d) struct pinctrl_maps *maps_node; struct pinctrl_map const *map; struct pinctrl_dev *pctldev = NULL; - struct pinconf_ops *confops = NULL; + const struct pinconf_ops *confops = NULL; int i, j; bool found = false; diff --git a/drivers/pinctrl/pinconf.h b/drivers/pinctrl/pinconf.h index e3ed8cb072a5..92c7267244d2 100644 --- a/drivers/pinctrl/pinconf.h +++ b/drivers/pinctrl/pinconf.h @@ -90,7 +90,7 @@ static inline void pinconf_init_device_debugfs(struct dentry *devroot, * pin config. */ -#ifdef CONFIG_GENERIC_PINCONF +#if defined(CONFIG_GENERIC_PINCONF) && defined(CONFIG_DEBUG_FS) void pinconf_generic_dump_pin(struct pinctrl_dev *pctldev, struct seq_file *s, unsigned pin); @@ -98,6 +98,8 @@ void pinconf_generic_dump_pin(struct pinctrl_dev *pctldev, void pinconf_generic_dump_group(struct pinctrl_dev *pctldev, struct seq_file *s, const char *gname); +void pinconf_generic_dump_config(struct pinctrl_dev *pctldev, + struct seq_file *s, unsigned long config); #else static inline void pinconf_generic_dump_pin(struct pinctrl_dev *pctldev, @@ -114,4 +116,10 @@ static inline void pinconf_generic_dump_group(struct pinctrl_dev *pctldev, return; } +static inline void pinconf_generic_dump_config(struct pinctrl_dev *pctldev, + struct seq_file *s, + unsigned long config) +{ + return; +} #endif diff --git a/drivers/pinctrl/pinctrl-abx500.c b/drivers/pinctrl/pinctrl-abx500.c index caecdd373061..0cf3fa4a21ae 100644 --- a/drivers/pinctrl/pinctrl-abx500.c +++ b/drivers/pinctrl/pinctrl-abx500.c @@ -422,7 +422,7 @@ static u8 abx500_get_mode(struct pinctrl_dev *pctldev, struct gpio_chip *chip, } /* check if pin use AlternateFunction register */ - if ((af.alt_bit1 == UNUSED) && (af.alt_bit1 == UNUSED)) + if ((af.alt_bit1 == UNUSED) && (af.alt_bit2 == UNUSED)) return mode; /* * if pin GPIOSEL bit is set and pin supports alternate function, @@ -656,7 +656,7 @@ static void abx500_gpio_disable_free(struct pinctrl_dev *pctldev, { } -static struct pinmux_ops abx500_pinmux_ops = { +static const struct pinmux_ops abx500_pinmux_ops = { .get_functions_count = abx500_pmx_get_funcs_cnt, .get_function_name = abx500_pmx_get_func_name, .get_function_groups = abx500_pmx_get_func_groups, @@ -704,7 +704,7 @@ static void abx500_pin_dbg_show(struct pinctrl_dev *pctldev, chip->base + offset - 1); } -static struct pinctrl_ops abx500_pinctrl_ops = { +static const struct pinctrl_ops abx500_pinctrl_ops = { .get_groups_count = abx500_get_groups_cnt, .get_group_name = abx500_get_group_name, .get_group_pins = abx500_get_group_pins, @@ -778,7 +778,7 @@ int abx500_pin_config_set(struct pinctrl_dev *pctldev, return ret; } -static struct pinconf_ops abx500_pinconf_ops = { +static const struct pinconf_ops abx500_pinconf_ops = { .pin_config_get = abx500_pin_config_get, .pin_config_set = abx500_pin_config_set, }; @@ -834,6 +834,7 @@ static const struct of_device_id abx500_gpio_match[] = { { .compatible = "stericsson,ab8505-gpio", .data = (void *)PINCTRL_AB8505, }, { .compatible = "stericsson,ab8540-gpio", .data = (void *)PINCTRL_AB8540, }, { .compatible = "stericsson,ab9540-gpio", .data = (void *)PINCTRL_AB9540, }, + { } }; static int abx500_gpio_probe(struct platform_device *pdev) diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c index 75933a6aa828..49bdc4410075 100644 --- a/drivers/pinctrl/pinctrl-at91.c +++ b/drivers/pinctrl/pinctrl-at91.c @@ -18,6 +18,7 @@ #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/irqdomain.h> +#include <linux/irqchip/chained_irq.h> #include <linux/io.h> #include <linux/gpio.h> #include <linux/pinctrl/machine.h> @@ -27,8 +28,6 @@ /* Since we request GPIOs from ourself */ #include <linux/pinctrl/consumer.h> -#include <asm/mach/irq.h> - #include <mach/hardware.h> #include <mach/at91_pio.h> @@ -294,7 +293,7 @@ static void at91_dt_free_map(struct pinctrl_dev *pctldev, { } -static struct pinctrl_ops at91_pctrl_ops = { +static const struct pinctrl_ops at91_pctrl_ops = { .get_groups_count = at91_get_groups_count, .get_group_name = at91_get_group_name, .get_group_pins = at91_get_group_pins, @@ -696,7 +695,7 @@ static void at91_gpio_disable_free(struct pinctrl_dev *pctldev, /* Set the pin to some default state, GPIO is usually default */ } -static struct pinmux_ops at91_pmx_ops = { +static const struct pinmux_ops at91_pmx_ops = { .get_functions_count = at91_pmx_get_funcs_count, .get_function_name = at91_pmx_get_func_name, .get_function_groups = at91_pmx_get_groups, @@ -776,7 +775,7 @@ static void at91_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, { } -static struct pinconf_ops at91_pinconf_ops = { +static const struct pinconf_ops at91_pinconf_ops = { .pin_config_get = at91_pinconf_get, .pin_config_set = at91_pinconf_set, .pin_config_dbg_show = at91_pinconf_dbg_show, @@ -1277,21 +1276,80 @@ static int alt_gpio_irq_type(struct irq_data *d, unsigned type) } #ifdef CONFIG_PM + +static u32 wakeups[MAX_GPIO_BANKS]; +static u32 backups[MAX_GPIO_BANKS]; + static int gpio_irq_set_wake(struct irq_data *d, unsigned state) { struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(d); unsigned bank = at91_gpio->pioc_idx; + unsigned mask = 1 << d->hwirq; if (unlikely(bank >= MAX_GPIO_BANKS)) return -EINVAL; + if (state) + wakeups[bank] |= mask; + else + wakeups[bank] &= ~mask; + irq_set_irq_wake(at91_gpio->pioc_virq, state); return 0; } + +void at91_pinctrl_gpio_suspend(void) +{ + int i; + + for (i = 0; i < gpio_banks; i++) { + void __iomem *pio; + + if (!gpio_chips[i]) + continue; + + pio = gpio_chips[i]->regbase; + + backups[i] = __raw_readl(pio + PIO_IMR); + __raw_writel(backups[i], pio + PIO_IDR); + __raw_writel(wakeups[i], pio + PIO_IER); + + if (!wakeups[i]) { + clk_unprepare(gpio_chips[i]->clock); + clk_disable(gpio_chips[i]->clock); + } else { + printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", + 'A'+i, wakeups[i]); + } + } +} + +void at91_pinctrl_gpio_resume(void) +{ + int i; + + for (i = 0; i < gpio_banks; i++) { + void __iomem *pio; + + if (!gpio_chips[i]) + continue; + + pio = gpio_chips[i]->regbase; + + if (!wakeups[i]) { + if (clk_prepare(gpio_chips[i]->clock) == 0) + clk_enable(gpio_chips[i]->clock); + } + + __raw_writel(wakeups[i], pio + PIO_IDR); + __raw_writel(backups[i], pio + PIO_IER); + } +} + #else #define gpio_irq_set_wake NULL -#endif +#endif /* CONFIG_PM */ static struct irq_chip gpio_irqchip = { .name = "GPIO", diff --git a/drivers/pinctrl/pinctrl-bcm2835.c b/drivers/pinctrl/pinctrl-bcm2835.c index 4eb6d2c4e4df..f28d4b08771a 100644 --- a/drivers/pinctrl/pinctrl-bcm2835.c +++ b/drivers/pinctrl/pinctrl-bcm2835.c @@ -795,7 +795,7 @@ out: return err; } -static struct pinctrl_ops bcm2835_pctl_ops = { +static const struct pinctrl_ops bcm2835_pctl_ops = { .get_groups_count = bcm2835_pctl_get_groups_count, .get_group_name = bcm2835_pctl_get_group_name, .get_group_pins = bcm2835_pctl_get_group_pins, @@ -872,7 +872,7 @@ static int bcm2835_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, return 0; } -static struct pinmux_ops bcm2835_pmx_ops = { +static const struct pinmux_ops bcm2835_pmx_ops = { .get_functions_count = bcm2835_pmx_get_functions_count, .get_function_name = bcm2835_pmx_get_function_name, .get_function_groups = bcm2835_pmx_get_function_groups, @@ -916,7 +916,7 @@ static int bcm2835_pinconf_set(struct pinctrl_dev *pctldev, return 0; } -static struct pinconf_ops bcm2835_pinconf_ops = { +static const struct pinconf_ops bcm2835_pinconf_ops = { .pin_config_get = bcm2835_pinconf_get, .pin_config_set = bcm2835_pinconf_set, }; diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c index 538b9ddaadf7..7265e551dddb 100644 --- a/drivers/pinctrl/pinctrl-exynos.c +++ b/drivers/pinctrl/pinctrl-exynos.c @@ -23,13 +23,12 @@ #include <linux/interrupt.h> #include <linux/irqdomain.h> #include <linux/irq.h> +#include <linux/irqchip/chained_irq.h> #include <linux/of_irq.h> #include <linux/io.h> #include <linux/slab.h> #include <linux/err.h> -#include <asm/mach/irq.h> - #include "pinctrl-samsung.h" #include "pinctrl-exynos.h" diff --git a/drivers/pinctrl/pinctrl-exynos5440.c b/drivers/pinctrl/pinctrl-exynos5440.c index 1376eb7305db..169ea3e5f777 100644 --- a/drivers/pinctrl/pinctrl-exynos5440.c +++ b/drivers/pinctrl/pinctrl-exynos5440.c @@ -286,7 +286,7 @@ static void exynos5440_dt_free_map(struct pinctrl_dev *pctldev, } /* list of pinctrl callbacks for the pinctrl core */ -static struct pinctrl_ops exynos5440_pctrl_ops = { +static const struct pinctrl_ops exynos5440_pctrl_ops = { .get_groups_count = exynos5440_get_group_count, .get_group_name = exynos5440_get_group_name, .get_group_pins = exynos5440_get_group_pins, @@ -374,7 +374,7 @@ static int exynos5440_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, } /* list of pinmux callbacks for the pinmux vertical in pinctrl core */ -static struct pinmux_ops exynos5440_pinmux_ops = { +static const struct pinmux_ops exynos5440_pinmux_ops = { .get_functions_count = exynos5440_get_functions_count, .get_function_name = exynos5440_pinmux_get_fname, .get_function_groups = exynos5440_pinmux_get_groups, @@ -523,7 +523,7 @@ static int exynos5440_pinconf_group_get(struct pinctrl_dev *pctldev, } /* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */ -static struct pinconf_ops exynos5440_pinconf_ops = { +static const struct pinconf_ops exynos5440_pinconf_ops = { .pin_config_get = exynos5440_pinconf_get, .pin_config_set = exynos5440_pinconf_set, .pin_config_group_get = exynos5440_pinconf_group_get, diff --git a/drivers/pinctrl/pinctrl-falcon.c b/drivers/pinctrl/pinctrl-falcon.c index af97a1f90007..f9b2a1d4854f 100644 --- a/drivers/pinctrl/pinctrl-falcon.c +++ b/drivers/pinctrl/pinctrl-falcon.c @@ -353,7 +353,7 @@ static void falcon_pinconf_group_dbg_show(struct pinctrl_dev *pctrldev, { } -static struct pinconf_ops falcon_pinconf_ops = { +static const struct pinconf_ops falcon_pinconf_ops = { .pin_config_get = falcon_pinconf_get, .pin_config_set = falcon_pinconf_set, .pin_config_group_get = falcon_pinconf_group_get, diff --git a/drivers/pinctrl/pinctrl-imx.c b/drivers/pinctrl/pinctrl-imx.c index 4cebb9c6c5c5..0ef190449eab 100644 --- a/drivers/pinctrl/pinctrl-imx.c +++ b/drivers/pinctrl/pinctrl-imx.c @@ -207,7 +207,7 @@ static void imx_dt_free_map(struct pinctrl_dev *pctldev, kfree(map); } -static struct pinctrl_ops imx_pctrl_ops = { +static const struct pinctrl_ops imx_pctrl_ops = { .get_groups_count = imx_get_groups_count, .get_group_name = imx_get_group_name, .get_group_pins = imx_get_group_pins, @@ -299,7 +299,7 @@ static int imx_pmx_get_groups(struct pinctrl_dev *pctldev, unsigned selector, return 0; } -static struct pinmux_ops imx_pmx_ops = { +static const struct pinmux_ops imx_pmx_ops = { .get_functions_count = imx_pmx_get_funcs_count, .get_function_name = imx_pmx_get_func_name, .get_function_groups = imx_pmx_get_groups, @@ -397,7 +397,7 @@ static void imx_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, } } -static struct pinconf_ops imx_pinconf_ops = { +static const struct pinconf_ops imx_pinconf_ops = { .pin_config_get = imx_pinconf_get, .pin_config_set = imx_pinconf_set, .pin_config_dbg_show = imx_pinconf_dbg_show, diff --git a/drivers/pinctrl/pinctrl-lantiq.c b/drivers/pinctrl/pinctrl-lantiq.c index a70384611351..615c5002b757 100644 --- a/drivers/pinctrl/pinctrl-lantiq.c +++ b/drivers/pinctrl/pinctrl-lantiq.c @@ -169,7 +169,7 @@ static int ltq_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev, return 0; } -static struct pinctrl_ops ltq_pctrl_ops = { +static const struct pinctrl_ops ltq_pctrl_ops = { .get_groups_count = ltq_get_group_count, .get_group_name = ltq_get_group_name, .get_group_pins = ltq_get_group_pins, @@ -311,7 +311,7 @@ static int ltq_pmx_gpio_request_enable(struct pinctrl_dev *pctrldev, return info->apply_mux(pctrldev, mfp, pin_func); } -static struct pinmux_ops ltq_pmx_ops = { +static const struct pinmux_ops ltq_pmx_ops = { .get_functions_count = ltq_pmx_func_count, .get_function_name = ltq_pmx_func_name, .get_function_groups = ltq_pmx_get_groups, diff --git a/drivers/pinctrl/pinctrl-mxs.c b/drivers/pinctrl/pinctrl-mxs.c index 23af9f1f9c35..b45c4eb35798 100644 --- a/drivers/pinctrl/pinctrl-mxs.c +++ b/drivers/pinctrl/pinctrl-mxs.c @@ -158,7 +158,7 @@ static void mxs_dt_free_map(struct pinctrl_dev *pctldev, kfree(map); } -static struct pinctrl_ops mxs_pinctrl_ops = { +static const struct pinctrl_ops mxs_pinctrl_ops = { .get_groups_count = mxs_get_groups_count, .get_group_name = mxs_get_group_name, .get_group_pins = mxs_get_group_pins, @@ -219,7 +219,7 @@ static int mxs_pinctrl_enable(struct pinctrl_dev *pctldev, unsigned selector, return 0; } -static struct pinmux_ops mxs_pinmux_ops = { +static const struct pinmux_ops mxs_pinmux_ops = { .get_functions_count = mxs_pinctrl_get_funcs_count, .get_function_name = mxs_pinctrl_get_func_name, .get_function_groups = mxs_pinctrl_get_func_groups, @@ -319,7 +319,7 @@ static void mxs_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, seq_printf(s, "0x%lx", config); } -static struct pinconf_ops mxs_pinconf_ops = { +static const struct pinconf_ops mxs_pinconf_ops = { .pin_config_get = mxs_pinconf_get, .pin_config_set = mxs_pinconf_set, .pin_config_group_get = mxs_pinconf_group_get, diff --git a/drivers/pinctrl/pinctrl-nomadik.c b/drivers/pinctrl/pinctrl-nomadik.c index 36d20293de5c..3fc8b9941963 100644 --- a/drivers/pinctrl/pinctrl-nomadik.c +++ b/drivers/pinctrl/pinctrl-nomadik.c @@ -23,6 +23,7 @@ #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/irqdomain.h> +#include <linux/irqchip/chained_irq.h> #include <linux/slab.h> #include <linux/of_device.h> #include <linux/of_address.h> @@ -33,7 +34,6 @@ /* Since we request GPIOs from ourself */ #include <linux/pinctrl/consumer.h> #include <linux/platform_data/pinctrl-nomadik.h> -#include <asm/mach/irq.h> #include "pinctrl-nomadik.h" #include "core.h" @@ -1764,7 +1764,7 @@ int nmk_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev, return 0; } -static struct pinctrl_ops nmk_pinctrl_ops = { +static const struct pinctrl_ops nmk_pinctrl_ops = { .get_groups_count = nmk_get_groups_cnt, .get_group_name = nmk_get_group_name, .get_group_pins = nmk_get_group_pins, @@ -1975,7 +1975,7 @@ static void nmk_gpio_disable_free(struct pinctrl_dev *pctldev, /* Set the pin to some default state, GPIO is usually default */ } -static struct pinmux_ops nmk_pinmux_ops = { +static const struct pinmux_ops nmk_pinmux_ops = { .get_functions_count = nmk_pmx_get_funcs_cnt, .get_function_name = nmk_pmx_get_func_name, .get_function_groups = nmk_pmx_get_func_groups, @@ -2089,7 +2089,7 @@ static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned pin, return 0; } -static struct pinconf_ops nmk_pinconf_ops = { +static const struct pinconf_ops nmk_pinconf_ops = { .pin_config_get = nmk_pin_config_get, .pin_config_set = nmk_pin_config_set, }; diff --git a/drivers/pinctrl/pinctrl-pxa3xx.c b/drivers/pinctrl/pinctrl-pxa3xx.c index 1f49bb02a6af..05e11de1d144 100644 --- a/drivers/pinctrl/pinctrl-pxa3xx.c +++ b/drivers/pinctrl/pinctrl-pxa3xx.c @@ -53,7 +53,7 @@ static int pxa3xx_get_group_pins(struct pinctrl_dev *pctrldev, return 0; } -static struct pinctrl_ops pxa3xx_pctrl_ops = { +static const struct pinctrl_ops pxa3xx_pctrl_ops = { .get_groups_count = pxa3xx_get_groups_count, .get_group_name = pxa3xx_get_group_name, .get_group_pins = pxa3xx_get_group_pins, @@ -161,7 +161,7 @@ static int pxa3xx_pmx_request_gpio(struct pinctrl_dev *pctrldev, return 0; } -static struct pinmux_ops pxa3xx_pmx_ops = { +static const struct pinmux_ops pxa3xx_pmx_ops = { .get_functions_count = pxa3xx_pmx_get_funcs_count, .get_function_name = pxa3xx_pmx_get_func_name, .get_function_groups = pxa3xx_pmx_get_groups, diff --git a/drivers/pinctrl/pinctrl-samsung.c b/drivers/pinctrl/pinctrl-samsung.c index f206df175656..3475b92b24a4 100644 --- a/drivers/pinctrl/pinctrl-samsung.c +++ b/drivers/pinctrl/pinctrl-samsung.c @@ -214,7 +214,7 @@ static void samsung_dt_free_map(struct pinctrl_dev *pctldev, } /* list of pinctrl callbacks for the pinctrl core */ -static struct pinctrl_ops samsung_pctrl_ops = { +static const struct pinctrl_ops samsung_pctrl_ops = { .get_groups_count = samsung_get_group_count, .get_group_name = samsung_get_group_name, .get_group_pins = samsung_get_group_pins, @@ -357,7 +357,7 @@ static int samsung_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, } /* list of pinmux callbacks for the pinmux vertical in pinctrl core */ -static struct pinmux_ops samsung_pinmux_ops = { +static const struct pinmux_ops samsung_pinmux_ops = { .get_functions_count = samsung_get_functions_count, .get_function_name = samsung_pinmux_get_fname, .get_function_groups = samsung_pinmux_get_groups, @@ -468,7 +468,7 @@ static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev, } /* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */ -static struct pinconf_ops samsung_pinconf_ops = { +static const struct pinconf_ops samsung_pinconf_ops = { .pin_config_get = samsung_pinconf_get, .pin_config_set = samsung_pinconf_set, .pin_config_group_get = samsung_pinconf_group_get, diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index 5c32e880bcb2..e35dabd3135d 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -22,8 +22,10 @@ #include <linux/pinctrl/pinctrl.h> #include <linux/pinctrl/pinmux.h> +#include <linux/pinctrl/pinconf-generic.h> #include "core.h" +#include "pinconf.h" #define DRIVER_NAME "pinctrl-single" #define PCS_MUX_PINS_NAME "pinctrl-single,pins" @@ -59,6 +61,33 @@ struct pcs_func_vals { }; /** + * struct pcs_conf_vals - pinconf parameter, pinconf register offset + * and value, enable, disable, mask + * @param: config parameter + * @val: user input bits in the pinconf register + * @enable: enable bits in the pinconf register + * @disable: disable bits in the pinconf register + * @mask: mask bits in the register value + */ +struct pcs_conf_vals { + enum pin_config_param param; + unsigned val; + unsigned enable; + unsigned disable; + unsigned mask; +}; + +/** + * struct pcs_conf_type - pinconf property name, pinconf param pair + * @name: property name in DTS file + * @param: config parameter + */ +struct pcs_conf_type { + const char *name; + enum pin_config_param param; +}; + +/** * struct pcs_function - pinctrl function * @name: pinctrl function name * @vals: register and vals array @@ -73,6 +102,22 @@ struct pcs_function { unsigned nvals; const char **pgnames; int npgnames; + struct pcs_conf_vals *conf; + int nconfs; + struct list_head node; +}; + +/** + * struct pcs_gpiofunc_range - pin ranges with same mux value of gpio function + * @offset: offset base of pins + * @npins: number pins with the same mux value of gpio function + * @gpiofunc: mux value of gpio function + * @node: list node + */ +struct pcs_gpiofunc_range { + unsigned offset; + unsigned npins; + unsigned gpiofunc; struct list_head node; }; @@ -117,12 +162,14 @@ struct pcs_name { * @fshift: function register shift * @foff: value to turn mux off * @fmax: max number of functions in fmask + * @is_pinconf: whether supports pinconf * @names: array of register names for pins * @pins: physical pins on the SoC * @pgtree: pingroup index radix tree * @ftree: function index radix tree * @pingroups: list of pingroups * @functions: list of functions + * @gpiofuncs: list of gpio functions * @ngroups: number of pingroups * @nfuncs: number of functions * @desc: pin controller descriptor @@ -142,12 +189,14 @@ struct pcs_device { unsigned foff; unsigned fmax; bool bits_per_mux; + bool is_pinconf; struct pcs_name *names; struct pcs_data pins; struct radix_tree_root pgtree; struct radix_tree_root ftree; struct list_head pingroups; struct list_head functions; + struct list_head gpiofuncs; unsigned ngroups; unsigned nfuncs; struct pinctrl_desc desc; @@ -155,6 +204,16 @@ struct pcs_device { void (*write)(unsigned val, void __iomem *reg); }; +static int pcs_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin, + unsigned long *config); +static int pcs_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin, + unsigned long config); + +static enum pin_config_param pcs_bias[] = { + PIN_CONFIG_BIAS_PULL_DOWN, + PIN_CONFIG_BIAS_PULL_UP, +}; + /* * REVISIT: Reads and writes could eventually use regmap or something * generic. But at least on omaps, some mux registers are performance @@ -270,7 +329,7 @@ static int pcs_dt_node_to_map(struct pinctrl_dev *pctldev, struct device_node *np_config, struct pinctrl_map **map, unsigned *num_maps); -static struct pinctrl_ops pcs_pinctrl_ops = { +static const struct pinctrl_ops pcs_pinctrl_ops = { .get_groups_count = pcs_get_groups_count, .get_group_name = pcs_get_group_name, .get_group_pins = pcs_get_group_pins, @@ -326,6 +385,28 @@ static int pcs_get_function_groups(struct pinctrl_dev *pctldev, return 0; } +static int pcs_get_function(struct pinctrl_dev *pctldev, unsigned pin, + struct pcs_function **func) +{ + struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev); + struct pin_desc *pdesc = pin_desc_get(pctldev, pin); + const struct pinctrl_setting_mux *setting; + unsigned fselector; + + /* If pin is not described in DTS & enabled, mux_setting is NULL. */ + setting = pdesc->mux_setting; + if (!setting) + return -ENOTSUPP; + fselector = setting->func; + *func = radix_tree_lookup(&pcs->ftree, fselector); + if (!(*func)) { + dev_err(pcs->dev, "%s could not find function%i\n", + __func__, fselector); + return -ENOTSUPP; + } + return 0; +} + static int pcs_enable(struct pinctrl_dev *pctldev, unsigned fselector, unsigned group) { @@ -334,6 +415,9 @@ static int pcs_enable(struct pinctrl_dev *pctldev, unsigned fselector, int i; pcs = pinctrl_dev_get_drvdata(pctldev); + /* If function mask is null, needn't enable it. */ + if (!pcs->fmask) + return 0; func = radix_tree_lookup(&pcs->ftree, fselector); if (!func) return -EINVAL; @@ -368,6 +452,10 @@ static void pcs_disable(struct pinctrl_dev *pctldev, unsigned fselector, int i; pcs = pinctrl_dev_get_drvdata(pctldev); + /* If function mask is null, needn't disable it. */ + if (!pcs->fmask) + return; + func = radix_tree_lookup(&pcs->ftree, fselector); if (!func) { dev_err(pcs->dev, "%s could not find function%i\n", @@ -403,12 +491,33 @@ static void pcs_disable(struct pinctrl_dev *pctldev, unsigned fselector, } static int pcs_request_gpio(struct pinctrl_dev *pctldev, - struct pinctrl_gpio_range *range, unsigned offset) + struct pinctrl_gpio_range *range, unsigned pin) { - return -ENOTSUPP; + struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev); + struct pcs_gpiofunc_range *frange = NULL; + struct list_head *pos, *tmp; + int mux_bytes = 0; + unsigned data; + + /* If function mask is null, return directly. */ + if (!pcs->fmask) + return -ENOTSUPP; + + list_for_each_safe(pos, tmp, &pcs->gpiofuncs) { + frange = list_entry(pos, struct pcs_gpiofunc_range, node); + if (pin >= frange->offset + frange->npins + || pin < frange->offset) + continue; + mux_bytes = pcs->width / BITS_PER_BYTE; + data = pcs->read(pcs->base + pin * mux_bytes) & ~pcs->fmask; + data |= frange->gpiofunc; + pcs->write(data, pcs->base + pin * mux_bytes); + break; + } + return 0; } -static struct pinmux_ops pcs_pinmux_ops = { +static const struct pinmux_ops pcs_pinmux_ops = { .get_functions_count = pcs_get_functions_count, .get_function_name = pcs_get_function_name, .get_function_groups = pcs_get_function_groups, @@ -417,32 +526,191 @@ static struct pinmux_ops pcs_pinmux_ops = { .gpio_request_enable = pcs_request_gpio, }; +/* Clear BIAS value */ +static void pcs_pinconf_clear_bias(struct pinctrl_dev *pctldev, unsigned pin) +{ + unsigned long config; + int i; + for (i = 0; i < ARRAY_SIZE(pcs_bias); i++) { + config = pinconf_to_config_packed(pcs_bias[i], 0); + pcs_pinconf_set(pctldev, pin, config); + } +} + +/* + * Check whether PIN_CONFIG_BIAS_DISABLE is valid. + * It's depend on that PULL_DOWN & PULL_UP configs are all invalid. + */ +static bool pcs_pinconf_bias_disable(struct pinctrl_dev *pctldev, unsigned pin) +{ + unsigned long config; + int i; + + for (i = 0; i < ARRAY_SIZE(pcs_bias); i++) { + config = pinconf_to_config_packed(pcs_bias[i], 0); + if (!pcs_pinconf_get(pctldev, pin, &config)) + goto out; + } + return true; +out: + return false; +} + static int pcs_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin, unsigned long *config) { + struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev); + struct pcs_function *func; + enum pin_config_param param; + unsigned offset = 0, data = 0, i, j, ret; + + ret = pcs_get_function(pctldev, pin, &func); + if (ret) + return ret; + + for (i = 0; i < func->nconfs; i++) { + param = pinconf_to_config_param(*config); + if (param == PIN_CONFIG_BIAS_DISABLE) { + if (pcs_pinconf_bias_disable(pctldev, pin)) { + *config = 0; + return 0; + } else { + return -ENOTSUPP; + } + } else if (param != func->conf[i].param) { + continue; + } + + offset = pin * (pcs->width / BITS_PER_BYTE); + data = pcs->read(pcs->base + offset) & func->conf[i].mask; + switch (func->conf[i].param) { + /* 4 parameters */ + case PIN_CONFIG_BIAS_PULL_DOWN: + case PIN_CONFIG_BIAS_PULL_UP: + case PIN_CONFIG_INPUT_SCHMITT_ENABLE: + if ((data != func->conf[i].enable) || + (data == func->conf[i].disable)) + return -ENOTSUPP; + *config = 0; + break; + /* 2 parameters */ + case PIN_CONFIG_INPUT_SCHMITT: + for (j = 0; j < func->nconfs; j++) { + switch (func->conf[j].param) { + case PIN_CONFIG_INPUT_SCHMITT_ENABLE: + if (data != func->conf[j].enable) + return -ENOTSUPP; + break; + default: + break; + } + } + *config = data; + break; + case PIN_CONFIG_DRIVE_STRENGTH: + case PIN_CONFIG_SLEW_RATE: + default: + *config = data; + break; + } + return 0; + } return -ENOTSUPP; } static int pcs_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin, unsigned long config) { + struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev); + struct pcs_function *func; + unsigned offset = 0, shift = 0, arg = 0, i, data, ret; + u16 argument; + + ret = pcs_get_function(pctldev, pin, &func); + if (ret) + return ret; + + for (i = 0; i < func->nconfs; i++) { + if (pinconf_to_config_param(config) == func->conf[i].param) { + offset = pin * (pcs->width / BITS_PER_BYTE); + data = pcs->read(pcs->base + offset); + argument = pinconf_to_config_argument(config); + switch (func->conf[i].param) { + /* 2 parameters */ + case PIN_CONFIG_INPUT_SCHMITT: + case PIN_CONFIG_DRIVE_STRENGTH: + case PIN_CONFIG_SLEW_RATE: + shift = ffs(func->conf[i].mask) - 1; + arg = pinconf_to_config_argument(config); + data &= ~func->conf[i].mask; + data |= (arg << shift) & func->conf[i].mask; + break; + /* 4 parameters */ + case PIN_CONFIG_BIAS_DISABLE: + pcs_pinconf_clear_bias(pctldev, pin); + break; + case PIN_CONFIG_BIAS_PULL_DOWN: + case PIN_CONFIG_BIAS_PULL_UP: + if (argument) + pcs_pinconf_clear_bias(pctldev, pin); + /* fall through */ + case PIN_CONFIG_INPUT_SCHMITT_ENABLE: + data &= ~func->conf[i].mask; + if (argument) + data |= func->conf[i].enable; + else + data |= func->conf[i].disable; + break; + default: + return -ENOTSUPP; + } + pcs->write(data, pcs->base + offset); + return 0; + } + } return -ENOTSUPP; } static int pcs_pinconf_group_get(struct pinctrl_dev *pctldev, unsigned group, unsigned long *config) { - return -ENOTSUPP; + const unsigned *pins; + unsigned npins, old = 0; + int i, ret; + + ret = pcs_get_group_pins(pctldev, group, &pins, &npins); + if (ret) + return ret; + for (i = 0; i < npins; i++) { + if (pcs_pinconf_get(pctldev, pins[i], config)) + return -ENOTSUPP; + /* configs do not match between two pins */ + if (i && (old != *config)) + return -ENOTSUPP; + old = *config; + } + return 0; } static int pcs_pinconf_group_set(struct pinctrl_dev *pctldev, unsigned group, unsigned long config) { - return -ENOTSUPP; + const unsigned *pins; + unsigned npins; + int i, ret; + + ret = pcs_get_group_pins(pctldev, group, &pins, &npins); + if (ret) + return ret; + for (i = 0; i < npins; i++) { + if (pcs_pinconf_set(pctldev, pins[i], config)) + return -ENOTSUPP; + } + return 0; } static void pcs_pinconf_dbg_show(struct pinctrl_dev *pctldev, - struct seq_file *s, unsigned offset) + struct seq_file *s, unsigned pin) { } @@ -451,13 +719,22 @@ static void pcs_pinconf_group_dbg_show(struct pinctrl_dev *pctldev, { } -static struct pinconf_ops pcs_pinconf_ops = { +static void pcs_pinconf_config_dbg_show(struct pinctrl_dev *pctldev, + struct seq_file *s, + unsigned long config) +{ + pinconf_generic_dump_config(pctldev, s, config); +} + +static const struct pinconf_ops pcs_pinconf_ops = { .pin_config_get = pcs_pinconf_get, .pin_config_set = pcs_pinconf_set, .pin_config_group_get = pcs_pinconf_group_get, .pin_config_group_set = pcs_pinconf_group_set, .pin_config_dbg_show = pcs_pinconf_dbg_show, .pin_config_group_dbg_show = pcs_pinconf_group_dbg_show, + .pin_config_config_dbg_show = pcs_pinconf_config_dbg_show, + .is_generic = true, }; /** @@ -648,11 +925,157 @@ static int pcs_get_pin_by_offset(struct pcs_device *pcs, unsigned offset) return index; } +/* + * check whether data matches enable bits or disable bits + * Return value: 1 for matching enable bits, 0 for matching disable bits, + * and negative value for matching failure. + */ +static int pcs_config_match(unsigned data, unsigned enable, unsigned disable) +{ + int ret = -EINVAL; + + if (data == enable) + ret = 1; + else if (data == disable) + ret = 0; + return ret; +} + +static void add_config(struct pcs_conf_vals **conf, enum pin_config_param param, + unsigned value, unsigned enable, unsigned disable, + unsigned mask) +{ + (*conf)->param = param; + (*conf)->val = value; + (*conf)->enable = enable; + (*conf)->disable = disable; + (*conf)->mask = mask; + (*conf)++; +} + +static void add_setting(unsigned long **setting, enum pin_config_param param, + unsigned arg) +{ + **setting = pinconf_to_config_packed(param, arg); + (*setting)++; +} + +/* add pinconf setting with 2 parameters */ +static void pcs_add_conf2(struct pcs_device *pcs, struct device_node *np, + const char *name, enum pin_config_param param, + struct pcs_conf_vals **conf, unsigned long **settings) +{ + unsigned value[2]; + int ret; + + ret = of_property_read_u32_array(np, name, value, 2); + if (ret) + return; + /* set value & mask */ + value[0] &= value[1]; + /* skip enable & disable */ + add_config(conf, param, value[0], 0, 0, value[1]); + add_setting(settings, param, value[0]); +} + +/* add pinconf setting with 4 parameters */ +static void pcs_add_conf4(struct pcs_device *pcs, struct device_node *np, + const char *name, enum pin_config_param param, + struct pcs_conf_vals **conf, unsigned long **settings) +{ + unsigned value[4]; + int ret; + + /* value to set, enable, disable, mask */ + ret = of_property_read_u32_array(np, name, value, 4); + if (ret) + return; + if (!value[3]) { + dev_err(pcs->dev, "mask field of the property can't be 0\n"); + return; + } + value[0] &= value[3]; + value[1] &= value[3]; + value[2] &= value[3]; + ret = pcs_config_match(value[0], value[1], value[2]); + if (ret < 0) + dev_dbg(pcs->dev, "failed to match enable or disable bits\n"); + add_config(conf, param, value[0], value[1], value[2], value[3]); + add_setting(settings, param, ret); +} + +static int pcs_parse_pinconf(struct pcs_device *pcs, struct device_node *np, + struct pcs_function *func, + struct pinctrl_map **map) + +{ + struct pinctrl_map *m = *map; + int i = 0, nconfs = 0; + unsigned long *settings = NULL, *s = NULL; + struct pcs_conf_vals *conf = NULL; + struct pcs_conf_type prop2[] = { + { "pinctrl-single,drive-strength", PIN_CONFIG_DRIVE_STRENGTH, }, + { "pinctrl-single,slew-rate", PIN_CONFIG_SLEW_RATE, }, + { "pinctrl-single,input-schmitt", PIN_CONFIG_INPUT_SCHMITT, }, + }; + struct pcs_conf_type prop4[] = { + { "pinctrl-single,bias-pullup", PIN_CONFIG_BIAS_PULL_UP, }, + { "pinctrl-single,bias-pulldown", PIN_CONFIG_BIAS_PULL_DOWN, }, + { "pinctrl-single,input-schmitt-enable", + PIN_CONFIG_INPUT_SCHMITT_ENABLE, }, + }; + + /* If pinconf isn't supported, don't parse properties in below. */ + if (!pcs->is_pinconf) + return 0; + + /* cacluate how much properties are supported in current node */ + for (i = 0; i < ARRAY_SIZE(prop2); i++) { + if (of_find_property(np, prop2[i].name, NULL)) + nconfs++; + } + for (i = 0; i < ARRAY_SIZE(prop4); i++) { + if (of_find_property(np, prop4[i].name, NULL)) + nconfs++; + } + if (!nconfs) + return 0; + + func->conf = devm_kzalloc(pcs->dev, + sizeof(struct pcs_conf_vals) * nconfs, + GFP_KERNEL); + if (!func->conf) + return -ENOMEM; + func->nconfs = nconfs; + conf = &(func->conf[0]); + m++; + settings = devm_kzalloc(pcs->dev, sizeof(unsigned long) * nconfs, + GFP_KERNEL); + if (!settings) + return -ENOMEM; + s = &settings[0]; + + for (i = 0; i < ARRAY_SIZE(prop2); i++) + pcs_add_conf2(pcs, np, prop2[i].name, prop2[i].param, + &conf, &s); + for (i = 0; i < ARRAY_SIZE(prop4); i++) + pcs_add_conf4(pcs, np, prop4[i].name, prop4[i].param, + &conf, &s); + m->type = PIN_MAP_TYPE_CONFIGS_GROUP; + m->data.configs.group_or_pin = np->name; + m->data.configs.configs = settings; + m->data.configs.num_configs = nconfs; + return 0; +} + +static void pcs_free_pingroups(struct pcs_device *pcs); + /** * smux_parse_one_pinctrl_entry() - parses a device tree mux entry * @pcs: pinctrl driver instance * @np: device node of the mux entry * @map: map entry + * @num_maps: number of map * @pgnames: pingroup names * * Note that this binding currently supports only sets of one register + value. @@ -669,6 +1092,7 @@ static int pcs_get_pin_by_offset(struct pcs_device *pcs, unsigned offset) static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs, struct device_node *np, struct pinctrl_map **map, + unsigned *num_maps, const char **pgnames) { struct pcs_func_vals *vals; @@ -741,8 +1165,18 @@ static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs, (*map)->data.mux.group = np->name; (*map)->data.mux.function = np->name; + if (pcs->is_pinconf) { + if (pcs_parse_pinconf(pcs, np, function, map)) + goto free_pingroups; + *num_maps = 2; + } else { + *num_maps = 1; + } return 0; +free_pingroups: + pcs_free_pingroups(pcs); + *num_maps = 1; free_function: pcs_remove_function(pcs, function); @@ -771,7 +1205,8 @@ static int pcs_dt_node_to_map(struct pinctrl_dev *pctldev, pcs = pinctrl_dev_get_drvdata(pctldev); - *map = devm_kzalloc(pcs->dev, sizeof(**map), GFP_KERNEL); + /* create 2 maps. One is for pinmux, and the other is for pinconf. */ + *map = devm_kzalloc(pcs->dev, sizeof(**map) * 2, GFP_KERNEL); if (!*map) return -ENOMEM; @@ -783,13 +1218,13 @@ static int pcs_dt_node_to_map(struct pinctrl_dev *pctldev, goto free_map; } - ret = pcs_parse_one_pinctrl_entry(pcs, np_config, map, pgnames); + ret = pcs_parse_one_pinctrl_entry(pcs, np_config, map, num_maps, + pgnames); if (ret < 0) { dev_err(pcs->dev, "no pins entries for %s\n", np_config->name); goto free_pgnames; } - *num_maps = 1; return 0; @@ -879,6 +1314,37 @@ static void pcs_free_resources(struct pcs_device *pcs) static struct of_device_id pcs_of_match[]; +static int pcs_add_gpio_func(struct device_node *node, struct pcs_device *pcs) +{ + const char *propname = "pinctrl-single,gpio-range"; + const char *cellname = "#pinctrl-single,gpio-range-cells"; + struct of_phandle_args gpiospec; + struct pcs_gpiofunc_range *range; + int ret, i; + + for (i = 0; ; i++) { + ret = of_parse_phandle_with_args(node, propname, cellname, + i, &gpiospec); + /* Do not treat it as error. Only treat it as end condition. */ + if (ret) { + ret = 0; + break; + } + range = devm_kzalloc(pcs->dev, sizeof(*range), GFP_KERNEL); + if (!range) { + ret = -ENOMEM; + break; + } + range->offset = gpiospec.args[0]; + range->npins = gpiospec.args[1]; + range->gpiofunc = gpiospec.args[2]; + mutex_lock(&pcs->mutex); + list_add_tail(&range->node, &pcs->gpiofuncs); + mutex_unlock(&pcs->mutex); + } + return ret; +} + static int pcs_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; @@ -900,14 +1366,23 @@ static int pcs_probe(struct platform_device *pdev) mutex_init(&pcs->mutex); INIT_LIST_HEAD(&pcs->pingroups); INIT_LIST_HEAD(&pcs->functions); + INIT_LIST_HEAD(&pcs->gpiofuncs); + pcs->is_pinconf = match->data; PCS_GET_PROP_U32("pinctrl-single,register-width", &pcs->width, "register width not specified\n"); - PCS_GET_PROP_U32("pinctrl-single,function-mask", &pcs->fmask, - "function register mask not specified\n"); - pcs->fshift = ffs(pcs->fmask) - 1; - pcs->fmax = pcs->fmask >> pcs->fshift; + ret = of_property_read_u32(np, "pinctrl-single,function-mask", + &pcs->fmask); + if (!ret) { + pcs->fshift = ffs(pcs->fmask) - 1; + pcs->fmax = pcs->fmask >> pcs->fshift; + } else { + /* If mask property doesn't exist, function mux is invalid. */ + pcs->fmask = 0; + pcs->fshift = 0; + pcs->fmax = 0; + } ret = of_property_read_u32(np, "pinctrl-single,function-off", &pcs->foff); @@ -961,7 +1436,8 @@ static int pcs_probe(struct platform_device *pdev) pcs->desc.name = DRIVER_NAME; pcs->desc.pctlops = &pcs_pinctrl_ops; pcs->desc.pmxops = &pcs_pinmux_ops; - pcs->desc.confops = &pcs_pinconf_ops; + if (pcs->is_pinconf) + pcs->desc.confops = &pcs_pinconf_ops; pcs->desc.owner = THIS_MODULE; ret = pcs_allocate_pin_table(pcs); @@ -975,6 +1451,10 @@ static int pcs_probe(struct platform_device *pdev) goto free; } + ret = pcs_add_gpio_func(np, pcs); + if (ret < 0) + goto free; + dev_info(pcs->dev, "%i pins at pa %p size %u\n", pcs->desc.npins, pcs->base, pcs->size); @@ -999,7 +1479,8 @@ static int pcs_remove(struct platform_device *pdev) } static struct of_device_id pcs_of_match[] = { - { .compatible = DRIVER_NAME, }, + { .compatible = "pinctrl-single", .data = (void *)false }, + { .compatible = "pinconf-single", .data = (void *)true }, { }, }; MODULE_DEVICE_TABLE(of, pcs_of_match); diff --git a/drivers/pinctrl/pinctrl-sirf.c b/drivers/pinctrl/pinctrl-sirf.c index d02498b30c6e..08582fecdf1b 100644 --- a/drivers/pinctrl/pinctrl-sirf.c +++ b/drivers/pinctrl/pinctrl-sirf.c @@ -14,6 +14,7 @@ #include <linux/slab.h> #include <linux/err.h> #include <linux/irqdomain.h> +#include <linux/irqchip/chained_irq.h> #include <linux/pinctrl/pinctrl.h> #include <linux/pinctrl/pinmux.h> #include <linux/pinctrl/consumer.h> @@ -25,7 +26,6 @@ #include <linux/bitops.h> #include <linux/gpio.h> #include <linux/of_gpio.h> -#include <asm/mach/irq.h> #define DRIVER_NAME "pinmux-sirf" @@ -979,7 +979,7 @@ static void sirfsoc_dt_free_map(struct pinctrl_dev *pctldev, kfree(map); } -static struct pinctrl_ops sirfsoc_pctrl_ops = { +static const struct pinctrl_ops sirfsoc_pctrl_ops = { .get_groups_count = sirfsoc_get_groups_count, .get_group_name = sirfsoc_get_group_name, .get_group_pins = sirfsoc_get_group_pins, @@ -1181,7 +1181,7 @@ static int sirfsoc_pinmux_request_gpio(struct pinctrl_dev *pmxdev, return 0; } -static struct pinmux_ops sirfsoc_pinmux_ops = { +static const struct pinmux_ops sirfsoc_pinmux_ops = { .enable = sirfsoc_pinmux_enable, .disable = sirfsoc_pinmux_disable, .get_functions_count = sirfsoc_pinmux_get_funcs_count, diff --git a/drivers/pinctrl/pinctrl-sunxi.c b/drivers/pinctrl/pinctrl-sunxi.c index 80b11e3415bc..cb491d6ba601 100644 --- a/drivers/pinctrl/pinctrl-sunxi.c +++ b/drivers/pinctrl/pinctrl-sunxi.c @@ -30,482 +30,856 @@ static const struct sunxi_desc_pin sun4i_a10_pins[] = { SUNXI_PIN(SUNXI_PINCTRL_PIN_PA0, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "wemac"), /* ERXD3 */ + SUNXI_FUNCTION(0x3, "spi1"), /* CS0 */ + SUNXI_FUNCTION(0x4, "uart2")), /* RTS */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PA1, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "wemac"), /* ERXD2 */ + SUNXI_FUNCTION(0x3, "spi1"), /* CLK */ + SUNXI_FUNCTION(0x4, "uart2")), /* CTS */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PA2, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "wemac"), /* ERXD1 */ + SUNXI_FUNCTION(0x3, "spi1"), /* MOSI */ + SUNXI_FUNCTION(0x4, "uart2")), /* TX */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PA3, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "wemac"), /* ERXD0 */ + SUNXI_FUNCTION(0x3, "spi1"), /* MISO */ + SUNXI_FUNCTION(0x4, "uart2")), /* RX */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PA4, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "wemac"), /* ETXD3 */ + SUNXI_FUNCTION(0x3, "spi1")), /* CS1 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PA5, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "wemac"), /* ETXD2 */ + SUNXI_FUNCTION(0x3, "spi3")), /* CS0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PA6, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "wemac"), /* ETXD1 */ + SUNXI_FUNCTION(0x3, "spi3")), /* CLK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PA7, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "wemac"), /* ETXD0 */ + SUNXI_FUNCTION(0x3, "spi3")), /* MOSI */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PA8, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "wemac"), /* ERXCK */ + SUNXI_FUNCTION(0x3, "spi3")), /* MISO */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PA9, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "wemac"), /* ERXERR */ + SUNXI_FUNCTION(0x3, "spi3")), /* CS1 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PA10, SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "wemac"), /* ERXDV */ SUNXI_FUNCTION(0x4, "uart1")), /* TX */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PA11, SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "wemac"), /* EMDC */ SUNXI_FUNCTION(0x4, "uart1")), /* RX */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PA12, SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "wemac"), /* EMDIO */ + SUNXI_FUNCTION(0x3, "uart6"), /* TX */ SUNXI_FUNCTION(0x4, "uart1")), /* RTS */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PA13, SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "wemac"), /* ETXEN */ + SUNXI_FUNCTION(0x3, "uart6"), /* RX */ SUNXI_FUNCTION(0x4, "uart1")), /* CTS */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PA14, SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "wemac"), /* ETXCK */ + SUNXI_FUNCTION(0x3, "uart7"), /* TX */ SUNXI_FUNCTION(0x4, "uart1")), /* DTR */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PA15, SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "wemac"), /* ECRS */ + SUNXI_FUNCTION(0x3, "uart7"), /* RX */ SUNXI_FUNCTION(0x4, "uart1")), /* DSR */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PA16, SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "wemac"), /* ECOL */ + SUNXI_FUNCTION(0x3, "can"), /* TX */ SUNXI_FUNCTION(0x4, "uart1")), /* DCD */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PA17, SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "wemac"), /* ETXERR */ + SUNXI_FUNCTION(0x3, "can"), /* RX */ SUNXI_FUNCTION(0x4, "uart1")), /* RING */ /* Hole */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB0, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB1, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB2, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "pwm")), /* PWM0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB3, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ir0")), /* TX */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB4, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ir0")), /* RX */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB5, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2s"), /* MCLK */ + SUNXI_FUNCTION(0x3, "ac97")), /* MCLK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB6, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2s"), /* BCLK */ + SUNXI_FUNCTION(0x3, "ac97")), /* BCLK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB7, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2s"), /* LRCK */ + SUNXI_FUNCTION(0x3, "ac97")), /* SYNC */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB8, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2s"), /* DO0 */ + SUNXI_FUNCTION(0x3, "ac97")), /* DO */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB9, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2s")), /* DO1 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB10, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2s")), /* DO2 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB11, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2s")), /* DO3 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB12, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2s"), /* DI */ + SUNXI_FUNCTION(0x3, "ac97")), /* DI */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB13, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi2")), /* CS1 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB14, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi2"), /* CS0 */ + SUNXI_FUNCTION(0x3, "jtag")), /* MS0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB15, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi2"), /* CLK */ + SUNXI_FUNCTION(0x3, "jtag")), /* CK0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB16, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi2"), /* MOSI */ + SUNXI_FUNCTION(0x3, "jtag")), /* DO0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB17, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi2"), /* MISO */ + SUNXI_FUNCTION(0x3, "jtag")), /* DI0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB18, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB19, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB20, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c2")), /* SCK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB21, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c2")), /* SDA */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB22, SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), - SUNXI_FUNCTION(0x2, "uart0")), /* TX */ + SUNXI_FUNCTION(0x2, "uart0"), /* TX */ + SUNXI_FUNCTION(0x3, "ir1")), /* TX */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB23, SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), - SUNXI_FUNCTION(0x2, "uart0")), /* RX */ + SUNXI_FUNCTION(0x2, "uart0"), /* RX */ + SUNXI_FUNCTION(0x3, "ir1")), /* RX */ /* Hole */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC0, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NWE */ + SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC1, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NALE */ + SUNXI_FUNCTION(0x3, "spi0")), /* MISO */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC2, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NCLE */ + SUNXI_FUNCTION(0x3, "spi0")), /* SCK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC3, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0")), /* NCE1 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC4, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0")), /* NCE0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC5, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0")), /* NRE# */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC6, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NRB0 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC7, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NRB1 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC8, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NDQ0 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC9, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NDQ1 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC10, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NDQ2 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC11, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NDQ3 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC12, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0")), /* NDQ4 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC13, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0")), /* NDQ5 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC14, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0")), /* NDQ6 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC15, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0")), /* NDQ7 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC16, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0")), /* NWP */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC17, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0")), /* NCE2 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC18, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0")), /* NCE3 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC19, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NCE4 */ + SUNXI_FUNCTION(0x3, "spi2")), /* CS0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC20, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NCE5 */ + SUNXI_FUNCTION(0x3, "spi2")), /* CLK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC21, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NCE6 */ + SUNXI_FUNCTION(0x3, "spi2")), /* MOSI */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC22, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NCE7 */ + SUNXI_FUNCTION(0x3, "spi2")), /* MISO */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC23, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC24, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0")), /* NDQS */ /* Hole */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD0, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D0 */ + SUNXI_FUNCTION(0x3, "lvds0")), /* VP0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD1, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D1 */ + SUNXI_FUNCTION(0x3, "lvds0")), /* VN0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD2, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */ + SUNXI_FUNCTION(0x3, "lvds0")), /* VP1 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD3, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */ + SUNXI_FUNCTION(0x3, "lvds0")), /* VN1 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD4, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */ + SUNXI_FUNCTION(0x3, "lvds0")), /* VP2 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD5, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */ + SUNXI_FUNCTION(0x3, "lvds0")), /* VN2 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD6, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */ + SUNXI_FUNCTION(0x3, "lvds0")), /* VPC */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD7, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */ + SUNXI_FUNCTION(0x3, "lvds0")), /* VNC */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD8, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D8 */ + SUNXI_FUNCTION(0x3, "lvds0")), /* VP3 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD9, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D9 */ + SUNXI_FUNCTION(0x3, "lvds0")), /* VM3 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD10, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */ + SUNXI_FUNCTION(0x3, "lvds1")), /* VP0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD11, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */ + SUNXI_FUNCTION(0x3, "lvds1")), /* VN0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD12, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */ + SUNXI_FUNCTION(0x3, "lvds1")), /* VP1 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD13, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */ + SUNXI_FUNCTION(0x3, "lvds1")), /* VN1 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD14, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */ + SUNXI_FUNCTION(0x3, "lvds1")), /* VP2 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD15, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */ + SUNXI_FUNCTION(0x3, "lvds1")), /* VN2 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD16, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D16 */ + SUNXI_FUNCTION(0x3, "lvds1")), /* VPC */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD17, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D17 */ + SUNXI_FUNCTION(0x3, "lvds1")), /* VNC */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD18, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */ + SUNXI_FUNCTION(0x3, "lvds1")), /* VP3 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD19, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */ + SUNXI_FUNCTION(0x3, "lvds1")), /* VN3 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD20, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */ + SUNXI_FUNCTION(0x3, "csi1")), /* MCLK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD21, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */ + SUNXI_FUNCTION(0x3, "sim")), /* VPPEN */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD22, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */ + SUNXI_FUNCTION(0x3, "sim")), /* VPPPP */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD23, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */ + SUNXI_FUNCTION(0x3, "sim")), /* DET */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD24, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */ + SUNXI_FUNCTION(0x3, "sim")), /* VCCEN */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD25, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* DE */ + SUNXI_FUNCTION(0x3, "sim")), /* RST */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD26, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */ + SUNXI_FUNCTION(0x3, "sim")), /* SCK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD27, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */ + SUNXI_FUNCTION(0x3, "sim")), /* SDA */ /* Hole */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE0, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts0"), /* CLK */ + SUNXI_FUNCTION(0x3, "csi0")), /* PCK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE1, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts0"), /* ERR */ + SUNXI_FUNCTION(0x3, "csi0")), /* CK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE2, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts0"), /* SYNC */ + SUNXI_FUNCTION(0x3, "csi0")), /* HSYNC */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE3, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts0"), /* DVLD */ + SUNXI_FUNCTION(0x3, "csi0")), /* VSYNC */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE4, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts0"), /* D0 */ + SUNXI_FUNCTION(0x3, "csi0")), /* D0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE5, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts0"), /* D1 */ + SUNXI_FUNCTION(0x3, "csi0"), /* D1 */ + SUNXI_FUNCTION(0x4, "sim")), /* VPPEN */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE6, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts0"), /* D2 */ + SUNXI_FUNCTION(0x3, "csi0")), /* D2 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE7, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts0"), /* D3 */ + SUNXI_FUNCTION(0x3, "csi0")), /* D3 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE8, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts0"), /* D4 */ + SUNXI_FUNCTION(0x3, "csi0")), /* D4 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE9, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts0"), /* D5 */ + SUNXI_FUNCTION(0x3, "csi0")), /* D5 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE10, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts0"), /* D6 */ + SUNXI_FUNCTION(0x3, "csi0")), /* D6 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE11, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts0"), /* D7 */ + SUNXI_FUNCTION(0x3, "csi0")), /* D7 */ /* Hole */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PF0, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */ + SUNXI_FUNCTION(0x4, "jtag")), /* MSI */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PF1, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */ + SUNXI_FUNCTION(0x4, "jtag")), /* DI1 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PF2, SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */ SUNXI_FUNCTION(0x4, "uart0")), /* TX */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PF3, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */ + SUNXI_FUNCTION(0x4, "jtag")), /* DO1 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PF4, SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */ SUNXI_FUNCTION(0x4, "uart0")), /* RX */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PF5, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */ + SUNXI_FUNCTION(0x4, "jtag")), /* CK1 */ /* Hole */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PG0, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts1"), /* CLK */ + SUNXI_FUNCTION(0x3, "csi1"), /* PCK */ + SUNXI_FUNCTION(0x4, "mmc1")), /* CMD */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PG1, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts1"), /* ERR */ + SUNXI_FUNCTION(0x3, "csi1"), /* CK */ + SUNXI_FUNCTION(0x4, "mmc1")), /* CLK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PG2, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts1"), /* SYNC */ + SUNXI_FUNCTION(0x3, "csi1"), /* HSYNC */ + SUNXI_FUNCTION(0x4, "mmc1")), /* D0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PG3, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts1"), /* DVLD */ + SUNXI_FUNCTION(0x3, "csi1"), /* VSYNC */ + SUNXI_FUNCTION(0x4, "mmc1")), /* D1 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PG4, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts1"), /* D0 */ + SUNXI_FUNCTION(0x3, "csi1"), /* D0 */ + SUNXI_FUNCTION(0x4, "mmc1"), /* D2 */ + SUNXI_FUNCTION(0x5, "csi0")), /* D8 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PG5, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts1"), /* D1 */ + SUNXI_FUNCTION(0x3, "csi1"), /* D1 */ + SUNXI_FUNCTION(0x4, "mmc1"), /* D3 */ + SUNXI_FUNCTION(0x5, "csi0")), /* D9 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PG6, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts1"), /* D2 */ + SUNXI_FUNCTION(0x3, "csi1"), /* D2 */ + SUNXI_FUNCTION(0x4, "uart3"), /* TX */ + SUNXI_FUNCTION(0x5, "csi0")), /* D10 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PG7, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts1"), /* D3 */ + SUNXI_FUNCTION(0x3, "csi1"), /* D3 */ + SUNXI_FUNCTION(0x4, "uart3"), /* RX */ + SUNXI_FUNCTION(0x5, "csi0")), /* D11 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PG8, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts1"), /* D4 */ + SUNXI_FUNCTION(0x3, "csi1"), /* D4 */ + SUNXI_FUNCTION(0x4, "uart3"), /* RTS */ + SUNXI_FUNCTION(0x5, "csi0")), /* D12 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PG9, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts1"), /* D5 */ + SUNXI_FUNCTION(0x3, "csi1"), /* D5 */ + SUNXI_FUNCTION(0x4, "uart3"), /* CTS */ + SUNXI_FUNCTION(0x5, "csi0")), /* D13 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PG10, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts1"), /* D6 */ + SUNXI_FUNCTION(0x3, "csi1"), /* D6 */ + SUNXI_FUNCTION(0x4, "uart4"), /* TX */ + SUNXI_FUNCTION(0x5, "csi0")), /* D14 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PG11, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ts1"), /* D7 */ + SUNXI_FUNCTION(0x3, "csi1"), /* D7 */ + SUNXI_FUNCTION(0x4, "uart4"), /* RX */ + SUNXI_FUNCTION(0x5, "csi0")), /* D15 */ /* Hole */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH0, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D0 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAA0 */ + SUNXI_FUNCTION(0x4, "uart3"), /* TX */ + SUNXI_FUNCTION(0x7, "csi1")), /* D0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH1, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D1 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAA1 */ + SUNXI_FUNCTION(0x4, "uart3"), /* RX */ + SUNXI_FUNCTION(0x7, "csi1")), /* D1 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH2, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D2 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAA2 */ + SUNXI_FUNCTION(0x4, "uart3"), /* RTS */ + SUNXI_FUNCTION(0x7, "csi1")), /* D2 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH3, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D3 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAIRQ */ + SUNXI_FUNCTION(0x4, "uart3"), /* CTS */ + SUNXI_FUNCTION(0x7, "csi1")), /* D3 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH4, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D4 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAD0 */ + SUNXI_FUNCTION(0x4, "uart4"), /* TX */ + SUNXI_FUNCTION(0x7, "csi1")), /* D4 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH5, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D5 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAD1 */ + SUNXI_FUNCTION(0x4, "uart4"), /* RX */ + SUNXI_FUNCTION(0x7, "csi1")), /* D5 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH6, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D6 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAD2 */ + SUNXI_FUNCTION(0x4, "uart5"), /* TX */ + SUNXI_FUNCTION(0x5, "ms"), /* BS */ + SUNXI_FUNCTION(0x7, "csi1")), /* D6 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH7, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D7 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAD3 */ + SUNXI_FUNCTION(0x4, "uart5"), /* RX */ + SUNXI_FUNCTION(0x5, "ms"), /* CLK */ + SUNXI_FUNCTION(0x7, "csi1")), /* D7 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH8, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D8 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAD4 */ + SUNXI_FUNCTION(0x4, "keypad"), /* IN0 */ + SUNXI_FUNCTION(0x5, "ms"), /* D0 */ + SUNXI_FUNCTION(0x7, "csi1")), /* D8 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH9, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D9 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAD5 */ + SUNXI_FUNCTION(0x4, "keypad"), /* IN1 */ + SUNXI_FUNCTION(0x5, "ms"), /* D1 */ + SUNXI_FUNCTION(0x7, "csi1")), /* D9 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH10, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D10 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAD6 */ + SUNXI_FUNCTION(0x4, "keypad"), /* IN2 */ + SUNXI_FUNCTION(0x5, "ms"), /* D2 */ + SUNXI_FUNCTION(0x7, "csi1")), /* D10 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH11, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D11 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAD7 */ + SUNXI_FUNCTION(0x4, "keypad"), /* IN3 */ + SUNXI_FUNCTION(0x5, "ms"), /* D3 */ + SUNXI_FUNCTION(0x7, "csi1")), /* D11 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH12, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D12 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAD8 */ + SUNXI_FUNCTION(0x4, "ps2"), /* SCK1 */ + SUNXI_FUNCTION(0x7, "csi1")), /* D12 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH13, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D13 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAD9 */ + SUNXI_FUNCTION(0x4, "ps2"), /* SDA1 */ + SUNXI_FUNCTION(0x5, "sim"), /* RST */ + SUNXI_FUNCTION(0x7, "csi1")), /* D13 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH14, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D14 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAD10 */ + SUNXI_FUNCTION(0x4, "keypad"), /* IN4 */ + SUNXI_FUNCTION(0x5, "sim"), /* VPPEN */ + SUNXI_FUNCTION(0x7, "csi1")), /* D14 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH15, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D15 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAD11 */ + SUNXI_FUNCTION(0x4, "keypad"), /* IN5 */ + SUNXI_FUNCTION(0x5, "sim"), /* VPPPP */ + SUNXI_FUNCTION(0x7, "csi1")), /* D15 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH16, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D16 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAD12 */ + SUNXI_FUNCTION(0x4, "keypad"), /* IN6 */ + SUNXI_FUNCTION(0x7, "csi1")), /* D16 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH17, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D17 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAD13 */ + SUNXI_FUNCTION(0x4, "keypad"), /* IN7 */ + SUNXI_FUNCTION(0x5, "sim"), /* VCCEN */ + SUNXI_FUNCTION(0x7, "csi1")), /* D17 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH18, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D18 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAD14 */ + SUNXI_FUNCTION(0x4, "keypad"), /* OUT0 */ + SUNXI_FUNCTION(0x5, "sim"), /* SCK */ + SUNXI_FUNCTION(0x7, "csi1")), /* D18 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH19, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D19 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAD15 */ + SUNXI_FUNCTION(0x4, "keypad"), /* OUT1 */ + SUNXI_FUNCTION(0x5, "sim"), /* SDA */ + SUNXI_FUNCTION(0x7, "csi1")), /* D19 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH20, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D20 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAOE */ + SUNXI_FUNCTION(0x4, "can"), /* TX */ + SUNXI_FUNCTION(0x7, "csi1")), /* D20 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH21, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D21 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATADREQ */ + SUNXI_FUNCTION(0x4, "can"), /* RX */ + SUNXI_FUNCTION(0x7, "csi1")), /* D21 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH22, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D22 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATADACK */ + SUNXI_FUNCTION(0x4, "keypad"), /* OUT2 */ + SUNXI_FUNCTION(0x5, "mmc1"), /* CMD */ + SUNXI_FUNCTION(0x7, "csi1")), /* D22 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH23, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* D23 */ + SUNXI_FUNCTION(0x3, "pata"), /* ATACS0 */ + SUNXI_FUNCTION(0x4, "keypad"), /* OUT3 */ + SUNXI_FUNCTION(0x5, "mmc1"), /* CLK */ + SUNXI_FUNCTION(0x7, "csi1")), /* D23 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH24, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* CLK */ + SUNXI_FUNCTION(0x3, "pata"), /* ATACS1 */ + SUNXI_FUNCTION(0x4, "keypad"), /* OUT4 */ + SUNXI_FUNCTION(0x5, "mmc1"), /* D0 */ + SUNXI_FUNCTION(0x7, "csi1")), /* PCLK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH25, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* DE */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAIORDY */ + SUNXI_FUNCTION(0x4, "keypad"), /* OUT5 */ + SUNXI_FUNCTION(0x5, "mmc1"), /* D1 */ + SUNXI_FUNCTION(0x7, "csi1")), /* FIELD */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH26, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* HSYNC */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAIOR */ + SUNXI_FUNCTION(0x4, "keypad"), /* OUT6 */ + SUNXI_FUNCTION(0x5, "mmc1"), /* D2 */ + SUNXI_FUNCTION(0x7, "csi1")), /* HSYNC */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PH27, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd1"), /* VSYNC */ + SUNXI_FUNCTION(0x3, "pata"), /* ATAIOW */ + SUNXI_FUNCTION(0x4, "keypad"), /* OUT7 */ + SUNXI_FUNCTION(0x5, "mmc1"), /* D3 */ + SUNXI_FUNCTION(0x7, "csi1")), /* VSYNC */ /* Hole */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PI0, SUNXI_FUNCTION(0x0, "gpio_in"), @@ -518,277 +892,401 @@ static const struct sunxi_desc_pin sun4i_a10_pins[] = { SUNXI_FUNCTION(0x1, "gpio_out")), SUNXI_PIN(SUNXI_PINCTRL_PIN_PI3, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "pwm")), /* PWM1 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PI4, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc3")), /* CMD */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PI5, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc3")), /* CLK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PI6, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc3")), /* D0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PI7, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc3")), /* D1 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PI8, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc3")), /* D2 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PI9, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc3")), /* D3 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PI10, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi0"), /* CS0 */ + SUNXI_FUNCTION(0x3, "uart5")), /* TX */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PI11, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi0"), /* CLK */ + SUNXI_FUNCTION(0x3, "uart5")), /* RX */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PI12, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi0"), /* MOSI */ + SUNXI_FUNCTION(0x3, "uart6")), /* TX */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PI13, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi0"), /* MISO */ + SUNXI_FUNCTION(0x3, "uart6")), /* RX */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PI14, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi0"), /* CS1 */ + SUNXI_FUNCTION(0x3, "ps2"), /* SCK1 */ + SUNXI_FUNCTION(0x4, "timer4")), /* TCLKIN0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PI15, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi1"), /* CS1 */ + SUNXI_FUNCTION(0x3, "ps2"), /* SDA1 */ + SUNXI_FUNCTION(0x4, "timer5")), /* TCLKIN1 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PI16, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */ + SUNXI_FUNCTION(0x3, "uart2")), /* RTS */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PI17, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi1"), /* CLK */ + SUNXI_FUNCTION(0x3, "uart2")), /* CTS */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PI18, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */ + SUNXI_FUNCTION(0x3, "uart2")), /* TX */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PI19, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi1"), /* MISO */ + SUNXI_FUNCTION(0x3, "uart2")), /* RX */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PI20, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ps2"), /* SCK0 */ + SUNXI_FUNCTION(0x3, "uart7"), /* TX */ + SUNXI_FUNCTION(0x4, "hdmi")), /* HSCL */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PI21, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ps2"), /* SDA0 */ + SUNXI_FUNCTION(0x3, "uart7"), /* RX */ + SUNXI_FUNCTION(0x4, "hdmi")), /* HSDA */ }; static const struct sunxi_desc_pin sun5i_a13_pins[] = { /* Hole */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB0, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB1, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB2, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "pwm")), SUNXI_PIN(SUNXI_PINCTRL_PIN_PB3, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ir0")), /* TX */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB4, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "ir0")), /* RX */ /* Hole */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB10, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi2")), /* CS1 */ /* Hole */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB15, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB16, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB17, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c2")), /* SCK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PB18, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "i2c2")), /* SDA */ /* Hole */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC0, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NWE */ + SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC1, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NALE */ + SUNXI_FUNCTION(0x3, "spi0")), /* MISO */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC2, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NCLE */ + SUNXI_FUNCTION(0x3, "spi0")), /* CLK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC3, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NCE1 */ + SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC4, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0")), /* NCE0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC5, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0")), /* NRE */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC6, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NRB0 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC7, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NRB1 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC8, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NDQ0 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC9, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NDQ1 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC10, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NDQ2 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC11, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NDQ3 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC12, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NDQ4 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* D4 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC13, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NDQ5 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* D5 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC14, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NDQ6 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC15, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NDQ7 */ + SUNXI_FUNCTION(0x3, "mmc2")), /* D7 */ /* Hole */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PC19, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "nand0"), /* NDQS */ + SUNXI_FUNCTION(0x4, "uart3")), /* RTS */ /* Hole */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD2, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* D2 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD3, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* D3 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD4, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* D4 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD5, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* D5 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD6, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* D6 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD7, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* D7 */ /* Hole */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD10, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* D10 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD11, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* D11 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD12, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* D12 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD13, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* D13 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD14, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* D14 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD15, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* D15 */ /* Hole */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD18, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* D18 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD19, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* D19 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD20, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* D20 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD21, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* D21 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD22, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* D22 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD23, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* D23 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD24, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* CLK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD25, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* DE */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD26, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* HSYNC */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PD27, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "lcd0")), /* VSYNC */ /* Hole */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE0, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x3, "csi0"), /* PCLK */ + SUNXI_FUNCTION(0x4, "spi2")), /* CS0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE1, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x3, "csi0"), /* MCLK */ + SUNXI_FUNCTION(0x4, "spi2")), /* CLK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE2, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x3, "csi0"), /* HSYNC */ + SUNXI_FUNCTION(0x4, "spi2")), /* MOSI */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE3, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "csi0"), /* VSYNC */ + SUNXI_FUNCTION(0x4, "spi2")), /* MISO */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE4, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "csi0"), /* D0 */ + SUNXI_FUNCTION(0x4, "mmc2")), /* D0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE5, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "csi0"), /* D1 */ + SUNXI_FUNCTION(0x4, "mmc2")), /* D1 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE6, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "csi0"), /* D2 */ + SUNXI_FUNCTION(0x4, "mmc2")), /* D2 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE7, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "csi0"), /* D3 */ + SUNXI_FUNCTION(0x4, "mmc2")), /* D3 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE8, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "csi0"), /* D4 */ + SUNXI_FUNCTION(0x4, "mmc2")), /* CMD */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE9, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "csi0"), /* D5 */ + SUNXI_FUNCTION(0x4, "mmc2")), /* CLK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE10, SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "csi0"), /* D6 */ SUNXI_FUNCTION(0x4, "uart1")), /* TX */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PE11, SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x3, "csi0"), /* D7 */ SUNXI_FUNCTION(0x4, "uart1")), /* RX */ /* Hole */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PF0, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x4, "mmc0")), /* D1 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PF1, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x4, "mmc0")), /* D0 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PF2, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x4, "mmc0")), /* CLK */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PF3, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x4, "mmc0")), /* CMD */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PF4, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x4, "mmc0")), /* D3 */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PF5, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x4, "mmc0")), /* D2 */ /* Hole */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PG0, SUNXI_FUNCTION(0x0, "gpio_in"), @@ -802,24 +1300,34 @@ static const struct sunxi_desc_pin sun5i_a13_pins[] = { SUNXI_PIN(SUNXI_PINCTRL_PIN_PG3, SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */ SUNXI_FUNCTION(0x4, "uart1")), /* TX */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PG4, SUNXI_FUNCTION(0x0, "gpio_in"), SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */ SUNXI_FUNCTION(0x4, "uart1")), /* RX */ - /* Hole */ +/* Hole */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PG9, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */ + SUNXI_FUNCTION(0x3, "uart3")), /* TX */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PG10, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi1"), /* CLK */ + SUNXI_FUNCTION(0x3, "uart3")), /* RX */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PG11, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */ + SUNXI_FUNCTION(0x3, "uart3")), /* CTS */ SUNXI_PIN(SUNXI_PINCTRL_PIN_PG12, SUNXI_FUNCTION(0x0, "gpio_in"), - SUNXI_FUNCTION(0x1, "gpio_out")), + SUNXI_FUNCTION(0x1, "gpio_out"), + SUNXI_FUNCTION(0x2, "spi1"), /* MISO */ + SUNXI_FUNCTION(0x3, "uart3")), /* RTS */ }; static const struct sunxi_pinctrl_desc sun4i_a10_pinctrl_data = { @@ -1029,7 +1537,7 @@ static void sunxi_pctrl_dt_free_map(struct pinctrl_dev *pctldev, kfree(map); } -static struct pinctrl_ops sunxi_pctrl_ops = { +static const struct pinctrl_ops sunxi_pctrl_ops = { .dt_node_to_map = sunxi_pctrl_dt_node_to_map, .dt_free_map = sunxi_pctrl_dt_free_map, .get_groups_count = sunxi_pctrl_get_groups_count, @@ -1098,7 +1606,7 @@ static int sunxi_pconf_group_set(struct pinctrl_dev *pctldev, return 0; } -static struct pinconf_ops sunxi_pconf_ops = { +static const struct pinconf_ops sunxi_pconf_ops = { .pin_config_group_get = sunxi_pconf_group_get, .pin_config_group_set = sunxi_pconf_group_set, }; @@ -1204,7 +1712,7 @@ error: return ret; } -static struct pinmux_ops sunxi_pmx_ops = { +static const struct pinmux_ops sunxi_pmx_ops = { .get_functions_count = sunxi_pmx_get_funcs_cnt, .get_function_name = sunxi_pmx_get_func_name, .get_function_groups = sunxi_pmx_get_func_groups, diff --git a/drivers/pinctrl/pinctrl-tegra.c b/drivers/pinctrl/pinctrl-tegra.c index f195d77a3572..2fa9bc6cd7ab 100644 --- a/drivers/pinctrl/pinctrl-tegra.c +++ b/drivers/pinctrl/pinctrl-tegra.c @@ -316,7 +316,7 @@ static int tegra_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev, return 0; } -static struct pinctrl_ops tegra_pinctrl_ops = { +static const struct pinctrl_ops tegra_pinctrl_ops = { .get_groups_count = tegra_pinctrl_get_groups_count, .get_group_name = tegra_pinctrl_get_group_name, .get_group_pins = tegra_pinctrl_get_group_pins, @@ -401,7 +401,7 @@ static void tegra_pinctrl_disable(struct pinctrl_dev *pctldev, pmx_writel(pmx, val, g->mux_bank, g->mux_reg); } -static struct pinmux_ops tegra_pinmux_ops = { +static const struct pinmux_ops tegra_pinmux_ops = { .get_functions_count = tegra_pinctrl_get_funcs_count, .get_function_name = tegra_pinctrl_get_func_name, .get_function_groups = tegra_pinctrl_get_func_groups, @@ -676,7 +676,7 @@ static void tegra_pinconf_config_dbg_show(struct pinctrl_dev *pctldev, } #endif -static struct pinconf_ops tegra_pinconf_ops = { +static const struct pinconf_ops tegra_pinconf_ops = { .pin_config_get = tegra_pinconf_get, .pin_config_set = tegra_pinconf_set, .pin_config_group_get = tegra_pinconf_group_get, diff --git a/drivers/pinctrl/pinctrl-u300.c b/drivers/pinctrl/pinctrl-u300.c index 2b5772550836..6a3a7503e6a0 100644 --- a/drivers/pinctrl/pinctrl-u300.c +++ b/drivers/pinctrl/pinctrl-u300.c @@ -860,7 +860,7 @@ static void u300_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, seq_printf(s, " " DRIVER_NAME); } -static struct pinctrl_ops u300_pctrl_ops = { +static const struct pinctrl_ops u300_pctrl_ops = { .get_groups_count = u300_get_groups_count, .get_group_name = u300_get_group_name, .get_group_pins = u300_get_group_pins, @@ -1003,7 +1003,7 @@ static int u300_pmx_get_groups(struct pinctrl_dev *pctldev, unsigned selector, return 0; } -static struct pinmux_ops u300_pmx_ops = { +static const struct pinmux_ops u300_pmx_ops = { .get_functions_count = u300_pmx_get_funcs_count, .get_function_name = u300_pmx_get_func_name, .get_function_groups = u300_pmx_get_groups, @@ -1046,7 +1046,7 @@ static int u300_pin_config_set(struct pinctrl_dev *pctldev, unsigned pin, return 0; } -static struct pinconf_ops u300_pconf_ops = { +static const struct pinconf_ops u300_pconf_ops = { .is_generic = true, .pin_config_get = u300_pin_config_get, .pin_config_set = u300_pin_config_set, diff --git a/drivers/pinctrl/pinctrl-xway.c b/drivers/pinctrl/pinctrl-xway.c index 068224efa6fa..f2977cff8366 100644 --- a/drivers/pinctrl/pinctrl-xway.c +++ b/drivers/pinctrl/pinctrl-xway.c @@ -553,7 +553,7 @@ int xway_pinconf_group_set(struct pinctrl_dev *pctldev, return ret; } -static struct pinconf_ops xway_pinconf_ops = { +static const struct pinconf_ops xway_pinconf_ops = { .pin_config_get = xway_pinconf_get, .pin_config_set = xway_pinconf_set, .pin_config_group_set = xway_pinconf_group_set, diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c index 1a00658b3ea0..bd83c8b01cd1 100644 --- a/drivers/pinctrl/pinmux.c +++ b/drivers/pinctrl/pinmux.c @@ -194,6 +194,11 @@ static const char *pin_free(struct pinctrl_dev *pctldev, int pin, } if (!gpio_range) { + /* + * A pin should not be freed more times than allocated. + */ + if (WARN_ON(!desc->mux_usecount)) + return NULL; desc->mux_usecount--; if (desc->mux_usecount) return NULL; diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig index c3340f54d2ad..0e1f99c33d47 100644 --- a/drivers/pinctrl/sh-pfc/Kconfig +++ b/drivers/pinctrl/sh-pfc/Kconfig @@ -10,6 +10,7 @@ config PINCTRL_SH_PFC select GPIO_SH_PFC if ARCH_REQUIRE_GPIOLIB select PINMUX select PINCONF + select GENERIC_PINCONF def_bool y help This enables pin control drivers for SH and SH Mobile platforms @@ -21,6 +22,11 @@ config GPIO_SH_PFC This enables support for GPIOs within the SoC's pin function controller. +config PINCTRL_PFC_R8A73A4 + def_bool y + depends on ARCH_R8A73A4 + select PINCTRL_SH_PFC + config PINCTRL_PFC_R8A7740 def_bool y depends on ARCH_R8A7740 diff --git a/drivers/pinctrl/sh-pfc/Makefile b/drivers/pinctrl/sh-pfc/Makefile index e8b9562c47e1..211cd8e98a8a 100644 --- a/drivers/pinctrl/sh-pfc/Makefile +++ b/drivers/pinctrl/sh-pfc/Makefile @@ -3,6 +3,7 @@ ifeq ($(CONFIG_GPIO_SH_PFC),y) sh-pfc-objs += gpio.o endif obj-$(CONFIG_PINCTRL_SH_PFC) += sh-pfc.o +obj-$(CONFIG_PINCTRL_PFC_R8A73A4) += pfc-r8a73a4.o obj-$(CONFIG_PINCTRL_PFC_R8A7740) += pfc-r8a7740.o obj-$(CONFIG_PINCTRL_PFC_R8A7779) += pfc-r8a7779.o obj-$(CONFIG_PINCTRL_PFC_SH7203) += pfc-sh7203.o diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c index 970ddff2b0b6..b551336924a5 100644 --- a/drivers/pinctrl/sh-pfc/core.c +++ b/drivers/pinctrl/sh-pfc/core.c @@ -10,7 +10,6 @@ */ #define DRV_NAME "sh-pfc" -#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #include <linux/bitops.h> #include <linux/err.h> @@ -30,10 +29,8 @@ static int sh_pfc_ioremap(struct sh_pfc *pfc, struct platform_device *pdev) struct resource *res; int k; - if (pdev->num_resources == 0) { - pfc->num_windows = 0; - return 0; - } + if (pdev->num_resources == 0) + return -EINVAL; pfc->window = devm_kzalloc(pfc->dev, pdev->num_resources * sizeof(*pfc->window), GFP_NOWAIT); @@ -59,11 +56,11 @@ static void __iomem *sh_pfc_phys_to_virt(struct sh_pfc *pfc, unsigned long address) { struct sh_pfc_window *window; - int k; + unsigned int i; /* scan through physical windows and convert address */ - for (k = 0; k < pfc->num_windows; k++) { - window = pfc->window + k; + for (i = 0; i < pfc->num_windows; i++) { + window = pfc->window + i; if (address < window->phys) continue; @@ -74,11 +71,33 @@ static void __iomem *sh_pfc_phys_to_virt(struct sh_pfc *pfc, return window->virt + (address - window->phys); } - /* no windows defined, register must be 1:1 mapped virt:phys */ - return (void __iomem *)address; + BUG(); + return NULL; +} + +int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin) +{ + unsigned int offset; + unsigned int i; + + if (pfc->info->ranges == NULL) + return pin; + + for (i = 0, offset = 0; i < pfc->info->nr_ranges; ++i) { + const struct pinmux_range *range = &pfc->info->ranges[i]; + + if (pin <= range->end) + return pin >= range->begin + ? offset + pin - range->begin : -1; + + offset += range->end - range->begin + 1; + } + + return -EINVAL; } -static int sh_pfc_enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r) +static int sh_pfc_enum_in_range(pinmux_enum_t enum_id, + const struct pinmux_range *r) { if (enum_id < r->begin) return 0; @@ -89,8 +108,8 @@ static int sh_pfc_enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r) return 1; } -static unsigned long sh_pfc_read_raw_reg(void __iomem *mapped_reg, - unsigned long reg_width) +unsigned long sh_pfc_read_raw_reg(void __iomem *mapped_reg, + unsigned long reg_width) { switch (reg_width) { case 8: @@ -105,8 +124,8 @@ static unsigned long sh_pfc_read_raw_reg(void __iomem *mapped_reg, return 0; } -static void sh_pfc_write_raw_reg(void __iomem *mapped_reg, - unsigned long reg_width, unsigned long data) +void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width, + unsigned long data) { switch (reg_width) { case 8: @@ -123,39 +142,8 @@ static void sh_pfc_write_raw_reg(void __iomem *mapped_reg, BUG(); } -int sh_pfc_read_bit(struct pinmux_data_reg *dr, unsigned long in_pos) -{ - unsigned long pos; - - pos = dr->reg_width - (in_pos + 1); - - pr_debug("read_bit: addr = %lx, pos = %ld, " - "r_width = %ld\n", dr->reg, pos, dr->reg_width); - - return (sh_pfc_read_raw_reg(dr->mapped_reg, dr->reg_width) >> pos) & 1; -} - -void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos, - unsigned long value) -{ - unsigned long pos; - - pos = dr->reg_width - (in_pos + 1); - - pr_debug("write_bit addr = %lx, value = %d, pos = %ld, " - "r_width = %ld\n", - dr->reg, !!value, pos, dr->reg_width); - - if (value) - set_bit(pos, &dr->reg_shadow); - else - clear_bit(pos, &dr->reg_shadow); - - sh_pfc_write_raw_reg(dr->mapped_reg, dr->reg_width, dr->reg_shadow); -} - static void sh_pfc_config_reg_helper(struct sh_pfc *pfc, - struct pinmux_cfg_reg *crp, + const struct pinmux_cfg_reg *crp, unsigned long in_pos, void __iomem **mapped_regp, unsigned long *maskp, @@ -176,24 +164,8 @@ static void sh_pfc_config_reg_helper(struct sh_pfc *pfc, } } -static int sh_pfc_read_config_reg(struct sh_pfc *pfc, - struct pinmux_cfg_reg *crp, - unsigned long field) -{ - void __iomem *mapped_reg; - unsigned long mask, pos; - - sh_pfc_config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos); - - pr_debug("read_reg: addr = %lx, field = %ld, " - "r_width = %ld, f_width = %ld\n", - crp->reg, field, crp->reg_width, crp->field_width); - - return (sh_pfc_read_raw_reg(mapped_reg, crp->reg_width) >> pos) & mask; -} - static void sh_pfc_write_config_reg(struct sh_pfc *pfc, - struct pinmux_cfg_reg *crp, + const struct pinmux_cfg_reg *crp, unsigned long field, unsigned long value) { void __iomem *mapped_reg; @@ -201,9 +173,9 @@ static void sh_pfc_write_config_reg(struct sh_pfc *pfc, sh_pfc_config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos); - pr_debug("write_reg addr = %lx, value = %ld, field = %ld, " - "r_width = %ld, f_width = %ld\n", - crp->reg, value, field, crp->reg_width, crp->field_width); + dev_dbg(pfc->dev, "write_reg addr = %lx, value = %ld, field = %ld, " + "r_width = %ld, f_width = %ld\n", + crp->reg, value, field, crp->reg_width, crp->field_width); mask = ~(mask << pos); value = value << pos; @@ -220,83 +192,11 @@ static void sh_pfc_write_config_reg(struct sh_pfc *pfc, sh_pfc_write_raw_reg(mapped_reg, crp->reg_width, data); } -static int sh_pfc_setup_data_reg(struct sh_pfc *pfc, unsigned gpio) -{ - struct pinmux_gpio *gpiop = &pfc->info->gpios[gpio]; - struct pinmux_data_reg *data_reg; - int k, n; - - if (!sh_pfc_enum_in_range(gpiop->enum_id, &pfc->info->data)) - return -1; - - k = 0; - while (1) { - data_reg = pfc->info->data_regs + k; - - if (!data_reg->reg_width) - break; - - data_reg->mapped_reg = sh_pfc_phys_to_virt(pfc, data_reg->reg); - - for (n = 0; n < data_reg->reg_width; n++) { - if (data_reg->enum_ids[n] == gpiop->enum_id) { - gpiop->flags &= ~PINMUX_FLAG_DREG; - gpiop->flags |= (k << PINMUX_FLAG_DREG_SHIFT); - gpiop->flags &= ~PINMUX_FLAG_DBIT; - gpiop->flags |= (n << PINMUX_FLAG_DBIT_SHIFT); - return 0; - } - } - k++; - } - - BUG(); - - return -1; -} - -static void sh_pfc_setup_data_regs(struct sh_pfc *pfc) -{ - struct pinmux_data_reg *drp; - int k; - - for (k = pfc->info->first_gpio; k <= pfc->info->last_gpio; k++) - sh_pfc_setup_data_reg(pfc, k); - - k = 0; - while (1) { - drp = pfc->info->data_regs + k; - - if (!drp->reg_width) - break; - - drp->reg_shadow = sh_pfc_read_raw_reg(drp->mapped_reg, - drp->reg_width); - k++; - } -} - -int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio, - struct pinmux_data_reg **drp, int *bitp) -{ - struct pinmux_gpio *gpiop = &pfc->info->gpios[gpio]; - int k, n; - - if (!sh_pfc_enum_in_range(gpiop->enum_id, &pfc->info->data)) - return -1; - - k = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT; - n = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT; - *drp = pfc->info->data_regs + k; - *bitp = n; - return 0; -} - static int sh_pfc_get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id, - struct pinmux_cfg_reg **crp, int *fieldp, - int *valuep, unsigned long **cntp) + const struct pinmux_cfg_reg **crp, int *fieldp, + int *valuep) { - struct pinmux_cfg_reg *config_reg; + const struct pinmux_cfg_reg *config_reg; unsigned long r_width, f_width, curr_width, ncomb; int k, m, n, pos, bit_pos; @@ -324,7 +224,6 @@ static int sh_pfc_get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id, *crp = config_reg; *fieldp = m; *valuep = n; - *cntp = &config_reg->cnt[m]; return 0; } } @@ -334,50 +233,42 @@ static int sh_pfc_get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id, k++; } - return -1; + return -EINVAL; } -int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos, - pinmux_enum_t *enum_idp) +static int sh_pfc_mark_to_enum(struct sh_pfc *pfc, pinmux_enum_t mark, int pos, + pinmux_enum_t *enum_idp) { - pinmux_enum_t enum_id = pfc->info->gpios[gpio].enum_id; - pinmux_enum_t *data = pfc->info->gpio_data; + const pinmux_enum_t *data = pfc->info->gpio_data; int k; - if (!sh_pfc_enum_in_range(enum_id, &pfc->info->data)) { - if (!sh_pfc_enum_in_range(enum_id, &pfc->info->mark)) { - pr_err("non data/mark enum_id for gpio %d\n", gpio); - return -1; - } - } - if (pos) { *enum_idp = data[pos + 1]; return pos + 1; } for (k = 0; k < pfc->info->gpio_data_size; k++) { - if (data[k] == enum_id) { + if (data[k] == mark) { *enum_idp = data[k + 1]; return k + 1; } } - pr_err("cannot locate data/mark enum_id for gpio %d\n", gpio); - return -1; + dev_err(pfc->dev, "cannot locate data/mark enum_id for mark %d\n", + mark); + return -EINVAL; } -int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type, - int cfg_mode) +int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type) { - struct pinmux_cfg_reg *cr = NULL; + const struct pinmux_cfg_reg *cr = NULL; pinmux_enum_t enum_id; - struct pinmux_range *range; + const struct pinmux_range *range; int in_range, pos, field, value; - unsigned long *cntp; + int ret; switch (pinmux_type) { - + case PINMUX_TYPE_GPIO: case PINMUX_TYPE_FUNCTION: range = NULL; break; @@ -399,33 +290,37 @@ int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type, break; default: - goto out_err; + return -EINVAL; } pos = 0; enum_id = 0; field = 0; value = 0; + + /* Iterate over all the configuration fields we need to update. */ while (1) { - pos = sh_pfc_gpio_to_enum(pfc, gpio, pos, &enum_id); - if (pos <= 0) - goto out_err; + pos = sh_pfc_mark_to_enum(pfc, mark, pos, &enum_id); + if (pos < 0) + return pos; if (!enum_id) break; - /* first check if this is a function enum */ + /* Check if the configuration field selects a function. If it + * doesn't, skip the field if it's not applicable to the + * requested pinmux type. + */ in_range = sh_pfc_enum_in_range(enum_id, &pfc->info->function); if (!in_range) { - /* not a function enum */ - if (range) { - /* - * other range exists, so this pin is - * a regular GPIO pin that now is being - * bound to a specific direction. - * - * for this case we only allow function enums - * and the enums that match the other range. + if (pinmux_type == PINMUX_TYPE_FUNCTION) { + /* Functions are allowed to modify all + * fields. + */ + in_range = 1; + } else if (pinmux_type != PINMUX_TYPE_GPIO) { + /* Input/output types can only modify fields + * that correspond to their respective ranges. */ in_range = sh_pfc_enum_in_range(enum_id, range); @@ -436,60 +331,29 @@ int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type, */ if (in_range && enum_id == range->force) continue; - } else { - /* - * no other range exists, so this pin - * must then be of the function type. - * - * allow function type pins to select - * any combination of function/in/out - * in their MARK lists. - */ - in_range = 1; } + /* GPIOs are only allowed to modify function fields. */ } if (!in_range) continue; - if (sh_pfc_get_config_reg(pfc, enum_id, &cr, - &field, &value, &cntp) != 0) - goto out_err; - - switch (cfg_mode) { - case GPIO_CFG_DRYRUN: - if (!*cntp || - (sh_pfc_read_config_reg(pfc, cr, field) != value)) - continue; - break; - - case GPIO_CFG_REQ: - sh_pfc_write_config_reg(pfc, cr, field, value); - *cntp = *cntp + 1; - break; + ret = sh_pfc_get_config_reg(pfc, enum_id, &cr, &field, &value); + if (ret < 0) + return ret; - case GPIO_CFG_FREE: - *cntp = *cntp - 1; - break; - } + sh_pfc_write_config_reg(pfc, cr, field, value); } return 0; - out_err: - return -1; } static int sh_pfc_probe(struct platform_device *pdev) { - struct sh_pfc_soc_info *info; + const struct sh_pfc_soc_info *info; struct sh_pfc *pfc; int ret; - /* - * Ensure that the type encoding fits - */ - BUILD_BUG_ON(PINMUX_FLAG_TYPE > ((1 << PINMUX_FLAG_DBIT_SHIFT) - 1)); - info = pdev->id_entry->driver_data ? (void *)pdev->id_entry->driver_data : pdev->dev.platform_data; if (info == NULL) @@ -509,7 +373,6 @@ static int sh_pfc_probe(struct platform_device *pdev) spin_lock_init(&pfc->lock); pinctrl_provide_dummies(); - sh_pfc_setup_data_regs(pfc); /* * Initialize pinctrl bindings first @@ -529,13 +392,13 @@ static int sh_pfc_probe(struct platform_device *pdev) * PFC state as it is, given that there are already * extant users of it that have succeeded by this point. */ - pr_notice("failed to init GPIO chip, ignoring...\n"); + dev_notice(pfc->dev, "failed to init GPIO chip, ignoring...\n"); } #endif platform_set_drvdata(pdev, pfc); - pr_info("%s support registered\n", info->name); + dev_info(pfc->dev, "%s support registered\n", info->name); return 0; } @@ -555,6 +418,9 @@ static int sh_pfc_remove(struct platform_device *pdev) } static const struct platform_device_id sh_pfc_id_table[] = { +#ifdef CONFIG_PINCTRL_PFC_R8A73A4 + { "pfc-r8a73a4", (kernel_ulong_t)&r8a73a4_pinmux_info }, +#endif #ifdef CONFIG_PINCTRL_PFC_R8A7740 { "pfc-r8a7740", (kernel_ulong_t)&r8a7740_pinmux_info }, #endif diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h index ba7c33c33599..89cb4289d761 100644 --- a/drivers/pinctrl/sh-pfc/core.h +++ b/drivers/pinctrl/sh-pfc/core.h @@ -26,13 +26,17 @@ struct sh_pfc_pinctrl; struct sh_pfc { struct device *dev; - struct sh_pfc_soc_info *info; + const struct sh_pfc_soc_info *info; spinlock_t lock; unsigned int num_windows; struct sh_pfc_window *window; + unsigned int nr_pins; + struct sh_pfc_chip *gpio; + struct sh_pfc_chip *func; + struct sh_pfc_pinctrl *pinctrl; }; @@ -42,31 +46,30 @@ int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc); int sh_pfc_register_pinctrl(struct sh_pfc *pfc); int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc); -int sh_pfc_read_bit(struct pinmux_data_reg *dr, unsigned long in_pos); -void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos, - unsigned long value); -int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio, - struct pinmux_data_reg **drp, int *bitp); -int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos, - pinmux_enum_t *enum_idp); -int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type, - int cfg_mode); +unsigned long sh_pfc_read_raw_reg(void __iomem *mapped_reg, + unsigned long reg_width); +void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width, + unsigned long data); + +int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin); +int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type); -extern struct sh_pfc_soc_info r8a7740_pinmux_info; -extern struct sh_pfc_soc_info r8a7779_pinmux_info; -extern struct sh_pfc_soc_info sh7203_pinmux_info; -extern struct sh_pfc_soc_info sh7264_pinmux_info; -extern struct sh_pfc_soc_info sh7269_pinmux_info; -extern struct sh_pfc_soc_info sh7372_pinmux_info; -extern struct sh_pfc_soc_info sh73a0_pinmux_info; -extern struct sh_pfc_soc_info sh7720_pinmux_info; -extern struct sh_pfc_soc_info sh7722_pinmux_info; -extern struct sh_pfc_soc_info sh7723_pinmux_info; -extern struct sh_pfc_soc_info sh7724_pinmux_info; -extern struct sh_pfc_soc_info sh7734_pinmux_info; -extern struct sh_pfc_soc_info sh7757_pinmux_info; -extern struct sh_pfc_soc_info sh7785_pinmux_info; -extern struct sh_pfc_soc_info sh7786_pinmux_info; -extern struct sh_pfc_soc_info shx3_pinmux_info; +extern const struct sh_pfc_soc_info r8a73a4_pinmux_info; +extern const struct sh_pfc_soc_info r8a7740_pinmux_info; +extern const struct sh_pfc_soc_info r8a7779_pinmux_info; +extern const struct sh_pfc_soc_info sh7203_pinmux_info; +extern const struct sh_pfc_soc_info sh7264_pinmux_info; +extern const struct sh_pfc_soc_info sh7269_pinmux_info; +extern const struct sh_pfc_soc_info sh7372_pinmux_info; +extern const struct sh_pfc_soc_info sh73a0_pinmux_info; +extern const struct sh_pfc_soc_info sh7720_pinmux_info; +extern const struct sh_pfc_soc_info sh7722_pinmux_info; +extern const struct sh_pfc_soc_info sh7723_pinmux_info; +extern const struct sh_pfc_soc_info sh7724_pinmux_info; +extern const struct sh_pfc_soc_info sh7734_pinmux_info; +extern const struct sh_pfc_soc_info sh7757_pinmux_info; +extern const struct sh_pfc_soc_info sh7785_pinmux_info; +extern const struct sh_pfc_soc_info sh7786_pinmux_info; +extern const struct sh_pfc_soc_info shx3_pinmux_info; #endif /* __SH_PFC_CORE_H__ */ diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c index a535075c8b69..d37efa7dcf90 100644 --- a/drivers/pinctrl/sh-pfc/gpio.c +++ b/drivers/pinctrl/sh-pfc/gpio.c @@ -9,8 +9,6 @@ * for more details. */ -#define pr_fmt(fmt) KBUILD_MODNAME " gpio: " fmt - #include <linux/device.h> #include <linux/gpio.h> #include <linux/init.h> @@ -21,9 +19,23 @@ #include "core.h" +struct sh_pfc_gpio_data_reg { + const struct pinmux_data_reg *info; + unsigned long shadow; +}; + +struct sh_pfc_gpio_pin { + u8 dbit; + u8 dreg; +}; + struct sh_pfc_chip { - struct sh_pfc *pfc; - struct gpio_chip gpio_chip; + struct sh_pfc *pfc; + struct gpio_chip gpio_chip; + + struct sh_pfc_window *mem; + struct sh_pfc_gpio_data_reg *regs; + struct sh_pfc_gpio_pin *pins; }; static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc) @@ -36,143 +48,367 @@ static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc) return gpio_to_pfc_chip(gc)->pfc; } -static int sh_gpio_request(struct gpio_chip *gc, unsigned offset) +static void gpio_get_data_reg(struct sh_pfc_chip *chip, unsigned int gpio, + struct sh_pfc_gpio_data_reg **reg, + unsigned int *bit) { - return pinctrl_request_gpio(offset); + int idx = sh_pfc_get_pin_index(chip->pfc, gpio); + struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx]; + + *reg = &chip->regs[gpio_pin->dreg]; + *bit = gpio_pin->dbit; } -static void sh_gpio_free(struct gpio_chip *gc, unsigned offset) +static unsigned long gpio_read_data_reg(struct sh_pfc_chip *chip, + const struct pinmux_data_reg *dreg) { - pinctrl_free_gpio(offset); + void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt; + + return sh_pfc_read_raw_reg(mem, dreg->reg_width); } -static void sh_gpio_set_value(struct sh_pfc *pfc, unsigned gpio, int value) +static void gpio_write_data_reg(struct sh_pfc_chip *chip, + const struct pinmux_data_reg *dreg, + unsigned long value) { - struct pinmux_data_reg *dr = NULL; - int bit = 0; + void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt; - if (sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0) - BUG(); - else - sh_pfc_write_bit(dr, bit, value); + sh_pfc_write_raw_reg(mem, dreg->reg_width, value); } -static int sh_gpio_get_value(struct sh_pfc *pfc, unsigned gpio) +static void gpio_setup_data_reg(struct sh_pfc_chip *chip, unsigned gpio) { - struct pinmux_data_reg *dr = NULL; - int bit = 0; + struct sh_pfc *pfc = chip->pfc; + struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[gpio]; + const struct sh_pfc_pin *pin = &pfc->info->pins[gpio]; + const struct pinmux_data_reg *dreg; + unsigned int bit; + unsigned int i; + + for (i = 0, dreg = pfc->info->data_regs; dreg->reg; ++i, ++dreg) { + for (bit = 0; bit < dreg->reg_width; bit++) { + if (dreg->enum_ids[bit] == pin->enum_id) { + gpio_pin->dreg = i; + gpio_pin->dbit = bit; + return; + } + } + } - if (sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0) + BUG(); +} + +static int gpio_setup_data_regs(struct sh_pfc_chip *chip) +{ + struct sh_pfc *pfc = chip->pfc; + const struct pinmux_data_reg *dreg; + unsigned int i; + + /* Count the number of data registers, allocate memory and initialize + * them. + */ + for (i = 0; pfc->info->data_regs[i].reg_width; ++i) + ; + + chip->regs = devm_kzalloc(pfc->dev, i * sizeof(*chip->regs), + GFP_KERNEL); + if (chip->regs == NULL) + return -ENOMEM; + + for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) { + chip->regs[i].info = dreg; + chip->regs[i].shadow = gpio_read_data_reg(chip, dreg); + } + + for (i = 0; i < pfc->info->nr_pins; i++) { + if (pfc->info->pins[i].enum_id == 0) + continue; + + gpio_setup_data_reg(chip, i); + } + + return 0; +} + +/* ----------------------------------------------------------------------------- + * Pin GPIOs + */ + +static int gpio_pin_request(struct gpio_chip *gc, unsigned offset) +{ + struct sh_pfc *pfc = gpio_to_pfc(gc); + int idx = sh_pfc_get_pin_index(pfc, offset); + + if (idx < 0 || pfc->info->pins[idx].enum_id == 0) return -EINVAL; - return sh_pfc_read_bit(dr, bit); + return pinctrl_request_gpio(offset); +} + +static void gpio_pin_free(struct gpio_chip *gc, unsigned offset) +{ + return pinctrl_free_gpio(offset); +} + +static void gpio_pin_set_value(struct sh_pfc_chip *chip, unsigned offset, + int value) +{ + struct sh_pfc_gpio_data_reg *reg; + unsigned long pos; + unsigned int bit; + + gpio_get_data_reg(chip, offset, ®, &bit); + + pos = reg->info->reg_width - (bit + 1); + + if (value) + set_bit(pos, ®->shadow); + else + clear_bit(pos, ®->shadow); + + gpio_write_data_reg(chip, reg->info, reg->shadow); } -static int sh_gpio_direction_input(struct gpio_chip *gc, unsigned offset) +static int gpio_pin_direction_input(struct gpio_chip *gc, unsigned offset) { return pinctrl_gpio_direction_input(offset); } -static int sh_gpio_direction_output(struct gpio_chip *gc, unsigned offset, +static int gpio_pin_direction_output(struct gpio_chip *gc, unsigned offset, int value) { - sh_gpio_set_value(gpio_to_pfc(gc), offset, value); + gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value); return pinctrl_gpio_direction_output(offset); } -static int sh_gpio_get(struct gpio_chip *gc, unsigned offset) +static int gpio_pin_get(struct gpio_chip *gc, unsigned offset) { - return sh_gpio_get_value(gpio_to_pfc(gc), offset); + struct sh_pfc_chip *chip = gpio_to_pfc_chip(gc); + struct sh_pfc_gpio_data_reg *reg; + unsigned long pos; + unsigned int bit; + + gpio_get_data_reg(chip, offset, ®, &bit); + + pos = reg->info->reg_width - (bit + 1); + + return (gpio_read_data_reg(chip, reg->info) >> pos) & 1; } -static void sh_gpio_set(struct gpio_chip *gc, unsigned offset, int value) +static void gpio_pin_set(struct gpio_chip *gc, unsigned offset, int value) { - sh_gpio_set_value(gpio_to_pfc(gc), offset, value); + gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value); } -static int sh_gpio_to_irq(struct gpio_chip *gc, unsigned offset) +static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset) { struct sh_pfc *pfc = gpio_to_pfc(gc); - pinmux_enum_t enum_id; - pinmux_enum_t *enum_ids; - int i, k, pos; - - pos = 0; - enum_id = 0; - while (1) { - pos = sh_pfc_gpio_to_enum(pfc, offset, pos, &enum_id); - if (pos <= 0 || !enum_id) - break; + int i, k; - for (i = 0; i < pfc->info->gpio_irq_size; i++) { - enum_ids = pfc->info->gpio_irq[i].enum_ids; - for (k = 0; enum_ids[k]; k++) { - if (enum_ids[k] == enum_id) - return pfc->info->gpio_irq[i].irq; - } + for (i = 0; i < pfc->info->gpio_irq_size; i++) { + unsigned short *gpios = pfc->info->gpio_irq[i].gpios; + + for (k = 0; gpios[k]; k++) { + if (gpios[k] == offset) + return pfc->info->gpio_irq[i].irq; } } return -ENOSYS; } -static void sh_pfc_gpio_setup(struct sh_pfc_chip *chip) +static int gpio_pin_setup(struct sh_pfc_chip *chip) { struct sh_pfc *pfc = chip->pfc; struct gpio_chip *gc = &chip->gpio_chip; + int ret; + + chip->pins = devm_kzalloc(pfc->dev, pfc->nr_pins * sizeof(*chip->pins), + GFP_KERNEL); + if (chip->pins == NULL) + return -ENOMEM; + + ret = gpio_setup_data_regs(chip); + if (ret < 0) + return ret; + + gc->request = gpio_pin_request; + gc->free = gpio_pin_free; + gc->direction_input = gpio_pin_direction_input; + gc->get = gpio_pin_get; + gc->direction_output = gpio_pin_direction_output; + gc->set = gpio_pin_set; + gc->to_irq = gpio_pin_to_irq; - gc->request = sh_gpio_request; - gc->free = sh_gpio_free; - gc->direction_input = sh_gpio_direction_input; - gc->get = sh_gpio_get; - gc->direction_output = sh_gpio_direction_output; - gc->set = sh_gpio_set; - gc->to_irq = sh_gpio_to_irq; + gc->label = pfc->info->name; + gc->dev = pfc->dev; + gc->owner = THIS_MODULE; + gc->base = 0; + gc->ngpio = pfc->nr_pins; + + return 0; +} + +/* ----------------------------------------------------------------------------- + * Function GPIOs + */ + +static int gpio_function_request(struct gpio_chip *gc, unsigned offset) +{ + static bool __print_once; + struct sh_pfc *pfc = gpio_to_pfc(gc); + unsigned int mark = pfc->info->func_gpios[offset].enum_id; + unsigned long flags; + int ret; + + if (!__print_once) { + dev_notice(pfc->dev, + "Use of GPIO API for function requests is deprecated." + " Convert to pinctrl\n"); + __print_once = true; + } + + if (mark == 0) + return -EINVAL; - WARN_ON(pfc->info->first_gpio != 0); /* needs testing */ + spin_lock_irqsave(&pfc->lock, flags); + ret = sh_pfc_config_mux(pfc, mark, PINMUX_TYPE_FUNCTION); + spin_unlock_irqrestore(&pfc->lock, flags); + + return ret; +} + +static void gpio_function_free(struct gpio_chip *gc, unsigned offset) +{ +} + +static int gpio_function_setup(struct sh_pfc_chip *chip) +{ + struct sh_pfc *pfc = chip->pfc; + struct gpio_chip *gc = &chip->gpio_chip; + + gc->request = gpio_function_request; + gc->free = gpio_function_free; gc->label = pfc->info->name; gc->owner = THIS_MODULE; - gc->base = pfc->info->first_gpio; - gc->ngpio = (pfc->info->last_gpio - pfc->info->first_gpio) + 1; + gc->base = pfc->nr_pins; + gc->ngpio = pfc->info->nr_func_gpios; + + return 0; } -int sh_pfc_register_gpiochip(struct sh_pfc *pfc) +/* ----------------------------------------------------------------------------- + * Register/unregister + */ + +static struct sh_pfc_chip * +sh_pfc_add_gpiochip(struct sh_pfc *pfc, int(*setup)(struct sh_pfc_chip *), + struct sh_pfc_window *mem) { struct sh_pfc_chip *chip; int ret; chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL); if (unlikely(!chip)) - return -ENOMEM; + return ERR_PTR(-ENOMEM); + chip->mem = mem; chip->pfc = pfc; - sh_pfc_gpio_setup(chip); + ret = setup(chip); + if (ret < 0) + return ERR_PTR(ret); ret = gpiochip_add(&chip->gpio_chip); if (unlikely(ret < 0)) - return ret; + return ERR_PTR(ret); + + dev_info(pfc->dev, "%s handling gpio %u -> %u\n", + chip->gpio_chip.label, chip->gpio_chip.base, + chip->gpio_chip.base + chip->gpio_chip.ngpio - 1); + + return chip; +} + +int sh_pfc_register_gpiochip(struct sh_pfc *pfc) +{ + const struct pinmux_range *ranges; + struct pinmux_range def_range; + struct sh_pfc_chip *chip; + unsigned int nr_ranges; + unsigned int i; + int ret; + + if (pfc->info->data_regs == NULL) + return 0; + + /* Find the memory window that contain the GPIO registers. Boards that + * register a separate GPIO device will not supply a memory resource + * that covers the data registers. In that case don't try to handle + * GPIOs. + */ + for (i = 0; i < pfc->num_windows; ++i) { + struct sh_pfc_window *window = &pfc->window[i]; + + if (pfc->info->data_regs[0].reg >= window->phys && + pfc->info->data_regs[0].reg < window->phys + window->size) + break; + } + + if (i == pfc->num_windows) + return 0; + + /* Register the real GPIOs chip. */ + chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup, &pfc->window[i]); + if (IS_ERR(chip)) + return PTR_ERR(chip); pfc->gpio = chip; - pr_info("%s handling gpio %d -> %d\n", - pfc->info->name, pfc->info->first_gpio, - pfc->info->last_gpio); + /* Register the GPIO to pin mappings. */ + if (pfc->info->ranges == NULL) { + def_range.begin = 0; + def_range.end = pfc->info->nr_pins - 1; + ranges = &def_range; + nr_ranges = 1; + } else { + ranges = pfc->info->ranges; + nr_ranges = pfc->info->nr_ranges; + } + + for (i = 0; i < nr_ranges; ++i) { + const struct pinmux_range *range = &ranges[i]; + + ret = gpiochip_add_pin_range(&chip->gpio_chip, + dev_name(pfc->dev), + range->begin, range->begin, + range->end - range->begin + 1); + if (ret < 0) + return ret; + } + + /* Register the function GPIOs chip. */ + if (pfc->info->nr_func_gpios == 0) + return 0; + + chip = sh_pfc_add_gpiochip(pfc, gpio_function_setup, NULL); + if (IS_ERR(chip)) + return PTR_ERR(chip); + + pfc->func = chip; return 0; } int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc) { - struct sh_pfc_chip *chip = pfc->gpio; + int err; int ret; - ret = gpiochip_remove(&chip->gpio_chip); - if (unlikely(ret < 0)) - return ret; + ret = gpiochip_remove(&pfc->gpio->gpio_chip); + err = gpiochip_remove(&pfc->func->gpio_chip); - pfc->gpio = NULL; - return 0; + return ret < 0 ? ret : err; } diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c new file mode 100644 index 000000000000..bbff5596e922 --- /dev/null +++ b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c @@ -0,0 +1,2587 @@ +/* + * Copyright (C) 2012-2013 Renesas Solutions Corp. + * Copyright (C) 2013 Magnus Damm + * Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of the + * License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ +#include <linux/io.h> +#include <linux/kernel.h> +#include <linux/pinctrl/pinconf-generic.h> +#include <mach/irqs.h> +#include <mach/r8a73a4.h> + +#include "core.h" +#include "sh_pfc.h" + +#define CPU_ALL_PORT(fn, pfx, sfx) \ + /* Port0 - Port30 */ \ + PORT_10(fn, pfx, sfx), \ + PORT_10(fn, pfx##1, sfx), \ + PORT_10(fn, pfx##2, sfx), \ + PORT_1(fn, pfx##30, sfx), \ + /* Port32 - Port40 */ \ + PORT_1(fn, pfx##32, sfx), PORT_1(fn, pfx##33, sfx), \ + PORT_1(fn, pfx##34, sfx), PORT_1(fn, pfx##35, sfx), \ + PORT_1(fn, pfx##36, sfx), PORT_1(fn, pfx##37, sfx), \ + PORT_1(fn, pfx##38, sfx), PORT_1(fn, pfx##39, sfx), \ + PORT_1(fn, pfx##40, sfx), \ + /* Port64 - Port85 */ \ + PORT_1(fn, pfx##64, sfx), PORT_1(fn, pfx##65, sfx), \ + PORT_1(fn, pfx##66, sfx), PORT_1(fn, pfx##67, sfx), \ + PORT_1(fn, pfx##68, sfx), PORT_1(fn, pfx##69, sfx), \ + PORT_10(fn, pfx##7, sfx), \ + PORT_1(fn, pfx##80, sfx), PORT_1(fn, pfx##81, sfx), \ + PORT_1(fn, pfx##82, sfx), PORT_1(fn, pfx##83, sfx), \ + PORT_1(fn, pfx##84, sfx), PORT_1(fn, pfx##85, sfx), \ + /* Port96 - Port126 */ \ + PORT_1(fn, pfx##96, sfx), PORT_1(fn, pfx##97, sfx), \ + PORT_1(fn, pfx##98, sfx), PORT_1(fn, pfx##99, sfx), \ + PORT_10(fn, pfx##10, sfx), \ + PORT_10(fn, pfx##11, sfx), \ + PORT_1(fn, pfx##120, sfx), PORT_1(fn, pfx##121, sfx), \ + PORT_1(fn, pfx##122, sfx), PORT_1(fn, pfx##123, sfx), \ + PORT_1(fn, pfx##124, sfx), PORT_1(fn, pfx##125, sfx), \ + PORT_1(fn, pfx##126, sfx), \ + /* Port128 - Port134 */ \ + PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx), \ + PORT_1(fn, pfx##130, sfx), PORT_1(fn, pfx##131, sfx), \ + PORT_1(fn, pfx##132, sfx), PORT_1(fn, pfx##133, sfx), \ + PORT_1(fn, pfx##134, sfx), \ + /* Port160 - Port178 */ \ + PORT_10(fn, pfx##16, sfx), \ + PORT_1(fn, pfx##170, sfx), PORT_1(fn, pfx##171, sfx), \ + PORT_1(fn, pfx##172, sfx), PORT_1(fn, pfx##173, sfx), \ + PORT_1(fn, pfx##174, sfx), PORT_1(fn, pfx##175, sfx), \ + PORT_1(fn, pfx##176, sfx), PORT_1(fn, pfx##177, sfx), \ + PORT_1(fn, pfx##178, sfx), \ + /* Port192 - Port222 */ \ + PORT_1(fn, pfx##192, sfx), PORT_1(fn, pfx##193, sfx), \ + PORT_1(fn, pfx##194, sfx), PORT_1(fn, pfx##195, sfx), \ + PORT_1(fn, pfx##196, sfx), PORT_1(fn, pfx##197, sfx), \ + PORT_1(fn, pfx##198, sfx), PORT_1(fn, pfx##199, sfx), \ + PORT_10(fn, pfx##20, sfx), \ + PORT_10(fn, pfx##21, sfx), \ + PORT_1(fn, pfx##220, sfx), PORT_1(fn, pfx##221, sfx), \ + PORT_1(fn, pfx##222, sfx), \ + /* Port224 - Port250 */ \ + PORT_1(fn, pfx##224, sfx), PORT_1(fn, pfx##225, sfx), \ + PORT_1(fn, pfx##226, sfx), PORT_1(fn, pfx##227, sfx), \ + PORT_1(fn, pfx##228, sfx), PORT_1(fn, pfx##229, sfx), \ + PORT_10(fn, pfx##23, sfx), \ + PORT_10(fn, pfx##24, sfx), \ + PORT_1(fn, pfx##250, sfx), \ + /* Port256 - Port283 */ \ + PORT_1(fn, pfx##256, sfx), PORT_1(fn, pfx##257, sfx), \ + PORT_1(fn, pfx##258, sfx), PORT_1(fn, pfx##259, sfx), \ + PORT_10(fn, pfx##26, sfx), \ + PORT_10(fn, pfx##27, sfx), \ + PORT_1(fn, pfx##280, sfx), PORT_1(fn, pfx##281, sfx), \ + PORT_1(fn, pfx##282, sfx), PORT_1(fn, pfx##283, sfx), \ + /* Port288 - Port308 */ \ + PORT_1(fn, pfx##288, sfx), PORT_1(fn, pfx##289, sfx), \ + PORT_10(fn, pfx##29, sfx), \ + PORT_1(fn, pfx##300, sfx), PORT_1(fn, pfx##301, sfx), \ + PORT_1(fn, pfx##302, sfx), PORT_1(fn, pfx##303, sfx), \ + PORT_1(fn, pfx##304, sfx), PORT_1(fn, pfx##305, sfx), \ + PORT_1(fn, pfx##306, sfx), PORT_1(fn, pfx##307, sfx), \ + PORT_1(fn, pfx##308, sfx), \ + /* Port320 - Port329 */ \ + PORT_10(fn, pfx##32, sfx) + + +enum { + PINMUX_RESERVED = 0, + + /* PORT0_DATA -> PORT329_DATA */ + PINMUX_DATA_BEGIN, + PORT_ALL(DATA), + PINMUX_DATA_END, + + /* PORT0_IN -> PORT329_IN */ + PINMUX_INPUT_BEGIN, + PORT_ALL(IN), + PINMUX_INPUT_END, + + /* PORT0_OUT -> PORT329_OUT */ + PINMUX_OUTPUT_BEGIN, + PORT_ALL(OUT), + PINMUX_OUTPUT_END, + + PINMUX_FUNCTION_BEGIN, + PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT329_FN_IN */ + PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT329_FN_OUT */ + PORT_ALL(FN0), /* PORT0_FN0 -> PORT329_FN0 */ + PORT_ALL(FN1), /* PORT0_FN1 -> PORT329_FN1 */ + PORT_ALL(FN2), /* PORT0_FN2 -> PORT329_FN2 */ + PORT_ALL(FN3), /* PORT0_FN3 -> PORT329_FN3 */ + PORT_ALL(FN4), /* PORT0_FN4 -> PORT329_FN4 */ + PORT_ALL(FN5), /* PORT0_FN5 -> PORT329_FN5 */ + PORT_ALL(FN6), /* PORT0_FN6 -> PORT329_FN6 */ + PORT_ALL(FN7), /* PORT0_FN7 -> PORT329_FN7 */ + + MSEL1CR_31_0, MSEL1CR_31_1, + MSEL1CR_27_0, MSEL1CR_27_1, + MSEL1CR_25_0, MSEL1CR_25_1, + MSEL1CR_24_0, MSEL1CR_24_1, + MSEL1CR_22_0, MSEL1CR_22_1, + MSEL1CR_21_0, MSEL1CR_21_1, + MSEL1CR_20_0, MSEL1CR_20_1, + MSEL1CR_19_0, MSEL1CR_19_1, + MSEL1CR_18_0, MSEL1CR_18_1, + MSEL1CR_17_0, MSEL1CR_17_1, + MSEL1CR_16_0, MSEL1CR_16_1, + MSEL1CR_15_0, MSEL1CR_15_1, + MSEL1CR_14_0, MSEL1CR_14_1, + MSEL1CR_13_0, MSEL1CR_13_1, + MSEL1CR_12_0, MSEL1CR_12_1, + MSEL1CR_11_0, MSEL1CR_11_1, + MSEL1CR_10_0, MSEL1CR_10_1, + MSEL1CR_09_0, MSEL1CR_09_1, + MSEL1CR_08_0, MSEL1CR_08_1, + MSEL1CR_07_0, MSEL1CR_07_1, + MSEL1CR_06_0, MSEL1CR_06_1, + MSEL1CR_05_0, MSEL1CR_05_1, + MSEL1CR_04_0, MSEL1CR_04_1, + MSEL1CR_03_0, MSEL1CR_03_1, + MSEL1CR_02_0, MSEL1CR_02_1, + MSEL1CR_01_0, MSEL1CR_01_1, + MSEL1CR_00_0, MSEL1CR_00_1, + + MSEL3CR_31_0, MSEL3CR_31_1, + MSEL3CR_28_0, MSEL3CR_28_1, + MSEL3CR_27_0, MSEL3CR_27_1, + MSEL3CR_26_0, MSEL3CR_26_1, + MSEL3CR_23_0, MSEL3CR_23_1, + MSEL3CR_22_0, MSEL3CR_22_1, + MSEL3CR_21_0, MSEL3CR_21_1, + MSEL3CR_20_0, MSEL3CR_20_1, + MSEL3CR_19_0, MSEL3CR_19_1, + MSEL3CR_18_0, MSEL3CR_18_1, + MSEL3CR_17_0, MSEL3CR_17_1, + MSEL3CR_16_0, MSEL3CR_16_1, + MSEL3CR_15_0, MSEL3CR_15_1, + MSEL3CR_12_0, MSEL3CR_12_1, + MSEL3CR_11_0, MSEL3CR_11_1, + MSEL3CR_10_0, MSEL3CR_10_1, + MSEL3CR_09_0, MSEL3CR_09_1, + MSEL3CR_06_0, MSEL3CR_06_1, + MSEL3CR_03_0, MSEL3CR_03_1, + MSEL3CR_01_0, MSEL3CR_01_1, + MSEL3CR_00_0, MSEL3CR_00_1, + + MSEL4CR_30_0, MSEL4CR_30_1, + MSEL4CR_29_0, MSEL4CR_29_1, + MSEL4CR_28_0, MSEL4CR_28_1, + MSEL4CR_27_0, MSEL4CR_27_1, + MSEL4CR_26_0, MSEL4CR_26_1, + MSEL4CR_25_0, MSEL4CR_25_1, + MSEL4CR_24_0, MSEL4CR_24_1, + MSEL4CR_23_0, MSEL4CR_23_1, + MSEL4CR_22_0, MSEL4CR_22_1, + MSEL4CR_21_0, MSEL4CR_21_1, + MSEL4CR_20_0, MSEL4CR_20_1, + MSEL4CR_19_0, MSEL4CR_19_1, + MSEL4CR_18_0, MSEL4CR_18_1, + MSEL4CR_17_0, MSEL4CR_17_1, + MSEL4CR_16_0, MSEL4CR_16_1, + MSEL4CR_15_0, MSEL4CR_15_1, + MSEL4CR_14_0, MSEL4CR_14_1, + MSEL4CR_13_0, MSEL4CR_13_1, + MSEL4CR_12_0, MSEL4CR_12_1, + MSEL4CR_11_0, MSEL4CR_11_1, + MSEL4CR_10_0, MSEL4CR_10_1, + MSEL4CR_09_0, MSEL4CR_09_1, + MSEL4CR_07_0, MSEL4CR_07_1, + MSEL4CR_04_0, MSEL4CR_04_1, + MSEL4CR_01_0, MSEL4CR_01_1, + + MSEL5CR_31_0, MSEL5CR_31_1, + MSEL5CR_30_0, MSEL5CR_30_1, + MSEL5CR_29_0, MSEL5CR_29_1, + MSEL5CR_28_0, MSEL5CR_28_1, + MSEL5CR_27_0, MSEL5CR_27_1, + MSEL5CR_26_0, MSEL5CR_26_1, + MSEL5CR_25_0, MSEL5CR_25_1, + MSEL5CR_24_0, MSEL5CR_24_1, + MSEL5CR_23_0, MSEL5CR_23_1, + MSEL5CR_22_0, MSEL5CR_22_1, + MSEL5CR_21_0, MSEL5CR_21_1, + MSEL5CR_20_0, MSEL5CR_20_1, + MSEL5CR_19_0, MSEL5CR_19_1, + MSEL5CR_18_0, MSEL5CR_18_1, + MSEL5CR_17_0, MSEL5CR_17_1, + MSEL5CR_16_0, MSEL5CR_16_1, + MSEL5CR_15_0, MSEL5CR_15_1, + MSEL5CR_14_0, MSEL5CR_14_1, + MSEL5CR_13_0, MSEL5CR_13_1, + MSEL5CR_12_0, MSEL5CR_12_1, + MSEL5CR_11_0, MSEL5CR_11_1, + MSEL5CR_10_0, MSEL5CR_10_1, + MSEL5CR_09_0, MSEL5CR_09_1, + MSEL5CR_08_0, MSEL5CR_08_1, + MSEL5CR_07_0, MSEL5CR_07_1, + MSEL5CR_06_0, MSEL5CR_06_1, + + MSEL8CR_16_0, MSEL8CR_16_1, + MSEL8CR_01_0, MSEL8CR_01_1, + MSEL8CR_00_0, MSEL8CR_00_1, + + PINMUX_FUNCTION_END, + + PINMUX_MARK_BEGIN, + + +#define F1(a) a##_MARK +#define F2(a) a##_MARK +#define F3(a) a##_MARK +#define F4(a) a##_MARK +#define F5(a) a##_MARK +#define F6(a) a##_MARK +#define F7(a) a##_MARK +#define IRQ(a) IRQ##a##_MARK + + F1(LCDD0), F3(PDM2_CLK_0), F7(DU0_DR0), IRQ(0), /* Port0 */ + F1(LCDD1), F3(PDM2_DATA_1), F7(DU0_DR19), IRQ(1), + F1(LCDD2), F3(PDM3_CLK_2), F7(DU0_DR2), IRQ(2), + F1(LCDD3), F3(PDM3_DATA_3), F7(DU0_DR3), IRQ(3), + F1(LCDD4), F3(PDM4_CLK_4), F7(DU0_DR4), IRQ(4), + F1(LCDD5), F3(PDM4_DATA_5), F7(DU0_DR5), IRQ(5), + F1(LCDD6), F3(PDM0_OUTCLK_6), F7(DU0_DR6), IRQ(6), + F1(LCDD7), F3(PDM0_OUTDATA_7), F7(DU0_DR7), IRQ(7), + F1(LCDD8), F3(PDM1_OUTCLK_8), F7(DU0_DG0), IRQ(8), + F1(LCDD9), F3(PDM1_OUTDATA_9), F7(DU0_DG1), IRQ(9), + F1(LCDD10), F3(FSICCK), F7(DU0_DG2), IRQ(10), /* Port10 */ + F1(LCDD11), F3(FSICISLD), F7(DU0_DG3), IRQ(11), + F1(LCDD12), F3(FSICOMC), F7(DU0_DG4), IRQ(12), + F1(LCDD13), F3(FSICOLR), F4(FSICILR), F7(DU0_DG5), IRQ(13), + F1(LCDD14), F3(FSICOBT), F4(FSICIBT), F7(DU0_DG6), IRQ(14), + F1(LCDD15), F3(FSICOSLD), F7(DU0_DG7), IRQ(15), + F1(LCDD16), F4(TPU1TO1), F7(DU0_DB0), + F1(LCDD17), F4(SF_IRQ_00), F7(DU0_DB1), + F1(LCDD18), F4(SF_IRQ_01), F7(DU0_DB2), + F1(LCDD19), F3(SCIFB3_RTS_19), F7(DU0_DB3), + F1(LCDD20), F3(SCIFB3_CTS_20), F7(DU0_DB4), /* Port20 */ + F1(LCDD21), F3(SCIFB3_TXD_21), F7(DU0_DB5), + F1(LCDD22), F3(SCIFB3_RXD_22), F7(DU0_DB6), + F1(LCDD23), F3(SCIFB3_SCK_23), F7(DU0_DB7), + F1(LCDHSYN), F2(LCDCS), F3(SCIFB1_RTS_24), + F7(DU0_EXHSYNC_N_CSYNC_N_HSYNC_N), + F1(LCDVSYN), F3(SCIFB1_CTS_25), F7(DU0_EXVSYNC_N_VSYNC_N_CSYNC_N), + F1(LCDDCK), F2(LCDWR), F3(SCIFB1_TXD_26), F7(DU0_DOTCLKIN), + F1(LCDDISP), F2(LCDRS), F3(SCIFB1_RXD_27), F7(DU0_DOTCLKOUT), + F1(LCDRD_N), F3(SCIFB1_SCK_28), F7(DU0_DOTCLKOUTB), + F1(LCDLCLK), F4(SF_IRQ_02), F7(DU0_DISP_CSYNC_N_DE), + F1(LCDDON), F4(SF_IRQ_03), F7(DU0_ODDF_N_CLAMP), /* Port30 */ + + F1(SCIFA0_RTS), F5(SIM0_DET), F7(CSCIF0_RTS), /* Port32 */ + F1(SCIFA0_CTS), F5(SIM1_DET), F7(CSCIF0_CTS), + F1(SCIFA0_SCK), F5(SIM0_PWRON), F7(CSCIF0_SCK), + F1(SCIFA1_RTS), F7(CSCIF1_RTS), + F1(SCIFA1_CTS), F7(CSCIF1_CTS), + F1(SCIFA1_SCK), F7(CSCIF1_SCK), + F1(SCIFB0_RTS), F3(TPU0TO1), F4(SCIFB3_RTS_38), F7(CHSCIF0_HRTS), + F1(SCIFB0_CTS), F3(TPU0TO2), F4(SCIFB3_CTS_39), F7(CHSCIF0_HCTS), + F1(SCIFB0_SCK), F3(TPU0TO3), F4(SCIFB3_SCK_40), + F7(CHSCIF0_HSCK), /* Port40 */ + + F1(PDM0_DATA), /* Port64 */ + F1(PDM1_DATA), + F1(HSI_RX_WAKE), F2(SCIFB2_CTS_66), F3(MSIOF3_SYNC), F5(GenIO4), + IRQ(40), + F1(HSI_RX_READY), F2(SCIFB1_TXD_67), F5(GIO_OUT3_67), F7(CHSCIF1_HTX), + F1(HSI_RX_FLAG), F2(SCIFB2_TXD_68), F3(MSIOF3_TXD), F5(GIO_OUT4_68), + F1(HSI_RX_DATA), F2(SCIFB2_RXD_69), F3(MSIOF3_RXD), F5(GIO_OUT5_69), + F1(HSI_TX_FLAG), F2(SCIFB1_RTS_70), F5(GIO_OUT1_70), F6(HSIC_TSTCLK0), + F7(CHSCIF1_HRTS), /* Port70 */ + F1(HSI_TX_DATA), F2(SCIFB1_CTS_71), F5(GIO_OUT2_71), F6(HSIC_TSTCLK1), + F7(CHSCIF1_HCTS), + F1(HSI_TX_WAKE), F2(SCIFB1_RXD_72), F5(GenIO8), F7(CHSCIF1_HRX), + F1(HSI_TX_READY), F2(SCIFB2_RTS_73), F3(MSIOF3_SCK), F5(GIO_OUT0_73), + F1(IRDA_OUT), F1(IRDA_IN), F1(IRDA_FIRSEL), F1(TPU0TO0), + F1(DIGRFEN), F1(GPS_TIMESTAMP), F1(TXP), /* Port80 */ + F1(TXP2), F1(COEX_0), F1(COEX_1), IRQ(19), IRQ(18), /* Port85 */ + + F1(KEYIN0), /* Port96 */ + F1(KEYIN1), F1(KEYIN2), F1(KEYIN3), F1(KEYIN4), /* Port100 */ + F1(KEYIN5), F1(KEYIN6), IRQ(41), F1(KEYIN7), IRQ(42), + F2(KEYOUT0), F2(KEYOUT1), F2(KEYOUT2), F2(KEYOUT3), + F2(KEYOUT4), F2(KEYOUT5), IRQ(43), F2(KEYOUT6), IRQ(44), /* Port110 */ + F2(KEYOUT7), F5(RFANAEN), IRQ(45), + F1(KEYIN8), F2(KEYOUT8), F4(SF_IRQ_04), IRQ(46), + F1(KEYIN9), F2(KEYOUT9), F4(SF_IRQ_05), IRQ(47), + F1(KEYIN10), F2(KEYOUT10), F4(SF_IRQ_06), IRQ(48), + F1(KEYIN11), F2(KEYOUT11), F4(SF_IRQ_07), IRQ(49), + F1(SCIFA0_TXD), F7(CSCIF0_TX), F1(SCIFA0_RXD), F7(CSCIF0_RX), + F1(SCIFA1_TXD), F7(CSCIF1_TX), F1(SCIFA1_RXD), F7(CSCIF1_RX), + F3(SF_PORT_1_120), F4(SCIFB3_RXD_120), F7(DU0_CDE), /* Port120 */ + F3(SF_PORT_0_121), F4(SCIFB3_TXD_121), + F1(SCIFB0_TXD), F7(CHSCIF0_HTX), + F1(SCIFB0_RXD), F7(CHSCIF0_HRX), F3(ISP_STROBE_124), + F1(STP_ISD_0), F2(PDM4_CLK_125), F3(MSIOF2_TXD), F5(SIM0_VOLTSEL0), + F1(TS_SDEN), F2(MSIOF7_SYNC), F3(STP_ISEN_1), + F1(STP_ISEN_0), F2(PDM1_OUTDATA_128), F3(MSIOF2_SYNC), + F5(SIM1_VOLTSEL1), F1(TS_SPSYNC), F2(MSIOF7_RXD), F3(STP_ISSYNC_1), + F1(STP_ISSYNC_0), F2(PDM4_DATA_130), F3(MSIOF2_RXD), + F5(SIM0_VOLTSEL1), /* Port130 */ + F1(STP_OPWM_0), F5(SIM1_PWRON), F1(TS_SCK), F2(MSIOF7_SCK), + F3(STP_ISCLK_1), F1(STP_ISCLK_0), F2(PDM1_OUTCLK_133), F3(MSIOF2_SCK), + F5(SIM1_VOLTSEL0), F1(TS_SDAT), F2(MSIOF7_TXD), F3(STP_ISD_1), + IRQ(20), /* Port160 */ + IRQ(21), IRQ(22), IRQ(23), + F1(MMCD0_0), F1(MMCD0_1), F1(MMCD0_2), F1(MMCD0_3), + F1(MMCD0_4), F1(MMCD0_5), F1(MMCD0_6), /* Port170 */ + F1(MMCD0_7), F1(MMCCMD0), F1(MMCCLK0), F1(MMCRST), + IRQ(24), IRQ(25), IRQ(26), IRQ(27), + F1(A10), F2(MMCD1_7), IRQ(31), /* Port192 */ + F1(A9), F2(MMCD1_6), IRQ(32), + F1(A8), F2(MMCD1_5), IRQ(33), + F1(A7), F2(MMCD1_4), IRQ(34), + F1(A6), F2(MMCD1_3), IRQ(35), + F1(A5), F2(MMCD1_2), IRQ(36), + F1(A4), F2(MMCD1_1), IRQ(37), + F1(A3), F2(MMCD1_0), IRQ(38), + F1(A2), F2(MMCCMD1), IRQ(39), /* Port200 */ + F1(A1), + F1(A0), F2(BS), + F1(CKO), F2(MMCCLK1), + F1(CS0_N), F5(SIM0_GPO1), + F1(CS2_N), F5(SIM0_GPO2), + F1(CS4_N), F2(VIO_VD), F5(SIM1_GPO0), + F1(D15), F5(GIO_OUT15), + F1(D14), F5(GIO_OUT14), + F1(D13), F5(GIO_OUT13), + F1(D12), F5(GIO_OUT12), /* Port210 */ + F1(D11), F5(WGM_TXP2), + F1(D10), F5(WGM_GPS_TIMEM_ASK_RFCLK), + F1(D9), F2(VIO_D9), F5(GIO_OUT9), + F1(D8), F2(VIO_D8), F5(GIO_OUT8), + F1(D7), F2(VIO_D7), F5(GIO_OUT7), + F1(D6), F2(VIO_D6), F5(GIO_OUT6), + F1(D5), F2(VIO_D5), F5(GIO_OUT5_217), + F1(D4), F2(VIO_D4), F5(GIO_OUT4_218), + F1(D3), F2(VIO_D3), F5(GIO_OUT3_219), + F1(D2), F2(VIO_D2), F5(GIO_OUT2_220), /* Port220 */ + F1(D1), F2(VIO_D1), F5(GIO_OUT1_221), + F1(D0), F2(VIO_D0), F5(GIO_OUT0_222), + F1(RDWR_224), F2(VIO_HD), F5(SIM1_GPO2), + F1(RD_N), F1(WAIT_N), F2(VIO_CLK), F5(SIM1_GPO1), + F1(WE0_N), F2(RDWR_227), + F1(WE1_N), F5(SIM0_GPO0), + F1(PWMO), F2(VIO_CKO1_229), + F1(SLIM_CLK), F2(VIO_CKO4_230), /* Port230 */ + F1(SLIM_DATA), F2(VIO_CKO5_231), F2(VIO_CKO2_232), F4(SF_PORT_0_232), + F2(VIO_CKO3_233), F4(SF_PORT_1_233), + F1(FSIACK), F2(PDM3_CLK_234), F3(ISP_IRIS1_234), + F1(FSIAISLD), F2(PDM3_DATA_235), + F1(FSIAOMC), F2(PDM0_OUTCLK_236), F3(ISP_IRIS0_236), + F1(FSIAOLR), F2(FSIAILR), F1(FSIAOBT), F2(FSIAIBT), + F1(FSIAOSLD), F2(PDM0_OUTDATA_239), + F1(FSIBISLD), /* Port240 */ + F1(FSIBOLR), F2(FSIBILR), F1(FSIBOMC), F3(ISP_SHUTTER1_242), + F1(FSIBOBT), F2(FSIBIBT), F1(FSIBOSLD), F2(FSIASPDIF), + F1(FSIBCK), F3(ISP_SHUTTER0_245), + F1(ISP_IRIS1_246), F1(ISP_IRIS0_247), F1(ISP_SHUTTER1_248), + F1(ISP_SHUTTER0_249), F1(ISP_STROBE_250), /* Port250 */ + F1(MSIOF0_SYNC), F1(MSIOF0_RXD), F1(MSIOF0_SCK), F1(MSIOF0_SS2), + F3(VIO_CKO3_259), F1(MSIOF0_TXD), /* Port260 */ + F2(SCIFB1_SCK_261), F7(CHSCIF1_HSCK), F2(SCIFB2_SCK_262), + F1(MSIOF1_SS2), F4(MSIOF5_SS2), F1(MSIOF1_TXD), F4(MSIOF5_TXD), + F1(MSIOF1_RXD), F4(MSIOF5_RXD), F1(MSIOF1_SS1), F4(MSIOF5_SS1), + F1(MSIOF0_SS1), F1(MSIOF1_SCK), F4(MSIOF5_SCK), + F1(MSIOF1_SYNC), F4(MSIOF5_SYNC), + F1(MSIOF2_SS1), F3(VIO_CKO5_270), /* Port270 */ + F1(MSIOF2_SS2), F3(VIO_CKO2_271), F1(MSIOF3_SS2), F3(VIO_CKO1_272), + F1(MSIOF3_SS1), F3(VIO_CKO4_273), F1(MSIOF4_SS2), F4(TPU1TO0), + F1(IC_DP), F1(SIM0_RST), F1(IC_DM), F1(SIM0_BSICOMP), + F1(SIM0_CLK), F1(SIM0_IO), /* Port280 */ + F1(SIM1_IO), F2(PDM2_DATA_281), F1(SIM1_CLK), F2(PDM2_CLK_282), + F1(SIM1_RST), F1(SDHID1_0), F3(STMDATA0_2), + F1(SDHID1_1), F3(STMDATA1_2), IRQ(51), /* Port290 */ + F1(SDHID1_2), F3(STMDATA2_2), F1(SDHID1_3), F3(STMDATA3_2), + F1(SDHICLK1), F3(STMCLK_2), F1(SDHICMD1), F3(STMSIDI_2), + F1(SDHID2_0), F2(MSIOF4_TXD), F3(SCIFB2_TXD_295), F4(MSIOF6_TXD), + F1(SDHID2_1), F4(MSIOF6_SS2), IRQ(52), + F1(SDHID2_2), F2(MSIOF4_RXD), F3(SCIFB2_RXD_297), F4(MSIOF6_RXD), + F1(SDHID2_3), F2(MSIOF4_SYNC), F3(SCIFB2_CTS_298), F4(MSIOF6_SYNC), + F1(SDHICLK2), F2(MSIOF4_SCK), F3(SCIFB2_SCK_299), F4(MSIOF6_SCK), + F1(SDHICMD2), F2(MSIOF4_SS1), F3(SCIFB2_RTS_300), + F4(MSIOF6_SS1), /* Port300 */ + F1(SDHICD0), IRQ(50), F1(SDHID0_0), F3(STMDATA0_1), + F1(SDHID0_1), F3(STMDATA1_1), F1(SDHID0_2), F3(STMDATA2_1), + F1(SDHID0_3), F3(STMDATA3_1), F1(SDHICMD0), F3(STMSIDI_1), + F1(SDHIWP0), F1(SDHICLK0), F3(STMCLK_1), IRQ(16), /* Port320 */ + IRQ(17), IRQ(28), IRQ(29), IRQ(30), IRQ(53), IRQ(54), + IRQ(55), IRQ(56), IRQ(57), + PINMUX_MARK_END, +}; + +#define _PORT_DATA(pfx, sfx) PORT_DATA_IO(pfx) +#define PINMUX_DATA_ALL() CPU_ALL_PORT(_PORT_DATA, , unused) + +static const pinmux_enum_t pinmux_data[] = { + /* specify valid pin states for each pin in GPIO mode */ + PINMUX_DATA_ALL(), + + /* Port0 */ + PINMUX_DATA(LCDD0_MARK, PORT0_FN1), + PINMUX_DATA(PDM2_CLK_0_MARK, PORT0_FN3), + PINMUX_DATA(DU0_DR0_MARK, PORT0_FN7), + PINMUX_DATA(IRQ0_MARK, PORT0_FN0), + + /* Port1 */ + PINMUX_DATA(LCDD1_MARK, PORT1_FN1), + PINMUX_DATA(PDM2_DATA_1_MARK, PORT1_FN3, MSEL3CR_12_0), + PINMUX_DATA(DU0_DR19_MARK, PORT1_FN7), + PINMUX_DATA(IRQ1_MARK, PORT1_FN0), + + /* Port2 */ + PINMUX_DATA(LCDD2_MARK, PORT2_FN1), + PINMUX_DATA(PDM3_CLK_2_MARK, PORT2_FN3), + PINMUX_DATA(DU0_DR2_MARK, PORT2_FN7), + PINMUX_DATA(IRQ2_MARK, PORT2_FN0), + + /* Port3 */ + PINMUX_DATA(LCDD3_MARK, PORT3_FN1), + PINMUX_DATA(PDM3_DATA_3_MARK, PORT3_FN3, MSEL3CR_12_0), + PINMUX_DATA(DU0_DR3_MARK, PORT3_FN7), + PINMUX_DATA(IRQ3_MARK, PORT3_FN0), + + /* Port4 */ + PINMUX_DATA(LCDD4_MARK, PORT4_FN1), + PINMUX_DATA(PDM4_CLK_4_MARK, PORT4_FN3), + PINMUX_DATA(DU0_DR4_MARK, PORT4_FN7), + PINMUX_DATA(IRQ4_MARK, PORT4_FN0), + + /* Port5 */ + PINMUX_DATA(LCDD5_MARK, PORT5_FN1), + PINMUX_DATA(PDM4_DATA_5_MARK, PORT5_FN3, MSEL3CR_12_0), + PINMUX_DATA(DU0_DR5_MARK, PORT5_FN7), + PINMUX_DATA(IRQ5_MARK, PORT5_FN0), + + /* Port6 */ + PINMUX_DATA(LCDD6_MARK, PORT6_FN1), + PINMUX_DATA(PDM0_OUTCLK_6_MARK, PORT6_FN3), + PINMUX_DATA(DU0_DR6_MARK, PORT6_FN7), + PINMUX_DATA(IRQ6_MARK, PORT6_FN0), + + /* Port7 */ + PINMUX_DATA(LCDD7_MARK, PORT7_FN1), + PINMUX_DATA(PDM0_OUTDATA_7_MARK, PORT7_FN3), + PINMUX_DATA(DU0_DR7_MARK, PORT7_FN7), + PINMUX_DATA(IRQ7_MARK, PORT7_FN0), + + /* Port8 */ + PINMUX_DATA(LCDD8_MARK, PORT8_FN1), + PINMUX_DATA(PDM1_OUTCLK_8_MARK, PORT8_FN3), + PINMUX_DATA(DU0_DG0_MARK, PORT8_FN7), + PINMUX_DATA(IRQ8_MARK, PORT8_FN0), + + /* Port9 */ + PINMUX_DATA(LCDD9_MARK, PORT9_FN1), + PINMUX_DATA(PDM1_OUTDATA_9_MARK, PORT9_FN3), + PINMUX_DATA(DU0_DG1_MARK, PORT9_FN7), + PINMUX_DATA(IRQ9_MARK, PORT9_FN0), + + /* Port10 */ + PINMUX_DATA(LCDD10_MARK, PORT10_FN1), + PINMUX_DATA(FSICCK_MARK, PORT10_FN3), + PINMUX_DATA(DU0_DG2_MARK, PORT10_FN7), + PINMUX_DATA(IRQ10_MARK, PORT10_FN0), + + /* Port11 */ + PINMUX_DATA(LCDD11_MARK, PORT11_FN1), + PINMUX_DATA(FSICISLD_MARK, PORT11_FN3), + PINMUX_DATA(DU0_DG3_MARK, PORT11_FN7), + PINMUX_DATA(IRQ11_MARK, PORT11_FN0), + + /* Port12 */ + PINMUX_DATA(LCDD12_MARK, PORT12_FN1), + PINMUX_DATA(FSICOMC_MARK, PORT12_FN3), + PINMUX_DATA(DU0_DG4_MARK, PORT12_FN7), + PINMUX_DATA(IRQ12_MARK, PORT12_FN0), + + /* Port13 */ + PINMUX_DATA(LCDD13_MARK, PORT13_FN1), + PINMUX_DATA(FSICOLR_MARK, PORT13_FN3), + PINMUX_DATA(FSICILR_MARK, PORT13_FN4), + PINMUX_DATA(DU0_DG5_MARK, PORT13_FN7), + PINMUX_DATA(IRQ13_MARK, PORT13_FN0), + + /* Port14 */ + PINMUX_DATA(LCDD14_MARK, PORT14_FN1), + PINMUX_DATA(FSICOBT_MARK, PORT14_FN3), + PINMUX_DATA(FSICIBT_MARK, PORT14_FN4), + PINMUX_DATA(DU0_DG6_MARK, PORT14_FN7), + PINMUX_DATA(IRQ14_MARK, PORT14_FN0), + + /* Port15 */ + PINMUX_DATA(LCDD15_MARK, PORT15_FN1), + PINMUX_DATA(FSICOSLD_MARK, PORT15_FN3), + PINMUX_DATA(DU0_DG7_MARK, PORT15_FN7), + PINMUX_DATA(IRQ15_MARK, PORT15_FN0), + + /* Port16 */ + PINMUX_DATA(LCDD16_MARK, PORT16_FN1), + PINMUX_DATA(TPU1TO1_MARK, PORT16_FN4), + PINMUX_DATA(DU0_DB0_MARK, PORT16_FN7), + + /* Port17 */ + PINMUX_DATA(LCDD17_MARK, PORT17_FN1), + PINMUX_DATA(SF_IRQ_00_MARK, PORT17_FN4), + PINMUX_DATA(DU0_DB1_MARK, PORT17_FN7), + + /* Port18 */ + PINMUX_DATA(LCDD18_MARK, PORT18_FN1), + PINMUX_DATA(SF_IRQ_01_MARK, PORT18_FN4), + PINMUX_DATA(DU0_DB2_MARK, PORT18_FN7), + + /* Port19 */ + PINMUX_DATA(LCDD19_MARK, PORT19_FN1), + PINMUX_DATA(SCIFB3_RTS_19_MARK, PORT19_FN3), + PINMUX_DATA(DU0_DB3_MARK, PORT19_FN7), + + /* Port20 */ + PINMUX_DATA(LCDD20_MARK, PORT20_FN1), + PINMUX_DATA(SCIFB3_CTS_20_MARK, PORT20_FN3, MSEL3CR_09_0), + PINMUX_DATA(DU0_DB4_MARK, PORT20_FN7), + + /* Port21 */ + PINMUX_DATA(LCDD21_MARK, PORT21_FN1), + PINMUX_DATA(SCIFB3_TXD_21_MARK, PORT21_FN3, MSEL3CR_09_0), + PINMUX_DATA(DU0_DB5_MARK, PORT21_FN7), + + /* Port22 */ + PINMUX_DATA(LCDD22_MARK, PORT22_FN1), + PINMUX_DATA(SCIFB3_RXD_22_MARK, PORT22_FN3, MSEL3CR_09_0), + PINMUX_DATA(DU0_DB6_MARK, PORT22_FN7), + + /* Port23 */ + PINMUX_DATA(LCDD23_MARK, PORT23_FN1), + PINMUX_DATA(SCIFB3_SCK_23_MARK, PORT23_FN3), + PINMUX_DATA(DU0_DB7_MARK, PORT23_FN7), + + /* Port24 */ + PINMUX_DATA(LCDHSYN_MARK, PORT24_FN1), + PINMUX_DATA(LCDCS_MARK, PORT24_FN2), + PINMUX_DATA(SCIFB1_RTS_24_MARK, PORT24_FN3), + PINMUX_DATA(DU0_EXHSYNC_N_CSYNC_N_HSYNC_N_MARK, PORT24_FN7), + + /* Port25 */ + PINMUX_DATA(LCDVSYN_MARK, PORT25_FN1), + PINMUX_DATA(SCIFB1_CTS_25_MARK, PORT25_FN3, MSEL3CR_11_0), + PINMUX_DATA(DU0_EXVSYNC_N_VSYNC_N_CSYNC_N_MARK, PORT25_FN7), + + /* Port26 */ + PINMUX_DATA(LCDDCK_MARK, PORT26_FN1), + PINMUX_DATA(LCDWR_MARK, PORT26_FN2), + PINMUX_DATA(SCIFB1_TXD_26_MARK, PORT26_FN3, MSEL3CR_11_0), + PINMUX_DATA(DU0_DOTCLKIN_MARK, PORT26_FN7), + + /* Port27 */ + PINMUX_DATA(LCDDISP_MARK, PORT27_FN1), + PINMUX_DATA(LCDRS_MARK, PORT27_FN2), + PINMUX_DATA(SCIFB1_RXD_27_MARK, PORT27_FN3, MSEL3CR_11_0), + PINMUX_DATA(DU0_DOTCLKOUT_MARK, PORT27_FN7), + + /* Port28 */ + PINMUX_DATA(LCDRD_N_MARK, PORT28_FN1), + PINMUX_DATA(SCIFB1_SCK_28_MARK, PORT28_FN3), + PINMUX_DATA(DU0_DOTCLKOUTB_MARK, PORT28_FN7), + + /* Port29 */ + PINMUX_DATA(LCDLCLK_MARK, PORT29_FN1), + PINMUX_DATA(SF_IRQ_02_MARK, PORT29_FN4), + PINMUX_DATA(DU0_DISP_CSYNC_N_DE_MARK, PORT29_FN7), + + /* Port30 */ + PINMUX_DATA(LCDDON_MARK, PORT30_FN1), + PINMUX_DATA(SF_IRQ_03_MARK, PORT30_FN4), + PINMUX_DATA(DU0_ODDF_N_CLAMP_MARK, PORT30_FN7), + + /* Port32 */ + PINMUX_DATA(SCIFA0_RTS_MARK, PORT32_FN1), + PINMUX_DATA(SIM0_DET_MARK, PORT32_FN5), + PINMUX_DATA(CSCIF0_RTS_MARK, PORT32_FN7), + + /* Port33 */ + PINMUX_DATA(SCIFA0_CTS_MARK, PORT33_FN1), + PINMUX_DATA(SIM1_DET_MARK, PORT33_FN5), + PINMUX_DATA(CSCIF0_CTS_MARK, PORT33_FN7), + + /* Port34 */ + PINMUX_DATA(SCIFA0_SCK_MARK, PORT34_FN1), + PINMUX_DATA(SIM0_PWRON_MARK, PORT34_FN5), + PINMUX_DATA(CSCIF0_SCK_MARK, PORT34_FN7), + + /* Port35 */ + PINMUX_DATA(SCIFA1_RTS_MARK, PORT35_FN1), + PINMUX_DATA(CSCIF1_RTS_MARK, PORT35_FN7), + + /* Port36 */ + PINMUX_DATA(SCIFA1_CTS_MARK, PORT36_FN1), + PINMUX_DATA(CSCIF1_CTS_MARK, PORT36_FN7), + + /* Port37 */ + PINMUX_DATA(SCIFA1_SCK_MARK, PORT37_FN1), + PINMUX_DATA(CSCIF1_SCK_MARK, PORT37_FN7), + + /* Port38 */ + PINMUX_DATA(SCIFB0_RTS_MARK, PORT38_FN1), + PINMUX_DATA(TPU0TO1_MARK, PORT38_FN3), + PINMUX_DATA(SCIFB3_RTS_38_MARK, PORT38_FN4), + PINMUX_DATA(CHSCIF0_HRTS_MARK, PORT38_FN7), + + /* Port39 */ + PINMUX_DATA(SCIFB0_CTS_MARK, PORT39_FN1), + PINMUX_DATA(TPU0TO2_MARK, PORT39_FN3), + PINMUX_DATA(SCIFB3_CTS_39_MARK, PORT39_FN4, MSEL3CR_09_1), + PINMUX_DATA(CHSCIF0_HCTS_MARK, PORT39_FN7), + + /* Port40 */ + PINMUX_DATA(SCIFB0_SCK_MARK, PORT40_FN1), + PINMUX_DATA(TPU0TO3_MARK, PORT40_FN3), + PINMUX_DATA(SCIFB3_SCK_40_MARK, PORT40_FN4), + PINMUX_DATA(CHSCIF0_HSCK_MARK, PORT40_FN7), + + /* Port64 */ + PINMUX_DATA(PDM0_DATA_MARK, PORT64_FN1), + + /* Port65 */ + PINMUX_DATA(PDM1_DATA_MARK, PORT65_FN1), + + /* Port66 */ + PINMUX_DATA(HSI_RX_WAKE_MARK, PORT66_FN1), + PINMUX_DATA(SCIFB2_CTS_66_MARK, PORT66_FN2, MSEL3CR_10_0), + PINMUX_DATA(MSIOF3_SYNC_MARK, PORT66_FN3), + PINMUX_DATA(GenIO4_MARK, PORT66_FN5), + PINMUX_DATA(IRQ40_MARK, PORT66_FN0), + + /* Port67 */ + PINMUX_DATA(HSI_RX_READY_MARK, PORT67_FN1), + PINMUX_DATA(SCIFB1_TXD_67_MARK, PORT67_FN2, MSEL3CR_11_1), + PINMUX_DATA(GIO_OUT3_67_MARK, PORT67_FN5), + PINMUX_DATA(CHSCIF1_HTX_MARK, PORT67_FN7), + + /* Port68 */ + PINMUX_DATA(HSI_RX_FLAG_MARK, PORT68_FN1), + PINMUX_DATA(SCIFB2_TXD_68_MARK, PORT68_FN2, MSEL3CR_10_0), + PINMUX_DATA(MSIOF3_TXD_MARK, PORT68_FN3), + PINMUX_DATA(GIO_OUT4_68_MARK, PORT68_FN5), + + /* Port69 */ + PINMUX_DATA(HSI_RX_DATA_MARK, PORT69_FN1), + PINMUX_DATA(SCIFB2_RXD_69_MARK, PORT69_FN2, MSEL3CR_10_0), + PINMUX_DATA(MSIOF3_RXD_MARK, PORT69_FN3), + PINMUX_DATA(GIO_OUT5_69_MARK, PORT69_FN5), + + /* Port70 */ + PINMUX_DATA(HSI_TX_FLAG_MARK, PORT70_FN1), + PINMUX_DATA(SCIFB1_RTS_70_MARK, PORT70_FN2), + PINMUX_DATA(GIO_OUT1_70_MARK, PORT70_FN5), + PINMUX_DATA(HSIC_TSTCLK0_MARK, PORT70_FN6), + PINMUX_DATA(CHSCIF1_HRTS_MARK, PORT70_FN7), + + /* Port71 */ + PINMUX_DATA(HSI_TX_DATA_MARK, PORT71_FN1), + PINMUX_DATA(SCIFB1_CTS_71_MARK, PORT71_FN2, MSEL3CR_11_1), + PINMUX_DATA(GIO_OUT2_71_MARK, PORT71_FN5), + PINMUX_DATA(HSIC_TSTCLK1_MARK, PORT71_FN6), + PINMUX_DATA(CHSCIF1_HCTS_MARK, PORT71_FN7), + + /* Port72 */ + PINMUX_DATA(HSI_TX_WAKE_MARK, PORT72_FN1), + PINMUX_DATA(SCIFB1_RXD_72_MARK, PORT72_FN2, MSEL3CR_11_1), + PINMUX_DATA(GenIO8_MARK, PORT72_FN5), + PINMUX_DATA(CHSCIF1_HRX_MARK, PORT72_FN7), + + /* Port73 */ + PINMUX_DATA(HSI_TX_READY_MARK, PORT73_FN1), + PINMUX_DATA(SCIFB2_RTS_73_MARK, PORT73_FN2), + PINMUX_DATA(MSIOF3_SCK_MARK, PORT73_FN3), + PINMUX_DATA(GIO_OUT0_73_MARK, PORT73_FN5), + + /* Port74 - Port85 */ + PINMUX_DATA(IRDA_OUT_MARK, PORT74_FN1), + PINMUX_DATA(IRDA_IN_MARK, PORT75_FN1), + PINMUX_DATA(IRDA_FIRSEL_MARK, PORT76_FN1), + PINMUX_DATA(TPU0TO0_MARK, PORT77_FN1), + PINMUX_DATA(DIGRFEN_MARK, PORT78_FN1), + PINMUX_DATA(GPS_TIMESTAMP_MARK, PORT79_FN1), + PINMUX_DATA(TXP_MARK, PORT80_FN1), + PINMUX_DATA(TXP2_MARK, PORT81_FN1), + PINMUX_DATA(COEX_0_MARK, PORT82_FN1), + PINMUX_DATA(COEX_1_MARK, PORT83_FN1), + PINMUX_DATA(IRQ19_MARK, PORT84_FN0), + PINMUX_DATA(IRQ18_MARK, PORT85_FN0), + + /* Port96 - Port101 */ + PINMUX_DATA(KEYIN0_MARK, PORT96_FN1), + PINMUX_DATA(KEYIN1_MARK, PORT97_FN1), + PINMUX_DATA(KEYIN2_MARK, PORT98_FN1), + PINMUX_DATA(KEYIN3_MARK, PORT99_FN1), + PINMUX_DATA(KEYIN4_MARK, PORT100_FN1), + PINMUX_DATA(KEYIN5_MARK, PORT101_FN1), + + /* Port102 */ + PINMUX_DATA(KEYIN6_MARK, PORT102_FN1), + PINMUX_DATA(IRQ41_MARK, PORT102_FN0), + + /* Port103 */ + PINMUX_DATA(KEYIN7_MARK, PORT103_FN1), + PINMUX_DATA(IRQ42_MARK, PORT103_FN0), + + /* Port104 - Port108 */ + PINMUX_DATA(KEYOUT0_MARK, PORT104_FN2), + PINMUX_DATA(KEYOUT1_MARK, PORT105_FN2), + PINMUX_DATA(KEYOUT2_MARK, PORT106_FN2), + PINMUX_DATA(KEYOUT3_MARK, PORT107_FN2), + PINMUX_DATA(KEYOUT4_MARK, PORT108_FN2), + + /* Port109 */ + PINMUX_DATA(KEYOUT5_MARK, PORT109_FN2), + PINMUX_DATA(IRQ43_MARK, PORT109_FN0), + + /* Port110 */ + PINMUX_DATA(KEYOUT6_MARK, PORT110_FN2), + PINMUX_DATA(IRQ44_MARK, PORT110_FN0), + + /* Port111 */ + PINMUX_DATA(KEYOUT7_MARK, PORT111_FN2), + PINMUX_DATA(RFANAEN_MARK, PORT111_FN5), + PINMUX_DATA(IRQ45_MARK, PORT111_FN0), + + /* Port112 */ + PINMUX_DATA(KEYIN8_MARK, PORT112_FN1), + PINMUX_DATA(KEYOUT8_MARK, PORT112_FN2), + PINMUX_DATA(SF_IRQ_04_MARK, PORT112_FN4), + PINMUX_DATA(IRQ46_MARK, PORT112_FN0), + + /* Port113 */ + PINMUX_DATA(KEYIN9_MARK, PORT113_FN1), + PINMUX_DATA(KEYOUT9_MARK, PORT113_FN2), + PINMUX_DATA(SF_IRQ_05_MARK, PORT113_FN4), + PINMUX_DATA(IRQ47_MARK, PORT113_FN0), + + /* Port114 */ + PINMUX_DATA(KEYIN10_MARK, PORT114_FN1), + PINMUX_DATA(KEYOUT10_MARK, PORT114_FN2), + PINMUX_DATA(SF_IRQ_06_MARK, PORT114_FN4), + PINMUX_DATA(IRQ48_MARK, PORT114_FN0), + + /* Port115 */ + PINMUX_DATA(KEYIN11_MARK, PORT115_FN1), + PINMUX_DATA(KEYOUT11_MARK, PORT115_FN2), + PINMUX_DATA(SF_IRQ_07_MARK, PORT115_FN4), + PINMUX_DATA(IRQ49_MARK, PORT115_FN0), + + /* Port116 */ + PINMUX_DATA(SCIFA0_TXD_MARK, PORT116_FN1), + PINMUX_DATA(CSCIF0_TX_MARK, PORT116_FN7), + + /* Port117 */ + PINMUX_DATA(SCIFA0_RXD_MARK, PORT117_FN1), + PINMUX_DATA(CSCIF0_RX_MARK, PORT117_FN7), + + /* Port118 */ + PINMUX_DATA(SCIFA1_TXD_MARK, PORT118_FN1), + PINMUX_DATA(CSCIF1_TX_MARK, PORT118_FN7), + + /* Port119 */ + PINMUX_DATA(SCIFA1_RXD_MARK, PORT119_FN1), + PINMUX_DATA(CSCIF1_RX_MARK, PORT119_FN7), + + /* Port120 */ + PINMUX_DATA(SF_PORT_1_120_MARK, PORT120_FN3), + PINMUX_DATA(SCIFB3_RXD_120_MARK, PORT120_FN4, MSEL3CR_09_1), + PINMUX_DATA(DU0_CDE_MARK, PORT120_FN7), + + /* Port121 */ + PINMUX_DATA(SF_PORT_0_121_MARK, PORT121_FN3), + PINMUX_DATA(SCIFB3_TXD_121_MARK, PORT121_FN4, MSEL3CR_09_1), + + /* Port122 */ + PINMUX_DATA(SCIFB0_TXD_MARK, PORT122_FN1), + PINMUX_DATA(CHSCIF0_HTX_MARK, PORT122_FN7), + + /* Port123 */ + PINMUX_DATA(SCIFB0_RXD_MARK, PORT123_FN1), + PINMUX_DATA(CHSCIF0_HRX_MARK, PORT123_FN7), + + /* Port124 */ + PINMUX_DATA(ISP_STROBE_124_MARK, PORT124_FN3), + + /* Port125 */ + PINMUX_DATA(STP_ISD_0_MARK, PORT125_FN1), + PINMUX_DATA(PDM4_CLK_125_MARK, PORT125_FN2), + PINMUX_DATA(MSIOF2_TXD_MARK, PORT125_FN3), + PINMUX_DATA(SIM0_VOLTSEL0_MARK, PORT125_FN5), + + /* Port126 */ + PINMUX_DATA(TS_SDEN_MARK, PORT126_FN1), + PINMUX_DATA(MSIOF7_SYNC_MARK, PORT126_FN2), + PINMUX_DATA(STP_ISEN_1_MARK, PORT126_FN3), + + /* Port128 */ + PINMUX_DATA(STP_ISEN_0_MARK, PORT128_FN1), + PINMUX_DATA(PDM1_OUTDATA_128_MARK, PORT128_FN2), + PINMUX_DATA(MSIOF2_SYNC_MARK, PORT128_FN3), + PINMUX_DATA(SIM1_VOLTSEL1_MARK, PORT128_FN5), + + /* Port129 */ + PINMUX_DATA(TS_SPSYNC_MARK, PORT129_FN1), + PINMUX_DATA(MSIOF7_RXD_MARK, PORT129_FN2), + PINMUX_DATA(STP_ISSYNC_1_MARK, PORT129_FN3), + + /* Port130 */ + PINMUX_DATA(STP_ISSYNC_0_MARK, PORT130_FN1), + PINMUX_DATA(PDM4_DATA_130_MARK, PORT130_FN2, MSEL3CR_12_1), + PINMUX_DATA(MSIOF2_RXD_MARK, PORT130_FN3), + PINMUX_DATA(SIM0_VOLTSEL1_MARK, PORT130_FN5), + + /* Port131 */ + PINMUX_DATA(STP_OPWM_0_MARK, PORT131_FN1), + PINMUX_DATA(SIM1_PWRON_MARK, PORT131_FN5), + + /* Port132 */ + PINMUX_DATA(TS_SCK_MARK, PORT132_FN1), + PINMUX_DATA(MSIOF7_SCK_MARK, PORT132_FN2), + PINMUX_DATA(STP_ISCLK_1_MARK, PORT132_FN3), + + /* Port133 */ + PINMUX_DATA(STP_ISCLK_0_MARK, PORT133_FN1), + PINMUX_DATA(PDM1_OUTCLK_133_MARK, PORT133_FN2), + PINMUX_DATA(MSIOF2_SCK_MARK, PORT133_FN3), + PINMUX_DATA(SIM1_VOLTSEL0_MARK, PORT133_FN5), + + /* Port134 */ + PINMUX_DATA(TS_SDAT_MARK, PORT134_FN1), + PINMUX_DATA(MSIOF7_TXD_MARK, PORT134_FN2), + PINMUX_DATA(STP_ISD_1_MARK, PORT134_FN3), + + /* Port160 - Port178 */ + PINMUX_DATA(IRQ20_MARK, PORT160_FN0), + PINMUX_DATA(IRQ21_MARK, PORT161_FN0), + PINMUX_DATA(IRQ22_MARK, PORT162_FN0), + PINMUX_DATA(IRQ23_MARK, PORT163_FN0), + PINMUX_DATA(MMCD0_0_MARK, PORT164_FN1), + PINMUX_DATA(MMCD0_1_MARK, PORT165_FN1), + PINMUX_DATA(MMCD0_2_MARK, PORT166_FN1), + PINMUX_DATA(MMCD0_3_MARK, PORT167_FN1), + PINMUX_DATA(MMCD0_4_MARK, PORT168_FN1), + PINMUX_DATA(MMCD0_5_MARK, PORT169_FN1), + PINMUX_DATA(MMCD0_6_MARK, PORT170_FN1), + PINMUX_DATA(MMCD0_7_MARK, PORT171_FN1), + PINMUX_DATA(MMCCMD0_MARK, PORT172_FN1), + PINMUX_DATA(MMCCLK0_MARK, PORT173_FN1), + PINMUX_DATA(MMCRST_MARK, PORT174_FN1), + PINMUX_DATA(IRQ24_MARK, PORT175_FN0), + PINMUX_DATA(IRQ25_MARK, PORT176_FN0), + PINMUX_DATA(IRQ26_MARK, PORT177_FN0), + PINMUX_DATA(IRQ27_MARK, PORT178_FN0), + + /* Port192 - Port200 FN1 */ + PINMUX_DATA(A10_MARK, PORT192_FN1), + PINMUX_DATA(A9_MARK, PORT193_FN1), + PINMUX_DATA(A8_MARK, PORT194_FN1), + PINMUX_DATA(A7_MARK, PORT195_FN1), + PINMUX_DATA(A6_MARK, PORT196_FN1), + PINMUX_DATA(A5_MARK, PORT197_FN1), + PINMUX_DATA(A4_MARK, PORT198_FN1), + PINMUX_DATA(A3_MARK, PORT199_FN1), + PINMUX_DATA(A2_MARK, PORT200_FN1), + + /* Port192 - Port200 FN2 */ + PINMUX_DATA(MMCD1_7_MARK, PORT192_FN2), + PINMUX_DATA(MMCD1_6_MARK, PORT193_FN2), + PINMUX_DATA(MMCD1_5_MARK, PORT194_FN2), + PINMUX_DATA(MMCD1_4_MARK, PORT195_FN2), + PINMUX_DATA(MMCD1_3_MARK, PORT196_FN2), + PINMUX_DATA(MMCD1_2_MARK, PORT197_FN2), + PINMUX_DATA(MMCD1_1_MARK, PORT198_FN2), + PINMUX_DATA(MMCD1_0_MARK, PORT199_FN2), + PINMUX_DATA(MMCCMD1_MARK, PORT200_FN2), + + /* Port192 - Port200 IRQ */ + PINMUX_DATA(IRQ31_MARK, PORT192_FN0), + PINMUX_DATA(IRQ32_MARK, PORT193_FN0), + PINMUX_DATA(IRQ33_MARK, PORT194_FN0), + PINMUX_DATA(IRQ34_MARK, PORT195_FN0), + PINMUX_DATA(IRQ35_MARK, PORT196_FN0), + PINMUX_DATA(IRQ36_MARK, PORT197_FN0), + PINMUX_DATA(IRQ37_MARK, PORT198_FN0), + PINMUX_DATA(IRQ38_MARK, PORT199_FN0), + PINMUX_DATA(IRQ39_MARK, PORT200_FN0), + + /* Port201 */ + PINMUX_DATA(A1_MARK, PORT201_FN1), + + /* Port202 */ + PINMUX_DATA(A0_MARK, PORT202_FN1), + PINMUX_DATA(BS_MARK, PORT202_FN2), + + /* Port203 */ + PINMUX_DATA(CKO_MARK, PORT203_FN1), + PINMUX_DATA(MMCCLK1_MARK, PORT203_FN2), + + /* Port204 */ + PINMUX_DATA(CS0_N_MARK, PORT204_FN1), + PINMUX_DATA(SIM0_GPO1_MARK, PORT204_FN5), + + /* Port205 */ + PINMUX_DATA(CS2_N_MARK, PORT205_FN1), + PINMUX_DATA(SIM0_GPO2_MARK, PORT205_FN5), + + /* Port206 */ + PINMUX_DATA(CS4_N_MARK, PORT206_FN1), + PINMUX_DATA(VIO_VD_MARK, PORT206_FN2), + PINMUX_DATA(SIM1_GPO0_MARK, PORT206_FN5), + + /* Port207 - Port212 FN1 */ + PINMUX_DATA(D15_MARK, PORT207_FN1), + PINMUX_DATA(D14_MARK, PORT208_FN1), + PINMUX_DATA(D13_MARK, PORT209_FN1), + PINMUX_DATA(D12_MARK, PORT210_FN1), + PINMUX_DATA(D11_MARK, PORT211_FN1), + PINMUX_DATA(D10_MARK, PORT212_FN1), + + /* Port207 - Port212 FN5 */ + PINMUX_DATA(GIO_OUT15_MARK, PORT207_FN5), + PINMUX_DATA(GIO_OUT14_MARK, PORT208_FN5), + PINMUX_DATA(GIO_OUT13_MARK, PORT209_FN5), + PINMUX_DATA(GIO_OUT12_MARK, PORT210_FN5), + PINMUX_DATA(WGM_TXP2_MARK, PORT211_FN5), + PINMUX_DATA(WGM_GPS_TIMEM_ASK_RFCLK_MARK, PORT212_FN5), + + /* Port213 - Port222 FN1 */ + PINMUX_DATA(D9_MARK, PORT213_FN1), + PINMUX_DATA(D8_MARK, PORT214_FN1), + PINMUX_DATA(D7_MARK, PORT215_FN1), + PINMUX_DATA(D6_MARK, PORT216_FN1), + PINMUX_DATA(D5_MARK, PORT217_FN1), + PINMUX_DATA(D4_MARK, PORT218_FN1), + PINMUX_DATA(D3_MARK, PORT219_FN1), + PINMUX_DATA(D2_MARK, PORT220_FN1), + PINMUX_DATA(D1_MARK, PORT221_FN1), + PINMUX_DATA(D0_MARK, PORT222_FN1), + + /* Port213 - Port222 FN2 */ + PINMUX_DATA(VIO_D9_MARK, PORT213_FN2), + PINMUX_DATA(VIO_D8_MARK, PORT214_FN2), + PINMUX_DATA(VIO_D7_MARK, PORT215_FN2), + PINMUX_DATA(VIO_D6_MARK, PORT216_FN2), + PINMUX_DATA(VIO_D5_MARK, PORT217_FN2), + PINMUX_DATA(VIO_D4_MARK, PORT218_FN2), + PINMUX_DATA(VIO_D3_MARK, PORT219_FN2), + PINMUX_DATA(VIO_D2_MARK, PORT220_FN2), + PINMUX_DATA(VIO_D1_MARK, PORT221_FN2), + PINMUX_DATA(VIO_D0_MARK, PORT222_FN2), + + /* Port213 - Port222 FN5 */ + PINMUX_DATA(GIO_OUT9_MARK, PORT213_FN5), + PINMUX_DATA(GIO_OUT8_MARK, PORT214_FN5), + PINMUX_DATA(GIO_OUT7_MARK, PORT215_FN5), + PINMUX_DATA(GIO_OUT6_MARK, PORT216_FN5), + PINMUX_DATA(GIO_OUT5_217_MARK, PORT217_FN5), + PINMUX_DATA(GIO_OUT4_218_MARK, PORT218_FN5), + PINMUX_DATA(GIO_OUT3_219_MARK, PORT219_FN5), + PINMUX_DATA(GIO_OUT2_220_MARK, PORT220_FN5), + PINMUX_DATA(GIO_OUT1_221_MARK, PORT221_FN5), + PINMUX_DATA(GIO_OUT0_222_MARK, PORT222_FN5), + + /* Port224 */ + PINMUX_DATA(RDWR_224_MARK, PORT224_FN1), + PINMUX_DATA(VIO_HD_MARK, PORT224_FN2), + PINMUX_DATA(SIM1_GPO2_MARK, PORT224_FN5), + + /* Port225 */ + PINMUX_DATA(RD_N_MARK, PORT225_FN1), + + /* Port226 */ + PINMUX_DATA(WAIT_N_MARK, PORT226_FN1), + PINMUX_DATA(VIO_CLK_MARK, PORT226_FN2), + PINMUX_DATA(SIM1_GPO1_MARK, PORT226_FN5), + + /* Port227 */ + PINMUX_DATA(WE0_N_MARK, PORT227_FN1), + PINMUX_DATA(RDWR_227_MARK, PORT227_FN2), + + /* Port228 */ + PINMUX_DATA(WE1_N_MARK, PORT228_FN1), + PINMUX_DATA(SIM0_GPO0_MARK, PORT228_FN5), + + /* Port229 */ + PINMUX_DATA(PWMO_MARK, PORT229_FN1), + PINMUX_DATA(VIO_CKO1_229_MARK, PORT229_FN2), + + /* Port230 */ + PINMUX_DATA(SLIM_CLK_MARK, PORT230_FN1), + PINMUX_DATA(VIO_CKO4_230_MARK, PORT230_FN2), + + /* Port231 */ + PINMUX_DATA(SLIM_DATA_MARK, PORT231_FN1), + PINMUX_DATA(VIO_CKO5_231_MARK, PORT231_FN2), + + /* Port232 */ + PINMUX_DATA(VIO_CKO2_232_MARK, PORT232_FN2), + PINMUX_DATA(SF_PORT_0_232_MARK, PORT232_FN4), + + /* Port233 */ + PINMUX_DATA(VIO_CKO3_233_MARK, PORT233_FN2), + PINMUX_DATA(SF_PORT_1_233_MARK, PORT233_FN4), + + /* Port234 */ + PINMUX_DATA(FSIACK_MARK, PORT234_FN1), + PINMUX_DATA(PDM3_CLK_234_MARK, PORT234_FN2), + PINMUX_DATA(ISP_IRIS1_234_MARK, PORT234_FN3), + + /* Port235 */ + PINMUX_DATA(FSIAISLD_MARK, PORT235_FN1), + PINMUX_DATA(PDM3_DATA_235_MARK, PORT235_FN2, MSEL3CR_12_1), + + /* Port236 */ + PINMUX_DATA(FSIAOMC_MARK, PORT236_FN1), + PINMUX_DATA(PDM0_OUTCLK_236_MARK, PORT236_FN2), + PINMUX_DATA(ISP_IRIS0_236_MARK, PORT236_FN3), + + /* Port237 */ + PINMUX_DATA(FSIAOLR_MARK, PORT237_FN1), + PINMUX_DATA(FSIAILR_MARK, PORT237_FN2), + + /* Port238 */ + PINMUX_DATA(FSIAOBT_MARK, PORT238_FN1), + PINMUX_DATA(FSIAIBT_MARK, PORT238_FN2), + + /* Port239 */ + PINMUX_DATA(FSIAOSLD_MARK, PORT239_FN1), + PINMUX_DATA(PDM0_OUTDATA_239_MARK, PORT239_FN2), + + /* Port240 */ + PINMUX_DATA(FSIBISLD_MARK, PORT240_FN1), + + /* Port241 */ + PINMUX_DATA(FSIBOLR_MARK, PORT241_FN1), + PINMUX_DATA(FSIBILR_MARK, PORT241_FN2), + + /* Port242 */ + PINMUX_DATA(FSIBOMC_MARK, PORT242_FN1), + PINMUX_DATA(ISP_SHUTTER1_242_MARK, PORT242_FN3), + + /* Port243 */ + PINMUX_DATA(FSIBOBT_MARK, PORT243_FN1), + PINMUX_DATA(FSIBIBT_MARK, PORT243_FN2), + + /* Port244 */ + PINMUX_DATA(FSIBOSLD_MARK, PORT244_FN1), + PINMUX_DATA(FSIASPDIF_MARK, PORT244_FN2), + + /* Port245 */ + PINMUX_DATA(FSIBCK_MARK, PORT245_FN1), + PINMUX_DATA(ISP_SHUTTER0_245_MARK, PORT245_FN3), + + /* Port246 - Port250 FN1 */ + PINMUX_DATA(ISP_IRIS1_246_MARK, PORT246_FN1), + PINMUX_DATA(ISP_IRIS0_247_MARK, PORT247_FN1), + PINMUX_DATA(ISP_SHUTTER1_248_MARK, PORT248_FN1), + PINMUX_DATA(ISP_SHUTTER0_249_MARK, PORT249_FN1), + PINMUX_DATA(ISP_STROBE_250_MARK, PORT250_FN1), + + /* Port256 - Port258 */ + PINMUX_DATA(MSIOF0_SYNC_MARK, PORT256_FN1), + PINMUX_DATA(MSIOF0_RXD_MARK, PORT257_FN1), + PINMUX_DATA(MSIOF0_SCK_MARK, PORT258_FN1), + + /* Port259 */ + PINMUX_DATA(MSIOF0_SS2_MARK, PORT259_FN1), + PINMUX_DATA(VIO_CKO3_259_MARK, PORT259_FN3), + + /* Port260 */ + PINMUX_DATA(MSIOF0_TXD_MARK, PORT260_FN1), + + /* Port261 */ + PINMUX_DATA(SCIFB1_SCK_261_MARK, PORT261_FN2), + PINMUX_DATA(CHSCIF1_HSCK_MARK, PORT261_FN7), + + /* Port262 */ + PINMUX_DATA(SCIFB2_SCK_262_MARK, PORT262_FN2), + + /* Port263 - Port266 FN1 */ + PINMUX_DATA(MSIOF1_SS2_MARK, PORT263_FN1), + PINMUX_DATA(MSIOF1_TXD_MARK, PORT264_FN1), + PINMUX_DATA(MSIOF1_RXD_MARK, PORT265_FN1), + PINMUX_DATA(MSIOF1_SS1_MARK, PORT266_FN1), + + /* Port263 - Port266 FN4 */ + PINMUX_DATA(MSIOF5_SS2_MARK, PORT263_FN4), + PINMUX_DATA(MSIOF5_TXD_MARK, PORT264_FN4), + PINMUX_DATA(MSIOF5_RXD_MARK, PORT265_FN4), + PINMUX_DATA(MSIOF5_SS1_MARK, PORT266_FN4), + + /* Port267 */ + PINMUX_DATA(MSIOF0_SS1_MARK, PORT267_FN1), + + /* Port268 */ + PINMUX_DATA(MSIOF1_SCK_MARK, PORT268_FN1), + PINMUX_DATA(MSIOF5_SCK_MARK, PORT268_FN4), + + /* Port269 */ + PINMUX_DATA(MSIOF1_SYNC_MARK, PORT269_FN1), + PINMUX_DATA(MSIOF5_SYNC_MARK, PORT269_FN4), + + /* Port270 - Port273 FN1 */ + PINMUX_DATA(MSIOF2_SS1_MARK, PORT270_FN1), + PINMUX_DATA(MSIOF2_SS2_MARK, PORT271_FN1), + PINMUX_DATA(MSIOF3_SS2_MARK, PORT272_FN1), + PINMUX_DATA(MSIOF3_SS1_MARK, PORT273_FN1), + + /* Port270 - Port273 FN3 */ + PINMUX_DATA(VIO_CKO5_270_MARK, PORT270_FN3), + PINMUX_DATA(VIO_CKO2_271_MARK, PORT271_FN3), + PINMUX_DATA(VIO_CKO1_272_MARK, PORT272_FN3), + PINMUX_DATA(VIO_CKO4_273_MARK, PORT273_FN3), + + /* Port274 */ + PINMUX_DATA(MSIOF4_SS2_MARK, PORT274_FN1), + PINMUX_DATA(TPU1TO0_MARK, PORT274_FN4), + + /* Port275 - Port280 */ + PINMUX_DATA(IC_DP_MARK, PORT275_FN1), + PINMUX_DATA(SIM0_RST_MARK, PORT276_FN1), + PINMUX_DATA(IC_DM_MARK, PORT277_FN1), + PINMUX_DATA(SIM0_BSICOMP_MARK, PORT278_FN1), + PINMUX_DATA(SIM0_CLK_MARK, PORT279_FN1), + PINMUX_DATA(SIM0_IO_MARK, PORT280_FN1), + + /* Port281 */ + PINMUX_DATA(SIM1_IO_MARK, PORT281_FN1), + PINMUX_DATA(PDM2_DATA_281_MARK, PORT281_FN2, MSEL3CR_12_1), + + /* Port282 */ + PINMUX_DATA(SIM1_CLK_MARK, PORT282_FN1), + PINMUX_DATA(PDM2_CLK_282_MARK, PORT282_FN2), + + /* Port283 */ + PINMUX_DATA(SIM1_RST_MARK, PORT283_FN1), + + /* Port289 */ + PINMUX_DATA(SDHID1_0_MARK, PORT289_FN1), + PINMUX_DATA(STMDATA0_2_MARK, PORT289_FN3), + + /* Port290 */ + PINMUX_DATA(SDHID1_1_MARK, PORT290_FN1), + PINMUX_DATA(STMDATA1_2_MARK, PORT290_FN3), + PINMUX_DATA(IRQ51_MARK, PORT290_FN0), + + /* Port291 - Port294 FN1 */ + PINMUX_DATA(SDHID1_2_MARK, PORT291_FN1), + PINMUX_DATA(SDHID1_3_MARK, PORT292_FN1), + PINMUX_DATA(SDHICLK1_MARK, PORT293_FN1), + PINMUX_DATA(SDHICMD1_MARK, PORT294_FN1), + + /* Port291 - Port294 FN3 */ + PINMUX_DATA(STMDATA2_2_MARK, PORT291_FN3), + PINMUX_DATA(STMDATA3_2_MARK, PORT292_FN3), + PINMUX_DATA(STMCLK_2_MARK, PORT293_FN3), + PINMUX_DATA(STMSIDI_2_MARK, PORT294_FN3), + + /* Port295 */ + PINMUX_DATA(SDHID2_0_MARK, PORT295_FN1), + PINMUX_DATA(MSIOF4_TXD_MARK, PORT295_FN2), + PINMUX_DATA(SCIFB2_TXD_295_MARK, PORT295_FN3, MSEL3CR_10_1), + PINMUX_DATA(MSIOF6_TXD_MARK, PORT295_FN4), + + /* Port296 */ + PINMUX_DATA(SDHID2_1_MARK, PORT296_FN1), + PINMUX_DATA(MSIOF6_SS2_MARK, PORT296_FN4), + PINMUX_DATA(IRQ52_MARK, PORT296_FN0), + + /* Port297 - Port300 FN1 */ + PINMUX_DATA(SDHID2_2_MARK, PORT297_FN1), + PINMUX_DATA(SDHID2_3_MARK, PORT298_FN1), + PINMUX_DATA(SDHICLK2_MARK, PORT299_FN1), + PINMUX_DATA(SDHICMD2_MARK, PORT300_FN1), + + /* Port297 - Port300 FN2 */ + PINMUX_DATA(MSIOF4_RXD_MARK, PORT297_FN2), + PINMUX_DATA(MSIOF4_SYNC_MARK, PORT298_FN2), + PINMUX_DATA(MSIOF4_SCK_MARK, PORT299_FN2), + PINMUX_DATA(MSIOF4_SS1_MARK, PORT300_FN2), + + /* Port297 - Port300 FN3 */ + PINMUX_DATA(SCIFB2_RXD_297_MARK, PORT297_FN3, MSEL3CR_10_1), + PINMUX_DATA(SCIFB2_CTS_298_MARK, PORT298_FN3, MSEL3CR_10_1), + PINMUX_DATA(SCIFB2_SCK_299_MARK, PORT299_FN3), + PINMUX_DATA(SCIFB2_RTS_300_MARK, PORT300_FN3), + + /* Port297 - Port300 FN4 */ + PINMUX_DATA(MSIOF6_RXD_MARK, PORT297_FN4), + PINMUX_DATA(MSIOF6_SYNC_MARK, PORT298_FN4), + PINMUX_DATA(MSIOF6_SCK_MARK, PORT299_FN4), + PINMUX_DATA(MSIOF6_SS1_MARK, PORT300_FN4), + + /* Port301 */ + PINMUX_DATA(SDHICD0_MARK, PORT301_FN1), + PINMUX_DATA(IRQ50_MARK, PORT301_FN0), + + /* Port302 - Port306 FN1 */ + PINMUX_DATA(SDHID0_0_MARK, PORT302_FN1), + PINMUX_DATA(SDHID0_1_MARK, PORT303_FN1), + PINMUX_DATA(SDHID0_2_MARK, PORT304_FN1), + PINMUX_DATA(SDHID0_3_MARK, PORT305_FN1), + PINMUX_DATA(SDHICMD0_MARK, PORT306_FN1), + + /* Port302 - Port306 FN3 */ + PINMUX_DATA(STMDATA0_1_MARK, PORT302_FN3), + PINMUX_DATA(STMDATA1_1_MARK, PORT303_FN3), + PINMUX_DATA(STMDATA2_1_MARK, PORT304_FN3), + PINMUX_DATA(STMDATA3_1_MARK, PORT305_FN3), + PINMUX_DATA(STMSIDI_1_MARK, PORT306_FN3), + + /* Port307 */ + PINMUX_DATA(SDHIWP0_MARK, PORT307_FN1), + + /* Port308 */ + PINMUX_DATA(SDHICLK0_MARK, PORT308_FN1), + PINMUX_DATA(STMCLK_1_MARK, PORT308_FN3), + + /* Port320 - Port329 */ + PINMUX_DATA(IRQ16_MARK, PORT320_FN0), + PINMUX_DATA(IRQ17_MARK, PORT321_FN0), + PINMUX_DATA(IRQ28_MARK, PORT322_FN0), + PINMUX_DATA(IRQ29_MARK, PORT323_FN0), + PINMUX_DATA(IRQ30_MARK, PORT324_FN0), + PINMUX_DATA(IRQ53_MARK, PORT325_FN0), + PINMUX_DATA(IRQ54_MARK, PORT326_FN0), + PINMUX_DATA(IRQ55_MARK, PORT327_FN0), + PINMUX_DATA(IRQ56_MARK, PORT328_FN0), + PINMUX_DATA(IRQ57_MARK, PORT329_FN0), +}; + +#define R8A73A4_PIN(pin, cfgs) \ + { \ + .name = __stringify(PORT##pin), \ + .enum_id = PORT##pin##_DATA, \ + .configs = cfgs, \ + } + +#define __O (SH_PFC_PIN_CFG_OUTPUT) +#define __IO (SH_PFC_PIN_CFG_INPUT | SH_PFC_PIN_CFG_OUTPUT) +#define __PUD (SH_PFC_PIN_CFG_PULL_DOWN | SH_PFC_PIN_CFG_PULL_UP) + +#define R8A73A4_PIN_IO_PU_PD(pin) R8A73A4_PIN(pin, __IO | __PUD) +#define R8A73A4_PIN_O(pin) R8A73A4_PIN(pin, __O) + +static struct sh_pfc_pin pinmux_pins[] = { + R8A73A4_PIN_IO_PU_PD(0), R8A73A4_PIN_IO_PU_PD(1), + R8A73A4_PIN_IO_PU_PD(2), R8A73A4_PIN_IO_PU_PD(3), + R8A73A4_PIN_IO_PU_PD(4), R8A73A4_PIN_IO_PU_PD(5), + R8A73A4_PIN_IO_PU_PD(6), R8A73A4_PIN_IO_PU_PD(7), + R8A73A4_PIN_IO_PU_PD(8), R8A73A4_PIN_IO_PU_PD(9), + R8A73A4_PIN_IO_PU_PD(10), R8A73A4_PIN_IO_PU_PD(11), + R8A73A4_PIN_IO_PU_PD(12), R8A73A4_PIN_IO_PU_PD(13), + R8A73A4_PIN_IO_PU_PD(14), R8A73A4_PIN_IO_PU_PD(15), + R8A73A4_PIN_IO_PU_PD(16), R8A73A4_PIN_IO_PU_PD(17), + R8A73A4_PIN_IO_PU_PD(18), R8A73A4_PIN_IO_PU_PD(19), + R8A73A4_PIN_IO_PU_PD(20), R8A73A4_PIN_IO_PU_PD(21), + R8A73A4_PIN_IO_PU_PD(22), R8A73A4_PIN_IO_PU_PD(23), + R8A73A4_PIN_IO_PU_PD(24), R8A73A4_PIN_IO_PU_PD(25), + R8A73A4_PIN_IO_PU_PD(26), R8A73A4_PIN_IO_PU_PD(27), + R8A73A4_PIN_IO_PU_PD(28), R8A73A4_PIN_IO_PU_PD(29), + R8A73A4_PIN_IO_PU_PD(30), + R8A73A4_PIN_IO_PU_PD(32), R8A73A4_PIN_IO_PU_PD(33), + R8A73A4_PIN_IO_PU_PD(34), R8A73A4_PIN_IO_PU_PD(35), + R8A73A4_PIN_IO_PU_PD(36), R8A73A4_PIN_IO_PU_PD(37), + R8A73A4_PIN_IO_PU_PD(38), R8A73A4_PIN_IO_PU_PD(39), + R8A73A4_PIN_IO_PU_PD(40), + R8A73A4_PIN_IO_PU_PD(64), R8A73A4_PIN_IO_PU_PD(65), + R8A73A4_PIN_IO_PU_PD(66), R8A73A4_PIN_IO_PU_PD(67), + R8A73A4_PIN_IO_PU_PD(68), R8A73A4_PIN_IO_PU_PD(69), + R8A73A4_PIN_IO_PU_PD(70), R8A73A4_PIN_IO_PU_PD(71), + R8A73A4_PIN_IO_PU_PD(72), R8A73A4_PIN_IO_PU_PD(73), + R8A73A4_PIN_O(74), R8A73A4_PIN_IO_PU_PD(75), + R8A73A4_PIN_IO_PU_PD(76), R8A73A4_PIN_IO_PU_PD(77), + R8A73A4_PIN_IO_PU_PD(78), R8A73A4_PIN_IO_PU_PD(79), + R8A73A4_PIN_IO_PU_PD(80), R8A73A4_PIN_IO_PU_PD(81), + R8A73A4_PIN_IO_PU_PD(82), R8A73A4_PIN_IO_PU_PD(83), + R8A73A4_PIN_IO_PU_PD(84), R8A73A4_PIN_IO_PU_PD(85), + R8A73A4_PIN_IO_PU_PD(96), R8A73A4_PIN_IO_PU_PD(97), + R8A73A4_PIN_IO_PU_PD(98), R8A73A4_PIN_IO_PU_PD(99), + R8A73A4_PIN_IO_PU_PD(100), R8A73A4_PIN_IO_PU_PD(101), + R8A73A4_PIN_IO_PU_PD(102), R8A73A4_PIN_IO_PU_PD(103), + R8A73A4_PIN_IO_PU_PD(104), R8A73A4_PIN_IO_PU_PD(105), + R8A73A4_PIN_IO_PU_PD(106), R8A73A4_PIN_IO_PU_PD(107), + R8A73A4_PIN_IO_PU_PD(108), R8A73A4_PIN_IO_PU_PD(109), + R8A73A4_PIN_IO_PU_PD(110), R8A73A4_PIN_IO_PU_PD(111), + R8A73A4_PIN_IO_PU_PD(112), R8A73A4_PIN_IO_PU_PD(113), + R8A73A4_PIN_IO_PU_PD(114), R8A73A4_PIN_IO_PU_PD(115), + R8A73A4_PIN_IO_PU_PD(116), R8A73A4_PIN_IO_PU_PD(117), + R8A73A4_PIN_IO_PU_PD(118), R8A73A4_PIN_IO_PU_PD(119), + R8A73A4_PIN_IO_PU_PD(120), R8A73A4_PIN_IO_PU_PD(121), + R8A73A4_PIN_IO_PU_PD(122), R8A73A4_PIN_IO_PU_PD(123), + R8A73A4_PIN_IO_PU_PD(124), R8A73A4_PIN_IO_PU_PD(125), + R8A73A4_PIN_IO_PU_PD(126), + R8A73A4_PIN_IO_PU_PD(128), R8A73A4_PIN_IO_PU_PD(129), + R8A73A4_PIN_IO_PU_PD(130), R8A73A4_PIN_IO_PU_PD(131), + R8A73A4_PIN_IO_PU_PD(132), R8A73A4_PIN_IO_PU_PD(133), + R8A73A4_PIN_IO_PU_PD(134), + R8A73A4_PIN_IO_PU_PD(160), R8A73A4_PIN_IO_PU_PD(161), + R8A73A4_PIN_IO_PU_PD(162), R8A73A4_PIN_IO_PU_PD(163), + R8A73A4_PIN_IO_PU_PD(164), R8A73A4_PIN_IO_PU_PD(165), + R8A73A4_PIN_IO_PU_PD(166), R8A73A4_PIN_IO_PU_PD(167), + R8A73A4_PIN_IO_PU_PD(168), R8A73A4_PIN_IO_PU_PD(169), + R8A73A4_PIN_IO_PU_PD(170), R8A73A4_PIN_IO_PU_PD(171), + R8A73A4_PIN_IO_PU_PD(172), R8A73A4_PIN_IO_PU_PD(173), + R8A73A4_PIN_IO_PU_PD(174), R8A73A4_PIN_IO_PU_PD(175), + R8A73A4_PIN_IO_PU_PD(176), R8A73A4_PIN_IO_PU_PD(177), + R8A73A4_PIN_IO_PU_PD(178), + R8A73A4_PIN_IO_PU_PD(192), R8A73A4_PIN_IO_PU_PD(193), + R8A73A4_PIN_IO_PU_PD(194), R8A73A4_PIN_IO_PU_PD(195), + R8A73A4_PIN_IO_PU_PD(196), R8A73A4_PIN_IO_PU_PD(197), + R8A73A4_PIN_IO_PU_PD(198), R8A73A4_PIN_IO_PU_PD(199), + R8A73A4_PIN_IO_PU_PD(200), R8A73A4_PIN_IO_PU_PD(201), + R8A73A4_PIN_IO_PU_PD(202), R8A73A4_PIN_IO_PU_PD(203), + R8A73A4_PIN_IO_PU_PD(204), R8A73A4_PIN_IO_PU_PD(205), + R8A73A4_PIN_IO_PU_PD(206), R8A73A4_PIN_IO_PU_PD(207), + R8A73A4_PIN_IO_PU_PD(208), R8A73A4_PIN_IO_PU_PD(209), + R8A73A4_PIN_IO_PU_PD(210), R8A73A4_PIN_IO_PU_PD(211), + R8A73A4_PIN_IO_PU_PD(212), R8A73A4_PIN_IO_PU_PD(213), + R8A73A4_PIN_IO_PU_PD(214), R8A73A4_PIN_IO_PU_PD(215), + R8A73A4_PIN_IO_PU_PD(216), R8A73A4_PIN_IO_PU_PD(217), + R8A73A4_PIN_IO_PU_PD(218), R8A73A4_PIN_IO_PU_PD(219), + R8A73A4_PIN_IO_PU_PD(220), R8A73A4_PIN_IO_PU_PD(221), + R8A73A4_PIN_IO_PU_PD(222), + R8A73A4_PIN_IO_PU_PD(224), R8A73A4_PIN_IO_PU_PD(225), + R8A73A4_PIN_IO_PU_PD(226), R8A73A4_PIN_IO_PU_PD(227), + R8A73A4_PIN_IO_PU_PD(228), R8A73A4_PIN_IO_PU_PD(229), + R8A73A4_PIN_IO_PU_PD(230), R8A73A4_PIN_IO_PU_PD(231), + R8A73A4_PIN_IO_PU_PD(232), R8A73A4_PIN_IO_PU_PD(233), + R8A73A4_PIN_IO_PU_PD(234), R8A73A4_PIN_IO_PU_PD(235), + R8A73A4_PIN_IO_PU_PD(236), R8A73A4_PIN_IO_PU_PD(237), + R8A73A4_PIN_IO_PU_PD(238), R8A73A4_PIN_IO_PU_PD(239), + R8A73A4_PIN_IO_PU_PD(240), R8A73A4_PIN_IO_PU_PD(241), + R8A73A4_PIN_IO_PU_PD(242), R8A73A4_PIN_IO_PU_PD(243), + R8A73A4_PIN_IO_PU_PD(244), R8A73A4_PIN_IO_PU_PD(245), + R8A73A4_PIN_IO_PU_PD(246), R8A73A4_PIN_IO_PU_PD(247), + R8A73A4_PIN_IO_PU_PD(248), R8A73A4_PIN_IO_PU_PD(249), + R8A73A4_PIN_IO_PU_PD(250), + R8A73A4_PIN_IO_PU_PD(256), R8A73A4_PIN_IO_PU_PD(257), + R8A73A4_PIN_IO_PU_PD(258), R8A73A4_PIN_IO_PU_PD(259), + R8A73A4_PIN_IO_PU_PD(260), R8A73A4_PIN_IO_PU_PD(261), + R8A73A4_PIN_IO_PU_PD(262), R8A73A4_PIN_IO_PU_PD(263), + R8A73A4_PIN_IO_PU_PD(264), R8A73A4_PIN_IO_PU_PD(265), + R8A73A4_PIN_IO_PU_PD(266), R8A73A4_PIN_IO_PU_PD(267), + R8A73A4_PIN_IO_PU_PD(268), R8A73A4_PIN_IO_PU_PD(269), + R8A73A4_PIN_IO_PU_PD(270), R8A73A4_PIN_IO_PU_PD(271), + R8A73A4_PIN_IO_PU_PD(272), R8A73A4_PIN_IO_PU_PD(273), + R8A73A4_PIN_IO_PU_PD(274), R8A73A4_PIN_IO_PU_PD(275), + R8A73A4_PIN_IO_PU_PD(276), R8A73A4_PIN_IO_PU_PD(277), + R8A73A4_PIN_IO_PU_PD(278), R8A73A4_PIN_IO_PU_PD(279), + R8A73A4_PIN_IO_PU_PD(280), R8A73A4_PIN_IO_PU_PD(281), + R8A73A4_PIN_IO_PU_PD(282), R8A73A4_PIN_IO_PU_PD(283), + R8A73A4_PIN_O(288), R8A73A4_PIN_IO_PU_PD(289), + R8A73A4_PIN_IO_PU_PD(290), R8A73A4_PIN_IO_PU_PD(291), + R8A73A4_PIN_IO_PU_PD(292), R8A73A4_PIN_IO_PU_PD(293), + R8A73A4_PIN_IO_PU_PD(294), R8A73A4_PIN_IO_PU_PD(295), + R8A73A4_PIN_IO_PU_PD(296), R8A73A4_PIN_IO_PU_PD(297), + R8A73A4_PIN_IO_PU_PD(298), R8A73A4_PIN_IO_PU_PD(299), + R8A73A4_PIN_IO_PU_PD(300), R8A73A4_PIN_IO_PU_PD(301), + R8A73A4_PIN_IO_PU_PD(302), R8A73A4_PIN_IO_PU_PD(303), + R8A73A4_PIN_IO_PU_PD(304), R8A73A4_PIN_IO_PU_PD(305), + R8A73A4_PIN_IO_PU_PD(306), R8A73A4_PIN_IO_PU_PD(307), + R8A73A4_PIN_IO_PU_PD(308), + R8A73A4_PIN_IO_PU_PD(320), R8A73A4_PIN_IO_PU_PD(321), + R8A73A4_PIN_IO_PU_PD(322), R8A73A4_PIN_IO_PU_PD(323), + R8A73A4_PIN_IO_PU_PD(324), R8A73A4_PIN_IO_PU_PD(325), + R8A73A4_PIN_IO_PU_PD(326), R8A73A4_PIN_IO_PU_PD(327), + R8A73A4_PIN_IO_PU_PD(328), R8A73A4_PIN_IO_PU_PD(329), +}; + +static const struct pinmux_range pinmux_ranges[] = { + {.begin = 0, .end = 30,}, + {.begin = 32, .end = 40,}, + {.begin = 64, .end = 85,}, + {.begin = 96, .end = 126,}, + {.begin = 128, .end = 134,}, + {.begin = 160, .end = 178,}, + {.begin = 192, .end = 222,}, + {.begin = 224, .end = 250,}, + {.begin = 256, .end = 283,}, + {.begin = 288, .end = 308,}, + {.begin = 320, .end = 329,}, +}; + +/* - IRQC ------------------------------------------------------------------- */ +#define IRQC_PINS_MUX(pin, irq_mark) \ +static const unsigned int irqc_irq##irq_mark##_pins[] = { \ + pin, \ +}; \ +static const unsigned int irqc_irq##irq_mark##_mux[] = { \ + IRQ##irq_mark##_MARK, \ +} +IRQC_PINS_MUX(0, 0); +IRQC_PINS_MUX(1, 1); +IRQC_PINS_MUX(2, 2); +IRQC_PINS_MUX(3, 3); +IRQC_PINS_MUX(4, 4); +IRQC_PINS_MUX(5, 5); +IRQC_PINS_MUX(6, 6); +IRQC_PINS_MUX(7, 7); +IRQC_PINS_MUX(8, 8); +IRQC_PINS_MUX(9, 9); +IRQC_PINS_MUX(10, 10); +IRQC_PINS_MUX(11, 11); +IRQC_PINS_MUX(12, 12); +IRQC_PINS_MUX(13, 13); +IRQC_PINS_MUX(14, 14); +IRQC_PINS_MUX(15, 15); +IRQC_PINS_MUX(66, 40); +IRQC_PINS_MUX(84, 19); +IRQC_PINS_MUX(85, 18); +IRQC_PINS_MUX(102, 41); +IRQC_PINS_MUX(103, 42); +IRQC_PINS_MUX(109, 43); +IRQC_PINS_MUX(110, 44); +IRQC_PINS_MUX(111, 45); +IRQC_PINS_MUX(112, 46); +IRQC_PINS_MUX(113, 47); +IRQC_PINS_MUX(114, 48); +IRQC_PINS_MUX(115, 49); +IRQC_PINS_MUX(160, 20); +IRQC_PINS_MUX(161, 21); +IRQC_PINS_MUX(162, 22); +IRQC_PINS_MUX(163, 23); +IRQC_PINS_MUX(175, 24); +IRQC_PINS_MUX(176, 25); +IRQC_PINS_MUX(177, 26); +IRQC_PINS_MUX(178, 27); +IRQC_PINS_MUX(192, 31); +IRQC_PINS_MUX(193, 32); +IRQC_PINS_MUX(194, 33); +IRQC_PINS_MUX(195, 34); +IRQC_PINS_MUX(196, 35); +IRQC_PINS_MUX(197, 36); +IRQC_PINS_MUX(198, 37); +IRQC_PINS_MUX(199, 38); +IRQC_PINS_MUX(200, 39); +IRQC_PINS_MUX(290, 51); +IRQC_PINS_MUX(296, 52); +IRQC_PINS_MUX(301, 50); +IRQC_PINS_MUX(320, 16); +IRQC_PINS_MUX(321, 17); +IRQC_PINS_MUX(322, 28); +IRQC_PINS_MUX(323, 29); +IRQC_PINS_MUX(324, 30); +IRQC_PINS_MUX(325, 53); +IRQC_PINS_MUX(326, 54); +IRQC_PINS_MUX(327, 55); +IRQC_PINS_MUX(328, 56); +IRQC_PINS_MUX(329, 57); +/* - SCIFA0 ----------------------------------------------------------------- */ +static const unsigned int scifa0_data_pins[] = { + /* SCIFA0_RXD, SCIFA0_TXD */ + 117, 116, +}; +static const unsigned int scifa0_data_mux[] = { + SCIFA0_RXD_MARK, SCIFA0_TXD_MARK, +}; +static const unsigned int scifa0_clk_pins[] = { + /* SCIFA0_SCK */ + 34, +}; +static const unsigned int scifa0_clk_mux[] = { + SCIFA0_SCK_MARK, +}; +static const unsigned int scifa0_ctrl_pins[] = { + /* SCIFA0_RTS, SCIFA0_CTS */ + 32, 33, +}; +static const unsigned int scifa0_ctrl_mux[] = { + SCIFA0_RTS_MARK, SCIFA0_CTS_MARK, +}; +/* - SCIFA1 ----------------------------------------------------------------- */ +static const unsigned int scifa1_data_pins[] = { + /* SCIFA1_RXD, SCIFA1_TXD */ + 119, 118, +}; +static const unsigned int scifa1_data_mux[] = { + SCIFA1_RXD_MARK, SCIFA1_TXD_MARK, +}; +static const unsigned int scifa1_clk_pins[] = { + /* SCIFA1_SCK */ + 37, +}; +static const unsigned int scifa1_clk_mux[] = { + SCIFA1_SCK_MARK, +}; +static const unsigned int scifa1_ctrl_pins[] = { + /* SCIFA1_RTS, SCIFA1_CTS */ + 35, 36, +}; +static const unsigned int scifa1_ctrl_mux[] = { + SCIFA1_RTS_MARK, SCIFA1_CTS_MARK, +}; +/* - SCIFB0 ----------------------------------------------------------------- */ +static const unsigned int scifb0_data_pins[] = { + /* SCIFB0_RXD, SCIFB0_TXD */ + 123, 122, +}; +static const unsigned int scifb0_data_mux[] = { + SCIFB0_RXD_MARK, SCIFB0_TXD_MARK, +}; +static const unsigned int scifb0_clk_pins[] = { + /* SCIFB0_SCK */ + 40, +}; +static const unsigned int scifb0_clk_mux[] = { + SCIFB0_SCK_MARK, +}; +static const unsigned int scifb0_ctrl_pins[] = { + /* SCIFB0_RTS, SCIFB0_CTS */ + 38, 39, +}; +static const unsigned int scifb0_ctrl_mux[] = { + SCIFB0_RTS_MARK, SCIFB0_CTS_MARK, +}; +/* - SCIFB1 ----------------------------------------------------------------- */ +static const unsigned int scifb1_data_pins[] = { + /* SCIFB1_RXD, SCIFB1_TXD */ + 27, 26, +}; +static const unsigned int scifb1_data_mux[] = { + SCIFB1_RXD_27_MARK, SCIFB1_TXD_26_MARK, +}; +static const unsigned int scifb1_clk_pins[] = { + /* SCIFB1_SCK */ + 28, +}; +static const unsigned int scifb1_clk_mux[] = { + SCIFB1_SCK_28_MARK, +}; +static const unsigned int scifb1_ctrl_pins[] = { + /* SCIFB1_RTS, SCIFB1_CTS */ + 24, 25, +}; +static const unsigned int scifb1_ctrl_mux[] = { + SCIFB1_RTS_24_MARK, SCIFB1_CTS_25_MARK, +}; +static const unsigned int scifb1_data_b_pins[] = { + /* SCIFB1_RXD, SCIFB1_TXD */ + 72, 67, +}; +static const unsigned int scifb1_data_b_mux[] = { + SCIFB1_RXD_72_MARK, SCIFB1_TXD_67_MARK, +}; +static const unsigned int scifb1_clk_b_pins[] = { + /* SCIFB1_SCK */ + 261, +}; +static const unsigned int scifb1_clk_b_mux[] = { + SCIFB1_SCK_261_MARK, +}; +static const unsigned int scifb1_ctrl_b_pins[] = { + /* SCIFB1_RTS, SCIFB1_CTS */ + 70, 71, +}; +static const unsigned int scifb1_ctrl_b_mux[] = { + SCIFB1_RTS_70_MARK, SCIFB1_CTS_71_MARK, +}; +/* - SCIFB2 ----------------------------------------------------------------- */ +static const unsigned int scifb2_data_pins[] = { + /* SCIFB2_RXD, SCIFB2_TXD */ + 69, 68, +}; +static const unsigned int scifb2_data_mux[] = { + SCIFB2_RXD_69_MARK, SCIFB2_TXD_68_MARK, +}; +static const unsigned int scifb2_clk_pins[] = { + /* SCIFB2_SCK */ + 262, +}; +static const unsigned int scifb2_clk_mux[] = { + SCIFB2_SCK_262_MARK, +}; +static const unsigned int scifb2_ctrl_pins[] = { + /* SCIFB2_RTS, SCIFB2_CTS */ + 73, 66, +}; +static const unsigned int scifb2_ctrl_mux[] = { + SCIFB2_RTS_73_MARK, SCIFB2_CTS_66_MARK, +}; +static const unsigned int scifb2_data_b_pins[] = { + /* SCIFB2_RXD, SCIFB2_TXD */ + 297, 295, +}; +static const unsigned int scifb2_data_b_mux[] = { + SCIFB2_RXD_297_MARK, SCIFB2_TXD_295_MARK, +}; +static const unsigned int scifb2_clk_b_pins[] = { + /* SCIFB2_SCK */ + 299, +}; +static const unsigned int scifb2_clk_b_mux[] = { + SCIFB2_SCK_299_MARK, +}; +static const unsigned int scifb2_ctrl_b_pins[] = { + /* SCIFB2_RTS, SCIFB2_CTS */ + 300, 298, +}; +static const unsigned int scifb2_ctrl_b_mux[] = { + SCIFB2_RTS_300_MARK, SCIFB2_CTS_298_MARK, +}; +/* - SCIFB3 ----------------------------------------------------------------- */ +static const unsigned int scifb3_data_pins[] = { + /* SCIFB3_RXD, SCIFB3_TXD */ + 22, 21, +}; +static const unsigned int scifb3_data_mux[] = { + SCIFB3_RXD_22_MARK, SCIFB3_TXD_21_MARK, +}; +static const unsigned int scifb3_clk_pins[] = { + /* SCIFB3_SCK */ + 23, +}; +static const unsigned int scifb3_clk_mux[] = { + SCIFB3_SCK_23_MARK, +}; +static const unsigned int scifb3_ctrl_pins[] = { + /* SCIFB3_RTS, SCIFB3_CTS */ + 19, 20, +}; +static const unsigned int scifb3_ctrl_mux[] = { + SCIFB3_RTS_19_MARK, SCIFB3_CTS_20_MARK, +}; +static const unsigned int scifb3_data_b_pins[] = { + /* SCIFB3_RXD, SCIFB3_TXD */ + 120, 121, +}; +static const unsigned int scifb3_data_b_mux[] = { + SCIFB3_RXD_120_MARK, SCIFB3_TXD_121_MARK, +}; +static const unsigned int scifb3_clk_b_pins[] = { + /* SCIFB3_SCK */ + 40, +}; +static const unsigned int scifb3_clk_b_mux[] = { + SCIFB3_SCK_40_MARK, +}; +static const unsigned int scifb3_ctrl_b_pins[] = { + /* SCIFB3_RTS, SCIFB3_CTS */ + 38, 39, +}; +static const unsigned int scifb3_ctrl_b_mux[] = { + SCIFB3_RTS_38_MARK, SCIFB3_CTS_39_MARK, +}; + +static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(irqc_irq0), + SH_PFC_PIN_GROUP(irqc_irq1), + SH_PFC_PIN_GROUP(irqc_irq2), + SH_PFC_PIN_GROUP(irqc_irq3), + SH_PFC_PIN_GROUP(irqc_irq4), + SH_PFC_PIN_GROUP(irqc_irq5), + SH_PFC_PIN_GROUP(irqc_irq6), + SH_PFC_PIN_GROUP(irqc_irq7), + SH_PFC_PIN_GROUP(irqc_irq8), + SH_PFC_PIN_GROUP(irqc_irq9), + SH_PFC_PIN_GROUP(irqc_irq10), + SH_PFC_PIN_GROUP(irqc_irq11), + SH_PFC_PIN_GROUP(irqc_irq12), + SH_PFC_PIN_GROUP(irqc_irq13), + SH_PFC_PIN_GROUP(irqc_irq14), + SH_PFC_PIN_GROUP(irqc_irq15), + SH_PFC_PIN_GROUP(irqc_irq16), + SH_PFC_PIN_GROUP(irqc_irq17), + SH_PFC_PIN_GROUP(irqc_irq18), + SH_PFC_PIN_GROUP(irqc_irq19), + SH_PFC_PIN_GROUP(irqc_irq20), + SH_PFC_PIN_GROUP(irqc_irq21), + SH_PFC_PIN_GROUP(irqc_irq22), + SH_PFC_PIN_GROUP(irqc_irq23), + SH_PFC_PIN_GROUP(irqc_irq24), + SH_PFC_PIN_GROUP(irqc_irq25), + SH_PFC_PIN_GROUP(irqc_irq26), + SH_PFC_PIN_GROUP(irqc_irq27), + SH_PFC_PIN_GROUP(irqc_irq28), + SH_PFC_PIN_GROUP(irqc_irq29), + SH_PFC_PIN_GROUP(irqc_irq30), + SH_PFC_PIN_GROUP(irqc_irq31), + SH_PFC_PIN_GROUP(irqc_irq32), + SH_PFC_PIN_GROUP(irqc_irq33), + SH_PFC_PIN_GROUP(irqc_irq34), + SH_PFC_PIN_GROUP(irqc_irq35), + SH_PFC_PIN_GROUP(irqc_irq36), + SH_PFC_PIN_GROUP(irqc_irq37), + SH_PFC_PIN_GROUP(irqc_irq38), + SH_PFC_PIN_GROUP(irqc_irq39), + SH_PFC_PIN_GROUP(irqc_irq40), + SH_PFC_PIN_GROUP(irqc_irq41), + SH_PFC_PIN_GROUP(irqc_irq42), + SH_PFC_PIN_GROUP(irqc_irq43), + SH_PFC_PIN_GROUP(irqc_irq44), + SH_PFC_PIN_GROUP(irqc_irq45), + SH_PFC_PIN_GROUP(irqc_irq46), + SH_PFC_PIN_GROUP(irqc_irq47), + SH_PFC_PIN_GROUP(irqc_irq48), + SH_PFC_PIN_GROUP(irqc_irq49), + SH_PFC_PIN_GROUP(irqc_irq50), + SH_PFC_PIN_GROUP(irqc_irq51), + SH_PFC_PIN_GROUP(irqc_irq52), + SH_PFC_PIN_GROUP(irqc_irq53), + SH_PFC_PIN_GROUP(irqc_irq54), + SH_PFC_PIN_GROUP(irqc_irq55), + SH_PFC_PIN_GROUP(irqc_irq56), + SH_PFC_PIN_GROUP(irqc_irq57), + SH_PFC_PIN_GROUP(scifa0_data), + SH_PFC_PIN_GROUP(scifa0_clk), + SH_PFC_PIN_GROUP(scifa0_ctrl), + SH_PFC_PIN_GROUP(scifa1_data), + SH_PFC_PIN_GROUP(scifa1_clk), + SH_PFC_PIN_GROUP(scifa1_ctrl), + SH_PFC_PIN_GROUP(scifb0_data), + SH_PFC_PIN_GROUP(scifb0_clk), + SH_PFC_PIN_GROUP(scifb0_ctrl), + SH_PFC_PIN_GROUP(scifb1_data), + SH_PFC_PIN_GROUP(scifb1_clk), + SH_PFC_PIN_GROUP(scifb1_ctrl), + SH_PFC_PIN_GROUP(scifb1_data_b), + SH_PFC_PIN_GROUP(scifb1_clk_b), + SH_PFC_PIN_GROUP(scifb1_ctrl_b), + SH_PFC_PIN_GROUP(scifb2_data), + SH_PFC_PIN_GROUP(scifb2_clk), + SH_PFC_PIN_GROUP(scifb2_ctrl), + SH_PFC_PIN_GROUP(scifb2_data_b), + SH_PFC_PIN_GROUP(scifb2_clk_b), + SH_PFC_PIN_GROUP(scifb2_ctrl_b), + SH_PFC_PIN_GROUP(scifb3_data), + SH_PFC_PIN_GROUP(scifb3_clk), + SH_PFC_PIN_GROUP(scifb3_ctrl), + SH_PFC_PIN_GROUP(scifb3_data_b), + SH_PFC_PIN_GROUP(scifb3_clk_b), + SH_PFC_PIN_GROUP(scifb3_ctrl_b), +}; + +static const char * const irqc_groups[] = { + "irqc_irq0", + "irqc_irq1", + "irqc_irq2", + "irqc_irq3", + "irqc_irq4", + "irqc_irq5", + "irqc_irq6", + "irqc_irq7", + "irqc_irq8", + "irqc_irq9", + "irqc_irq10", + "irqc_irq11", + "irqc_irq12", + "irqc_irq13", + "irqc_irq14", + "irqc_irq15", + "irqc_irq16", + "irqc_irq17", + "irqc_irq18", + "irqc_irq19", + "irqc_irq20", + "irqc_irq21", + "irqc_irq22", + "irqc_irq23", + "irqc_irq24", + "irqc_irq25", + "irqc_irq26", + "irqc_irq27", + "irqc_irq28", + "irqc_irq29", + "irqc_irq30", + "irqc_irq31", + "irqc_irq32", + "irqc_irq33", + "irqc_irq34", + "irqc_irq35", + "irqc_irq36", + "irqc_irq37", + "irqc_irq38", + "irqc_irq39", + "irqc_irq40", + "irqc_irq41", + "irqc_irq42", + "irqc_irq43", + "irqc_irq44", + "irqc_irq45", + "irqc_irq46", + "irqc_irq47", + "irqc_irq48", + "irqc_irq49", + "irqc_irq50", + "irqc_irq51", + "irqc_irq52", + "irqc_irq53", + "irqc_irq54", + "irqc_irq55", + "irqc_irq56", + "irqc_irq57", +}; + +static const char * const scifa0_groups[] = { + "scifa0_data", + "scifa0_clk", + "scifa0_ctrl", +}; + +static const char * const scifa1_groups[] = { + "scifa1_data", + "scifa1_clk", + "scifa1_ctrl", +}; + +static const char * const scifb0_groups[] = { + "scifb0_data", + "scifb0_clk", + "scifb0_ctrl", +}; + +static const char * const scifb1_groups[] = { + "scifb1_data", + "scifb1_clk", + "scifb1_ctrl", + "scifb1_data_b", + "scifb1_clk_b", + "scifb1_ctrl_b", +}; + +static const char * const scifb2_groups[] = { + "scifb2_data", + "scifb2_clk", + "scifb2_ctrl", + "scifb2_data_b", + "scifb2_clk_b", + "scifb2_ctrl_b", +}; + +static const char * const scifb3_groups[] = { + "scifb3_data", + "scifb3_clk", + "scifb3_ctrl", + "scifb3_data_b", + "scifb3_clk_b", + "scifb3_ctrl_b", +}; + +static const struct sh_pfc_function pinmux_functions[] = { + SH_PFC_FUNCTION(irqc), + SH_PFC_FUNCTION(scifa0), + SH_PFC_FUNCTION(scifa1), + SH_PFC_FUNCTION(scifb0), + SH_PFC_FUNCTION(scifb1), + SH_PFC_FUNCTION(scifb2), + SH_PFC_FUNCTION(scifb3), +}; + +#undef PORTCR +#define PORTCR(nr, reg) \ + { \ + PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \ + _PCRH(PORT##nr##_IN, 0, 0, PORT##nr##_OUT), \ + PORT##nr##_FN0, PORT##nr##_FN1, \ + PORT##nr##_FN2, PORT##nr##_FN3, \ + PORT##nr##_FN4, PORT##nr##_FN5, \ + PORT##nr##_FN6, PORT##nr##_FN7 } \ + } + +static const struct pinmux_cfg_reg pinmux_config_regs[] = { + PORTCR(0, 0xe6050000), + PORTCR(1, 0xe6050001), + PORTCR(2, 0xe6050002), + PORTCR(3, 0xe6050003), + PORTCR(4, 0xe6050004), + PORTCR(5, 0xe6050005), + PORTCR(6, 0xe6050006), + PORTCR(7, 0xe6050007), + PORTCR(8, 0xe6050008), + PORTCR(9, 0xe6050009), + PORTCR(10, 0xe605000A), + PORTCR(11, 0xe605000B), + PORTCR(12, 0xe605000C), + PORTCR(13, 0xe605000D), + PORTCR(14, 0xe605000E), + PORTCR(15, 0xe605000F), + PORTCR(16, 0xe6050010), + PORTCR(17, 0xe6050011), + PORTCR(18, 0xe6050012), + PORTCR(19, 0xe6050013), + PORTCR(20, 0xe6050014), + PORTCR(21, 0xe6050015), + PORTCR(22, 0xe6050016), + PORTCR(23, 0xe6050017), + PORTCR(24, 0xe6050018), + PORTCR(25, 0xe6050019), + PORTCR(26, 0xe605001A), + PORTCR(27, 0xe605001B), + PORTCR(28, 0xe605001C), + PORTCR(29, 0xe605001D), + PORTCR(30, 0xe605001E), + PORTCR(32, 0xe6051020), + PORTCR(33, 0xe6051021), + PORTCR(34, 0xe6051022), + PORTCR(35, 0xe6051023), + PORTCR(36, 0xe6051024), + PORTCR(37, 0xe6051025), + PORTCR(38, 0xe6051026), + PORTCR(39, 0xe6051027), + PORTCR(40, 0xe6051028), + PORTCR(64, 0xe6050040), + PORTCR(65, 0xe6050041), + PORTCR(66, 0xe6050042), + PORTCR(67, 0xe6050043), + PORTCR(68, 0xe6050044), + PORTCR(69, 0xe6050045), + PORTCR(70, 0xe6050046), + PORTCR(71, 0xe6050047), + PORTCR(72, 0xe6050048), + PORTCR(73, 0xe6050049), + PORTCR(74, 0xe605004A), + PORTCR(75, 0xe605004B), + PORTCR(76, 0xe605004C), + PORTCR(77, 0xe605004D), + PORTCR(78, 0xe605004E), + PORTCR(79, 0xe605004F), + PORTCR(80, 0xe6050050), + PORTCR(81, 0xe6050051), + PORTCR(82, 0xe6050052), + PORTCR(83, 0xe6050053), + PORTCR(84, 0xe6050054), + PORTCR(85, 0xe6050055), + PORTCR(96, 0xe6051060), + PORTCR(97, 0xe6051061), + PORTCR(98, 0xe6051062), + PORTCR(99, 0xe6051063), + PORTCR(100, 0xe6051064), + PORTCR(101, 0xe6051065), + PORTCR(102, 0xe6051066), + PORTCR(103, 0xe6051067), + PORTCR(104, 0xe6051068), + PORTCR(105, 0xe6051069), + PORTCR(106, 0xe605106A), + PORTCR(107, 0xe605106B), + PORTCR(108, 0xe605106C), + PORTCR(109, 0xe605106D), + PORTCR(110, 0xe605106E), + PORTCR(111, 0xe605106F), + PORTCR(112, 0xe6051070), + PORTCR(113, 0xe6051071), + PORTCR(114, 0xe6051072), + PORTCR(115, 0xe6051073), + PORTCR(116, 0xe6051074), + PORTCR(117, 0xe6051075), + PORTCR(118, 0xe6051076), + PORTCR(119, 0xe6051077), + PORTCR(120, 0xe6051078), + PORTCR(121, 0xe6051079), + PORTCR(122, 0xe605107A), + PORTCR(123, 0xe605107B), + PORTCR(124, 0xe605107C), + PORTCR(125, 0xe605107D), + PORTCR(126, 0xe605107E), + PORTCR(128, 0xe6051080), + PORTCR(129, 0xe6051081), + PORTCR(130, 0xe6051082), + PORTCR(131, 0xe6051083), + PORTCR(132, 0xe6051084), + PORTCR(133, 0xe6051085), + PORTCR(134, 0xe6051086), + PORTCR(160, 0xe60520A0), + PORTCR(161, 0xe60520A1), + PORTCR(162, 0xe60520A2), + PORTCR(163, 0xe60520A3), + PORTCR(164, 0xe60520A4), + PORTCR(165, 0xe60520A5), + PORTCR(166, 0xe60520A6), + PORTCR(167, 0xe60520A7), + PORTCR(168, 0xe60520A8), + PORTCR(169, 0xe60520A9), + PORTCR(170, 0xe60520AA), + PORTCR(171, 0xe60520AB), + PORTCR(172, 0xe60520AC), + PORTCR(173, 0xe60520AD), + PORTCR(174, 0xe60520AE), + PORTCR(175, 0xe60520AF), + PORTCR(176, 0xe60520B0), + PORTCR(177, 0xe60520B1), + PORTCR(178, 0xe60520B2), + PORTCR(192, 0xe60520C0), + PORTCR(193, 0xe60520C1), + PORTCR(194, 0xe60520C2), + PORTCR(195, 0xe60520C3), + PORTCR(196, 0xe60520C4), + PORTCR(197, 0xe60520C5), + PORTCR(198, 0xe60520C6), + PORTCR(199, 0xe60520C7), + PORTCR(200, 0xe60520C8), + PORTCR(201, 0xe60520C9), + PORTCR(202, 0xe60520CA), + PORTCR(203, 0xe60520CB), + PORTCR(204, 0xe60520CC), + PORTCR(205, 0xe60520CD), + PORTCR(206, 0xe60520CE), + PORTCR(207, 0xe60520CF), + PORTCR(208, 0xe60520D0), + PORTCR(209, 0xe60520D1), + PORTCR(210, 0xe60520D2), + PORTCR(211, 0xe60520D3), + PORTCR(212, 0xe60520D4), + PORTCR(213, 0xe60520D5), + PORTCR(214, 0xe60520D6), + PORTCR(215, 0xe60520D7), + PORTCR(216, 0xe60520D8), + PORTCR(217, 0xe60520D9), + PORTCR(218, 0xe60520DA), + PORTCR(219, 0xe60520DB), + PORTCR(220, 0xe60520DC), + PORTCR(221, 0xe60520DD), + PORTCR(222, 0xe60520DE), + PORTCR(224, 0xe60520E0), + PORTCR(225, 0xe60520E1), + PORTCR(226, 0xe60520E2), + PORTCR(227, 0xe60520E3), + PORTCR(228, 0xe60520E4), + PORTCR(229, 0xe60520E5), + PORTCR(230, 0xe60520e6), + PORTCR(231, 0xe60520E7), + PORTCR(232, 0xe60520E8), + PORTCR(233, 0xe60520E9), + PORTCR(234, 0xe60520EA), + PORTCR(235, 0xe60520EB), + PORTCR(236, 0xe60520EC), + PORTCR(237, 0xe60520ED), + PORTCR(238, 0xe60520EE), + PORTCR(239, 0xe60520EF), + PORTCR(240, 0xe60520F0), + PORTCR(241, 0xe60520F1), + PORTCR(242, 0xe60520F2), + PORTCR(243, 0xe60520F3), + PORTCR(244, 0xe60520F4), + PORTCR(245, 0xe60520F5), + PORTCR(246, 0xe60520F6), + PORTCR(247, 0xe60520F7), + PORTCR(248, 0xe60520F8), + PORTCR(249, 0xe60520F9), + PORTCR(250, 0xe60520FA), + PORTCR(256, 0xe6052100), + PORTCR(257, 0xe6052101), + PORTCR(258, 0xe6052102), + PORTCR(259, 0xe6052103), + PORTCR(260, 0xe6052104), + PORTCR(261, 0xe6052105), + PORTCR(262, 0xe6052106), + PORTCR(263, 0xe6052107), + PORTCR(264, 0xe6052108), + PORTCR(265, 0xe6052109), + PORTCR(266, 0xe605210A), + PORTCR(267, 0xe605210B), + PORTCR(268, 0xe605210C), + PORTCR(269, 0xe605210D), + PORTCR(270, 0xe605210E), + PORTCR(271, 0xe605210F), + PORTCR(272, 0xe6052110), + PORTCR(273, 0xe6052111), + PORTCR(274, 0xe6052112), + PORTCR(275, 0xe6052113), + PORTCR(276, 0xe6052114), + PORTCR(277, 0xe6052115), + PORTCR(278, 0xe6052116), + PORTCR(279, 0xe6052117), + PORTCR(280, 0xe6052118), + PORTCR(281, 0xe6052119), + PORTCR(282, 0xe605211A), + PORTCR(283, 0xe605211B), + PORTCR(288, 0xe6053120), + PORTCR(289, 0xe6053121), + PORTCR(290, 0xe6053122), + PORTCR(291, 0xe6053123), + PORTCR(292, 0xe6053124), + PORTCR(293, 0xe6053125), + PORTCR(294, 0xe6053126), + PORTCR(295, 0xe6053127), + PORTCR(296, 0xe6053128), + PORTCR(297, 0xe6053129), + PORTCR(298, 0xe605312A), + PORTCR(299, 0xe605312B), + PORTCR(300, 0xe605312C), + PORTCR(301, 0xe605312D), + PORTCR(302, 0xe605312E), + PORTCR(303, 0xe605312F), + PORTCR(304, 0xe6053130), + PORTCR(305, 0xe6053131), + PORTCR(306, 0xe6053132), + PORTCR(307, 0xe6053133), + PORTCR(308, 0xe6053134), + PORTCR(320, 0xe6053140), + PORTCR(321, 0xe6053141), + PORTCR(322, 0xe6053142), + PORTCR(323, 0xe6053143), + PORTCR(324, 0xe6053144), + PORTCR(325, 0xe6053145), + PORTCR(326, 0xe6053146), + PORTCR(327, 0xe6053147), + PORTCR(328, 0xe6053148), + PORTCR(329, 0xe6053149), + + { PINMUX_CFG_REG("MSEL1CR", 0xe605800c, 32, 1) { + MSEL1CR_31_0, MSEL1CR_31_1, + 0, 0, + 0, 0, + 0, 0, + MSEL1CR_27_0, MSEL1CR_27_1, + 0, 0, + MSEL1CR_25_0, MSEL1CR_25_1, + MSEL1CR_24_0, MSEL1CR_24_1, + 0, 0, + MSEL1CR_22_0, MSEL1CR_22_1, + MSEL1CR_21_0, MSEL1CR_21_1, + MSEL1CR_20_0, MSEL1CR_20_1, + MSEL1CR_19_0, MSEL1CR_19_1, + MSEL1CR_18_0, MSEL1CR_18_1, + MSEL1CR_17_0, MSEL1CR_17_1, + MSEL1CR_16_0, MSEL1CR_16_1, + MSEL1CR_15_0, MSEL1CR_15_1, + MSEL1CR_14_0, MSEL1CR_14_1, + MSEL1CR_13_0, MSEL1CR_13_1, + MSEL1CR_12_0, MSEL1CR_12_1, + MSEL1CR_11_0, MSEL1CR_11_1, + MSEL1CR_10_0, MSEL1CR_10_1, + MSEL1CR_09_0, MSEL1CR_09_1, + MSEL1CR_08_0, MSEL1CR_08_1, + MSEL1CR_07_0, MSEL1CR_07_1, + MSEL1CR_06_0, MSEL1CR_06_1, + MSEL1CR_05_0, MSEL1CR_05_1, + MSEL1CR_04_0, MSEL1CR_04_1, + MSEL1CR_03_0, MSEL1CR_03_1, + MSEL1CR_02_0, MSEL1CR_02_1, + MSEL1CR_01_0, MSEL1CR_01_1, + MSEL1CR_00_0, MSEL1CR_00_1, + } + }, + { PINMUX_CFG_REG("MSEL3CR", 0xe6058020, 32, 1) { + MSEL3CR_31_0, MSEL3CR_31_1, + 0, 0, + 0, 0, + MSEL3CR_28_0, MSEL3CR_28_1, + MSEL3CR_27_0, MSEL3CR_27_1, + MSEL3CR_26_0, MSEL3CR_26_1, + 0, 0, + 0, 0, + MSEL3CR_23_0, MSEL3CR_23_1, + MSEL3CR_22_0, MSEL3CR_22_1, + MSEL3CR_21_0, MSEL3CR_21_1, + MSEL3CR_20_0, MSEL3CR_20_1, + MSEL3CR_19_0, MSEL3CR_19_1, + MSEL3CR_18_0, MSEL3CR_18_1, + MSEL3CR_17_0, MSEL3CR_17_1, + MSEL3CR_16_0, MSEL3CR_16_1, + MSEL3CR_15_0, MSEL3CR_15_1, + 0, 0, + 0, 0, + MSEL3CR_12_0, MSEL3CR_12_1, + MSEL3CR_11_0, MSEL3CR_11_1, + MSEL3CR_10_0, MSEL3CR_10_1, + MSEL3CR_09_0, MSEL3CR_09_1, + 0, 0, + 0, 0, + MSEL3CR_06_0, MSEL3CR_06_1, + 0, 0, + 0, 0, + MSEL3CR_03_0, MSEL3CR_03_1, + 0, 0, + MSEL3CR_01_0, MSEL3CR_01_1, + MSEL3CR_00_0, MSEL3CR_00_1, + } + }, + { PINMUX_CFG_REG("MSEL4CR", 0xe6058024, 32, 1) { + 0, 0, + MSEL4CR_30_0, MSEL4CR_30_1, + MSEL4CR_29_0, MSEL4CR_29_1, + MSEL4CR_28_0, MSEL4CR_28_1, + MSEL4CR_27_0, MSEL4CR_27_1, + MSEL4CR_26_0, MSEL4CR_26_1, + MSEL4CR_25_0, MSEL4CR_25_1, + MSEL4CR_24_0, MSEL4CR_24_1, + MSEL4CR_23_0, MSEL4CR_23_1, + MSEL4CR_22_0, MSEL4CR_22_1, + MSEL4CR_21_0, MSEL4CR_21_1, + MSEL4CR_20_0, MSEL4CR_20_1, + MSEL4CR_19_0, MSEL4CR_19_1, + MSEL4CR_18_0, MSEL4CR_18_1, + MSEL4CR_17_0, MSEL4CR_17_1, + MSEL4CR_16_0, MSEL4CR_16_1, + MSEL4CR_15_0, MSEL4CR_15_1, + MSEL4CR_14_0, MSEL4CR_14_1, + MSEL4CR_13_0, MSEL4CR_13_1, + MSEL4CR_12_0, MSEL4CR_12_1, + MSEL4CR_11_0, MSEL4CR_11_1, + MSEL4CR_10_0, MSEL4CR_10_1, + MSEL4CR_09_0, MSEL4CR_09_1, + 0, 0, + MSEL4CR_07_0, MSEL4CR_07_1, + 0, 0, + 0, 0, + MSEL4CR_04_0, MSEL4CR_04_1, + 0, 0, + 0, 0, + MSEL4CR_01_0, MSEL4CR_01_1, + 0, 0, + } + }, + { PINMUX_CFG_REG("MSEL5CR", 0xe6058028, 32, 1) { + MSEL5CR_31_0, MSEL5CR_31_1, + MSEL5CR_30_0, MSEL5CR_30_1, + MSEL5CR_29_0, MSEL5CR_29_1, + MSEL5CR_28_0, MSEL5CR_28_1, + MSEL5CR_27_0, MSEL5CR_27_1, + MSEL5CR_26_0, MSEL5CR_26_1, + MSEL5CR_25_0, MSEL5CR_25_1, + MSEL5CR_24_0, MSEL5CR_24_1, + MSEL5CR_23_0, MSEL5CR_23_1, + MSEL5CR_22_0, MSEL5CR_22_1, + MSEL5CR_21_0, MSEL5CR_21_1, + MSEL5CR_20_0, MSEL5CR_20_1, + MSEL5CR_19_0, MSEL5CR_19_1, + MSEL5CR_18_0, MSEL5CR_18_1, + MSEL5CR_17_0, MSEL5CR_17_1, + MSEL5CR_16_0, MSEL5CR_16_1, + MSEL5CR_15_0, MSEL5CR_15_1, + MSEL5CR_14_0, MSEL5CR_14_1, + MSEL5CR_13_0, MSEL5CR_13_1, + MSEL5CR_12_0, MSEL5CR_12_1, + MSEL5CR_11_0, MSEL5CR_11_1, + MSEL5CR_10_0, MSEL5CR_10_1, + MSEL5CR_09_0, MSEL5CR_09_1, + MSEL5CR_08_0, MSEL5CR_08_1, + MSEL5CR_07_0, MSEL5CR_07_1, + MSEL5CR_06_0, MSEL5CR_06_1, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + } + }, + { PINMUX_CFG_REG("MSEL8CR", 0xe6058034, 32, 1) { + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + MSEL8CR_16_0, MSEL8CR_16_1, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + 0, 0, + MSEL8CR_01_0, MSEL8CR_01_1, + MSEL8CR_00_0, MSEL8CR_00_1, + } + }, + { }, +}; + +static const struct pinmux_data_reg pinmux_data_regs[] = { + + { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32) { + 0, PORT30_DATA, PORT29_DATA, PORT28_DATA, + PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA, + PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA, + PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA, + PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA, + PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA, + PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA, + PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA, + } + }, + { PINMUX_DATA_REG("PORTD063_032DR", 0xe6055000, 32) { + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, PORT40_DATA, + PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA, + PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA, + } + }, + { PINMUX_DATA_REG("PORTL095_064DR", 0xe6054004, 32) { + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, PORT85_DATA, PORT84_DATA, + PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA, + PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA, + PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA, + PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA, + PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA, + } + }, + { PINMUX_DATA_REG("PORTD127_096DR", 0xe6055004, 32) { + 0, PORT126_DATA, PORT125_DATA, PORT124_DATA, + PORT123_DATA, PORT122_DATA, PORT121_DATA, PORT120_DATA, + PORT119_DATA, PORT118_DATA, PORT117_DATA, PORT116_DATA, + PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA, + PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA, + PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA, + PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA, + PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA, + } + }, + { PINMUX_DATA_REG("PORTD159_128DR", 0xe6055008, 32) { + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, PORT134_DATA, PORT133_DATA, PORT132_DATA, + PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA, + } + }, + { PINMUX_DATA_REG("PORTR191_160DR", 0xe6056000, 32) { + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, PORT178_DATA, PORT177_DATA, PORT176_DATA, + PORT175_DATA, PORT174_DATA, PORT173_DATA, PORT172_DATA, + PORT171_DATA, PORT170_DATA, PORT169_DATA, PORT168_DATA, + PORT167_DATA, PORT166_DATA, PORT165_DATA, PORT164_DATA, + PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA, + } + }, + { PINMUX_DATA_REG("PORTR223_192DR", 0xe6056004, 32) { + 0, PORT222_DATA, PORT221_DATA, PORT220_DATA, + PORT219_DATA, PORT218_DATA, PORT217_DATA, PORT216_DATA, + PORT215_DATA, PORT214_DATA, PORT213_DATA, PORT212_DATA, + PORT211_DATA, PORT210_DATA, PORT209_DATA, PORT208_DATA, + PORT207_DATA, PORT206_DATA, PORT205_DATA, PORT204_DATA, + PORT203_DATA, PORT202_DATA, PORT201_DATA, PORT200_DATA, + PORT199_DATA, PORT198_DATA, PORT197_DATA, PORT196_DATA, + PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA, + } + }, + { PINMUX_DATA_REG("PORTR255_224DR", 0xe6056008, 32) { + 0, 0, 0, 0, + 0, PORT250_DATA, PORT249_DATA, PORT248_DATA, + PORT247_DATA, PORT246_DATA, PORT245_DATA, PORT244_DATA, + PORT243_DATA, PORT242_DATA, PORT241_DATA, PORT240_DATA, + PORT239_DATA, PORT238_DATA, PORT237_DATA, PORT236_DATA, + PORT235_DATA, PORT234_DATA, PORT233_DATA, PORT232_DATA, + PORT231_DATA, PORT230_DATA, PORT229_DATA, PORT228_DATA, + PORT227_DATA, PORT226_DATA, PORT225_DATA, PORT224_DATA, + } + }, + { PINMUX_DATA_REG("PORTR287_256DR", 0xe605600C, 32) { + 0, 0, 0, 0, + PORT283_DATA, PORT282_DATA, PORT281_DATA, PORT280_DATA, + PORT279_DATA, PORT278_DATA, PORT277_DATA, PORT276_DATA, + PORT275_DATA, PORT274_DATA, PORT273_DATA, PORT272_DATA, + PORT271_DATA, PORT270_DATA, PORT269_DATA, PORT268_DATA, + PORT267_DATA, PORT266_DATA, PORT265_DATA, PORT264_DATA, + PORT263_DATA, PORT262_DATA, PORT261_DATA, PORT260_DATA, + PORT259_DATA, PORT258_DATA, PORT257_DATA, PORT256_DATA, + } + }, + { PINMUX_DATA_REG("PORTU319_288DR", 0xe6057000, 32) { + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, PORT308_DATA, + PORT307_DATA, PORT306_DATA, PORT305_DATA, PORT304_DATA, + PORT303_DATA, PORT302_DATA, PORT301_DATA, PORT300_DATA, + PORT299_DATA, PORT298_DATA, PORT297_DATA, PORT296_DATA, + PORT295_DATA, PORT294_DATA, PORT293_DATA, PORT292_DATA, + PORT291_DATA, PORT290_DATA, PORT289_DATA, PORT288_DATA, + } + }, + { PINMUX_DATA_REG("PORTU351_320DR", 0xe6057004, 32) { + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, PORT329_DATA, PORT328_DATA, + PORT327_DATA, PORT326_DATA, PORT325_DATA, PORT324_DATA, + PORT323_DATA, PORT322_DATA, PORT321_DATA, PORT320_DATA, + } + }, + { }, +}; + +static const struct pinmux_irq pinmux_irqs[] = { + PINMUX_IRQ(irq_pin(0), 0), + PINMUX_IRQ(irq_pin(1), 1), + PINMUX_IRQ(irq_pin(2), 2), + PINMUX_IRQ(irq_pin(3), 3), + PINMUX_IRQ(irq_pin(4), 4), + PINMUX_IRQ(irq_pin(5), 5), + PINMUX_IRQ(irq_pin(6), 6), + PINMUX_IRQ(irq_pin(7), 7), + PINMUX_IRQ(irq_pin(8), 8), + PINMUX_IRQ(irq_pin(9), 9), + PINMUX_IRQ(irq_pin(10), 10), + PINMUX_IRQ(irq_pin(11), 11), + PINMUX_IRQ(irq_pin(12), 12), + PINMUX_IRQ(irq_pin(13), 13), + PINMUX_IRQ(irq_pin(14), 14), + PINMUX_IRQ(irq_pin(15), 15), + PINMUX_IRQ(irq_pin(16), 320), + PINMUX_IRQ(irq_pin(17), 321), + PINMUX_IRQ(irq_pin(18), 85), + PINMUX_IRQ(irq_pin(19), 84), + PINMUX_IRQ(irq_pin(20), 160), + PINMUX_IRQ(irq_pin(21), 161), + PINMUX_IRQ(irq_pin(22), 162), + PINMUX_IRQ(irq_pin(23), 163), + PINMUX_IRQ(irq_pin(24), 175), + PINMUX_IRQ(irq_pin(25), 176), + PINMUX_IRQ(irq_pin(26), 177), + PINMUX_IRQ(irq_pin(27), 178), + PINMUX_IRQ(irq_pin(28), 322), + PINMUX_IRQ(irq_pin(29), 323), + PINMUX_IRQ(irq_pin(30), 324), + PINMUX_IRQ(irq_pin(31), 192), + PINMUX_IRQ(irq_pin(32), 193), + PINMUX_IRQ(irq_pin(33), 194), + PINMUX_IRQ(irq_pin(34), 195), + PINMUX_IRQ(irq_pin(35), 196), + PINMUX_IRQ(irq_pin(36), 197), + PINMUX_IRQ(irq_pin(37), 198), + PINMUX_IRQ(irq_pin(38), 199), + PINMUX_IRQ(irq_pin(39), 200), + PINMUX_IRQ(irq_pin(40), 66), + PINMUX_IRQ(irq_pin(41), 102), + PINMUX_IRQ(irq_pin(42), 103), + PINMUX_IRQ(irq_pin(43), 109), + PINMUX_IRQ(irq_pin(44), 110), + PINMUX_IRQ(irq_pin(45), 111), + PINMUX_IRQ(irq_pin(46), 112), + PINMUX_IRQ(irq_pin(47), 113), + PINMUX_IRQ(irq_pin(48), 114), + PINMUX_IRQ(irq_pin(49), 115), + PINMUX_IRQ(irq_pin(50), 301), + PINMUX_IRQ(irq_pin(51), 290), + PINMUX_IRQ(irq_pin(52), 296), + PINMUX_IRQ(irq_pin(53), 325), + PINMUX_IRQ(irq_pin(54), 326), + PINMUX_IRQ(irq_pin(55), 327), + PINMUX_IRQ(irq_pin(56), 328), + PINMUX_IRQ(irq_pin(57), 329), +}; + +#define PORTCR_PULMD_OFF (0 << 6) +#define PORTCR_PULMD_DOWN (2 << 6) +#define PORTCR_PULMD_UP (3 << 6) +#define PORTCR_PULMD_MASK (3 << 6) + +static const unsigned int r8a73a4_portcr_offsets[] = { + 0x00000000, 0x00001000, 0x00000000, 0x00001000, + 0x00001000, 0x00002000, 0x00002000, 0x00002000, + 0x00002000, 0x00003000, 0x00003000, +}; + +static unsigned int r8a73a4_pinmux_get_bias(struct sh_pfc *pfc, + unsigned int pin) +{ + void __iomem *addr; + + addr = pfc->window->virt + r8a73a4_portcr_offsets[pin >> 5] + pin; + + switch (ioread8(addr) & PORTCR_PULMD_MASK) { + case PORTCR_PULMD_UP: + return PIN_CONFIG_BIAS_PULL_UP; + case PORTCR_PULMD_DOWN: + return PIN_CONFIG_BIAS_PULL_DOWN; + case PORTCR_PULMD_OFF: + default: + return PIN_CONFIG_BIAS_DISABLE; + } +} + +static void r8a73a4_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin, + unsigned int bias) +{ + void __iomem *addr; + u32 value; + + addr = pfc->window->virt + r8a73a4_portcr_offsets[pin >> 5] + pin; + value = ioread8(addr) & ~PORTCR_PULMD_MASK; + + switch (bias) { + case PIN_CONFIG_BIAS_PULL_UP: + value |= PORTCR_PULMD_UP; + break; + case PIN_CONFIG_BIAS_PULL_DOWN: + value |= PORTCR_PULMD_DOWN; + break; + } + + iowrite8(value, addr); +} + +static const struct sh_pfc_soc_operations r8a73a4_pinmux_ops = { + .get_bias = r8a73a4_pinmux_get_bias, + .set_bias = r8a73a4_pinmux_set_bias, +}; + +const struct sh_pfc_soc_info r8a73a4_pinmux_info = { + .name = "r8a73a4_pfc", + .ops = &r8a73a4_pinmux_ops, + + .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, + .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, + .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, + + .pins = pinmux_pins, + .nr_pins = ARRAY_SIZE(pinmux_pins), + + .ranges = pinmux_ranges, + .nr_ranges = ARRAY_SIZE(pinmux_ranges), + + .groups = pinmux_groups, + .nr_groups = ARRAY_SIZE(pinmux_groups), + .functions = pinmux_functions, + .nr_functions = ARRAY_SIZE(pinmux_functions), + + .cfg_regs = pinmux_config_regs, + .data_regs = pinmux_data_regs, + + .gpio_data = pinmux_data, + .gpio_data_size = ARRAY_SIZE(pinmux_data), + + .gpio_irq = pinmux_irqs, + .gpio_irq_size = ARRAY_SIZE(pinmux_irqs), +}; diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c index 2b528280e3c1..bbd87d29bfd0 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c @@ -577,7 +577,7 @@ enum { PINMUX_MARK_END, }; -static pinmux_enum_t pinmux_data[] = { +static const pinmux_enum_t pinmux_data[] = { /* specify valid pin states for each pin in GPIO mode */ /* I/O and Pull U/D */ @@ -1654,11 +1654,532 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_DATA(TRACEAUD_FROM_MEMC_MARK, MSEL5CR_30_1, MSEL5CR_29_0), }; -static struct pinmux_gpio pinmux_gpios[] = { - - /* PORT */ +static struct sh_pfc_pin pinmux_pins[] = { GPIO_PORT_ALL(), +}; + +/* - LCD0 ------------------------------------------------------------------- */ +static const unsigned int lcd0_data8_pins[] = { + /* D[0:7] */ + 58, 57, 56, 55, 54, 53, 52, 51, +}; +static const unsigned int lcd0_data8_mux[] = { + LCD0_D0_MARK, LCD0_D1_MARK, LCD0_D2_MARK, LCD0_D3_MARK, + LCD0_D4_MARK, LCD0_D5_MARK, LCD0_D6_MARK, LCD0_D7_MARK, +}; +static const unsigned int lcd0_data9_pins[] = { + /* D[0:8] */ + 58, 57, 56, 55, 54, 53, 52, 51, + 50, +}; +static const unsigned int lcd0_data9_mux[] = { + LCD0_D0_MARK, LCD0_D1_MARK, LCD0_D2_MARK, LCD0_D3_MARK, + LCD0_D4_MARK, LCD0_D5_MARK, LCD0_D6_MARK, LCD0_D7_MARK, + LCD0_D8_MARK, +}; +static const unsigned int lcd0_data12_pins[] = { + /* D[0:11] */ + 58, 57, 56, 55, 54, 53, 52, 51, + 50, 49, 48, 47, +}; +static const unsigned int lcd0_data12_mux[] = { + LCD0_D0_MARK, LCD0_D1_MARK, LCD0_D2_MARK, LCD0_D3_MARK, + LCD0_D4_MARK, LCD0_D5_MARK, LCD0_D6_MARK, LCD0_D7_MARK, + LCD0_D8_MARK, LCD0_D9_MARK, LCD0_D10_MARK, LCD0_D11_MARK, +}; +static const unsigned int lcd0_data16_pins[] = { + /* D[0:15] */ + 58, 57, 56, 55, 54, 53, 52, 51, + 50, 49, 48, 47, 46, 45, 44, 43, +}; +static const unsigned int lcd0_data16_mux[] = { + LCD0_D0_MARK, LCD0_D1_MARK, LCD0_D2_MARK, LCD0_D3_MARK, + LCD0_D4_MARK, LCD0_D5_MARK, LCD0_D6_MARK, LCD0_D7_MARK, + LCD0_D8_MARK, LCD0_D9_MARK, LCD0_D10_MARK, LCD0_D11_MARK, + LCD0_D12_MARK, LCD0_D13_MARK, LCD0_D14_MARK, LCD0_D15_MARK, +}; +static const unsigned int lcd0_data18_pins[] = { + /* D[0:17] */ + 58, 57, 56, 55, 54, 53, 52, 51, + 50, 49, 48, 47, 46, 45, 44, 43, + 42, 41, +}; +static const unsigned int lcd0_data18_mux[] = { + LCD0_D0_MARK, LCD0_D1_MARK, LCD0_D2_MARK, LCD0_D3_MARK, + LCD0_D4_MARK, LCD0_D5_MARK, LCD0_D6_MARK, LCD0_D7_MARK, + LCD0_D8_MARK, LCD0_D9_MARK, LCD0_D10_MARK, LCD0_D11_MARK, + LCD0_D12_MARK, LCD0_D13_MARK, LCD0_D14_MARK, LCD0_D15_MARK, + LCD0_D16_MARK, LCD0_D17_MARK, +}; +static const unsigned int lcd0_data24_0_pins[] = { + /* D[0:23] */ + 58, 57, 56, 55, 54, 53, 52, 51, + 50, 49, 48, 47, 46, 45, 44, 43, + 42, 41, 40, 4, 3, 2, 0, 1, +}; +static const unsigned int lcd0_data24_0_mux[] = { + LCD0_D0_MARK, LCD0_D1_MARK, LCD0_D2_MARK, LCD0_D3_MARK, + LCD0_D4_MARK, LCD0_D5_MARK, LCD0_D6_MARK, LCD0_D7_MARK, + LCD0_D8_MARK, LCD0_D9_MARK, LCD0_D10_MARK, LCD0_D11_MARK, + LCD0_D12_MARK, LCD0_D13_MARK, LCD0_D14_MARK, LCD0_D15_MARK, + LCD0_D16_MARK, LCD0_D17_MARK, LCD0_D18_PORT40_MARK, LCD0_D19_PORT4_MARK, + LCD0_D20_PORT3_MARK, LCD0_D21_PORT2_MARK, LCD0_D22_PORT0_MARK, + LCD0_D23_PORT1_MARK, +}; +static const unsigned int lcd0_data24_1_pins[] = { + /* D[0:23] */ + 58, 57, 56, 55, 54, 53, 52, 51, + 50, 49, 48, 47, 46, 45, 44, 43, + 42, 41, 163, 162, 161, 158, 160, 159, +}; +static const unsigned int lcd0_data24_1_mux[] = { + LCD0_D0_MARK, LCD0_D1_MARK, LCD0_D2_MARK, LCD0_D3_MARK, + LCD0_D4_MARK, LCD0_D5_MARK, LCD0_D6_MARK, LCD0_D7_MARK, + LCD0_D8_MARK, LCD0_D9_MARK, LCD0_D10_MARK, LCD0_D11_MARK, + LCD0_D16_MARK, LCD0_D17_MARK, LCD0_D18_PORT163_MARK, + LCD0_D19_PORT162_MARK, LCD0_D20_PORT161_MARK, LCD0_D21_PORT158_MARK, + LCD0_D22_PORT160_MARK, LCD0_D23_PORT159_MARK, +}; +static const unsigned int lcd0_display_pins[] = { + /* DON, VCPWC, VEPWC */ + 61, 59, 60, +}; +static const unsigned int lcd0_display_mux[] = { + LCD0_DON_MARK, LCD0_VCPWC_MARK, LCD0_VEPWC_MARK, +}; +static const unsigned int lcd0_lclk_0_pins[] = { + /* LCLK */ + 102, +}; +static const unsigned int lcd0_lclk_0_mux[] = { + LCD0_LCLK_PORT102_MARK, +}; +static const unsigned int lcd0_lclk_1_pins[] = { + /* LCLK */ + 165, +}; +static const unsigned int lcd0_lclk_1_mux[] = { + LCD0_LCLK_PORT165_MARK, +}; +static const unsigned int lcd0_sync_pins[] = { + /* VSYN, HSYN, DCK, DISP */ + 63, 64, 62, 65, +}; +static const unsigned int lcd0_sync_mux[] = { + LCD0_VSYN_MARK, LCD0_HSYN_MARK, LCD0_DCK_MARK, LCD0_DISP_MARK, +}; +static const unsigned int lcd0_sys_pins[] = { + /* CS, WR, RD, RS */ + 64, 62, 164, 65, +}; +static const unsigned int lcd0_sys_mux[] = { + LCD0_CS_MARK, LCD0_WR_MARK, LCD0_RD_MARK, LCD0_RS_MARK, +}; +/* - LCD1 ------------------------------------------------------------------- */ +static const unsigned int lcd1_data8_pins[] = { + /* D[0:7] */ + 4, 3, 2, 1, 0, 91, 92, 23, +}; +static const unsigned int lcd1_data8_mux[] = { + LCD1_D0_MARK, LCD1_D1_MARK, LCD1_D2_MARK, LCD1_D3_MARK, + LCD1_D4_MARK, LCD1_D5_MARK, LCD1_D6_MARK, LCD1_D7_MARK, +}; +static const unsigned int lcd1_data9_pins[] = { + /* D[0:8] */ + 4, 3, 2, 1, 0, 91, 92, 23, + 93, +}; +static const unsigned int lcd1_data9_mux[] = { + LCD1_D0_MARK, LCD1_D1_MARK, LCD1_D2_MARK, LCD1_D3_MARK, + LCD1_D4_MARK, LCD1_D5_MARK, LCD1_D6_MARK, LCD1_D7_MARK, + LCD1_D8_MARK, +}; +static const unsigned int lcd1_data12_pins[] = { + /* D[0:12] */ + 4, 3, 2, 1, 0, 91, 92, 23, + 93, 94, 21, 201, +}; +static const unsigned int lcd1_data12_mux[] = { + LCD1_D0_MARK, LCD1_D1_MARK, LCD1_D2_MARK, LCD1_D3_MARK, + LCD1_D4_MARK, LCD1_D5_MARK, LCD1_D6_MARK, LCD1_D7_MARK, + LCD1_D8_MARK, LCD1_D9_MARK, LCD1_D10_MARK, LCD1_D11_MARK, +}; +static const unsigned int lcd1_data16_pins[] = { + /* D[0:15] */ + 4, 3, 2, 1, 0, 91, 92, 23, + 93, 94, 21, 201, 200, 199, 196, 195, +}; +static const unsigned int lcd1_data16_mux[] = { + LCD1_D0_MARK, LCD1_D1_MARK, LCD1_D2_MARK, LCD1_D3_MARK, + LCD1_D4_MARK, LCD1_D5_MARK, LCD1_D6_MARK, LCD1_D7_MARK, + LCD1_D8_MARK, LCD1_D9_MARK, LCD1_D10_MARK, LCD1_D11_MARK, + LCD1_D12_MARK, LCD1_D13_MARK, LCD1_D14_MARK, LCD1_D15_MARK, +}; +static const unsigned int lcd1_data18_pins[] = { + /* D[0:17] */ + 4, 3, 2, 1, 0, 91, 92, 23, + 93, 94, 21, 201, 200, 199, 196, 195, + 194, 193, +}; +static const unsigned int lcd1_data18_mux[] = { + LCD1_D0_MARK, LCD1_D1_MARK, LCD1_D2_MARK, LCD1_D3_MARK, + LCD1_D4_MARK, LCD1_D5_MARK, LCD1_D6_MARK, LCD1_D7_MARK, + LCD1_D8_MARK, LCD1_D9_MARK, LCD1_D10_MARK, LCD1_D11_MARK, + LCD1_D12_MARK, LCD1_D13_MARK, LCD1_D14_MARK, LCD1_D15_MARK, + LCD1_D16_MARK, LCD1_D17_MARK, +}; +static const unsigned int lcd1_data24_pins[] = { + /* D[0:23] */ + 4, 3, 2, 1, 0, 91, 92, 23, + 93, 94, 21, 201, 200, 199, 196, 195, + 194, 193, 198, 197, 75, 74, 15, 14, +}; +static const unsigned int lcd1_data24_mux[] = { + LCD1_D0_MARK, LCD1_D1_MARK, LCD1_D2_MARK, LCD1_D3_MARK, + LCD1_D4_MARK, LCD1_D5_MARK, LCD1_D6_MARK, LCD1_D7_MARK, + LCD1_D8_MARK, LCD1_D9_MARK, LCD1_D10_MARK, LCD1_D11_MARK, + LCD1_D12_MARK, LCD1_D13_MARK, LCD1_D14_MARK, LCD1_D15_MARK, + LCD1_D16_MARK, LCD1_D17_MARK, LCD1_D18_MARK, LCD1_D19_MARK, + LCD1_D20_MARK, LCD1_D21_MARK, LCD1_D22_MARK, LCD1_D23_MARK, +}; +static const unsigned int lcd1_display_pins[] = { + /* DON, VCPWC, VEPWC */ + 100, 5, 6, +}; +static const unsigned int lcd1_display_mux[] = { + LCD1_DON_MARK, LCD1_VCPWC_MARK, LCD1_VEPWC_MARK, +}; +static const unsigned int lcd1_lclk_pins[] = { + /* LCLK */ + 40, +}; +static const unsigned int lcd1_lclk_mux[] = { + LCD1_LCLK_MARK, +}; +static const unsigned int lcd1_sync_pins[] = { + /* VSYN, HSYN, DCK, DISP */ + 98, 97, 99, 12, +}; +static const unsigned int lcd1_sync_mux[] = { + LCD1_VSYN_MARK, LCD1_HSYN_MARK, LCD1_DCK_MARK, LCD1_DISP_MARK, +}; +static const unsigned int lcd1_sys_pins[] = { + /* CS, WR, RD, RS */ + 97, 99, 13, 12, +}; +static const unsigned int lcd1_sys_mux[] = { + LCD1_CS_MARK, LCD1_WR_MARK, LCD1_RD_MARK, LCD1_RS_MARK, +}; +/* - MMCIF ------------------------------------------------------------------ */ +static const unsigned int mmc0_data1_0_pins[] = { + /* D[0] */ + 68, +}; +static const unsigned int mmc0_data1_0_mux[] = { + MMC0_D0_PORT68_MARK, +}; +static const unsigned int mmc0_data4_0_pins[] = { + /* D[0:3] */ + 68, 69, 70, 71, +}; +static const unsigned int mmc0_data4_0_mux[] = { + MMC0_D0_PORT68_MARK, MMC0_D1_PORT69_MARK, MMC0_D2_PORT70_MARK, MMC0_D3_PORT71_MARK, +}; +static const unsigned int mmc0_data8_0_pins[] = { + /* D[0:7] */ + 68, 69, 70, 71, 72, 73, 74, 75, +}; +static const unsigned int mmc0_data8_0_mux[] = { + MMC0_D0_PORT68_MARK, MMC0_D1_PORT69_MARK, MMC0_D2_PORT70_MARK, MMC0_D3_PORT71_MARK, + MMC0_D4_PORT72_MARK, MMC0_D5_PORT73_MARK, MMC0_D6_PORT74_MARK, MMC0_D7_PORT75_MARK, +}; +static const unsigned int mmc0_ctrl_0_pins[] = { + /* CMD, CLK */ + 67, 66, +}; +static const unsigned int mmc0_ctrl_0_mux[] = { + MMC0_CMD_PORT67_MARK, MMC0_CLK_PORT66_MARK, +}; + +static const unsigned int mmc0_data1_1_pins[] = { + /* D[0] */ + 149, +}; +static const unsigned int mmc0_data1_1_mux[] = { + MMC1_D0_PORT149_MARK, +}; +static const unsigned int mmc0_data4_1_pins[] = { + /* D[0:3] */ + 149, 148, 147, 146, +}; +static const unsigned int mmc0_data4_1_mux[] = { + MMC1_D0_PORT149_MARK, MMC1_D1_PORT148_MARK, MMC1_D2_PORT147_MARK, MMC1_D3_PORT146_MARK, +}; +static const unsigned int mmc0_data8_1_pins[] = { + /* D[0:7] */ + 149, 148, 147, 146, 145, 144, 143, 142, +}; +static const unsigned int mmc0_data8_1_mux[] = { + MMC1_D0_PORT149_MARK, MMC1_D1_PORT148_MARK, MMC1_D2_PORT147_MARK, MMC1_D3_PORT146_MARK, + MMC1_D4_PORT145_MARK, MMC1_D5_PORT144_MARK, MMC1_D6_PORT143_MARK, MMC1_D7_PORT142_MARK, +}; +static const unsigned int mmc0_ctrl_1_pins[] = { + /* CMD, CLK */ + 104, 103, +}; +static const unsigned int mmc0_ctrl_1_mux[] = { + MMC1_CMD_PORT104_MARK, MMC1_CLK_PORT103_MARK, +}; +/* - SDHI0 ------------------------------------------------------------------ */ +static const unsigned int sdhi0_data1_pins[] = { + /* D0 */ + 77, +}; +static const unsigned int sdhi0_data1_mux[] = { + SDHI0_D0_MARK, +}; +static const unsigned int sdhi0_data4_pins[] = { + /* D[0:3] */ + 77, 78, 79, 80, +}; +static const unsigned int sdhi0_data4_mux[] = { + SDHI0_D0_MARK, SDHI0_D1_MARK, SDHI0_D2_MARK, SDHI0_D3_MARK, +}; +static const unsigned int sdhi0_ctrl_pins[] = { + /* CMD, CLK */ + 76, 82, +}; +static const unsigned int sdhi0_ctrl_mux[] = { + SDHI0_CMD_MARK, SDHI0_CLK_MARK, +}; +static const unsigned int sdhi0_cd_pins[] = { + /* CD */ + 81, +}; +static const unsigned int sdhi0_cd_mux[] = { + SDHI0_CD_MARK, +}; +static const unsigned int sdhi0_wp_pins[] = { + /* WP */ + 83, +}; +static const unsigned int sdhi0_wp_mux[] = { + SDHI0_WP_MARK, +}; +/* - SDHI1 ------------------------------------------------------------------ */ +static const unsigned int sdhi1_data1_pins[] = { + /* D0 */ + 68, +}; +static const unsigned int sdhi1_data1_mux[] = { + SDHI1_D0_MARK, +}; +static const unsigned int sdhi1_data4_pins[] = { + /* D[0:3] */ + 68, 69, 70, 71, +}; +static const unsigned int sdhi1_data4_mux[] = { + SDHI1_D0_MARK, SDHI1_D1_MARK, SDHI1_D2_MARK, SDHI1_D3_MARK, +}; +static const unsigned int sdhi1_ctrl_pins[] = { + /* CMD, CLK */ + 67, 66, +}; +static const unsigned int sdhi1_ctrl_mux[] = { + SDHI1_CMD_MARK, SDHI1_CLK_MARK, +}; +static const unsigned int sdhi1_cd_pins[] = { + /* CD */ + 72, +}; +static const unsigned int sdhi1_cd_mux[] = { + SDHI1_CD_MARK, +}; +static const unsigned int sdhi1_wp_pins[] = { + /* WP */ + 73, +}; +static const unsigned int sdhi1_wp_mux[] = { + SDHI1_WP_MARK, +}; +/* - SDHI2 ------------------------------------------------------------------ */ +static const unsigned int sdhi2_data1_pins[] = { + /* D0 */ + 205, +}; +static const unsigned int sdhi2_data1_mux[] = { + SDHI2_D0_MARK, +}; +static const unsigned int sdhi2_data4_pins[] = { + /* D[0:3] */ + 205, 206, 207, 208, +}; +static const unsigned int sdhi2_data4_mux[] = { + SDHI2_D0_MARK, SDHI2_D1_MARK, SDHI2_D2_MARK, SDHI2_D3_MARK, +}; +static const unsigned int sdhi2_ctrl_pins[] = { + /* CMD, CLK */ + 204, 203, +}; +static const unsigned int sdhi2_ctrl_mux[] = { + SDHI2_CMD_MARK, SDHI2_CLK_MARK, +}; +static const unsigned int sdhi2_cd_0_pins[] = { + /* CD */ + 202, +}; +static const unsigned int sdhi2_cd_0_mux[] = { + SDHI2_CD_PORT202_MARK, +}; +static const unsigned int sdhi2_wp_0_pins[] = { + /* WP */ + 177, +}; +static const unsigned int sdhi2_wp_0_mux[] = { + SDHI2_WP_PORT177_MARK, +}; +static const unsigned int sdhi2_cd_1_pins[] = { + /* CD */ + 24, +}; +static const unsigned int sdhi2_cd_1_mux[] = { + SDHI2_CD_PORT24_MARK, +}; +static const unsigned int sdhi2_wp_1_pins[] = { + /* WP */ + 25, +}; +static const unsigned int sdhi2_wp_1_mux[] = { + SDHI2_WP_PORT25_MARK, +}; + +static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(lcd0_data8), + SH_PFC_PIN_GROUP(lcd0_data9), + SH_PFC_PIN_GROUP(lcd0_data12), + SH_PFC_PIN_GROUP(lcd0_data16), + SH_PFC_PIN_GROUP(lcd0_data18), + SH_PFC_PIN_GROUP(lcd0_data24_0), + SH_PFC_PIN_GROUP(lcd0_data24_1), + SH_PFC_PIN_GROUP(lcd0_display), + SH_PFC_PIN_GROUP(lcd0_lclk_0), + SH_PFC_PIN_GROUP(lcd0_lclk_1), + SH_PFC_PIN_GROUP(lcd0_sync), + SH_PFC_PIN_GROUP(lcd0_sys), + SH_PFC_PIN_GROUP(lcd1_data8), + SH_PFC_PIN_GROUP(lcd1_data9), + SH_PFC_PIN_GROUP(lcd1_data12), + SH_PFC_PIN_GROUP(lcd1_data16), + SH_PFC_PIN_GROUP(lcd1_data18), + SH_PFC_PIN_GROUP(lcd1_data24), + SH_PFC_PIN_GROUP(lcd1_display), + SH_PFC_PIN_GROUP(lcd1_lclk), + SH_PFC_PIN_GROUP(lcd1_sync), + SH_PFC_PIN_GROUP(lcd1_sys), + SH_PFC_PIN_GROUP(mmc0_data1_0), + SH_PFC_PIN_GROUP(mmc0_data4_0), + SH_PFC_PIN_GROUP(mmc0_data8_0), + SH_PFC_PIN_GROUP(mmc0_ctrl_0), + SH_PFC_PIN_GROUP(mmc0_data1_1), + SH_PFC_PIN_GROUP(mmc0_data4_1), + SH_PFC_PIN_GROUP(mmc0_data8_1), + SH_PFC_PIN_GROUP(mmc0_ctrl_1), + SH_PFC_PIN_GROUP(sdhi0_data1), + SH_PFC_PIN_GROUP(sdhi0_data4), + SH_PFC_PIN_GROUP(sdhi0_ctrl), + SH_PFC_PIN_GROUP(sdhi0_cd), + SH_PFC_PIN_GROUP(sdhi0_wp), + SH_PFC_PIN_GROUP(sdhi1_data1), + SH_PFC_PIN_GROUP(sdhi1_data4), + SH_PFC_PIN_GROUP(sdhi1_ctrl), + SH_PFC_PIN_GROUP(sdhi1_cd), + SH_PFC_PIN_GROUP(sdhi1_wp), + SH_PFC_PIN_GROUP(sdhi2_data1), + SH_PFC_PIN_GROUP(sdhi2_data4), + SH_PFC_PIN_GROUP(sdhi2_ctrl), + SH_PFC_PIN_GROUP(sdhi2_cd_0), + SH_PFC_PIN_GROUP(sdhi2_wp_0), + SH_PFC_PIN_GROUP(sdhi2_cd_1), + SH_PFC_PIN_GROUP(sdhi2_wp_1), +}; + +static const char * const lcd0_groups[] = { + "lcd0_data8", + "lcd0_data9", + "lcd0_data12", + "lcd0_data16", + "lcd0_data18", + "lcd0_data24_0", + "lcd0_data24_1", + "lcd0_display", + "lcd0_lclk_0", + "lcd0_lclk_1", + "lcd0_sync", + "lcd0_sys", +}; + +static const char * const lcd1_groups[] = { + "lcd1_data8", + "lcd1_data9", + "lcd1_data12", + "lcd1_data16", + "lcd1_data18", + "lcd1_data24", + "lcd1_display", + "lcd1_lclk", + "lcd1_sync", + "lcd1_sys", +}; + +static const char * const mmc0_groups[] = { + "mmc0_data1_0", + "mmc0_data4_0", + "mmc0_data8_0", + "mmc0_ctrl_0", + "mmc0_data1_1", + "mmc0_data4_1", + "mmc0_data8_1", + "mmc0_ctrl_1", +}; + +static const char * const sdhi0_groups[] = { + "sdhi0_data1", + "sdhi0_data4", + "sdhi0_ctrl", + "sdhi0_cd", + "sdhi0_wp", +}; + +static const char * const sdhi1_groups[] = { + "sdhi1_data1", + "sdhi1_data4", + "sdhi1_ctrl", + "sdhi1_cd", + "sdhi1_wp", +}; + +static const char * const sdhi2_groups[] = { + "sdhi2_data1", + "sdhi2_data4", + "sdhi2_ctrl", + "sdhi2_cd_0", + "sdhi2_wp_0", + "sdhi2_cd_1", + "sdhi2_wp_1", +}; + +static const struct sh_pfc_function pinmux_functions[] = { + SH_PFC_FUNCTION(lcd0), + SH_PFC_FUNCTION(lcd1), + SH_PFC_FUNCTION(mmc0), + SH_PFC_FUNCTION(sdhi0), + SH_PFC_FUNCTION(sdhi1), + SH_PFC_FUNCTION(sdhi2), +}; +#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) + +static const struct pinmux_func pinmux_func_gpios[] = { /* IRQ */ GPIO_FN(IRQ0_PORT2), GPIO_FN(IRQ0_PORT13), GPIO_FN(IRQ1), @@ -1792,43 +2313,6 @@ static struct pinmux_gpio pinmux_gpios[] = { GPIO_FN(SCIFB_RTS_PORT172), GPIO_FN(SCIFB_CTS_PORT173), - /* LCD0 */ - GPIO_FN(LCD0_D0), GPIO_FN(LCD0_D1), GPIO_FN(LCD0_D2), - GPIO_FN(LCD0_D3), GPIO_FN(LCD0_D4), GPIO_FN(LCD0_D5), - GPIO_FN(LCD0_D6), GPIO_FN(LCD0_D7), GPIO_FN(LCD0_D8), - GPIO_FN(LCD0_D9), GPIO_FN(LCD0_D10), GPIO_FN(LCD0_D11), - GPIO_FN(LCD0_D12), GPIO_FN(LCD0_D13), GPIO_FN(LCD0_D14), - GPIO_FN(LCD0_D15), GPIO_FN(LCD0_D16), GPIO_FN(LCD0_D17), - GPIO_FN(LCD0_DON), GPIO_FN(LCD0_VCPWC), GPIO_FN(LCD0_VEPWC), - GPIO_FN(LCD0_DCK), GPIO_FN(LCD0_VSYN), - GPIO_FN(LCD0_HSYN), GPIO_FN(LCD0_DISP), - GPIO_FN(LCD0_WR), GPIO_FN(LCD0_RD), - GPIO_FN(LCD0_CS), GPIO_FN(LCD0_RS), - - GPIO_FN(LCD0_D18_PORT163), GPIO_FN(LCD0_D19_PORT162), - GPIO_FN(LCD0_D20_PORT161), GPIO_FN(LCD0_D21_PORT158), - GPIO_FN(LCD0_D22_PORT160), GPIO_FN(LCD0_D23_PORT159), - GPIO_FN(LCD0_LCLK_PORT165), /* MSEL5CR_6_1 */ - - GPIO_FN(LCD0_D18_PORT40), GPIO_FN(LCD0_D19_PORT4), - GPIO_FN(LCD0_D20_PORT3), GPIO_FN(LCD0_D21_PORT2), - GPIO_FN(LCD0_D22_PORT0), GPIO_FN(LCD0_D23_PORT1), - GPIO_FN(LCD0_LCLK_PORT102), /* MSEL5CR_6_0 */ - - /* LCD1 */ - GPIO_FN(LCD1_D0), GPIO_FN(LCD1_D1), GPIO_FN(LCD1_D2), - GPIO_FN(LCD1_D3), GPIO_FN(LCD1_D4), GPIO_FN(LCD1_D5), - GPIO_FN(LCD1_D6), GPIO_FN(LCD1_D7), GPIO_FN(LCD1_D8), - GPIO_FN(LCD1_D9), GPIO_FN(LCD1_D10), GPIO_FN(LCD1_D11), - GPIO_FN(LCD1_D12), GPIO_FN(LCD1_D13), GPIO_FN(LCD1_D14), - GPIO_FN(LCD1_D15), GPIO_FN(LCD1_D16), GPIO_FN(LCD1_D17), - GPIO_FN(LCD1_D18), GPIO_FN(LCD1_D19), GPIO_FN(LCD1_D20), - GPIO_FN(LCD1_D21), GPIO_FN(LCD1_D22), GPIO_FN(LCD1_D23), - GPIO_FN(LCD1_RS), GPIO_FN(LCD1_RD), GPIO_FN(LCD1_CS), - GPIO_FN(LCD1_WR), GPIO_FN(LCD1_DCK), GPIO_FN(LCD1_DON), - GPIO_FN(LCD1_VCPWC), GPIO_FN(LCD1_LCLK), GPIO_FN(LCD1_HSYN), - GPIO_FN(LCD1_VSYN), GPIO_FN(LCD1_VEPWC), GPIO_FN(LCD1_DISP), - /* RSPI */ GPIO_FN(RSPI_SSL0_A), GPIO_FN(RSPI_SSL1_A), GPIO_FN(RSPI_SSL2_A), GPIO_FN(RSPI_SSL3_A), GPIO_FN(RSPI_CK_A), GPIO_FN(RSPI_MOSI_A), @@ -1889,26 +2373,6 @@ static struct pinmux_gpio pinmux_gpios[] = { GPIO_FN(SIM_D_PORT22), /* SIM_D Port 22/199 */ GPIO_FN(SIM_D_PORT199), - /* SDHI0 */ - GPIO_FN(SDHI0_D0), GPIO_FN(SDHI0_D1), GPIO_FN(SDHI0_D2), - GPIO_FN(SDHI0_D3), GPIO_FN(SDHI0_CD), GPIO_FN(SDHI0_WP), - GPIO_FN(SDHI0_CMD), GPIO_FN(SDHI0_CLK), - - /* SDHI1 */ - GPIO_FN(SDHI1_D0), GPIO_FN(SDHI1_D1), GPIO_FN(SDHI1_D2), - GPIO_FN(SDHI1_D3), GPIO_FN(SDHI1_CD), GPIO_FN(SDHI1_WP), - GPIO_FN(SDHI1_CMD), GPIO_FN(SDHI1_CLK), - - /* SDHI2 */ - GPIO_FN(SDHI2_D0), GPIO_FN(SDHI2_D1), GPIO_FN(SDHI2_D2), - GPIO_FN(SDHI2_D3), GPIO_FN(SDHI2_CLK), GPIO_FN(SDHI2_CMD), - - GPIO_FN(SDHI2_CD_PORT24), /* MSEL5CR_19_0 */ - GPIO_FN(SDHI2_WP_PORT25), - - GPIO_FN(SDHI2_WP_PORT177), /* MSEL5CR_19_1 */ - GPIO_FN(SDHI2_CD_PORT202), - /* MSIOF2 */ GPIO_FN(MSIOF2_TXD), GPIO_FN(MSIOF2_RXD), GPIO_FN(MSIOF2_TSCK), GPIO_FN(MSIOF2_SS2), GPIO_FN(MSIOF2_TSYNC), GPIO_FN(MSIOF2_SS1), @@ -1953,21 +2417,6 @@ static struct pinmux_gpio pinmux_gpios[] = { GPIO_FN(MEMC_WAIT), GPIO_FN(MEMC_DREQ1), GPIO_FN(MEMC_BUSCLK), GPIO_FN(MEMC_A0), - /* MMC */ - GPIO_FN(MMC0_D0_PORT68), GPIO_FN(MMC0_D1_PORT69), - GPIO_FN(MMC0_D2_PORT70), GPIO_FN(MMC0_D3_PORT71), - GPIO_FN(MMC0_D4_PORT72), GPIO_FN(MMC0_D5_PORT73), - GPIO_FN(MMC0_D6_PORT74), GPIO_FN(MMC0_D7_PORT75), - GPIO_FN(MMC0_CLK_PORT66), - GPIO_FN(MMC0_CMD_PORT67), /* MSEL4CR_15_0 */ - - GPIO_FN(MMC1_D0_PORT149), GPIO_FN(MMC1_D1_PORT148), - GPIO_FN(MMC1_D2_PORT147), GPIO_FN(MMC1_D3_PORT146), - GPIO_FN(MMC1_D4_PORT145), GPIO_FN(MMC1_D5_PORT144), - GPIO_FN(MMC1_D6_PORT143), GPIO_FN(MMC1_D7_PORT142), - GPIO_FN(MMC1_CLK_PORT103), - GPIO_FN(MMC1_CMD_PORT104), /* MSEL4CR_15_1 */ - /* MSIOF0 */ GPIO_FN(MSIOF0_SS1), GPIO_FN(MSIOF0_SS2), GPIO_FN(MSIOF0_RXD), GPIO_FN(MSIOF0_TXD), GPIO_FN(MSIOF0_MCK0), GPIO_FN(MSIOF0_MCK1), @@ -2126,7 +2575,7 @@ static struct pinmux_gpio pinmux_gpios[] = { GPIO_FN(TRACEAUD_FROM_MEMC), }; -static struct pinmux_cfg_reg pinmux_config_regs[] = { +static const struct pinmux_cfg_reg pinmux_config_regs[] = { PORTCR(0, 0xe6050000), /* PORT0CR */ PORTCR(1, 0xe6050001), /* PORT1CR */ PORTCR(2, 0xe6050002), /* PORT2CR */ @@ -2440,7 +2889,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { { }, }; -static struct pinmux_data_reg pinmux_data_regs[] = { +static const struct pinmux_data_reg pinmux_data_regs[] = { { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054800, 32) { PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA, PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA, @@ -2544,7 +2993,7 @@ static struct pinmux_data_reg pinmux_data_regs[] = { { }, }; -static struct pinmux_irq pinmux_irqs[] = { +static const struct pinmux_irq pinmux_irqs[] = { PINMUX_IRQ(irq_pin(0), GPIO_PORT2, GPIO_PORT13), /* IRQ0A */ PINMUX_IRQ(irq_pin(1), GPIO_PORT20), /* IRQ1A */ PINMUX_IRQ(irq_pin(2), GPIO_PORT11, GPIO_PORT12), /* IRQ2A */ @@ -2579,11 +3028,8 @@ static struct pinmux_irq pinmux_irqs[] = { PINMUX_IRQ(irq_pin(31), GPIO_PORT41, GPIO_PORT167),/* IRQ31A */ }; -struct sh_pfc_soc_info r8a7740_pinmux_info = { +const struct sh_pfc_soc_info r8a7740_pinmux_info = { .name = "r8a7740_pfc", - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, - PINMUX_DATA_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, @@ -2592,15 +3038,19 @@ struct sh_pfc_soc_info r8a7740_pinmux_info = { PINMUX_INPUT_PULLDOWN_END }, .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, - PINMUX_MARK_END }, .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - .first_gpio = GPIO_PORT0, - .last_gpio = GPIO_FN_TRACEAUD_FROM_MEMC, + .pins = pinmux_pins, + .nr_pins = ARRAY_SIZE(pinmux_pins), + .groups = pinmux_groups, + .nr_groups = ARRAY_SIZE(pinmux_groups), + .functions = pinmux_functions, + .nr_functions = ARRAY_SIZE(pinmux_functions), + + .func_gpios = pinmux_func_gpios, + .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios), - .gpios = pinmux_gpios, .cfg_regs = pinmux_config_regs, .data_regs = pinmux_data_regs, diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c index 13feaa0c0eb7..791a6719d8a9 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c @@ -19,57 +19,77 @@ */ #include <linux/kernel.h> -#include <mach/r8a7779.h> #include "sh_pfc.h" -#define CPU_32_PORT(fn, pfx, sfx) \ - PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ - PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \ - PORT_1(fn, pfx##31, sfx) - -#define CPU_32_PORT6(fn, pfx, sfx) \ - PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \ - PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \ - PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \ - PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \ - PORT_1(fn, pfx##8, sfx) - -#define CPU_ALL_PORT(fn, pfx, sfx) \ - CPU_32_PORT(fn, pfx##_0_, sfx), \ - CPU_32_PORT(fn, pfx##_1_, sfx), \ - CPU_32_PORT(fn, pfx##_2_, sfx), \ - CPU_32_PORT(fn, pfx##_3_, sfx), \ - CPU_32_PORT(fn, pfx##_4_, sfx), \ - CPU_32_PORT(fn, pfx##_5_, sfx), \ - CPU_32_PORT6(fn, pfx##_6_, sfx) - -#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA) -#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \ - GP##pfx##_IN, GP##pfx##_OUT) - -#define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT -#define _GP_INDT(pfx, sfx) GP##pfx##_DATA - -#define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str) -#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused) -#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused) - - -#define PORT_10_REV(fn, pfx, sfx) \ - PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \ - PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \ - PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \ - PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \ - PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx) - -#define CPU_32_PORT_REV(fn, pfx, sfx) \ - PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \ - PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \ - PORT_10_REV(fn, pfx, sfx) - -#define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused) -#define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused) +#define PORT_GP_1(bank, pin, fn, sfx) fn(bank, pin, GP_##bank##_##pin, sfx) + +#define PORT_GP_32(bank, fn, sfx) \ + PORT_GP_1(bank, 0, fn, sfx), PORT_GP_1(bank, 1, fn, sfx), \ + PORT_GP_1(bank, 2, fn, sfx), PORT_GP_1(bank, 3, fn, sfx), \ + PORT_GP_1(bank, 4, fn, sfx), PORT_GP_1(bank, 5, fn, sfx), \ + PORT_GP_1(bank, 6, fn, sfx), PORT_GP_1(bank, 7, fn, sfx), \ + PORT_GP_1(bank, 8, fn, sfx), PORT_GP_1(bank, 9, fn, sfx), \ + PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx), \ + PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx), \ + PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx), \ + PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx), \ + PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx), \ + PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx), \ + PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx), \ + PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx), \ + PORT_GP_1(bank, 26, fn, sfx), PORT_GP_1(bank, 27, fn, sfx), \ + PORT_GP_1(bank, 28, fn, sfx), PORT_GP_1(bank, 29, fn, sfx), \ + PORT_GP_1(bank, 30, fn, sfx), PORT_GP_1(bank, 31, fn, sfx) + +#define PORT_GP_32_9(bank, fn, sfx) \ + PORT_GP_1(bank, 0, fn, sfx), PORT_GP_1(bank, 1, fn, sfx), \ + PORT_GP_1(bank, 2, fn, sfx), PORT_GP_1(bank, 3, fn, sfx), \ + PORT_GP_1(bank, 4, fn, sfx), PORT_GP_1(bank, 5, fn, sfx), \ + PORT_GP_1(bank, 6, fn, sfx), PORT_GP_1(bank, 7, fn, sfx), \ + PORT_GP_1(bank, 8, fn, sfx) + +#define PORT_GP_32_REV(bank, fn, sfx) \ + PORT_GP_1(bank, 31, fn, sfx), PORT_GP_1(bank, 30, fn, sfx), \ + PORT_GP_1(bank, 29, fn, sfx), PORT_GP_1(bank, 28, fn, sfx), \ + PORT_GP_1(bank, 27, fn, sfx), PORT_GP_1(bank, 26, fn, sfx), \ + PORT_GP_1(bank, 25, fn, sfx), PORT_GP_1(bank, 24, fn, sfx), \ + PORT_GP_1(bank, 23, fn, sfx), PORT_GP_1(bank, 22, fn, sfx), \ + PORT_GP_1(bank, 21, fn, sfx), PORT_GP_1(bank, 20, fn, sfx), \ + PORT_GP_1(bank, 19, fn, sfx), PORT_GP_1(bank, 18, fn, sfx), \ + PORT_GP_1(bank, 17, fn, sfx), PORT_GP_1(bank, 16, fn, sfx), \ + PORT_GP_1(bank, 15, fn, sfx), PORT_GP_1(bank, 14, fn, sfx), \ + PORT_GP_1(bank, 13, fn, sfx), PORT_GP_1(bank, 12, fn, sfx), \ + PORT_GP_1(bank, 11, fn, sfx), PORT_GP_1(bank, 10, fn, sfx), \ + PORT_GP_1(bank, 9, fn, sfx), PORT_GP_1(bank, 8, fn, sfx), \ + PORT_GP_1(bank, 7, fn, sfx), PORT_GP_1(bank, 6, fn, sfx), \ + PORT_GP_1(bank, 5, fn, sfx), PORT_GP_1(bank, 4, fn, sfx), \ + PORT_GP_1(bank, 3, fn, sfx), PORT_GP_1(bank, 2, fn, sfx), \ + PORT_GP_1(bank, 1, fn, sfx), PORT_GP_1(bank, 0, fn, sfx) + +#define CPU_ALL_PORT(fn, sfx) \ + PORT_GP_32(0, fn, sfx), \ + PORT_GP_32(1, fn, sfx), \ + PORT_GP_32(2, fn, sfx), \ + PORT_GP_32(3, fn, sfx), \ + PORT_GP_32(4, fn, sfx), \ + PORT_GP_32(5, fn, sfx), \ + PORT_GP_32_9(6, fn, sfx) + +#define _GP_PORT_ALL(bank, pin, name, sfx) name##_##sfx + +#define _GP_GPIO(bank, pin, _name, sfx) \ + [(bank * 32) + pin] = { \ + .name = __stringify(_name), \ + .enum_id = _name##_DATA, \ + } + +#define _GP_DATA(bank, pin, name, sfx) \ + PINMUX_DATA(name##_DATA, name##_FN) + +#define GP_ALL(str) CPU_ALL_PORT(_GP_PORT_ALL, str) +#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, unused) +#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, unused) #define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn) #define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \ @@ -82,14 +102,6 @@ enum { GP_ALL(DATA), /* GP_0_0_DATA -> GP_6_8_DATA */ PINMUX_DATA_END, - PINMUX_INPUT_BEGIN, - GP_ALL(IN), /* GP_0_0_IN -> GP_6_8_IN */ - PINMUX_INPUT_END, - - PINMUX_OUTPUT_BEGIN, - GP_ALL(OUT), /* GP_0_0_OUT -> GP_6_8_OUT */ - PINMUX_OUTPUT_END, - PINMUX_FUNCTION_BEGIN, GP_ALL(FN), /* GP_0_0_FN -> GP_6_8_FN */ @@ -371,7 +383,7 @@ enum { FN_VI1_DATA6_VI1_B6, FN_SD2_CD, FN_MT0_VCXO, FN_SPA_TMS, FN_HSPI_TX1_D, FN_VI1_DATA7_VI1_B7, FN_SD2_WP, FN_MT0_PWM, FN_SPA_TDI, FN_HSPI_RX1_D, FN_VI1_G0, FN_VI3_DATA0, - FN_DU1_DOTCLKOUT1, FN_TS_SCK1, FN_DREQ2_B, FN_TX2, + FN_TS_SCK1, FN_DREQ2_B, FN_TX2, FN_SPA_TDO, FN_HCTS0_B, FN_VI1_G1, FN_VI3_DATA1, FN_SSI_SCK1, FN_TS_SDEN1, FN_DACK2_B, FN_RX2, FN_HRTS0_B, @@ -447,7 +459,8 @@ enum { A0_MARK, SD1_DAT3_MARK, MMC0_D3_MARK, FD3_MARK, BS_MARK, SD1_DAT2_MARK, MMC0_D2_MARK, FD2_MARK, ATADIR0_MARK, SDSELF_MARK, HCTS1_MARK, TX4_C_MARK, - USB_PENC2_MARK, SCK0_MARK, PWM1_MARK, PWMFSW0_MARK, + USB_PENC0_MARK, USB_PENC1_MARK, USB_PENC2_MARK, + SCK0_MARK, PWM1_MARK, PWMFSW0_MARK, SCIF_CLK_MARK, TCLK0_C_MARK, EX_CS0_MARK, RX3_C_IRDA_RX_C_MARK, MMC0_D6_MARK, @@ -632,7 +645,7 @@ enum { HSPI_CS1_D_MARK, ADICHS2_B_MARK, VI1_DATA6_VI1_B6_MARK, SD2_CD_MARK, MT0_VCXO_MARK, SPA_TMS_MARK, HSPI_TX1_D_MARK, VI1_DATA7_VI1_B7_MARK, SD2_WP_MARK, MT0_PWM_MARK, SPA_TDI_MARK, HSPI_RX1_D_MARK, - VI1_G0_MARK, VI3_DATA0_MARK, DU1_DOTCLKOUT1_MARK, TS_SCK1_MARK, + VI1_G0_MARK, VI3_DATA0_MARK, TS_SCK1_MARK, DREQ2_B_MARK, TX2_MARK, SPA_TDO_MARK, HCTS0_B_MARK, VI1_G1_MARK, VI3_DATA1_MARK, SSI_SCK1_MARK, TS_SDEN1_MARK, DACK2_B_MARK, RX2_MARK, HRTS0_B_MARK, @@ -649,7 +662,7 @@ enum { PINMUX_MARK_END, }; -static pinmux_enum_t pinmux_data[] = { +static const pinmux_enum_t pinmux_data[] = { PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */ PINMUX_DATA(AVS1_MARK, FN_AVS1), @@ -658,6 +671,9 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_DATA(A18_MARK, FN_A18), PINMUX_DATA(A19_MARK, FN_A19), + PINMUX_DATA(USB_PENC0_MARK, FN_USB_PENC0), + PINMUX_DATA(USB_PENC1_MARK, FN_USB_PENC1), + PINMUX_IPSR_DATA(IP0_2_0, USB_PENC2), PINMUX_IPSR_MODSEL_DATA(IP0_2_0, SCK0, SEL_SCIF0_0), PINMUX_IPSR_DATA(IP0_2_0, PWM1), @@ -1399,7 +1415,6 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_IPSR_MODSEL_DATA(IP11_23_21, HSPI_RX1_D, SEL_HSPI1_3), PINMUX_IPSR_DATA(IP11_26_24, VI1_G0), PINMUX_IPSR_DATA(IP11_26_24, VI3_DATA0), - PINMUX_IPSR_DATA(IP11_26_24, DU1_DOTCLKOUT1), PINMUX_IPSR_DATA(IP11_26_24, TS_SCK1), PINMUX_IPSR_MODSEL_DATA(IP11_26_24, DREQ2_B, SEL_EXBUS2_1), PINMUX_IPSR_DATA(IP11_26_24, TX2), @@ -1450,280 +1465,1260 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_IPSR_MODSEL_DATA(IP12_17_15, SCK4_B, SEL_SCIF4_1), }; -static struct pinmux_gpio pinmux_gpios[] = { +static struct sh_pfc_pin pinmux_pins[] = { PINMUX_GPIO_GP_ALL(), - GPIO_FN(AVS1), GPIO_FN(AVS2), GPIO_FN(A17), GPIO_FN(A18), - GPIO_FN(A19), +}; - /* IPSR0 */ - GPIO_FN(USB_PENC2), GPIO_FN(SCK0), GPIO_FN(PWM1), GPIO_FN(PWMFSW0), - GPIO_FN(SCIF_CLK), GPIO_FN(TCLK0_C), GPIO_FN(BS), GPIO_FN(SD1_DAT2), - GPIO_FN(MMC0_D2), GPIO_FN(FD2), GPIO_FN(ATADIR0), GPIO_FN(SDSELF), - GPIO_FN(HCTS1), GPIO_FN(TX4_C), GPIO_FN(A0), GPIO_FN(SD1_DAT3), - GPIO_FN(MMC0_D3), GPIO_FN(FD3), GPIO_FN(A20), GPIO_FN(TX5_D), - GPIO_FN(HSPI_TX2_B), GPIO_FN(A21), GPIO_FN(SCK5_D), - GPIO_FN(HSPI_CLK2_B), GPIO_FN(A22), GPIO_FN(RX5_D), - GPIO_FN(HSPI_RX2_B), GPIO_FN(VI1_R0), GPIO_FN(A23), GPIO_FN(FCLE), - GPIO_FN(HSPI_CLK2), GPIO_FN(VI1_R1), GPIO_FN(A24), GPIO_FN(SD1_CD), - GPIO_FN(MMC0_D4), GPIO_FN(FD4), GPIO_FN(HSPI_CS2), GPIO_FN(VI1_R2), - GPIO_FN(SSI_WS78_B), GPIO_FN(A25), GPIO_FN(SD1_WP), GPIO_FN(MMC0_D5), - GPIO_FN(FD5), GPIO_FN(HSPI_RX2), GPIO_FN(VI1_R3), GPIO_FN(TX5_B), - GPIO_FN(SSI_SDATA7_B), GPIO_FN(CTS0_B), GPIO_FN(CLKOUT), - GPIO_FN(TX3C_IRDA_TX_C), GPIO_FN(PWM0_B), GPIO_FN(CS0), - GPIO_FN(HSPI_CS2_B), GPIO_FN(CS1_A26), GPIO_FN(HSPI_TX2), - GPIO_FN(SDSELF_B), GPIO_FN(RD_WR), GPIO_FN(FWE), GPIO_FN(ATAG0), - GPIO_FN(VI1_R7), GPIO_FN(HRTS1), GPIO_FN(RX4_C), +/* - DU0 -------------------------------------------------------------------- */ +static const unsigned int du0_rgb666_pins[] = { + /* R[7:2], G[7:2], B[7:2] */ + 188, 187, 186, 185, 184, 183, + 194, 193, 192, 191, 190, 189, + 200, 199, 198, 197, 196, 195, +}; +static const unsigned int du0_rgb666_mux[] = { + DU0_DR7_MARK, DU0_DR6_MARK, DU0_DR5_MARK, DU0_DR4_MARK, + DU0_DR3_MARK, DU0_DR2_MARK, + DU0_DG7_MARK, DU0_DG6_MARK, DU0_DG5_MARK, DU0_DG4_MARK, + DU0_DG3_MARK, DU0_DG2_MARK, + DU0_DB7_MARK, DU0_DB6_MARK, DU0_DB5_MARK, DU0_DB4_MARK, + DU0_DB3_MARK, DU0_DB2_MARK, +}; +static const unsigned int du0_rgb888_pins[] = { + /* R[7:0], G[7:0], B[7:0] */ + 188, 187, 186, 185, 184, 183, 24, 23, + 194, 193, 192, 191, 190, 189, 26, 25, + 200, 199, 198, 197, 196, 195, 28, 27, +}; +static const unsigned int du0_rgb888_mux[] = { + DU0_DR7_MARK, DU0_DR6_MARK, DU0_DR5_MARK, DU0_DR4_MARK, + DU0_DR3_MARK, DU0_DR2_MARK, DU0_DR1_MARK, DU0_DR0_MARK, + DU0_DG7_MARK, DU0_DG6_MARK, DU0_DG5_MARK, DU0_DG4_MARK, + DU0_DG3_MARK, DU0_DG2_MARK, DU0_DG1_MARK, DU0_DG0_MARK, + DU0_DB7_MARK, DU0_DB6_MARK, DU0_DB5_MARK, DU0_DB4_MARK, + DU0_DB3_MARK, DU0_DB2_MARK, DU0_DB1_MARK, DU0_DB0_MARK, +}; +static const unsigned int du0_clk_in_pins[] = { + /* CLKIN */ + 29, +}; +static const unsigned int du0_clk_in_mux[] = { + DU0_DOTCLKIN_MARK, +}; +static const unsigned int du0_clk_out_0_pins[] = { + /* CLKOUT */ + 180, +}; +static const unsigned int du0_clk_out_0_mux[] = { + DU0_DOTCLKOUT0_MARK, +}; +static const unsigned int du0_clk_out_1_pins[] = { + /* CLKOUT */ + 30, +}; +static const unsigned int du0_clk_out_1_mux[] = { + DU0_DOTCLKOUT1_MARK, +}; +static const unsigned int du0_sync_0_pins[] = { + /* VSYNC, HSYNC, DISP */ + 182, 181, 31, +}; +static const unsigned int du0_sync_0_mux[] = { + DU0_EXHSYNC_DU0_HSYNC_MARK, DU0_EXVSYNC_DU0_VSYNC_MARK, + DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK +}; +static const unsigned int du0_sync_1_pins[] = { + /* VSYNC, HSYNC, DISP */ + 182, 181, 32, +}; +static const unsigned int du0_sync_1_mux[] = { + DU0_EXHSYNC_DU0_HSYNC_MARK, DU0_EXVSYNC_DU0_VSYNC_MARK, + DU0_DISP_MARK +}; +static const unsigned int du0_oddf_pins[] = { + /* ODDF */ + 31, +}; +static const unsigned int du0_oddf_mux[] = { + DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK +}; +static const unsigned int du0_cde_pins[] = { + /* CDE */ + 33, +}; +static const unsigned int du0_cde_mux[] = { + DU0_CDE_MARK +}; +/* - DU1 -------------------------------------------------------------------- */ +static const unsigned int du1_rgb666_pins[] = { + /* R[7:2], G[7:2], B[7:2] */ + 41, 40, 39, 38, 37, 36, + 49, 48, 47, 46, 45, 44, + 57, 56, 55, 54, 53, 52, +}; +static const unsigned int du1_rgb666_mux[] = { + DU1_DR7_MARK, DU1_DR6_MARK, DU1_DR5_MARK, DU1_DR4_MARK, + DU1_DR3_MARK, DU1_DR2_MARK, + DU1_DG7_MARK, DU1_DG6_MARK, DU1_DG5_MARK, DU1_DG4_MARK, + DU1_DG3_MARK, DU1_DG2_MARK, + DU1_DB7_MARK, DU1_DB6_MARK, DU1_DB5_MARK, DU1_DB4_MARK, + DU1_DB3_MARK, DU1_DB2_MARK, +}; +static const unsigned int du1_rgb888_pins[] = { + /* R[7:0], G[7:0], B[7:0] */ + 41, 40, 39, 38, 37, 36, 35, 34, + 49, 48, 47, 46, 45, 44, 43, 32, + 57, 56, 55, 54, 53, 52, 51, 50, +}; +static const unsigned int du1_rgb888_mux[] = { + DU1_DR7_MARK, DU1_DR6_MARK, DU1_DR5_MARK, DU1_DR4_MARK, + DU1_DR3_MARK, DU1_DR2_MARK, DU1_DR1_MARK, DU1_DR0_MARK, + DU1_DG7_MARK, DU1_DG6_MARK, DU1_DG5_MARK, DU1_DG4_MARK, + DU1_DG3_MARK, DU1_DG2_MARK, DU1_DG1_MARK, DU1_DG0_MARK, + DU1_DB7_MARK, DU1_DB6_MARK, DU1_DB5_MARK, DU1_DB4_MARK, + DU1_DB3_MARK, DU1_DB2_MARK, DU1_DB1_MARK, DU1_DB0_MARK, +}; +static const unsigned int du1_clk_in_pins[] = { + /* CLKIN */ + 58, +}; +static const unsigned int du1_clk_in_mux[] = { + DU1_DOTCLKIN_MARK, +}; +static const unsigned int du1_clk_out_pins[] = { + /* CLKOUT */ + 59, +}; +static const unsigned int du1_clk_out_mux[] = { + DU1_DOTCLKOUT_MARK, +}; +static const unsigned int du1_sync_0_pins[] = { + /* VSYNC, HSYNC, DISP */ + 61, 60, 62, +}; +static const unsigned int du1_sync_0_mux[] = { + DU1_EXVSYNC_DU1_VSYNC_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK, + DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK +}; +static const unsigned int du1_sync_1_pins[] = { + /* VSYNC, HSYNC, DISP */ + 61, 60, 63, +}; +static const unsigned int du1_sync_1_mux[] = { + DU1_EXVSYNC_DU1_VSYNC_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK, + DU1_DISP_MARK +}; +static const unsigned int du1_oddf_pins[] = { + /* ODDF */ + 62, +}; +static const unsigned int du1_oddf_mux[] = { + DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK +}; +static const unsigned int du1_cde_pins[] = { + /* CDE */ + 64, +}; +static const unsigned int du1_cde_mux[] = { + DU1_CDE_MARK +}; +/* - HSPI0 ------------------------------------------------------------------ */ +static const unsigned int hspi0_pins[] = { + /* CLK, CS, RX, TX */ + 150, 151, 153, 152, +}; +static const unsigned int hspi0_mux[] = { + HSPI_CLK0_MARK, HSPI_CS0_MARK, HSPI_RX0_MARK, HSPI_TX0_MARK, +}; +/* - HSPI1 ------------------------------------------------------------------ */ +static const unsigned int hspi1_pins[] = { + /* CLK, CS, RX, TX */ + 63, 58, 64, 62, +}; +static const unsigned int hspi1_mux[] = { + HSPI_CLK1_MARK, HSPI_CS1_MARK, HSPI_RX1_MARK, HSPI_TX1_MARK, +}; +static const unsigned int hspi1_b_pins[] = { + /* CLK, CS, RX, TX */ + 90, 91, 93, 92, +}; +static const unsigned int hspi1_b_mux[] = { + HSPI_CLK1_B_MARK, HSPI_CS1_B_MARK, HSPI_RX1_B_MARK, HSPI_TX1_B_MARK, +}; +static const unsigned int hspi1_c_pins[] = { + /* CLK, CS, RX, TX */ + 141, 142, 144, 143, +}; +static const unsigned int hspi1_c_mux[] = { + HSPI_CLK1_C_MARK, HSPI_CS1_C_MARK, HSPI_RX1_C_MARK, HSPI_TX1_C_MARK, +}; +static const unsigned int hspi1_d_pins[] = { + /* CLK, CS, RX, TX */ + 101, 102, 104, 103, +}; +static const unsigned int hspi1_d_mux[] = { + HSPI_CLK1_D_MARK, HSPI_CS1_D_MARK, HSPI_RX1_D_MARK, HSPI_TX1_D_MARK, +}; +/* - HSPI2 ------------------------------------------------------------------ */ +static const unsigned int hspi2_pins[] = { + /* CLK, CS, RX, TX */ + 9, 10, 11, 14, +}; +static const unsigned int hspi2_mux[] = { + HSPI_CLK2_MARK, HSPI_CS2_MARK, HSPI_RX2_MARK, HSPI_TX2_MARK, +}; +static const unsigned int hspi2_b_pins[] = { + /* CLK, CS, RX, TX */ + 7, 13, 8, 6, +}; +static const unsigned int hspi2_b_mux[] = { + HSPI_CLK2_B_MARK, HSPI_CS2_B_MARK, HSPI_RX2_B_MARK, HSPI_TX2_B_MARK, +}; +/* - INTC ------------------------------------------------------------------- */ +static const unsigned int intc_irq0_pins[] = { + /* IRQ */ + 78, +}; +static const unsigned int intc_irq0_mux[] = { + IRQ0_MARK, +}; +static const unsigned int intc_irq0_b_pins[] = { + /* IRQ */ + 141, +}; +static const unsigned int intc_irq0_b_mux[] = { + IRQ0_B_MARK, +}; +static const unsigned int intc_irq1_pins[] = { + /* IRQ */ + 79, +}; +static const unsigned int intc_irq1_mux[] = { + IRQ1_MARK, +}; +static const unsigned int intc_irq1_b_pins[] = { + /* IRQ */ + 142, +}; +static const unsigned int intc_irq1_b_mux[] = { + IRQ1_B_MARK, +}; +static const unsigned int intc_irq2_pins[] = { + /* IRQ */ + 88, +}; +static const unsigned int intc_irq2_mux[] = { + IRQ2_MARK, +}; +static const unsigned int intc_irq2_b_pins[] = { + /* IRQ */ + 143, +}; +static const unsigned int intc_irq2_b_mux[] = { + IRQ2_B_MARK, +}; +static const unsigned int intc_irq3_pins[] = { + /* IRQ */ + 89, +}; +static const unsigned int intc_irq3_mux[] = { + IRQ3_MARK, +}; +static const unsigned int intc_irq3_b_pins[] = { + /* IRQ */ + 144, +}; +static const unsigned int intc_irq3_b_mux[] = { + IRQ3_B_MARK, +}; +/* - LSBC ------------------------------------------------------------------- */ +static const unsigned int lbsc_cs0_pins[] = { + /* CS */ + 13, +}; +static const unsigned int lbsc_cs0_mux[] = { + CS0_MARK, +}; +static const unsigned int lbsc_cs1_pins[] = { + /* CS */ + 14, +}; +static const unsigned int lbsc_cs1_mux[] = { + CS1_A26_MARK, +}; +static const unsigned int lbsc_ex_cs0_pins[] = { + /* CS */ + 15, +}; +static const unsigned int lbsc_ex_cs0_mux[] = { + EX_CS0_MARK, +}; +static const unsigned int lbsc_ex_cs1_pins[] = { + /* CS */ + 16, +}; +static const unsigned int lbsc_ex_cs1_mux[] = { + EX_CS1_MARK, +}; +static const unsigned int lbsc_ex_cs2_pins[] = { + /* CS */ + 17, +}; +static const unsigned int lbsc_ex_cs2_mux[] = { + EX_CS2_MARK, +}; +static const unsigned int lbsc_ex_cs3_pins[] = { + /* CS */ + 18, +}; +static const unsigned int lbsc_ex_cs3_mux[] = { + EX_CS3_MARK, +}; +static const unsigned int lbsc_ex_cs4_pins[] = { + /* CS */ + 19, +}; +static const unsigned int lbsc_ex_cs4_mux[] = { + EX_CS4_MARK, +}; +static const unsigned int lbsc_ex_cs5_pins[] = { + /* CS */ + 20, +}; +static const unsigned int lbsc_ex_cs5_mux[] = { + EX_CS5_MARK, +}; +/* - MMCIF ------------------------------------------------------------------ */ +static const unsigned int mmc0_data1_pins[] = { + /* D[0] */ + 19, +}; +static const unsigned int mmc0_data1_mux[] = { + MMC0_D0_MARK, +}; +static const unsigned int mmc0_data4_pins[] = { + /* D[0:3] */ + 19, 20, 21, 2, +}; +static const unsigned int mmc0_data4_mux[] = { + MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK, +}; +static const unsigned int mmc0_data8_pins[] = { + /* D[0:7] */ + 19, 20, 21, 2, 10, 11, 15, 16, +}; +static const unsigned int mmc0_data8_mux[] = { + MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK, + MMC0_D4_MARK, MMC0_D5_MARK, MMC0_D6_MARK, MMC0_D7_MARK, +}; +static const unsigned int mmc0_ctrl_pins[] = { + /* CMD, CLK */ + 18, 17, +}; +static const unsigned int mmc0_ctrl_mux[] = { + MMC0_CMD_MARK, MMC0_CLK_MARK, +}; +static const unsigned int mmc1_data1_pins[] = { + /* D[0] */ + 72, +}; +static const unsigned int mmc1_data1_mux[] = { + MMC1_D0_MARK, +}; +static const unsigned int mmc1_data4_pins[] = { + /* D[0:3] */ + 72, 73, 74, 75, +}; +static const unsigned int mmc1_data4_mux[] = { + MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK, +}; +static const unsigned int mmc1_data8_pins[] = { + /* D[0:7] */ + 72, 73, 74, 75, 76, 77, 80, 81, +}; +static const unsigned int mmc1_data8_mux[] = { + MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK, + MMC1_D4_MARK, MMC1_D5_MARK, MMC1_D6_MARK, MMC1_D7_MARK, +}; +static const unsigned int mmc1_ctrl_pins[] = { + /* CMD, CLK */ + 68, 65, +}; +static const unsigned int mmc1_ctrl_mux[] = { + MMC1_CMD_MARK, MMC1_CLK_MARK, +}; +/* - SCIF0 ------------------------------------------------------------------ */ +static const unsigned int scif0_data_pins[] = { + /* RXD, TXD */ + 153, 152, +}; +static const unsigned int scif0_data_mux[] = { + RX0_MARK, TX0_MARK, +}; +static const unsigned int scif0_clk_pins[] = { + /* SCK */ + 156, +}; +static const unsigned int scif0_clk_mux[] = { + SCK0_MARK, +}; +static const unsigned int scif0_ctrl_pins[] = { + /* RTS, CTS */ + 151, 150, +}; +static const unsigned int scif0_ctrl_mux[] = { + RTS0_TANS_MARK, CTS0_MARK, +}; +static const unsigned int scif0_data_b_pins[] = { + /* RXD, TXD */ + 20, 19, +}; +static const unsigned int scif0_data_b_mux[] = { + RX0_B_MARK, TX0_B_MARK, +}; +static const unsigned int scif0_clk_b_pins[] = { + /* SCK */ + 33, +}; +static const unsigned int scif0_clk_b_mux[] = { + SCK0_B_MARK, +}; +static const unsigned int scif0_ctrl_b_pins[] = { + /* RTS, CTS */ + 18, 11, +}; +static const unsigned int scif0_ctrl_b_mux[] = { + RTS0_B_TANS_B_MARK, CTS0_B_MARK, +}; +static const unsigned int scif0_data_c_pins[] = { + /* RXD, TXD */ + 146, 147, +}; +static const unsigned int scif0_data_c_mux[] = { + RX0_C_MARK, TX0_C_MARK, +}; +static const unsigned int scif0_clk_c_pins[] = { + /* SCK */ + 145, +}; +static const unsigned int scif0_clk_c_mux[] = { + SCK0_C_MARK, +}; +static const unsigned int scif0_ctrl_c_pins[] = { + /* RTS, CTS */ + 149, 148, +}; +static const unsigned int scif0_ctrl_c_mux[] = { + RTS0_C_TANS_C_MARK, CTS0_C_MARK, +}; +static const unsigned int scif0_data_d_pins[] = { + /* RXD, TXD */ + 43, 42, +}; +static const unsigned int scif0_data_d_mux[] = { + RX0_D_MARK, TX0_D_MARK, +}; +static const unsigned int scif0_clk_d_pins[] = { + /* SCK */ + 50, +}; +static const unsigned int scif0_clk_d_mux[] = { + SCK0_D_MARK, +}; +static const unsigned int scif0_ctrl_d_pins[] = { + /* RTS, CTS */ + 51, 35, +}; +static const unsigned int scif0_ctrl_d_mux[] = { + RTS0_D_TANS_D_MARK, CTS0_D_MARK, +}; +/* - SCIF1 ------------------------------------------------------------------ */ +static const unsigned int scif1_data_pins[] = { + /* RXD, TXD */ + 149, 148, +}; +static const unsigned int scif1_data_mux[] = { + RX1_MARK, TX1_MARK, +}; +static const unsigned int scif1_clk_pins[] = { + /* SCK */ + 145, +}; +static const unsigned int scif1_clk_mux[] = { + SCK1_MARK, +}; +static const unsigned int scif1_ctrl_pins[] = { + /* RTS, CTS */ + 147, 146, +}; +static const unsigned int scif1_ctrl_mux[] = { + RTS1_TANS_MARK, CTS1_MARK, +}; +static const unsigned int scif1_data_b_pins[] = { + /* RXD, TXD */ + 117, 114, +}; +static const unsigned int scif1_data_b_mux[] = { + RX1_B_MARK, TX1_B_MARK, +}; +static const unsigned int scif1_clk_b_pins[] = { + /* SCK */ + 113, +}; +static const unsigned int scif1_clk_b_mux[] = { + SCK1_B_MARK, +}; +static const unsigned int scif1_ctrl_b_pins[] = { + /* RTS, CTS */ + 115, 116, +}; +static const unsigned int scif1_ctrl_b_mux[] = { + RTS1_B_TANS_B_MARK, CTS1_B_MARK, +}; +static const unsigned int scif1_data_c_pins[] = { + /* RXD, TXD */ + 67, 66, +}; +static const unsigned int scif1_data_c_mux[] = { + RX1_C_MARK, TX1_C_MARK, +}; +static const unsigned int scif1_clk_c_pins[] = { + /* SCK */ + 86, +}; +static const unsigned int scif1_clk_c_mux[] = { + SCK1_C_MARK, +}; +static const unsigned int scif1_ctrl_c_pins[] = { + /* RTS, CTS */ + 69, 68, +}; +static const unsigned int scif1_ctrl_c_mux[] = { + RTS1_C_TANS_C_MARK, CTS1_C_MARK, +}; +/* - SCIF2 ------------------------------------------------------------------ */ +static const unsigned int scif2_data_pins[] = { + /* RXD, TXD */ + 106, 105, +}; +static const unsigned int scif2_data_mux[] = { + RX2_MARK, TX2_MARK, +}; +static const unsigned int scif2_clk_pins[] = { + /* SCK */ + 107, +}; +static const unsigned int scif2_clk_mux[] = { + SCK2_MARK, +}; +static const unsigned int scif2_data_b_pins[] = { + /* RXD, TXD */ + 120, 119, +}; +static const unsigned int scif2_data_b_mux[] = { + RX2_B_MARK, TX2_B_MARK, +}; +static const unsigned int scif2_clk_b_pins[] = { + /* SCK */ + 118, +}; +static const unsigned int scif2_clk_b_mux[] = { + SCK2_B_MARK, +}; +static const unsigned int scif2_data_c_pins[] = { + /* RXD, TXD */ + 33, 31, +}; +static const unsigned int scif2_data_c_mux[] = { + RX2_C_MARK, TX2_C_MARK, +}; +static const unsigned int scif2_clk_c_pins[] = { + /* SCK */ + 32, +}; +static const unsigned int scif2_clk_c_mux[] = { + SCK2_C_MARK, +}; +static const unsigned int scif2_data_d_pins[] = { + /* RXD, TXD */ + 64, 62, +}; +static const unsigned int scif2_data_d_mux[] = { + RX2_D_MARK, TX2_D_MARK, +}; +static const unsigned int scif2_clk_d_pins[] = { + /* SCK */ + 63, +}; +static const unsigned int scif2_clk_d_mux[] = { + SCK2_D_MARK, +}; +static const unsigned int scif2_data_e_pins[] = { + /* RXD, TXD */ + 20, 19, +}; +static const unsigned int scif2_data_e_mux[] = { + RX2_E_MARK, TX2_E_MARK, +}; +/* - SCIF3 ------------------------------------------------------------------ */ +static const unsigned int scif3_data_pins[] = { + /* RXD, TXD */ + 137, 136, +}; +static const unsigned int scif3_data_mux[] = { + RX3_IRDA_RX_MARK, TX3_IRDA_TX_MARK, +}; +static const unsigned int scif3_clk_pins[] = { + /* SCK */ + 135, +}; +static const unsigned int scif3_clk_mux[] = { + SCK3_MARK, +}; - /* IPSR1 */ - GPIO_FN(EX_CS0), GPIO_FN(RX3_C_IRDA_RX_C), GPIO_FN(MMC0_D6), - GPIO_FN(FD6), GPIO_FN(EX_CS1), GPIO_FN(MMC0_D7), GPIO_FN(FD7), - GPIO_FN(EX_CS2), GPIO_FN(SD1_CLK), GPIO_FN(MMC0_CLK), GPIO_FN(FALE), - GPIO_FN(ATACS00), GPIO_FN(EX_CS3), GPIO_FN(SD1_CMD), GPIO_FN(MMC0_CMD), - GPIO_FN(FRE), GPIO_FN(ATACS10), GPIO_FN(VI1_R4), GPIO_FN(RX5_B), - GPIO_FN(HSCK1), GPIO_FN(SSI_SDATA8_B), GPIO_FN(RTS0_B_TANS_B), - GPIO_FN(SSI_SDATA9), GPIO_FN(EX_CS4), GPIO_FN(SD1_DAT0), - GPIO_FN(MMC0_D0), GPIO_FN(FD0), GPIO_FN(ATARD0), GPIO_FN(VI1_R5), - GPIO_FN(SCK5_B), GPIO_FN(HTX1), GPIO_FN(TX2_E), GPIO_FN(TX0_B), - GPIO_FN(SSI_SCK9), GPIO_FN(EX_CS5), GPIO_FN(SD1_DAT1), - GPIO_FN(MMC0_D1), GPIO_FN(FD1), GPIO_FN(ATAWR0), GPIO_FN(VI1_R6), - GPIO_FN(HRX1), GPIO_FN(RX2_E), GPIO_FN(RX0_B), GPIO_FN(SSI_WS9), - GPIO_FN(MLB_CLK), GPIO_FN(PWM2), GPIO_FN(SCK4), GPIO_FN(MLB_SIG), - GPIO_FN(PWM3), GPIO_FN(TX4), GPIO_FN(MLB_DAT), GPIO_FN(PWM4), - GPIO_FN(RX4), GPIO_FN(HTX0), GPIO_FN(TX1), GPIO_FN(SDATA), - GPIO_FN(CTS0_C), GPIO_FN(SUB_TCK), GPIO_FN(CC5_STATE2), - GPIO_FN(CC5_STATE10), GPIO_FN(CC5_STATE18), GPIO_FN(CC5_STATE26), - GPIO_FN(CC5_STATE34), +static const unsigned int scif3_data_b_pins[] = { + /* RXD, TXD */ + 64, 62, +}; +static const unsigned int scif3_data_b_mux[] = { + RX3_B_IRDA_RX_B_MARK, TX3_B_IRDA_TX_B_MARK, +}; +static const unsigned int scif3_data_c_pins[] = { + /* RXD, TXD */ + 15, 12, +}; +static const unsigned int scif3_data_c_mux[] = { + RX3_C_IRDA_RX_C_MARK, TX3C_IRDA_TX_C_MARK, +}; +static const unsigned int scif3_data_d_pins[] = { + /* RXD, TXD */ + 30, 29, +}; +static const unsigned int scif3_data_d_mux[] = { + RX3_D_IRDA_RX_D_MARK, TX3_D_IRDA_TX_D_MARK, +}; +static const unsigned int scif3_data_e_pins[] = { + /* RXD, TXD */ + 35, 34, +}; +static const unsigned int scif3_data_e_mux[] = { + RX3_E_IRDA_RX_E_MARK, TX3_E_IRDA_TX_E_MARK, +}; +static const unsigned int scif3_clk_e_pins[] = { + /* SCK */ + 42, +}; +static const unsigned int scif3_clk_e_mux[] = { + SCK3_E_MARK, +}; +/* - SCIF4 ------------------------------------------------------------------ */ +static const unsigned int scif4_data_pins[] = { + /* RXD, TXD */ + 123, 122, +}; +static const unsigned int scif4_data_mux[] = { + RX4_MARK, TX4_MARK, +}; +static const unsigned int scif4_clk_pins[] = { + /* SCK */ + 121, +}; +static const unsigned int scif4_clk_mux[] = { + SCK4_MARK, +}; +static const unsigned int scif4_data_b_pins[] = { + /* RXD, TXD */ + 111, 110, +}; +static const unsigned int scif4_data_b_mux[] = { + RX4_B_MARK, TX4_B_MARK, +}; +static const unsigned int scif4_clk_b_pins[] = { + /* SCK */ + 112, +}; +static const unsigned int scif4_clk_b_mux[] = { + SCK4_B_MARK, +}; +static const unsigned int scif4_data_c_pins[] = { + /* RXD, TXD */ + 22, 21, +}; +static const unsigned int scif4_data_c_mux[] = { + RX4_C_MARK, TX4_C_MARK, +}; +static const unsigned int scif4_data_d_pins[] = { + /* RXD, TXD */ + 69, 68, +}; +static const unsigned int scif4_data_d_mux[] = { + RX4_D_MARK, TX4_D_MARK, +}; +/* - SCIF5 ------------------------------------------------------------------ */ +static const unsigned int scif5_data_pins[] = { + /* RXD, TXD */ + 51, 50, +}; +static const unsigned int scif5_data_mux[] = { + RX5_MARK, TX5_MARK, +}; +static const unsigned int scif5_clk_pins[] = { + /* SCK */ + 43, +}; +static const unsigned int scif5_clk_mux[] = { + SCK5_MARK, +}; +static const unsigned int scif5_data_b_pins[] = { + /* RXD, TXD */ + 18, 11, +}; +static const unsigned int scif5_data_b_mux[] = { + RX5_B_MARK, TX5_B_MARK, +}; +static const unsigned int scif5_clk_b_pins[] = { + /* SCK */ + 19, +}; +static const unsigned int scif5_clk_b_mux[] = { + SCK5_B_MARK, +}; +static const unsigned int scif5_data_c_pins[] = { + /* RXD, TXD */ + 24, 23, +}; +static const unsigned int scif5_data_c_mux[] = { + RX5_C_MARK, TX5_C_MARK, +}; +static const unsigned int scif5_clk_c_pins[] = { + /* SCK */ + 28, +}; +static const unsigned int scif5_clk_c_mux[] = { + SCK5_C_MARK, +}; +static const unsigned int scif5_data_d_pins[] = { + /* RXD, TXD */ + 8, 6, +}; +static const unsigned int scif5_data_d_mux[] = { + RX5_D_MARK, TX5_D_MARK, +}; +static const unsigned int scif5_clk_d_pins[] = { + /* SCK */ + 7, +}; +static const unsigned int scif5_clk_d_mux[] = { + SCK5_D_MARK, +}; +/* - SDHI0 ------------------------------------------------------------------ */ +static const unsigned int sdhi0_data1_pins[] = { + /* D0 */ + 117, +}; +static const unsigned int sdhi0_data1_mux[] = { + SD0_DAT0_MARK, +}; +static const unsigned int sdhi0_data4_pins[] = { + /* D[0:3] */ + 117, 118, 119, 120, +}; +static const unsigned int sdhi0_data4_mux[] = { + SD0_DAT0_MARK, SD0_DAT1_MARK, SD0_DAT2_MARK, SD0_DAT3_MARK, +}; +static const unsigned int sdhi0_ctrl_pins[] = { + /* CMD, CLK */ + 114, 113, +}; +static const unsigned int sdhi0_ctrl_mux[] = { + SD0_CMD_MARK, SD0_CLK_MARK, +}; +static const unsigned int sdhi0_cd_pins[] = { + /* CD */ + 115, +}; +static const unsigned int sdhi0_cd_mux[] = { + SD0_CD_MARK, +}; +static const unsigned int sdhi0_wp_pins[] = { + /* WP */ + 116, +}; +static const unsigned int sdhi0_wp_mux[] = { + SD0_WP_MARK, +}; +/* - SDHI1 ------------------------------------------------------------------ */ +static const unsigned int sdhi1_data1_pins[] = { + /* D0 */ + 19, +}; +static const unsigned int sdhi1_data1_mux[] = { + SD1_DAT0_MARK, +}; +static const unsigned int sdhi1_data4_pins[] = { + /* D[0:3] */ + 19, 20, 21, 2, +}; +static const unsigned int sdhi1_data4_mux[] = { + SD1_DAT0_MARK, SD1_DAT1_MARK, SD1_DAT2_MARK, SD1_DAT3_MARK, +}; +static const unsigned int sdhi1_ctrl_pins[] = { + /* CMD, CLK */ + 18, 17, +}; +static const unsigned int sdhi1_ctrl_mux[] = { + SD1_CMD_MARK, SD1_CLK_MARK, +}; +static const unsigned int sdhi1_cd_pins[] = { + /* CD */ + 10, +}; +static const unsigned int sdhi1_cd_mux[] = { + SD1_CD_MARK, +}; +static const unsigned int sdhi1_wp_pins[] = { + /* WP */ + 11, +}; +static const unsigned int sdhi1_wp_mux[] = { + SD1_WP_MARK, +}; +/* - SDHI2 ------------------------------------------------------------------ */ +static const unsigned int sdhi2_data1_pins[] = { + /* D0 */ + 97, +}; +static const unsigned int sdhi2_data1_mux[] = { + SD2_DAT0_MARK, +}; +static const unsigned int sdhi2_data4_pins[] = { + /* D[0:3] */ + 97, 98, 99, 100, +}; +static const unsigned int sdhi2_data4_mux[] = { + SD2_DAT0_MARK, SD2_DAT1_MARK, SD2_DAT2_MARK, SD2_DAT3_MARK, +}; +static const unsigned int sdhi2_ctrl_pins[] = { + /* CMD, CLK */ + 102, 101, +}; +static const unsigned int sdhi2_ctrl_mux[] = { + SD2_CMD_MARK, SD2_CLK_MARK, +}; +static const unsigned int sdhi2_cd_pins[] = { + /* CD */ + 103, +}; +static const unsigned int sdhi2_cd_mux[] = { + SD2_CD_MARK, +}; +static const unsigned int sdhi2_wp_pins[] = { + /* WP */ + 104, +}; +static const unsigned int sdhi2_wp_mux[] = { + SD2_WP_MARK, +}; +/* - SDHI3 ------------------------------------------------------------------ */ +static const unsigned int sdhi3_data1_pins[] = { + /* D0 */ + 50, +}; +static const unsigned int sdhi3_data1_mux[] = { + SD3_DAT0_MARK, +}; +static const unsigned int sdhi3_data4_pins[] = { + /* D[0:3] */ + 50, 51, 52, 53, +}; +static const unsigned int sdhi3_data4_mux[] = { + SD3_DAT0_MARK, SD3_DAT1_MARK, SD3_DAT2_MARK, SD3_DAT3_MARK, +}; +static const unsigned int sdhi3_ctrl_pins[] = { + /* CMD, CLK */ + 35, 34, +}; +static const unsigned int sdhi3_ctrl_mux[] = { + SD3_CMD_MARK, SD3_CLK_MARK, +}; +static const unsigned int sdhi3_cd_pins[] = { + /* CD */ + 62, +}; +static const unsigned int sdhi3_cd_mux[] = { + SD3_CD_MARK, +}; +static const unsigned int sdhi3_wp_pins[] = { + /* WP */ + 64, +}; +static const unsigned int sdhi3_wp_mux[] = { + SD3_WP_MARK, +}; +/* - USB0 ------------------------------------------------------------------- */ +static const unsigned int usb0_pins[] = { + /* OVC */ + 150, 154, +}; +static const unsigned int usb0_mux[] = { + USB_OVC0_MARK, USB_PENC0_MARK, +}; +/* - USB1 ------------------------------------------------------------------- */ +static const unsigned int usb1_pins[] = { + /* OVC */ + 152, 155, +}; +static const unsigned int usb1_mux[] = { + USB_OVC1_MARK, USB_PENC1_MARK, +}; +/* - USB2 ------------------------------------------------------------------- */ +static const unsigned int usb2_pins[] = { + /* OVC, PENC */ + 125, 156, +}; +static const unsigned int usb2_mux[] = { + USB_OVC2_MARK, USB_PENC2_MARK, +}; - /* IPSR2 */ - GPIO_FN(HRX0), GPIO_FN(RX1), GPIO_FN(SCKZ), GPIO_FN(RTS0_C_TANS_C), - GPIO_FN(SUB_TDI), GPIO_FN(CC5_STATE3), GPIO_FN(CC5_STATE11), - GPIO_FN(CC5_STATE19), GPIO_FN(CC5_STATE27), GPIO_FN(CC5_STATE35), - GPIO_FN(HSCK0), GPIO_FN(SCK1), GPIO_FN(MTS), GPIO_FN(PWM5), - GPIO_FN(SCK0_C), GPIO_FN(SSI_SDATA9_B), GPIO_FN(SUB_TDO), - GPIO_FN(CC5_STATE0), GPIO_FN(CC5_STATE8), GPIO_FN(CC5_STATE16), - GPIO_FN(CC5_STATE24), GPIO_FN(CC5_STATE32), GPIO_FN(HCTS0), - GPIO_FN(CTS1), GPIO_FN(STM), GPIO_FN(PWM0_D), GPIO_FN(RX0_C), - GPIO_FN(SCIF_CLK_C), GPIO_FN(SUB_TRST), GPIO_FN(TCLK1_B), - GPIO_FN(CC5_OSCOUT), GPIO_FN(HRTS0), GPIO_FN(RTS1_TANS), - GPIO_FN(MDATA), GPIO_FN(TX0_C), GPIO_FN(SUB_TMS), GPIO_FN(CC5_STATE1), - GPIO_FN(CC5_STATE9), GPIO_FN(CC5_STATE17), GPIO_FN(CC5_STATE25), - GPIO_FN(CC5_STATE33), GPIO_FN(DU0_DR0), GPIO_FN(LCDOUT0), - GPIO_FN(DREQ0), GPIO_FN(GPS_CLK_B), GPIO_FN(AUDATA0), - GPIO_FN(TX5_C), GPIO_FN(DU0_DR1), GPIO_FN(LCDOUT1), GPIO_FN(DACK0), - GPIO_FN(DRACK0), GPIO_FN(GPS_SIGN_B), GPIO_FN(AUDATA1), GPIO_FN(RX5_C), - GPIO_FN(DU0_DR2), GPIO_FN(LCDOUT2), GPIO_FN(DU0_DR3), GPIO_FN(LCDOUT3), - GPIO_FN(DU0_DR4), GPIO_FN(LCDOUT4), GPIO_FN(DU0_DR5), GPIO_FN(LCDOUT5), - GPIO_FN(DU0_DR6), GPIO_FN(LCDOUT6), GPIO_FN(DU0_DR7), GPIO_FN(LCDOUT7), - GPIO_FN(DU0_DG0), GPIO_FN(LCDOUT8), GPIO_FN(DREQ1), GPIO_FN(SCL2), - GPIO_FN(AUDATA2), +static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(du0_rgb666), + SH_PFC_PIN_GROUP(du0_rgb888), + SH_PFC_PIN_GROUP(du0_clk_in), + SH_PFC_PIN_GROUP(du0_clk_out_0), + SH_PFC_PIN_GROUP(du0_clk_out_1), + SH_PFC_PIN_GROUP(du0_sync_0), + SH_PFC_PIN_GROUP(du0_sync_1), + SH_PFC_PIN_GROUP(du0_oddf), + SH_PFC_PIN_GROUP(du0_cde), + SH_PFC_PIN_GROUP(du1_rgb666), + SH_PFC_PIN_GROUP(du1_rgb888), + SH_PFC_PIN_GROUP(du1_clk_in), + SH_PFC_PIN_GROUP(du1_clk_out), + SH_PFC_PIN_GROUP(du1_sync_0), + SH_PFC_PIN_GROUP(du1_sync_1), + SH_PFC_PIN_GROUP(du1_oddf), + SH_PFC_PIN_GROUP(du1_cde), + SH_PFC_PIN_GROUP(hspi0), + SH_PFC_PIN_GROUP(hspi1), + SH_PFC_PIN_GROUP(hspi1_b), + SH_PFC_PIN_GROUP(hspi1_c), + SH_PFC_PIN_GROUP(hspi1_d), + SH_PFC_PIN_GROUP(hspi2), + SH_PFC_PIN_GROUP(hspi2_b), + SH_PFC_PIN_GROUP(intc_irq0), + SH_PFC_PIN_GROUP(intc_irq0_b), + SH_PFC_PIN_GROUP(intc_irq1), + SH_PFC_PIN_GROUP(intc_irq1_b), + SH_PFC_PIN_GROUP(intc_irq2), + SH_PFC_PIN_GROUP(intc_irq2_b), + SH_PFC_PIN_GROUP(intc_irq3), + SH_PFC_PIN_GROUP(intc_irq3_b), + SH_PFC_PIN_GROUP(lbsc_cs0), + SH_PFC_PIN_GROUP(lbsc_cs1), + SH_PFC_PIN_GROUP(lbsc_ex_cs0), + SH_PFC_PIN_GROUP(lbsc_ex_cs1), + SH_PFC_PIN_GROUP(lbsc_ex_cs2), + SH_PFC_PIN_GROUP(lbsc_ex_cs3), + SH_PFC_PIN_GROUP(lbsc_ex_cs4), + SH_PFC_PIN_GROUP(lbsc_ex_cs5), + SH_PFC_PIN_GROUP(mmc0_data1), + SH_PFC_PIN_GROUP(mmc0_data4), + SH_PFC_PIN_GROUP(mmc0_data8), + SH_PFC_PIN_GROUP(mmc0_ctrl), + SH_PFC_PIN_GROUP(mmc1_data1), + SH_PFC_PIN_GROUP(mmc1_data4), + SH_PFC_PIN_GROUP(mmc1_data8), + SH_PFC_PIN_GROUP(mmc1_ctrl), + SH_PFC_PIN_GROUP(scif0_data), + SH_PFC_PIN_GROUP(scif0_clk), + SH_PFC_PIN_GROUP(scif0_ctrl), + SH_PFC_PIN_GROUP(scif0_data_b), + SH_PFC_PIN_GROUP(scif0_clk_b), + SH_PFC_PIN_GROUP(scif0_ctrl_b), + SH_PFC_PIN_GROUP(scif0_data_c), + SH_PFC_PIN_GROUP(scif0_clk_c), + SH_PFC_PIN_GROUP(scif0_ctrl_c), + SH_PFC_PIN_GROUP(scif0_data_d), + SH_PFC_PIN_GROUP(scif0_clk_d), + SH_PFC_PIN_GROUP(scif0_ctrl_d), + SH_PFC_PIN_GROUP(scif1_data), + SH_PFC_PIN_GROUP(scif1_clk), + SH_PFC_PIN_GROUP(scif1_ctrl), + SH_PFC_PIN_GROUP(scif1_data_b), + SH_PFC_PIN_GROUP(scif1_clk_b), + SH_PFC_PIN_GROUP(scif1_ctrl_b), + SH_PFC_PIN_GROUP(scif1_data_c), + SH_PFC_PIN_GROUP(scif1_clk_c), + SH_PFC_PIN_GROUP(scif1_ctrl_c), + SH_PFC_PIN_GROUP(scif2_data), + SH_PFC_PIN_GROUP(scif2_clk), + SH_PFC_PIN_GROUP(scif2_data_b), + SH_PFC_PIN_GROUP(scif2_clk_b), + SH_PFC_PIN_GROUP(scif2_data_c), + SH_PFC_PIN_GROUP(scif2_clk_c), + SH_PFC_PIN_GROUP(scif2_data_d), + SH_PFC_PIN_GROUP(scif2_clk_d), + SH_PFC_PIN_GROUP(scif2_data_e), + SH_PFC_PIN_GROUP(scif3_data), + SH_PFC_PIN_GROUP(scif3_clk), + SH_PFC_PIN_GROUP(scif3_data_b), + SH_PFC_PIN_GROUP(scif3_data_c), + SH_PFC_PIN_GROUP(scif3_data_d), + SH_PFC_PIN_GROUP(scif3_data_e), + SH_PFC_PIN_GROUP(scif3_clk_e), + SH_PFC_PIN_GROUP(scif4_data), + SH_PFC_PIN_GROUP(scif4_clk), + SH_PFC_PIN_GROUP(scif4_data_b), + SH_PFC_PIN_GROUP(scif4_clk_b), + SH_PFC_PIN_GROUP(scif4_data_c), + SH_PFC_PIN_GROUP(scif4_data_d), + SH_PFC_PIN_GROUP(scif5_data), + SH_PFC_PIN_GROUP(scif5_clk), + SH_PFC_PIN_GROUP(scif5_data_b), + SH_PFC_PIN_GROUP(scif5_clk_b), + SH_PFC_PIN_GROUP(scif5_data_c), + SH_PFC_PIN_GROUP(scif5_clk_c), + SH_PFC_PIN_GROUP(scif5_data_d), + SH_PFC_PIN_GROUP(scif5_clk_d), + SH_PFC_PIN_GROUP(sdhi0_data1), + SH_PFC_PIN_GROUP(sdhi0_data4), + SH_PFC_PIN_GROUP(sdhi0_ctrl), + SH_PFC_PIN_GROUP(sdhi0_cd), + SH_PFC_PIN_GROUP(sdhi0_wp), + SH_PFC_PIN_GROUP(sdhi1_data1), + SH_PFC_PIN_GROUP(sdhi1_data4), + SH_PFC_PIN_GROUP(sdhi1_ctrl), + SH_PFC_PIN_GROUP(sdhi1_cd), + SH_PFC_PIN_GROUP(sdhi1_wp), + SH_PFC_PIN_GROUP(sdhi2_data1), + SH_PFC_PIN_GROUP(sdhi2_data4), + SH_PFC_PIN_GROUP(sdhi2_ctrl), + SH_PFC_PIN_GROUP(sdhi2_cd), + SH_PFC_PIN_GROUP(sdhi2_wp), + SH_PFC_PIN_GROUP(sdhi3_data1), + SH_PFC_PIN_GROUP(sdhi3_data4), + SH_PFC_PIN_GROUP(sdhi3_ctrl), + SH_PFC_PIN_GROUP(sdhi3_cd), + SH_PFC_PIN_GROUP(sdhi3_wp), + SH_PFC_PIN_GROUP(usb0), + SH_PFC_PIN_GROUP(usb1), + SH_PFC_PIN_GROUP(usb2), +}; - /* IPSR3 */ - GPIO_FN(DU0_DG1), GPIO_FN(LCDOUT9), GPIO_FN(DACK1), GPIO_FN(SDA2), - GPIO_FN(AUDATA3), GPIO_FN(DU0_DG2), GPIO_FN(LCDOUT10), - GPIO_FN(DU0_DG3), GPIO_FN(LCDOUT11), GPIO_FN(DU0_DG4), - GPIO_FN(LCDOUT12), GPIO_FN(DU0_DG5), GPIO_FN(LCDOUT13), - GPIO_FN(DU0_DG6), GPIO_FN(LCDOUT14), GPIO_FN(DU0_DG7), - GPIO_FN(LCDOUT15), GPIO_FN(DU0_DB0), GPIO_FN(LCDOUT16), - GPIO_FN(EX_WAIT1), GPIO_FN(SCL1), GPIO_FN(TCLK1), GPIO_FN(AUDATA4), - GPIO_FN(DU0_DB1), GPIO_FN(LCDOUT17), GPIO_FN(EX_WAIT2), GPIO_FN(SDA1), - GPIO_FN(GPS_MAG_B), GPIO_FN(AUDATA5), GPIO_FN(SCK5_C), - GPIO_FN(DU0_DB2), GPIO_FN(LCDOUT18), GPIO_FN(DU0_DB3), - GPIO_FN(LCDOUT19), GPIO_FN(DU0_DB4), GPIO_FN(LCDOUT20), - GPIO_FN(DU0_DB5), GPIO_FN(LCDOUT21), GPIO_FN(DU0_DB6), - GPIO_FN(LCDOUT22), GPIO_FN(DU0_DB7), GPIO_FN(LCDOUT23), - GPIO_FN(DU0_DOTCLKIN), GPIO_FN(QSTVA_QVS), GPIO_FN(TX3_D_IRDA_TX_D), - GPIO_FN(SCL3_B), GPIO_FN(DU0_DOTCLKOUT0), GPIO_FN(QCLK), - GPIO_FN(DU0_DOTCLKOUT1), GPIO_FN(QSTVB_QVE), GPIO_FN(RX3_D_IRDA_RX_D), - GPIO_FN(SDA3_B), GPIO_FN(SDA2_C), GPIO_FN(DACK0_B), GPIO_FN(DRACK0_B), - GPIO_FN(DU0_EXHSYNC_DU0_HSYNC), GPIO_FN(QSTH_QHS), - GPIO_FN(DU0_EXVSYNC_DU0_VSYNC), GPIO_FN(QSTB_QHE), - GPIO_FN(DU0_EXODDF_DU0_ODDF_DISP_CDE), GPIO_FN(QCPV_QDE), - GPIO_FN(CAN1_TX), GPIO_FN(TX2_C), GPIO_FN(SCL2_C), GPIO_FN(REMOCON), +static const char * const du0_groups[] = { + "du0_rgb666", + "du0_rgb888", + "du0_clk_in", + "du0_clk_out_0", + "du0_clk_out_1", + "du0_sync_0", + "du0_sync_1", + "du0_oddf", + "du0_cde", +}; - /* IPSR4 */ - GPIO_FN(DU0_DISP), GPIO_FN(QPOLA), GPIO_FN(CAN_CLK_C), GPIO_FN(SCK2_C), - GPIO_FN(DU0_CDE), GPIO_FN(QPOLB), GPIO_FN(CAN1_RX), GPIO_FN(RX2_C), - GPIO_FN(DREQ0_B), GPIO_FN(SSI_SCK78_B), GPIO_FN(SCK0_B), - GPIO_FN(DU1_DR0), GPIO_FN(VI2_DATA0_VI2_B0), GPIO_FN(PWM6), - GPIO_FN(SD3_CLK), GPIO_FN(TX3_E_IRDA_TX_E), GPIO_FN(AUDCK), - GPIO_FN(PWMFSW0_B), GPIO_FN(DU1_DR1), GPIO_FN(VI2_DATA1_VI2_B1), - GPIO_FN(PWM0), GPIO_FN(SD3_CMD), GPIO_FN(RX3_E_IRDA_RX_E), - GPIO_FN(AUDSYNC), GPIO_FN(CTS0_D), GPIO_FN(DU1_DR2), GPIO_FN(VI2_G0), - GPIO_FN(DU1_DR3), GPIO_FN(VI2_G1), GPIO_FN(DU1_DR4), GPIO_FN(VI2_G2), - GPIO_FN(DU1_DR5), GPIO_FN(VI2_G3), GPIO_FN(DU1_DR6), GPIO_FN(VI2_G4), - GPIO_FN(DU1_DR7), GPIO_FN(VI2_G5), GPIO_FN(DU1_DG0), - GPIO_FN(VI2_DATA2_VI2_B2), GPIO_FN(SCL1_B), GPIO_FN(SD3_DAT2), - GPIO_FN(SCK3_E), GPIO_FN(AUDATA6), GPIO_FN(TX0_D), GPIO_FN(DU1_DG1), - GPIO_FN(VI2_DATA3_VI2_B3), GPIO_FN(SDA1_B), GPIO_FN(SD3_DAT3), - GPIO_FN(SCK5), GPIO_FN(AUDATA7), GPIO_FN(RX0_D), GPIO_FN(DU1_DG2), - GPIO_FN(VI2_G6), GPIO_FN(DU1_DG3), GPIO_FN(VI2_G7), GPIO_FN(DU1_DG4), - GPIO_FN(VI2_R0), GPIO_FN(DU1_DG5), GPIO_FN(VI2_R1), GPIO_FN(DU1_DG6), - GPIO_FN(VI2_R2), GPIO_FN(DU1_DG7), GPIO_FN(VI2_R3), GPIO_FN(DU1_DB0), - GPIO_FN(VI2_DATA4_VI2_B4), GPIO_FN(SCL2_B), GPIO_FN(SD3_DAT0), - GPIO_FN(TX5), GPIO_FN(SCK0_D), +static const char * const du1_groups[] = { + "du1_rgb666", + "du1_rgb888", + "du1_clk_in", + "du1_clk_out", + "du1_sync_0", + "du1_sync_1", + "du1_oddf", + "du1_cde", +}; - /* IPSR5 */ - GPIO_FN(DU1_DB1), GPIO_FN(VI2_DATA5_VI2_B5), GPIO_FN(SDA2_B), - GPIO_FN(SD3_DAT1), GPIO_FN(RX5), GPIO_FN(RTS0_D_TANS_D), - GPIO_FN(DU1_DB2), GPIO_FN(VI2_R4), GPIO_FN(DU1_DB3), GPIO_FN(VI2_R5), - GPIO_FN(DU1_DB4), GPIO_FN(VI2_R6), GPIO_FN(DU1_DB5), GPIO_FN(VI2_R7), - GPIO_FN(DU1_DB6), GPIO_FN(SCL2_D), GPIO_FN(DU1_DB7), GPIO_FN(SDA2_D), - GPIO_FN(DU1_DOTCLKIN), GPIO_FN(VI2_CLKENB), GPIO_FN(HSPI_CS1), - GPIO_FN(SCL1_D), GPIO_FN(DU1_DOTCLKOUT), GPIO_FN(VI2_FIELD), - GPIO_FN(SDA1_D), GPIO_FN(DU1_EXHSYNC_DU1_HSYNC), GPIO_FN(VI2_HSYNC), - GPIO_FN(VI3_HSYNC), GPIO_FN(DU1_EXVSYNC_DU1_VSYNC), GPIO_FN(VI2_VSYNC), - GPIO_FN(VI3_VSYNC), GPIO_FN(DU1_EXODDF_DU1_ODDF_DISP_CDE), - GPIO_FN(VI2_CLK), GPIO_FN(TX3_B_IRDA_TX_B), GPIO_FN(SD3_CD), - GPIO_FN(HSPI_TX1), GPIO_FN(VI1_CLKENB), GPIO_FN(VI3_CLKENB), - GPIO_FN(AUDIO_CLKC), GPIO_FN(TX2_D), GPIO_FN(SPEEDIN), - GPIO_FN(GPS_SIGN_D), GPIO_FN(DU1_DISP), GPIO_FN(VI2_DATA6_VI2_B6), - GPIO_FN(TCLK0), GPIO_FN(QSTVA_B_QVS_B), GPIO_FN(HSPI_CLK1), - GPIO_FN(SCK2_D), GPIO_FN(AUDIO_CLKOUT_B), GPIO_FN(GPS_MAG_D), - GPIO_FN(DU1_CDE), GPIO_FN(VI2_DATA7_VI2_B7), GPIO_FN(RX3_B_IRDA_RX_B), - GPIO_FN(SD3_WP), GPIO_FN(HSPI_RX1), GPIO_FN(VI1_FIELD), - GPIO_FN(VI3_FIELD), GPIO_FN(AUDIO_CLKOUT), GPIO_FN(RX2_D), - GPIO_FN(GPS_CLK_C), GPIO_FN(GPS_CLK_D), GPIO_FN(AUDIO_CLKA), - GPIO_FN(CAN_TXCLK), GPIO_FN(AUDIO_CLKB), GPIO_FN(USB_OVC2), - GPIO_FN(CAN_DEBUGOUT0), GPIO_FN(MOUT0), +static const char * const hspi0_groups[] = { + "hspi0", +}; - /* IPSR6 */ - GPIO_FN(SSI_SCK0129), GPIO_FN(CAN_DEBUGOUT1), GPIO_FN(MOUT1), - GPIO_FN(SSI_WS0129), GPIO_FN(CAN_DEBUGOUT2), GPIO_FN(MOUT2), - GPIO_FN(SSI_SDATA0), GPIO_FN(CAN_DEBUGOUT3), GPIO_FN(MOUT5), - GPIO_FN(SSI_SDATA1), GPIO_FN(CAN_DEBUGOUT4), GPIO_FN(MOUT6), - GPIO_FN(SSI_SDATA2), GPIO_FN(CAN_DEBUGOUT5), GPIO_FN(SSI_SCK34), - GPIO_FN(CAN_DEBUGOUT6), GPIO_FN(CAN0_TX_B), GPIO_FN(IERX), - GPIO_FN(SSI_SCK9_C), GPIO_FN(SSI_WS34), GPIO_FN(CAN_DEBUGOUT7), - GPIO_FN(CAN0_RX_B), GPIO_FN(IETX), GPIO_FN(SSI_WS9_C), - GPIO_FN(SSI_SDATA3), GPIO_FN(PWM0_C), GPIO_FN(CAN_DEBUGOUT8), - GPIO_FN(CAN_CLK_B), GPIO_FN(IECLK), GPIO_FN(SCIF_CLK_B), - GPIO_FN(TCLK0_B), GPIO_FN(SSI_SDATA4), GPIO_FN(CAN_DEBUGOUT9), - GPIO_FN(SSI_SDATA9_C), GPIO_FN(SSI_SCK5), GPIO_FN(ADICLK), - GPIO_FN(CAN_DEBUGOUT10), GPIO_FN(SCK3), GPIO_FN(TCLK0_D), - GPIO_FN(SSI_WS5), GPIO_FN(ADICS_SAMP), GPIO_FN(CAN_DEBUGOUT11), - GPIO_FN(TX3_IRDA_TX), GPIO_FN(SSI_SDATA5), GPIO_FN(ADIDATA), - GPIO_FN(CAN_DEBUGOUT12), GPIO_FN(RX3_IRDA_RX), GPIO_FN(SSI_SCK6), - GPIO_FN(ADICHS0), GPIO_FN(CAN0_TX), GPIO_FN(IERX_B), +static const char * const hspi1_groups[] = { + "hspi1", + "hspi1_b", + "hspi1_c", + "hspi1_d", +}; - /* IPSR7 */ - GPIO_FN(SSI_WS6), GPIO_FN(ADICHS1), GPIO_FN(CAN0_RX), GPIO_FN(IETX_B), - GPIO_FN(SSI_SDATA6), GPIO_FN(ADICHS2), GPIO_FN(CAN_CLK), - GPIO_FN(IECLK_B), GPIO_FN(SSI_SCK78), GPIO_FN(CAN_DEBUGOUT13), - GPIO_FN(IRQ0_B), GPIO_FN(SSI_SCK9_B), GPIO_FN(HSPI_CLK1_C), - GPIO_FN(SSI_WS78), GPIO_FN(CAN_DEBUGOUT14), GPIO_FN(IRQ1_B), - GPIO_FN(SSI_WS9_B), GPIO_FN(HSPI_CS1_C), GPIO_FN(SSI_SDATA7), - GPIO_FN(CAN_DEBUGOUT15), GPIO_FN(IRQ2_B), GPIO_FN(TCLK1_C), - GPIO_FN(HSPI_TX1_C), GPIO_FN(SSI_SDATA8), GPIO_FN(VSP), - GPIO_FN(IRQ3_B), GPIO_FN(HSPI_RX1_C), GPIO_FN(SD0_CLK), - GPIO_FN(ATACS01), GPIO_FN(SCK1_B), GPIO_FN(SD0_CMD), GPIO_FN(ATACS11), - GPIO_FN(TX1_B), GPIO_FN(CC5_TDO), GPIO_FN(SD0_DAT0), GPIO_FN(ATADIR1), - GPIO_FN(RX1_B), GPIO_FN(CC5_TRST), GPIO_FN(SD0_DAT1), GPIO_FN(ATAG1), - GPIO_FN(SCK2_B), GPIO_FN(CC5_TMS), GPIO_FN(SD0_DAT2), GPIO_FN(ATARD1), - GPIO_FN(TX2_B), GPIO_FN(CC5_TCK), GPIO_FN(SD0_DAT3), GPIO_FN(ATAWR1), - GPIO_FN(RX2_B), GPIO_FN(CC5_TDI), GPIO_FN(SD0_CD), GPIO_FN(DREQ2), - GPIO_FN(RTS1_B_TANS_B), GPIO_FN(SD0_WP), GPIO_FN(DACK2), - GPIO_FN(CTS1_B), +static const char * const hspi2_groups[] = { + "hspi2", + "hspi2_b", +}; - /* IPSR8 */ - GPIO_FN(HSPI_CLK0), GPIO_FN(CTS0), GPIO_FN(USB_OVC0), GPIO_FN(AD_CLK), - GPIO_FN(CC5_STATE4), GPIO_FN(CC5_STATE12), GPIO_FN(CC5_STATE20), - GPIO_FN(CC5_STATE28), GPIO_FN(CC5_STATE36), GPIO_FN(HSPI_CS0), - GPIO_FN(RTS0_TANS), GPIO_FN(USB_OVC1), GPIO_FN(AD_DI), - GPIO_FN(CC5_STATE5), GPIO_FN(CC5_STATE13), GPIO_FN(CC5_STATE21), - GPIO_FN(CC5_STATE29), GPIO_FN(CC5_STATE37), GPIO_FN(HSPI_TX0), - GPIO_FN(TX0), GPIO_FN(CAN_DEBUG_HW_TRIGGER), GPIO_FN(AD_DO), - GPIO_FN(CC5_STATE6), GPIO_FN(CC5_STATE14), GPIO_FN(CC5_STATE22), - GPIO_FN(CC5_STATE30), GPIO_FN(CC5_STATE38), GPIO_FN(HSPI_RX0), - GPIO_FN(RX0), GPIO_FN(CAN_STEP0), GPIO_FN(AD_NCS), GPIO_FN(CC5_STATE7), - GPIO_FN(CC5_STATE15), GPIO_FN(CC5_STATE23), GPIO_FN(CC5_STATE31), - GPIO_FN(CC5_STATE39), GPIO_FN(FMCLK), GPIO_FN(RDS_CLK), GPIO_FN(PCMOE), - GPIO_FN(BPFCLK), GPIO_FN(PCMWE), GPIO_FN(FMIN), GPIO_FN(RDS_DATA), - GPIO_FN(VI0_CLK), GPIO_FN(MMC1_CLK), GPIO_FN(VI0_CLKENB), - GPIO_FN(TX1_C), GPIO_FN(HTX1_B), GPIO_FN(MT1_SYNC), - GPIO_FN(VI0_FIELD), GPIO_FN(RX1_C), GPIO_FN(HRX1_B), - GPIO_FN(VI0_HSYNC), GPIO_FN(VI0_DATA0_B_VI0_B0_B), GPIO_FN(CTS1_C), - GPIO_FN(TX4_D), GPIO_FN(MMC1_CMD), GPIO_FN(HSCK1_B), - GPIO_FN(VI0_VSYNC), GPIO_FN(VI0_DATA1_B_VI0_B1_B), - GPIO_FN(RTS1_C_TANS_C), GPIO_FN(RX4_D), GPIO_FN(PWMFSW0_C), +static const char * const intc_groups[] = { + "intc_irq0", + "intc_irq0_b", + "intc_irq1", + "intc_irq1_b", + "intc_irq2", + "intc_irq2_b", + "intc_irq3", + "intc_irq3_b", +}; - /* IPSR9 */ - GPIO_FN(VI0_DATA0_VI0_B0), GPIO_FN(HRTS1_B), GPIO_FN(MT1_VCXO), - GPIO_FN(VI0_DATA1_VI0_B1), GPIO_FN(HCTS1_B), GPIO_FN(MT1_PWM), - GPIO_FN(VI0_DATA2_VI0_B2), GPIO_FN(MMC1_D0), GPIO_FN(VI0_DATA3_VI0_B3), - GPIO_FN(MMC1_D1), GPIO_FN(VI0_DATA4_VI0_B4), GPIO_FN(MMC1_D2), - GPIO_FN(VI0_DATA5_VI0_B5), GPIO_FN(MMC1_D3), GPIO_FN(VI0_DATA6_VI0_B6), - GPIO_FN(MMC1_D4), GPIO_FN(ARM_TRACEDATA_0), GPIO_FN(VI0_DATA7_VI0_B7), - GPIO_FN(MMC1_D5), GPIO_FN(ARM_TRACEDATA_1), GPIO_FN(VI0_G0), - GPIO_FN(SSI_SCK78_C), GPIO_FN(IRQ0), GPIO_FN(ARM_TRACEDATA_2), - GPIO_FN(VI0_G1), GPIO_FN(SSI_WS78_C), GPIO_FN(IRQ1), - GPIO_FN(ARM_TRACEDATA_3), GPIO_FN(VI0_G2), GPIO_FN(ETH_TXD1), - GPIO_FN(MMC1_D6), GPIO_FN(ARM_TRACEDATA_4), GPIO_FN(TS_SPSYNC0), - GPIO_FN(VI0_G3), GPIO_FN(ETH_CRS_DV), GPIO_FN(MMC1_D7), - GPIO_FN(ARM_TRACEDATA_5), GPIO_FN(TS_SDAT0), GPIO_FN(VI0_G4), - GPIO_FN(ETH_TX_EN), GPIO_FN(SD2_DAT0_B), GPIO_FN(ARM_TRACEDATA_6), - GPIO_FN(VI0_G5), GPIO_FN(ETH_RX_ER), GPIO_FN(SD2_DAT1_B), - GPIO_FN(ARM_TRACEDATA_7), GPIO_FN(VI0_G6), GPIO_FN(ETH_RXD0), - GPIO_FN(SD2_DAT2_B), GPIO_FN(ARM_TRACEDATA_8), GPIO_FN(VI0_G7), - GPIO_FN(ETH_RXD1), GPIO_FN(SD2_DAT3_B), GPIO_FN(ARM_TRACEDATA_9), +static const char * const lbsc_groups[] = { + "lbsc_cs0", + "lbsc_cs1", + "lbsc_ex_cs0", + "lbsc_ex_cs1", + "lbsc_ex_cs2", + "lbsc_ex_cs3", + "lbsc_ex_cs4", + "lbsc_ex_cs5", +}; - /* IPSR10 */ - GPIO_FN(VI0_R0), GPIO_FN(SSI_SDATA7_C), GPIO_FN(SCK1_C), - GPIO_FN(DREQ1_B), GPIO_FN(ARM_TRACEDATA_10), GPIO_FN(DREQ0_C), - GPIO_FN(VI0_R1), GPIO_FN(SSI_SDATA8_C), GPIO_FN(DACK1_B), - GPIO_FN(ARM_TRACEDATA_11), GPIO_FN(DACK0_C), GPIO_FN(DRACK0_C), - GPIO_FN(VI0_R2), GPIO_FN(ETH_LINK), GPIO_FN(SD2_CLK_B), GPIO_FN(IRQ2), - GPIO_FN(ARM_TRACEDATA_12), GPIO_FN(VI0_R3), GPIO_FN(ETH_MAGIC), - GPIO_FN(SD2_CMD_B), GPIO_FN(IRQ3), GPIO_FN(ARM_TRACEDATA_13), - GPIO_FN(VI0_R4), GPIO_FN(ETH_REFCLK), GPIO_FN(SD2_CD_B), - GPIO_FN(HSPI_CLK1_B), GPIO_FN(ARM_TRACEDATA_14), GPIO_FN(MT1_CLK), - GPIO_FN(TS_SCK0), GPIO_FN(VI0_R5), GPIO_FN(ETH_TXD0), - GPIO_FN(SD2_WP_B), GPIO_FN(HSPI_CS1_B), GPIO_FN(ARM_TRACEDATA_15), - GPIO_FN(MT1_D), GPIO_FN(TS_SDEN0), GPIO_FN(VI0_R6), GPIO_FN(ETH_MDC), - GPIO_FN(DREQ2_C), GPIO_FN(HSPI_TX1_B), GPIO_FN(TRACECLK), - GPIO_FN(MT1_BEN), GPIO_FN(PWMFSW0_D), GPIO_FN(VI0_R7), - GPIO_FN(ETH_MDIO), GPIO_FN(DACK2_C), GPIO_FN(HSPI_RX1_B), - GPIO_FN(SCIF_CLK_D), GPIO_FN(TRACECTL), GPIO_FN(MT1_PEN), - GPIO_FN(VI1_CLK), GPIO_FN(SIM_D), GPIO_FN(SDA3), GPIO_FN(VI1_HSYNC), - GPIO_FN(VI3_CLK), GPIO_FN(SSI_SCK4), GPIO_FN(GPS_SIGN_C), - GPIO_FN(PWMFSW0_E), GPIO_FN(VI1_VSYNC), GPIO_FN(AUDIO_CLKOUT_C), - GPIO_FN(SSI_WS4), GPIO_FN(SIM_CLK), GPIO_FN(GPS_MAG_C), - GPIO_FN(SPV_TRST), GPIO_FN(SCL3), +static const char * const mmc0_groups[] = { + "mmc0_data1", + "mmc0_data4", + "mmc0_data8", + "mmc0_ctrl", +}; - /* IPSR11 */ - GPIO_FN(VI1_DATA0_VI1_B0), GPIO_FN(SD2_DAT0), GPIO_FN(SIM_RST), - GPIO_FN(SPV_TCK), GPIO_FN(ADICLK_B), GPIO_FN(VI1_DATA1_VI1_B1), - GPIO_FN(SD2_DAT1), GPIO_FN(MT0_CLK), GPIO_FN(SPV_TMS), - GPIO_FN(ADICS_B_SAMP_B), GPIO_FN(VI1_DATA2_VI1_B2), GPIO_FN(SD2_DAT2), - GPIO_FN(MT0_D), GPIO_FN(SPVTDI), GPIO_FN(ADIDATA_B), - GPIO_FN(VI1_DATA3_VI1_B3), GPIO_FN(SD2_DAT3), GPIO_FN(MT0_BEN), - GPIO_FN(SPV_TDO), GPIO_FN(ADICHS0_B), GPIO_FN(VI1_DATA4_VI1_B4), - GPIO_FN(SD2_CLK), GPIO_FN(MT0_PEN), GPIO_FN(SPA_TRST), - GPIO_FN(HSPI_CLK1_D), GPIO_FN(ADICHS1_B), GPIO_FN(VI1_DATA5_VI1_B5), - GPIO_FN(SD2_CMD), GPIO_FN(MT0_SYNC), GPIO_FN(SPA_TCK), - GPIO_FN(HSPI_CS1_D), GPIO_FN(ADICHS2_B), GPIO_FN(VI1_DATA6_VI1_B6), - GPIO_FN(SD2_CD), GPIO_FN(MT0_VCXO), GPIO_FN(SPA_TMS), - GPIO_FN(HSPI_TX1_D), GPIO_FN(VI1_DATA7_VI1_B7), GPIO_FN(SD2_WP), - GPIO_FN(MT0_PWM), GPIO_FN(SPA_TDI), GPIO_FN(HSPI_RX1_D), - GPIO_FN(VI1_G0), GPIO_FN(VI3_DATA0), GPIO_FN(DU1_DOTCLKOUT1), - GPIO_FN(TS_SCK1), GPIO_FN(DREQ2_B), GPIO_FN(TX2), GPIO_FN(SPA_TDO), - GPIO_FN(HCTS0_B), GPIO_FN(VI1_G1), GPIO_FN(VI3_DATA1), - GPIO_FN(SSI_SCK1), GPIO_FN(TS_SDEN1), GPIO_FN(DACK2_B), GPIO_FN(RX2), - GPIO_FN(HRTS0_B), +static const char * const mmc1_groups[] = { + "mmc1_data1", + "mmc1_data4", + "mmc1_data8", + "mmc1_ctrl", +}; - /* IPSR12 */ - GPIO_FN(VI1_G2), GPIO_FN(VI3_DATA2), GPIO_FN(SSI_WS1), - GPIO_FN(TS_SPSYNC1), GPIO_FN(SCK2), GPIO_FN(HSCK0_B), GPIO_FN(VI1_G3), - GPIO_FN(VI3_DATA3), GPIO_FN(SSI_SCK2), GPIO_FN(TS_SDAT1), - GPIO_FN(SCL1_C), GPIO_FN(HTX0_B), GPIO_FN(VI1_G4), GPIO_FN(VI3_DATA4), - GPIO_FN(SSI_WS2), GPIO_FN(SDA1_C), GPIO_FN(SIM_RST_B), - GPIO_FN(HRX0_B), GPIO_FN(VI1_G5), GPIO_FN(VI3_DATA5), - GPIO_FN(GPS_CLK), GPIO_FN(FSE), GPIO_FN(TX4_B), GPIO_FN(SIM_D_B), - GPIO_FN(VI1_G6), GPIO_FN(VI3_DATA6), GPIO_FN(GPS_SIGN), GPIO_FN(FRB), - GPIO_FN(RX4_B), GPIO_FN(SIM_CLK_B), GPIO_FN(VI1_G7), - GPIO_FN(VI3_DATA7), GPIO_FN(GPS_MAG), GPIO_FN(FCE), GPIO_FN(SCK4_B), -}; - -static struct pinmux_cfg_reg pinmux_config_regs[] = { +static const char * const scif0_groups[] = { + "scif0_data", + "scif0_clk", + "scif0_ctrl", + "scif0_data_b", + "scif0_clk_b", + "scif0_ctrl_b", + "scif0_data_c", + "scif0_clk_c", + "scif0_ctrl_c", + "scif0_data_d", + "scif0_clk_d", + "scif0_ctrl_d", +}; + +static const char * const scif1_groups[] = { + "scif1_data", + "scif1_clk", + "scif1_ctrl", + "scif1_data_b", + "scif1_clk_b", + "scif1_ctrl_b", + "scif1_data_c", + "scif1_clk_c", + "scif1_ctrl_c", +}; + +static const char * const scif2_groups[] = { + "scif2_data", + "scif2_clk", + "scif2_data_b", + "scif2_clk_b", + "scif2_data_c", + "scif2_clk_c", + "scif2_data_d", + "scif2_clk_d", + "scif2_data_e", +}; + +static const char * const scif3_groups[] = { + "scif3_data", + "scif3_clk", + "scif3_data_b", + "scif3_data_c", + "scif3_data_d", + "scif3_data_e", + "scif3_clk_e", +}; + +static const char * const scif4_groups[] = { + "scif4_data", + "scif4_clk", + "scif4_data_b", + "scif4_clk_b", + "scif4_data_c", + "scif4_data_d", +}; + +static const char * const scif5_groups[] = { + "scif5_data", + "scif5_clk", + "scif5_data_b", + "scif5_clk_b", + "scif5_data_c", + "scif5_clk_c", + "scif5_data_d", + "scif5_clk_d", +}; + +static const char * const sdhi0_groups[] = { + "sdhi0_data1", + "sdhi0_data4", + "sdhi0_ctrl", + "sdhi0_cd", + "sdhi0_wp", +}; + +static const char * const sdhi1_groups[] = { + "sdhi1_data1", + "sdhi1_data4", + "sdhi1_ctrl", + "sdhi1_cd", + "sdhi1_wp", +}; + +static const char * const sdhi2_groups[] = { + "sdhi2_data1", + "sdhi2_data4", + "sdhi2_ctrl", + "sdhi2_cd", + "sdhi2_wp", +}; + +static const char * const sdhi3_groups[] = { + "sdhi3_data1", + "sdhi3_data4", + "sdhi3_ctrl", + "sdhi3_cd", + "sdhi3_wp", +}; + +static const char * const usb0_groups[] = { + "usb0", +}; + +static const char * const usb1_groups[] = { + "usb1", +}; + +static const char * const usb2_groups[] = { + "usb2", +}; + +static const struct sh_pfc_function pinmux_functions[] = { + SH_PFC_FUNCTION(du0), + SH_PFC_FUNCTION(du1), + SH_PFC_FUNCTION(hspi0), + SH_PFC_FUNCTION(hspi1), + SH_PFC_FUNCTION(hspi2), + SH_PFC_FUNCTION(intc), + SH_PFC_FUNCTION(lbsc), + SH_PFC_FUNCTION(mmc0), + SH_PFC_FUNCTION(mmc1), + SH_PFC_FUNCTION(sdhi0), + SH_PFC_FUNCTION(sdhi1), + SH_PFC_FUNCTION(sdhi2), + SH_PFC_FUNCTION(sdhi3), + SH_PFC_FUNCTION(scif0), + SH_PFC_FUNCTION(scif1), + SH_PFC_FUNCTION(scif2), + SH_PFC_FUNCTION(scif3), + SH_PFC_FUNCTION(scif4), + SH_PFC_FUNCTION(scif5), + SH_PFC_FUNCTION(usb0), + SH_PFC_FUNCTION(usb1), + SH_PFC_FUNCTION(usb2), +}; + +static const struct pinmux_cfg_reg pinmux_config_regs[] = { { PINMUX_CFG_REG("GPSR0", 0xfffc0004, 32, 1) { GP_0_31_FN, FN_IP3_31_29, GP_0_30_FN, FN_IP3_26_24, @@ -2412,7 +3407,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { FN_VI1_G1, FN_VI3_DATA1, FN_SSI_SCK1, FN_TS_SDEN1, FN_DACK2_B, FN_RX2, FN_HRTS0_B, 0, /* IP11_26_24 [3] */ - FN_VI1_G0, FN_VI3_DATA0, FN_DU1_DOTCLKOUT1, FN_TS_SCK1, + FN_VI1_G0, FN_VI3_DATA0, 0, FN_TS_SCK1, FN_DREQ2_B, FN_TX2, FN_SPA_TDO, FN_HCTS0_B, /* IP11_23_21 [3] */ FN_VI1_DATA7_VI1_B7, FN_SD2_WP, FN_MT0_PWM, FN_SPA_TDI, @@ -2558,66 +3553,24 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { /* SEL_I2C1 [2] */ FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2, FN_SEL_I2C1_3 } }, - { PINMUX_CFG_REG("INOUTSEL0", 0xffc40004, 32, 1) { GP_INOUTSEL(0) } }, - { PINMUX_CFG_REG("INOUTSEL1", 0xffc41004, 32, 1) { GP_INOUTSEL(1) } }, - { PINMUX_CFG_REG("INOUTSEL2", 0xffc42004, 32, 1) { GP_INOUTSEL(2) } }, - { PINMUX_CFG_REG("INOUTSEL3", 0xffc43004, 32, 1) { GP_INOUTSEL(3) } }, - { PINMUX_CFG_REG("INOUTSEL4", 0xffc44004, 32, 1) { GP_INOUTSEL(4) } }, - { PINMUX_CFG_REG("INOUTSEL5", 0xffc45004, 32, 1) { GP_INOUTSEL(5) } }, - { PINMUX_CFG_REG("INOUTSEL6", 0xffc46004, 32, 1) { - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, - 0, 0, - 0, 0, - GP_6_8_IN, GP_6_8_OUT, - GP_6_7_IN, GP_6_7_OUT, - GP_6_6_IN, GP_6_6_OUT, - GP_6_5_IN, GP_6_5_OUT, - GP_6_4_IN, GP_6_4_OUT, - GP_6_3_IN, GP_6_3_OUT, - GP_6_2_IN, GP_6_2_OUT, - GP_6_1_IN, GP_6_1_OUT, - GP_6_0_IN, GP_6_0_OUT, } - }, - { }, -}; - -static struct pinmux_data_reg pinmux_data_regs[] = { - { PINMUX_DATA_REG("INDT0", 0xffc40008, 32) { GP_INDT(0) } }, - { PINMUX_DATA_REG("INDT1", 0xffc41008, 32) { GP_INDT(1) } }, - { PINMUX_DATA_REG("INDT2", 0xffc42008, 32) { GP_INDT(2) } }, - { PINMUX_DATA_REG("INDT3", 0xffc43008, 32) { GP_INDT(3) } }, - { PINMUX_DATA_REG("INDT4", 0xffc44008, 32) { GP_INDT(4) } }, - { PINMUX_DATA_REG("INDT5", 0xffc45008, 32) { GP_INDT(5) } }, - { PINMUX_DATA_REG("INDT6", 0xffc46008, 32) { - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, GP_6_8_DATA, - GP_6_7_DATA, GP_6_6_DATA, GP_6_5_DATA, GP_6_4_DATA, - GP_6_3_DATA, GP_6_2_DATA, GP_6_1_DATA, GP_6_0_DATA } - }, { }, }; -struct sh_pfc_soc_info r8a7779_pinmux_info = { +const struct sh_pfc_soc_info r8a7779_pinmux_info = { .name = "r8a7779_pfc", .unlock_reg = 0xfffc0000, /* PMMR */ - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, - .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, - .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - .first_gpio = GPIO_GP_0_0, - .last_gpio = GPIO_FN_SCK4_B, + .pins = pinmux_pins, + .nr_pins = ARRAY_SIZE(pinmux_pins), + .groups = pinmux_groups, + .nr_groups = ARRAY_SIZE(pinmux_groups), + .functions = pinmux_functions, + .nr_functions = ARRAY_SIZE(pinmux_functions), - .gpios = pinmux_gpios, .cfg_regs = pinmux_config_regs, - .data_regs = pinmux_data_regs, .gpio_data = pinmux_data, .gpio_data_size = ARRAY_SIZE(pinmux_data), diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7203.c b/drivers/pinctrl/sh-pfc/pfc-sh7203.c index 01b425dfd162..f63d51dc3f4c 100644 --- a/drivers/pinctrl/sh-pfc/pfc-sh7203.c +++ b/drivers/pinctrl/sh-pfc/pfc-sh7203.c @@ -272,7 +272,7 @@ enum { PINMUX_MARK_END, }; -static pinmux_enum_t pinmux_data[] = { +static const pinmux_enum_t pinmux_data[] = { /* PA */ PINMUX_DATA(PA7_DATA, PA7_IN), @@ -703,7 +703,7 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_DATA(SSCK0_PF_MARK, PF0MD_11), }; -static struct pinmux_gpio pinmux_gpios[] = { +static struct sh_pfc_pin pinmux_pins[] = { /* PA */ PINMUX_GPIO(GPIO_PA7, PA7_DATA), @@ -815,265 +815,269 @@ static struct pinmux_gpio pinmux_gpios[] = { PINMUX_GPIO(GPIO_PF2, PF2_DATA), PINMUX_GPIO(GPIO_PF1, PF1_DATA), PINMUX_GPIO(GPIO_PF0, PF0_DATA), +}; + +#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) +static const struct pinmux_func pinmux_func_gpios[] = { /* INTC */ - PINMUX_GPIO(GPIO_FN_PINT7_PB, PINT7_PB_MARK), - PINMUX_GPIO(GPIO_FN_PINT6_PB, PINT6_PB_MARK), - PINMUX_GPIO(GPIO_FN_PINT5_PB, PINT5_PB_MARK), - PINMUX_GPIO(GPIO_FN_PINT4_PB, PINT4_PB_MARK), - PINMUX_GPIO(GPIO_FN_PINT3_PB, PINT3_PB_MARK), - PINMUX_GPIO(GPIO_FN_PINT2_PB, PINT2_PB_MARK), - PINMUX_GPIO(GPIO_FN_PINT1_PB, PINT1_PB_MARK), - PINMUX_GPIO(GPIO_FN_PINT0_PB, PINT0_PB_MARK), - PINMUX_GPIO(GPIO_FN_PINT7_PD, PINT7_PD_MARK), - PINMUX_GPIO(GPIO_FN_PINT6_PD, PINT6_PD_MARK), - PINMUX_GPIO(GPIO_FN_PINT5_PD, PINT5_PD_MARK), - PINMUX_GPIO(GPIO_FN_PINT4_PD, PINT4_PD_MARK), - PINMUX_GPIO(GPIO_FN_PINT3_PD, PINT3_PD_MARK), - PINMUX_GPIO(GPIO_FN_PINT2_PD, PINT2_PD_MARK), - PINMUX_GPIO(GPIO_FN_PINT1_PD, PINT1_PD_MARK), - PINMUX_GPIO(GPIO_FN_PINT0_PD, PINT0_PD_MARK), - PINMUX_GPIO(GPIO_FN_IRQ7_PB, IRQ7_PB_MARK), - PINMUX_GPIO(GPIO_FN_IRQ6_PB, IRQ6_PB_MARK), - PINMUX_GPIO(GPIO_FN_IRQ5_PB, IRQ5_PB_MARK), - PINMUX_GPIO(GPIO_FN_IRQ4_PB, IRQ4_PB_MARK), - PINMUX_GPIO(GPIO_FN_IRQ3_PB, IRQ3_PB_MARK), - PINMUX_GPIO(GPIO_FN_IRQ2_PB, IRQ2_PB_MARK), - PINMUX_GPIO(GPIO_FN_IRQ1_PB, IRQ1_PB_MARK), - PINMUX_GPIO(GPIO_FN_IRQ0_PB, IRQ0_PB_MARK), - PINMUX_GPIO(GPIO_FN_IRQ7_PD, IRQ7_PD_MARK), - PINMUX_GPIO(GPIO_FN_IRQ6_PD, IRQ6_PD_MARK), - PINMUX_GPIO(GPIO_FN_IRQ5_PD, IRQ5_PD_MARK), - PINMUX_GPIO(GPIO_FN_IRQ4_PD, IRQ4_PD_MARK), - PINMUX_GPIO(GPIO_FN_IRQ3_PD, IRQ3_PD_MARK), - PINMUX_GPIO(GPIO_FN_IRQ2_PD, IRQ2_PD_MARK), - PINMUX_GPIO(GPIO_FN_IRQ1_PD, IRQ1_PD_MARK), - PINMUX_GPIO(GPIO_FN_IRQ0_PD, IRQ0_PD_MARK), - PINMUX_GPIO(GPIO_FN_IRQ7_PE, IRQ7_PE_MARK), - PINMUX_GPIO(GPIO_FN_IRQ6_PE, IRQ6_PE_MARK), - PINMUX_GPIO(GPIO_FN_IRQ5_PE, IRQ5_PE_MARK), - PINMUX_GPIO(GPIO_FN_IRQ4_PE, IRQ4_PE_MARK), - PINMUX_GPIO(GPIO_FN_IRQ3_PE, IRQ3_PE_MARK), - PINMUX_GPIO(GPIO_FN_IRQ2_PE, IRQ2_PE_MARK), - PINMUX_GPIO(GPIO_FN_IRQ1_PE, IRQ1_PE_MARK), - PINMUX_GPIO(GPIO_FN_IRQ0_PE, IRQ0_PE_MARK), - - PINMUX_GPIO(GPIO_FN_WDTOVF, WDTOVF_MARK), - PINMUX_GPIO(GPIO_FN_IRQOUT, IRQOUT_MARK), - PINMUX_GPIO(GPIO_FN_REFOUT, REFOUT_MARK), - PINMUX_GPIO(GPIO_FN_IRQOUT_REFOUT, IRQOUT_REFOUT_MARK), - PINMUX_GPIO(GPIO_FN_UBCTRG, UBCTRG_MARK), + GPIO_FN(PINT7_PB), + GPIO_FN(PINT6_PB), + GPIO_FN(PINT5_PB), + GPIO_FN(PINT4_PB), + GPIO_FN(PINT3_PB), + GPIO_FN(PINT2_PB), + GPIO_FN(PINT1_PB), + GPIO_FN(PINT0_PB), + GPIO_FN(PINT7_PD), + GPIO_FN(PINT6_PD), + GPIO_FN(PINT5_PD), + GPIO_FN(PINT4_PD), + GPIO_FN(PINT3_PD), + GPIO_FN(PINT2_PD), + GPIO_FN(PINT1_PD), + GPIO_FN(PINT0_PD), + GPIO_FN(IRQ7_PB), + GPIO_FN(IRQ6_PB), + GPIO_FN(IRQ5_PB), + GPIO_FN(IRQ4_PB), + GPIO_FN(IRQ3_PB), + GPIO_FN(IRQ2_PB), + GPIO_FN(IRQ1_PB), + GPIO_FN(IRQ0_PB), + GPIO_FN(IRQ7_PD), + GPIO_FN(IRQ6_PD), + GPIO_FN(IRQ5_PD), + GPIO_FN(IRQ4_PD), + GPIO_FN(IRQ3_PD), + GPIO_FN(IRQ2_PD), + GPIO_FN(IRQ1_PD), + GPIO_FN(IRQ0_PD), + GPIO_FN(IRQ7_PE), + GPIO_FN(IRQ6_PE), + GPIO_FN(IRQ5_PE), + GPIO_FN(IRQ4_PE), + GPIO_FN(IRQ3_PE), + GPIO_FN(IRQ2_PE), + GPIO_FN(IRQ1_PE), + GPIO_FN(IRQ0_PE), + + GPIO_FN(WDTOVF), + GPIO_FN(IRQOUT), + GPIO_FN(REFOUT), + GPIO_FN(IRQOUT_REFOUT), + GPIO_FN(UBCTRG), /* CAN */ - PINMUX_GPIO(GPIO_FN_CTX1, CTX1_MARK), - PINMUX_GPIO(GPIO_FN_CRX1, CRX1_MARK), - PINMUX_GPIO(GPIO_FN_CTX0, CTX0_MARK), - PINMUX_GPIO(GPIO_FN_CTX0_CTX1, CTX0_CTX1_MARK), - PINMUX_GPIO(GPIO_FN_CRX0, CRX0_MARK), - PINMUX_GPIO(GPIO_FN_CRX0_CRX1, CRX0_CRX1_MARK), + GPIO_FN(CTX1), + GPIO_FN(CRX1), + GPIO_FN(CTX0), + GPIO_FN(CTX0_CTX1), + GPIO_FN(CRX0), + GPIO_FN(CRX0_CRX1), /* IIC3 */ - PINMUX_GPIO(GPIO_FN_SDA3, SDA3_MARK), - PINMUX_GPIO(GPIO_FN_SCL3, SCL3_MARK), - PINMUX_GPIO(GPIO_FN_SDA2, SDA2_MARK), - PINMUX_GPIO(GPIO_FN_SCL2, SCL2_MARK), - PINMUX_GPIO(GPIO_FN_SDA1, SDA1_MARK), - PINMUX_GPIO(GPIO_FN_SCL1, SCL1_MARK), - PINMUX_GPIO(GPIO_FN_SDA0, SDA0_MARK), - PINMUX_GPIO(GPIO_FN_SCL0, SCL0_MARK), + GPIO_FN(SDA3), + GPIO_FN(SCL3), + GPIO_FN(SDA2), + GPIO_FN(SCL2), + GPIO_FN(SDA1), + GPIO_FN(SCL1), + GPIO_FN(SDA0), + GPIO_FN(SCL0), /* DMAC */ - PINMUX_GPIO(GPIO_FN_TEND0_PD, TEND0_PD_MARK), - PINMUX_GPIO(GPIO_FN_TEND0_PE, TEND0_PE_MARK), - PINMUX_GPIO(GPIO_FN_DACK0_PD, DACK0_PD_MARK), - PINMUX_GPIO(GPIO_FN_DACK0_PE, DACK0_PE_MARK), - PINMUX_GPIO(GPIO_FN_DREQ0_PD, DREQ0_PD_MARK), - PINMUX_GPIO(GPIO_FN_DREQ0_PE, DREQ0_PE_MARK), - PINMUX_GPIO(GPIO_FN_TEND1_PD, TEND1_PD_MARK), - PINMUX_GPIO(GPIO_FN_TEND1_PE, TEND1_PE_MARK), - PINMUX_GPIO(GPIO_FN_DACK1_PD, DACK1_PD_MARK), - PINMUX_GPIO(GPIO_FN_DACK1_PE, DACK1_PE_MARK), - PINMUX_GPIO(GPIO_FN_DREQ1_PD, DREQ1_PD_MARK), - PINMUX_GPIO(GPIO_FN_DREQ1_PE, DREQ1_PE_MARK), - PINMUX_GPIO(GPIO_FN_DACK2, DACK2_MARK), - PINMUX_GPIO(GPIO_FN_DREQ2, DREQ2_MARK), - PINMUX_GPIO(GPIO_FN_DACK3, DACK3_MARK), - PINMUX_GPIO(GPIO_FN_DREQ3, DREQ3_MARK), + GPIO_FN(TEND0_PD), + GPIO_FN(TEND0_PE), + GPIO_FN(DACK0_PD), + GPIO_FN(DACK0_PE), + GPIO_FN(DREQ0_PD), + GPIO_FN(DREQ0_PE), + GPIO_FN(TEND1_PD), + GPIO_FN(TEND1_PE), + GPIO_FN(DACK1_PD), + GPIO_FN(DACK1_PE), + GPIO_FN(DREQ1_PD), + GPIO_FN(DREQ1_PE), + GPIO_FN(DACK2), + GPIO_FN(DREQ2), + GPIO_FN(DACK3), + GPIO_FN(DREQ3), /* ADC */ - PINMUX_GPIO(GPIO_FN_ADTRG_PD, ADTRG_PD_MARK), - PINMUX_GPIO(GPIO_FN_ADTRG_PE, ADTRG_PE_MARK), + GPIO_FN(ADTRG_PD), + GPIO_FN(ADTRG_PE), /* BSC */ - PINMUX_GPIO(GPIO_FN_D31, D31_MARK), - PINMUX_GPIO(GPIO_FN_D30, D30_MARK), - PINMUX_GPIO(GPIO_FN_D29, D29_MARK), - PINMUX_GPIO(GPIO_FN_D28, D28_MARK), - PINMUX_GPIO(GPIO_FN_D27, D27_MARK), - PINMUX_GPIO(GPIO_FN_D26, D26_MARK), - PINMUX_GPIO(GPIO_FN_D25, D25_MARK), - PINMUX_GPIO(GPIO_FN_D24, D24_MARK), - PINMUX_GPIO(GPIO_FN_D23, D23_MARK), - PINMUX_GPIO(GPIO_FN_D22, D22_MARK), - PINMUX_GPIO(GPIO_FN_D21, D21_MARK), - PINMUX_GPIO(GPIO_FN_D20, D20_MARK), - PINMUX_GPIO(GPIO_FN_D19, D19_MARK), - PINMUX_GPIO(GPIO_FN_D18, D18_MARK), - PINMUX_GPIO(GPIO_FN_D17, D17_MARK), - PINMUX_GPIO(GPIO_FN_D16, D16_MARK), - PINMUX_GPIO(GPIO_FN_A25, A25_MARK), - PINMUX_GPIO(GPIO_FN_A24, A24_MARK), - PINMUX_GPIO(GPIO_FN_A23, A23_MARK), - PINMUX_GPIO(GPIO_FN_A22, A22_MARK), - PINMUX_GPIO(GPIO_FN_A21, A21_MARK), - PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK), - PINMUX_GPIO(GPIO_FN_MRES, MRES_MARK), - PINMUX_GPIO(GPIO_FN_BS, BS_MARK), - PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK), - PINMUX_GPIO(GPIO_FN_CS1, CS1_MARK), - PINMUX_GPIO(GPIO_FN_CS6_CE1B, CS6_CE1B_MARK), - PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK), - PINMUX_GPIO(GPIO_FN_CS5_CE1A, CS5_CE1A_MARK), - PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK), - PINMUX_GPIO(GPIO_FN_FRAME, FRAME_MARK), - PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK), - PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK), - PINMUX_GPIO(GPIO_FN_CKE, CKE_MARK), - PINMUX_GPIO(GPIO_FN_CASU, CASU_MARK), - PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK), - PINMUX_GPIO(GPIO_FN_RASU, RASU_MARK), - PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK), - PINMUX_GPIO(GPIO_FN_CASL, CASL_MARK), - PINMUX_GPIO(GPIO_FN_RASL, RASL_MARK), - PINMUX_GPIO(GPIO_FN_WE3_DQMUU_AH_ICIO_WR, WE3_DQMUU_AH_ICIO_WR_MARK), - PINMUX_GPIO(GPIO_FN_WE2_DQMUL_ICIORD, WE2_DQMUL_ICIORD_MARK), - PINMUX_GPIO(GPIO_FN_WE1_DQMLU_WE, WE1_DQMLU_WE_MARK), - PINMUX_GPIO(GPIO_FN_WE0_DQMLL, WE0_DQMLL_MARK), - PINMUX_GPIO(GPIO_FN_CS3, CS3_MARK), - PINMUX_GPIO(GPIO_FN_CS2, CS2_MARK), - PINMUX_GPIO(GPIO_FN_A1, A1_MARK), - PINMUX_GPIO(GPIO_FN_A0, A0_MARK), - PINMUX_GPIO(GPIO_FN_CS7, CS7_MARK), + GPIO_FN(D31), + GPIO_FN(D30), + GPIO_FN(D29), + GPIO_FN(D28), + GPIO_FN(D27), + GPIO_FN(D26), + GPIO_FN(D25), + GPIO_FN(D24), + GPIO_FN(D23), + GPIO_FN(D22), + GPIO_FN(D21), + GPIO_FN(D20), + GPIO_FN(D19), + GPIO_FN(D18), + GPIO_FN(D17), + GPIO_FN(D16), + GPIO_FN(A25), + GPIO_FN(A24), + GPIO_FN(A23), + GPIO_FN(A22), + GPIO_FN(A21), + GPIO_FN(CS4), + GPIO_FN(MRES), + GPIO_FN(BS), + GPIO_FN(IOIS16), + GPIO_FN(CS1), + GPIO_FN(CS6_CE1B), + GPIO_FN(CE2B), + GPIO_FN(CS5_CE1A), + GPIO_FN(CE2A), + GPIO_FN(FRAME), + GPIO_FN(WAIT), + GPIO_FN(RDWR), + GPIO_FN(CKE), + GPIO_FN(CASU), + GPIO_FN(BREQ), + GPIO_FN(RASU), + GPIO_FN(BACK), + GPIO_FN(CASL), + GPIO_FN(RASL), + GPIO_FN(WE3_DQMUU_AH_ICIO_WR), + GPIO_FN(WE2_DQMUL_ICIORD), + GPIO_FN(WE1_DQMLU_WE), + GPIO_FN(WE0_DQMLL), + GPIO_FN(CS3), + GPIO_FN(CS2), + GPIO_FN(A1), + GPIO_FN(A0), + GPIO_FN(CS7), /* TMU */ - PINMUX_GPIO(GPIO_FN_TIOC4D, TIOC4D_MARK), - PINMUX_GPIO(GPIO_FN_TIOC4C, TIOC4C_MARK), - PINMUX_GPIO(GPIO_FN_TIOC4B, TIOC4B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC4A, TIOC4A_MARK), - PINMUX_GPIO(GPIO_FN_TIOC3D, TIOC3D_MARK), - PINMUX_GPIO(GPIO_FN_TIOC3C, TIOC3C_MARK), - PINMUX_GPIO(GPIO_FN_TIOC3B, TIOC3B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC3A, TIOC3A_MARK), - PINMUX_GPIO(GPIO_FN_TIOC2B, TIOC2B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC1B, TIOC1B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC2A, TIOC2A_MARK), - PINMUX_GPIO(GPIO_FN_TIOC1A, TIOC1A_MARK), - PINMUX_GPIO(GPIO_FN_TIOC0D, TIOC0D_MARK), - PINMUX_GPIO(GPIO_FN_TIOC0C, TIOC0C_MARK), - PINMUX_GPIO(GPIO_FN_TIOC0B, TIOC0B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC0A, TIOC0A_MARK), - PINMUX_GPIO(GPIO_FN_TCLKD_PD, TCLKD_PD_MARK), - PINMUX_GPIO(GPIO_FN_TCLKC_PD, TCLKC_PD_MARK), - PINMUX_GPIO(GPIO_FN_TCLKB_PD, TCLKB_PD_MARK), - PINMUX_GPIO(GPIO_FN_TCLKA_PD, TCLKA_PD_MARK), - PINMUX_GPIO(GPIO_FN_TCLKD_PF, TCLKD_PF_MARK), - PINMUX_GPIO(GPIO_FN_TCLKC_PF, TCLKC_PF_MARK), - PINMUX_GPIO(GPIO_FN_TCLKB_PF, TCLKB_PF_MARK), - PINMUX_GPIO(GPIO_FN_TCLKA_PF, TCLKA_PF_MARK), + GPIO_FN(TIOC4D), + GPIO_FN(TIOC4C), + GPIO_FN(TIOC4B), + GPIO_FN(TIOC4A), + GPIO_FN(TIOC3D), + GPIO_FN(TIOC3C), + GPIO_FN(TIOC3B), + GPIO_FN(TIOC3A), + GPIO_FN(TIOC2B), + GPIO_FN(TIOC1B), + GPIO_FN(TIOC2A), + GPIO_FN(TIOC1A), + GPIO_FN(TIOC0D), + GPIO_FN(TIOC0C), + GPIO_FN(TIOC0B), + GPIO_FN(TIOC0A), + GPIO_FN(TCLKD_PD), + GPIO_FN(TCLKC_PD), + GPIO_FN(TCLKB_PD), + GPIO_FN(TCLKA_PD), + GPIO_FN(TCLKD_PF), + GPIO_FN(TCLKC_PF), + GPIO_FN(TCLKB_PF), + GPIO_FN(TCLKA_PF), /* SSU */ - PINMUX_GPIO(GPIO_FN_SCS0_PD, SCS0_PD_MARK), - PINMUX_GPIO(GPIO_FN_SSO0_PD, SSO0_PD_MARK), - PINMUX_GPIO(GPIO_FN_SSI0_PD, SSI0_PD_MARK), - PINMUX_GPIO(GPIO_FN_SSCK0_PD, SSCK0_PD_MARK), - PINMUX_GPIO(GPIO_FN_SCS0_PF, SCS0_PF_MARK), - PINMUX_GPIO(GPIO_FN_SSO0_PF, SSO0_PF_MARK), - PINMUX_GPIO(GPIO_FN_SSI0_PF, SSI0_PF_MARK), - PINMUX_GPIO(GPIO_FN_SSCK0_PF, SSCK0_PF_MARK), - PINMUX_GPIO(GPIO_FN_SCS1_PD, SCS1_PD_MARK), - PINMUX_GPIO(GPIO_FN_SSO1_PD, SSO1_PD_MARK), - PINMUX_GPIO(GPIO_FN_SSI1_PD, SSI1_PD_MARK), - PINMUX_GPIO(GPIO_FN_SSCK1_PD, SSCK1_PD_MARK), - PINMUX_GPIO(GPIO_FN_SCS1_PF, SCS1_PF_MARK), - PINMUX_GPIO(GPIO_FN_SSO1_PF, SSO1_PF_MARK), - PINMUX_GPIO(GPIO_FN_SSI1_PF, SSI1_PF_MARK), - PINMUX_GPIO(GPIO_FN_SSCK1_PF, SSCK1_PF_MARK), + GPIO_FN(SCS0_PD), + GPIO_FN(SSO0_PD), + GPIO_FN(SSI0_PD), + GPIO_FN(SSCK0_PD), + GPIO_FN(SCS0_PF), + GPIO_FN(SSO0_PF), + GPIO_FN(SSI0_PF), + GPIO_FN(SSCK0_PF), + GPIO_FN(SCS1_PD), + GPIO_FN(SSO1_PD), + GPIO_FN(SSI1_PD), + GPIO_FN(SSCK1_PD), + GPIO_FN(SCS1_PF), + GPIO_FN(SSO1_PF), + GPIO_FN(SSI1_PF), + GPIO_FN(SSCK1_PF), /* SCIF */ - PINMUX_GPIO(GPIO_FN_TXD0, TXD0_MARK), - PINMUX_GPIO(GPIO_FN_RXD0, RXD0_MARK), - PINMUX_GPIO(GPIO_FN_SCK0, SCK0_MARK), - PINMUX_GPIO(GPIO_FN_TXD1, TXD1_MARK), - PINMUX_GPIO(GPIO_FN_RXD1, RXD1_MARK), - PINMUX_GPIO(GPIO_FN_SCK1, SCK1_MARK), - PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK), - PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK), - PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK), - PINMUX_GPIO(GPIO_FN_RTS3, RTS3_MARK), - PINMUX_GPIO(GPIO_FN_CTS3, CTS3_MARK), - PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK), - PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK), - PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK), + GPIO_FN(TXD0), + GPIO_FN(RXD0), + GPIO_FN(SCK0), + GPIO_FN(TXD1), + GPIO_FN(RXD1), + GPIO_FN(SCK1), + GPIO_FN(TXD2), + GPIO_FN(RXD2), + GPIO_FN(SCK2), + GPIO_FN(RTS3), + GPIO_FN(CTS3), + GPIO_FN(TXD3), + GPIO_FN(RXD3), + GPIO_FN(SCK3), /* SSI */ - PINMUX_GPIO(GPIO_FN_AUDIO_CLK, AUDIO_CLK_MARK), - PINMUX_GPIO(GPIO_FN_SSIDATA3, SSIDATA3_MARK), - PINMUX_GPIO(GPIO_FN_SSIWS3, SSIWS3_MARK), - PINMUX_GPIO(GPIO_FN_SSISCK3, SSISCK3_MARK), - PINMUX_GPIO(GPIO_FN_SSIDATA2, SSIDATA2_MARK), - PINMUX_GPIO(GPIO_FN_SSIWS2, SSIWS2_MARK), - PINMUX_GPIO(GPIO_FN_SSISCK2, SSISCK2_MARK), - PINMUX_GPIO(GPIO_FN_SSIDATA1, SSIDATA1_MARK), - PINMUX_GPIO(GPIO_FN_SSIWS1, SSIWS1_MARK), - PINMUX_GPIO(GPIO_FN_SSISCK1, SSISCK1_MARK), - PINMUX_GPIO(GPIO_FN_SSIDATA0, SSIDATA0_MARK), - PINMUX_GPIO(GPIO_FN_SSIWS0, SSIWS0_MARK), - PINMUX_GPIO(GPIO_FN_SSISCK0, SSISCK0_MARK), + GPIO_FN(AUDIO_CLK), + GPIO_FN(SSIDATA3), + GPIO_FN(SSIWS3), + GPIO_FN(SSISCK3), + GPIO_FN(SSIDATA2), + GPIO_FN(SSIWS2), + GPIO_FN(SSISCK2), + GPIO_FN(SSIDATA1), + GPIO_FN(SSIWS1), + GPIO_FN(SSISCK1), + GPIO_FN(SSIDATA0), + GPIO_FN(SSIWS0), + GPIO_FN(SSISCK0), /* FLCTL */ - PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK), - PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK), - PINMUX_GPIO(GPIO_FN_NAF7, NAF7_MARK), - PINMUX_GPIO(GPIO_FN_NAF6, NAF6_MARK), - PINMUX_GPIO(GPIO_FN_NAF5, NAF5_MARK), - PINMUX_GPIO(GPIO_FN_NAF4, NAF4_MARK), - PINMUX_GPIO(GPIO_FN_NAF3, NAF3_MARK), - PINMUX_GPIO(GPIO_FN_NAF2, NAF2_MARK), - PINMUX_GPIO(GPIO_FN_NAF1, NAF1_MARK), - PINMUX_GPIO(GPIO_FN_NAF0, NAF0_MARK), - PINMUX_GPIO(GPIO_FN_FSC, FSC_MARK), - PINMUX_GPIO(GPIO_FN_FOE, FOE_MARK), - PINMUX_GPIO(GPIO_FN_FCDE, FCDE_MARK), - PINMUX_GPIO(GPIO_FN_FWE, FWE_MARK), + GPIO_FN(FCE), + GPIO_FN(FRB), + GPIO_FN(NAF7), + GPIO_FN(NAF6), + GPIO_FN(NAF5), + GPIO_FN(NAF4), + GPIO_FN(NAF3), + GPIO_FN(NAF2), + GPIO_FN(NAF1), + GPIO_FN(NAF0), + GPIO_FN(FSC), + GPIO_FN(FOE), + GPIO_FN(FCDE), + GPIO_FN(FWE), /* LCDC */ - PINMUX_GPIO(GPIO_FN_LCD_VEPWC, LCD_VEPWC_MARK), - PINMUX_GPIO(GPIO_FN_LCD_VCPWC, LCD_VCPWC_MARK), - PINMUX_GPIO(GPIO_FN_LCD_CLK, LCD_CLK_MARK), - PINMUX_GPIO(GPIO_FN_LCD_FLM, LCD_FLM_MARK), - PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK), - PINMUX_GPIO(GPIO_FN_LCD_CL2, LCD_CL2_MARK), - PINMUX_GPIO(GPIO_FN_LCD_CL1, LCD_CL1_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DON, LCD_DON_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA15, LCD_DATA15_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA14, LCD_DATA14_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA13, LCD_DATA13_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA12, LCD_DATA12_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA11, LCD_DATA11_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA10, LCD_DATA10_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA9, LCD_DATA9_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA8, LCD_DATA8_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA7, LCD_DATA7_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA6, LCD_DATA6_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA5, LCD_DATA5_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA4, LCD_DATA4_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA3, LCD_DATA3_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA2, LCD_DATA2_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA1, LCD_DATA1_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA0, LCD_DATA0_MARK), + GPIO_FN(LCD_VEPWC), + GPIO_FN(LCD_VCPWC), + GPIO_FN(LCD_CLK), + GPIO_FN(LCD_FLM), + GPIO_FN(LCD_M_DISP), + GPIO_FN(LCD_CL2), + GPIO_FN(LCD_CL1), + GPIO_FN(LCD_DON), + GPIO_FN(LCD_DATA15), + GPIO_FN(LCD_DATA14), + GPIO_FN(LCD_DATA13), + GPIO_FN(LCD_DATA12), + GPIO_FN(LCD_DATA11), + GPIO_FN(LCD_DATA10), + GPIO_FN(LCD_DATA9), + GPIO_FN(LCD_DATA8), + GPIO_FN(LCD_DATA7), + GPIO_FN(LCD_DATA6), + GPIO_FN(LCD_DATA5), + GPIO_FN(LCD_DATA4), + GPIO_FN(LCD_DATA3), + GPIO_FN(LCD_DATA2), + GPIO_FN(LCD_DATA1), + GPIO_FN(LCD_DATA0), }; -static struct pinmux_cfg_reg pinmux_config_regs[] = { +static const struct pinmux_cfg_reg pinmux_config_regs[] = { { PINMUX_CFG_REG("PBIORL", 0xfffe3886, 16, 1) { 0, 0, 0, 0, @@ -1525,7 +1529,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { {} }; -static struct pinmux_data_reg pinmux_data_regs[] = { +static const struct pinmux_data_reg pinmux_data_regs[] = { { PINMUX_DATA_REG("PADRL", 0xfffe3802, 16) { 0, 0, 0, 0, 0, 0, 0, 0, @@ -1571,19 +1575,17 @@ static struct pinmux_data_reg pinmux_data_regs[] = { { }, }; -struct sh_pfc_soc_info sh7203_pinmux_info = { +const struct sh_pfc_soc_info sh7203_pinmux_info = { .name = "sh7203_pfc", - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN }, .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - .first_gpio = GPIO_PA7, - .last_gpio = GPIO_FN_LCD_DATA0, + .pins = pinmux_pins, + .nr_pins = ARRAY_SIZE(pinmux_pins), + .func_gpios = pinmux_func_gpios, + .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios), - .gpios = pinmux_gpios, .cfg_regs = pinmux_config_regs, .data_regs = pinmux_data_regs, diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7264.c b/drivers/pinctrl/sh-pfc/pfc-sh7264.c index 2ba5639dcf34..284675249ed9 100644 --- a/drivers/pinctrl/sh-pfc/pfc-sh7264.c +++ b/drivers/pinctrl/sh-pfc/pfc-sh7264.c @@ -604,7 +604,7 @@ enum { PINMUX_MARK_END, }; -static pinmux_enum_t pinmux_data[] = { +static const pinmux_enum_t pinmux_data[] = { /* Port A */ PINMUX_DATA(PA3_DATA, PA3_IN), @@ -1072,7 +1072,7 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_DATA(SD_D2_MARK, PK0MD_10), }; -static struct pinmux_gpio pinmux_gpios[] = { +static struct sh_pfc_pin pinmux_pins[] = { /* Port A */ PINMUX_GPIO(GPIO_PA3, PA3_DATA), @@ -1216,257 +1216,261 @@ static struct pinmux_gpio pinmux_gpios[] = { PINMUX_GPIO(GPIO_PK2, PK2_DATA), PINMUX_GPIO(GPIO_PK1, PK1_DATA), PINMUX_GPIO(GPIO_PK0, PK0_DATA), +}; + +#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) +static const struct pinmux_func pinmux_func_gpios[] = { /* INTC */ - PINMUX_GPIO(GPIO_FN_PINT7_PG, PINT7_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT6_PG, PINT6_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT5_PG, PINT5_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT4_PG, PINT4_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT3_PG, PINT3_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT2_PG, PINT2_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT1_PG, PINT1_PG_MARK), - - PINMUX_GPIO(GPIO_FN_IRQ7_PC, IRQ7_PC_MARK), - PINMUX_GPIO(GPIO_FN_IRQ6_PC, IRQ6_PC_MARK), - PINMUX_GPIO(GPIO_FN_IRQ5_PC, IRQ5_PC_MARK), - PINMUX_GPIO(GPIO_FN_IRQ4_PC, IRQ4_PC_MARK), - PINMUX_GPIO(GPIO_FN_IRQ3_PG, IRQ3_PG_MARK), - PINMUX_GPIO(GPIO_FN_IRQ2_PG, IRQ2_PG_MARK), - PINMUX_GPIO(GPIO_FN_IRQ1_PJ, IRQ1_PJ_MARK), - PINMUX_GPIO(GPIO_FN_IRQ0_PJ, IRQ0_PJ_MARK), - PINMUX_GPIO(GPIO_FN_IRQ3_PE, IRQ3_PE_MARK), - PINMUX_GPIO(GPIO_FN_IRQ2_PE, IRQ2_PE_MARK), - PINMUX_GPIO(GPIO_FN_IRQ1_PE, IRQ1_PE_MARK), - PINMUX_GPIO(GPIO_FN_IRQ0_PE, IRQ0_PE_MARK), + GPIO_FN(PINT7_PG), + GPIO_FN(PINT6_PG), + GPIO_FN(PINT5_PG), + GPIO_FN(PINT4_PG), + GPIO_FN(PINT3_PG), + GPIO_FN(PINT2_PG), + GPIO_FN(PINT1_PG), + + GPIO_FN(IRQ7_PC), + GPIO_FN(IRQ6_PC), + GPIO_FN(IRQ5_PC), + GPIO_FN(IRQ4_PC), + GPIO_FN(IRQ3_PG), + GPIO_FN(IRQ2_PG), + GPIO_FN(IRQ1_PJ), + GPIO_FN(IRQ0_PJ), + GPIO_FN(IRQ3_PE), + GPIO_FN(IRQ2_PE), + GPIO_FN(IRQ1_PE), + GPIO_FN(IRQ0_PE), /* WDT */ - PINMUX_GPIO(GPIO_FN_WDTOVF, WDTOVF_MARK), + GPIO_FN(WDTOVF), /* CAN */ - PINMUX_GPIO(GPIO_FN_CTX1, CTX1_MARK), - PINMUX_GPIO(GPIO_FN_CRX1, CRX1_MARK), - PINMUX_GPIO(GPIO_FN_CTX0, CTX0_MARK), - PINMUX_GPIO(GPIO_FN_CRX0, CRX0_MARK), - PINMUX_GPIO(GPIO_FN_CRX0_CRX1, CRX0_CRX1_MARK), + GPIO_FN(CTX1), + GPIO_FN(CRX1), + GPIO_FN(CTX0), + GPIO_FN(CRX0), + GPIO_FN(CRX0_CRX1), /* DMAC */ - PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK), - PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK), - PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK), - PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK), - PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK), - PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK), + GPIO_FN(TEND0), + GPIO_FN(DACK0), + GPIO_FN(DREQ0), + GPIO_FN(TEND1), + GPIO_FN(DACK1), + GPIO_FN(DREQ1), /* ADC */ - PINMUX_GPIO(GPIO_FN_ADTRG, ADTRG_MARK), + GPIO_FN(ADTRG), /* BSCh */ - PINMUX_GPIO(GPIO_FN_A25, A25_MARK), - PINMUX_GPIO(GPIO_FN_A24, A24_MARK), - PINMUX_GPIO(GPIO_FN_A23, A23_MARK), - PINMUX_GPIO(GPIO_FN_A22, A22_MARK), - PINMUX_GPIO(GPIO_FN_A21, A21_MARK), - PINMUX_GPIO(GPIO_FN_A20, A20_MARK), - PINMUX_GPIO(GPIO_FN_A19, A19_MARK), - PINMUX_GPIO(GPIO_FN_A18, A18_MARK), - PINMUX_GPIO(GPIO_FN_A17, A17_MARK), - PINMUX_GPIO(GPIO_FN_A16, A16_MARK), - PINMUX_GPIO(GPIO_FN_A15, A15_MARK), - PINMUX_GPIO(GPIO_FN_A14, A14_MARK), - PINMUX_GPIO(GPIO_FN_A13, A13_MARK), - PINMUX_GPIO(GPIO_FN_A12, A12_MARK), - PINMUX_GPIO(GPIO_FN_A11, A11_MARK), - PINMUX_GPIO(GPIO_FN_A10, A10_MARK), - PINMUX_GPIO(GPIO_FN_A9, A9_MARK), - PINMUX_GPIO(GPIO_FN_A8, A8_MARK), - PINMUX_GPIO(GPIO_FN_A7, A7_MARK), - PINMUX_GPIO(GPIO_FN_A6, A6_MARK), - PINMUX_GPIO(GPIO_FN_A5, A5_MARK), - PINMUX_GPIO(GPIO_FN_A4, A4_MARK), - PINMUX_GPIO(GPIO_FN_A3, A3_MARK), - PINMUX_GPIO(GPIO_FN_A2, A2_MARK), - PINMUX_GPIO(GPIO_FN_A1, A1_MARK), - PINMUX_GPIO(GPIO_FN_A0, A0_MARK), - - PINMUX_GPIO(GPIO_FN_D15, D15_MARK), - PINMUX_GPIO(GPIO_FN_D14, D14_MARK), - PINMUX_GPIO(GPIO_FN_D13, D13_MARK), - PINMUX_GPIO(GPIO_FN_D12, D12_MARK), - PINMUX_GPIO(GPIO_FN_D11, D11_MARK), - PINMUX_GPIO(GPIO_FN_D10, D10_MARK), - PINMUX_GPIO(GPIO_FN_D9, D9_MARK), - PINMUX_GPIO(GPIO_FN_D8, D8_MARK), - PINMUX_GPIO(GPIO_FN_D7, D7_MARK), - PINMUX_GPIO(GPIO_FN_D6, D6_MARK), - PINMUX_GPIO(GPIO_FN_D5, D5_MARK), - PINMUX_GPIO(GPIO_FN_D4, D4_MARK), - PINMUX_GPIO(GPIO_FN_D3, D3_MARK), - PINMUX_GPIO(GPIO_FN_D2, D2_MARK), - PINMUX_GPIO(GPIO_FN_D1, D1_MARK), - PINMUX_GPIO(GPIO_FN_D0, D0_MARK), - - PINMUX_GPIO(GPIO_FN_BS, BS_MARK), - PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK), - PINMUX_GPIO(GPIO_FN_CS3, CS3_MARK), - PINMUX_GPIO(GPIO_FN_CS2, CS2_MARK), - PINMUX_GPIO(GPIO_FN_CS1, CS1_MARK), - PINMUX_GPIO(GPIO_FN_CS0, CS0_MARK), - PINMUX_GPIO(GPIO_FN_CS6CE1B, CS6CE1B_MARK), - PINMUX_GPIO(GPIO_FN_CS5CE1A, CS5CE1A_MARK), - PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK), - PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK), - PINMUX_GPIO(GPIO_FN_RD, RD_MARK), - PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK), - PINMUX_GPIO(GPIO_FN_ICIOWRAH, ICIOWRAH_MARK), - PINMUX_GPIO(GPIO_FN_ICIORD, ICIORD_MARK), - PINMUX_GPIO(GPIO_FN_WE1DQMUWE, WE1DQMUWE_MARK), - PINMUX_GPIO(GPIO_FN_WE0DQML, WE0DQML_MARK), - PINMUX_GPIO(GPIO_FN_RAS, RAS_MARK), - PINMUX_GPIO(GPIO_FN_CAS, CAS_MARK), - PINMUX_GPIO(GPIO_FN_CKE, CKE_MARK), - PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK), - PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK), - PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK), - PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK), + GPIO_FN(A25), + GPIO_FN(A24), + GPIO_FN(A23), + GPIO_FN(A22), + GPIO_FN(A21), + GPIO_FN(A20), + GPIO_FN(A19), + GPIO_FN(A18), + GPIO_FN(A17), + GPIO_FN(A16), + GPIO_FN(A15), + GPIO_FN(A14), + GPIO_FN(A13), + GPIO_FN(A12), + GPIO_FN(A11), + GPIO_FN(A10), + GPIO_FN(A9), + GPIO_FN(A8), + GPIO_FN(A7), + GPIO_FN(A6), + GPIO_FN(A5), + GPIO_FN(A4), + GPIO_FN(A3), + GPIO_FN(A2), + GPIO_FN(A1), + GPIO_FN(A0), + + GPIO_FN(D15), + GPIO_FN(D14), + GPIO_FN(D13), + GPIO_FN(D12), + GPIO_FN(D11), + GPIO_FN(D10), + GPIO_FN(D9), + GPIO_FN(D8), + GPIO_FN(D7), + GPIO_FN(D6), + GPIO_FN(D5), + GPIO_FN(D4), + GPIO_FN(D3), + GPIO_FN(D2), + GPIO_FN(D1), + GPIO_FN(D0), + + GPIO_FN(BS), + GPIO_FN(CS4), + GPIO_FN(CS3), + GPIO_FN(CS2), + GPIO_FN(CS1), + GPIO_FN(CS0), + GPIO_FN(CS6CE1B), + GPIO_FN(CS5CE1A), + GPIO_FN(CE2A), + GPIO_FN(CE2B), + GPIO_FN(RD), + GPIO_FN(RDWR), + GPIO_FN(ICIOWRAH), + GPIO_FN(ICIORD), + GPIO_FN(WE1DQMUWE), + GPIO_FN(WE0DQML), + GPIO_FN(RAS), + GPIO_FN(CAS), + GPIO_FN(CKE), + GPIO_FN(WAIT), + GPIO_FN(BREQ), + GPIO_FN(BACK), + GPIO_FN(IOIS16), /* TMU */ - PINMUX_GPIO(GPIO_FN_TIOC4D, TIOC4D_MARK), - PINMUX_GPIO(GPIO_FN_TIOC4C, TIOC4C_MARK), - PINMUX_GPIO(GPIO_FN_TIOC4B, TIOC4B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC4A, TIOC4A_MARK), - PINMUX_GPIO(GPIO_FN_TIOC3D, TIOC3D_MARK), - PINMUX_GPIO(GPIO_FN_TIOC3C, TIOC3C_MARK), - PINMUX_GPIO(GPIO_FN_TIOC3B, TIOC3B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC3A, TIOC3A_MARK), - PINMUX_GPIO(GPIO_FN_TIOC2B, TIOC2B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC1B, TIOC1B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC2A, TIOC2A_MARK), - PINMUX_GPIO(GPIO_FN_TIOC1A, TIOC1A_MARK), - PINMUX_GPIO(GPIO_FN_TIOC0D, TIOC0D_MARK), - PINMUX_GPIO(GPIO_FN_TIOC0C, TIOC0C_MARK), - PINMUX_GPIO(GPIO_FN_TIOC0B, TIOC0B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC0A, TIOC0A_MARK), - PINMUX_GPIO(GPIO_FN_TCLKD, TCLKD_MARK), - PINMUX_GPIO(GPIO_FN_TCLKC, TCLKC_MARK), - PINMUX_GPIO(GPIO_FN_TCLKB, TCLKB_MARK), - PINMUX_GPIO(GPIO_FN_TCLKA, TCLKA_MARK), + GPIO_FN(TIOC4D), + GPIO_FN(TIOC4C), + GPIO_FN(TIOC4B), + GPIO_FN(TIOC4A), + GPIO_FN(TIOC3D), + GPIO_FN(TIOC3C), + GPIO_FN(TIOC3B), + GPIO_FN(TIOC3A), + GPIO_FN(TIOC2B), + GPIO_FN(TIOC1B), + GPIO_FN(TIOC2A), + GPIO_FN(TIOC1A), + GPIO_FN(TIOC0D), + GPIO_FN(TIOC0C), + GPIO_FN(TIOC0B), + GPIO_FN(TIOC0A), + GPIO_FN(TCLKD), + GPIO_FN(TCLKC), + GPIO_FN(TCLKB), + GPIO_FN(TCLKA), /* SCIF */ - PINMUX_GPIO(GPIO_FN_TXD0, TXD0_MARK), - PINMUX_GPIO(GPIO_FN_RXD0, RXD0_MARK), - PINMUX_GPIO(GPIO_FN_SCK0, SCK0_MARK), - PINMUX_GPIO(GPIO_FN_TXD1, TXD1_MARK), - PINMUX_GPIO(GPIO_FN_RXD1, RXD1_MARK), - PINMUX_GPIO(GPIO_FN_SCK1, SCK1_MARK), - PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK), - PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK), - PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK), - PINMUX_GPIO(GPIO_FN_RTS3, RTS3_MARK), - PINMUX_GPIO(GPIO_FN_CTS3, CTS3_MARK), - PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK), - PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK), - PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK), - PINMUX_GPIO(GPIO_FN_TXD4, TXD4_MARK), - PINMUX_GPIO(GPIO_FN_RXD4, RXD4_MARK), - PINMUX_GPIO(GPIO_FN_TXD5, TXD5_MARK), - PINMUX_GPIO(GPIO_FN_RXD5, RXD5_MARK), - PINMUX_GPIO(GPIO_FN_TXD6, TXD6_MARK), - PINMUX_GPIO(GPIO_FN_RXD6, RXD6_MARK), - PINMUX_GPIO(GPIO_FN_TXD7, TXD7_MARK), - PINMUX_GPIO(GPIO_FN_RXD7, RXD7_MARK), - PINMUX_GPIO(GPIO_FN_RTS1, RTS1_MARK), - PINMUX_GPIO(GPIO_FN_CTS1, CTS1_MARK), + GPIO_FN(TXD0), + GPIO_FN(RXD0), + GPIO_FN(SCK0), + GPIO_FN(TXD1), + GPIO_FN(RXD1), + GPIO_FN(SCK1), + GPIO_FN(TXD2), + GPIO_FN(RXD2), + GPIO_FN(SCK2), + GPIO_FN(RTS3), + GPIO_FN(CTS3), + GPIO_FN(TXD3), + GPIO_FN(RXD3), + GPIO_FN(SCK3), + GPIO_FN(TXD4), + GPIO_FN(RXD4), + GPIO_FN(TXD5), + GPIO_FN(RXD5), + GPIO_FN(TXD6), + GPIO_FN(RXD6), + GPIO_FN(TXD7), + GPIO_FN(RXD7), + GPIO_FN(RTS1), + GPIO_FN(CTS1), /* RSPI */ - PINMUX_GPIO(GPIO_FN_RSPCK0, RSPCK0_MARK), - PINMUX_GPIO(GPIO_FN_MOSI0, MOSI0_MARK), - PINMUX_GPIO(GPIO_FN_MISO0_PF12, MISO0_PF12_MARK), - PINMUX_GPIO(GPIO_FN_MISO1, MISO1_MARK), - PINMUX_GPIO(GPIO_FN_SSL00, SSL00_MARK), - PINMUX_GPIO(GPIO_FN_RSPCK1, RSPCK1_MARK), - PINMUX_GPIO(GPIO_FN_MOSI1, MOSI1_MARK), - PINMUX_GPIO(GPIO_FN_MISO1_PG19, MISO1_PG19_MARK), - PINMUX_GPIO(GPIO_FN_SSL10, SSL10_MARK), + GPIO_FN(RSPCK0), + GPIO_FN(MOSI0), + GPIO_FN(MISO0_PF12), + GPIO_FN(MISO1), + GPIO_FN(SSL00), + GPIO_FN(RSPCK1), + GPIO_FN(MOSI1), + GPIO_FN(MISO1_PG19), + GPIO_FN(SSL10), /* IIC3 */ - PINMUX_GPIO(GPIO_FN_SCL0, SCL0_MARK), - PINMUX_GPIO(GPIO_FN_SCL1, SCL1_MARK), - PINMUX_GPIO(GPIO_FN_SCL2, SCL2_MARK), - PINMUX_GPIO(GPIO_FN_SDA0, SDA0_MARK), - PINMUX_GPIO(GPIO_FN_SDA1, SDA1_MARK), - PINMUX_GPIO(GPIO_FN_SDA2, SDA2_MARK), + GPIO_FN(SCL0), + GPIO_FN(SCL1), + GPIO_FN(SCL2), + GPIO_FN(SDA0), + GPIO_FN(SDA1), + GPIO_FN(SDA2), /* SSI */ - PINMUX_GPIO(GPIO_FN_SSISCK0, SSISCK0_MARK), - PINMUX_GPIO(GPIO_FN_SSIWS0, SSIWS0_MARK), - PINMUX_GPIO(GPIO_FN_SSITXD0, SSITXD0_MARK), - PINMUX_GPIO(GPIO_FN_SSIRXD0, SSIRXD0_MARK), - PINMUX_GPIO(GPIO_FN_SSIWS1, SSIWS1_MARK), - PINMUX_GPIO(GPIO_FN_SSIWS2, SSIWS2_MARK), - PINMUX_GPIO(GPIO_FN_SSIWS3, SSIWS3_MARK), - PINMUX_GPIO(GPIO_FN_SSISCK1, SSISCK1_MARK), - PINMUX_GPIO(GPIO_FN_SSISCK2, SSISCK2_MARK), - PINMUX_GPIO(GPIO_FN_SSISCK3, SSISCK3_MARK), - PINMUX_GPIO(GPIO_FN_SSIDATA1, SSIDATA1_MARK), - PINMUX_GPIO(GPIO_FN_SSIDATA2, SSIDATA2_MARK), - PINMUX_GPIO(GPIO_FN_SSIDATA3, SSIDATA3_MARK), - PINMUX_GPIO(GPIO_FN_AUDIO_CLK, AUDIO_CLK_MARK), + GPIO_FN(SSISCK0), + GPIO_FN(SSIWS0), + GPIO_FN(SSITXD0), + GPIO_FN(SSIRXD0), + GPIO_FN(SSIWS1), + GPIO_FN(SSIWS2), + GPIO_FN(SSIWS3), + GPIO_FN(SSISCK1), + GPIO_FN(SSISCK2), + GPIO_FN(SSISCK3), + GPIO_FN(SSIDATA1), + GPIO_FN(SSIDATA2), + GPIO_FN(SSIDATA3), + GPIO_FN(AUDIO_CLK), /* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */ - PINMUX_GPIO(GPIO_FN_SIOFTXD, SIOFTXD_MARK), - PINMUX_GPIO(GPIO_FN_SIOFRXD, SIOFRXD_MARK), - PINMUX_GPIO(GPIO_FN_SIOFSYNC, SIOFSYNC_MARK), - PINMUX_GPIO(GPIO_FN_SIOFSCK, SIOFSCK_MARK), + GPIO_FN(SIOFTXD), + GPIO_FN(SIOFRXD), + GPIO_FN(SIOFSYNC), + GPIO_FN(SIOFSCK), /* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */ - PINMUX_GPIO(GPIO_FN_SPDIF_IN, SPDIF_IN_MARK), - PINMUX_GPIO(GPIO_FN_SPDIF_OUT, SPDIF_OUT_MARK), + GPIO_FN(SPDIF_IN), + GPIO_FN(SPDIF_OUT), /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */ - PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK), - PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK), + GPIO_FN(FCE), + GPIO_FN(FRB), /* VDC3 */ - PINMUX_GPIO(GPIO_FN_DV_CLK, DV_CLK_MARK), - PINMUX_GPIO(GPIO_FN_DV_VSYNC, DV_VSYNC_MARK), - PINMUX_GPIO(GPIO_FN_DV_HSYNC, DV_HSYNC_MARK), - - PINMUX_GPIO(GPIO_FN_DV_DATA7, DV_DATA7_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA6, DV_DATA6_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA5, DV_DATA5_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA4, DV_DATA4_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA3, DV_DATA3_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA2, DV_DATA2_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA1, DV_DATA1_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA0, DV_DATA0_MARK), - - PINMUX_GPIO(GPIO_FN_LCD_CLK, LCD_CLK_MARK), - PINMUX_GPIO(GPIO_FN_LCD_EXTCLK, LCD_EXTCLK_MARK), - PINMUX_GPIO(GPIO_FN_LCD_VSYNC, LCD_VSYNC_MARK), - PINMUX_GPIO(GPIO_FN_LCD_HSYNC, LCD_HSYNC_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DE, LCD_DE_MARK), - - PINMUX_GPIO(GPIO_FN_LCD_DATA15, LCD_DATA15_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA14, LCD_DATA14_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA13, LCD_DATA13_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA12, LCD_DATA12_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA11, LCD_DATA11_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA10, LCD_DATA10_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA9, LCD_DATA9_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA8, LCD_DATA8_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA7, LCD_DATA7_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA6, LCD_DATA6_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA5, LCD_DATA5_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA4, LCD_DATA4_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA3, LCD_DATA3_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA2, LCD_DATA2_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA1, LCD_DATA1_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA0, LCD_DATA0_MARK), - - PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK), + GPIO_FN(DV_CLK), + GPIO_FN(DV_VSYNC), + GPIO_FN(DV_HSYNC), + + GPIO_FN(DV_DATA7), + GPIO_FN(DV_DATA6), + GPIO_FN(DV_DATA5), + GPIO_FN(DV_DATA4), + GPIO_FN(DV_DATA3), + GPIO_FN(DV_DATA2), + GPIO_FN(DV_DATA1), + GPIO_FN(DV_DATA0), + + GPIO_FN(LCD_CLK), + GPIO_FN(LCD_EXTCLK), + GPIO_FN(LCD_VSYNC), + GPIO_FN(LCD_HSYNC), + GPIO_FN(LCD_DE), + + GPIO_FN(LCD_DATA15), + GPIO_FN(LCD_DATA14), + GPIO_FN(LCD_DATA13), + GPIO_FN(LCD_DATA12), + GPIO_FN(LCD_DATA11), + GPIO_FN(LCD_DATA10), + GPIO_FN(LCD_DATA9), + GPIO_FN(LCD_DATA8), + GPIO_FN(LCD_DATA7), + GPIO_FN(LCD_DATA6), + GPIO_FN(LCD_DATA5), + GPIO_FN(LCD_DATA4), + GPIO_FN(LCD_DATA3), + GPIO_FN(LCD_DATA2), + GPIO_FN(LCD_DATA1), + GPIO_FN(LCD_DATA0), + + GPIO_FN(LCD_M_DISP), }; -static struct pinmux_cfg_reg pinmux_config_regs[] = { +static const struct pinmux_cfg_reg pinmux_config_regs[] = { { PINMUX_CFG_REG("PAIOR0", 0xfffe3812, 16, 1) { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, @@ -2032,7 +2036,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { {} }; -static struct pinmux_data_reg pinmux_data_regs[] = { +static const struct pinmux_data_reg pinmux_data_regs[] = { { PINMUX_DATA_REG("PADR1", 0xfffe3814, 16) { 0, 0, 0, 0, 0, 0, 0, PA3_DATA, 0, 0, 0, 0, 0, 0, 0, PA2_DATA } @@ -2110,19 +2114,17 @@ static struct pinmux_data_reg pinmux_data_regs[] = { { } }; -struct sh_pfc_soc_info sh7264_pinmux_info = { +const struct sh_pfc_soc_info sh7264_pinmux_info = { .name = "sh7264_pfc", - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN }, .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - .first_gpio = GPIO_PA3, - .last_gpio = GPIO_FN_LCD_M_DISP, + .pins = pinmux_pins, + .nr_pins = ARRAY_SIZE(pinmux_pins), + .func_gpios = pinmux_func_gpios, + .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios), - .gpios = pinmux_gpios, .cfg_regs = pinmux_config_regs, .data_regs = pinmux_data_regs, diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7269.c b/drivers/pinctrl/sh-pfc/pfc-sh7269.c index b1b5d6d4ad76..4c401a74acd5 100644 --- a/drivers/pinctrl/sh-pfc/pfc-sh7269.c +++ b/drivers/pinctrl/sh-pfc/pfc-sh7269.c @@ -781,7 +781,7 @@ enum { PINMUX_MARK_END, }; -static pinmux_enum_t pinmux_data[] = { +static const pinmux_enum_t pinmux_data[] = { /* Port A */ PINMUX_DATA(PA1_DATA, PA1_IN), @@ -1452,7 +1452,7 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_DATA(PWM1A_MARK, PJ0MD_100), }; -static struct pinmux_gpio pinmux_gpios[] = { +static struct sh_pfc_pin pinmux_pins[] = { /* Port A */ PINMUX_GPIO(GPIO_PA1, PA1_DATA), PINMUX_GPIO(GPIO_PA0, PA0_DATA), @@ -1613,339 +1613,343 @@ static struct pinmux_gpio pinmux_gpios[] = { PINMUX_GPIO(GPIO_PJ2, PJ2_DATA), PINMUX_GPIO(GPIO_PJ1, PJ1_DATA), PINMUX_GPIO(GPIO_PJ0, PJ0_DATA), +}; + +#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) +static const struct pinmux_func pinmux_func_gpios[] = { /* INTC */ - PINMUX_GPIO(GPIO_FN_IRQ7_PG, IRQ7_PG_MARK), - PINMUX_GPIO(GPIO_FN_IRQ6_PG, IRQ6_PG_MARK), - PINMUX_GPIO(GPIO_FN_IRQ5_PG, IRQ5_PG_MARK), - PINMUX_GPIO(GPIO_FN_IRQ4_PG, IRQ4_PG_MARK), - PINMUX_GPIO(GPIO_FN_IRQ3_PG, IRQ3_PG_MARK), - PINMUX_GPIO(GPIO_FN_IRQ2_PG, IRQ2_PG_MARK), - PINMUX_GPIO(GPIO_FN_IRQ1_PG, IRQ1_PG_MARK), - PINMUX_GPIO(GPIO_FN_IRQ0_PG, IRQ0_PG_MARK), - PINMUX_GPIO(GPIO_FN_IRQ7_PF, IRQ7_PF_MARK), - PINMUX_GPIO(GPIO_FN_IRQ6_PF, IRQ6_PF_MARK), - PINMUX_GPIO(GPIO_FN_IRQ5_PF, IRQ5_PF_MARK), - PINMUX_GPIO(GPIO_FN_IRQ4_PF, IRQ4_PF_MARK), - PINMUX_GPIO(GPIO_FN_IRQ3_PJ, IRQ3_PJ_MARK), - PINMUX_GPIO(GPIO_FN_IRQ2_PJ, IRQ2_PJ_MARK), - PINMUX_GPIO(GPIO_FN_IRQ1_PJ, IRQ1_PJ_MARK), - PINMUX_GPIO(GPIO_FN_IRQ0_PJ, IRQ0_PJ_MARK), - PINMUX_GPIO(GPIO_FN_IRQ1_PC, IRQ1_PC_MARK), - PINMUX_GPIO(GPIO_FN_IRQ0_PC, IRQ0_PC_MARK), - - PINMUX_GPIO(GPIO_FN_PINT7_PG, PINT7_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT6_PG, PINT6_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT5_PG, PINT5_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT4_PG, PINT4_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT3_PG, PINT3_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT2_PG, PINT2_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT1_PG, PINT1_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT0_PG, PINT0_PG_MARK), - PINMUX_GPIO(GPIO_FN_PINT7_PH, PINT7_PH_MARK), - PINMUX_GPIO(GPIO_FN_PINT6_PH, PINT6_PH_MARK), - PINMUX_GPIO(GPIO_FN_PINT5_PH, PINT5_PH_MARK), - PINMUX_GPIO(GPIO_FN_PINT4_PH, PINT4_PH_MARK), - PINMUX_GPIO(GPIO_FN_PINT3_PH, PINT3_PH_MARK), - PINMUX_GPIO(GPIO_FN_PINT2_PH, PINT2_PH_MARK), - PINMUX_GPIO(GPIO_FN_PINT1_PH, PINT1_PH_MARK), - PINMUX_GPIO(GPIO_FN_PINT0_PH, PINT0_PH_MARK), - PINMUX_GPIO(GPIO_FN_PINT7_PJ, PINT7_PJ_MARK), - PINMUX_GPIO(GPIO_FN_PINT6_PJ, PINT6_PJ_MARK), - PINMUX_GPIO(GPIO_FN_PINT5_PJ, PINT5_PJ_MARK), - PINMUX_GPIO(GPIO_FN_PINT4_PJ, PINT4_PJ_MARK), - PINMUX_GPIO(GPIO_FN_PINT3_PJ, PINT3_PJ_MARK), - PINMUX_GPIO(GPIO_FN_PINT2_PJ, PINT2_PJ_MARK), - PINMUX_GPIO(GPIO_FN_PINT1_PJ, PINT1_PJ_MARK), - PINMUX_GPIO(GPIO_FN_PINT0_PJ, PINT0_PJ_MARK), + GPIO_FN(IRQ7_PG), + GPIO_FN(IRQ6_PG), + GPIO_FN(IRQ5_PG), + GPIO_FN(IRQ4_PG), + GPIO_FN(IRQ3_PG), + GPIO_FN(IRQ2_PG), + GPIO_FN(IRQ1_PG), + GPIO_FN(IRQ0_PG), + GPIO_FN(IRQ7_PF), + GPIO_FN(IRQ6_PF), + GPIO_FN(IRQ5_PF), + GPIO_FN(IRQ4_PF), + GPIO_FN(IRQ3_PJ), + GPIO_FN(IRQ2_PJ), + GPIO_FN(IRQ1_PJ), + GPIO_FN(IRQ0_PJ), + GPIO_FN(IRQ1_PC), + GPIO_FN(IRQ0_PC), + + GPIO_FN(PINT7_PG), + GPIO_FN(PINT6_PG), + GPIO_FN(PINT5_PG), + GPIO_FN(PINT4_PG), + GPIO_FN(PINT3_PG), + GPIO_FN(PINT2_PG), + GPIO_FN(PINT1_PG), + GPIO_FN(PINT0_PG), + GPIO_FN(PINT7_PH), + GPIO_FN(PINT6_PH), + GPIO_FN(PINT5_PH), + GPIO_FN(PINT4_PH), + GPIO_FN(PINT3_PH), + GPIO_FN(PINT2_PH), + GPIO_FN(PINT1_PH), + GPIO_FN(PINT0_PH), + GPIO_FN(PINT7_PJ), + GPIO_FN(PINT6_PJ), + GPIO_FN(PINT5_PJ), + GPIO_FN(PINT4_PJ), + GPIO_FN(PINT3_PJ), + GPIO_FN(PINT2_PJ), + GPIO_FN(PINT1_PJ), + GPIO_FN(PINT0_PJ), /* WDT */ - PINMUX_GPIO(GPIO_FN_WDTOVF, WDTOVF_MARK), + GPIO_FN(WDTOVF), /* CAN */ - PINMUX_GPIO(GPIO_FN_CTX1, CTX1_MARK), - PINMUX_GPIO(GPIO_FN_CRX1, CRX1_MARK), - PINMUX_GPIO(GPIO_FN_CTX0, CTX0_MARK), - PINMUX_GPIO(GPIO_FN_CRX0, CRX0_MARK), - PINMUX_GPIO(GPIO_FN_CRX0_CRX1, CRX0_CRX1_MARK), - PINMUX_GPIO(GPIO_FN_CRX0_CRX1_CRX2, CRX0_CRX1_CRX2_MARK), + GPIO_FN(CTX1), + GPIO_FN(CRX1), + GPIO_FN(CTX0), + GPIO_FN(CRX0), + GPIO_FN(CRX0_CRX1), + GPIO_FN(CRX0_CRX1_CRX2), /* DMAC */ - PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK), - PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK), - PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK), - PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK), - PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK), - PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK), + GPIO_FN(TEND0), + GPIO_FN(DACK0), + GPIO_FN(DREQ0), + GPIO_FN(TEND1), + GPIO_FN(DACK1), + GPIO_FN(DREQ1), /* ADC */ - PINMUX_GPIO(GPIO_FN_ADTRG, ADTRG_MARK), + GPIO_FN(ADTRG), /* BSCh */ - PINMUX_GPIO(GPIO_FN_A25, A25_MARK), - PINMUX_GPIO(GPIO_FN_A24, A24_MARK), - PINMUX_GPIO(GPIO_FN_A23, A23_MARK), - PINMUX_GPIO(GPIO_FN_A22, A22_MARK), - PINMUX_GPIO(GPIO_FN_A21, A21_MARK), - PINMUX_GPIO(GPIO_FN_A20, A20_MARK), - PINMUX_GPIO(GPIO_FN_A19, A19_MARK), - PINMUX_GPIO(GPIO_FN_A18, A18_MARK), - PINMUX_GPIO(GPIO_FN_A17, A17_MARK), - PINMUX_GPIO(GPIO_FN_A16, A16_MARK), - PINMUX_GPIO(GPIO_FN_A15, A15_MARK), - PINMUX_GPIO(GPIO_FN_A14, A14_MARK), - PINMUX_GPIO(GPIO_FN_A13, A13_MARK), - PINMUX_GPIO(GPIO_FN_A12, A12_MARK), - PINMUX_GPIO(GPIO_FN_A11, A11_MARK), - PINMUX_GPIO(GPIO_FN_A10, A10_MARK), - PINMUX_GPIO(GPIO_FN_A9, A9_MARK), - PINMUX_GPIO(GPIO_FN_A8, A8_MARK), - PINMUX_GPIO(GPIO_FN_A7, A7_MARK), - PINMUX_GPIO(GPIO_FN_A6, A6_MARK), - PINMUX_GPIO(GPIO_FN_A5, A5_MARK), - PINMUX_GPIO(GPIO_FN_A4, A4_MARK), - PINMUX_GPIO(GPIO_FN_A3, A3_MARK), - PINMUX_GPIO(GPIO_FN_A2, A2_MARK), - PINMUX_GPIO(GPIO_FN_A1, A1_MARK), - PINMUX_GPIO(GPIO_FN_A0, A0_MARK), - - PINMUX_GPIO(GPIO_FN_D15, D15_MARK), - PINMUX_GPIO(GPIO_FN_D14, D14_MARK), - PINMUX_GPIO(GPIO_FN_D13, D13_MARK), - PINMUX_GPIO(GPIO_FN_D12, D12_MARK), - PINMUX_GPIO(GPIO_FN_D11, D11_MARK), - PINMUX_GPIO(GPIO_FN_D10, D10_MARK), - PINMUX_GPIO(GPIO_FN_D9, D9_MARK), - PINMUX_GPIO(GPIO_FN_D8, D8_MARK), - PINMUX_GPIO(GPIO_FN_D7, D7_MARK), - PINMUX_GPIO(GPIO_FN_D6, D6_MARK), - PINMUX_GPIO(GPIO_FN_D5, D5_MARK), - PINMUX_GPIO(GPIO_FN_D4, D4_MARK), - PINMUX_GPIO(GPIO_FN_D3, D3_MARK), - PINMUX_GPIO(GPIO_FN_D2, D2_MARK), - PINMUX_GPIO(GPIO_FN_D1, D1_MARK), - PINMUX_GPIO(GPIO_FN_D0, D0_MARK), - - PINMUX_GPIO(GPIO_FN_BS, BS_MARK), - PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK), - PINMUX_GPIO(GPIO_FN_CS3, CS3_MARK), - PINMUX_GPIO(GPIO_FN_CS2, CS2_MARK), - PINMUX_GPIO(GPIO_FN_CS1, CS1_MARK), - PINMUX_GPIO(GPIO_FN_CS0, CS0_MARK), - PINMUX_GPIO(GPIO_FN_CS5CE1A, CS5CE1A_MARK), - PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK), - PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK), - PINMUX_GPIO(GPIO_FN_RD, RD_MARK), - PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK), - PINMUX_GPIO(GPIO_FN_WE3ICIOWRAHDQMUU, WE3ICIOWRAHDQMUU_MARK), - PINMUX_GPIO(GPIO_FN_WE2ICIORDDQMUL, WE2ICIORDDQMUL_MARK), - PINMUX_GPIO(GPIO_FN_WE1DQMUWE, WE1DQMUWE_MARK), - PINMUX_GPIO(GPIO_FN_WE0DQML, WE0DQML_MARK), - PINMUX_GPIO(GPIO_FN_RAS, RAS_MARK), - PINMUX_GPIO(GPIO_FN_CAS, CAS_MARK), - PINMUX_GPIO(GPIO_FN_CKE, CKE_MARK), - PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK), - PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK), - PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK), - PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK), + GPIO_FN(A25), + GPIO_FN(A24), + GPIO_FN(A23), + GPIO_FN(A22), + GPIO_FN(A21), + GPIO_FN(A20), + GPIO_FN(A19), + GPIO_FN(A18), + GPIO_FN(A17), + GPIO_FN(A16), + GPIO_FN(A15), + GPIO_FN(A14), + GPIO_FN(A13), + GPIO_FN(A12), + GPIO_FN(A11), + GPIO_FN(A10), + GPIO_FN(A9), + GPIO_FN(A8), + GPIO_FN(A7), + GPIO_FN(A6), + GPIO_FN(A5), + GPIO_FN(A4), + GPIO_FN(A3), + GPIO_FN(A2), + GPIO_FN(A1), + GPIO_FN(A0), + + GPIO_FN(D15), + GPIO_FN(D14), + GPIO_FN(D13), + GPIO_FN(D12), + GPIO_FN(D11), + GPIO_FN(D10), + GPIO_FN(D9), + GPIO_FN(D8), + GPIO_FN(D7), + GPIO_FN(D6), + GPIO_FN(D5), + GPIO_FN(D4), + GPIO_FN(D3), + GPIO_FN(D2), + GPIO_FN(D1), + GPIO_FN(D0), + + GPIO_FN(BS), + GPIO_FN(CS4), + GPIO_FN(CS3), + GPIO_FN(CS2), + GPIO_FN(CS1), + GPIO_FN(CS0), + GPIO_FN(CS5CE1A), + GPIO_FN(CE2A), + GPIO_FN(CE2B), + GPIO_FN(RD), + GPIO_FN(RDWR), + GPIO_FN(WE3ICIOWRAHDQMUU), + GPIO_FN(WE2ICIORDDQMUL), + GPIO_FN(WE1DQMUWE), + GPIO_FN(WE0DQML), + GPIO_FN(RAS), + GPIO_FN(CAS), + GPIO_FN(CKE), + GPIO_FN(WAIT), + GPIO_FN(BREQ), + GPIO_FN(BACK), + GPIO_FN(IOIS16), /* TMU */ - PINMUX_GPIO(GPIO_FN_TIOC4D, TIOC4D_MARK), - PINMUX_GPIO(GPIO_FN_TIOC4C, TIOC4C_MARK), - PINMUX_GPIO(GPIO_FN_TIOC4B, TIOC4B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC4A, TIOC4A_MARK), - PINMUX_GPIO(GPIO_FN_TIOC3D, TIOC3D_MARK), - PINMUX_GPIO(GPIO_FN_TIOC3C, TIOC3C_MARK), - PINMUX_GPIO(GPIO_FN_TIOC3B, TIOC3B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC3A, TIOC3A_MARK), - PINMUX_GPIO(GPIO_FN_TIOC2B, TIOC2B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC1B, TIOC1B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC2A, TIOC2A_MARK), - PINMUX_GPIO(GPIO_FN_TIOC1A, TIOC1A_MARK), - PINMUX_GPIO(GPIO_FN_TIOC0D, TIOC0D_MARK), - PINMUX_GPIO(GPIO_FN_TIOC0C, TIOC0C_MARK), - PINMUX_GPIO(GPIO_FN_TIOC0B, TIOC0B_MARK), - PINMUX_GPIO(GPIO_FN_TIOC0A, TIOC0A_MARK), - PINMUX_GPIO(GPIO_FN_TCLKD, TCLKD_MARK), - PINMUX_GPIO(GPIO_FN_TCLKC, TCLKC_MARK), - PINMUX_GPIO(GPIO_FN_TCLKB, TCLKB_MARK), - PINMUX_GPIO(GPIO_FN_TCLKA, TCLKA_MARK), + GPIO_FN(TIOC4D), + GPIO_FN(TIOC4C), + GPIO_FN(TIOC4B), + GPIO_FN(TIOC4A), + GPIO_FN(TIOC3D), + GPIO_FN(TIOC3C), + GPIO_FN(TIOC3B), + GPIO_FN(TIOC3A), + GPIO_FN(TIOC2B), + GPIO_FN(TIOC1B), + GPIO_FN(TIOC2A), + GPIO_FN(TIOC1A), + GPIO_FN(TIOC0D), + GPIO_FN(TIOC0C), + GPIO_FN(TIOC0B), + GPIO_FN(TIOC0A), + GPIO_FN(TCLKD), + GPIO_FN(TCLKC), + GPIO_FN(TCLKB), + GPIO_FN(TCLKA), /* SCIF */ - PINMUX_GPIO(GPIO_FN_SCK0, SCK0_MARK), - PINMUX_GPIO(GPIO_FN_TXD0, TXD0_MARK), - PINMUX_GPIO(GPIO_FN_RXD0, RXD0_MARK), - PINMUX_GPIO(GPIO_FN_SCK1, SCK1_MARK), - PINMUX_GPIO(GPIO_FN_TXD1, TXD1_MARK), - PINMUX_GPIO(GPIO_FN_RXD1, RXD1_MARK), - PINMUX_GPIO(GPIO_FN_RTS1, RTS1_MARK), - PINMUX_GPIO(GPIO_FN_CTS1, CTS1_MARK), - PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK), - PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK), - PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK), - PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK), - PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK), - PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK), - PINMUX_GPIO(GPIO_FN_SCK4, SCK4_MARK), - PINMUX_GPIO(GPIO_FN_TXD4, TXD4_MARK), - PINMUX_GPIO(GPIO_FN_RXD4, RXD4_MARK), - PINMUX_GPIO(GPIO_FN_SCK5, SCK5_MARK), - PINMUX_GPIO(GPIO_FN_TXD5, TXD5_MARK), - PINMUX_GPIO(GPIO_FN_RXD5, RXD5_MARK), - PINMUX_GPIO(GPIO_FN_RTS5, RTS5_MARK), - PINMUX_GPIO(GPIO_FN_CTS5, CTS5_MARK), - PINMUX_GPIO(GPIO_FN_SCK6, SCK6_MARK), - PINMUX_GPIO(GPIO_FN_TXD6, TXD6_MARK), - PINMUX_GPIO(GPIO_FN_RXD6, RXD6_MARK), - PINMUX_GPIO(GPIO_FN_SCK7, SCK7_MARK), - PINMUX_GPIO(GPIO_FN_TXD7, TXD7_MARK), - PINMUX_GPIO(GPIO_FN_RXD7, RXD7_MARK), - PINMUX_GPIO(GPIO_FN_RTS7, RTS7_MARK), - PINMUX_GPIO(GPIO_FN_CTS7, CTS7_MARK), + GPIO_FN(SCK0), + GPIO_FN(TXD0), + GPIO_FN(RXD0), + GPIO_FN(SCK1), + GPIO_FN(TXD1), + GPIO_FN(RXD1), + GPIO_FN(RTS1), + GPIO_FN(CTS1), + GPIO_FN(SCK2), + GPIO_FN(TXD2), + GPIO_FN(RXD2), + GPIO_FN(SCK3), + GPIO_FN(TXD3), + GPIO_FN(RXD3), + GPIO_FN(SCK4), + GPIO_FN(TXD4), + GPIO_FN(RXD4), + GPIO_FN(SCK5), + GPIO_FN(TXD5), + GPIO_FN(RXD5), + GPIO_FN(RTS5), + GPIO_FN(CTS5), + GPIO_FN(SCK6), + GPIO_FN(TXD6), + GPIO_FN(RXD6), + GPIO_FN(SCK7), + GPIO_FN(TXD7), + GPIO_FN(RXD7), + GPIO_FN(RTS7), + GPIO_FN(CTS7), /* RSPI */ - PINMUX_GPIO(GPIO_FN_RSPCK0_PJ16, RSPCK0_PJ16_MARK), - PINMUX_GPIO(GPIO_FN_SSL00_PJ17, SSL00_PJ17_MARK), - PINMUX_GPIO(GPIO_FN_MOSI0_PJ18, MOSI0_PJ18_MARK), - PINMUX_GPIO(GPIO_FN_MISO0_PJ19, MISO0_PJ19_MARK), - PINMUX_GPIO(GPIO_FN_RSPCK0_PB17, RSPCK0_PB17_MARK), - PINMUX_GPIO(GPIO_FN_SSL00_PB18, SSL00_PB18_MARK), - PINMUX_GPIO(GPIO_FN_MOSI0_PB19, MOSI0_PB19_MARK), - PINMUX_GPIO(GPIO_FN_MISO0_PB20, MISO0_PB20_MARK), - PINMUX_GPIO(GPIO_FN_RSPCK1, RSPCK1_MARK), - PINMUX_GPIO(GPIO_FN_MOSI1, MOSI1_MARK), - PINMUX_GPIO(GPIO_FN_MISO1, MISO1_MARK), - PINMUX_GPIO(GPIO_FN_SSL10, SSL10_MARK), + GPIO_FN(RSPCK0_PJ16), + GPIO_FN(SSL00_PJ17), + GPIO_FN(MOSI0_PJ18), + GPIO_FN(MISO0_PJ19), + GPIO_FN(RSPCK0_PB17), + GPIO_FN(SSL00_PB18), + GPIO_FN(MOSI0_PB19), + GPIO_FN(MISO0_PB20), + GPIO_FN(RSPCK1), + GPIO_FN(MOSI1), + GPIO_FN(MISO1), + GPIO_FN(SSL10), /* IIC3 */ - PINMUX_GPIO(GPIO_FN_SCL0, SCL0_MARK), - PINMUX_GPIO(GPIO_FN_SCL1, SCL1_MARK), - PINMUX_GPIO(GPIO_FN_SCL2, SCL2_MARK), - PINMUX_GPIO(GPIO_FN_SDA0, SDA0_MARK), - PINMUX_GPIO(GPIO_FN_SDA1, SDA1_MARK), - PINMUX_GPIO(GPIO_FN_SDA2, SDA2_MARK), + GPIO_FN(SCL0), + GPIO_FN(SCL1), + GPIO_FN(SCL2), + GPIO_FN(SDA0), + GPIO_FN(SDA1), + GPIO_FN(SDA2), /* SSI */ - PINMUX_GPIO(GPIO_FN_SSISCK0, SSISCK0_MARK), - PINMUX_GPIO(GPIO_FN_SSIWS0, SSIWS0_MARK), - PINMUX_GPIO(GPIO_FN_SSITXD0, SSITXD0_MARK), - PINMUX_GPIO(GPIO_FN_SSIRXD0, SSIRXD0_MARK), - PINMUX_GPIO(GPIO_FN_SSIWS1, SSIWS1_MARK), - PINMUX_GPIO(GPIO_FN_SSIWS2, SSIWS2_MARK), - PINMUX_GPIO(GPIO_FN_SSIWS3, SSIWS3_MARK), - PINMUX_GPIO(GPIO_FN_SSISCK1, SSISCK1_MARK), - PINMUX_GPIO(GPIO_FN_SSISCK2, SSISCK2_MARK), - PINMUX_GPIO(GPIO_FN_SSISCK3, SSISCK3_MARK), - PINMUX_GPIO(GPIO_FN_SSIDATA1, SSIDATA1_MARK), - PINMUX_GPIO(GPIO_FN_SSIDATA2, SSIDATA2_MARK), - PINMUX_GPIO(GPIO_FN_SSIDATA3, SSIDATA3_MARK), - PINMUX_GPIO(GPIO_FN_AUDIO_CLK, AUDIO_CLK_MARK), - PINMUX_GPIO(GPIO_FN_AUDIO_XOUT, AUDIO_XOUT_MARK), + GPIO_FN(SSISCK0), + GPIO_FN(SSIWS0), + GPIO_FN(SSITXD0), + GPIO_FN(SSIRXD0), + GPIO_FN(SSIWS1), + GPIO_FN(SSIWS2), + GPIO_FN(SSIWS3), + GPIO_FN(SSISCK1), + GPIO_FN(SSISCK2), + GPIO_FN(SSISCK3), + GPIO_FN(SSIDATA1), + GPIO_FN(SSIDATA2), + GPIO_FN(SSIDATA3), + GPIO_FN(AUDIO_CLK), + GPIO_FN(AUDIO_XOUT), /* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */ - PINMUX_GPIO(GPIO_FN_SIOFTXD, SIOFTXD_MARK), - PINMUX_GPIO(GPIO_FN_SIOFRXD, SIOFRXD_MARK), - PINMUX_GPIO(GPIO_FN_SIOFSYNC, SIOFSYNC_MARK), - PINMUX_GPIO(GPIO_FN_SIOFSCK, SIOFSCK_MARK), + GPIO_FN(SIOFTXD), + GPIO_FN(SIOFRXD), + GPIO_FN(SIOFSYNC), + GPIO_FN(SIOFSCK), /* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */ - PINMUX_GPIO(GPIO_FN_SPDIF_IN, SPDIF_IN_MARK), - PINMUX_GPIO(GPIO_FN_SPDIF_OUT, SPDIF_OUT_MARK), + GPIO_FN(SPDIF_IN), + GPIO_FN(SPDIF_OUT), /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */ - PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK), - PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK), + GPIO_FN(FCE), + GPIO_FN(FRB), /* VDC3 */ - PINMUX_GPIO(GPIO_FN_DV_CLK, DV_CLK_MARK), - PINMUX_GPIO(GPIO_FN_DV_VSYNC, DV_VSYNC_MARK), - PINMUX_GPIO(GPIO_FN_DV_HSYNC, DV_HSYNC_MARK), - - PINMUX_GPIO(GPIO_FN_DV_DATA23, DV_DATA23_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA22, DV_DATA22_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA21, DV_DATA21_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA20, DV_DATA20_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA19, DV_DATA19_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA18, DV_DATA18_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA17, DV_DATA17_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA16, DV_DATA16_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA15, DV_DATA15_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA14, DV_DATA14_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA13, DV_DATA13_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA12, DV_DATA12_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA11, DV_DATA11_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA10, DV_DATA10_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA9, DV_DATA9_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA8, DV_DATA8_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA7, DV_DATA7_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA6, DV_DATA6_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA5, DV_DATA5_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA4, DV_DATA4_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA3, DV_DATA3_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA2, DV_DATA2_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA1, DV_DATA1_MARK), - PINMUX_GPIO(GPIO_FN_DV_DATA0, DV_DATA0_MARK), - - PINMUX_GPIO(GPIO_FN_LCD_CLK, LCD_CLK_MARK), - PINMUX_GPIO(GPIO_FN_LCD_EXTCLK, LCD_EXTCLK_MARK), - PINMUX_GPIO(GPIO_FN_LCD_VSYNC, LCD_VSYNC_MARK), - PINMUX_GPIO(GPIO_FN_LCD_HSYNC, LCD_HSYNC_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DE, LCD_DE_MARK), - - PINMUX_GPIO(GPIO_FN_LCD_DATA23_PG23, LCD_DATA23_PG23_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA22_PG22, LCD_DATA22_PG22_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA21_PG21, LCD_DATA21_PG21_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA20_PG20, LCD_DATA20_PG20_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA19_PG19, LCD_DATA19_PG19_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA18_PG18, LCD_DATA18_PG18_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA17_PG17, LCD_DATA17_PG17_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA16_PG16, LCD_DATA16_PG16_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA15_PG15, LCD_DATA15_PG15_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA14_PG14, LCD_DATA14_PG14_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA13_PG13, LCD_DATA13_PG13_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA12_PG12, LCD_DATA12_PG12_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA11_PG11, LCD_DATA11_PG11_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA10_PG10, LCD_DATA10_PG10_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA9_PG9, LCD_DATA9_PG9_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA8_PG8, LCD_DATA8_PG8_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA7_PG7, LCD_DATA7_PG7_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA6_PG6, LCD_DATA6_PG6_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA5_PG5, LCD_DATA5_PG5_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA4_PG4, LCD_DATA4_PG4_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA3_PG3, LCD_DATA3_PG3_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA2_PG2, LCD_DATA2_PG2_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA1_PG1, LCD_DATA1_PG1_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA0_PG0, LCD_DATA0_PG0_MARK), - - PINMUX_GPIO(GPIO_FN_LCD_DATA23_PJ23, LCD_DATA23_PJ23_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA22_PJ22, LCD_DATA22_PJ22_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA21_PJ21, LCD_DATA21_PJ21_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA20_PJ20, LCD_DATA20_PJ20_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA19_PJ19, LCD_DATA19_PJ19_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA18_PJ18, LCD_DATA18_PJ18_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA17_PJ17, LCD_DATA17_PJ17_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA16_PJ16, LCD_DATA16_PJ16_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA15_PJ15, LCD_DATA15_PJ15_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA14_PJ14, LCD_DATA14_PJ14_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA13_PJ13, LCD_DATA13_PJ13_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA12_PJ12, LCD_DATA12_PJ12_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA11_PJ11, LCD_DATA11_PJ11_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA10_PJ10, LCD_DATA10_PJ10_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA9_PJ9, LCD_DATA9_PJ9_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA8_PJ8, LCD_DATA8_PJ8_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA7_PJ7, LCD_DATA7_PJ7_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA6_PJ6, LCD_DATA6_PJ6_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA5_PJ5, LCD_DATA5_PJ5_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA4_PJ4, LCD_DATA4_PJ4_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA3_PJ3, LCD_DATA3_PJ3_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA2_PJ2, LCD_DATA2_PJ2_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA1_PJ1, LCD_DATA1_PJ1_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA0_PJ0, LCD_DATA0_PJ0_MARK), - - PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK), + GPIO_FN(DV_CLK), + GPIO_FN(DV_VSYNC), + GPIO_FN(DV_HSYNC), + + GPIO_FN(DV_DATA23), + GPIO_FN(DV_DATA22), + GPIO_FN(DV_DATA21), + GPIO_FN(DV_DATA20), + GPIO_FN(DV_DATA19), + GPIO_FN(DV_DATA18), + GPIO_FN(DV_DATA17), + GPIO_FN(DV_DATA16), + GPIO_FN(DV_DATA15), + GPIO_FN(DV_DATA14), + GPIO_FN(DV_DATA13), + GPIO_FN(DV_DATA12), + GPIO_FN(DV_DATA11), + GPIO_FN(DV_DATA10), + GPIO_FN(DV_DATA9), + GPIO_FN(DV_DATA8), + GPIO_FN(DV_DATA7), + GPIO_FN(DV_DATA6), + GPIO_FN(DV_DATA5), + GPIO_FN(DV_DATA4), + GPIO_FN(DV_DATA3), + GPIO_FN(DV_DATA2), + GPIO_FN(DV_DATA1), + GPIO_FN(DV_DATA0), + + GPIO_FN(LCD_CLK), + GPIO_FN(LCD_EXTCLK), + GPIO_FN(LCD_VSYNC), + GPIO_FN(LCD_HSYNC), + GPIO_FN(LCD_DE), + + GPIO_FN(LCD_DATA23_PG23), + GPIO_FN(LCD_DATA22_PG22), + GPIO_FN(LCD_DATA21_PG21), + GPIO_FN(LCD_DATA20_PG20), + GPIO_FN(LCD_DATA19_PG19), + GPIO_FN(LCD_DATA18_PG18), + GPIO_FN(LCD_DATA17_PG17), + GPIO_FN(LCD_DATA16_PG16), + GPIO_FN(LCD_DATA15_PG15), + GPIO_FN(LCD_DATA14_PG14), + GPIO_FN(LCD_DATA13_PG13), + GPIO_FN(LCD_DATA12_PG12), + GPIO_FN(LCD_DATA11_PG11), + GPIO_FN(LCD_DATA10_PG10), + GPIO_FN(LCD_DATA9_PG9), + GPIO_FN(LCD_DATA8_PG8), + GPIO_FN(LCD_DATA7_PG7), + GPIO_FN(LCD_DATA6_PG6), + GPIO_FN(LCD_DATA5_PG5), + GPIO_FN(LCD_DATA4_PG4), + GPIO_FN(LCD_DATA3_PG3), + GPIO_FN(LCD_DATA2_PG2), + GPIO_FN(LCD_DATA1_PG1), + GPIO_FN(LCD_DATA0_PG0), + + GPIO_FN(LCD_DATA23_PJ23), + GPIO_FN(LCD_DATA22_PJ22), + GPIO_FN(LCD_DATA21_PJ21), + GPIO_FN(LCD_DATA20_PJ20), + GPIO_FN(LCD_DATA19_PJ19), + GPIO_FN(LCD_DATA18_PJ18), + GPIO_FN(LCD_DATA17_PJ17), + GPIO_FN(LCD_DATA16_PJ16), + GPIO_FN(LCD_DATA15_PJ15), + GPIO_FN(LCD_DATA14_PJ14), + GPIO_FN(LCD_DATA13_PJ13), + GPIO_FN(LCD_DATA12_PJ12), + GPIO_FN(LCD_DATA11_PJ11), + GPIO_FN(LCD_DATA10_PJ10), + GPIO_FN(LCD_DATA9_PJ9), + GPIO_FN(LCD_DATA8_PJ8), + GPIO_FN(LCD_DATA7_PJ7), + GPIO_FN(LCD_DATA6_PJ6), + GPIO_FN(LCD_DATA5_PJ5), + GPIO_FN(LCD_DATA4_PJ4), + GPIO_FN(LCD_DATA3_PJ3), + GPIO_FN(LCD_DATA2_PJ2), + GPIO_FN(LCD_DATA1_PJ1), + GPIO_FN(LCD_DATA0_PJ0), + + GPIO_FN(LCD_M_DISP), }; -static struct pinmux_cfg_reg pinmux_config_regs[] = { +static const struct pinmux_cfg_reg pinmux_config_regs[] = { /* "name" addr register_size Field_Width */ /* where Field_Width is 1 for single mode registers or 4 for upto 16 @@ -2734,7 +2738,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { {} }; -static struct pinmux_data_reg pinmux_data_regs[] = { +static const struct pinmux_data_reg pinmux_data_regs[] = { { PINMUX_DATA_REG("PADR0", 0xfffe3816, 16) { 0, 0, 0, 0, 0, 0, 0, PA1_DATA, 0, 0, 0, 0, 0, 0, 0, PA0_DATA } @@ -2813,19 +2817,17 @@ static struct pinmux_data_reg pinmux_data_regs[] = { { } }; -struct sh_pfc_soc_info sh7269_pinmux_info = { +const struct sh_pfc_soc_info sh7269_pinmux_info = { .name = "sh7269_pfc", - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN }, .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - .first_gpio = GPIO_PA1, - .last_gpio = GPIO_FN_LCD_M_DISP, + .pins = pinmux_pins, + .nr_pins = ARRAY_SIZE(pinmux_pins), + .func_gpios = pinmux_func_gpios, + .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios), - .gpios = pinmux_gpios, .cfg_regs = pinmux_config_regs, .data_regs = pinmux_data_regs, diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c index d44e7f02069b..df0ae21a5ac8 100644 --- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c +++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c @@ -368,7 +368,7 @@ enum { PINMUX_MARK_END, }; -static pinmux_enum_t pinmux_data[] = { +static const pinmux_enum_t pinmux_data[] = { /* specify valid pin states for each pin in GPIO mode */ PORT_DATA_IO_PD(0), PORT_DATA_IO_PD(1), @@ -929,11 +929,214 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_DATA(MFIv4_MARK, MSEL4CR_6_1), }; -static struct pinmux_gpio pinmux_gpios[] = { - - /* PORT */ +static struct sh_pfc_pin pinmux_pins[] = { GPIO_PORT_ALL(), +}; +/* - MMCIF ------------------------------------------------------------------ */ +static const unsigned int mmc0_data1_0_pins[] = { + /* D[0] */ + 84, +}; +static const unsigned int mmc0_data1_0_mux[] = { + MMCD0_0_MARK, +}; +static const unsigned int mmc0_data4_0_pins[] = { + /* D[0:3] */ + 84, 85, 86, 87, +}; +static const unsigned int mmc0_data4_0_mux[] = { + MMCD0_0_MARK, MMCD0_1_MARK, MMCD0_2_MARK, MMCD0_3_MARK, +}; +static const unsigned int mmc0_data8_0_pins[] = { + /* D[0:7] */ + 84, 85, 86, 87, 88, 89, 90, 91, +}; +static const unsigned int mmc0_data8_0_mux[] = { + MMCD0_0_MARK, MMCD0_1_MARK, MMCD0_2_MARK, MMCD0_3_MARK, + MMCD0_4_MARK, MMCD0_5_MARK, MMCD0_6_MARK, MMCD0_7_MARK, +}; +static const unsigned int mmc0_ctrl_0_pins[] = { + /* CMD, CLK */ + 92, 99, +}; +static const unsigned int mmc0_ctrl_0_mux[] = { + MMCCMD0_MARK, MMCCLK0_MARK, +}; + +static const unsigned int mmc0_data1_1_pins[] = { + /* D[0] */ + 54, +}; +static const unsigned int mmc0_data1_1_mux[] = { + MMCD1_0_MARK, +}; +static const unsigned int mmc0_data4_1_pins[] = { + /* D[0:3] */ + 54, 55, 56, 57, +}; +static const unsigned int mmc0_data4_1_mux[] = { + MMCD1_0_MARK, MMCD1_1_MARK, MMCD1_2_MARK, MMCD1_3_MARK, +}; +static const unsigned int mmc0_data8_1_pins[] = { + /* D[0:7] */ + 54, 55, 56, 57, 58, 59, 60, 61, +}; +static const unsigned int mmc0_data8_1_mux[] = { + MMCD1_0_MARK, MMCD1_1_MARK, MMCD1_2_MARK, MMCD1_3_MARK, + MMCD1_4_MARK, MMCD1_5_MARK, MMCD1_6_MARK, MMCD1_7_MARK, +}; +static const unsigned int mmc0_ctrl_1_pins[] = { + /* CMD, CLK */ + 67, 66, +}; +static const unsigned int mmc0_ctrl_1_mux[] = { + MMCCMD1_MARK, MMCCLK1_MARK, +}; +/* - SDHI0 ------------------------------------------------------------------ */ +static const unsigned int sdhi0_data1_pins[] = { + /* D0 */ + 173, +}; +static const unsigned int sdhi0_data1_mux[] = { + SDHID0_0_MARK, +}; +static const unsigned int sdhi0_data4_pins[] = { + /* D[0:3] */ + 173, 174, 175, 176, +}; +static const unsigned int sdhi0_data4_mux[] = { + SDHID0_0_MARK, SDHID0_1_MARK, SDHID0_2_MARK, SDHID0_3_MARK, +}; +static const unsigned int sdhi0_ctrl_pins[] = { + /* CMD, CLK */ + 177, 171, +}; +static const unsigned int sdhi0_ctrl_mux[] = { + SDHICMD0_MARK, SDHICLK0_MARK, +}; +static const unsigned int sdhi0_cd_pins[] = { + /* CD */ + 172, +}; +static const unsigned int sdhi0_cd_mux[] = { + SDHICD0_MARK, +}; +static const unsigned int sdhi0_wp_pins[] = { + /* WP */ + 178, +}; +static const unsigned int sdhi0_wp_mux[] = { + SDHIWP0_MARK, +}; +/* - SDHI1 ------------------------------------------------------------------ */ +static const unsigned int sdhi1_data1_pins[] = { + /* D0 */ + 180, +}; +static const unsigned int sdhi1_data1_mux[] = { + SDHID1_0_MARK, +}; +static const unsigned int sdhi1_data4_pins[] = { + /* D[0:3] */ + 180, 181, 182, 183, +}; +static const unsigned int sdhi1_data4_mux[] = { + SDHID1_0_MARK, SDHID1_1_MARK, SDHID1_2_MARK, SDHID1_3_MARK, +}; +static const unsigned int sdhi1_ctrl_pins[] = { + /* CMD, CLK */ + 184, 179, +}; +static const unsigned int sdhi1_ctrl_mux[] = { + SDHICMD1_MARK, SDHICLK1_MARK, +}; + +static const unsigned int sdhi2_data1_pins[] = { + /* D0 */ + 186, +}; +static const unsigned int sdhi2_data1_mux[] = { + SDHID2_0_MARK, +}; +static const unsigned int sdhi2_data4_pins[] = { + /* D[0:3] */ + 186, 187, 188, 189, +}; +static const unsigned int sdhi2_data4_mux[] = { + SDHID2_0_MARK, SDHID2_1_MARK, SDHID2_2_MARK, SDHID2_3_MARK, +}; +static const unsigned int sdhi2_ctrl_pins[] = { + /* CMD, CLK */ + 190, 185, +}; +static const unsigned int sdhi2_ctrl_mux[] = { + SDHICMD2_MARK, SDHICLK2_MARK, +}; + +static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(mmc0_data1_0), + SH_PFC_PIN_GROUP(mmc0_data4_0), + SH_PFC_PIN_GROUP(mmc0_data8_0), + SH_PFC_PIN_GROUP(mmc0_ctrl_0), + SH_PFC_PIN_GROUP(mmc0_data1_1), + SH_PFC_PIN_GROUP(mmc0_data4_1), + SH_PFC_PIN_GROUP(mmc0_data8_1), + SH_PFC_PIN_GROUP(mmc0_ctrl_1), + SH_PFC_PIN_GROUP(sdhi0_data1), + SH_PFC_PIN_GROUP(sdhi0_data4), + SH_PFC_PIN_GROUP(sdhi0_ctrl), + SH_PFC_PIN_GROUP(sdhi0_cd), + SH_PFC_PIN_GROUP(sdhi0_wp), + SH_PFC_PIN_GROUP(sdhi1_data1), + SH_PFC_PIN_GROUP(sdhi1_data4), + SH_PFC_PIN_GROUP(sdhi1_ctrl), + SH_PFC_PIN_GROUP(sdhi2_data1), + SH_PFC_PIN_GROUP(sdhi2_data4), + SH_PFC_PIN_GROUP(sdhi2_ctrl), +}; + +static const char * const mmc0_groups[] = { + "mmc0_data1_0", + "mmc0_data4_0", + "mmc0_data8_0", + "mmc0_ctrl_0", + "mmc0_data1_1", + "mmc0_data4_1", + "mmc0_data8_1", + "mmc0_ctrl_1", +}; + +static const char * const sdhi0_groups[] = { + "sdhi0_data1", + "sdhi0_data4", + "sdhi0_ctrl", + "sdhi0_cd", + "sdhi0_wp", +}; + +static const char * const sdhi1_groups[] = { + "sdhi1_data1", + "sdhi1_data4", + "sdhi1_ctrl", +}; + +static const char * const sdhi2_groups[] = { + "sdhi2_data1", + "sdhi2_data4", + "sdhi2_ctrl", +}; + +static const struct sh_pfc_function pinmux_functions[] = { + SH_PFC_FUNCTION(mmc0), + SH_PFC_FUNCTION(sdhi0), + SH_PFC_FUNCTION(sdhi1), + SH_PFC_FUNCTION(sdhi2), +}; + +#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) + +static const struct pinmux_func pinmux_func_gpios[] = { /* IRQ */ GPIO_FN(IRQ0_6), GPIO_FN(IRQ0_162), GPIO_FN(IRQ1), GPIO_FN(IRQ2_4), GPIO_FN(IRQ2_5), GPIO_FN(IRQ3_8), @@ -1074,18 +1277,6 @@ static struct pinmux_gpio pinmux_gpios[] = { GPIO_FN(D11_NAF11), GPIO_FN(D12_NAF12), GPIO_FN(D13_NAF13), GPIO_FN(D14_NAF14), GPIO_FN(D15_NAF15), - /* MMCIF(1) */ - GPIO_FN(MMCD0_0), GPIO_FN(MMCD0_1), GPIO_FN(MMCD0_2), - GPIO_FN(MMCD0_3), GPIO_FN(MMCD0_4), GPIO_FN(MMCD0_5), - GPIO_FN(MMCD0_6), GPIO_FN(MMCD0_7), GPIO_FN(MMCCMD0), - GPIO_FN(MMCCLK0), - - /* MMCIF(2) */ - GPIO_FN(MMCD1_0), GPIO_FN(MMCD1_1), GPIO_FN(MMCD1_2), - GPIO_FN(MMCD1_3), GPIO_FN(MMCD1_4), GPIO_FN(MMCD1_5), - GPIO_FN(MMCD1_6), GPIO_FN(MMCD1_7), GPIO_FN(MMCCLK1), - GPIO_FN(MMCCMD1), - /* SPU2 */ GPIO_FN(VINT_I), @@ -1182,25 +1373,12 @@ static struct pinmux_gpio pinmux_gpios[] = { /* HDMI */ GPIO_FN(HDMI_HPD), GPIO_FN(HDMI_CEC), - /* SDHI0 */ - GPIO_FN(SDHICLK0), GPIO_FN(SDHICD0), GPIO_FN(SDHICMD0), - GPIO_FN(SDHIWP0), GPIO_FN(SDHID0_0), GPIO_FN(SDHID0_1), - GPIO_FN(SDHID0_2), GPIO_FN(SDHID0_3), - - /* SDHI1 */ - GPIO_FN(SDHICLK1), GPIO_FN(SDHICMD1), GPIO_FN(SDHID1_0), - GPIO_FN(SDHID1_1), GPIO_FN(SDHID1_2), GPIO_FN(SDHID1_3), - - /* SDHI2 */ - GPIO_FN(SDHICLK2), GPIO_FN(SDHICMD2), GPIO_FN(SDHID2_0), - GPIO_FN(SDHID2_1), GPIO_FN(SDHID2_2), GPIO_FN(SDHID2_3), - /* SDENC */ GPIO_FN(SDENC_CPG), GPIO_FN(SDENC_DV_CLKI), }; -static struct pinmux_cfg_reg pinmux_config_regs[] = { +static const struct pinmux_cfg_reg pinmux_config_regs[] = { PORTCR(0, 0xE6051000), /* PORT0CR */ PORTCR(1, 0xE6051001), /* PORT1CR */ PORTCR(2, 0xE6051002), /* PORT2CR */ @@ -1472,7 +1650,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { { }, }; -static struct pinmux_data_reg pinmux_data_regs[] = { +static const struct pinmux_data_reg pinmux_data_regs[] = { { PINMUX_DATA_REG("PORTL095_064DR", 0xE6054008, 32) { PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA, PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA, @@ -1597,56 +1775,59 @@ static struct pinmux_data_reg pinmux_data_regs[] = { #define EXT_IRQ16L(n) evt2irq(0x200 + ((n) << 5)) #define EXT_IRQ16H(n) evt2irq(0x3200 + (((n) - 16) << 5)) -static struct pinmux_irq pinmux_irqs[] = { - PINMUX_IRQ(EXT_IRQ16L(0), PORT6_FN0, PORT162_FN0), - PINMUX_IRQ(EXT_IRQ16L(1), PORT12_FN0), - PINMUX_IRQ(EXT_IRQ16L(2), PORT4_FN0, PORT5_FN0), - PINMUX_IRQ(EXT_IRQ16L(3), PORT8_FN0, PORT16_FN0), - PINMUX_IRQ(EXT_IRQ16L(4), PORT17_FN0, PORT163_FN0), - PINMUX_IRQ(EXT_IRQ16L(5), PORT18_FN0), - PINMUX_IRQ(EXT_IRQ16L(6), PORT39_FN0, PORT164_FN0), - PINMUX_IRQ(EXT_IRQ16L(7), PORT40_FN0, PORT167_FN0), - PINMUX_IRQ(EXT_IRQ16L(8), PORT41_FN0, PORT168_FN0), - PINMUX_IRQ(EXT_IRQ16L(9), PORT42_FN0, PORT169_FN0), - PINMUX_IRQ(EXT_IRQ16L(10), PORT65_FN0), - PINMUX_IRQ(EXT_IRQ16L(11), PORT67_FN0), - PINMUX_IRQ(EXT_IRQ16L(12), PORT80_FN0, PORT137_FN0), - PINMUX_IRQ(EXT_IRQ16L(13), PORT81_FN0, PORT145_FN0), - PINMUX_IRQ(EXT_IRQ16L(14), PORT82_FN0, PORT146_FN0), - PINMUX_IRQ(EXT_IRQ16L(15), PORT83_FN0, PORT147_FN0), - PINMUX_IRQ(EXT_IRQ16H(16), PORT84_FN0, PORT170_FN0), - PINMUX_IRQ(EXT_IRQ16H(17), PORT85_FN0), - PINMUX_IRQ(EXT_IRQ16H(18), PORT86_FN0), - PINMUX_IRQ(EXT_IRQ16H(19), PORT87_FN0), - PINMUX_IRQ(EXT_IRQ16H(20), PORT92_FN0), - PINMUX_IRQ(EXT_IRQ16H(21), PORT93_FN0), - PINMUX_IRQ(EXT_IRQ16H(22), PORT94_FN0), - PINMUX_IRQ(EXT_IRQ16H(23), PORT95_FN0), - PINMUX_IRQ(EXT_IRQ16H(24), PORT112_FN0), - PINMUX_IRQ(EXT_IRQ16H(25), PORT119_FN0), - PINMUX_IRQ(EXT_IRQ16H(26), PORT121_FN0, PORT172_FN0), - PINMUX_IRQ(EXT_IRQ16H(27), PORT122_FN0, PORT180_FN0), - PINMUX_IRQ(EXT_IRQ16H(28), PORT123_FN0, PORT181_FN0), - PINMUX_IRQ(EXT_IRQ16H(29), PORT129_FN0, PORT182_FN0), - PINMUX_IRQ(EXT_IRQ16H(30), PORT130_FN0, PORT183_FN0), - PINMUX_IRQ(EXT_IRQ16H(31), PORT138_FN0, PORT184_FN0), +static const struct pinmux_irq pinmux_irqs[] = { + PINMUX_IRQ(EXT_IRQ16L(0), GPIO_PORT6, GPIO_PORT162), + PINMUX_IRQ(EXT_IRQ16L(1), GPIO_PORT12), + PINMUX_IRQ(EXT_IRQ16L(2), GPIO_PORT4, GPIO_PORT5), + PINMUX_IRQ(EXT_IRQ16L(3), GPIO_PORT8, GPIO_PORT16), + PINMUX_IRQ(EXT_IRQ16L(4), GPIO_PORT17, GPIO_PORT163), + PINMUX_IRQ(EXT_IRQ16L(5), GPIO_PORT18), + PINMUX_IRQ(EXT_IRQ16L(6), GPIO_PORT39, GPIO_PORT164), + PINMUX_IRQ(EXT_IRQ16L(7), GPIO_PORT40, GPIO_PORT167), + PINMUX_IRQ(EXT_IRQ16L(8), GPIO_PORT41, GPIO_PORT168), + PINMUX_IRQ(EXT_IRQ16L(9), GPIO_PORT42, GPIO_PORT169), + PINMUX_IRQ(EXT_IRQ16L(10), GPIO_PORT65), + PINMUX_IRQ(EXT_IRQ16L(11), GPIO_PORT67), + PINMUX_IRQ(EXT_IRQ16L(12), GPIO_PORT80, GPIO_PORT137), + PINMUX_IRQ(EXT_IRQ16L(13), GPIO_PORT81, GPIO_PORT145), + PINMUX_IRQ(EXT_IRQ16L(14), GPIO_PORT82, GPIO_PORT146), + PINMUX_IRQ(EXT_IRQ16L(15), GPIO_PORT83, GPIO_PORT147), + PINMUX_IRQ(EXT_IRQ16H(16), GPIO_PORT84, GPIO_PORT170), + PINMUX_IRQ(EXT_IRQ16H(17), GPIO_PORT85), + PINMUX_IRQ(EXT_IRQ16H(18), GPIO_PORT86), + PINMUX_IRQ(EXT_IRQ16H(19), GPIO_PORT87), + PINMUX_IRQ(EXT_IRQ16H(20), GPIO_PORT92), + PINMUX_IRQ(EXT_IRQ16H(21), GPIO_PORT93), + PINMUX_IRQ(EXT_IRQ16H(22), GPIO_PORT94), + PINMUX_IRQ(EXT_IRQ16H(23), GPIO_PORT95), + PINMUX_IRQ(EXT_IRQ16H(24), GPIO_PORT112), + PINMUX_IRQ(EXT_IRQ16H(25), GPIO_PORT119), + PINMUX_IRQ(EXT_IRQ16H(26), GPIO_PORT121, GPIO_PORT172), + PINMUX_IRQ(EXT_IRQ16H(27), GPIO_PORT122, GPIO_PORT180), + PINMUX_IRQ(EXT_IRQ16H(28), GPIO_PORT123, GPIO_PORT181), + PINMUX_IRQ(EXT_IRQ16H(29), GPIO_PORT129, GPIO_PORT182), + PINMUX_IRQ(EXT_IRQ16H(30), GPIO_PORT130, GPIO_PORT183), + PINMUX_IRQ(EXT_IRQ16H(31), GPIO_PORT138, GPIO_PORT184), }; -struct sh_pfc_soc_info sh7372_pinmux_info = { +const struct sh_pfc_soc_info sh7372_pinmux_info = { .name = "sh7372_pfc", - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END }, .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - .first_gpio = GPIO_PORT0, - .last_gpio = GPIO_FN_SDENC_DV_CLKI, + .pins = pinmux_pins, + .nr_pins = ARRAY_SIZE(pinmux_pins), + .groups = pinmux_groups, + .nr_groups = ARRAY_SIZE(pinmux_groups), + .functions = pinmux_functions, + .nr_functions = ARRAY_SIZE(pinmux_functions), + + .func_gpios = pinmux_func_gpios, + .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios), - .gpios = pinmux_gpios, .cfg_regs = pinmux_config_regs, .data_regs = pinmux_data_regs, diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c index 6f15c03077a0..587f7772abf2 100644 --- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c +++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c @@ -18,18 +18,18 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <linux/io.h> #include <linux/kernel.h> +#include <linux/pinctrl/pinconf-generic.h> + #include <mach/sh73a0.h> #include <mach/irqs.h> +#include "core.h" #include "sh_pfc.h" #define CPU_ALL_PORT(fn, pfx, sfx) \ - PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ - PORT_10(fn, pfx##2, sfx), PORT_10(fn, pfx##3, sfx), \ - PORT_10(fn, pfx##4, sfx), PORT_10(fn, pfx##5, sfx), \ - PORT_10(fn, pfx##6, sfx), PORT_10(fn, pfx##7, sfx), \ - PORT_10(fn, pfx##8, sfx), PORT_10(fn, pfx##9, sfx), \ + PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \ PORT_10(fn, pfx##10, sfx), \ PORT_1(fn, pfx##110, sfx), PORT_1(fn, pfx##111, sfx), \ PORT_1(fn, pfx##112, sfx), PORT_1(fn, pfx##113, sfx), \ @@ -66,14 +66,6 @@ enum { PORT_ALL(IN), /* PORT0_IN -> PORT309_IN */ PINMUX_INPUT_END, - PINMUX_INPUT_PULLUP_BEGIN, - PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT309_IN_PU */ - PINMUX_INPUT_PULLUP_END, - - PINMUX_INPUT_PULLDOWN_BEGIN, - PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT309_IN_PD */ - PINMUX_INPUT_PULLDOWN_END, - PINMUX_OUTPUT_BEGIN, PORT_ALL(OUT), /* PORT0_OUT -> PORT309_OUT */ PINMUX_OUTPUT_END, @@ -468,328 +460,15 @@ enum { EDBGREQ_PD_MARK, EDBGREQ_PU_MARK, - /* Functions with pull-ups */ - KEYIN0_PU_MARK, - KEYIN1_PU_MARK, - KEYIN2_PU_MARK, - KEYIN3_PU_MARK, - KEYIN4_PU_MARK, - KEYIN5_PU_MARK, - KEYIN6_PU_MARK, - KEYIN7_PU_MARK, - SDHICD0_PU_MARK, - SDHID0_0_PU_MARK, - SDHID0_1_PU_MARK, - SDHID0_2_PU_MARK, - SDHID0_3_PU_MARK, - SDHICMD0_PU_MARK, - SDHIWP0_PU_MARK, - SDHID1_0_PU_MARK, - SDHID1_1_PU_MARK, - SDHID1_2_PU_MARK, - SDHID1_3_PU_MARK, - SDHICMD1_PU_MARK, - SDHID2_0_PU_MARK, - SDHID2_1_PU_MARK, - SDHID2_2_PU_MARK, - SDHID2_3_PU_MARK, - SDHICMD2_PU_MARK, - MMCCMD0_PU_MARK, - MMCCMD1_PU_MARK, - MMCD0_0_PU_MARK, - MMCD0_1_PU_MARK, - MMCD0_2_PU_MARK, - MMCD0_3_PU_MARK, - MMCD0_4_PU_MARK, - MMCD0_5_PU_MARK, - MMCD0_6_PU_MARK, - MMCD0_7_PU_MARK, - FSIBISLD_PU_MARK, - FSIACK_PU_MARK, - FSIAILR_PU_MARK, - FSIAIBT_PU_MARK, - FSIAISLD_PU_MARK, - PINMUX_MARK_END, }; -static pinmux_enum_t pinmux_data[] = { - /* specify valid pin states for each pin in GPIO mode */ +#define _PORT_DATA(pfx, sfx) PORT_DATA_IO(pfx) +#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_PORT_DATA, , unused) - /* Table 25-1 (I/O and Pull U/D) */ - PORT_DATA_I_PD(0), - PORT_DATA_I_PU(1), - PORT_DATA_I_PU(2), - PORT_DATA_I_PU(3), - PORT_DATA_I_PU(4), - PORT_DATA_I_PU(5), - PORT_DATA_I_PU(6), - PORT_DATA_I_PU(7), - PORT_DATA_I_PU(8), - PORT_DATA_I_PD(9), - PORT_DATA_I_PD(10), - PORT_DATA_I_PU_PD(11), - PORT_DATA_IO_PU_PD(12), - PORT_DATA_IO_PU_PD(13), - PORT_DATA_IO_PU_PD(14), - PORT_DATA_IO_PU_PD(15), - PORT_DATA_IO_PD(16), - PORT_DATA_IO_PD(17), - PORT_DATA_IO_PU(18), - PORT_DATA_IO_PU(19), - PORT_DATA_O(20), - PORT_DATA_O(21), - PORT_DATA_O(22), - PORT_DATA_O(23), - PORT_DATA_O(24), - PORT_DATA_I_PD(25), - PORT_DATA_I_PD(26), - PORT_DATA_IO_PU(27), - PORT_DATA_IO_PU(28), - PORT_DATA_IO_PD(29), - PORT_DATA_IO_PD(30), - PORT_DATA_IO_PU(31), - PORT_DATA_IO_PD(32), - PORT_DATA_I_PU_PD(33), - PORT_DATA_IO_PD(34), - PORT_DATA_I_PU_PD(35), - PORT_DATA_IO_PD(36), - PORT_DATA_IO(37), - PORT_DATA_O(38), - PORT_DATA_I_PU(39), - PORT_DATA_I_PU_PD(40), - PORT_DATA_O(41), - PORT_DATA_IO_PD(42), - PORT_DATA_IO_PU_PD(43), - PORT_DATA_IO_PU_PD(44), - PORT_DATA_IO_PD(45), - PORT_DATA_IO_PD(46), - PORT_DATA_IO_PD(47), - PORT_DATA_I_PD(48), - PORT_DATA_IO_PU_PD(49), - PORT_DATA_IO_PD(50), - - PORT_DATA_IO_PD(51), - PORT_DATA_O(52), - PORT_DATA_IO_PU_PD(53), - PORT_DATA_IO_PU_PD(54), - PORT_DATA_IO_PD(55), - PORT_DATA_I_PU_PD(56), - PORT_DATA_IO(57), - PORT_DATA_IO(58), - PORT_DATA_IO(59), - PORT_DATA_IO(60), - PORT_DATA_IO(61), - PORT_DATA_IO_PD(62), - PORT_DATA_IO_PD(63), - PORT_DATA_IO_PU_PD(64), - PORT_DATA_IO_PD(65), - PORT_DATA_IO_PU_PD(66), - PORT_DATA_IO_PU_PD(67), - PORT_DATA_IO_PU_PD(68), - PORT_DATA_IO_PU_PD(69), - PORT_DATA_IO_PU_PD(70), - PORT_DATA_IO_PU_PD(71), - PORT_DATA_IO_PU_PD(72), - PORT_DATA_I_PU_PD(73), - PORT_DATA_IO_PU(74), - PORT_DATA_IO_PU(75), - PORT_DATA_IO_PU(76), - PORT_DATA_IO_PU(77), - PORT_DATA_IO_PU(78), - PORT_DATA_IO_PU(79), - PORT_DATA_IO_PU(80), - PORT_DATA_IO_PU(81), - PORT_DATA_IO_PU(82), - PORT_DATA_IO_PU(83), - PORT_DATA_IO_PU(84), - PORT_DATA_IO_PU(85), - PORT_DATA_IO_PU(86), - PORT_DATA_IO_PU(87), - PORT_DATA_IO_PU(88), - PORT_DATA_IO_PU(89), - PORT_DATA_O(90), - PORT_DATA_IO_PU(91), - PORT_DATA_O(92), - PORT_DATA_IO_PU(93), - PORT_DATA_O(94), - PORT_DATA_I_PU_PD(95), - PORT_DATA_IO(96), - PORT_DATA_IO(97), - PORT_DATA_IO(98), - PORT_DATA_I_PU(99), - PORT_DATA_O(100), - PORT_DATA_O(101), - PORT_DATA_I_PU(102), - PORT_DATA_IO_PD(103), - PORT_DATA_I_PU_PD(104), - PORT_DATA_I_PD(105), - PORT_DATA_I_PD(106), - PORT_DATA_I_PU_PD(107), - PORT_DATA_I_PU_PD(108), - PORT_DATA_IO_PD(109), - PORT_DATA_IO_PD(110), - PORT_DATA_IO_PU_PD(111), - PORT_DATA_IO_PU_PD(112), - PORT_DATA_IO_PU_PD(113), - PORT_DATA_IO_PD(114), - PORT_DATA_IO_PU(115), - PORT_DATA_IO_PU(116), - PORT_DATA_IO_PU_PD(117), - PORT_DATA_IO_PU_PD(118), - PORT_DATA_IO_PD(128), - - PORT_DATA_IO_PD(129), - PORT_DATA_IO_PU_PD(130), - PORT_DATA_IO_PD(131), - PORT_DATA_IO_PD(132), - PORT_DATA_IO_PD(133), - PORT_DATA_IO_PU_PD(134), - PORT_DATA_IO_PU_PD(135), - PORT_DATA_IO_PU_PD(136), - PORT_DATA_IO_PU_PD(137), - PORT_DATA_IO_PD(138), - PORT_DATA_IO_PD(139), - PORT_DATA_IO_PD(140), - PORT_DATA_IO_PD(141), - PORT_DATA_IO_PD(142), - PORT_DATA_IO_PD(143), - PORT_DATA_IO_PU_PD(144), - PORT_DATA_IO_PD(145), - PORT_DATA_IO_PU_PD(146), - PORT_DATA_IO_PU_PD(147), - PORT_DATA_IO_PU_PD(148), - PORT_DATA_IO_PU_PD(149), - PORT_DATA_I_PU_PD(150), - PORT_DATA_IO_PU_PD(151), - PORT_DATA_IO_PU_PD(152), - PORT_DATA_IO_PD(153), - PORT_DATA_IO_PD(154), - PORT_DATA_I_PU_PD(155), - PORT_DATA_IO_PU_PD(156), - PORT_DATA_I_PD(157), - PORT_DATA_IO_PD(158), - PORT_DATA_IO_PU_PD(159), - PORT_DATA_IO_PU_PD(160), - PORT_DATA_I_PU_PD(161), - PORT_DATA_I_PU_PD(162), - PORT_DATA_IO_PU_PD(163), - PORT_DATA_I_PU_PD(164), - PORT_DATA_IO_PD(192), - PORT_DATA_IO_PU_PD(193), - PORT_DATA_IO_PD(194), - PORT_DATA_IO_PU_PD(195), - PORT_DATA_IO_PD(196), - PORT_DATA_IO_PD(197), - PORT_DATA_IO_PD(198), - PORT_DATA_IO_PD(199), - PORT_DATA_IO_PU_PD(200), - PORT_DATA_IO_PU_PD(201), - PORT_DATA_IO_PU_PD(202), - PORT_DATA_IO_PU_PD(203), - PORT_DATA_IO_PU_PD(204), - PORT_DATA_IO_PU_PD(205), - PORT_DATA_IO_PU_PD(206), - PORT_DATA_IO_PD(207), - PORT_DATA_IO_PD(208), - PORT_DATA_IO_PD(209), - PORT_DATA_IO_PD(210), - PORT_DATA_IO_PD(211), - PORT_DATA_IO_PD(212), - PORT_DATA_IO_PD(213), - PORT_DATA_IO_PU_PD(214), - PORT_DATA_IO_PU_PD(215), - PORT_DATA_IO_PD(216), - PORT_DATA_IO_PD(217), - PORT_DATA_O(218), - PORT_DATA_IO_PD(219), - PORT_DATA_IO_PD(220), - PORT_DATA_IO_PU_PD(221), - PORT_DATA_IO_PU_PD(222), - PORT_DATA_I_PU_PD(223), - PORT_DATA_I_PU_PD(224), - - PORT_DATA_IO_PU_PD(225), - PORT_DATA_O(226), - PORT_DATA_IO_PU_PD(227), - PORT_DATA_I_PU_PD(228), - PORT_DATA_I_PD(229), - PORT_DATA_IO(230), - PORT_DATA_IO_PU_PD(231), - PORT_DATA_IO_PU_PD(232), - PORT_DATA_I_PU_PD(233), - PORT_DATA_IO_PU_PD(234), - PORT_DATA_IO_PU_PD(235), - PORT_DATA_IO_PU_PD(236), - PORT_DATA_IO_PD(237), - PORT_DATA_IO_PU_PD(238), - PORT_DATA_IO_PU_PD(239), - PORT_DATA_IO_PU_PD(240), - PORT_DATA_O(241), - PORT_DATA_I_PD(242), - PORT_DATA_IO_PU_PD(243), - PORT_DATA_IO_PU_PD(244), - PORT_DATA_IO_PU_PD(245), - PORT_DATA_IO_PU_PD(246), - PORT_DATA_IO_PU_PD(247), - PORT_DATA_IO_PU_PD(248), - PORT_DATA_IO_PU_PD(249), - PORT_DATA_IO_PU_PD(250), - PORT_DATA_IO_PU_PD(251), - PORT_DATA_IO_PU_PD(252), - PORT_DATA_IO_PU_PD(253), - PORT_DATA_IO_PU_PD(254), - PORT_DATA_IO_PU_PD(255), - PORT_DATA_IO_PU_PD(256), - PORT_DATA_IO_PU_PD(257), - PORT_DATA_IO_PU_PD(258), - PORT_DATA_IO_PU_PD(259), - PORT_DATA_IO_PU_PD(260), - PORT_DATA_IO_PU_PD(261), - PORT_DATA_IO_PU_PD(262), - PORT_DATA_IO_PU_PD(263), - PORT_DATA_IO_PU_PD(264), - PORT_DATA_IO_PU_PD(265), - PORT_DATA_IO_PU_PD(266), - PORT_DATA_IO_PU_PD(267), - PORT_DATA_IO_PU_PD(268), - PORT_DATA_IO_PU_PD(269), - PORT_DATA_IO_PU_PD(270), - PORT_DATA_IO_PU_PD(271), - PORT_DATA_IO_PU_PD(272), - PORT_DATA_IO_PU_PD(273), - PORT_DATA_IO_PU_PD(274), - PORT_DATA_IO_PU_PD(275), - PORT_DATA_IO_PU_PD(276), - PORT_DATA_IO_PU_PD(277), - PORT_DATA_IO_PU_PD(278), - PORT_DATA_IO_PU_PD(279), - PORT_DATA_IO_PU_PD(280), - PORT_DATA_O(281), - PORT_DATA_O(282), - PORT_DATA_I_PU(288), - PORT_DATA_IO_PU_PD(289), - PORT_DATA_IO_PU_PD(290), - PORT_DATA_IO_PU_PD(291), - PORT_DATA_IO_PU_PD(292), - PORT_DATA_IO_PU_PD(293), - PORT_DATA_IO_PU_PD(294), - PORT_DATA_IO_PU_PD(295), - PORT_DATA_IO_PU_PD(296), - PORT_DATA_IO_PU_PD(297), - PORT_DATA_IO_PU_PD(298), - - PORT_DATA_IO_PU_PD(299), - PORT_DATA_IO_PU_PD(300), - PORT_DATA_IO_PU_PD(301), - PORT_DATA_IO_PU_PD(302), - PORT_DATA_IO_PU_PD(303), - PORT_DATA_IO_PU_PD(304), - PORT_DATA_IO_PU_PD(305), - PORT_DATA_O(306), - PORT_DATA_O(307), - PORT_DATA_I_PU(308), - PORT_DATA_O(309), +static const pinmux_enum_t pinmux_data[] = { + /* specify valid pin states for each pin in GPIO mode */ + PINMUX_DATA_GP_ALL(), /* Table 25-1 (Function 0-7) */ PINMUX_DATA(VBUS_0_MARK, PORT0_FN1), @@ -1358,28 +1037,19 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_DATA(TS_SCK4_MARK, PORT268_FN3), PINMUX_DATA(SDHICMD2_MARK, PORT269_FN1), PINMUX_DATA(MMCCLK0_MARK, PORT270_FN1, MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_0_MARK, PORT271_FN1, PORT271_IN_PU, - MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_1_MARK, PORT272_FN1, PORT272_IN_PU, - MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_2_MARK, PORT273_FN1, PORT273_IN_PU, - MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_3_MARK, PORT274_FN1, PORT274_IN_PU, - MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_4_MARK, PORT275_FN1, PORT275_IN_PU, - MSEL4CR_MSEL15_0), \ + PINMUX_DATA(MMCD0_0_MARK, PORT271_FN1, MSEL4CR_MSEL15_0), + PINMUX_DATA(MMCD0_1_MARK, PORT272_FN1, MSEL4CR_MSEL15_0), + PINMUX_DATA(MMCD0_2_MARK, PORT273_FN1, MSEL4CR_MSEL15_0), + PINMUX_DATA(MMCD0_3_MARK, PORT274_FN1, MSEL4CR_MSEL15_0), + PINMUX_DATA(MMCD0_4_MARK, PORT275_FN1, MSEL4CR_MSEL15_0), PINMUX_DATA(TS_SPSYNC5_MARK, PORT275_FN3), - PINMUX_DATA(MMCD0_5_MARK, PORT276_FN1, PORT276_IN_PU, - MSEL4CR_MSEL15_0), \ + PINMUX_DATA(MMCD0_5_MARK, PORT276_FN1, MSEL4CR_MSEL15_0), PINMUX_DATA(TS_SDAT5_MARK, PORT276_FN3), - PINMUX_DATA(MMCD0_6_MARK, PORT277_FN1, PORT277_IN_PU, - MSEL4CR_MSEL15_0), \ + PINMUX_DATA(MMCD0_6_MARK, PORT277_FN1, MSEL4CR_MSEL15_0), PINMUX_DATA(TS_SDEN5_MARK, PORT277_FN3), - PINMUX_DATA(MMCD0_7_MARK, PORT278_FN1, PORT278_IN_PU, - MSEL4CR_MSEL15_0), \ + PINMUX_DATA(MMCD0_7_MARK, PORT278_FN1, MSEL4CR_MSEL15_0), PINMUX_DATA(TS_SCK5_MARK, PORT278_FN3), - PINMUX_DATA(MMCCMD0_MARK, PORT279_FN1, PORT279_IN_PU, - MSEL4CR_MSEL15_0), + PINMUX_DATA(MMCCMD0_MARK, PORT279_FN1, MSEL4CR_MSEL15_0), PINMUX_DATA(RESETOUTS__MARK, PORT281_FN1), \ PINMUX_DATA(EXTAL2OUT_MARK, PORT281_FN2), PINMUX_DATA(MCP_WAIT__MCP_FRB_MARK, PORT288_FN1), @@ -1485,69 +1155,1791 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_DATA(RESETA_N_PU_OFF_MARK, MSEL4CR_MSEL4_1), PINMUX_DATA(EDBGREQ_PD_MARK, MSEL4CR_MSEL1_0), PINMUX_DATA(EDBGREQ_PU_MARK, MSEL4CR_MSEL1_1), +}; + +#define SH73A0_PIN(pin, cfgs) \ + { \ + .name = __stringify(PORT##pin), \ + .enum_id = PORT##pin##_DATA, \ + .configs = cfgs, \ + } + +#define __I (SH_PFC_PIN_CFG_INPUT) +#define __O (SH_PFC_PIN_CFG_OUTPUT) +#define __IO (SH_PFC_PIN_CFG_INPUT | SH_PFC_PIN_CFG_OUTPUT) +#define __PD (SH_PFC_PIN_CFG_PULL_DOWN) +#define __PU (SH_PFC_PIN_CFG_PULL_UP) +#define __PUD (SH_PFC_PIN_CFG_PULL_DOWN | SH_PFC_PIN_CFG_PULL_UP) + +#define SH73A0_PIN_I_PD(pin) SH73A0_PIN(pin, __I | __PD) +#define SH73A0_PIN_I_PU(pin) SH73A0_PIN(pin, __I | __PU) +#define SH73A0_PIN_I_PU_PD(pin) SH73A0_PIN(pin, __I | __PUD) +#define SH73A0_PIN_IO(pin) SH73A0_PIN(pin, __IO) +#define SH73A0_PIN_IO_PD(pin) SH73A0_PIN(pin, __IO | __PD) +#define SH73A0_PIN_IO_PU(pin) SH73A0_PIN(pin, __IO | __PU) +#define SH73A0_PIN_IO_PU_PD(pin) SH73A0_PIN(pin, __IO | __PUD) +#define SH73A0_PIN_O(pin) SH73A0_PIN(pin, __O) + +static struct sh_pfc_pin pinmux_pins[] = { + /* Table 25-1 (I/O and Pull U/D) */ + SH73A0_PIN_I_PD(0), + SH73A0_PIN_I_PU(1), + SH73A0_PIN_I_PU(2), + SH73A0_PIN_I_PU(3), + SH73A0_PIN_I_PU(4), + SH73A0_PIN_I_PU(5), + SH73A0_PIN_I_PU(6), + SH73A0_PIN_I_PU(7), + SH73A0_PIN_I_PU(8), + SH73A0_PIN_I_PD(9), + SH73A0_PIN_I_PD(10), + SH73A0_PIN_I_PU_PD(11), + SH73A0_PIN_IO_PU_PD(12), + SH73A0_PIN_IO_PU_PD(13), + SH73A0_PIN_IO_PU_PD(14), + SH73A0_PIN_IO_PU_PD(15), + SH73A0_PIN_IO_PD(16), + SH73A0_PIN_IO_PD(17), + SH73A0_PIN_IO_PU(18), + SH73A0_PIN_IO_PU(19), + SH73A0_PIN_O(20), + SH73A0_PIN_O(21), + SH73A0_PIN_O(22), + SH73A0_PIN_O(23), + SH73A0_PIN_O(24), + SH73A0_PIN_I_PD(25), + SH73A0_PIN_I_PD(26), + SH73A0_PIN_IO_PU(27), + SH73A0_PIN_IO_PU(28), + SH73A0_PIN_IO_PD(29), + SH73A0_PIN_IO_PD(30), + SH73A0_PIN_IO_PU(31), + SH73A0_PIN_IO_PD(32), + SH73A0_PIN_I_PU_PD(33), + SH73A0_PIN_IO_PD(34), + SH73A0_PIN_I_PU_PD(35), + SH73A0_PIN_IO_PD(36), + SH73A0_PIN_IO(37), + SH73A0_PIN_O(38), + SH73A0_PIN_I_PU(39), + SH73A0_PIN_I_PU_PD(40), + SH73A0_PIN_O(41), + SH73A0_PIN_IO_PD(42), + SH73A0_PIN_IO_PU_PD(43), + SH73A0_PIN_IO_PU_PD(44), + SH73A0_PIN_IO_PD(45), + SH73A0_PIN_IO_PD(46), + SH73A0_PIN_IO_PD(47), + SH73A0_PIN_I_PD(48), + SH73A0_PIN_IO_PU_PD(49), + SH73A0_PIN_IO_PD(50), + SH73A0_PIN_IO_PD(51), + SH73A0_PIN_O(52), + SH73A0_PIN_IO_PU_PD(53), + SH73A0_PIN_IO_PU_PD(54), + SH73A0_PIN_IO_PD(55), + SH73A0_PIN_I_PU_PD(56), + SH73A0_PIN_IO(57), + SH73A0_PIN_IO(58), + SH73A0_PIN_IO(59), + SH73A0_PIN_IO(60), + SH73A0_PIN_IO(61), + SH73A0_PIN_IO_PD(62), + SH73A0_PIN_IO_PD(63), + SH73A0_PIN_IO_PU_PD(64), + SH73A0_PIN_IO_PD(65), + SH73A0_PIN_IO_PU_PD(66), + SH73A0_PIN_IO_PU_PD(67), + SH73A0_PIN_IO_PU_PD(68), + SH73A0_PIN_IO_PU_PD(69), + SH73A0_PIN_IO_PU_PD(70), + SH73A0_PIN_IO_PU_PD(71), + SH73A0_PIN_IO_PU_PD(72), + SH73A0_PIN_I_PU_PD(73), + SH73A0_PIN_IO_PU(74), + SH73A0_PIN_IO_PU(75), + SH73A0_PIN_IO_PU(76), + SH73A0_PIN_IO_PU(77), + SH73A0_PIN_IO_PU(78), + SH73A0_PIN_IO_PU(79), + SH73A0_PIN_IO_PU(80), + SH73A0_PIN_IO_PU(81), + SH73A0_PIN_IO_PU(82), + SH73A0_PIN_IO_PU(83), + SH73A0_PIN_IO_PU(84), + SH73A0_PIN_IO_PU(85), + SH73A0_PIN_IO_PU(86), + SH73A0_PIN_IO_PU(87), + SH73A0_PIN_IO_PU(88), + SH73A0_PIN_IO_PU(89), + SH73A0_PIN_O(90), + SH73A0_PIN_IO_PU(91), + SH73A0_PIN_O(92), + SH73A0_PIN_IO_PU(93), + SH73A0_PIN_O(94), + SH73A0_PIN_I_PU_PD(95), + SH73A0_PIN_IO(96), + SH73A0_PIN_IO(97), + SH73A0_PIN_IO(98), + SH73A0_PIN_I_PU(99), + SH73A0_PIN_O(100), + SH73A0_PIN_O(101), + SH73A0_PIN_I_PU(102), + SH73A0_PIN_IO_PD(103), + SH73A0_PIN_I_PU_PD(104), + SH73A0_PIN_I_PD(105), + SH73A0_PIN_I_PD(106), + SH73A0_PIN_I_PU_PD(107), + SH73A0_PIN_I_PU_PD(108), + SH73A0_PIN_IO_PD(109), + SH73A0_PIN_IO_PD(110), + SH73A0_PIN_IO_PU_PD(111), + SH73A0_PIN_IO_PU_PD(112), + SH73A0_PIN_IO_PU_PD(113), + SH73A0_PIN_IO_PD(114), + SH73A0_PIN_IO_PU(115), + SH73A0_PIN_IO_PU(116), + SH73A0_PIN_IO_PU_PD(117), + SH73A0_PIN_IO_PU_PD(118), + SH73A0_PIN_IO_PD(128), + SH73A0_PIN_IO_PD(129), + SH73A0_PIN_IO_PU_PD(130), + SH73A0_PIN_IO_PD(131), + SH73A0_PIN_IO_PD(132), + SH73A0_PIN_IO_PD(133), + SH73A0_PIN_IO_PU_PD(134), + SH73A0_PIN_IO_PU_PD(135), + SH73A0_PIN_IO_PU_PD(136), + SH73A0_PIN_IO_PU_PD(137), + SH73A0_PIN_IO_PD(138), + SH73A0_PIN_IO_PD(139), + SH73A0_PIN_IO_PD(140), + SH73A0_PIN_IO_PD(141), + SH73A0_PIN_IO_PD(142), + SH73A0_PIN_IO_PD(143), + SH73A0_PIN_IO_PU_PD(144), + SH73A0_PIN_IO_PD(145), + SH73A0_PIN_IO_PU_PD(146), + SH73A0_PIN_IO_PU_PD(147), + SH73A0_PIN_IO_PU_PD(148), + SH73A0_PIN_IO_PU_PD(149), + SH73A0_PIN_I_PU_PD(150), + SH73A0_PIN_IO_PU_PD(151), + SH73A0_PIN_IO_PU_PD(152), + SH73A0_PIN_IO_PD(153), + SH73A0_PIN_IO_PD(154), + SH73A0_PIN_I_PU_PD(155), + SH73A0_PIN_IO_PU_PD(156), + SH73A0_PIN_I_PD(157), + SH73A0_PIN_IO_PD(158), + SH73A0_PIN_IO_PU_PD(159), + SH73A0_PIN_IO_PU_PD(160), + SH73A0_PIN_I_PU_PD(161), + SH73A0_PIN_I_PU_PD(162), + SH73A0_PIN_IO_PU_PD(163), + SH73A0_PIN_I_PU_PD(164), + SH73A0_PIN_IO_PD(192), + SH73A0_PIN_IO_PU_PD(193), + SH73A0_PIN_IO_PD(194), + SH73A0_PIN_IO_PU_PD(195), + SH73A0_PIN_IO_PD(196), + SH73A0_PIN_IO_PD(197), + SH73A0_PIN_IO_PD(198), + SH73A0_PIN_IO_PD(199), + SH73A0_PIN_IO_PU_PD(200), + SH73A0_PIN_IO_PU_PD(201), + SH73A0_PIN_IO_PU_PD(202), + SH73A0_PIN_IO_PU_PD(203), + SH73A0_PIN_IO_PU_PD(204), + SH73A0_PIN_IO_PU_PD(205), + SH73A0_PIN_IO_PU_PD(206), + SH73A0_PIN_IO_PD(207), + SH73A0_PIN_IO_PD(208), + SH73A0_PIN_IO_PD(209), + SH73A0_PIN_IO_PD(210), + SH73A0_PIN_IO_PD(211), + SH73A0_PIN_IO_PD(212), + SH73A0_PIN_IO_PD(213), + SH73A0_PIN_IO_PU_PD(214), + SH73A0_PIN_IO_PU_PD(215), + SH73A0_PIN_IO_PD(216), + SH73A0_PIN_IO_PD(217), + SH73A0_PIN_O(218), + SH73A0_PIN_IO_PD(219), + SH73A0_PIN_IO_PD(220), + SH73A0_PIN_IO_PU_PD(221), + SH73A0_PIN_IO_PU_PD(222), + SH73A0_PIN_I_PU_PD(223), + SH73A0_PIN_I_PU_PD(224), + SH73A0_PIN_IO_PU_PD(225), + SH73A0_PIN_O(226), + SH73A0_PIN_IO_PU_PD(227), + SH73A0_PIN_I_PU_PD(228), + SH73A0_PIN_I_PD(229), + SH73A0_PIN_IO(230), + SH73A0_PIN_IO_PU_PD(231), + SH73A0_PIN_IO_PU_PD(232), + SH73A0_PIN_I_PU_PD(233), + SH73A0_PIN_IO_PU_PD(234), + SH73A0_PIN_IO_PU_PD(235), + SH73A0_PIN_IO_PU_PD(236), + SH73A0_PIN_IO_PD(237), + SH73A0_PIN_IO_PU_PD(238), + SH73A0_PIN_IO_PU_PD(239), + SH73A0_PIN_IO_PU_PD(240), + SH73A0_PIN_O(241), + SH73A0_PIN_I_PD(242), + SH73A0_PIN_IO_PU_PD(243), + SH73A0_PIN_IO_PU_PD(244), + SH73A0_PIN_IO_PU_PD(245), + SH73A0_PIN_IO_PU_PD(246), + SH73A0_PIN_IO_PU_PD(247), + SH73A0_PIN_IO_PU_PD(248), + SH73A0_PIN_IO_PU_PD(249), + SH73A0_PIN_IO_PU_PD(250), + SH73A0_PIN_IO_PU_PD(251), + SH73A0_PIN_IO_PU_PD(252), + SH73A0_PIN_IO_PU_PD(253), + SH73A0_PIN_IO_PU_PD(254), + SH73A0_PIN_IO_PU_PD(255), + SH73A0_PIN_IO_PU_PD(256), + SH73A0_PIN_IO_PU_PD(257), + SH73A0_PIN_IO_PU_PD(258), + SH73A0_PIN_IO_PU_PD(259), + SH73A0_PIN_IO_PU_PD(260), + SH73A0_PIN_IO_PU_PD(261), + SH73A0_PIN_IO_PU_PD(262), + SH73A0_PIN_IO_PU_PD(263), + SH73A0_PIN_IO_PU_PD(264), + SH73A0_PIN_IO_PU_PD(265), + SH73A0_PIN_IO_PU_PD(266), + SH73A0_PIN_IO_PU_PD(267), + SH73A0_PIN_IO_PU_PD(268), + SH73A0_PIN_IO_PU_PD(269), + SH73A0_PIN_IO_PU_PD(270), + SH73A0_PIN_IO_PU_PD(271), + SH73A0_PIN_IO_PU_PD(272), + SH73A0_PIN_IO_PU_PD(273), + SH73A0_PIN_IO_PU_PD(274), + SH73A0_PIN_IO_PU_PD(275), + SH73A0_PIN_IO_PU_PD(276), + SH73A0_PIN_IO_PU_PD(277), + SH73A0_PIN_IO_PU_PD(278), + SH73A0_PIN_IO_PU_PD(279), + SH73A0_PIN_IO_PU_PD(280), + SH73A0_PIN_O(281), + SH73A0_PIN_O(282), + SH73A0_PIN_I_PU(288), + SH73A0_PIN_IO_PU_PD(289), + SH73A0_PIN_IO_PU_PD(290), + SH73A0_PIN_IO_PU_PD(291), + SH73A0_PIN_IO_PU_PD(292), + SH73A0_PIN_IO_PU_PD(293), + SH73A0_PIN_IO_PU_PD(294), + SH73A0_PIN_IO_PU_PD(295), + SH73A0_PIN_IO_PU_PD(296), + SH73A0_PIN_IO_PU_PD(297), + SH73A0_PIN_IO_PU_PD(298), + SH73A0_PIN_IO_PU_PD(299), + SH73A0_PIN_IO_PU_PD(300), + SH73A0_PIN_IO_PU_PD(301), + SH73A0_PIN_IO_PU_PD(302), + SH73A0_PIN_IO_PU_PD(303), + SH73A0_PIN_IO_PU_PD(304), + SH73A0_PIN_IO_PU_PD(305), + SH73A0_PIN_O(306), + SH73A0_PIN_O(307), + SH73A0_PIN_I_PU(308), + SH73A0_PIN_O(309), +}; + +static const struct pinmux_range pinmux_ranges[] = { + {.begin = 0, .end = 118,}, + {.begin = 128, .end = 164,}, + {.begin = 192, .end = 282,}, + {.begin = 288, .end = 309,}, +}; + +/* Pin numbers for pins without a corresponding GPIO port number are computed + * from the row and column numbers with a 1000 offset to avoid collisions with + * GPIO port numbers. + */ +#define PIN_NUMBER(row, col) (1000+((row)-1)*34+(col)-1) + +/* - BSC -------------------------------------------------------------------- */ +static const unsigned int bsc_data_0_7_pins[] = { + /* D[0:7] */ + 74, 75, 76, 77, 78, 79, 80, 81, +}; +static const unsigned int bsc_data_0_7_mux[] = { + D0_NAF0_MARK, D1_NAF1_MARK, D2_NAF2_MARK, D3_NAF3_MARK, + D4_NAF4_MARK, D5_NAF5_MARK, D6_NAF6_MARK, D7_NAF7_MARK, +}; +static const unsigned int bsc_data_8_15_pins[] = { + /* D[8:15] */ + 82, 83, 84, 85, 86, 87, 88, 89, +}; +static const unsigned int bsc_data_8_15_mux[] = { + D8_NAF8_MARK, D9_NAF9_MARK, D10_NAF10_MARK, D11_NAF11_MARK, + D12_NAF12_MARK, D13_NAF13_MARK, D14_NAF14_MARK, D15_NAF15_MARK, +}; +static const unsigned int bsc_cs4_pins[] = { + /* CS */ + 90, +}; +static const unsigned int bsc_cs4_mux[] = { + CS4__MARK, +}; +static const unsigned int bsc_cs5_a_pins[] = { + /* CS */ + 91, +}; +static const unsigned int bsc_cs5_a_mux[] = { + CS5A__MARK, +}; +static const unsigned int bsc_cs5_b_pins[] = { + /* CS */ + 92, +}; +static const unsigned int bsc_cs5_b_mux[] = { + CS5B__MARK, +}; +static const unsigned int bsc_cs6_a_pins[] = { + /* CS */ + 94, +}; +static const unsigned int bsc_cs6_a_mux[] = { + CS6A__MARK, +}; +static const unsigned int bsc_cs6_b_pins[] = { + /* CS */ + 93, +}; +static const unsigned int bsc_cs6_b_mux[] = { + CS6B__MARK, +}; +static const unsigned int bsc_rd_pins[] = { + /* RD */ + 96, +}; +static const unsigned int bsc_rd_mux[] = { + RD__FSC_MARK, +}; +static const unsigned int bsc_rdwr_0_pins[] = { + /* RDWR */ + 91, +}; +static const unsigned int bsc_rdwr_0_mux[] = { + PORT91_RDWR_MARK, +}; +static const unsigned int bsc_rdwr_1_pins[] = { + /* RDWR */ + 97, +}; +static const unsigned int bsc_rdwr_1_mux[] = { + RDWR_FWE_MARK, +}; +static const unsigned int bsc_rdwr_2_pins[] = { + /* RDWR */ + 149, +}; +static const unsigned int bsc_rdwr_2_mux[] = { + PORT149_RDWR_MARK, +}; +static const unsigned int bsc_we0_pins[] = { + /* WE0 */ + 97, +}; +static const unsigned int bsc_we0_mux[] = { + WE0__FWE_MARK, +}; +static const unsigned int bsc_we1_pins[] = { + /* WE1 */ + 98, +}; +static const unsigned int bsc_we1_mux[] = { + WE1__MARK, +}; +/* - FSIA ------------------------------------------------------------------- */ +static const unsigned int fsia_mclk_in_pins[] = { + /* CK */ + 49, +}; +static const unsigned int fsia_mclk_in_mux[] = { + FSIACK_MARK, +}; +static const unsigned int fsia_mclk_out_pins[] = { + /* OMC */ + 49, +}; +static const unsigned int fsia_mclk_out_mux[] = { + FSIAOMC_MARK, +}; +static const unsigned int fsia_sclk_in_pins[] = { + /* ILR, IBT */ + 50, 51, +}; +static const unsigned int fsia_sclk_in_mux[] = { + FSIAILR_MARK, FSIAIBT_MARK, +}; +static const unsigned int fsia_sclk_out_pins[] = { + /* OLR, OBT */ + 50, 51, +}; +static const unsigned int fsia_sclk_out_mux[] = { + FSIAOLR_MARK, FSIAOBT_MARK, +}; +static const unsigned int fsia_data_in_pins[] = { + /* ISLD */ + 55, +}; +static const unsigned int fsia_data_in_mux[] = { + FSIAISLD_MARK, +}; +static const unsigned int fsia_data_out_pins[] = { + /* OSLD */ + 52, +}; +static const unsigned int fsia_data_out_mux[] = { + FSIAOSLD_MARK, +}; +static const unsigned int fsia_spdif_pins[] = { + /* SPDIF */ + 53, +}; +static const unsigned int fsia_spdif_mux[] = { + FSIASPDIF_MARK, +}; +/* - FSIB ------------------------------------------------------------------- */ +static const unsigned int fsib_mclk_in_pins[] = { + /* CK */ + 54, +}; +static const unsigned int fsib_mclk_in_mux[] = { + FSIBCK_MARK, +}; +static const unsigned int fsib_mclk_out_pins[] = { + /* OMC */ + 54, +}; +static const unsigned int fsib_mclk_out_mux[] = { + FSIBOMC_MARK, +}; +static const unsigned int fsib_sclk_in_pins[] = { + /* ILR, IBT */ + 37, 36, +}; +static const unsigned int fsib_sclk_in_mux[] = { + FSIBILR_MARK, FSIBIBT_MARK, +}; +static const unsigned int fsib_sclk_out_pins[] = { + /* OLR, OBT */ + 37, 36, +}; +static const unsigned int fsib_sclk_out_mux[] = { + FSIBOLR_MARK, FSIBOBT_MARK, +}; +static const unsigned int fsib_data_in_pins[] = { + /* ISLD */ + 39, +}; +static const unsigned int fsib_data_in_mux[] = { + FSIBISLD_MARK, +}; +static const unsigned int fsib_data_out_pins[] = { + /* OSLD */ + 38, +}; +static const unsigned int fsib_data_out_mux[] = { + FSIBOSLD_MARK, +}; +static const unsigned int fsib_spdif_pins[] = { + /* SPDIF */ + 53, +}; +static const unsigned int fsib_spdif_mux[] = { + FSIBSPDIF_MARK, +}; +/* - FSIC ------------------------------------------------------------------- */ +static const unsigned int fsic_mclk_in_pins[] = { + /* CK */ + 54, +}; +static const unsigned int fsic_mclk_in_mux[] = { + FSICCK_MARK, +}; +static const unsigned int fsic_mclk_out_pins[] = { + /* OMC */ + 54, +}; +static const unsigned int fsic_mclk_out_mux[] = { + FSICOMC_MARK, +}; +static const unsigned int fsic_sclk_in_pins[] = { + /* ILR, IBT */ + 46, 45, +}; +static const unsigned int fsic_sclk_in_mux[] = { + FSICILR_MARK, FSICIBT_MARK, +}; +static const unsigned int fsic_sclk_out_pins[] = { + /* OLR, OBT */ + 46, 45, +}; +static const unsigned int fsic_sclk_out_mux[] = { + FSICOLR_MARK, FSICOBT_MARK, +}; +static const unsigned int fsic_data_in_pins[] = { + /* ISLD */ + 48, +}; +static const unsigned int fsic_data_in_mux[] = { + FSICISLD_MARK, +}; +static const unsigned int fsic_data_out_pins[] = { + /* OSLD, OSLDT1, OSLDT2, OSLDT3 */ + 47, 44, 42, 16, +}; +static const unsigned int fsic_data_out_mux[] = { + FSICOSLD_MARK, FSICOSLDT1_MARK, FSICOSLDT2_MARK, FSICOSLDT3_MARK, +}; +static const unsigned int fsic_spdif_0_pins[] = { + /* SPDIF */ + 53, +}; +static const unsigned int fsic_spdif_0_mux[] = { + PORT53_FSICSPDIF_MARK, +}; +static const unsigned int fsic_spdif_1_pins[] = { + /* SPDIF */ + 47, +}; +static const unsigned int fsic_spdif_1_mux[] = { + PORT47_FSICSPDIF_MARK, +}; +/* - FSID ------------------------------------------------------------------- */ +static const unsigned int fsid_sclk_in_pins[] = { + /* ILR, IBT */ + 46, 45, +}; +static const unsigned int fsid_sclk_in_mux[] = { + FSIDILR_MARK, FSIDIBT_MARK, +}; +static const unsigned int fsid_sclk_out_pins[] = { + /* OLR, OBT */ + 46, 45, +}; +static const unsigned int fsid_sclk_out_mux[] = { + FSIDOLR_MARK, FSIDOBT_MARK, +}; +static const unsigned int fsid_data_in_pins[] = { + /* ISLD */ + 48, +}; +static const unsigned int fsid_data_in_mux[] = { + FSIDISLD_MARK, +}; +/* - I2C2 ------------------------------------------------------------------- */ +static const unsigned int i2c2_0_pins[] = { + /* SCL, SDA */ + 237, 236, +}; +static const unsigned int i2c2_0_mux[] = { + PORT237_I2C_SCL2_MARK, PORT236_I2C_SDA2_MARK, +}; +static const unsigned int i2c2_1_pins[] = { + /* SCL, SDA */ + 27, 28, +}; +static const unsigned int i2c2_1_mux[] = { + PORT27_I2C_SCL2_MARK, PORT28_I2C_SDA2_MARK, +}; +static const unsigned int i2c2_2_pins[] = { + /* SCL, SDA */ + 115, 116, +}; +static const unsigned int i2c2_2_mux[] = { + PORT115_I2C_SCL2_MARK, PORT116_I2C_SDA2_MARK, +}; +/* - I2C3 ------------------------------------------------------------------- */ +static const unsigned int i2c3_0_pins[] = { + /* SCL, SDA */ + 248, 249, +}; +static const unsigned int i2c3_0_mux[] = { + PORT248_I2C_SCL3_MARK, PORT249_I2C_SDA3_MARK, +}; +static const unsigned int i2c3_1_pins[] = { + /* SCL, SDA */ + 27, 28, +}; +static const unsigned int i2c3_1_mux[] = { + PORT27_I2C_SCL3_MARK, PORT28_I2C_SDA3_MARK, +}; +static const unsigned int i2c3_2_pins[] = { + /* SCL, SDA */ + 115, 116, +}; +static const unsigned int i2c3_2_mux[] = { + PORT115_I2C_SCL3_MARK, PORT116_I2C_SDA3_MARK, +}; +/* - IrDA ------------------------------------------------------------------- */ +static const unsigned int irda_0_pins[] = { + /* OUT, IN, FIRSEL */ + 241, 242, 243, +}; +static const unsigned int irda_0_mux[] = { + PORT241_IRDA_OUT_MARK, PORT242_IRDA_IN_MARK, PORT243_IRDA_FIRSEL_MARK, +}; +static const unsigned int irda_1_pins[] = { + /* OUT, IN, FIRSEL */ + 49, 53, 54, +}; +static const unsigned int irda_1_mux[] = { + PORT49_IRDA_OUT_MARK, PORT53_IRDA_IN_MARK, PORT54_IRDA_FIRSEL_MARK, +}; +/* - KEYSC ------------------------------------------------------------------ */ +static const unsigned int keysc_in5_pins[] = { + /* KEYIN[0:4] */ + 66, 67, 68, 69, 70, +}; +static const unsigned int keysc_in5_mux[] = { + KEYIN0_MARK, KEYIN1_MARK, KEYIN2_MARK, KEYIN3_MARK, + KEYIN4_MARK, +}; +static const unsigned int keysc_in6_pins[] = { + /* KEYIN[0:5] */ + 66, 67, 68, 69, 70, 71, +}; +static const unsigned int keysc_in6_mux[] = { + KEYIN0_MARK, KEYIN1_MARK, KEYIN2_MARK, KEYIN3_MARK, + KEYIN4_MARK, KEYIN5_MARK, +}; +static const unsigned int keysc_in7_pins[] = { + /* KEYIN[0:6] */ + 66, 67, 68, 69, 70, 71, 72, +}; +static const unsigned int keysc_in7_mux[] = { + KEYIN0_MARK, KEYIN1_MARK, KEYIN2_MARK, KEYIN3_MARK, + KEYIN4_MARK, KEYIN5_MARK, KEYIN6_MARK, +}; +static const unsigned int keysc_in8_pins[] = { + /* KEYIN[0:7] */ + 66, 67, 68, 69, 70, 71, 72, 73, +}; +static const unsigned int keysc_in8_mux[] = { + KEYIN0_MARK, KEYIN1_MARK, KEYIN2_MARK, KEYIN3_MARK, + KEYIN4_MARK, KEYIN5_MARK, KEYIN6_MARK, KEYIN7_MARK, +}; +static const unsigned int keysc_out04_pins[] = { + /* KEYOUT[0:4] */ + 65, 64, 63, 62, 61, +}; +static const unsigned int keysc_out04_mux[] = { + KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK, KEYOUT4_MARK, +}; +static const unsigned int keysc_out5_pins[] = { + /* KEYOUT5 */ + 60, +}; +static const unsigned int keysc_out5_mux[] = { + KEYOUT5_MARK, +}; +static const unsigned int keysc_out6_0_pins[] = { + /* KEYOUT6 */ + 59, +}; +static const unsigned int keysc_out6_0_mux[] = { + PORT59_KEYOUT6_MARK, +}; +static const unsigned int keysc_out6_1_pins[] = { + /* KEYOUT6 */ + 131, +}; +static const unsigned int keysc_out6_1_mux[] = { + PORT131_KEYOUT6_MARK, +}; +static const unsigned int keysc_out6_2_pins[] = { + /* KEYOUT6 */ + 143, +}; +static const unsigned int keysc_out6_2_mux[] = { + PORT143_KEYOUT6_MARK, +}; +static const unsigned int keysc_out7_0_pins[] = { + /* KEYOUT7 */ + 58, +}; +static const unsigned int keysc_out7_0_mux[] = { + PORT58_KEYOUT7_MARK, +}; +static const unsigned int keysc_out7_1_pins[] = { + /* KEYOUT7 */ + 132, +}; +static const unsigned int keysc_out7_1_mux[] = { + PORT132_KEYOUT7_MARK, +}; +static const unsigned int keysc_out7_2_pins[] = { + /* KEYOUT7 */ + 144, +}; +static const unsigned int keysc_out7_2_mux[] = { + PORT144_KEYOUT7_MARK, +}; +static const unsigned int keysc_out8_0_pins[] = { + /* KEYOUT8 */ + PIN_NUMBER(6, 26), +}; +static const unsigned int keysc_out8_0_mux[] = { + KEYOUT8_MARK, +}; +static const unsigned int keysc_out8_1_pins[] = { + /* KEYOUT8 */ + 136, +}; +static const unsigned int keysc_out8_1_mux[] = { + PORT136_KEYOUT8_MARK, +}; +static const unsigned int keysc_out8_2_pins[] = { + /* KEYOUT8 */ + 138, +}; +static const unsigned int keysc_out8_2_mux[] = { + PORT138_KEYOUT8_MARK, +}; +static const unsigned int keysc_out9_0_pins[] = { + /* KEYOUT9 */ + 137, +}; +static const unsigned int keysc_out9_0_mux[] = { + PORT137_KEYOUT9_MARK, +}; +static const unsigned int keysc_out9_1_pins[] = { + /* KEYOUT9 */ + 139, +}; +static const unsigned int keysc_out9_1_mux[] = { + PORT139_KEYOUT9_MARK, +}; +static const unsigned int keysc_out9_2_pins[] = { + /* KEYOUT9 */ + 149, +}; +static const unsigned int keysc_out9_2_mux[] = { + PORT149_KEYOUT9_MARK, +}; +static const unsigned int keysc_out10_0_pins[] = { + /* KEYOUT10 */ + 132, +}; +static const unsigned int keysc_out10_0_mux[] = { + PORT132_KEYOUT10_MARK, +}; +static const unsigned int keysc_out10_1_pins[] = { + /* KEYOUT10 */ + 142, +}; +static const unsigned int keysc_out10_1_mux[] = { + PORT142_KEYOUT10_MARK, +}; +static const unsigned int keysc_out11_0_pins[] = { + /* KEYOUT11 */ + 131, +}; +static const unsigned int keysc_out11_0_mux[] = { + PORT131_KEYOUT11_MARK, +}; +static const unsigned int keysc_out11_1_pins[] = { + /* KEYOUT11 */ + 143, +}; +static const unsigned int keysc_out11_1_mux[] = { + PORT143_KEYOUT11_MARK, +}; +/* - LCD -------------------------------------------------------------------- */ +static const unsigned int lcd_data8_pins[] = { + /* D[0:7] */ + 192, 193, 194, 195, 196, 197, 198, 199, +}; +static const unsigned int lcd_data8_mux[] = { + LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK, + LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK, +}; +static const unsigned int lcd_data9_pins[] = { + /* D[0:8] */ + 192, 193, 194, 195, 196, 197, 198, 199, + 200, +}; +static const unsigned int lcd_data9_mux[] = { + LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK, + LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK, + LCDD8_MARK, +}; +static const unsigned int lcd_data12_pins[] = { + /* D[0:11] */ + 192, 193, 194, 195, 196, 197, 198, 199, + 200, 201, 202, 203, +}; +static const unsigned int lcd_data12_mux[] = { + LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK, + LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK, + LCDD8_MARK, LCDD9_MARK, LCDD10_MARK, LCDD11_MARK, +}; +static const unsigned int lcd_data16_pins[] = { + /* D[0:15] */ + 192, 193, 194, 195, 196, 197, 198, 199, + 200, 201, 202, 203, 204, 205, 206, 207, +}; +static const unsigned int lcd_data16_mux[] = { + LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK, + LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK, + LCDD8_MARK, LCDD9_MARK, LCDD10_MARK, LCDD11_MARK, + LCDD12_MARK, LCDD13_MARK, LCDD14_MARK, LCDD15_MARK, +}; +static const unsigned int lcd_data18_pins[] = { + /* D[0:17] */ + 192, 193, 194, 195, 196, 197, 198, 199, + 200, 201, 202, 203, 204, 205, 206, 207, + 208, 209, +}; +static const unsigned int lcd_data18_mux[] = { + LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK, + LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK, + LCDD8_MARK, LCDD9_MARK, LCDD10_MARK, LCDD11_MARK, + LCDD12_MARK, LCDD13_MARK, LCDD14_MARK, LCDD15_MARK, + LCDD16_MARK, LCDD17_MARK, +}; +static const unsigned int lcd_data24_pins[] = { + /* D[0:23] */ + 192, 193, 194, 195, 196, 197, 198, 199, + 200, 201, 202, 203, 204, 205, 206, 207, + 208, 209, 210, 211, 212, 213, 214, 215 +}; +static const unsigned int lcd_data24_mux[] = { + LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK, + LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK, + LCDD8_MARK, LCDD9_MARK, LCDD10_MARK, LCDD11_MARK, + LCDD12_MARK, LCDD13_MARK, LCDD14_MARK, LCDD15_MARK, + LCDD16_MARK, LCDD17_MARK, LCDD18_MARK, LCDD19_MARK, + LCDD20_MARK, LCDD21_MARK, LCDD22_MARK, LCDD23_MARK, +}; +static const unsigned int lcd_display_pins[] = { + /* DON */ + 222, +}; +static const unsigned int lcd_display_mux[] = { + LCDDON_MARK, +}; +static const unsigned int lcd_lclk_pins[] = { + /* LCLK */ + 221, +}; +static const unsigned int lcd_lclk_mux[] = { + LCDLCLK_MARK, +}; +static const unsigned int lcd_sync_pins[] = { + /* VSYN, HSYN, DCK, DISP */ + 220, 218, 216, 219, +}; +static const unsigned int lcd_sync_mux[] = { + LCDVSYN_MARK, LCDHSYN_MARK, LCDDCK_MARK, LCDDISP_MARK, +}; +static const unsigned int lcd_sys_pins[] = { + /* CS, WR, RD, RS */ + 218, 216, 217, 219, +}; +static const unsigned int lcd_sys_mux[] = { + LCDCS__MARK, LCDWR__MARK, LCDRD__MARK, LCDRS_MARK, +}; +/* - LCD2 ------------------------------------------------------------------- */ +static const unsigned int lcd2_data8_pins[] = { + /* D[0:7] */ + 128, 129, 142, 143, 144, 145, 138, 139, +}; +static const unsigned int lcd2_data8_mux[] = { + LCD2D0_MARK, LCD2D1_MARK, LCD2D2_MARK, LCD2D3_MARK, + LCD2D4_MARK, LCD2D5_MARK, LCD2D6_MARK, LCD2D7_MARK, +}; +static const unsigned int lcd2_data9_pins[] = { + /* D[0:8] */ + 128, 129, 142, 143, 144, 145, 138, 139, + 140, +}; +static const unsigned int lcd2_data9_mux[] = { + LCD2D0_MARK, LCD2D1_MARK, LCD2D2_MARK, LCD2D3_MARK, + LCD2D4_MARK, LCD2D5_MARK, LCD2D6_MARK, LCD2D7_MARK, + LCD2D8_MARK, +}; +static const unsigned int lcd2_data12_pins[] = { + /* D[0:12] */ + 128, 129, 142, 143, 144, 145, 138, 139, + 140, 141, 130, 131, +}; +static const unsigned int lcd2_data12_mux[] = { + LCD2D0_MARK, LCD2D1_MARK, LCD2D2_MARK, LCD2D3_MARK, + LCD2D4_MARK, LCD2D5_MARK, LCD2D6_MARK, LCD2D7_MARK, + LCD2D8_MARK, LCD2D9_MARK, LCD2D10_MARK, LCD2D11_MARK, +}; +static const unsigned int lcd2_data16_pins[] = { + /* D[0:15] */ + 128, 129, 142, 143, 144, 145, 138, 139, + 140, 141, 130, 131, 132, 133, 134, 135, +}; +static const unsigned int lcd2_data16_mux[] = { + LCD2D0_MARK, LCD2D1_MARK, LCD2D2_MARK, LCD2D3_MARK, + LCD2D4_MARK, LCD2D5_MARK, LCD2D6_MARK, LCD2D7_MARK, + LCD2D8_MARK, LCD2D9_MARK, LCD2D10_MARK, LCD2D11_MARK, + LCD2D12_MARK, LCD2D13_MARK, LCD2D14_MARK, LCD2D15_MARK, +}; +static const unsigned int lcd2_data18_pins[] = { + /* D[0:17] */ + 128, 129, 142, 143, 144, 145, 138, 139, + 140, 141, 130, 131, 132, 133, 134, 135, + 136, 137, +}; +static const unsigned int lcd2_data18_mux[] = { + LCD2D0_MARK, LCD2D1_MARK, LCD2D2_MARK, LCD2D3_MARK, + LCD2D4_MARK, LCD2D5_MARK, LCD2D6_MARK, LCD2D7_MARK, + LCD2D8_MARK, LCD2D9_MARK, LCD2D10_MARK, LCD2D11_MARK, + LCD2D12_MARK, LCD2D13_MARK, LCD2D14_MARK, LCD2D15_MARK, + LCD2D16_MARK, LCD2D17_MARK, +}; +static const unsigned int lcd2_data24_pins[] = { + /* D[0:23] */ + 128, 129, 142, 143, 144, 145, 138, 139, + 140, 141, 130, 131, 132, 133, 134, 135, + 136, 137, 146, 147, 234, 235, 238, 239 +}; +static const unsigned int lcd2_data24_mux[] = { + LCD2D0_MARK, LCD2D1_MARK, LCD2D2_MARK, LCD2D3_MARK, + LCD2D4_MARK, LCD2D5_MARK, LCD2D6_MARK, LCD2D7_MARK, + LCD2D8_MARK, LCD2D9_MARK, LCD2D10_MARK, LCD2D11_MARK, + LCD2D12_MARK, LCD2D13_MARK, LCD2D14_MARK, LCD2D15_MARK, + LCD2D16_MARK, LCD2D17_MARK, LCD2D18_MARK, LCD2D19_MARK, + LCD2D20_MARK, LCD2D21_MARK, LCD2D22_MARK, LCD2D23_MARK, +}; +static const unsigned int lcd2_sync_0_pins[] = { + /* VSYN, HSYN, DCK, DISP */ + 128, 129, 146, 145, +}; +static const unsigned int lcd2_sync_0_mux[] = { + PORT128_LCD2VSYN_MARK, PORT129_LCD2HSYN_MARK, + LCD2DCK_MARK, PORT145_LCD2DISP_MARK, +}; +static const unsigned int lcd2_sync_1_pins[] = { + /* VSYN, HSYN, DCK, DISP */ + 222, 221, 219, 217, +}; +static const unsigned int lcd2_sync_1_mux[] = { + PORT222_LCD2VSYN_MARK, PORT221_LCD2HSYN_MARK, + LCD2DCK_2_MARK, PORT217_LCD2DISP_MARK, +}; +static const unsigned int lcd2_sys_0_pins[] = { + /* CS, WR, RD, RS */ + 129, 146, 147, 145, +}; +static const unsigned int lcd2_sys_0_mux[] = { + PORT129_LCD2CS__MARK, PORT146_LCD2WR__MARK, + LCD2RD__MARK, PORT145_LCD2RS_MARK, +}; +static const unsigned int lcd2_sys_1_pins[] = { + /* CS, WR, RD, RS */ + 221, 219, 147, 217, +}; +static const unsigned int lcd2_sys_1_mux[] = { + PORT221_LCD2CS__MARK, PORT219_LCD2WR__MARK, + LCD2RD__MARK, PORT217_LCD2RS_MARK, +}; +/* - MMCIF ------------------------------------------------------------------ */ +static const unsigned int mmc0_data1_0_pins[] = { + /* D[0] */ + 271, +}; +static const unsigned int mmc0_data1_0_mux[] = { + MMCD0_0_MARK, +}; +static const unsigned int mmc0_data4_0_pins[] = { + /* D[0:3] */ + 271, 272, 273, 274, +}; +static const unsigned int mmc0_data4_0_mux[] = { + MMCD0_0_MARK, MMCD0_1_MARK, MMCD0_2_MARK, MMCD0_3_MARK, +}; +static const unsigned int mmc0_data8_0_pins[] = { + /* D[0:7] */ + 271, 272, 273, 274, 275, 276, 277, 278, +}; +static const unsigned int mmc0_data8_0_mux[] = { + MMCD0_0_MARK, MMCD0_1_MARK, MMCD0_2_MARK, MMCD0_3_MARK, + MMCD0_4_MARK, MMCD0_5_MARK, MMCD0_6_MARK, MMCD0_7_MARK, +}; +static const unsigned int mmc0_ctrl_0_pins[] = { + /* CMD, CLK */ + 279, 270, +}; +static const unsigned int mmc0_ctrl_0_mux[] = { + MMCCMD0_MARK, MMCCLK0_MARK, +}; - /* Functions with pull-ups */ - PINMUX_DATA(KEYIN0_PU_MARK, PORT66_FN2, PORT66_IN_PU), - PINMUX_DATA(KEYIN1_PU_MARK, PORT67_FN2, PORT67_IN_PU), - PINMUX_DATA(KEYIN2_PU_MARK, PORT68_FN2, PORT68_IN_PU), - PINMUX_DATA(KEYIN3_PU_MARK, PORT69_FN2, PORT69_IN_PU), - PINMUX_DATA(KEYIN4_PU_MARK, PORT70_FN2, PORT70_IN_PU), - PINMUX_DATA(KEYIN5_PU_MARK, PORT71_FN2, PORT71_IN_PU), - PINMUX_DATA(KEYIN6_PU_MARK, PORT72_FN2, PORT72_IN_PU), - PINMUX_DATA(KEYIN7_PU_MARK, PORT73_FN2, PORT73_IN_PU), - - PINMUX_DATA(SDHICD0_PU_MARK, PORT251_FN1, PORT251_IN_PU), - PINMUX_DATA(SDHID0_0_PU_MARK, PORT252_FN1, PORT252_IN_PU), - PINMUX_DATA(SDHID0_1_PU_MARK, PORT253_FN1, PORT253_IN_PU), - PINMUX_DATA(SDHID0_2_PU_MARK, PORT254_FN1, PORT254_IN_PU), - PINMUX_DATA(SDHID0_3_PU_MARK, PORT255_FN1, PORT255_IN_PU), - PINMUX_DATA(SDHICMD0_PU_MARK, PORT256_FN1, PORT256_IN_PU), - PINMUX_DATA(SDHIWP0_PU_MARK, PORT257_FN1, PORT256_IN_PU), - PINMUX_DATA(SDHID1_0_PU_MARK, PORT259_FN1, PORT259_IN_PU), - PINMUX_DATA(SDHID1_1_PU_MARK, PORT260_FN1, PORT260_IN_PU), - PINMUX_DATA(SDHID1_2_PU_MARK, PORT261_FN1, PORT261_IN_PU), - PINMUX_DATA(SDHID1_3_PU_MARK, PORT262_FN1, PORT262_IN_PU), - PINMUX_DATA(SDHICMD1_PU_MARK, PORT263_FN1, PORT263_IN_PU), - PINMUX_DATA(SDHID2_0_PU_MARK, PORT265_FN1, PORT265_IN_PU), - PINMUX_DATA(SDHID2_1_PU_MARK, PORT266_FN1, PORT266_IN_PU), - PINMUX_DATA(SDHID2_2_PU_MARK, PORT267_FN1, PORT267_IN_PU), - PINMUX_DATA(SDHID2_3_PU_MARK, PORT268_FN1, PORT268_IN_PU), - PINMUX_DATA(SDHICMD2_PU_MARK, PORT269_FN1, PORT269_IN_PU), - - PINMUX_DATA(MMCCMD0_PU_MARK, PORT279_FN1, PORT279_IN_PU, - MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT297_IN_PU, - MSEL4CR_MSEL15_1), - - PINMUX_DATA(MMCD0_0_PU_MARK, - PORT271_FN1, PORT271_IN_PU, MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_1_PU_MARK, - PORT272_FN1, PORT272_IN_PU, MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_2_PU_MARK, - PORT273_FN1, PORT273_IN_PU, MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_3_PU_MARK, - PORT274_FN1, PORT274_IN_PU, MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_4_PU_MARK, - PORT275_FN1, PORT275_IN_PU, MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_5_PU_MARK, - PORT276_FN1, PORT276_IN_PU, MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_6_PU_MARK, - PORT277_FN1, PORT277_IN_PU, MSEL4CR_MSEL15_0), - PINMUX_DATA(MMCD0_7_PU_MARK, - PORT278_FN1, PORT278_IN_PU, MSEL4CR_MSEL15_0), - - PINMUX_DATA(FSIBISLD_PU_MARK, PORT39_FN1, PORT39_IN_PU), - PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU), - PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU), - PINMUX_DATA(FSIAIBT_PU_MARK, PORT51_FN5, PORT51_IN_PU), - PINMUX_DATA(FSIAISLD_PU_MARK, PORT55_FN1, PORT55_IN_PU), -}; - -static struct pinmux_gpio pinmux_gpios[] = { - GPIO_PORT_ALL(), +static const unsigned int mmc0_data1_1_pins[] = { + /* D[0] */ + 305, +}; +static const unsigned int mmc0_data1_1_mux[] = { + MMCD1_0_MARK, +}; +static const unsigned int mmc0_data4_1_pins[] = { + /* D[0:3] */ + 305, 304, 303, 302, +}; +static const unsigned int mmc0_data4_1_mux[] = { + MMCD1_0_MARK, MMCD1_1_MARK, MMCD1_2_MARK, MMCD1_3_MARK, +}; +static const unsigned int mmc0_data8_1_pins[] = { + /* D[0:7] */ + 305, 304, 303, 302, 301, 300, 299, 298, +}; +static const unsigned int mmc0_data8_1_mux[] = { + MMCD1_0_MARK, MMCD1_1_MARK, MMCD1_2_MARK, MMCD1_3_MARK, + MMCD1_4_MARK, MMCD1_5_MARK, MMCD1_6_MARK, MMCD1_7_MARK, +}; +static const unsigned int mmc0_ctrl_1_pins[] = { + /* CMD, CLK */ + 297, 289, +}; +static const unsigned int mmc0_ctrl_1_mux[] = { + MMCCMD1_MARK, MMCCLK1_MARK, +}; +/* - SCIFA0 ----------------------------------------------------------------- */ +static const unsigned int scifa0_data_pins[] = { + /* RXD, TXD */ + 43, 17, +}; +static const unsigned int scifa0_data_mux[] = { + SCIFA0_RXD_MARK, SCIFA0_TXD_MARK, +}; +static const unsigned int scifa0_clk_pins[] = { + /* SCK */ + 16, +}; +static const unsigned int scifa0_clk_mux[] = { + SCIFA0_SCK_MARK, +}; +static const unsigned int scifa0_ctrl_pins[] = { + /* RTS, CTS */ + 42, 44, +}; +static const unsigned int scifa0_ctrl_mux[] = { + SCIFA0_RTS__MARK, SCIFA0_CTS__MARK, +}; +/* - SCIFA1 ----------------------------------------------------------------- */ +static const unsigned int scifa1_data_pins[] = { + /* RXD, TXD */ + 228, 225, +}; +static const unsigned int scifa1_data_mux[] = { + SCIFA1_RXD_MARK, SCIFA1_TXD_MARK, +}; +static const unsigned int scifa1_clk_pins[] = { + /* SCK */ + 226, +}; +static const unsigned int scifa1_clk_mux[] = { + SCIFA1_SCK_MARK, +}; +static const unsigned int scifa1_ctrl_pins[] = { + /* RTS, CTS */ + 227, 229, +}; +static const unsigned int scifa1_ctrl_mux[] = { + SCIFA1_RTS__MARK, SCIFA1_CTS__MARK, +}; +/* - SCIFA2 ----------------------------------------------------------------- */ +static const unsigned int scifa2_data_0_pins[] = { + /* RXD, TXD */ + 155, 154, +}; +static const unsigned int scifa2_data_0_mux[] = { + SCIFA2_RXD1_MARK, SCIFA2_TXD1_MARK, +}; +static const unsigned int scifa2_clk_0_pins[] = { + /* SCK */ + 158, +}; +static const unsigned int scifa2_clk_0_mux[] = { + SCIFA2_SCK1_MARK, +}; +static const unsigned int scifa2_ctrl_0_pins[] = { + /* RTS, CTS */ + 156, 157, +}; +static const unsigned int scifa2_ctrl_0_mux[] = { + SCIFA2_RTS1__MARK, SCIFA2_CTS1__MARK, +}; +static const unsigned int scifa2_data_1_pins[] = { + /* RXD, TXD */ + 233, 230, +}; +static const unsigned int scifa2_data_1_mux[] = { + SCIFA2_RXD2_MARK, SCIFA2_TXD2_MARK, +}; +static const unsigned int scifa2_clk_1_pins[] = { + /* SCK */ + 232, +}; +static const unsigned int scifa2_clk_1_mux[] = { + SCIFA2_SCK2_MARK, +}; +static const unsigned int scifa2_ctrl_1_pins[] = { + /* RTS, CTS */ + 234, 231, +}; +static const unsigned int scifa2_ctrl_1_mux[] = { + SCIFA2_RTS2__MARK, SCIFA2_CTS2__MARK, +}; +/* - SCIFA3 ----------------------------------------------------------------- */ +static const unsigned int scifa3_data_pins[] = { + /* RXD, TXD */ + 108, 110, +}; +static const unsigned int scifa3_data_mux[] = { + SCIFA3_RXD_MARK, SCIFA3_TXD_MARK, +}; +static const unsigned int scifa3_ctrl_pins[] = { + /* RTS, CTS */ + 109, 107, +}; +static const unsigned int scifa3_ctrl_mux[] = { + SCIFA3_RTS__MARK, SCIFA3_CTS__MARK, +}; +/* - SCIFA4 ----------------------------------------------------------------- */ +static const unsigned int scifa4_data_pins[] = { + /* RXD, TXD */ + 33, 32, +}; +static const unsigned int scifa4_data_mux[] = { + SCIFA4_RXD_MARK, SCIFA4_TXD_MARK, +}; +static const unsigned int scifa4_ctrl_pins[] = { + /* RTS, CTS */ + 34, 35, +}; +static const unsigned int scifa4_ctrl_mux[] = { + SCIFA4_RTS__MARK, SCIFA4_CTS__MARK, +}; +/* - SCIFA5 ----------------------------------------------------------------- */ +static const unsigned int scifa5_data_0_pins[] = { + /* RXD, TXD */ + 246, 247, +}; +static const unsigned int scifa5_data_0_mux[] = { + PORT246_SCIFA5_RXD_MARK, PORT247_SCIFA5_TXD_MARK, +}; +static const unsigned int scifa5_clk_0_pins[] = { + /* SCK */ + 248, +}; +static const unsigned int scifa5_clk_0_mux[] = { + PORT248_SCIFA5_SCK_MARK, +}; +static const unsigned int scifa5_ctrl_0_pins[] = { + /* RTS, CTS */ + 245, 244, +}; +static const unsigned int scifa5_ctrl_0_mux[] = { + PORT245_SCIFA5_RTS__MARK, PORT244_SCIFA5_CTS__MARK, +}; +static const unsigned int scifa5_data_1_pins[] = { + /* RXD, TXD */ + 195, 196, +}; +static const unsigned int scifa5_data_1_mux[] = { + PORT195_SCIFA5_RXD_MARK, PORT196_SCIFA5_TXD_MARK, +}; +static const unsigned int scifa5_clk_1_pins[] = { + /* SCK */ + 197, +}; +static const unsigned int scifa5_clk_1_mux[] = { + PORT197_SCIFA5_SCK_MARK, +}; +static const unsigned int scifa5_ctrl_1_pins[] = { + /* RTS, CTS */ + 194, 193, +}; +static const unsigned int scifa5_ctrl_1_mux[] = { + PORT194_SCIFA5_RTS__MARK, PORT193_SCIFA5_CTS__MARK, +}; +static const unsigned int scifa5_data_2_pins[] = { + /* RXD, TXD */ + 162, 160, +}; +static const unsigned int scifa5_data_2_mux[] = { + PORT162_SCIFA5_RXD_MARK, PORT160_SCIFA5_TXD_MARK, +}; +static const unsigned int scifa5_clk_2_pins[] = { + /* SCK */ + 159, +}; +static const unsigned int scifa5_clk_2_mux[] = { + PORT159_SCIFA5_SCK_MARK, +}; +static const unsigned int scifa5_ctrl_2_pins[] = { + /* RTS, CTS */ + 163, 161, +}; +static const unsigned int scifa5_ctrl_2_mux[] = { + PORT163_SCIFA5_RTS__MARK, PORT161_SCIFA5_CTS__MARK, +}; +/* - SCIFA6 ----------------------------------------------------------------- */ +static const unsigned int scifa6_pins[] = { + /* TXD */ + 240, +}; +static const unsigned int scifa6_mux[] = { + SCIFA6_TXD_MARK, +}; +/* - SCIFA7 ----------------------------------------------------------------- */ +static const unsigned int scifa7_data_pins[] = { + /* RXD, TXD */ + 12, 18, +}; +static const unsigned int scifa7_data_mux[] = { + SCIFA7_RXD_MARK, SCIFA7_TXD_MARK, +}; +static const unsigned int scifa7_ctrl_pins[] = { + /* RTS, CTS */ + 19, 13, +}; +static const unsigned int scifa7_ctrl_mux[] = { + SCIFA7_RTS__MARK, SCIFA7_CTS__MARK, +}; +/* - SCIFB ------------------------------------------------------------------ */ +static const unsigned int scifb_data_0_pins[] = { + /* RXD, TXD */ + 162, 160, +}; +static const unsigned int scifb_data_0_mux[] = { + PORT162_SCIFB_RXD_MARK, PORT160_SCIFB_TXD_MARK, +}; +static const unsigned int scifb_clk_0_pins[] = { + /* SCK */ + 159, +}; +static const unsigned int scifb_clk_0_mux[] = { + PORT159_SCIFB_SCK_MARK, +}; +static const unsigned int scifb_ctrl_0_pins[] = { + /* RTS, CTS */ + 163, 161, +}; +static const unsigned int scifb_ctrl_0_mux[] = { + PORT163_SCIFB_RTS__MARK, PORT161_SCIFB_CTS__MARK, +}; +static const unsigned int scifb_data_1_pins[] = { + /* RXD, TXD */ + 246, 247, +}; +static const unsigned int scifb_data_1_mux[] = { + PORT246_SCIFB_RXD_MARK, PORT247_SCIFB_TXD_MARK, +}; +static const unsigned int scifb_clk_1_pins[] = { + /* SCK */ + 248, +}; +static const unsigned int scifb_clk_1_mux[] = { + PORT248_SCIFB_SCK_MARK, +}; +static const unsigned int scifb_ctrl_1_pins[] = { + /* RTS, CTS */ + 245, 244, +}; +static const unsigned int scifb_ctrl_1_mux[] = { + PORT245_SCIFB_RTS__MARK, PORT244_SCIFB_CTS__MARK, +}; +/* - SDHI0 ------------------------------------------------------------------ */ +static const unsigned int sdhi0_data1_pins[] = { + /* D0 */ + 252, +}; +static const unsigned int sdhi0_data1_mux[] = { + SDHID0_0_MARK, +}; +static const unsigned int sdhi0_data4_pins[] = { + /* D[0:3] */ + 252, 253, 254, 255, +}; +static const unsigned int sdhi0_data4_mux[] = { + SDHID0_0_MARK, SDHID0_1_MARK, SDHID0_2_MARK, SDHID0_3_MARK, +}; +static const unsigned int sdhi0_ctrl_pins[] = { + /* CMD, CLK */ + 256, 250, +}; +static const unsigned int sdhi0_ctrl_mux[] = { + SDHICMD0_MARK, SDHICLK0_MARK, +}; +static const unsigned int sdhi0_cd_pins[] = { + /* CD */ + 251, +}; +static const unsigned int sdhi0_cd_mux[] = { + SDHICD0_MARK, +}; +static const unsigned int sdhi0_wp_pins[] = { + /* WP */ + 257, +}; +static const unsigned int sdhi0_wp_mux[] = { + SDHIWP0_MARK, +}; +/* - SDHI1 ------------------------------------------------------------------ */ +static const unsigned int sdhi1_data1_pins[] = { + /* D0 */ + 259, +}; +static const unsigned int sdhi1_data1_mux[] = { + SDHID1_0_MARK, +}; +static const unsigned int sdhi1_data4_pins[] = { + /* D[0:3] */ + 259, 260, 261, 262, +}; +static const unsigned int sdhi1_data4_mux[] = { + SDHID1_0_MARK, SDHID1_1_MARK, SDHID1_2_MARK, SDHID1_3_MARK, +}; +static const unsigned int sdhi1_ctrl_pins[] = { + /* CMD, CLK */ + 263, 258, +}; +static const unsigned int sdhi1_ctrl_mux[] = { + SDHICMD1_MARK, SDHICLK1_MARK, +}; +/* - SDHI2 ------------------------------------------------------------------ */ +static const unsigned int sdhi2_data1_pins[] = { + /* D0 */ + 265, +}; +static const unsigned int sdhi2_data1_mux[] = { + SDHID2_0_MARK, +}; +static const unsigned int sdhi2_data4_pins[] = { + /* D[0:3] */ + 265, 266, 267, 268, +}; +static const unsigned int sdhi2_data4_mux[] = { + SDHID2_0_MARK, SDHID2_1_MARK, SDHID2_2_MARK, SDHID2_3_MARK, +}; +static const unsigned int sdhi2_ctrl_pins[] = { + /* CMD, CLK */ + 269, 264, +}; +static const unsigned int sdhi2_ctrl_mux[] = { + SDHICMD2_MARK, SDHICLK2_MARK, +}; +/* - USB -------------------------------------------------------------------- */ +static const unsigned int usb_vbus_pins[] = { + /* VBUS */ + 0, +}; +static const unsigned int usb_vbus_mux[] = { + VBUS_0_MARK, +}; + +static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(bsc_data_0_7), + SH_PFC_PIN_GROUP(bsc_data_8_15), + SH_PFC_PIN_GROUP(bsc_cs4), + SH_PFC_PIN_GROUP(bsc_cs5_a), + SH_PFC_PIN_GROUP(bsc_cs5_b), + SH_PFC_PIN_GROUP(bsc_cs6_a), + SH_PFC_PIN_GROUP(bsc_cs6_b), + SH_PFC_PIN_GROUP(bsc_rd), + SH_PFC_PIN_GROUP(bsc_rdwr_0), + SH_PFC_PIN_GROUP(bsc_rdwr_1), + SH_PFC_PIN_GROUP(bsc_rdwr_2), + SH_PFC_PIN_GROUP(bsc_we0), + SH_PFC_PIN_GROUP(bsc_we1), + SH_PFC_PIN_GROUP(fsia_mclk_in), + SH_PFC_PIN_GROUP(fsia_mclk_out), + SH_PFC_PIN_GROUP(fsia_sclk_in), + SH_PFC_PIN_GROUP(fsia_sclk_out), + SH_PFC_PIN_GROUP(fsia_data_in), + SH_PFC_PIN_GROUP(fsia_data_out), + SH_PFC_PIN_GROUP(fsia_spdif), + SH_PFC_PIN_GROUP(fsib_mclk_in), + SH_PFC_PIN_GROUP(fsib_mclk_out), + SH_PFC_PIN_GROUP(fsib_sclk_in), + SH_PFC_PIN_GROUP(fsib_sclk_out), + SH_PFC_PIN_GROUP(fsib_data_in), + SH_PFC_PIN_GROUP(fsib_data_out), + SH_PFC_PIN_GROUP(fsib_spdif), + SH_PFC_PIN_GROUP(fsic_mclk_in), + SH_PFC_PIN_GROUP(fsic_mclk_out), + SH_PFC_PIN_GROUP(fsic_sclk_in), + SH_PFC_PIN_GROUP(fsic_sclk_out), + SH_PFC_PIN_GROUP(fsic_data_in), + SH_PFC_PIN_GROUP(fsic_data_out), + SH_PFC_PIN_GROUP(fsic_spdif_0), + SH_PFC_PIN_GROUP(fsic_spdif_1), + SH_PFC_PIN_GROUP(fsid_sclk_in), + SH_PFC_PIN_GROUP(fsid_sclk_out), + SH_PFC_PIN_GROUP(fsid_data_in), + SH_PFC_PIN_GROUP(i2c2_0), + SH_PFC_PIN_GROUP(i2c2_1), + SH_PFC_PIN_GROUP(i2c2_2), + SH_PFC_PIN_GROUP(i2c3_0), + SH_PFC_PIN_GROUP(i2c3_1), + SH_PFC_PIN_GROUP(i2c3_2), + SH_PFC_PIN_GROUP(irda_0), + SH_PFC_PIN_GROUP(irda_1), + SH_PFC_PIN_GROUP(keysc_in5), + SH_PFC_PIN_GROUP(keysc_in6), + SH_PFC_PIN_GROUP(keysc_in7), + SH_PFC_PIN_GROUP(keysc_in8), + SH_PFC_PIN_GROUP(keysc_out04), + SH_PFC_PIN_GROUP(keysc_out5), + SH_PFC_PIN_GROUP(keysc_out6_0), + SH_PFC_PIN_GROUP(keysc_out6_1), + SH_PFC_PIN_GROUP(keysc_out6_2), + SH_PFC_PIN_GROUP(keysc_out7_0), + SH_PFC_PIN_GROUP(keysc_out7_1), + SH_PFC_PIN_GROUP(keysc_out7_2), + SH_PFC_PIN_GROUP(keysc_out8_0), + SH_PFC_PIN_GROUP(keysc_out8_1), + SH_PFC_PIN_GROUP(keysc_out8_2), + SH_PFC_PIN_GROUP(keysc_out9_0), + SH_PFC_PIN_GROUP(keysc_out9_1), + SH_PFC_PIN_GROUP(keysc_out9_2), + SH_PFC_PIN_GROUP(keysc_out10_0), + SH_PFC_PIN_GROUP(keysc_out10_1), + SH_PFC_PIN_GROUP(keysc_out11_0), + SH_PFC_PIN_GROUP(keysc_out11_1), + SH_PFC_PIN_GROUP(lcd_data8), + SH_PFC_PIN_GROUP(lcd_data9), + SH_PFC_PIN_GROUP(lcd_data12), + SH_PFC_PIN_GROUP(lcd_data16), + SH_PFC_PIN_GROUP(lcd_data18), + SH_PFC_PIN_GROUP(lcd_data24), + SH_PFC_PIN_GROUP(lcd_display), + SH_PFC_PIN_GROUP(lcd_lclk), + SH_PFC_PIN_GROUP(lcd_sync), + SH_PFC_PIN_GROUP(lcd_sys), + SH_PFC_PIN_GROUP(lcd2_data8), + SH_PFC_PIN_GROUP(lcd2_data9), + SH_PFC_PIN_GROUP(lcd2_data12), + SH_PFC_PIN_GROUP(lcd2_data16), + SH_PFC_PIN_GROUP(lcd2_data18), + SH_PFC_PIN_GROUP(lcd2_data24), + SH_PFC_PIN_GROUP(lcd2_sync_0), + SH_PFC_PIN_GROUP(lcd2_sync_1), + SH_PFC_PIN_GROUP(lcd2_sys_0), + SH_PFC_PIN_GROUP(lcd2_sys_1), + SH_PFC_PIN_GROUP(mmc0_data1_0), + SH_PFC_PIN_GROUP(mmc0_data4_0), + SH_PFC_PIN_GROUP(mmc0_data8_0), + SH_PFC_PIN_GROUP(mmc0_ctrl_0), + SH_PFC_PIN_GROUP(mmc0_data1_1), + SH_PFC_PIN_GROUP(mmc0_data4_1), + SH_PFC_PIN_GROUP(mmc0_data8_1), + SH_PFC_PIN_GROUP(mmc0_ctrl_1), + SH_PFC_PIN_GROUP(scifa0_data), + SH_PFC_PIN_GROUP(scifa0_clk), + SH_PFC_PIN_GROUP(scifa0_ctrl), + SH_PFC_PIN_GROUP(scifa1_data), + SH_PFC_PIN_GROUP(scifa1_clk), + SH_PFC_PIN_GROUP(scifa1_ctrl), + SH_PFC_PIN_GROUP(scifa2_data_0), + SH_PFC_PIN_GROUP(scifa2_clk_0), + SH_PFC_PIN_GROUP(scifa2_ctrl_0), + SH_PFC_PIN_GROUP(scifa2_data_1), + SH_PFC_PIN_GROUP(scifa2_clk_1), + SH_PFC_PIN_GROUP(scifa2_ctrl_1), + SH_PFC_PIN_GROUP(scifa3_data), + SH_PFC_PIN_GROUP(scifa3_ctrl), + SH_PFC_PIN_GROUP(scifa4_data), + SH_PFC_PIN_GROUP(scifa4_ctrl), + SH_PFC_PIN_GROUP(scifa5_data_0), + SH_PFC_PIN_GROUP(scifa5_clk_0), + SH_PFC_PIN_GROUP(scifa5_ctrl_0), + SH_PFC_PIN_GROUP(scifa5_data_1), + SH_PFC_PIN_GROUP(scifa5_clk_1), + SH_PFC_PIN_GROUP(scifa5_ctrl_1), + SH_PFC_PIN_GROUP(scifa5_data_2), + SH_PFC_PIN_GROUP(scifa5_clk_2), + SH_PFC_PIN_GROUP(scifa5_ctrl_2), + SH_PFC_PIN_GROUP(scifa6), + SH_PFC_PIN_GROUP(scifa7_data), + SH_PFC_PIN_GROUP(scifa7_ctrl), + SH_PFC_PIN_GROUP(scifb_data_0), + SH_PFC_PIN_GROUP(scifb_clk_0), + SH_PFC_PIN_GROUP(scifb_ctrl_0), + SH_PFC_PIN_GROUP(scifb_data_1), + SH_PFC_PIN_GROUP(scifb_clk_1), + SH_PFC_PIN_GROUP(scifb_ctrl_1), + SH_PFC_PIN_GROUP(sdhi0_data1), + SH_PFC_PIN_GROUP(sdhi0_data4), + SH_PFC_PIN_GROUP(sdhi0_ctrl), + SH_PFC_PIN_GROUP(sdhi0_cd), + SH_PFC_PIN_GROUP(sdhi0_wp), + SH_PFC_PIN_GROUP(sdhi1_data1), + SH_PFC_PIN_GROUP(sdhi1_data4), + SH_PFC_PIN_GROUP(sdhi1_ctrl), + SH_PFC_PIN_GROUP(sdhi2_data1), + SH_PFC_PIN_GROUP(sdhi2_data4), + SH_PFC_PIN_GROUP(sdhi2_ctrl), + SH_PFC_PIN_GROUP(usb_vbus), +}; + +static const char * const bsc_groups[] = { + "bsc_data_0_7", + "bsc_data_8_15", + "bsc_cs4", + "bsc_cs5_a", + "bsc_cs5_b", + "bsc_cs6_a", + "bsc_cs6_b", + "bsc_rd", + "bsc_rdwr_0", + "bsc_rdwr_1", + "bsc_rdwr_2", + "bsc_we0", + "bsc_we1", +}; + +static const char * const fsia_groups[] = { + "fsia_mclk_in", + "fsia_mclk_out", + "fsia_sclk_in", + "fsia_sclk_out", + "fsia_data_in", + "fsia_data_out", + "fsia_spdif", +}; + +static const char * const fsib_groups[] = { + "fsib_mclk_in", + "fsib_mclk_out", + "fsib_sclk_in", + "fsib_sclk_out", + "fsib_data_in", + "fsib_data_out", + "fsib_spdif", +}; + +static const char * const fsic_groups[] = { + "fsic_mclk_in", + "fsic_mclk_out", + "fsic_sclk_in", + "fsic_sclk_out", + "fsic_data_in", + "fsic_data_out", + "fsic_spdif", +}; + +static const char * const fsid_groups[] = { + "fsid_sclk_in", + "fsid_sclk_out", + "fsid_data_in", +}; + +static const char * const i2c2_groups[] = { + "i2c2_0", + "i2c2_1", + "i2c2_2", +}; + +static const char * const i2c3_groups[] = { + "i2c3_0", + "i2c3_1", + "i2c3_2", +}; + +static const char * const irda_groups[] = { + "irda_0", + "irda_1", +}; +static const char * const keysc_groups[] = { + "keysc_in5", + "keysc_in6", + "keysc_in7", + "keysc_in8", + "keysc_out04", + "keysc_out5", + "keysc_out6_0", + "keysc_out6_1", + "keysc_out6_2", + "keysc_out7_0", + "keysc_out7_1", + "keysc_out7_2", + "keysc_out8_0", + "keysc_out8_1", + "keysc_out8_2", + "keysc_out9_0", + "keysc_out9_1", + "keysc_out9_2", + "keysc_out10_0", + "keysc_out10_1", + "keysc_out11_0", + "keysc_out11_1", +}; + +static const char * const lcd_groups[] = { + "lcd_data8", + "lcd_data9", + "lcd_data12", + "lcd_data16", + "lcd_data18", + "lcd_data24", + "lcd_display", + "lcd_lclk", + "lcd_sync", + "lcd_sys", +}; + +static const char * const lcd2_groups[] = { + "lcd2_data8", + "lcd2_data9", + "lcd2_data12", + "lcd2_data16", + "lcd2_data18", + "lcd2_data24", + "lcd2_sync_0", + "lcd2_sync_1", + "lcd2_sys_0", + "lcd2_sys_1", +}; + +static const char * const mmc0_groups[] = { + "mmc0_data1_0", + "mmc0_data4_0", + "mmc0_data8_0", + "mmc0_ctrl_0", + "mmc0_data1_1", + "mmc0_data4_1", + "mmc0_data8_1", + "mmc0_ctrl_1", +}; + +static const char * const scifa0_groups[] = { + "scifa0_data", + "scifa0_clk", + "scifa0_ctrl", +}; + +static const char * const scifa1_groups[] = { + "scifa1_data", + "scifa1_clk", + "scifa1_ctrl", +}; + +static const char * const scifa2_groups[] = { + "scifa2_data_0", + "scifa2_clk_0", + "scifa2_ctrl_0", + "scifa2_data_1", + "scifa2_clk_1", + "scifa2_ctrl_1", +}; + +static const char * const scifa3_groups[] = { + "scifa3_data", + "scifa3_ctrl", +}; + +static const char * const scifa4_groups[] = { + "scifa4_data", + "scifa4_ctrl", +}; + +static const char * const scifa5_groups[] = { + "scifa5_data_0", + "scifa5_clk_0", + "scifa5_ctrl_0", + "scifa5_data_1", + "scifa5_clk_1", + "scifa5_ctrl_1", + "scifa5_data_2", + "scifa5_clk_2", + "scifa5_ctrl_2", +}; + +static const char * const scifa6_groups[] = { + "scifa6", +}; + +static const char * const scifa7_groups[] = { + "scifa7_data", + "scifa7_ctrl", +}; + +static const char * const scifb_groups[] = { + "scifb_data_0", + "scifb_clk_0", + "scifb_ctrl_0", + "scifb_data_1", + "scifb_clk_1", + "scifb_ctrl_1", +}; + +static const char * const sdhi0_groups[] = { + "sdhi0_data1", + "sdhi0_data4", + "sdhi0_ctrl", + "sdhi0_cd", + "sdhi0_wp", +}; + +static const char * const sdhi1_groups[] = { + "sdhi1_data1", + "sdhi1_data4", + "sdhi1_ctrl", +}; + +static const char * const sdhi2_groups[] = { + "sdhi2_data1", + "sdhi2_data4", + "sdhi2_ctrl", +}; + +static const char * const usb_groups[] = { + "usb_vbus", +}; + +static const struct sh_pfc_function pinmux_functions[] = { + SH_PFC_FUNCTION(bsc), + SH_PFC_FUNCTION(fsia), + SH_PFC_FUNCTION(fsib), + SH_PFC_FUNCTION(fsic), + SH_PFC_FUNCTION(fsid), + SH_PFC_FUNCTION(i2c2), + SH_PFC_FUNCTION(i2c3), + SH_PFC_FUNCTION(irda), + SH_PFC_FUNCTION(keysc), + SH_PFC_FUNCTION(lcd), + SH_PFC_FUNCTION(lcd2), + SH_PFC_FUNCTION(mmc0), + SH_PFC_FUNCTION(scifa0), + SH_PFC_FUNCTION(scifa1), + SH_PFC_FUNCTION(scifa2), + SH_PFC_FUNCTION(scifa3), + SH_PFC_FUNCTION(scifa4), + SH_PFC_FUNCTION(scifa5), + SH_PFC_FUNCTION(scifa6), + SH_PFC_FUNCTION(scifa7), + SH_PFC_FUNCTION(scifb), + SH_PFC_FUNCTION(sdhi0), + SH_PFC_FUNCTION(sdhi1), + SH_PFC_FUNCTION(sdhi2), + SH_PFC_FUNCTION(usb), +}; + +#define PINMUX_FN_BASE GPIO_FN_GPI0 + +static const struct pinmux_func pinmux_func_gpios[] = { /* Table 25-1 (Functions 0-7) */ - GPIO_FN(VBUS_0), GPIO_FN(GPI0), GPIO_FN(GPI1), GPIO_FN(GPI2), @@ -1556,19 +2948,12 @@ static struct pinmux_gpio pinmux_gpios[] = { GPIO_FN(GPI5), GPIO_FN(GPI6), GPIO_FN(GPI7), - GPIO_FN(SCIFA7_RXD), - GPIO_FN(SCIFA7_CTS_), GPIO_FN(GPO7), \ GPIO_FN(MFG0_OUT2), GPIO_FN(GPO6), \ GPIO_FN(MFG1_OUT2), GPIO_FN(GPO5), \ - GPIO_FN(SCIFA0_SCK), \ - GPIO_FN(FSICOSLDT3), \ GPIO_FN(PORT16_VIO_CKOR), - GPIO_FN(SCIFA0_TXD), - GPIO_FN(SCIFA7_TXD), - GPIO_FN(SCIFA7_RTS_), \ GPIO_FN(PORT19_VIO_CKO2), GPIO_FN(GPO0), GPIO_FN(GPO1), @@ -1581,13 +2966,9 @@ static struct pinmux_gpio pinmux_gpios[] = { GPIO_FN(VINT), GPIO_FN(TCKON), GPIO_FN(XDVFS1), \ - GPIO_FN(PORT27_I2C_SCL2), \ - GPIO_FN(PORT27_I2C_SCL3), \ GPIO_FN(MFG0_OUT1), \ GPIO_FN(PORT27_IROUT), GPIO_FN(XDVFS2), \ - GPIO_FN(PORT28_I2C_SDA2), \ - GPIO_FN(PORT28_I2C_SDA3), \ GPIO_FN(PORT28_TPU1TO1), GPIO_FN(SIM_RST), \ GPIO_FN(PORT29_TPU1TO1), @@ -1595,140 +2976,53 @@ static struct pinmux_gpio pinmux_gpios[] = { GPIO_FN(PORT30_VIO_CKOR), GPIO_FN(SIM_D), \ GPIO_FN(PORT31_IROUT), - GPIO_FN(SCIFA4_TXD), - GPIO_FN(SCIFA4_RXD), \ GPIO_FN(XWUP), - GPIO_FN(SCIFA4_RTS_), - GPIO_FN(SCIFA4_CTS_), - GPIO_FN(FSIBOBT), \ - GPIO_FN(FSIBIBT), - GPIO_FN(FSIBOLR), \ - GPIO_FN(FSIBILR), - GPIO_FN(FSIBOSLD), - GPIO_FN(FSIBISLD), GPIO_FN(VACK), GPIO_FN(XTAL1L), - GPIO_FN(SCIFA0_RTS_), \ - GPIO_FN(FSICOSLDT2), - GPIO_FN(SCIFA0_RXD), - GPIO_FN(SCIFA0_CTS_), \ - GPIO_FN(FSICOSLDT1), - GPIO_FN(FSICOBT), \ - GPIO_FN(FSICIBT), \ - GPIO_FN(FSIDOBT), \ - GPIO_FN(FSIDIBT), - GPIO_FN(FSICOLR), \ - GPIO_FN(FSICILR), \ - GPIO_FN(FSIDOLR), \ - GPIO_FN(FSIDILR), - GPIO_FN(FSICOSLD), \ - GPIO_FN(PORT47_FSICSPDIF), - GPIO_FN(FSICISLD), \ - GPIO_FN(FSIDISLD), - GPIO_FN(FSIACK), \ - GPIO_FN(PORT49_IRDA_OUT), \ GPIO_FN(PORT49_IROUT), \ - GPIO_FN(FSIAOMC), - GPIO_FN(FSIAOLR), \ GPIO_FN(BBIF2_TSYNC2), \ GPIO_FN(TPU2TO2), \ - GPIO_FN(FSIAILR), - GPIO_FN(FSIAOBT), \ GPIO_FN(BBIF2_TSCK2), \ GPIO_FN(TPU2TO3), \ - GPIO_FN(FSIAIBT), - GPIO_FN(FSIAOSLD), \ GPIO_FN(BBIF2_TXD2), - GPIO_FN(FSIASPDIF), \ - GPIO_FN(PORT53_IRDA_IN), \ GPIO_FN(TPU3TO3), \ - GPIO_FN(FSIBSPDIF), \ - GPIO_FN(PORT53_FSICSPDIF), - GPIO_FN(FSIBCK), \ - GPIO_FN(PORT54_IRDA_FIRSEL), \ GPIO_FN(TPU3TO2), \ - GPIO_FN(FSIBOMC), \ - GPIO_FN(FSICCK), \ - GPIO_FN(FSICOMC), - GPIO_FN(FSIAISLD), \ GPIO_FN(TPU0TO0), GPIO_FN(A0), \ GPIO_FN(BS_), GPIO_FN(A12), \ - GPIO_FN(PORT58_KEYOUT7), \ GPIO_FN(TPU4TO2), GPIO_FN(A13), \ - GPIO_FN(PORT59_KEYOUT6), \ GPIO_FN(TPU0TO1), GPIO_FN(A14), \ - GPIO_FN(KEYOUT5), GPIO_FN(A15), \ - GPIO_FN(KEYOUT4), GPIO_FN(A16), \ - GPIO_FN(KEYOUT3), \ GPIO_FN(MSIOF0_SS1), GPIO_FN(A17), \ - GPIO_FN(KEYOUT2), \ GPIO_FN(MSIOF0_TSYNC), GPIO_FN(A18), \ - GPIO_FN(KEYOUT1), \ GPIO_FN(MSIOF0_TSCK), GPIO_FN(A19), \ - GPIO_FN(KEYOUT0), \ GPIO_FN(MSIOF0_TXD), GPIO_FN(A20), \ - GPIO_FN(KEYIN0), \ GPIO_FN(MSIOF0_RSCK), GPIO_FN(A21), \ - GPIO_FN(KEYIN1), \ GPIO_FN(MSIOF0_RSYNC), GPIO_FN(A22), \ - GPIO_FN(KEYIN2), \ GPIO_FN(MSIOF0_MCK0), GPIO_FN(A23), \ - GPIO_FN(KEYIN3), \ GPIO_FN(MSIOF0_MCK1), GPIO_FN(A24), \ - GPIO_FN(KEYIN4), \ GPIO_FN(MSIOF0_RXD), GPIO_FN(A25), \ - GPIO_FN(KEYIN5), \ GPIO_FN(MSIOF0_SS2), GPIO_FN(A26), \ - GPIO_FN(KEYIN6), - GPIO_FN(KEYIN7), - GPIO_FN(D0_NAF0), - GPIO_FN(D1_NAF1), - GPIO_FN(D2_NAF2), - GPIO_FN(D3_NAF3), - GPIO_FN(D4_NAF4), - GPIO_FN(D5_NAF5), - GPIO_FN(D6_NAF6), - GPIO_FN(D7_NAF7), - GPIO_FN(D8_NAF8), - GPIO_FN(D9_NAF9), - GPIO_FN(D10_NAF10), - GPIO_FN(D11_NAF11), - GPIO_FN(D12_NAF12), - GPIO_FN(D13_NAF13), - GPIO_FN(D14_NAF14), - GPIO_FN(D15_NAF15), - GPIO_FN(CS4_), - GPIO_FN(CS5A_), \ - GPIO_FN(PORT91_RDWR), - GPIO_FN(CS5B_), \ GPIO_FN(FCE1_), - GPIO_FN(CS6B_), \ GPIO_FN(DACK0), GPIO_FN(FCE0_), \ - GPIO_FN(CS6A_), GPIO_FN(WAIT_), \ GPIO_FN(DREQ0), - GPIO_FN(RD__FSC), - GPIO_FN(WE0__FWE), \ - GPIO_FN(RDWR_FWE), - GPIO_FN(WE1_), GPIO_FN(FRB), GPIO_FN(CKO), GPIO_FN(NBRSTOUT_), @@ -1737,14 +3031,10 @@ static struct pinmux_gpio pinmux_gpios[] = { GPIO_FN(BBIF2_RXD), GPIO_FN(BBIF2_SYNC), GPIO_FN(BBIF2_SCK), - GPIO_FN(SCIFA3_CTS_), \ GPIO_FN(MFG3_IN2), - GPIO_FN(SCIFA3_RXD), \ GPIO_FN(MFG3_IN1), GPIO_FN(BBIF1_SS2), \ - GPIO_FN(SCIFA3_RTS_), \ GPIO_FN(MFG3_OUT1), - GPIO_FN(SCIFA3_TXD), GPIO_FN(HSI_RX_DATA), \ GPIO_FN(BBIF1_RXD), GPIO_FN(HSI_TX_WAKE), \ @@ -1755,103 +3045,57 @@ static struct pinmux_gpio pinmux_gpios[] = { GPIO_FN(BBIF1_TXD), GPIO_FN(HSI_RX_READY), \ GPIO_FN(BBIF1_RSCK), \ - GPIO_FN(PORT115_I2C_SCL2), \ - GPIO_FN(PORT115_I2C_SCL3), GPIO_FN(HSI_RX_WAKE), \ GPIO_FN(BBIF1_RSYNC), \ - GPIO_FN(PORT116_I2C_SDA2), \ - GPIO_FN(PORT116_I2C_SDA3), GPIO_FN(HSI_RX_FLAG), \ GPIO_FN(BBIF1_SS1), \ GPIO_FN(BBIF1_FLOW), GPIO_FN(HSI_TX_FLAG), GPIO_FN(VIO_VD), \ - GPIO_FN(PORT128_LCD2VSYN), \ GPIO_FN(VIO2_VD), \ - GPIO_FN(LCD2D0), GPIO_FN(VIO_HD), \ - GPIO_FN(PORT129_LCD2HSYN), \ - GPIO_FN(PORT129_LCD2CS_), \ GPIO_FN(VIO2_HD), \ - GPIO_FN(LCD2D1), GPIO_FN(VIO_D0), \ GPIO_FN(PORT130_MSIOF2_RXD), \ - GPIO_FN(LCD2D10), GPIO_FN(VIO_D1), \ - GPIO_FN(PORT131_KEYOUT6), \ GPIO_FN(PORT131_MSIOF2_SS1), \ - GPIO_FN(PORT131_KEYOUT11), \ - GPIO_FN(LCD2D11), GPIO_FN(VIO_D2), \ - GPIO_FN(PORT132_KEYOUT7), \ GPIO_FN(PORT132_MSIOF2_SS2), \ - GPIO_FN(PORT132_KEYOUT10), \ - GPIO_FN(LCD2D12), GPIO_FN(VIO_D3), \ GPIO_FN(MSIOF2_TSYNC), \ - GPIO_FN(LCD2D13), GPIO_FN(VIO_D4), \ GPIO_FN(MSIOF2_TXD), \ - GPIO_FN(LCD2D14), GPIO_FN(VIO_D5), \ GPIO_FN(MSIOF2_TSCK), \ - GPIO_FN(LCD2D15), GPIO_FN(VIO_D6), \ - GPIO_FN(PORT136_KEYOUT8), \ - GPIO_FN(LCD2D16), GPIO_FN(VIO_D7), \ - GPIO_FN(PORT137_KEYOUT9), \ - GPIO_FN(LCD2D17), GPIO_FN(VIO_D8), \ - GPIO_FN(PORT138_KEYOUT8), \ GPIO_FN(VIO2_D0), \ - GPIO_FN(LCD2D6), GPIO_FN(VIO_D9), \ - GPIO_FN(PORT139_KEYOUT9), \ GPIO_FN(VIO2_D1), \ - GPIO_FN(LCD2D7), GPIO_FN(VIO_D10), \ GPIO_FN(TPU0TO2), \ GPIO_FN(VIO2_D2), \ - GPIO_FN(LCD2D8), GPIO_FN(VIO_D11), \ GPIO_FN(TPU0TO3), \ GPIO_FN(VIO2_D3), \ - GPIO_FN(LCD2D9), GPIO_FN(VIO_D12), \ - GPIO_FN(PORT142_KEYOUT10), \ GPIO_FN(VIO2_D4), \ - GPIO_FN(LCD2D2), GPIO_FN(VIO_D13), \ - GPIO_FN(PORT143_KEYOUT11), \ - GPIO_FN(PORT143_KEYOUT6), \ GPIO_FN(VIO2_D5), \ - GPIO_FN(LCD2D3), GPIO_FN(VIO_D14), \ - GPIO_FN(PORT144_KEYOUT7), \ GPIO_FN(VIO2_D6), \ - GPIO_FN(LCD2D4), GPIO_FN(VIO_D15), \ GPIO_FN(TPU1TO3), \ - GPIO_FN(PORT145_LCD2DISP), \ - GPIO_FN(PORT145_LCD2RS), \ GPIO_FN(VIO2_D7), \ - GPIO_FN(LCD2D5), GPIO_FN(VIO_CLK), \ - GPIO_FN(LCD2DCK), \ - GPIO_FN(PORT146_LCD2WR_), \ GPIO_FN(VIO2_CLK), \ - GPIO_FN(LCD2D18), GPIO_FN(VIO_FIELD), \ - GPIO_FN(LCD2RD_), \ GPIO_FN(VIO2_FIELD), \ - GPIO_FN(LCD2D19), GPIO_FN(VIO_CKO), GPIO_FN(A27), \ - GPIO_FN(PORT149_RDWR), \ GPIO_FN(MFG0_IN1), \ - GPIO_FN(PORT149_KEYOUT9), GPIO_FN(MFG0_IN2), GPIO_FN(TS_SPSYNC3), \ GPIO_FN(MSIOF2_RSCK), @@ -1860,201 +3104,105 @@ static struct pinmux_gpio pinmux_gpios[] = { GPIO_FN(TPU1TO2), \ GPIO_FN(TS_SDEN3), \ GPIO_FN(PORT153_MSIOF2_SS1), - GPIO_FN(SCIFA2_TXD1), \ GPIO_FN(MSIOF2_MCK0), - GPIO_FN(SCIFA2_RXD1), \ GPIO_FN(MSIOF2_MCK1), - GPIO_FN(SCIFA2_RTS1_), \ GPIO_FN(PORT156_MSIOF2_SS2), - GPIO_FN(SCIFA2_CTS1_), \ GPIO_FN(PORT157_MSIOF2_RXD), GPIO_FN(DINT_), \ - GPIO_FN(SCIFA2_SCK1), \ GPIO_FN(TS_SCK3), - GPIO_FN(PORT159_SCIFB_SCK), \ - GPIO_FN(PORT159_SCIFA5_SCK), \ GPIO_FN(NMI), - GPIO_FN(PORT160_SCIFB_TXD), \ - GPIO_FN(PORT160_SCIFA5_TXD), - GPIO_FN(PORT161_SCIFB_CTS_), \ - GPIO_FN(PORT161_SCIFA5_CTS_), - GPIO_FN(PORT162_SCIFB_RXD), \ - GPIO_FN(PORT162_SCIFA5_RXD), - GPIO_FN(PORT163_SCIFB_RTS_), \ - GPIO_FN(PORT163_SCIFA5_RTS_), \ GPIO_FN(TPU3TO0), - GPIO_FN(LCDD0), - GPIO_FN(LCDD1), \ - GPIO_FN(PORT193_SCIFA5_CTS_), \ GPIO_FN(BBIF2_TSYNC1), - GPIO_FN(LCDD2), \ - GPIO_FN(PORT194_SCIFA5_RTS_), \ GPIO_FN(BBIF2_TSCK1), - GPIO_FN(LCDD3), \ - GPIO_FN(PORT195_SCIFA5_RXD), \ GPIO_FN(BBIF2_TXD1), - GPIO_FN(LCDD4), \ - GPIO_FN(PORT196_SCIFA5_TXD), - GPIO_FN(LCDD5), \ - GPIO_FN(PORT197_SCIFA5_SCK), \ GPIO_FN(MFG2_OUT2), \ GPIO_FN(TPU2TO1), - GPIO_FN(LCDD6), - GPIO_FN(LCDD7), \ GPIO_FN(TPU4TO1), \ GPIO_FN(MFG4_OUT2), - GPIO_FN(LCDD8), \ GPIO_FN(D16), - GPIO_FN(LCDD9), \ GPIO_FN(D17), - GPIO_FN(LCDD10), \ GPIO_FN(D18), - GPIO_FN(LCDD11), \ GPIO_FN(D19), - GPIO_FN(LCDD12), \ GPIO_FN(D20), - GPIO_FN(LCDD13), \ GPIO_FN(D21), - GPIO_FN(LCDD14), \ GPIO_FN(D22), - GPIO_FN(LCDD15), \ GPIO_FN(PORT207_MSIOF0L_SS1), \ GPIO_FN(D23), - GPIO_FN(LCDD16), \ GPIO_FN(PORT208_MSIOF0L_SS2), \ GPIO_FN(D24), - GPIO_FN(LCDD17), \ GPIO_FN(D25), - GPIO_FN(LCDD18), \ GPIO_FN(DREQ2), \ GPIO_FN(PORT210_MSIOF0L_SS1), \ GPIO_FN(D26), - GPIO_FN(LCDD19), \ GPIO_FN(PORT211_MSIOF0L_SS2), \ GPIO_FN(D27), - GPIO_FN(LCDD20), \ GPIO_FN(TS_SPSYNC1), \ GPIO_FN(MSIOF0L_MCK0), \ GPIO_FN(D28), - GPIO_FN(LCDD21), \ GPIO_FN(TS_SDAT1), \ GPIO_FN(MSIOF0L_MCK1), \ GPIO_FN(D29), - GPIO_FN(LCDD22), \ GPIO_FN(TS_SDEN1), \ GPIO_FN(MSIOF0L_RSCK), \ GPIO_FN(D30), - GPIO_FN(LCDD23), \ GPIO_FN(TS_SCK1), \ GPIO_FN(MSIOF0L_RSYNC), \ GPIO_FN(D31), - GPIO_FN(LCDDCK), \ - GPIO_FN(LCDWR_), - GPIO_FN(LCDRD_), \ GPIO_FN(DACK2), \ - GPIO_FN(PORT217_LCD2RS), \ GPIO_FN(MSIOF0L_TSYNC), \ GPIO_FN(VIO2_FIELD3), \ - GPIO_FN(PORT217_LCD2DISP), - GPIO_FN(LCDHSYN), \ - GPIO_FN(LCDCS_), \ - GPIO_FN(LCDCS2_), \ GPIO_FN(DACK3), \ GPIO_FN(PORT218_VIO_CKOR), - GPIO_FN(LCDDISP), \ - GPIO_FN(LCDRS), \ - GPIO_FN(PORT219_LCD2WR_), \ GPIO_FN(DREQ3), \ GPIO_FN(MSIOF0L_TSCK), \ GPIO_FN(VIO2_CLK3), \ - GPIO_FN(LCD2DCK_2), - GPIO_FN(LCDVSYN), \ - GPIO_FN(LCDVSYN2), - GPIO_FN(LCDLCLK), \ GPIO_FN(DREQ1), \ - GPIO_FN(PORT221_LCD2CS_), \ GPIO_FN(PWEN), \ GPIO_FN(MSIOF0L_RXD), \ GPIO_FN(VIO2_HD3), \ - GPIO_FN(PORT221_LCD2HSYN), - GPIO_FN(LCDDON), \ - GPIO_FN(LCDDON2), \ GPIO_FN(DACK1), \ GPIO_FN(OVCN), \ GPIO_FN(MSIOF0L_TXD), \ GPIO_FN(VIO2_VD3), \ - GPIO_FN(PORT222_LCD2VSYN), - GPIO_FN(SCIFA1_TXD), \ GPIO_FN(OVCN2), GPIO_FN(EXTLP), \ - GPIO_FN(SCIFA1_SCK), \ GPIO_FN(PORT226_VIO_CKO2), - GPIO_FN(SCIFA1_RTS_), \ GPIO_FN(IDIN), - GPIO_FN(SCIFA1_RXD), - GPIO_FN(SCIFA1_CTS_), \ GPIO_FN(MFG1_IN1), GPIO_FN(MSIOF1_TXD), \ - GPIO_FN(SCIFA2_TXD2), GPIO_FN(MSIOF1_TSYNC), \ - GPIO_FN(SCIFA2_CTS2_), GPIO_FN(MSIOF1_TSCK), \ - GPIO_FN(SCIFA2_SCK2), GPIO_FN(MSIOF1_RXD), \ - GPIO_FN(SCIFA2_RXD2), GPIO_FN(MSIOF1_RSCK), \ - GPIO_FN(SCIFA2_RTS2_), \ GPIO_FN(VIO2_CLK2), \ - GPIO_FN(LCD2D20), GPIO_FN(MSIOF1_RSYNC), \ GPIO_FN(MFG1_IN2), \ GPIO_FN(VIO2_VD2), \ - GPIO_FN(LCD2D21), GPIO_FN(MSIOF1_MCK0), \ - GPIO_FN(PORT236_I2C_SDA2), GPIO_FN(MSIOF1_MCK1), \ - GPIO_FN(PORT237_I2C_SCL2), GPIO_FN(MSIOF1_SS1), \ GPIO_FN(VIO2_FIELD2), \ - GPIO_FN(LCD2D22), GPIO_FN(MSIOF1_SS2), \ GPIO_FN(VIO2_HD2), \ - GPIO_FN(LCD2D23), - GPIO_FN(SCIFA6_TXD), - GPIO_FN(PORT241_IRDA_OUT), \ GPIO_FN(PORT241_IROUT), \ GPIO_FN(MFG4_OUT1), \ GPIO_FN(TPU4TO0), - GPIO_FN(PORT242_IRDA_IN), \ GPIO_FN(MFG4_IN2), - GPIO_FN(PORT243_IRDA_FIRSEL), \ GPIO_FN(PORT243_VIO_CKO2), - GPIO_FN(PORT244_SCIFA5_CTS_), \ GPIO_FN(MFG2_IN1), \ - GPIO_FN(PORT244_SCIFB_CTS_), \ GPIO_FN(MSIOF2R_RXD), - GPIO_FN(PORT245_SCIFA5_RTS_), \ GPIO_FN(MFG2_IN2), \ - GPIO_FN(PORT245_SCIFB_RTS_), \ GPIO_FN(MSIOF2R_TXD), - GPIO_FN(PORT246_SCIFA5_RXD), \ GPIO_FN(MFG1_OUT1), \ - GPIO_FN(PORT246_SCIFB_RXD), \ GPIO_FN(TPU1TO0), - GPIO_FN(PORT247_SCIFA5_TXD), \ GPIO_FN(MFG3_OUT2), \ - GPIO_FN(PORT247_SCIFB_TXD), \ GPIO_FN(TPU3TO1), - GPIO_FN(PORT248_SCIFA5_SCK), \ GPIO_FN(MFG2_OUT1), \ - GPIO_FN(PORT248_SCIFB_SCK), \ GPIO_FN(TPU2TO0), \ - GPIO_FN(PORT248_I2C_SCL3), \ GPIO_FN(MSIOF2R_TSCK), GPIO_FN(PORT249_IROUT), \ GPIO_FN(MFG4_IN1), \ - GPIO_FN(PORT249_I2C_SDA3), \ GPIO_FN(MSIOF2R_TSYNC), GPIO_FN(SDHICLK0), GPIO_FN(SDHICD0), @@ -2172,56 +3320,24 @@ static struct pinmux_gpio pinmux_gpios[] = { GPIO_FN(IRQ9_MEM_INT), GPIO_FN(IRQ9_MCP_INT), GPIO_FN(A11), - GPIO_FN(KEYOUT8), GPIO_FN(TPU4TO3), GPIO_FN(RESETA_N_PU_ON), GPIO_FN(RESETA_N_PU_OFF), GPIO_FN(EDBGREQ_PD), GPIO_FN(EDBGREQ_PU), +}; - /* Functions with pull-ups */ - GPIO_FN(KEYIN0_PU), - GPIO_FN(KEYIN1_PU), - GPIO_FN(KEYIN2_PU), - GPIO_FN(KEYIN3_PU), - GPIO_FN(KEYIN4_PU), - GPIO_FN(KEYIN5_PU), - GPIO_FN(KEYIN6_PU), - GPIO_FN(KEYIN7_PU), - GPIO_FN(SDHICD0_PU), - GPIO_FN(SDHID0_0_PU), - GPIO_FN(SDHID0_1_PU), - GPIO_FN(SDHID0_2_PU), - GPIO_FN(SDHID0_3_PU), - GPIO_FN(SDHICMD0_PU), - GPIO_FN(SDHIWP0_PU), - GPIO_FN(SDHID1_0_PU), - GPIO_FN(SDHID1_1_PU), - GPIO_FN(SDHID1_2_PU), - GPIO_FN(SDHID1_3_PU), - GPIO_FN(SDHICMD1_PU), - GPIO_FN(SDHID2_0_PU), - GPIO_FN(SDHID2_1_PU), - GPIO_FN(SDHID2_2_PU), - GPIO_FN(SDHID2_3_PU), - GPIO_FN(SDHICMD2_PU), - GPIO_FN(MMCCMD0_PU), - GPIO_FN(MMCCMD1_PU), - GPIO_FN(MMCD0_0_PU), - GPIO_FN(MMCD0_1_PU), - GPIO_FN(MMCD0_2_PU), - GPIO_FN(MMCD0_3_PU), - GPIO_FN(MMCD0_4_PU), - GPIO_FN(MMCD0_5_PU), - GPIO_FN(MMCD0_6_PU), - GPIO_FN(MMCD0_7_PU), - GPIO_FN(FSIACK_PU), - GPIO_FN(FSIAILR_PU), - GPIO_FN(FSIAIBT_PU), - GPIO_FN(FSIAISLD_PU), -}; - -static struct pinmux_cfg_reg pinmux_config_regs[] = { +#undef PORTCR +#define PORTCR(nr, reg) \ + { \ + PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \ + _PCRH(PORT##nr##_IN, 0, 0, PORT##nr##_OUT), \ + PORT##nr##_FN0, PORT##nr##_FN1, \ + PORT##nr##_FN2, PORT##nr##_FN3, \ + PORT##nr##_FN4, PORT##nr##_FN5, \ + PORT##nr##_FN6, PORT##nr##_FN7 } \ + } +static const struct pinmux_cfg_reg pinmux_config_regs[] = { PORTCR(0, 0xe6050000), /* PORT0CR */ PORTCR(1, 0xe6050001), /* PORT1CR */ PORTCR(2, 0xe6050002), /* PORT2CR */ @@ -2629,7 +3745,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { { }, }; -static struct pinmux_data_reg pinmux_data_regs[] = { +static const struct pinmux_data_reg pinmux_data_regs[] = { { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32) { PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA, PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA, @@ -2737,56 +3853,112 @@ static struct pinmux_data_reg pinmux_data_regs[] = { #define EXT_IRQ16L(n) irq_pin(n) #define EXT_IRQ16H(n) irq_pin(n) -static struct pinmux_irq pinmux_irqs[] = { - PINMUX_IRQ(EXT_IRQ16H(19), PORT9_FN0), - PINMUX_IRQ(EXT_IRQ16L(1), PORT10_FN0), - PINMUX_IRQ(EXT_IRQ16L(0), PORT11_FN0), - PINMUX_IRQ(EXT_IRQ16H(18), PORT13_FN0), - PINMUX_IRQ(EXT_IRQ16H(20), PORT14_FN0), - PINMUX_IRQ(EXT_IRQ16H(21), PORT15_FN0), - PINMUX_IRQ(EXT_IRQ16H(31), PORT26_FN0), - PINMUX_IRQ(EXT_IRQ16H(30), PORT27_FN0), - PINMUX_IRQ(EXT_IRQ16H(29), PORT28_FN0), - PINMUX_IRQ(EXT_IRQ16H(22), PORT40_FN0), - PINMUX_IRQ(EXT_IRQ16H(23), PORT53_FN0), - PINMUX_IRQ(EXT_IRQ16L(10), PORT54_FN0), - PINMUX_IRQ(EXT_IRQ16L(9), PORT56_FN0), - PINMUX_IRQ(EXT_IRQ16H(26), PORT115_FN0), - PINMUX_IRQ(EXT_IRQ16H(27), PORT116_FN0), - PINMUX_IRQ(EXT_IRQ16H(28), PORT117_FN0), - PINMUX_IRQ(EXT_IRQ16H(24), PORT118_FN0), - PINMUX_IRQ(EXT_IRQ16L(6), PORT147_FN0), - PINMUX_IRQ(EXT_IRQ16L(2), PORT149_FN0), - PINMUX_IRQ(EXT_IRQ16L(7), PORT150_FN0), - PINMUX_IRQ(EXT_IRQ16L(12), PORT156_FN0), - PINMUX_IRQ(EXT_IRQ16L(4), PORT159_FN0), - PINMUX_IRQ(EXT_IRQ16H(25), PORT164_FN0), - PINMUX_IRQ(EXT_IRQ16L(8), PORT223_FN0), - PINMUX_IRQ(EXT_IRQ16L(3), PORT224_FN0), - PINMUX_IRQ(EXT_IRQ16L(5), PORT227_FN0), - PINMUX_IRQ(EXT_IRQ16H(17), PORT234_FN0), - PINMUX_IRQ(EXT_IRQ16L(11), PORT238_FN0), - PINMUX_IRQ(EXT_IRQ16L(13), PORT239_FN0), - PINMUX_IRQ(EXT_IRQ16H(16), PORT249_FN0), - PINMUX_IRQ(EXT_IRQ16L(14), PORT251_FN0), - PINMUX_IRQ(EXT_IRQ16L(9), PORT308_FN0), -}; - -struct sh_pfc_soc_info sh73a0_pinmux_info = { +static const struct pinmux_irq pinmux_irqs[] = { + PINMUX_IRQ(EXT_IRQ16H(19), 9), + PINMUX_IRQ(EXT_IRQ16L(1), 10), + PINMUX_IRQ(EXT_IRQ16L(0), 11), + PINMUX_IRQ(EXT_IRQ16H(18), 13), + PINMUX_IRQ(EXT_IRQ16H(20), 14), + PINMUX_IRQ(EXT_IRQ16H(21), 15), + PINMUX_IRQ(EXT_IRQ16H(31), 26), + PINMUX_IRQ(EXT_IRQ16H(30), 27), + PINMUX_IRQ(EXT_IRQ16H(29), 28), + PINMUX_IRQ(EXT_IRQ16H(22), 40), + PINMUX_IRQ(EXT_IRQ16H(23), 53), + PINMUX_IRQ(EXT_IRQ16L(10), 54), + PINMUX_IRQ(EXT_IRQ16L(9), 56), + PINMUX_IRQ(EXT_IRQ16H(26), 115), + PINMUX_IRQ(EXT_IRQ16H(27), 116), + PINMUX_IRQ(EXT_IRQ16H(28), 117), + PINMUX_IRQ(EXT_IRQ16H(24), 118), + PINMUX_IRQ(EXT_IRQ16L(6), 147), + PINMUX_IRQ(EXT_IRQ16L(2), 149), + PINMUX_IRQ(EXT_IRQ16L(7), 150), + PINMUX_IRQ(EXT_IRQ16L(12), 156), + PINMUX_IRQ(EXT_IRQ16L(4), 159), + PINMUX_IRQ(EXT_IRQ16H(25), 164), + PINMUX_IRQ(EXT_IRQ16L(8), 223), + PINMUX_IRQ(EXT_IRQ16L(3), 224), + PINMUX_IRQ(EXT_IRQ16L(5), 227), + PINMUX_IRQ(EXT_IRQ16H(17), 234), + PINMUX_IRQ(EXT_IRQ16L(11), 238), + PINMUX_IRQ(EXT_IRQ16L(13), 239), + PINMUX_IRQ(EXT_IRQ16H(16), 249), + PINMUX_IRQ(EXT_IRQ16L(14), 251), + PINMUX_IRQ(EXT_IRQ16L(9), 308), +}; + +#define PORTnCR_PULMD_OFF (0 << 6) +#define PORTnCR_PULMD_DOWN (2 << 6) +#define PORTnCR_PULMD_UP (3 << 6) +#define PORTnCR_PULMD_MASK (3 << 6) + +static const unsigned int sh73a0_portcr_offsets[] = { + 0x00000000, 0x00001000, 0x00001000, 0x00002000, 0x00002000, + 0x00002000, 0x00002000, 0x00003000, 0x00003000, 0x00002000, +}; + +static unsigned int sh73a0_pinmux_get_bias(struct sh_pfc *pfc, unsigned int pin) +{ + void __iomem *addr = pfc->window->virt + + sh73a0_portcr_offsets[pin >> 5] + pin; + u32 value = ioread8(addr) & PORTnCR_PULMD_MASK; + + switch (value) { + case PORTnCR_PULMD_UP: + return PIN_CONFIG_BIAS_PULL_UP; + case PORTnCR_PULMD_DOWN: + return PIN_CONFIG_BIAS_PULL_DOWN; + case PORTnCR_PULMD_OFF: + default: + return PIN_CONFIG_BIAS_DISABLE; + } +} + +static void sh73a0_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin, + unsigned int bias) +{ + void __iomem *addr = pfc->window->virt + + sh73a0_portcr_offsets[pin >> 5] + pin; + u32 value = ioread8(addr) & ~PORTnCR_PULMD_MASK; + + switch (bias) { + case PIN_CONFIG_BIAS_PULL_UP: + value |= PORTnCR_PULMD_UP; + break; + case PIN_CONFIG_BIAS_PULL_DOWN: + value |= PORTnCR_PULMD_DOWN; + break; + } + + iowrite8(value, addr); +} + +static const struct sh_pfc_soc_operations sh73a0_pinmux_ops = { + .get_bias = sh73a0_pinmux_get_bias, + .set_bias = sh73a0_pinmux_set_bias, +}; + +const struct sh_pfc_soc_info sh73a0_pinmux_info = { .name = "sh73a0_pfc", - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, + .ops = &sh73a0_pinmux_ops, + .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, - .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, - .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END }, .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - .first_gpio = GPIO_PORT0, - .last_gpio = GPIO_FN_FSIAISLD_PU, + .pins = pinmux_pins, + .nr_pins = ARRAY_SIZE(pinmux_pins), + .ranges = pinmux_ranges, + .nr_ranges = ARRAY_SIZE(pinmux_ranges), + .groups = pinmux_groups, + .nr_groups = ARRAY_SIZE(pinmux_groups), + .functions = pinmux_functions, + .nr_functions = ARRAY_SIZE(pinmux_functions), + + .func_gpios = pinmux_func_gpios, + .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios), - .gpios = pinmux_gpios, .cfg_regs = pinmux_config_regs, .data_regs = pinmux_data_regs, diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7720.c b/drivers/pinctrl/sh-pfc/pfc-sh7720.c index 10872ed688a6..52e9f6be665f 100644 --- a/drivers/pinctrl/sh-pfc/pfc-sh7720.c +++ b/drivers/pinctrl/sh-pfc/pfc-sh7720.c @@ -262,7 +262,7 @@ enum { PINMUX_MARK_END, }; -static pinmux_enum_t pinmux_data[] = { +static const pinmux_enum_t pinmux_data[] = { /* PTA GPIO */ PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT, PTA7_IN_PU), PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT, PTA6_IN_PU), @@ -606,7 +606,7 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_DATA(SIM_CLK_MARK, PSELD_1_0_10, PTV0_FN), }; -static struct pinmux_gpio pinmux_gpios[] = { +static struct sh_pfc_pin pinmux_pins[] = { /* PTA */ PINMUX_GPIO(GPIO_PTA7, PTA7_DATA), PINMUX_GPIO(GPIO_PTA6, PTA6_DATA), @@ -759,202 +759,205 @@ static struct pinmux_gpio pinmux_gpios[] = { PINMUX_GPIO(GPIO_PTV2, PTV2_DATA), PINMUX_GPIO(GPIO_PTV1, PTV1_DATA), PINMUX_GPIO(GPIO_PTV0, PTV0_DATA), +}; + +#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) +static const struct pinmux_func pinmux_func_gpios[] = { /* BSC */ - PINMUX_GPIO(GPIO_FN_D31, D31_MARK), - PINMUX_GPIO(GPIO_FN_D30, D30_MARK), - PINMUX_GPIO(GPIO_FN_D29, D29_MARK), - PINMUX_GPIO(GPIO_FN_D28, D28_MARK), - PINMUX_GPIO(GPIO_FN_D27, D27_MARK), - PINMUX_GPIO(GPIO_FN_D26, D26_MARK), - PINMUX_GPIO(GPIO_FN_D25, D25_MARK), - PINMUX_GPIO(GPIO_FN_D24, D24_MARK), - PINMUX_GPIO(GPIO_FN_D23, D23_MARK), - PINMUX_GPIO(GPIO_FN_D22, D22_MARK), - PINMUX_GPIO(GPIO_FN_D21, D21_MARK), - PINMUX_GPIO(GPIO_FN_D20, D20_MARK), - PINMUX_GPIO(GPIO_FN_D19, D19_MARK), - PINMUX_GPIO(GPIO_FN_D18, D18_MARK), - PINMUX_GPIO(GPIO_FN_D17, D17_MARK), - PINMUX_GPIO(GPIO_FN_D16, D16_MARK), - PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK), - PINMUX_GPIO(GPIO_FN_RAS, RAS_MARK), - PINMUX_GPIO(GPIO_FN_CAS, CAS_MARK), - PINMUX_GPIO(GPIO_FN_CKE, CKE_MARK), - PINMUX_GPIO(GPIO_FN_CS5B_CE1A, CS5B_CE1A_MARK), - PINMUX_GPIO(GPIO_FN_CS6B_CE1B, CS6B_CE1B_MARK), - PINMUX_GPIO(GPIO_FN_A25, A25_MARK), - PINMUX_GPIO(GPIO_FN_A24, A24_MARK), - PINMUX_GPIO(GPIO_FN_A23, A23_MARK), - PINMUX_GPIO(GPIO_FN_A22, A22_MARK), - PINMUX_GPIO(GPIO_FN_A21, A21_MARK), - PINMUX_GPIO(GPIO_FN_A20, A20_MARK), - PINMUX_GPIO(GPIO_FN_A19, A19_MARK), - PINMUX_GPIO(GPIO_FN_A0, A0_MARK), - PINMUX_GPIO(GPIO_FN_REFOUT, REFOUT_MARK), - PINMUX_GPIO(GPIO_FN_IRQOUT, IRQOUT_MARK), + GPIO_FN(D31), + GPIO_FN(D30), + GPIO_FN(D29), + GPIO_FN(D28), + GPIO_FN(D27), + GPIO_FN(D26), + GPIO_FN(D25), + GPIO_FN(D24), + GPIO_FN(D23), + GPIO_FN(D22), + GPIO_FN(D21), + GPIO_FN(D20), + GPIO_FN(D19), + GPIO_FN(D18), + GPIO_FN(D17), + GPIO_FN(D16), + GPIO_FN(IOIS16), + GPIO_FN(RAS), + GPIO_FN(CAS), + GPIO_FN(CKE), + GPIO_FN(CS5B_CE1A), + GPIO_FN(CS6B_CE1B), + GPIO_FN(A25), + GPIO_FN(A24), + GPIO_FN(A23), + GPIO_FN(A22), + GPIO_FN(A21), + GPIO_FN(A20), + GPIO_FN(A19), + GPIO_FN(A0), + GPIO_FN(REFOUT), + GPIO_FN(IRQOUT), /* LCDC */ - PINMUX_GPIO(GPIO_FN_LCD_DATA15, LCD_DATA15_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA14, LCD_DATA14_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA13, LCD_DATA13_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA12, LCD_DATA12_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA11, LCD_DATA11_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA10, LCD_DATA10_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA9, LCD_DATA9_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA8, LCD_DATA8_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA7, LCD_DATA7_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA6, LCD_DATA6_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA5, LCD_DATA5_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA4, LCD_DATA4_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA3, LCD_DATA3_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA2, LCD_DATA2_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA1, LCD_DATA1_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DATA0, LCD_DATA0_MARK), - PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK), - PINMUX_GPIO(GPIO_FN_LCD_CL1, LCD_CL1_MARK), - PINMUX_GPIO(GPIO_FN_LCD_CL2, LCD_CL2_MARK), - PINMUX_GPIO(GPIO_FN_LCD_DON, LCD_DON_MARK), - PINMUX_GPIO(GPIO_FN_LCD_FLM, LCD_FLM_MARK), - PINMUX_GPIO(GPIO_FN_LCD_VEPWC, LCD_VEPWC_MARK), - PINMUX_GPIO(GPIO_FN_LCD_VCPWC, LCD_VCPWC_MARK), + GPIO_FN(LCD_DATA15), + GPIO_FN(LCD_DATA14), + GPIO_FN(LCD_DATA13), + GPIO_FN(LCD_DATA12), + GPIO_FN(LCD_DATA11), + GPIO_FN(LCD_DATA10), + GPIO_FN(LCD_DATA9), + GPIO_FN(LCD_DATA8), + GPIO_FN(LCD_DATA7), + GPIO_FN(LCD_DATA6), + GPIO_FN(LCD_DATA5), + GPIO_FN(LCD_DATA4), + GPIO_FN(LCD_DATA3), + GPIO_FN(LCD_DATA2), + GPIO_FN(LCD_DATA1), + GPIO_FN(LCD_DATA0), + GPIO_FN(LCD_M_DISP), + GPIO_FN(LCD_CL1), + GPIO_FN(LCD_CL2), + GPIO_FN(LCD_DON), + GPIO_FN(LCD_FLM), + GPIO_FN(LCD_VEPWC), + GPIO_FN(LCD_VCPWC), /* AFEIF */ - PINMUX_GPIO(GPIO_FN_AFE_RXIN, AFE_RXIN_MARK), - PINMUX_GPIO(GPIO_FN_AFE_RDET, AFE_RDET_MARK), - PINMUX_GPIO(GPIO_FN_AFE_FS, AFE_FS_MARK), - PINMUX_GPIO(GPIO_FN_AFE_TXOUT, AFE_TXOUT_MARK), - PINMUX_GPIO(GPIO_FN_AFE_SCLK, AFE_SCLK_MARK), - PINMUX_GPIO(GPIO_FN_AFE_RLYCNT, AFE_RLYCNT_MARK), - PINMUX_GPIO(GPIO_FN_AFE_HC1, AFE_HC1_MARK), + GPIO_FN(AFE_RXIN), + GPIO_FN(AFE_RDET), + GPIO_FN(AFE_FS), + GPIO_FN(AFE_TXOUT), + GPIO_FN(AFE_SCLK), + GPIO_FN(AFE_RLYCNT), + GPIO_FN(AFE_HC1), /* IIC */ - PINMUX_GPIO(GPIO_FN_IIC_SCL, IIC_SCL_MARK), - PINMUX_GPIO(GPIO_FN_IIC_SDA, IIC_SDA_MARK), + GPIO_FN(IIC_SCL), + GPIO_FN(IIC_SDA), /* DAC */ - PINMUX_GPIO(GPIO_FN_DA1, DA1_MARK), - PINMUX_GPIO(GPIO_FN_DA0, DA0_MARK), + GPIO_FN(DA1), + GPIO_FN(DA0), /* ADC */ - PINMUX_GPIO(GPIO_FN_AN3, AN3_MARK), - PINMUX_GPIO(GPIO_FN_AN2, AN2_MARK), - PINMUX_GPIO(GPIO_FN_AN1, AN1_MARK), - PINMUX_GPIO(GPIO_FN_AN0, AN0_MARK), - PINMUX_GPIO(GPIO_FN_ADTRG, ADTRG_MARK), + GPIO_FN(AN3), + GPIO_FN(AN2), + GPIO_FN(AN1), + GPIO_FN(AN0), + GPIO_FN(ADTRG), /* USB */ - PINMUX_GPIO(GPIO_FN_USB1D_RCV, USB1D_RCV_MARK), - PINMUX_GPIO(GPIO_FN_USB1D_TXSE0, USB1D_TXSE0_MARK), - PINMUX_GPIO(GPIO_FN_USB1D_TXDPLS, USB1D_TXDPLS_MARK), - PINMUX_GPIO(GPIO_FN_USB1D_DMNS, USB1D_DMNS_MARK), - PINMUX_GPIO(GPIO_FN_USB1D_DPLS, USB1D_DPLS_MARK), - PINMUX_GPIO(GPIO_FN_USB1D_SPEED, USB1D_SPEED_MARK), - PINMUX_GPIO(GPIO_FN_USB1D_TXENL, USB1D_TXENL_MARK), - - PINMUX_GPIO(GPIO_FN_USB2_PWR_EN, USB2_PWR_EN_MARK), - PINMUX_GPIO(GPIO_FN_USB1_PWR_EN_USBF_UPLUP, - USB1_PWR_EN_USBF_UPLUP_MARK), - PINMUX_GPIO(GPIO_FN_USB1D_SUSPEND, USB1D_SUSPEND_MARK), + GPIO_FN(USB1D_RCV), + GPIO_FN(USB1D_TXSE0), + GPIO_FN(USB1D_TXDPLS), + GPIO_FN(USB1D_DMNS), + GPIO_FN(USB1D_DPLS), + GPIO_FN(USB1D_SPEED), + GPIO_FN(USB1D_TXENL), + + GPIO_FN(USB2_PWR_EN), + GPIO_FN(USB1_PWR_EN_USBF_UPLUP), + GPIO_FN(USB1D_SUSPEND), /* INTC */ - PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK), - PINMUX_GPIO(GPIO_FN_IRQ4, IRQ4_MARK), - PINMUX_GPIO(GPIO_FN_IRQ3_IRL3, IRQ3_IRL3_MARK), - PINMUX_GPIO(GPIO_FN_IRQ2_IRL2, IRQ2_IRL2_MARK), - PINMUX_GPIO(GPIO_FN_IRQ1_IRL1, IRQ1_IRL1_MARK), - PINMUX_GPIO(GPIO_FN_IRQ0_IRL0, IRQ0_IRL0_MARK), + GPIO_FN(IRQ5), + GPIO_FN(IRQ4), + GPIO_FN(IRQ3_IRL3), + GPIO_FN(IRQ2_IRL2), + GPIO_FN(IRQ1_IRL1), + GPIO_FN(IRQ0_IRL0), /* PCC */ - PINMUX_GPIO(GPIO_FN_PCC_REG, PCC_REG_MARK), - PINMUX_GPIO(GPIO_FN_PCC_DRV, PCC_DRV_MARK), - PINMUX_GPIO(GPIO_FN_PCC_BVD2, PCC_BVD2_MARK), - PINMUX_GPIO(GPIO_FN_PCC_BVD1, PCC_BVD1_MARK), - PINMUX_GPIO(GPIO_FN_PCC_CD2, PCC_CD2_MARK), - PINMUX_GPIO(GPIO_FN_PCC_CD1, PCC_CD1_MARK), - PINMUX_GPIO(GPIO_FN_PCC_RESET, PCC_RESET_MARK), - PINMUX_GPIO(GPIO_FN_PCC_RDY, PCC_RDY_MARK), - PINMUX_GPIO(GPIO_FN_PCC_VS2, PCC_VS2_MARK), - PINMUX_GPIO(GPIO_FN_PCC_VS1, PCC_VS1_MARK), + GPIO_FN(PCC_REG), + GPIO_FN(PCC_DRV), + GPIO_FN(PCC_BVD2), + GPIO_FN(PCC_BVD1), + GPIO_FN(PCC_CD2), + GPIO_FN(PCC_CD1), + GPIO_FN(PCC_RESET), + GPIO_FN(PCC_RDY), + GPIO_FN(PCC_VS2), + GPIO_FN(PCC_VS1), /* HUDI */ - PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK), - PINMUX_GPIO(GPIO_FN_AUDCK, AUDCK_MARK), - PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK), - PINMUX_GPIO(GPIO_FN_ASEBRKAK, ASEBRKAK_MARK), - PINMUX_GPIO(GPIO_FN_TRST, TRST_MARK), - PINMUX_GPIO(GPIO_FN_TMS, TMS_MARK), - PINMUX_GPIO(GPIO_FN_TDO, TDO_MARK), - PINMUX_GPIO(GPIO_FN_TDI, TDI_MARK), - PINMUX_GPIO(GPIO_FN_TCK, TCK_MARK), + GPIO_FN(AUDATA3), + GPIO_FN(AUDATA2), + GPIO_FN(AUDATA1), + GPIO_FN(AUDATA0), + GPIO_FN(AUDCK), + GPIO_FN(AUDSYNC), + GPIO_FN(ASEBRKAK), + GPIO_FN(TRST), + GPIO_FN(TMS), + GPIO_FN(TDO), + GPIO_FN(TDI), + GPIO_FN(TCK), /* DMAC */ - PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK), - PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK), - PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK), - PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK), - PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK), - PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK), + GPIO_FN(DACK1), + GPIO_FN(DREQ1), + GPIO_FN(DACK0), + GPIO_FN(DREQ0), + GPIO_FN(TEND1), + GPIO_FN(TEND0), /* SIOF0 */ - PINMUX_GPIO(GPIO_FN_SIOF0_SYNC, SIOF0_SYNC_MARK), - PINMUX_GPIO(GPIO_FN_SIOF0_MCLK, SIOF0_MCLK_MARK), - PINMUX_GPIO(GPIO_FN_SIOF0_TXD, SIOF0_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SIOF0_RXD, SIOF0_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SIOF0_SCK, SIOF0_SCK_MARK), + GPIO_FN(SIOF0_SYNC), + GPIO_FN(SIOF0_MCLK), + GPIO_FN(SIOF0_TXD), + GPIO_FN(SIOF0_RXD), + GPIO_FN(SIOF0_SCK), /* SIOF1 */ - PINMUX_GPIO(GPIO_FN_SIOF1_SYNC, SIOF1_SYNC_MARK), - PINMUX_GPIO(GPIO_FN_SIOF1_MCLK, SIOF1_MCLK_MARK), - PINMUX_GPIO(GPIO_FN_SIOF1_TXD, SIOF1_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SIOF1_RXD, SIOF1_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SIOF1_SCK, SIOF1_SCK_MARK), + GPIO_FN(SIOF1_SYNC), + GPIO_FN(SIOF1_MCLK), + GPIO_FN(SIOF1_TXD), + GPIO_FN(SIOF1_RXD), + GPIO_FN(SIOF1_SCK), /* SCIF0 */ - PINMUX_GPIO(GPIO_FN_SCIF0_TXD, SCIF0_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_RXD, SCIF0_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_RTS, SCIF0_RTS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_CTS, SCIF0_CTS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_SCK, SCIF0_SCK_MARK), + GPIO_FN(SCIF0_TXD), + GPIO_FN(SCIF0_RXD), + GPIO_FN(SCIF0_RTS), + GPIO_FN(SCIF0_CTS), + GPIO_FN(SCIF0_SCK), /* SCIF1 */ - PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_RTS, SCIF1_RTS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_CTS, SCIF1_CTS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK), + GPIO_FN(SCIF1_TXD), + GPIO_FN(SCIF1_RXD), + GPIO_FN(SCIF1_RTS), + GPIO_FN(SCIF1_CTS), + GPIO_FN(SCIF1_SCK), /* TPU */ - PINMUX_GPIO(GPIO_FN_TPU_TO1, TPU_TO1_MARK), - PINMUX_GPIO(GPIO_FN_TPU_TO0, TPU_TO0_MARK), - PINMUX_GPIO(GPIO_FN_TPU_TI3B, TPU_TI3B_MARK), - PINMUX_GPIO(GPIO_FN_TPU_TI3A, TPU_TI3A_MARK), - PINMUX_GPIO(GPIO_FN_TPU_TI2B, TPU_TI2B_MARK), - PINMUX_GPIO(GPIO_FN_TPU_TI2A, TPU_TI2A_MARK), - PINMUX_GPIO(GPIO_FN_TPU_TO3, TPU_TO3_MARK), - PINMUX_GPIO(GPIO_FN_TPU_TO2, TPU_TO2_MARK), + GPIO_FN(TPU_TO1), + GPIO_FN(TPU_TO0), + GPIO_FN(TPU_TI3B), + GPIO_FN(TPU_TI3A), + GPIO_FN(TPU_TI2B), + GPIO_FN(TPU_TI2A), + GPIO_FN(TPU_TO3), + GPIO_FN(TPU_TO2), /* SIM */ - PINMUX_GPIO(GPIO_FN_SIM_D, SIM_D_MARK), - PINMUX_GPIO(GPIO_FN_SIM_CLK, SIM_CLK_MARK), - PINMUX_GPIO(GPIO_FN_SIM_RST, SIM_RST_MARK), + GPIO_FN(SIM_D), + GPIO_FN(SIM_CLK), + GPIO_FN(SIM_RST), /* MMC */ - PINMUX_GPIO(GPIO_FN_MMC_DAT, MMC_DAT_MARK), - PINMUX_GPIO(GPIO_FN_MMC_CMD, MMC_CMD_MARK), - PINMUX_GPIO(GPIO_FN_MMC_CLK, MMC_CLK_MARK), - PINMUX_GPIO(GPIO_FN_MMC_VDDON, MMC_VDDON_MARK), - PINMUX_GPIO(GPIO_FN_MMC_ODMOD, MMC_ODMOD_MARK), + GPIO_FN(MMC_DAT), + GPIO_FN(MMC_CMD), + GPIO_FN(MMC_CLK), + GPIO_FN(MMC_VDDON), + GPIO_FN(MMC_ODMOD), /* SYSC */ - PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK), - PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK), + GPIO_FN(STATUS0), + GPIO_FN(STATUS1), }; -static struct pinmux_cfg_reg pinmux_config_regs[] = { +static const struct pinmux_cfg_reg pinmux_config_regs[] = { { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) { PTA7_FN, PTA7_OUT, PTA7_IN_PU, PTA7_IN, PTA6_FN, PTA6_OUT, PTA6_IN_PU, PTA6_IN, @@ -1138,7 +1141,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { {} }; -static struct pinmux_data_reg pinmux_data_regs[] = { +static const struct pinmux_data_reg pinmux_data_regs[] = { { PINMUX_DATA_REG("PADR", 0xa4050140, 8) { PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA, PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA } @@ -1214,20 +1217,18 @@ static struct pinmux_data_reg pinmux_data_regs[] = { { }, }; -struct sh_pfc_soc_info sh7720_pinmux_info = { +const struct sh_pfc_soc_info sh7720_pinmux_info = { .name = "sh7720_pfc", - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - .first_gpio = GPIO_PTA7, - .last_gpio = GPIO_FN_STATUS1, + .pins = pinmux_pins, + .nr_pins = ARRAY_SIZE(pinmux_pins), + .func_gpios = pinmux_func_gpios, + .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios), - .gpios = pinmux_gpios, .cfg_regs = pinmux_config_regs, .data_regs = pinmux_data_regs, diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7722.c b/drivers/pinctrl/sh-pfc/pfc-sh7722.c index 2de0929315e6..32034387477b 100644 --- a/drivers/pinctrl/sh-pfc/pfc-sh7722.c +++ b/drivers/pinctrl/sh-pfc/pfc-sh7722.c @@ -296,7 +296,7 @@ enum { PINMUX_FUNCTION_END, }; -static pinmux_enum_t pinmux_data[] = { +static const pinmux_enum_t pinmux_data[] = { /* PTA */ PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_IN_PD, PTA7_OUT), PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_IN_PD), @@ -787,7 +787,7 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_DATA(KEYOUT5_IN5_MARK, HIZA14_KEYSC, KEYOUT5_IN5), }; -static struct pinmux_gpio pinmux_gpios[] = { +static struct sh_pfc_pin pinmux_pins[] = { /* PTA */ PINMUX_GPIO(GPIO_PTA7, PTA7_DATA), PINMUX_GPIO(GPIO_PTA6, PTA6_DATA), @@ -982,289 +982,293 @@ static struct pinmux_gpio pinmux_gpios[] = { PINMUX_GPIO(GPIO_PTZ3, PTZ3_DATA), PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA), PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA), +}; + +#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) +static const struct pinmux_func pinmux_func_gpios[] = { /* SCIF0 */ - PINMUX_GPIO(GPIO_FN_SCIF0_TXD, SCIF0_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_RXD, SCIF0_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_RTS, SCIF0_RTS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_CTS, SCIF0_CTS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_SCK, SCIF0_SCK_MARK), + GPIO_FN(SCIF0_TXD), + GPIO_FN(SCIF0_RXD), + GPIO_FN(SCIF0_RTS), + GPIO_FN(SCIF0_CTS), + GPIO_FN(SCIF0_SCK), /* SCIF1 */ - PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_RTS, SCIF1_RTS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_CTS, SCIF1_CTS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK), + GPIO_FN(SCIF1_TXD), + GPIO_FN(SCIF1_RXD), + GPIO_FN(SCIF1_RTS), + GPIO_FN(SCIF1_CTS), + GPIO_FN(SCIF1_SCK), /* SCIF2 */ - PINMUX_GPIO(GPIO_FN_SCIF2_TXD, SCIF2_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF2_RXD, SCIF2_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF2_RTS, SCIF2_RTS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF2_CTS, SCIF2_CTS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF2_SCK, SCIF2_SCK_MARK), + GPIO_FN(SCIF2_TXD), + GPIO_FN(SCIF2_RXD), + GPIO_FN(SCIF2_RTS), + GPIO_FN(SCIF2_CTS), + GPIO_FN(SCIF2_SCK), /* SIO */ - PINMUX_GPIO(GPIO_FN_SIOTXD, SIOTXD_MARK), - PINMUX_GPIO(GPIO_FN_SIORXD, SIORXD_MARK), - PINMUX_GPIO(GPIO_FN_SIOD, SIOD_MARK), - PINMUX_GPIO(GPIO_FN_SIOSTRB0, SIOSTRB0_MARK), - PINMUX_GPIO(GPIO_FN_SIOSTRB1, SIOSTRB1_MARK), - PINMUX_GPIO(GPIO_FN_SIOSCK, SIOSCK_MARK), - PINMUX_GPIO(GPIO_FN_SIOMCK, SIOMCK_MARK), + GPIO_FN(SIOTXD), + GPIO_FN(SIORXD), + GPIO_FN(SIOD), + GPIO_FN(SIOSTRB0), + GPIO_FN(SIOSTRB1), + GPIO_FN(SIOSCK), + GPIO_FN(SIOMCK), /* CEU */ - PINMUX_GPIO(GPIO_FN_VIO_D15, VIO_D15_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D14, VIO_D14_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D13, VIO_D13_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D12, VIO_D12_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D11, VIO_D11_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D10, VIO_D10_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D9, VIO_D9_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D8, VIO_D8_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D7, VIO_D7_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D6, VIO_D6_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D5, VIO_D5_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D4, VIO_D4_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D3, VIO_D3_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D2, VIO_D2_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D1, VIO_D1_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D0, VIO_D0_MARK), - PINMUX_GPIO(GPIO_FN_VIO_CLK, VIO_CLK_MARK), - PINMUX_GPIO(GPIO_FN_VIO_VD, VIO_VD_MARK), - PINMUX_GPIO(GPIO_FN_VIO_HD, VIO_HD_MARK), - PINMUX_GPIO(GPIO_FN_VIO_FLD, VIO_FLD_MARK), - PINMUX_GPIO(GPIO_FN_VIO_CKO, VIO_CKO_MARK), - PINMUX_GPIO(GPIO_FN_VIO_STEX, VIO_STEX_MARK), - PINMUX_GPIO(GPIO_FN_VIO_STEM, VIO_STEM_MARK), - PINMUX_GPIO(GPIO_FN_VIO_VD2, VIO_VD2_MARK), - PINMUX_GPIO(GPIO_FN_VIO_HD2, VIO_HD2_MARK), - PINMUX_GPIO(GPIO_FN_VIO_CLK2, VIO_CLK2_MARK), + GPIO_FN(VIO_D15), + GPIO_FN(VIO_D14), + GPIO_FN(VIO_D13), + GPIO_FN(VIO_D12), + GPIO_FN(VIO_D11), + GPIO_FN(VIO_D10), + GPIO_FN(VIO_D9), + GPIO_FN(VIO_D8), + GPIO_FN(VIO_D7), + GPIO_FN(VIO_D6), + GPIO_FN(VIO_D5), + GPIO_FN(VIO_D4), + GPIO_FN(VIO_D3), + GPIO_FN(VIO_D2), + GPIO_FN(VIO_D1), + GPIO_FN(VIO_D0), + GPIO_FN(VIO_CLK), + GPIO_FN(VIO_VD), + GPIO_FN(VIO_HD), + GPIO_FN(VIO_FLD), + GPIO_FN(VIO_CKO), + GPIO_FN(VIO_STEX), + GPIO_FN(VIO_STEM), + GPIO_FN(VIO_VD2), + GPIO_FN(VIO_HD2), + GPIO_FN(VIO_CLK2), /* LCDC */ - PINMUX_GPIO(GPIO_FN_LCDD23, LCDD23_MARK), - PINMUX_GPIO(GPIO_FN_LCDD22, LCDD22_MARK), - PINMUX_GPIO(GPIO_FN_LCDD21, LCDD21_MARK), - PINMUX_GPIO(GPIO_FN_LCDD20, LCDD20_MARK), - PINMUX_GPIO(GPIO_FN_LCDD19, LCDD19_MARK), - PINMUX_GPIO(GPIO_FN_LCDD18, LCDD18_MARK), - PINMUX_GPIO(GPIO_FN_LCDD17, LCDD17_MARK), - PINMUX_GPIO(GPIO_FN_LCDD16, LCDD16_MARK), - PINMUX_GPIO(GPIO_FN_LCDD15, LCDD15_MARK), - PINMUX_GPIO(GPIO_FN_LCDD14, LCDD14_MARK), - PINMUX_GPIO(GPIO_FN_LCDD13, LCDD13_MARK), - PINMUX_GPIO(GPIO_FN_LCDD12, LCDD12_MARK), - PINMUX_GPIO(GPIO_FN_LCDD11, LCDD11_MARK), - PINMUX_GPIO(GPIO_FN_LCDD10, LCDD10_MARK), - PINMUX_GPIO(GPIO_FN_LCDD9, LCDD9_MARK), - PINMUX_GPIO(GPIO_FN_LCDD8, LCDD8_MARK), - PINMUX_GPIO(GPIO_FN_LCDD7, LCDD7_MARK), - PINMUX_GPIO(GPIO_FN_LCDD6, LCDD6_MARK), - PINMUX_GPIO(GPIO_FN_LCDD5, LCDD5_MARK), - PINMUX_GPIO(GPIO_FN_LCDD4, LCDD4_MARK), - PINMUX_GPIO(GPIO_FN_LCDD3, LCDD3_MARK), - PINMUX_GPIO(GPIO_FN_LCDD2, LCDD2_MARK), - PINMUX_GPIO(GPIO_FN_LCDD1, LCDD1_MARK), - PINMUX_GPIO(GPIO_FN_LCDD0, LCDD0_MARK), - PINMUX_GPIO(GPIO_FN_LCDLCLK, LCDLCLK_MARK), + GPIO_FN(LCDD23), + GPIO_FN(LCDD22), + GPIO_FN(LCDD21), + GPIO_FN(LCDD20), + GPIO_FN(LCDD19), + GPIO_FN(LCDD18), + GPIO_FN(LCDD17), + GPIO_FN(LCDD16), + GPIO_FN(LCDD15), + GPIO_FN(LCDD14), + GPIO_FN(LCDD13), + GPIO_FN(LCDD12), + GPIO_FN(LCDD11), + GPIO_FN(LCDD10), + GPIO_FN(LCDD9), + GPIO_FN(LCDD8), + GPIO_FN(LCDD7), + GPIO_FN(LCDD6), + GPIO_FN(LCDD5), + GPIO_FN(LCDD4), + GPIO_FN(LCDD3), + GPIO_FN(LCDD2), + GPIO_FN(LCDD1), + GPIO_FN(LCDD0), + GPIO_FN(LCDLCLK), /* Main LCD */ - PINMUX_GPIO(GPIO_FN_LCDDON, LCDDON_MARK), - PINMUX_GPIO(GPIO_FN_LCDVCPWC, LCDVCPWC_MARK), - PINMUX_GPIO(GPIO_FN_LCDVEPWC, LCDVEPWC_MARK), - PINMUX_GPIO(GPIO_FN_LCDVSYN, LCDVSYN_MARK), + GPIO_FN(LCDDON), + GPIO_FN(LCDVCPWC), + GPIO_FN(LCDVEPWC), + GPIO_FN(LCDVSYN), /* Main LCD - RGB Mode */ - PINMUX_GPIO(GPIO_FN_LCDDCK, LCDDCK_MARK), - PINMUX_GPIO(GPIO_FN_LCDHSYN, LCDHSYN_MARK), - PINMUX_GPIO(GPIO_FN_LCDDISP, LCDDISP_MARK), + GPIO_FN(LCDDCK), + GPIO_FN(LCDHSYN), + GPIO_FN(LCDDISP), /* Main LCD - SYS Mode */ - PINMUX_GPIO(GPIO_FN_LCDRS, LCDRS_MARK), - PINMUX_GPIO(GPIO_FN_LCDCS, LCDCS_MARK), - PINMUX_GPIO(GPIO_FN_LCDWR, LCDWR_MARK), - PINMUX_GPIO(GPIO_FN_LCDRD, LCDRD_MARK), + GPIO_FN(LCDRS), + GPIO_FN(LCDCS), + GPIO_FN(LCDWR), + GPIO_FN(LCDRD), /* Sub LCD - SYS Mode */ - PINMUX_GPIO(GPIO_FN_LCDDON2, LCDDON2_MARK), - PINMUX_GPIO(GPIO_FN_LCDVCPWC2, LCDVCPWC2_MARK), - PINMUX_GPIO(GPIO_FN_LCDVEPWC2, LCDVEPWC2_MARK), - PINMUX_GPIO(GPIO_FN_LCDVSYN2, LCDVSYN2_MARK), - PINMUX_GPIO(GPIO_FN_LCDCS2, LCDCS2_MARK), + GPIO_FN(LCDDON2), + GPIO_FN(LCDVCPWC2), + GPIO_FN(LCDVEPWC2), + GPIO_FN(LCDVSYN2), + GPIO_FN(LCDCS2), /* BSC */ - PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK), - PINMUX_GPIO(GPIO_FN_A25, A25_MARK), - PINMUX_GPIO(GPIO_FN_A24, A24_MARK), - PINMUX_GPIO(GPIO_FN_A23, A23_MARK), - PINMUX_GPIO(GPIO_FN_A22, A22_MARK), - PINMUX_GPIO(GPIO_FN_BS, BS_MARK), - PINMUX_GPIO(GPIO_FN_CS6B_CE1B, CS6B_CE1B_MARK), - PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK), - PINMUX_GPIO(GPIO_FN_CS6A_CE2B, CS6A_CE2B_MARK), + GPIO_FN(IOIS16), + GPIO_FN(A25), + GPIO_FN(A24), + GPIO_FN(A23), + GPIO_FN(A22), + GPIO_FN(BS), + GPIO_FN(CS6B_CE1B), + GPIO_FN(WAIT), + GPIO_FN(CS6A_CE2B), /* SBSC */ - PINMUX_GPIO(GPIO_FN_HPD63, HPD63_MARK), - PINMUX_GPIO(GPIO_FN_HPD62, HPD62_MARK), - PINMUX_GPIO(GPIO_FN_HPD61, HPD61_MARK), - PINMUX_GPIO(GPIO_FN_HPD60, HPD60_MARK), - PINMUX_GPIO(GPIO_FN_HPD59, HPD59_MARK), - PINMUX_GPIO(GPIO_FN_HPD58, HPD58_MARK), - PINMUX_GPIO(GPIO_FN_HPD57, HPD57_MARK), - PINMUX_GPIO(GPIO_FN_HPD56, HPD56_MARK), - PINMUX_GPIO(GPIO_FN_HPD55, HPD55_MARK), - PINMUX_GPIO(GPIO_FN_HPD54, HPD54_MARK), - PINMUX_GPIO(GPIO_FN_HPD53, HPD53_MARK), - PINMUX_GPIO(GPIO_FN_HPD52, HPD52_MARK), - PINMUX_GPIO(GPIO_FN_HPD51, HPD51_MARK), - PINMUX_GPIO(GPIO_FN_HPD50, HPD50_MARK), - PINMUX_GPIO(GPIO_FN_HPD49, HPD49_MARK), - PINMUX_GPIO(GPIO_FN_HPD48, HPD48_MARK), - PINMUX_GPIO(GPIO_FN_HPDQM7, HPDQM7_MARK), - PINMUX_GPIO(GPIO_FN_HPDQM6, HPDQM6_MARK), - PINMUX_GPIO(GPIO_FN_HPDQM5, HPDQM5_MARK), - PINMUX_GPIO(GPIO_FN_HPDQM4, HPDQM4_MARK), + GPIO_FN(HPD63), + GPIO_FN(HPD62), + GPIO_FN(HPD61), + GPIO_FN(HPD60), + GPIO_FN(HPD59), + GPIO_FN(HPD58), + GPIO_FN(HPD57), + GPIO_FN(HPD56), + GPIO_FN(HPD55), + GPIO_FN(HPD54), + GPIO_FN(HPD53), + GPIO_FN(HPD52), + GPIO_FN(HPD51), + GPIO_FN(HPD50), + GPIO_FN(HPD49), + GPIO_FN(HPD48), + GPIO_FN(HPDQM7), + GPIO_FN(HPDQM6), + GPIO_FN(HPDQM5), + GPIO_FN(HPDQM4), /* IRQ */ - PINMUX_GPIO(GPIO_FN_IRQ0, IRQ0_MARK), - PINMUX_GPIO(GPIO_FN_IRQ1, IRQ1_MARK), - PINMUX_GPIO(GPIO_FN_IRQ2, IRQ2_MARK), - PINMUX_GPIO(GPIO_FN_IRQ3, IRQ3_MARK), - PINMUX_GPIO(GPIO_FN_IRQ4, IRQ4_MARK), - PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK), - PINMUX_GPIO(GPIO_FN_IRQ6, IRQ6_MARK), - PINMUX_GPIO(GPIO_FN_IRQ7, IRQ7_MARK), + GPIO_FN(IRQ0), + GPIO_FN(IRQ1), + GPIO_FN(IRQ2), + GPIO_FN(IRQ3), + GPIO_FN(IRQ4), + GPIO_FN(IRQ5), + GPIO_FN(IRQ6), + GPIO_FN(IRQ7), /* SDHI */ - PINMUX_GPIO(GPIO_FN_SDHICD, SDHICD_MARK), - PINMUX_GPIO(GPIO_FN_SDHIWP, SDHIWP_MARK), - PINMUX_GPIO(GPIO_FN_SDHID3, SDHID3_MARK), - PINMUX_GPIO(GPIO_FN_SDHID2, SDHID2_MARK), - PINMUX_GPIO(GPIO_FN_SDHID1, SDHID1_MARK), - PINMUX_GPIO(GPIO_FN_SDHID0, SDHID0_MARK), - PINMUX_GPIO(GPIO_FN_SDHICMD, SDHICMD_MARK), - PINMUX_GPIO(GPIO_FN_SDHICLK, SDHICLK_MARK), + GPIO_FN(SDHICD), + GPIO_FN(SDHIWP), + GPIO_FN(SDHID3), + GPIO_FN(SDHID2), + GPIO_FN(SDHID1), + GPIO_FN(SDHID0), + GPIO_FN(SDHICMD), + GPIO_FN(SDHICLK), /* SIU - Port A */ - PINMUX_GPIO(GPIO_FN_SIUAOLR, SIUAOLR_MARK), - PINMUX_GPIO(GPIO_FN_SIUAOBT, SIUAOBT_MARK), - PINMUX_GPIO(GPIO_FN_SIUAISLD, SIUAISLD_MARK), - PINMUX_GPIO(GPIO_FN_SIUAILR, SIUAILR_MARK), - PINMUX_GPIO(GPIO_FN_SIUAIBT, SIUAIBT_MARK), - PINMUX_GPIO(GPIO_FN_SIUAOSLD, SIUAOSLD_MARK), - PINMUX_GPIO(GPIO_FN_SIUMCKA, SIUMCKA_MARK), - PINMUX_GPIO(GPIO_FN_SIUFCKA, SIUFCKA_MARK), + GPIO_FN(SIUAOLR), + GPIO_FN(SIUAOBT), + GPIO_FN(SIUAISLD), + GPIO_FN(SIUAILR), + GPIO_FN(SIUAIBT), + GPIO_FN(SIUAOSLD), + GPIO_FN(SIUMCKA), + GPIO_FN(SIUFCKA), /* SIU - Port B */ - PINMUX_GPIO(GPIO_FN_SIUBOLR, SIUBOLR_MARK), - PINMUX_GPIO(GPIO_FN_SIUBOBT, SIUBOBT_MARK), - PINMUX_GPIO(GPIO_FN_SIUBISLD, SIUBISLD_MARK), - PINMUX_GPIO(GPIO_FN_SIUBILR, SIUBILR_MARK), - PINMUX_GPIO(GPIO_FN_SIUBIBT, SIUBIBT_MARK), - PINMUX_GPIO(GPIO_FN_SIUBOSLD, SIUBOSLD_MARK), - PINMUX_GPIO(GPIO_FN_SIUMCKB, SIUMCKB_MARK), - PINMUX_GPIO(GPIO_FN_SIUFCKB, SIUFCKB_MARK), + GPIO_FN(SIUBOLR), + GPIO_FN(SIUBOBT), + GPIO_FN(SIUBISLD), + GPIO_FN(SIUBILR), + GPIO_FN(SIUBIBT), + GPIO_FN(SIUBOSLD), + GPIO_FN(SIUMCKB), + GPIO_FN(SIUFCKB), /* AUD */ - PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK), + GPIO_FN(AUDSYNC), + GPIO_FN(AUDATA3), + GPIO_FN(AUDATA2), + GPIO_FN(AUDATA1), + GPIO_FN(AUDATA0), /* DMAC */ - PINMUX_GPIO(GPIO_FN_DACK, DACK_MARK), - PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK), + GPIO_FN(DACK), + GPIO_FN(DREQ0), /* VOU */ - PINMUX_GPIO(GPIO_FN_DV_CLKI, DV_CLKI_MARK), - PINMUX_GPIO(GPIO_FN_DV_CLK, DV_CLK_MARK), - PINMUX_GPIO(GPIO_FN_DV_HSYNC, DV_HSYNC_MARK), - PINMUX_GPIO(GPIO_FN_DV_VSYNC, DV_VSYNC_MARK), - PINMUX_GPIO(GPIO_FN_DV_D15, DV_D15_MARK), - PINMUX_GPIO(GPIO_FN_DV_D14, DV_D14_MARK), - PINMUX_GPIO(GPIO_FN_DV_D13, DV_D13_MARK), - PINMUX_GPIO(GPIO_FN_DV_D12, DV_D12_MARK), - PINMUX_GPIO(GPIO_FN_DV_D11, DV_D11_MARK), - PINMUX_GPIO(GPIO_FN_DV_D10, DV_D10_MARK), - PINMUX_GPIO(GPIO_FN_DV_D9, DV_D9_MARK), - PINMUX_GPIO(GPIO_FN_DV_D8, DV_D8_MARK), - PINMUX_GPIO(GPIO_FN_DV_D7, DV_D7_MARK), - PINMUX_GPIO(GPIO_FN_DV_D6, DV_D6_MARK), - PINMUX_GPIO(GPIO_FN_DV_D5, DV_D5_MARK), - PINMUX_GPIO(GPIO_FN_DV_D4, DV_D4_MARK), - PINMUX_GPIO(GPIO_FN_DV_D3, DV_D3_MARK), - PINMUX_GPIO(GPIO_FN_DV_D2, DV_D2_MARK), - PINMUX_GPIO(GPIO_FN_DV_D1, DV_D1_MARK), - PINMUX_GPIO(GPIO_FN_DV_D0, DV_D0_MARK), + GPIO_FN(DV_CLKI), + GPIO_FN(DV_CLK), + GPIO_FN(DV_HSYNC), + GPIO_FN(DV_VSYNC), + GPIO_FN(DV_D15), + GPIO_FN(DV_D14), + GPIO_FN(DV_D13), + GPIO_FN(DV_D12), + GPIO_FN(DV_D11), + GPIO_FN(DV_D10), + GPIO_FN(DV_D9), + GPIO_FN(DV_D8), + GPIO_FN(DV_D7), + GPIO_FN(DV_D6), + GPIO_FN(DV_D5), + GPIO_FN(DV_D4), + GPIO_FN(DV_D3), + GPIO_FN(DV_D2), + GPIO_FN(DV_D1), + GPIO_FN(DV_D0), /* CPG */ - PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK), - PINMUX_GPIO(GPIO_FN_PDSTATUS, PDSTATUS_MARK), + GPIO_FN(STATUS0), + GPIO_FN(PDSTATUS), /* SIOF0 */ - PINMUX_GPIO(GPIO_FN_SIOF0_MCK, SIOF0_MCK_MARK), - PINMUX_GPIO(GPIO_FN_SIOF0_SCK, SIOF0_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SIOF0_SYNC, SIOF0_SYNC_MARK), - PINMUX_GPIO(GPIO_FN_SIOF0_SS1, SIOF0_SS1_MARK), - PINMUX_GPIO(GPIO_FN_SIOF0_SS2, SIOF0_SS2_MARK), - PINMUX_GPIO(GPIO_FN_SIOF0_TXD, SIOF0_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SIOF0_RXD, SIOF0_RXD_MARK), + GPIO_FN(SIOF0_MCK), + GPIO_FN(SIOF0_SCK), + GPIO_FN(SIOF0_SYNC), + GPIO_FN(SIOF0_SS1), + GPIO_FN(SIOF0_SS2), + GPIO_FN(SIOF0_TXD), + GPIO_FN(SIOF0_RXD), /* SIOF1 */ - PINMUX_GPIO(GPIO_FN_SIOF1_MCK, SIOF1_MCK_MARK), - PINMUX_GPIO(GPIO_FN_SIOF1_SCK, SIOF1_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SIOF1_SYNC, SIOF1_SYNC_MARK), - PINMUX_GPIO(GPIO_FN_SIOF1_SS1, SIOF1_SS1_MARK), - PINMUX_GPIO(GPIO_FN_SIOF1_SS2, SIOF1_SS2_MARK), - PINMUX_GPIO(GPIO_FN_SIOF1_TXD, SIOF1_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SIOF1_RXD, SIOF1_RXD_MARK), + GPIO_FN(SIOF1_MCK), + GPIO_FN(SIOF1_SCK), + GPIO_FN(SIOF1_SYNC), + GPIO_FN(SIOF1_SS1), + GPIO_FN(SIOF1_SS2), + GPIO_FN(SIOF1_TXD), + GPIO_FN(SIOF1_RXD), /* SIM */ - PINMUX_GPIO(GPIO_FN_SIM_D, SIM_D_MARK), - PINMUX_GPIO(GPIO_FN_SIM_CLK, SIM_CLK_MARK), - PINMUX_GPIO(GPIO_FN_SIM_RST, SIM_RST_MARK), + GPIO_FN(SIM_D), + GPIO_FN(SIM_CLK), + GPIO_FN(SIM_RST), /* TSIF */ - PINMUX_GPIO(GPIO_FN_TS_SDAT, TS_SDAT_MARK), - PINMUX_GPIO(GPIO_FN_TS_SCK, TS_SCK_MARK), - PINMUX_GPIO(GPIO_FN_TS_SDEN, TS_SDEN_MARK), - PINMUX_GPIO(GPIO_FN_TS_SPSYNC, TS_SPSYNC_MARK), + GPIO_FN(TS_SDAT), + GPIO_FN(TS_SCK), + GPIO_FN(TS_SDEN), + GPIO_FN(TS_SPSYNC), /* IRDA */ - PINMUX_GPIO(GPIO_FN_IRDA_IN, IRDA_IN_MARK), - PINMUX_GPIO(GPIO_FN_IRDA_OUT, IRDA_OUT_MARK), + GPIO_FN(IRDA_IN), + GPIO_FN(IRDA_OUT), /* TPU */ - PINMUX_GPIO(GPIO_FN_TPUTO, TPUTO_MARK), + GPIO_FN(TPUTO), /* FLCTL */ - PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK), - PINMUX_GPIO(GPIO_FN_NAF7, NAF7_MARK), - PINMUX_GPIO(GPIO_FN_NAF6, NAF6_MARK), - PINMUX_GPIO(GPIO_FN_NAF5, NAF5_MARK), - PINMUX_GPIO(GPIO_FN_NAF4, NAF4_MARK), - PINMUX_GPIO(GPIO_FN_NAF3, NAF3_MARK), - PINMUX_GPIO(GPIO_FN_NAF2, NAF2_MARK), - PINMUX_GPIO(GPIO_FN_NAF1, NAF1_MARK), - PINMUX_GPIO(GPIO_FN_NAF0, NAF0_MARK), - PINMUX_GPIO(GPIO_FN_FCDE, FCDE_MARK), - PINMUX_GPIO(GPIO_FN_FOE, FOE_MARK), - PINMUX_GPIO(GPIO_FN_FSC, FSC_MARK), - PINMUX_GPIO(GPIO_FN_FWE, FWE_MARK), - PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK), + GPIO_FN(FCE), + GPIO_FN(NAF7), + GPIO_FN(NAF6), + GPIO_FN(NAF5), + GPIO_FN(NAF4), + GPIO_FN(NAF3), + GPIO_FN(NAF2), + GPIO_FN(NAF1), + GPIO_FN(NAF0), + GPIO_FN(FCDE), + GPIO_FN(FOE), + GPIO_FN(FSC), + GPIO_FN(FWE), + GPIO_FN(FRB), /* KEYSC */ - PINMUX_GPIO(GPIO_FN_KEYIN0, KEYIN0_MARK), - PINMUX_GPIO(GPIO_FN_KEYIN1, KEYIN1_MARK), - PINMUX_GPIO(GPIO_FN_KEYIN2, KEYIN2_MARK), - PINMUX_GPIO(GPIO_FN_KEYIN3, KEYIN3_MARK), - PINMUX_GPIO(GPIO_FN_KEYIN4, KEYIN4_MARK), - PINMUX_GPIO(GPIO_FN_KEYOUT0, KEYOUT0_MARK), - PINMUX_GPIO(GPIO_FN_KEYOUT1, KEYOUT1_MARK), - PINMUX_GPIO(GPIO_FN_KEYOUT2, KEYOUT2_MARK), - PINMUX_GPIO(GPIO_FN_KEYOUT3, KEYOUT3_MARK), - PINMUX_GPIO(GPIO_FN_KEYOUT4_IN6, KEYOUT4_IN6_MARK), - PINMUX_GPIO(GPIO_FN_KEYOUT5_IN5, KEYOUT5_IN5_MARK), + GPIO_FN(KEYIN0), + GPIO_FN(KEYIN1), + GPIO_FN(KEYIN2), + GPIO_FN(KEYIN3), + GPIO_FN(KEYIN4), + GPIO_FN(KEYOUT0), + GPIO_FN(KEYOUT1), + GPIO_FN(KEYOUT2), + GPIO_FN(KEYOUT3), + GPIO_FN(KEYOUT4_IN6), + GPIO_FN(KEYOUT5_IN5), }; -static struct pinmux_cfg_reg pinmux_config_regs[] = { +static const struct pinmux_cfg_reg pinmux_config_regs[] = { { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) { VIO_D7_SCIF1_SCK, PTA7_OUT, PTA7_IN_PD, PTA7_IN, VIO_D6_SCIF1_RXD, 0, PTA6_IN_PD, PTA6_IN, @@ -1660,7 +1664,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { {} }; -static struct pinmux_data_reg pinmux_data_regs[] = { +static const struct pinmux_data_reg pinmux_data_regs[] = { { PINMUX_DATA_REG("PADR", 0xa4050120, 8) { PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA, PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA } @@ -1756,21 +1760,19 @@ static struct pinmux_data_reg pinmux_data_regs[] = { { }, }; -struct sh_pfc_soc_info sh7722_pinmux_info = { +const struct sh_pfc_soc_info sh7722_pinmux_info = { .name = "sh7722_pfc", - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END }, .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - .first_gpio = GPIO_PTA7, - .last_gpio = GPIO_FN_KEYOUT5_IN5, + .pins = pinmux_pins, + .nr_pins = ARRAY_SIZE(pinmux_pins), + .func_gpios = pinmux_func_gpios, + .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios), - .gpios = pinmux_gpios, .cfg_regs = pinmux_config_regs, .data_regs = pinmux_data_regs, diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7723.c b/drivers/pinctrl/sh-pfc/pfc-sh7723.c index 609673d3d70e..07ad1d8d6c8b 100644 --- a/drivers/pinctrl/sh-pfc/pfc-sh7723.c +++ b/drivers/pinctrl/sh-pfc/pfc-sh7723.c @@ -350,7 +350,7 @@ enum { PINMUX_MARK_END, }; -static pinmux_enum_t pinmux_data[] = { +static const pinmux_enum_t pinmux_data[] = { /* PTA GPIO */ PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT), PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT), @@ -923,7 +923,7 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_DATA(SIUBISLD_MARK, PSD1_PSD0_FN2, PTZ0_FN), }; -static struct pinmux_gpio pinmux_gpios[] = { +static struct sh_pfc_pin pinmux_pins[] = { /* PTA */ PINMUX_GPIO(GPIO_PTA7, PTA7_DATA), PINMUX_GPIO(GPIO_PTA6, PTA6_DATA), @@ -1139,379 +1139,383 @@ static struct pinmux_gpio pinmux_gpios[] = { PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA), PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA), PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA), +}; + +#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) +static const struct pinmux_func pinmux_func_gpios[] = { /* SCIF0 */ - PINMUX_GPIO(GPIO_FN_SCIF0_PTT_TXD, SCIF0_PTT_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_PTT_RXD, SCIF0_PTT_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_PTT_SCK, SCIF0_PTT_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_PTU_TXD, SCIF0_PTU_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_PTU_RXD, SCIF0_PTU_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_PTU_SCK, SCIF0_PTU_SCK_MARK), + GPIO_FN(SCIF0_PTT_TXD), + GPIO_FN(SCIF0_PTT_RXD), + GPIO_FN(SCIF0_PTT_SCK), + GPIO_FN(SCIF0_PTU_TXD), + GPIO_FN(SCIF0_PTU_RXD), + GPIO_FN(SCIF0_PTU_SCK), /* SCIF1 */ - PINMUX_GPIO(GPIO_FN_SCIF1_PTS_TXD, SCIF1_PTS_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_PTS_RXD, SCIF1_PTS_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_PTS_SCK, SCIF1_PTS_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_PTV_TXD, SCIF1_PTV_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_PTV_RXD, SCIF1_PTV_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_PTV_SCK, SCIF1_PTV_SCK_MARK), + GPIO_FN(SCIF1_PTS_TXD), + GPIO_FN(SCIF1_PTS_RXD), + GPIO_FN(SCIF1_PTS_SCK), + GPIO_FN(SCIF1_PTV_TXD), + GPIO_FN(SCIF1_PTV_RXD), + GPIO_FN(SCIF1_PTV_SCK), /* SCIF2 */ - PINMUX_GPIO(GPIO_FN_SCIF2_PTT_TXD, SCIF2_PTT_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF2_PTT_RXD, SCIF2_PTT_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF2_PTT_SCK, SCIF2_PTT_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SCIF2_PTU_TXD, SCIF2_PTU_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF2_PTU_RXD, SCIF2_PTU_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF2_PTU_SCK, SCIF2_PTU_SCK_MARK), + GPIO_FN(SCIF2_PTT_TXD), + GPIO_FN(SCIF2_PTT_RXD), + GPIO_FN(SCIF2_PTT_SCK), + GPIO_FN(SCIF2_PTU_TXD), + GPIO_FN(SCIF2_PTU_RXD), + GPIO_FN(SCIF2_PTU_SCK), /* SCIF3 */ - PINMUX_GPIO(GPIO_FN_SCIF3_PTS_TXD, SCIF3_PTS_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_PTS_RXD, SCIF3_PTS_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_PTS_SCK, SCIF3_PTS_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_PTS_RTS, SCIF3_PTS_RTS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_PTS_CTS, SCIF3_PTS_CTS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_PTV_TXD, SCIF3_PTV_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_PTV_RXD, SCIF3_PTV_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_PTV_SCK, SCIF3_PTV_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_PTV_RTS, SCIF3_PTV_RTS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_PTV_CTS, SCIF3_PTV_CTS_MARK), + GPIO_FN(SCIF3_PTS_TXD), + GPIO_FN(SCIF3_PTS_RXD), + GPIO_FN(SCIF3_PTS_SCK), + GPIO_FN(SCIF3_PTS_RTS), + GPIO_FN(SCIF3_PTS_CTS), + GPIO_FN(SCIF3_PTV_TXD), + GPIO_FN(SCIF3_PTV_RXD), + GPIO_FN(SCIF3_PTV_SCK), + GPIO_FN(SCIF3_PTV_RTS), + GPIO_FN(SCIF3_PTV_CTS), /* SCIF4 */ - PINMUX_GPIO(GPIO_FN_SCIF4_PTE_TXD, SCIF4_PTE_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF4_PTE_RXD, SCIF4_PTE_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF4_PTE_SCK, SCIF4_PTE_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SCIF4_PTN_TXD, SCIF4_PTN_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF4_PTN_RXD, SCIF4_PTN_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF4_PTN_SCK, SCIF4_PTN_SCK_MARK), + GPIO_FN(SCIF4_PTE_TXD), + GPIO_FN(SCIF4_PTE_RXD), + GPIO_FN(SCIF4_PTE_SCK), + GPIO_FN(SCIF4_PTN_TXD), + GPIO_FN(SCIF4_PTN_RXD), + GPIO_FN(SCIF4_PTN_SCK), /* SCIF5 */ - PINMUX_GPIO(GPIO_FN_SCIF5_PTE_TXD, SCIF5_PTE_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF5_PTE_RXD, SCIF5_PTE_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF5_PTE_SCK, SCIF5_PTE_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SCIF5_PTN_TXD, SCIF5_PTN_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF5_PTN_RXD, SCIF5_PTN_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF5_PTN_SCK, SCIF5_PTN_SCK_MARK), + GPIO_FN(SCIF5_PTE_TXD), + GPIO_FN(SCIF5_PTE_RXD), + GPIO_FN(SCIF5_PTE_SCK), + GPIO_FN(SCIF5_PTN_TXD), + GPIO_FN(SCIF5_PTN_RXD), + GPIO_FN(SCIF5_PTN_SCK), /* CEU */ - PINMUX_GPIO(GPIO_FN_VIO_D15, VIO_D15_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D14, VIO_D14_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D13, VIO_D13_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D12, VIO_D12_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D11, VIO_D11_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D10, VIO_D10_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D9, VIO_D9_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D8, VIO_D8_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D7, VIO_D7_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D6, VIO_D6_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D5, VIO_D5_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D4, VIO_D4_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D3, VIO_D3_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D2, VIO_D2_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D1, VIO_D1_MARK), - PINMUX_GPIO(GPIO_FN_VIO_D0, VIO_D0_MARK), - PINMUX_GPIO(GPIO_FN_VIO_CLK1, VIO_CLK1_MARK), - PINMUX_GPIO(GPIO_FN_VIO_VD1, VIO_VD1_MARK), - PINMUX_GPIO(GPIO_FN_VIO_HD1, VIO_HD1_MARK), - PINMUX_GPIO(GPIO_FN_VIO_FLD, VIO_FLD_MARK), - PINMUX_GPIO(GPIO_FN_VIO_CKO, VIO_CKO_MARK), - PINMUX_GPIO(GPIO_FN_VIO_VD2, VIO_VD2_MARK), - PINMUX_GPIO(GPIO_FN_VIO_HD2, VIO_HD2_MARK), - PINMUX_GPIO(GPIO_FN_VIO_CLK2, VIO_CLK2_MARK), + GPIO_FN(VIO_D15), + GPIO_FN(VIO_D14), + GPIO_FN(VIO_D13), + GPIO_FN(VIO_D12), + GPIO_FN(VIO_D11), + GPIO_FN(VIO_D10), + GPIO_FN(VIO_D9), + GPIO_FN(VIO_D8), + GPIO_FN(VIO_D7), + GPIO_FN(VIO_D6), + GPIO_FN(VIO_D5), + GPIO_FN(VIO_D4), + GPIO_FN(VIO_D3), + GPIO_FN(VIO_D2), + GPIO_FN(VIO_D1), + GPIO_FN(VIO_D0), + GPIO_FN(VIO_CLK1), + GPIO_FN(VIO_VD1), + GPIO_FN(VIO_HD1), + GPIO_FN(VIO_FLD), + GPIO_FN(VIO_CKO), + GPIO_FN(VIO_VD2), + GPIO_FN(VIO_HD2), + GPIO_FN(VIO_CLK2), /* LCDC */ - PINMUX_GPIO(GPIO_FN_LCDD23, LCDD23_MARK), - PINMUX_GPIO(GPIO_FN_LCDD22, LCDD22_MARK), - PINMUX_GPIO(GPIO_FN_LCDD21, LCDD21_MARK), - PINMUX_GPIO(GPIO_FN_LCDD20, LCDD20_MARK), - PINMUX_GPIO(GPIO_FN_LCDD19, LCDD19_MARK), - PINMUX_GPIO(GPIO_FN_LCDD18, LCDD18_MARK), - PINMUX_GPIO(GPIO_FN_LCDD17, LCDD17_MARK), - PINMUX_GPIO(GPIO_FN_LCDD16, LCDD16_MARK), - PINMUX_GPIO(GPIO_FN_LCDD15, LCDD15_MARK), - PINMUX_GPIO(GPIO_FN_LCDD14, LCDD14_MARK), - PINMUX_GPIO(GPIO_FN_LCDD13, LCDD13_MARK), - PINMUX_GPIO(GPIO_FN_LCDD12, LCDD12_MARK), - PINMUX_GPIO(GPIO_FN_LCDD11, LCDD11_MARK), - PINMUX_GPIO(GPIO_FN_LCDD10, LCDD10_MARK), - PINMUX_GPIO(GPIO_FN_LCDD9, LCDD9_MARK), - PINMUX_GPIO(GPIO_FN_LCDD8, LCDD8_MARK), - PINMUX_GPIO(GPIO_FN_LCDD7, LCDD7_MARK), - PINMUX_GPIO(GPIO_FN_LCDD6, LCDD6_MARK), - PINMUX_GPIO(GPIO_FN_LCDD5, LCDD5_MARK), - PINMUX_GPIO(GPIO_FN_LCDD4, LCDD4_MARK), - PINMUX_GPIO(GPIO_FN_LCDD3, LCDD3_MARK), - PINMUX_GPIO(GPIO_FN_LCDD2, LCDD2_MARK), - PINMUX_GPIO(GPIO_FN_LCDD1, LCDD1_MARK), - PINMUX_GPIO(GPIO_FN_LCDD0, LCDD0_MARK), - PINMUX_GPIO(GPIO_FN_LCDLCLK_PTR, LCDLCLK_PTR_MARK), - PINMUX_GPIO(GPIO_FN_LCDLCLK_PTW, LCDLCLK_PTW_MARK), + GPIO_FN(LCDD23), + GPIO_FN(LCDD22), + GPIO_FN(LCDD21), + GPIO_FN(LCDD20), + GPIO_FN(LCDD19), + GPIO_FN(LCDD18), + GPIO_FN(LCDD17), + GPIO_FN(LCDD16), + GPIO_FN(LCDD15), + GPIO_FN(LCDD14), + GPIO_FN(LCDD13), + GPIO_FN(LCDD12), + GPIO_FN(LCDD11), + GPIO_FN(LCDD10), + GPIO_FN(LCDD9), + GPIO_FN(LCDD8), + GPIO_FN(LCDD7), + GPIO_FN(LCDD6), + GPIO_FN(LCDD5), + GPIO_FN(LCDD4), + GPIO_FN(LCDD3), + GPIO_FN(LCDD2), + GPIO_FN(LCDD1), + GPIO_FN(LCDD0), + GPIO_FN(LCDLCLK_PTR), + GPIO_FN(LCDLCLK_PTW), /* Main LCD */ - PINMUX_GPIO(GPIO_FN_LCDDON, LCDDON_MARK), - PINMUX_GPIO(GPIO_FN_LCDVCPWC, LCDVCPWC_MARK), - PINMUX_GPIO(GPIO_FN_LCDVEPWC, LCDVEPWC_MARK), - PINMUX_GPIO(GPIO_FN_LCDVSYN, LCDVSYN_MARK), + GPIO_FN(LCDDON), + GPIO_FN(LCDVCPWC), + GPIO_FN(LCDVEPWC), + GPIO_FN(LCDVSYN), /* Main LCD - RGB Mode */ - PINMUX_GPIO(GPIO_FN_LCDDCK, LCDDCK_MARK), - PINMUX_GPIO(GPIO_FN_LCDHSYN, LCDHSYN_MARK), - PINMUX_GPIO(GPIO_FN_LCDDISP, LCDDISP_MARK), + GPIO_FN(LCDDCK), + GPIO_FN(LCDHSYN), + GPIO_FN(LCDDISP), /* Main LCD - SYS Mode */ - PINMUX_GPIO(GPIO_FN_LCDRS, LCDRS_MARK), - PINMUX_GPIO(GPIO_FN_LCDCS, LCDCS_MARK), - PINMUX_GPIO(GPIO_FN_LCDWR, LCDWR_MARK), - PINMUX_GPIO(GPIO_FN_LCDRD, LCDRD_MARK), + GPIO_FN(LCDRS), + GPIO_FN(LCDCS), + GPIO_FN(LCDWR), + GPIO_FN(LCDRD), /* IRQ */ - PINMUX_GPIO(GPIO_FN_IRQ0, IRQ0_MARK), - PINMUX_GPIO(GPIO_FN_IRQ1, IRQ1_MARK), - PINMUX_GPIO(GPIO_FN_IRQ2, IRQ2_MARK), - PINMUX_GPIO(GPIO_FN_IRQ3, IRQ3_MARK), - PINMUX_GPIO(GPIO_FN_IRQ4, IRQ4_MARK), - PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK), - PINMUX_GPIO(GPIO_FN_IRQ6, IRQ6_MARK), - PINMUX_GPIO(GPIO_FN_IRQ7, IRQ7_MARK), + GPIO_FN(IRQ0), + GPIO_FN(IRQ1), + GPIO_FN(IRQ2), + GPIO_FN(IRQ3), + GPIO_FN(IRQ4), + GPIO_FN(IRQ5), + GPIO_FN(IRQ6), + GPIO_FN(IRQ7), /* AUD */ - PINMUX_GPIO(GPIO_FN_AUDCK, AUDCK_MARK), - PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK), + GPIO_FN(AUDCK), + GPIO_FN(AUDSYNC), + GPIO_FN(AUDATA3), + GPIO_FN(AUDATA2), + GPIO_FN(AUDATA1), + GPIO_FN(AUDATA0), /* SDHI0 (PTD) */ - PINMUX_GPIO(GPIO_FN_SDHI0CD_PTD, SDHI0CD_PTD_MARK), - PINMUX_GPIO(GPIO_FN_SDHI0WP_PTD, SDHI0WP_PTD_MARK), - PINMUX_GPIO(GPIO_FN_SDHI0D3_PTD, SDHI0D3_PTD_MARK), - PINMUX_GPIO(GPIO_FN_SDHI0D2_PTD, SDHI0D2_PTD_MARK), - PINMUX_GPIO(GPIO_FN_SDHI0D1_PTD, SDHI0D1_PTD_MARK), - PINMUX_GPIO(GPIO_FN_SDHI0D0_PTD, SDHI0D0_PTD_MARK), - PINMUX_GPIO(GPIO_FN_SDHI0CMD_PTD, SDHI0CMD_PTD_MARK), - PINMUX_GPIO(GPIO_FN_SDHI0CLK_PTD, SDHI0CLK_PTD_MARK), + GPIO_FN(SDHI0CD_PTD), + GPIO_FN(SDHI0WP_PTD), + GPIO_FN(SDHI0D3_PTD), + GPIO_FN(SDHI0D2_PTD), + GPIO_FN(SDHI0D1_PTD), + GPIO_FN(SDHI0D0_PTD), + GPIO_FN(SDHI0CMD_PTD), + GPIO_FN(SDHI0CLK_PTD), /* SDHI0 (PTS) */ - PINMUX_GPIO(GPIO_FN_SDHI0CD_PTS, SDHI0CD_PTS_MARK), - PINMUX_GPIO(GPIO_FN_SDHI0WP_PTS, SDHI0WP_PTS_MARK), - PINMUX_GPIO(GPIO_FN_SDHI0D3_PTS, SDHI0D3_PTS_MARK), - PINMUX_GPIO(GPIO_FN_SDHI0D2_PTS, SDHI0D2_PTS_MARK), - PINMUX_GPIO(GPIO_FN_SDHI0D1_PTS, SDHI0D1_PTS_MARK), - PINMUX_GPIO(GPIO_FN_SDHI0D0_PTS, SDHI0D0_PTS_MARK), - PINMUX_GPIO(GPIO_FN_SDHI0CMD_PTS, SDHI0CMD_PTS_MARK), - PINMUX_GPIO(GPIO_FN_SDHI0CLK_PTS, SDHI0CLK_PTS_MARK), + GPIO_FN(SDHI0CD_PTS), + GPIO_FN(SDHI0WP_PTS), + GPIO_FN(SDHI0D3_PTS), + GPIO_FN(SDHI0D2_PTS), + GPIO_FN(SDHI0D1_PTS), + GPIO_FN(SDHI0D0_PTS), + GPIO_FN(SDHI0CMD_PTS), + GPIO_FN(SDHI0CLK_PTS), /* SDHI1 */ - PINMUX_GPIO(GPIO_FN_SDHI1CD, SDHI1CD_MARK), - PINMUX_GPIO(GPIO_FN_SDHI1WP, SDHI1WP_MARK), - PINMUX_GPIO(GPIO_FN_SDHI1D3, SDHI1D3_MARK), - PINMUX_GPIO(GPIO_FN_SDHI1D2, SDHI1D2_MARK), - PINMUX_GPIO(GPIO_FN_SDHI1D1, SDHI1D1_MARK), - PINMUX_GPIO(GPIO_FN_SDHI1D0, SDHI1D0_MARK), - PINMUX_GPIO(GPIO_FN_SDHI1CMD, SDHI1CMD_MARK), - PINMUX_GPIO(GPIO_FN_SDHI1CLK, SDHI1CLK_MARK), + GPIO_FN(SDHI1CD), + GPIO_FN(SDHI1WP), + GPIO_FN(SDHI1D3), + GPIO_FN(SDHI1D2), + GPIO_FN(SDHI1D1), + GPIO_FN(SDHI1D0), + GPIO_FN(SDHI1CMD), + GPIO_FN(SDHI1CLK), /* SIUA */ - PINMUX_GPIO(GPIO_FN_SIUAFCK, SIUAFCK_MARK), - PINMUX_GPIO(GPIO_FN_SIUAILR, SIUAILR_MARK), - PINMUX_GPIO(GPIO_FN_SIUAIBT, SIUAIBT_MARK), - PINMUX_GPIO(GPIO_FN_SIUAISLD, SIUAISLD_MARK), - PINMUX_GPIO(GPIO_FN_SIUAOLR, SIUAOLR_MARK), - PINMUX_GPIO(GPIO_FN_SIUAOBT, SIUAOBT_MARK), - PINMUX_GPIO(GPIO_FN_SIUAOSLD, SIUAOSLD_MARK), - PINMUX_GPIO(GPIO_FN_SIUAMCK, SIUAMCK_MARK), - PINMUX_GPIO(GPIO_FN_SIUAISPD, SIUAISPD_MARK), - PINMUX_GPIO(GPIO_FN_SIUAOSPD, SIUAOSPD_MARK), + GPIO_FN(SIUAFCK), + GPIO_FN(SIUAILR), + GPIO_FN(SIUAIBT), + GPIO_FN(SIUAISLD), + GPIO_FN(SIUAOLR), + GPIO_FN(SIUAOBT), + GPIO_FN(SIUAOSLD), + GPIO_FN(SIUAMCK), + GPIO_FN(SIUAISPD), + GPIO_FN(SIUAOSPD), /* SIUB */ - PINMUX_GPIO(GPIO_FN_SIUBFCK, SIUBFCK_MARK), - PINMUX_GPIO(GPIO_FN_SIUBILR, SIUBILR_MARK), - PINMUX_GPIO(GPIO_FN_SIUBIBT, SIUBIBT_MARK), - PINMUX_GPIO(GPIO_FN_SIUBISLD, SIUBISLD_MARK), - PINMUX_GPIO(GPIO_FN_SIUBOLR, SIUBOLR_MARK), - PINMUX_GPIO(GPIO_FN_SIUBOBT, SIUBOBT_MARK), - PINMUX_GPIO(GPIO_FN_SIUBOSLD, SIUBOSLD_MARK), - PINMUX_GPIO(GPIO_FN_SIUBMCK, SIUBMCK_MARK), + GPIO_FN(SIUBFCK), + GPIO_FN(SIUBILR), + GPIO_FN(SIUBIBT), + GPIO_FN(SIUBISLD), + GPIO_FN(SIUBOLR), + GPIO_FN(SIUBOBT), + GPIO_FN(SIUBOSLD), + GPIO_FN(SIUBMCK), /* IRDA */ - PINMUX_GPIO(GPIO_FN_IRDA_IN, IRDA_IN_MARK), - PINMUX_GPIO(GPIO_FN_IRDA_OUT, IRDA_OUT_MARK), + GPIO_FN(IRDA_IN), + GPIO_FN(IRDA_OUT), /* VOU */ - PINMUX_GPIO(GPIO_FN_DV_CLKI, DV_CLKI_MARK), - PINMUX_GPIO(GPIO_FN_DV_CLK, DV_CLK_MARK), - PINMUX_GPIO(GPIO_FN_DV_HSYNC, DV_HSYNC_MARK), - PINMUX_GPIO(GPIO_FN_DV_VSYNC, DV_VSYNC_MARK), - PINMUX_GPIO(GPIO_FN_DV_D15, DV_D15_MARK), - PINMUX_GPIO(GPIO_FN_DV_D14, DV_D14_MARK), - PINMUX_GPIO(GPIO_FN_DV_D13, DV_D13_MARK), - PINMUX_GPIO(GPIO_FN_DV_D12, DV_D12_MARK), - PINMUX_GPIO(GPIO_FN_DV_D11, DV_D11_MARK), - PINMUX_GPIO(GPIO_FN_DV_D10, DV_D10_MARK), - PINMUX_GPIO(GPIO_FN_DV_D9, DV_D9_MARK), - PINMUX_GPIO(GPIO_FN_DV_D8, DV_D8_MARK), - PINMUX_GPIO(GPIO_FN_DV_D7, DV_D7_MARK), - PINMUX_GPIO(GPIO_FN_DV_D6, DV_D6_MARK), - PINMUX_GPIO(GPIO_FN_DV_D5, DV_D5_MARK), - PINMUX_GPIO(GPIO_FN_DV_D4, DV_D4_MARK), - PINMUX_GPIO(GPIO_FN_DV_D3, DV_D3_MARK), - PINMUX_GPIO(GPIO_FN_DV_D2, DV_D2_MARK), - PINMUX_GPIO(GPIO_FN_DV_D1, DV_D1_MARK), - PINMUX_GPIO(GPIO_FN_DV_D0, DV_D0_MARK), + GPIO_FN(DV_CLKI), + GPIO_FN(DV_CLK), + GPIO_FN(DV_HSYNC), + GPIO_FN(DV_VSYNC), + GPIO_FN(DV_D15), + GPIO_FN(DV_D14), + GPIO_FN(DV_D13), + GPIO_FN(DV_D12), + GPIO_FN(DV_D11), + GPIO_FN(DV_D10), + GPIO_FN(DV_D9), + GPIO_FN(DV_D8), + GPIO_FN(DV_D7), + GPIO_FN(DV_D6), + GPIO_FN(DV_D5), + GPIO_FN(DV_D4), + GPIO_FN(DV_D3), + GPIO_FN(DV_D2), + GPIO_FN(DV_D1), + GPIO_FN(DV_D0), /* KEYSC */ - PINMUX_GPIO(GPIO_FN_KEYIN0, KEYIN0_MARK), - PINMUX_GPIO(GPIO_FN_KEYIN1, KEYIN1_MARK), - PINMUX_GPIO(GPIO_FN_KEYIN2, KEYIN2_MARK), - PINMUX_GPIO(GPIO_FN_KEYIN3, KEYIN3_MARK), - PINMUX_GPIO(GPIO_FN_KEYIN4, KEYIN4_MARK), - PINMUX_GPIO(GPIO_FN_KEYOUT0, KEYOUT0_MARK), - PINMUX_GPIO(GPIO_FN_KEYOUT1, KEYOUT1_MARK), - PINMUX_GPIO(GPIO_FN_KEYOUT2, KEYOUT2_MARK), - PINMUX_GPIO(GPIO_FN_KEYOUT3, KEYOUT3_MARK), - PINMUX_GPIO(GPIO_FN_KEYOUT4_IN6, KEYOUT4_IN6_MARK), - PINMUX_GPIO(GPIO_FN_KEYOUT5_IN5, KEYOUT5_IN5_MARK), + GPIO_FN(KEYIN0), + GPIO_FN(KEYIN1), + GPIO_FN(KEYIN2), + GPIO_FN(KEYIN3), + GPIO_FN(KEYIN4), + GPIO_FN(KEYOUT0), + GPIO_FN(KEYOUT1), + GPIO_FN(KEYOUT2), + GPIO_FN(KEYOUT3), + GPIO_FN(KEYOUT4_IN6), + GPIO_FN(KEYOUT5_IN5), /* MSIOF0 (PTF) */ - PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_TXD, MSIOF0_PTF_TXD_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_RXD, MSIOF0_PTF_RXD_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_MCK, MSIOF0_PTF_MCK_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_TSYNC, MSIOF0_PTF_TSYNC_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_TSCK, MSIOF0_PTF_TSCK_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_RSYNC, MSIOF0_PTF_RSYNC_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_RSCK, MSIOF0_PTF_RSCK_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_SS1, MSIOF0_PTF_SS1_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_SS2, MSIOF0_PTF_SS2_MARK), + GPIO_FN(MSIOF0_PTF_TXD), + GPIO_FN(MSIOF0_PTF_RXD), + GPIO_FN(MSIOF0_PTF_MCK), + GPIO_FN(MSIOF0_PTF_TSYNC), + GPIO_FN(MSIOF0_PTF_TSCK), + GPIO_FN(MSIOF0_PTF_RSYNC), + GPIO_FN(MSIOF0_PTF_RSCK), + GPIO_FN(MSIOF0_PTF_SS1), + GPIO_FN(MSIOF0_PTF_SS2), /* MSIOF0 (PTT+PTX) */ - PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_TXD, MSIOF0_PTT_TXD_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_RXD, MSIOF0_PTT_RXD_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_PTX_MCK, MSIOF0_PTX_MCK_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_TSYNC, MSIOF0_PTT_TSYNC_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_TSCK, MSIOF0_PTT_TSCK_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_RSYNC, MSIOF0_PTT_RSYNC_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_RSCK, MSIOF0_PTT_RSCK_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_SS1, MSIOF0_PTT_SS1_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_SS2, MSIOF0_PTT_SS2_MARK), + GPIO_FN(MSIOF0_PTT_TXD), + GPIO_FN(MSIOF0_PTT_RXD), + GPIO_FN(MSIOF0_PTX_MCK), + GPIO_FN(MSIOF0_PTT_TSYNC), + GPIO_FN(MSIOF0_PTT_TSCK), + GPIO_FN(MSIOF0_PTT_RSYNC), + GPIO_FN(MSIOF0_PTT_RSCK), + GPIO_FN(MSIOF0_PTT_SS1), + GPIO_FN(MSIOF0_PTT_SS2), /* MSIOF1 */ - PINMUX_GPIO(GPIO_FN_MSIOF1_TXD, MSIOF1_TXD_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF1_RXD, MSIOF1_RXD_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF1_MCK, MSIOF1_MCK_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF1_TSYNC, MSIOF1_TSYNC_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF1_TSCK, MSIOF1_TSCK_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF1_RSYNC, MSIOF1_RSYNC_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF1_RSCK, MSIOF1_RSCK_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF1_SS1, MSIOF1_SS1_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF1_SS2, MSIOF1_SS2_MARK), + GPIO_FN(MSIOF1_TXD), + GPIO_FN(MSIOF1_RXD), + GPIO_FN(MSIOF1_MCK), + GPIO_FN(MSIOF1_TSYNC), + GPIO_FN(MSIOF1_TSCK), + GPIO_FN(MSIOF1_RSYNC), + GPIO_FN(MSIOF1_RSCK), + GPIO_FN(MSIOF1_SS1), + GPIO_FN(MSIOF1_SS2), /* TSIF */ - PINMUX_GPIO(GPIO_FN_TS0_SDAT, TS0_SDAT_MARK), - PINMUX_GPIO(GPIO_FN_TS0_SCK, TS0_SCK_MARK), - PINMUX_GPIO(GPIO_FN_TS0_SDEN, TS0_SDEN_MARK), - PINMUX_GPIO(GPIO_FN_TS0_SPSYNC, TS0_SPSYNC_MARK), + GPIO_FN(TS0_SDAT), + GPIO_FN(TS0_SCK), + GPIO_FN(TS0_SDEN), + GPIO_FN(TS0_SPSYNC), /* FLCTL */ - PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK), - PINMUX_GPIO(GPIO_FN_NAF7, NAF7_MARK), - PINMUX_GPIO(GPIO_FN_NAF6, NAF6_MARK), - PINMUX_GPIO(GPIO_FN_NAF5, NAF5_MARK), - PINMUX_GPIO(GPIO_FN_NAF4, NAF4_MARK), - PINMUX_GPIO(GPIO_FN_NAF3, NAF3_MARK), - PINMUX_GPIO(GPIO_FN_NAF2, NAF2_MARK), - PINMUX_GPIO(GPIO_FN_NAF1, NAF1_MARK), - PINMUX_GPIO(GPIO_FN_NAF0, NAF0_MARK), - PINMUX_GPIO(GPIO_FN_FCDE, FCDE_MARK), - PINMUX_GPIO(GPIO_FN_FOE, FOE_MARK), - PINMUX_GPIO(GPIO_FN_FSC, FSC_MARK), - PINMUX_GPIO(GPIO_FN_FWE, FWE_MARK), - PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK), + GPIO_FN(FCE), + GPIO_FN(NAF7), + GPIO_FN(NAF6), + GPIO_FN(NAF5), + GPIO_FN(NAF4), + GPIO_FN(NAF3), + GPIO_FN(NAF2), + GPIO_FN(NAF1), + GPIO_FN(NAF0), + GPIO_FN(FCDE), + GPIO_FN(FOE), + GPIO_FN(FSC), + GPIO_FN(FWE), + GPIO_FN(FRB), /* DMAC */ - PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK), - PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK), - PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK), - PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK), + GPIO_FN(DACK1), + GPIO_FN(DREQ1), + GPIO_FN(DACK0), + GPIO_FN(DREQ0), /* ADC */ - PINMUX_GPIO(GPIO_FN_AN3, AN3_MARK), - PINMUX_GPIO(GPIO_FN_AN2, AN2_MARK), - PINMUX_GPIO(GPIO_FN_AN1, AN1_MARK), - PINMUX_GPIO(GPIO_FN_AN0, AN0_MARK), - PINMUX_GPIO(GPIO_FN_ADTRG, ADTRG_MARK), + GPIO_FN(AN3), + GPIO_FN(AN2), + GPIO_FN(AN1), + GPIO_FN(AN0), + GPIO_FN(ADTRG), /* CPG */ - PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK), - PINMUX_GPIO(GPIO_FN_PDSTATUS, PDSTATUS_MARK), + GPIO_FN(STATUS0), + GPIO_FN(PDSTATUS), /* TPU */ - PINMUX_GPIO(GPIO_FN_TPUTO0, TPUTO0_MARK), - PINMUX_GPIO(GPIO_FN_TPUTO1, TPUTO1_MARK), - PINMUX_GPIO(GPIO_FN_TPUTO2, TPUTO2_MARK), - PINMUX_GPIO(GPIO_FN_TPUTO3, TPUTO3_MARK), + GPIO_FN(TPUTO0), + GPIO_FN(TPUTO1), + GPIO_FN(TPUTO2), + GPIO_FN(TPUTO3), /* BSC */ - PINMUX_GPIO(GPIO_FN_D31, D31_MARK), - PINMUX_GPIO(GPIO_FN_D30, D30_MARK), - PINMUX_GPIO(GPIO_FN_D29, D29_MARK), - PINMUX_GPIO(GPIO_FN_D28, D28_MARK), - PINMUX_GPIO(GPIO_FN_D27, D27_MARK), - PINMUX_GPIO(GPIO_FN_D26, D26_MARK), - PINMUX_GPIO(GPIO_FN_D25, D25_MARK), - PINMUX_GPIO(GPIO_FN_D24, D24_MARK), - PINMUX_GPIO(GPIO_FN_D23, D23_MARK), - PINMUX_GPIO(GPIO_FN_D22, D22_MARK), - PINMUX_GPIO(GPIO_FN_D21, D21_MARK), - PINMUX_GPIO(GPIO_FN_D20, D20_MARK), - PINMUX_GPIO(GPIO_FN_D19, D19_MARK), - PINMUX_GPIO(GPIO_FN_D18, D18_MARK), - PINMUX_GPIO(GPIO_FN_D17, D17_MARK), - PINMUX_GPIO(GPIO_FN_D16, D16_MARK), - PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK), - PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK), - PINMUX_GPIO(GPIO_FN_BS, BS_MARK), - PINMUX_GPIO(GPIO_FN_A25, A25_MARK), - PINMUX_GPIO(GPIO_FN_A24, A24_MARK), - PINMUX_GPIO(GPIO_FN_A23, A23_MARK), - PINMUX_GPIO(GPIO_FN_A22, A22_MARK), - PINMUX_GPIO(GPIO_FN_CS6B_CE1B, CS6B_CE1B_MARK), - PINMUX_GPIO(GPIO_FN_CS6A_CE2B, CS6A_CE2B_MARK), - PINMUX_GPIO(GPIO_FN_CS5B_CE1A, CS5B_CE1A_MARK), - PINMUX_GPIO(GPIO_FN_CS5A_CE2A, CS5A_CE2A_MARK), - PINMUX_GPIO(GPIO_FN_WE3_ICIOWR, WE3_ICIOWR_MARK), - PINMUX_GPIO(GPIO_FN_WE2_ICIORD, WE2_ICIORD_MARK), + GPIO_FN(D31), + GPIO_FN(D30), + GPIO_FN(D29), + GPIO_FN(D28), + GPIO_FN(D27), + GPIO_FN(D26), + GPIO_FN(D25), + GPIO_FN(D24), + GPIO_FN(D23), + GPIO_FN(D22), + GPIO_FN(D21), + GPIO_FN(D20), + GPIO_FN(D19), + GPIO_FN(D18), + GPIO_FN(D17), + GPIO_FN(D16), + GPIO_FN(IOIS16), + GPIO_FN(WAIT), + GPIO_FN(BS), + GPIO_FN(A25), + GPIO_FN(A24), + GPIO_FN(A23), + GPIO_FN(A22), + GPIO_FN(CS6B_CE1B), + GPIO_FN(CS6A_CE2B), + GPIO_FN(CS5B_CE1A), + GPIO_FN(CS5A_CE2A), + GPIO_FN(WE3_ICIOWR), + GPIO_FN(WE2_ICIORD), /* ATAPI */ - PINMUX_GPIO(GPIO_FN_IDED15, IDED15_MARK), - PINMUX_GPIO(GPIO_FN_IDED14, IDED14_MARK), - PINMUX_GPIO(GPIO_FN_IDED13, IDED13_MARK), - PINMUX_GPIO(GPIO_FN_IDED12, IDED12_MARK), - PINMUX_GPIO(GPIO_FN_IDED11, IDED11_MARK), - PINMUX_GPIO(GPIO_FN_IDED10, IDED10_MARK), - PINMUX_GPIO(GPIO_FN_IDED9, IDED9_MARK), - PINMUX_GPIO(GPIO_FN_IDED8, IDED8_MARK), - PINMUX_GPIO(GPIO_FN_IDED7, IDED7_MARK), - PINMUX_GPIO(GPIO_FN_IDED6, IDED6_MARK), - PINMUX_GPIO(GPIO_FN_IDED5, IDED5_MARK), - PINMUX_GPIO(GPIO_FN_IDED4, IDED4_MARK), - PINMUX_GPIO(GPIO_FN_IDED3, IDED3_MARK), - PINMUX_GPIO(GPIO_FN_IDED2, IDED2_MARK), - PINMUX_GPIO(GPIO_FN_IDED1, IDED1_MARK), - PINMUX_GPIO(GPIO_FN_IDED0, IDED0_MARK), - PINMUX_GPIO(GPIO_FN_DIRECTION, DIRECTION_MARK), - PINMUX_GPIO(GPIO_FN_EXBUF_ENB, EXBUF_ENB_MARK), - PINMUX_GPIO(GPIO_FN_IDERST, IDERST_MARK), - PINMUX_GPIO(GPIO_FN_IODACK, IODACK_MARK), - PINMUX_GPIO(GPIO_FN_IODREQ, IODREQ_MARK), - PINMUX_GPIO(GPIO_FN_IDEIORDY, IDEIORDY_MARK), - PINMUX_GPIO(GPIO_FN_IDEINT, IDEINT_MARK), - PINMUX_GPIO(GPIO_FN_IDEIOWR, IDEIOWR_MARK), - PINMUX_GPIO(GPIO_FN_IDEIORD, IDEIORD_MARK), - PINMUX_GPIO(GPIO_FN_IDECS1, IDECS1_MARK), - PINMUX_GPIO(GPIO_FN_IDECS0, IDECS0_MARK), - PINMUX_GPIO(GPIO_FN_IDEA2, IDEA2_MARK), - PINMUX_GPIO(GPIO_FN_IDEA1, IDEA1_MARK), - PINMUX_GPIO(GPIO_FN_IDEA0, IDEA0_MARK), + GPIO_FN(IDED15), + GPIO_FN(IDED14), + GPIO_FN(IDED13), + GPIO_FN(IDED12), + GPIO_FN(IDED11), + GPIO_FN(IDED10), + GPIO_FN(IDED9), + GPIO_FN(IDED8), + GPIO_FN(IDED7), + GPIO_FN(IDED6), + GPIO_FN(IDED5), + GPIO_FN(IDED4), + GPIO_FN(IDED3), + GPIO_FN(IDED2), + GPIO_FN(IDED1), + GPIO_FN(IDED0), + GPIO_FN(DIRECTION), + GPIO_FN(EXBUF_ENB), + GPIO_FN(IDERST), + GPIO_FN(IODACK), + GPIO_FN(IODREQ), + GPIO_FN(IDEIORDY), + GPIO_FN(IDEINT), + GPIO_FN(IDEIOWR), + GPIO_FN(IDEIORD), + GPIO_FN(IDECS1), + GPIO_FN(IDECS0), + GPIO_FN(IDEA2), + GPIO_FN(IDEA1), + GPIO_FN(IDEA0), }; -static struct pinmux_cfg_reg pinmux_config_regs[] = { +static const struct pinmux_cfg_reg pinmux_config_regs[] = { { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) { PTA7_FN, PTA7_OUT, 0, PTA7_IN, PTA6_FN, PTA6_OUT, 0, PTA6_IN, @@ -1785,7 +1789,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { {} }; -static struct pinmux_data_reg pinmux_data_regs[] = { +static const struct pinmux_data_reg pinmux_data_regs[] = { { PINMUX_DATA_REG("PADR", 0xa4050120, 8) { PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA, PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA } @@ -1881,20 +1885,18 @@ static struct pinmux_data_reg pinmux_data_regs[] = { { }, }; -struct sh_pfc_soc_info sh7723_pinmux_info = { +const struct sh_pfc_soc_info sh7723_pinmux_info = { .name = "sh7723_pfc", - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - .first_gpio = GPIO_PTA7, - .last_gpio = GPIO_FN_IDEA0, + .pins = pinmux_pins, + .nr_pins = ARRAY_SIZE(pinmux_pins), + .func_gpios = pinmux_func_gpios, + .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios), - .gpios = pinmux_gpios, .cfg_regs = pinmux_config_regs, .data_regs = pinmux_data_regs, diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7724.c b/drivers/pinctrl/sh-pfc/pfc-sh7724.c index 233fbf750b39..35e551609805 100644 --- a/drivers/pinctrl/sh-pfc/pfc-sh7724.c +++ b/drivers/pinctrl/sh-pfc/pfc-sh7724.c @@ -572,7 +572,7 @@ enum { PINMUX_MARK_END, }; -static pinmux_enum_t pinmux_data[] = { +static const pinmux_enum_t pinmux_data[] = { /* PTA GPIO */ PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT, PTA7_IN_PU), PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT, PTA6_IN_PU), @@ -1192,7 +1192,7 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_DATA(SCIF3_I_TXD_MARK, PSB14_1, PTZ3_FN), }; -static struct pinmux_gpio pinmux_gpios[] = { +static struct sh_pfc_pin pinmux_pins[] = { /* PTA */ PINMUX_GPIO(GPIO_PTA7, PTA7_DATA), PINMUX_GPIO(GPIO_PTA6, PTA6_DATA), @@ -1418,372 +1418,376 @@ static struct pinmux_gpio pinmux_gpios[] = { PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA), PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA), PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA), +}; + +#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) +static const struct pinmux_func pinmux_func_gpios[] = { /* BSC */ - PINMUX_GPIO(GPIO_FN_D31, D31_MARK), - PINMUX_GPIO(GPIO_FN_D30, D30_MARK), - PINMUX_GPIO(GPIO_FN_D29, D29_MARK), - PINMUX_GPIO(GPIO_FN_D28, D28_MARK), - PINMUX_GPIO(GPIO_FN_D27, D27_MARK), - PINMUX_GPIO(GPIO_FN_D26, D26_MARK), - PINMUX_GPIO(GPIO_FN_D25, D25_MARK), - PINMUX_GPIO(GPIO_FN_D24, D24_MARK), - PINMUX_GPIO(GPIO_FN_D23, D23_MARK), - PINMUX_GPIO(GPIO_FN_D22, D22_MARK), - PINMUX_GPIO(GPIO_FN_D21, D21_MARK), - PINMUX_GPIO(GPIO_FN_D20, D20_MARK), - PINMUX_GPIO(GPIO_FN_D19, D19_MARK), - PINMUX_GPIO(GPIO_FN_D18, D18_MARK), - PINMUX_GPIO(GPIO_FN_D17, D17_MARK), - PINMUX_GPIO(GPIO_FN_D16, D16_MARK), - PINMUX_GPIO(GPIO_FN_D15, D15_MARK), - PINMUX_GPIO(GPIO_FN_D14, D14_MARK), - PINMUX_GPIO(GPIO_FN_D13, D13_MARK), - PINMUX_GPIO(GPIO_FN_D12, D12_MARK), - PINMUX_GPIO(GPIO_FN_D11, D11_MARK), - PINMUX_GPIO(GPIO_FN_D10, D10_MARK), - PINMUX_GPIO(GPIO_FN_D9, D9_MARK), - PINMUX_GPIO(GPIO_FN_D8, D8_MARK), - PINMUX_GPIO(GPIO_FN_D7, D7_MARK), - PINMUX_GPIO(GPIO_FN_D6, D6_MARK), - PINMUX_GPIO(GPIO_FN_D5, D5_MARK), - PINMUX_GPIO(GPIO_FN_D4, D4_MARK), - PINMUX_GPIO(GPIO_FN_D3, D3_MARK), - PINMUX_GPIO(GPIO_FN_D2, D2_MARK), - PINMUX_GPIO(GPIO_FN_D1, D1_MARK), - PINMUX_GPIO(GPIO_FN_D0, D0_MARK), - PINMUX_GPIO(GPIO_FN_A25, A25_MARK), - PINMUX_GPIO(GPIO_FN_A24, A24_MARK), - PINMUX_GPIO(GPIO_FN_A23, A23_MARK), - PINMUX_GPIO(GPIO_FN_A22, A22_MARK), - PINMUX_GPIO(GPIO_FN_CS6B_CE1B, CS6B_CE1B_MARK), - PINMUX_GPIO(GPIO_FN_CS6A_CE2B, CS6A_CE2B_MARK), - PINMUX_GPIO(GPIO_FN_CS5B_CE1A, CS5B_CE1A_MARK), - PINMUX_GPIO(GPIO_FN_CS5A_CE2A, CS5A_CE2A_MARK), - PINMUX_GPIO(GPIO_FN_WE3_ICIOWR, WE3_ICIOWR_MARK), - PINMUX_GPIO(GPIO_FN_WE2_ICIORD, WE2_ICIORD_MARK), - PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK), - PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK), - PINMUX_GPIO(GPIO_FN_BS, BS_MARK), + GPIO_FN(D31), + GPIO_FN(D30), + GPIO_FN(D29), + GPIO_FN(D28), + GPIO_FN(D27), + GPIO_FN(D26), + GPIO_FN(D25), + GPIO_FN(D24), + GPIO_FN(D23), + GPIO_FN(D22), + GPIO_FN(D21), + GPIO_FN(D20), + GPIO_FN(D19), + GPIO_FN(D18), + GPIO_FN(D17), + GPIO_FN(D16), + GPIO_FN(D15), + GPIO_FN(D14), + GPIO_FN(D13), + GPIO_FN(D12), + GPIO_FN(D11), + GPIO_FN(D10), + GPIO_FN(D9), + GPIO_FN(D8), + GPIO_FN(D7), + GPIO_FN(D6), + GPIO_FN(D5), + GPIO_FN(D4), + GPIO_FN(D3), + GPIO_FN(D2), + GPIO_FN(D1), + GPIO_FN(D0), + GPIO_FN(A25), + GPIO_FN(A24), + GPIO_FN(A23), + GPIO_FN(A22), + GPIO_FN(CS6B_CE1B), + GPIO_FN(CS6A_CE2B), + GPIO_FN(CS5B_CE1A), + GPIO_FN(CS5A_CE2A), + GPIO_FN(WE3_ICIOWR), + GPIO_FN(WE2_ICIORD), + GPIO_FN(IOIS16), + GPIO_FN(WAIT), + GPIO_FN(BS), /* KEYSC */ - PINMUX_GPIO(GPIO_FN_KEYOUT5_IN5, KEYOUT5_IN5_MARK), - PINMUX_GPIO(GPIO_FN_KEYOUT4_IN6, KEYOUT4_IN6_MARK), - PINMUX_GPIO(GPIO_FN_KEYIN4, KEYIN4_MARK), - PINMUX_GPIO(GPIO_FN_KEYIN3, KEYIN3_MARK), - PINMUX_GPIO(GPIO_FN_KEYIN2, KEYIN2_MARK), - PINMUX_GPIO(GPIO_FN_KEYIN1, KEYIN1_MARK), - PINMUX_GPIO(GPIO_FN_KEYIN0, KEYIN0_MARK), - PINMUX_GPIO(GPIO_FN_KEYOUT3, KEYOUT3_MARK), - PINMUX_GPIO(GPIO_FN_KEYOUT2, KEYOUT2_MARK), - PINMUX_GPIO(GPIO_FN_KEYOUT1, KEYOUT1_MARK), - PINMUX_GPIO(GPIO_FN_KEYOUT0, KEYOUT0_MARK), + GPIO_FN(KEYOUT5_IN5), + GPIO_FN(KEYOUT4_IN6), + GPIO_FN(KEYIN4), + GPIO_FN(KEYIN3), + GPIO_FN(KEYIN2), + GPIO_FN(KEYIN1), + GPIO_FN(KEYIN0), + GPIO_FN(KEYOUT3), + GPIO_FN(KEYOUT2), + GPIO_FN(KEYOUT1), + GPIO_FN(KEYOUT0), /* ATAPI */ - PINMUX_GPIO(GPIO_FN_IDED15, IDED15_MARK), - PINMUX_GPIO(GPIO_FN_IDED14, IDED14_MARK), - PINMUX_GPIO(GPIO_FN_IDED13, IDED13_MARK), - PINMUX_GPIO(GPIO_FN_IDED12, IDED12_MARK), - PINMUX_GPIO(GPIO_FN_IDED11, IDED11_MARK), - PINMUX_GPIO(GPIO_FN_IDED10, IDED10_MARK), - PINMUX_GPIO(GPIO_FN_IDED9, IDED9_MARK), - PINMUX_GPIO(GPIO_FN_IDED8, IDED8_MARK), - PINMUX_GPIO(GPIO_FN_IDED7, IDED7_MARK), - PINMUX_GPIO(GPIO_FN_IDED6, IDED6_MARK), - PINMUX_GPIO(GPIO_FN_IDED5, IDED5_MARK), - PINMUX_GPIO(GPIO_FN_IDED4, IDED4_MARK), - PINMUX_GPIO(GPIO_FN_IDED3, IDED3_MARK), - PINMUX_GPIO(GPIO_FN_IDED2, IDED2_MARK), - PINMUX_GPIO(GPIO_FN_IDED1, IDED1_MARK), - PINMUX_GPIO(GPIO_FN_IDED0, IDED0_MARK), - PINMUX_GPIO(GPIO_FN_IDEA2, IDEA2_MARK), - PINMUX_GPIO(GPIO_FN_IDEA1, IDEA1_MARK), - PINMUX_GPIO(GPIO_FN_IDEA0, IDEA0_MARK), - PINMUX_GPIO(GPIO_FN_IDEIOWR, IDEIOWR_MARK), - PINMUX_GPIO(GPIO_FN_IODREQ, IODREQ_MARK), - PINMUX_GPIO(GPIO_FN_IDECS0, IDECS0_MARK), - PINMUX_GPIO(GPIO_FN_IDECS1, IDECS1_MARK), - PINMUX_GPIO(GPIO_FN_IDEIORD, IDEIORD_MARK), - PINMUX_GPIO(GPIO_FN_DIRECTION, DIRECTION_MARK), - PINMUX_GPIO(GPIO_FN_EXBUF_ENB, EXBUF_ENB_MARK), - PINMUX_GPIO(GPIO_FN_IDERST, IDERST_MARK), - PINMUX_GPIO(GPIO_FN_IODACK, IODACK_MARK), - PINMUX_GPIO(GPIO_FN_IDEINT, IDEINT_MARK), - PINMUX_GPIO(GPIO_FN_IDEIORDY, IDEIORDY_MARK), + GPIO_FN(IDED15), + GPIO_FN(IDED14), + GPIO_FN(IDED13), + GPIO_FN(IDED12), + GPIO_FN(IDED11), + GPIO_FN(IDED10), + GPIO_FN(IDED9), + GPIO_FN(IDED8), + GPIO_FN(IDED7), + GPIO_FN(IDED6), + GPIO_FN(IDED5), + GPIO_FN(IDED4), + GPIO_FN(IDED3), + GPIO_FN(IDED2), + GPIO_FN(IDED1), + GPIO_FN(IDED0), + GPIO_FN(IDEA2), + GPIO_FN(IDEA1), + GPIO_FN(IDEA0), + GPIO_FN(IDEIOWR), + GPIO_FN(IODREQ), + GPIO_FN(IDECS0), + GPIO_FN(IDECS1), + GPIO_FN(IDEIORD), + GPIO_FN(DIRECTION), + GPIO_FN(EXBUF_ENB), + GPIO_FN(IDERST), + GPIO_FN(IODACK), + GPIO_FN(IDEINT), + GPIO_FN(IDEIORDY), /* TPU */ - PINMUX_GPIO(GPIO_FN_TPUTO3, TPUTO3_MARK), - PINMUX_GPIO(GPIO_FN_TPUTO2, TPUTO2_MARK), - PINMUX_GPIO(GPIO_FN_TPUTO1, TPUTO1_MARK), - PINMUX_GPIO(GPIO_FN_TPUTO0, TPUTO0_MARK), - PINMUX_GPIO(GPIO_FN_TPUTI3, TPUTI3_MARK), - PINMUX_GPIO(GPIO_FN_TPUTI2, TPUTI2_MARK), + GPIO_FN(TPUTO3), + GPIO_FN(TPUTO2), + GPIO_FN(TPUTO1), + GPIO_FN(TPUTO0), + GPIO_FN(TPUTI3), + GPIO_FN(TPUTI2), /* LCDC */ - PINMUX_GPIO(GPIO_FN_LCDD23, LCDD23_MARK), - PINMUX_GPIO(GPIO_FN_LCDD22, LCDD22_MARK), - PINMUX_GPIO(GPIO_FN_LCDD21, LCDD21_MARK), - PINMUX_GPIO(GPIO_FN_LCDD20, LCDD20_MARK), - PINMUX_GPIO(GPIO_FN_LCDD19, LCDD19_MARK), - PINMUX_GPIO(GPIO_FN_LCDD18, LCDD18_MARK), - PINMUX_GPIO(GPIO_FN_LCDD17, LCDD17_MARK), - PINMUX_GPIO(GPIO_FN_LCDD16, LCDD16_MARK), - PINMUX_GPIO(GPIO_FN_LCDD15, LCDD15_MARK), - PINMUX_GPIO(GPIO_FN_LCDD14, LCDD14_MARK), - PINMUX_GPIO(GPIO_FN_LCDD13, LCDD13_MARK), - PINMUX_GPIO(GPIO_FN_LCDD12, LCDD12_MARK), - PINMUX_GPIO(GPIO_FN_LCDD11, LCDD11_MARK), - PINMUX_GPIO(GPIO_FN_LCDD10, LCDD10_MARK), - PINMUX_GPIO(GPIO_FN_LCDD9, LCDD9_MARK), - PINMUX_GPIO(GPIO_FN_LCDD8, LCDD8_MARK), - PINMUX_GPIO(GPIO_FN_LCDD7, LCDD7_MARK), - PINMUX_GPIO(GPIO_FN_LCDD6, LCDD6_MARK), - PINMUX_GPIO(GPIO_FN_LCDD5, LCDD5_MARK), - PINMUX_GPIO(GPIO_FN_LCDD4, LCDD4_MARK), - PINMUX_GPIO(GPIO_FN_LCDD3, LCDD3_MARK), - PINMUX_GPIO(GPIO_FN_LCDD2, LCDD2_MARK), - PINMUX_GPIO(GPIO_FN_LCDD1, LCDD1_MARK), - PINMUX_GPIO(GPIO_FN_LCDD0, LCDD0_MARK), - PINMUX_GPIO(GPIO_FN_LCDVSYN, LCDVSYN_MARK), - PINMUX_GPIO(GPIO_FN_LCDDISP, LCDDISP_MARK), - PINMUX_GPIO(GPIO_FN_LCDRS, LCDRS_MARK), - PINMUX_GPIO(GPIO_FN_LCDHSYN, LCDHSYN_MARK), - PINMUX_GPIO(GPIO_FN_LCDCS, LCDCS_MARK), - PINMUX_GPIO(GPIO_FN_LCDDON, LCDDON_MARK), - PINMUX_GPIO(GPIO_FN_LCDDCK, LCDDCK_MARK), - PINMUX_GPIO(GPIO_FN_LCDWR, LCDWR_MARK), - PINMUX_GPIO(GPIO_FN_LCDVEPWC, LCDVEPWC_MARK), - PINMUX_GPIO(GPIO_FN_LCDVCPWC, LCDVCPWC_MARK), - PINMUX_GPIO(GPIO_FN_LCDRD, LCDRD_MARK), - PINMUX_GPIO(GPIO_FN_LCDLCLK, LCDLCLK_MARK), + GPIO_FN(LCDD23), + GPIO_FN(LCDD22), + GPIO_FN(LCDD21), + GPIO_FN(LCDD20), + GPIO_FN(LCDD19), + GPIO_FN(LCDD18), + GPIO_FN(LCDD17), + GPIO_FN(LCDD16), + GPIO_FN(LCDD15), + GPIO_FN(LCDD14), + GPIO_FN(LCDD13), + GPIO_FN(LCDD12), + GPIO_FN(LCDD11), + GPIO_FN(LCDD10), + GPIO_FN(LCDD9), + GPIO_FN(LCDD8), + GPIO_FN(LCDD7), + GPIO_FN(LCDD6), + GPIO_FN(LCDD5), + GPIO_FN(LCDD4), + GPIO_FN(LCDD3), + GPIO_FN(LCDD2), + GPIO_FN(LCDD1), + GPIO_FN(LCDD0), + GPIO_FN(LCDVSYN), + GPIO_FN(LCDDISP), + GPIO_FN(LCDRS), + GPIO_FN(LCDHSYN), + GPIO_FN(LCDCS), + GPIO_FN(LCDDON), + GPIO_FN(LCDDCK), + GPIO_FN(LCDWR), + GPIO_FN(LCDVEPWC), + GPIO_FN(LCDVCPWC), + GPIO_FN(LCDRD), + GPIO_FN(LCDLCLK), /* SCIF0 */ - PINMUX_GPIO(GPIO_FN_SCIF0_TXD, SCIF0_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_RXD, SCIF0_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_SCK, SCIF0_SCK_MARK), + GPIO_FN(SCIF0_TXD), + GPIO_FN(SCIF0_RXD), + GPIO_FN(SCIF0_SCK), /* SCIF1 */ - PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK), + GPIO_FN(SCIF1_SCK), + GPIO_FN(SCIF1_RXD), + GPIO_FN(SCIF1_TXD), /* SCIF2 */ - PINMUX_GPIO(GPIO_FN_SCIF2_L_TXD, SCIF2_L_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF2_L_SCK, SCIF2_L_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SCIF2_L_RXD, SCIF2_L_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF2_V_TXD, SCIF2_V_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF2_V_SCK, SCIF2_V_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SCIF2_V_RXD, SCIF2_V_RXD_MARK), + GPIO_FN(SCIF2_L_TXD), + GPIO_FN(SCIF2_L_SCK), + GPIO_FN(SCIF2_L_RXD), + GPIO_FN(SCIF2_V_TXD), + GPIO_FN(SCIF2_V_SCK), + GPIO_FN(SCIF2_V_RXD), /* SCIF3 */ - PINMUX_GPIO(GPIO_FN_SCIF3_V_SCK, SCIF3_V_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_V_RXD, SCIF3_V_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_V_TXD, SCIF3_V_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_V_CTS, SCIF3_V_CTS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_V_RTS, SCIF3_V_RTS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_I_SCK, SCIF3_I_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_I_RXD, SCIF3_I_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_I_TXD, SCIF3_I_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_I_CTS, SCIF3_I_CTS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_I_RTS, SCIF3_I_RTS_MARK), + GPIO_FN(SCIF3_V_SCK), + GPIO_FN(SCIF3_V_RXD), + GPIO_FN(SCIF3_V_TXD), + GPIO_FN(SCIF3_V_CTS), + GPIO_FN(SCIF3_V_RTS), + GPIO_FN(SCIF3_I_SCK), + GPIO_FN(SCIF3_I_RXD), + GPIO_FN(SCIF3_I_TXD), + GPIO_FN(SCIF3_I_CTS), + GPIO_FN(SCIF3_I_RTS), /* SCIF4 */ - PINMUX_GPIO(GPIO_FN_SCIF4_SCK, SCIF4_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SCIF4_RXD, SCIF4_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF4_TXD, SCIF4_TXD_MARK), + GPIO_FN(SCIF4_SCK), + GPIO_FN(SCIF4_RXD), + GPIO_FN(SCIF4_TXD), /* SCIF5 */ - PINMUX_GPIO(GPIO_FN_SCIF5_SCK, SCIF5_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SCIF5_RXD, SCIF5_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF5_TXD, SCIF5_TXD_MARK), + GPIO_FN(SCIF5_SCK), + GPIO_FN(SCIF5_RXD), + GPIO_FN(SCIF5_TXD), /* FSI */ - PINMUX_GPIO(GPIO_FN_FSIMCKB, FSIMCKB_MARK), - PINMUX_GPIO(GPIO_FN_FSIMCKA, FSIMCKA_MARK), - PINMUX_GPIO(GPIO_FN_FSIOASD, FSIOASD_MARK), - PINMUX_GPIO(GPIO_FN_FSIIABCK, FSIIABCK_MARK), - PINMUX_GPIO(GPIO_FN_FSIIALRCK, FSIIALRCK_MARK), - PINMUX_GPIO(GPIO_FN_FSIOABCK, FSIOABCK_MARK), - PINMUX_GPIO(GPIO_FN_FSIOALRCK, FSIOALRCK_MARK), - PINMUX_GPIO(GPIO_FN_CLKAUDIOAO, CLKAUDIOAO_MARK), - PINMUX_GPIO(GPIO_FN_FSIIBSD, FSIIBSD_MARK), - PINMUX_GPIO(GPIO_FN_FSIOBSD, FSIOBSD_MARK), - PINMUX_GPIO(GPIO_FN_FSIIBBCK, FSIIBBCK_MARK), - PINMUX_GPIO(GPIO_FN_FSIIBLRCK, FSIIBLRCK_MARK), - PINMUX_GPIO(GPIO_FN_FSIOBBCK, FSIOBBCK_MARK), - PINMUX_GPIO(GPIO_FN_FSIOBLRCK, FSIOBLRCK_MARK), - PINMUX_GPIO(GPIO_FN_CLKAUDIOBO, CLKAUDIOBO_MARK), - PINMUX_GPIO(GPIO_FN_FSIIASD, FSIIASD_MARK), + GPIO_FN(FSIMCKB), + GPIO_FN(FSIMCKA), + GPIO_FN(FSIOASD), + GPIO_FN(FSIIABCK), + GPIO_FN(FSIIALRCK), + GPIO_FN(FSIOABCK), + GPIO_FN(FSIOALRCK), + GPIO_FN(CLKAUDIOAO), + GPIO_FN(FSIIBSD), + GPIO_FN(FSIOBSD), + GPIO_FN(FSIIBBCK), + GPIO_FN(FSIIBLRCK), + GPIO_FN(FSIOBBCK), + GPIO_FN(FSIOBLRCK), + GPIO_FN(CLKAUDIOBO), + GPIO_FN(FSIIASD), /* AUD */ - PINMUX_GPIO(GPIO_FN_AUDCK, AUDCK_MARK), - PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK), + GPIO_FN(AUDCK), + GPIO_FN(AUDSYNC), + GPIO_FN(AUDATA3), + GPIO_FN(AUDATA2), + GPIO_FN(AUDATA1), + GPIO_FN(AUDATA0), /* VIO */ - PINMUX_GPIO(GPIO_FN_VIO_CKO, VIO_CKO_MARK), + GPIO_FN(VIO_CKO), /* VIO0 */ - PINMUX_GPIO(GPIO_FN_VIO0_D15, VIO0_D15_MARK), - PINMUX_GPIO(GPIO_FN_VIO0_D14, VIO0_D14_MARK), - PINMUX_GPIO(GPIO_FN_VIO0_D13, VIO0_D13_MARK), - PINMUX_GPIO(GPIO_FN_VIO0_D12, VIO0_D12_MARK), - PINMUX_GPIO(GPIO_FN_VIO0_D11, VIO0_D11_MARK), - PINMUX_GPIO(GPIO_FN_VIO0_D10, VIO0_D10_MARK), - PINMUX_GPIO(GPIO_FN_VIO0_D9, VIO0_D9_MARK), - PINMUX_GPIO(GPIO_FN_VIO0_D8, VIO0_D8_MARK), - PINMUX_GPIO(GPIO_FN_VIO0_D7, VIO0_D7_MARK), - PINMUX_GPIO(GPIO_FN_VIO0_D6, VIO0_D6_MARK), - PINMUX_GPIO(GPIO_FN_VIO0_D5, VIO0_D5_MARK), - PINMUX_GPIO(GPIO_FN_VIO0_D4, VIO0_D4_MARK), - PINMUX_GPIO(GPIO_FN_VIO0_D3, VIO0_D3_MARK), - PINMUX_GPIO(GPIO_FN_VIO0_D2, VIO0_D2_MARK), - PINMUX_GPIO(GPIO_FN_VIO0_D1, VIO0_D1_MARK), - PINMUX_GPIO(GPIO_FN_VIO0_D0, VIO0_D0_MARK), - PINMUX_GPIO(GPIO_FN_VIO0_VD, VIO0_VD_MARK), - PINMUX_GPIO(GPIO_FN_VIO0_CLK, VIO0_CLK_MARK), - PINMUX_GPIO(GPIO_FN_VIO0_FLD, VIO0_FLD_MARK), - PINMUX_GPIO(GPIO_FN_VIO0_HD, VIO0_HD_MARK), + GPIO_FN(VIO0_D15), + GPIO_FN(VIO0_D14), + GPIO_FN(VIO0_D13), + GPIO_FN(VIO0_D12), + GPIO_FN(VIO0_D11), + GPIO_FN(VIO0_D10), + GPIO_FN(VIO0_D9), + GPIO_FN(VIO0_D8), + GPIO_FN(VIO0_D7), + GPIO_FN(VIO0_D6), + GPIO_FN(VIO0_D5), + GPIO_FN(VIO0_D4), + GPIO_FN(VIO0_D3), + GPIO_FN(VIO0_D2), + GPIO_FN(VIO0_D1), + GPIO_FN(VIO0_D0), + GPIO_FN(VIO0_VD), + GPIO_FN(VIO0_CLK), + GPIO_FN(VIO0_FLD), + GPIO_FN(VIO0_HD), /* VIO1 */ - PINMUX_GPIO(GPIO_FN_VIO1_D7, VIO1_D7_MARK), - PINMUX_GPIO(GPIO_FN_VIO1_D6, VIO1_D6_MARK), - PINMUX_GPIO(GPIO_FN_VIO1_D5, VIO1_D5_MARK), - PINMUX_GPIO(GPIO_FN_VIO1_D4, VIO1_D4_MARK), - PINMUX_GPIO(GPIO_FN_VIO1_D3, VIO1_D3_MARK), - PINMUX_GPIO(GPIO_FN_VIO1_D2, VIO1_D2_MARK), - PINMUX_GPIO(GPIO_FN_VIO1_D1, VIO1_D1_MARK), - PINMUX_GPIO(GPIO_FN_VIO1_D0, VIO1_D0_MARK), - PINMUX_GPIO(GPIO_FN_VIO1_FLD, VIO1_FLD_MARK), - PINMUX_GPIO(GPIO_FN_VIO1_HD, VIO1_HD_MARK), - PINMUX_GPIO(GPIO_FN_VIO1_VD, VIO1_VD_MARK), - PINMUX_GPIO(GPIO_FN_VIO1_CLK, VIO1_CLK_MARK), + GPIO_FN(VIO1_D7), + GPIO_FN(VIO1_D6), + GPIO_FN(VIO1_D5), + GPIO_FN(VIO1_D4), + GPIO_FN(VIO1_D3), + GPIO_FN(VIO1_D2), + GPIO_FN(VIO1_D1), + GPIO_FN(VIO1_D0), + GPIO_FN(VIO1_FLD), + GPIO_FN(VIO1_HD), + GPIO_FN(VIO1_VD), + GPIO_FN(VIO1_CLK), /* Eth */ - PINMUX_GPIO(GPIO_FN_RMII_RXD0, RMII_RXD0_MARK), - PINMUX_GPIO(GPIO_FN_RMII_RXD1, RMII_RXD1_MARK), - PINMUX_GPIO(GPIO_FN_RMII_TXD0, RMII_TXD0_MARK), - PINMUX_GPIO(GPIO_FN_RMII_TXD1, RMII_TXD1_MARK), - PINMUX_GPIO(GPIO_FN_RMII_REF_CLK, RMII_REF_CLK_MARK), - PINMUX_GPIO(GPIO_FN_RMII_TX_EN, RMII_TX_EN_MARK), - PINMUX_GPIO(GPIO_FN_RMII_RX_ER, RMII_RX_ER_MARK), - PINMUX_GPIO(GPIO_FN_RMII_CRS_DV, RMII_CRS_DV_MARK), - PINMUX_GPIO(GPIO_FN_LNKSTA, LNKSTA_MARK), - PINMUX_GPIO(GPIO_FN_MDIO, MDIO_MARK), - PINMUX_GPIO(GPIO_FN_MDC, MDC_MARK), + GPIO_FN(RMII_RXD0), + GPIO_FN(RMII_RXD1), + GPIO_FN(RMII_TXD0), + GPIO_FN(RMII_TXD1), + GPIO_FN(RMII_REF_CLK), + GPIO_FN(RMII_TX_EN), + GPIO_FN(RMII_RX_ER), + GPIO_FN(RMII_CRS_DV), + GPIO_FN(LNKSTA), + GPIO_FN(MDIO), + GPIO_FN(MDC), /* System */ - PINMUX_GPIO(GPIO_FN_PDSTATUS, PDSTATUS_MARK), - PINMUX_GPIO(GPIO_FN_STATUS2, STATUS2_MARK), - PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK), + GPIO_FN(PDSTATUS), + GPIO_FN(STATUS2), + GPIO_FN(STATUS0), /* VOU */ - PINMUX_GPIO(GPIO_FN_DV_D15, DV_D15_MARK), - PINMUX_GPIO(GPIO_FN_DV_D14, DV_D14_MARK), - PINMUX_GPIO(GPIO_FN_DV_D13, DV_D13_MARK), - PINMUX_GPIO(GPIO_FN_DV_D12, DV_D12_MARK), - PINMUX_GPIO(GPIO_FN_DV_D11, DV_D11_MARK), - PINMUX_GPIO(GPIO_FN_DV_D10, DV_D10_MARK), - PINMUX_GPIO(GPIO_FN_DV_D9, DV_D9_MARK), - PINMUX_GPIO(GPIO_FN_DV_D8, DV_D8_MARK), - PINMUX_GPIO(GPIO_FN_DV_D7, DV_D7_MARK), - PINMUX_GPIO(GPIO_FN_DV_D6, DV_D6_MARK), - PINMUX_GPIO(GPIO_FN_DV_D5, DV_D5_MARK), - PINMUX_GPIO(GPIO_FN_DV_D4, DV_D4_MARK), - PINMUX_GPIO(GPIO_FN_DV_D3, DV_D3_MARK), - PINMUX_GPIO(GPIO_FN_DV_D2, DV_D2_MARK), - PINMUX_GPIO(GPIO_FN_DV_D1, DV_D1_MARK), - PINMUX_GPIO(GPIO_FN_DV_D0, DV_D0_MARK), - PINMUX_GPIO(GPIO_FN_DV_CLKI, DV_CLKI_MARK), - PINMUX_GPIO(GPIO_FN_DV_CLK, DV_CLK_MARK), - PINMUX_GPIO(GPIO_FN_DV_VSYNC, DV_VSYNC_MARK), - PINMUX_GPIO(GPIO_FN_DV_HSYNC, DV_HSYNC_MARK), + GPIO_FN(DV_D15), + GPIO_FN(DV_D14), + GPIO_FN(DV_D13), + GPIO_FN(DV_D12), + GPIO_FN(DV_D11), + GPIO_FN(DV_D10), + GPIO_FN(DV_D9), + GPIO_FN(DV_D8), + GPIO_FN(DV_D7), + GPIO_FN(DV_D6), + GPIO_FN(DV_D5), + GPIO_FN(DV_D4), + GPIO_FN(DV_D3), + GPIO_FN(DV_D2), + GPIO_FN(DV_D1), + GPIO_FN(DV_D0), + GPIO_FN(DV_CLKI), + GPIO_FN(DV_CLK), + GPIO_FN(DV_VSYNC), + GPIO_FN(DV_HSYNC), /* MSIOF0 */ - PINMUX_GPIO(GPIO_FN_MSIOF0_RXD, MSIOF0_RXD_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_TXD, MSIOF0_TXD_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_MCK, MSIOF0_MCK_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_TSCK, MSIOF0_TSCK_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_SS1, MSIOF0_SS1_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_SS2, MSIOF0_SS2_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_TSYNC, MSIOF0_TSYNC_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_RSCK, MSIOF0_RSCK_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF0_RSYNC, MSIOF0_RSYNC_MARK), + GPIO_FN(MSIOF0_RXD), + GPIO_FN(MSIOF0_TXD), + GPIO_FN(MSIOF0_MCK), + GPIO_FN(MSIOF0_TSCK), + GPIO_FN(MSIOF0_SS1), + GPIO_FN(MSIOF0_SS2), + GPIO_FN(MSIOF0_TSYNC), + GPIO_FN(MSIOF0_RSCK), + GPIO_FN(MSIOF0_RSYNC), /* MSIOF1 */ - PINMUX_GPIO(GPIO_FN_MSIOF1_RXD, MSIOF1_RXD_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF1_TXD, MSIOF1_TXD_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF1_MCK, MSIOF1_MCK_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF1_TSCK, MSIOF1_TSCK_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF1_SS1, MSIOF1_SS1_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF1_SS2, MSIOF1_SS2_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF1_TSYNC, MSIOF1_TSYNC_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF1_RSCK, MSIOF1_RSCK_MARK), - PINMUX_GPIO(GPIO_FN_MSIOF1_RSYNC, MSIOF1_RSYNC_MARK), + GPIO_FN(MSIOF1_RXD), + GPIO_FN(MSIOF1_TXD), + GPIO_FN(MSIOF1_MCK), + GPIO_FN(MSIOF1_TSCK), + GPIO_FN(MSIOF1_SS1), + GPIO_FN(MSIOF1_SS2), + GPIO_FN(MSIOF1_TSYNC), + GPIO_FN(MSIOF1_RSCK), + GPIO_FN(MSIOF1_RSYNC), /* DMAC */ - PINMUX_GPIO(GPIO_FN_DMAC_DACK0, DMAC_DACK0_MARK), - PINMUX_GPIO(GPIO_FN_DMAC_DREQ0, DMAC_DREQ0_MARK), - PINMUX_GPIO(GPIO_FN_DMAC_DACK1, DMAC_DACK1_MARK), - PINMUX_GPIO(GPIO_FN_DMAC_DREQ1, DMAC_DREQ1_MARK), + GPIO_FN(DMAC_DACK0), + GPIO_FN(DMAC_DREQ0), + GPIO_FN(DMAC_DACK1), + GPIO_FN(DMAC_DREQ1), /* SDHI0 */ - PINMUX_GPIO(GPIO_FN_SDHI0CD, SDHI0CD_MARK), - PINMUX_GPIO(GPIO_FN_SDHI0WP, SDHI0WP_MARK), - PINMUX_GPIO(GPIO_FN_SDHI0CMD, SDHI0CMD_MARK), - PINMUX_GPIO(GPIO_FN_SDHI0CLK, SDHI0CLK_MARK), - PINMUX_GPIO(GPIO_FN_SDHI0D3, SDHI0D3_MARK), - PINMUX_GPIO(GPIO_FN_SDHI0D2, SDHI0D2_MARK), - PINMUX_GPIO(GPIO_FN_SDHI0D1, SDHI0D1_MARK), - PINMUX_GPIO(GPIO_FN_SDHI0D0, SDHI0D0_MARK), + GPIO_FN(SDHI0CD), + GPIO_FN(SDHI0WP), + GPIO_FN(SDHI0CMD), + GPIO_FN(SDHI0CLK), + GPIO_FN(SDHI0D3), + GPIO_FN(SDHI0D2), + GPIO_FN(SDHI0D1), + GPIO_FN(SDHI0D0), /* SDHI1 */ - PINMUX_GPIO(GPIO_FN_SDHI1CD, SDHI1CD_MARK), - PINMUX_GPIO(GPIO_FN_SDHI1WP, SDHI1WP_MARK), - PINMUX_GPIO(GPIO_FN_SDHI1CMD, SDHI1CMD_MARK), - PINMUX_GPIO(GPIO_FN_SDHI1CLK, SDHI1CLK_MARK), - PINMUX_GPIO(GPIO_FN_SDHI1D3, SDHI1D3_MARK), - PINMUX_GPIO(GPIO_FN_SDHI1D2, SDHI1D2_MARK), - PINMUX_GPIO(GPIO_FN_SDHI1D1, SDHI1D1_MARK), - PINMUX_GPIO(GPIO_FN_SDHI1D0, SDHI1D0_MARK), + GPIO_FN(SDHI1CD), + GPIO_FN(SDHI1WP), + GPIO_FN(SDHI1CMD), + GPIO_FN(SDHI1CLK), + GPIO_FN(SDHI1D3), + GPIO_FN(SDHI1D2), + GPIO_FN(SDHI1D1), + GPIO_FN(SDHI1D0), /* MMC */ - PINMUX_GPIO(GPIO_FN_MMC_D7, MMC_D7_MARK), - PINMUX_GPIO(GPIO_FN_MMC_D6, MMC_D6_MARK), - PINMUX_GPIO(GPIO_FN_MMC_D5, MMC_D5_MARK), - PINMUX_GPIO(GPIO_FN_MMC_D4, MMC_D4_MARK), - PINMUX_GPIO(GPIO_FN_MMC_D3, MMC_D3_MARK), - PINMUX_GPIO(GPIO_FN_MMC_D2, MMC_D2_MARK), - PINMUX_GPIO(GPIO_FN_MMC_D1, MMC_D1_MARK), - PINMUX_GPIO(GPIO_FN_MMC_D0, MMC_D0_MARK), - PINMUX_GPIO(GPIO_FN_MMC_CLK, MMC_CLK_MARK), - PINMUX_GPIO(GPIO_FN_MMC_CMD, MMC_CMD_MARK), + GPIO_FN(MMC_D7), + GPIO_FN(MMC_D6), + GPIO_FN(MMC_D5), + GPIO_FN(MMC_D4), + GPIO_FN(MMC_D3), + GPIO_FN(MMC_D2), + GPIO_FN(MMC_D1), + GPIO_FN(MMC_D0), + GPIO_FN(MMC_CLK), + GPIO_FN(MMC_CMD), /* IrDA */ - PINMUX_GPIO(GPIO_FN_IRDA_OUT, IRDA_OUT_MARK), - PINMUX_GPIO(GPIO_FN_IRDA_IN, IRDA_IN_MARK), + GPIO_FN(IRDA_OUT), + GPIO_FN(IRDA_IN), /* TSIF */ - PINMUX_GPIO(GPIO_FN_TSIF_TS0_SDAT, TSIF_TS0_SDAT_MARK), - PINMUX_GPIO(GPIO_FN_TSIF_TS0_SCK, TSIF_TS0_SCK_MARK), - PINMUX_GPIO(GPIO_FN_TSIF_TS0_SDEN, TSIF_TS0_SDEN_MARK), - PINMUX_GPIO(GPIO_FN_TSIF_TS0_SPSYNC, TSIF_TS0_SPSYNC_MARK), + GPIO_FN(TSIF_TS0_SDAT), + GPIO_FN(TSIF_TS0_SCK), + GPIO_FN(TSIF_TS0_SDEN), + GPIO_FN(TSIF_TS0_SPSYNC), /* IRQ */ - PINMUX_GPIO(GPIO_FN_INTC_IRQ7, INTC_IRQ7_MARK), - PINMUX_GPIO(GPIO_FN_INTC_IRQ6, INTC_IRQ6_MARK), - PINMUX_GPIO(GPIO_FN_INTC_IRQ5, INTC_IRQ5_MARK), - PINMUX_GPIO(GPIO_FN_INTC_IRQ4, INTC_IRQ4_MARK), - PINMUX_GPIO(GPIO_FN_INTC_IRQ3, INTC_IRQ3_MARK), - PINMUX_GPIO(GPIO_FN_INTC_IRQ2, INTC_IRQ2_MARK), - PINMUX_GPIO(GPIO_FN_INTC_IRQ1, INTC_IRQ1_MARK), - PINMUX_GPIO(GPIO_FN_INTC_IRQ0, INTC_IRQ0_MARK), + GPIO_FN(INTC_IRQ7), + GPIO_FN(INTC_IRQ6), + GPIO_FN(INTC_IRQ5), + GPIO_FN(INTC_IRQ4), + GPIO_FN(INTC_IRQ3), + GPIO_FN(INTC_IRQ2), + GPIO_FN(INTC_IRQ1), + GPIO_FN(INTC_IRQ0), }; -static struct pinmux_cfg_reg pinmux_config_regs[] = { +static const struct pinmux_cfg_reg pinmux_config_regs[] = { { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) { PTA7_FN, PTA7_OUT, PTA7_IN_PU, PTA7_IN, PTA6_FN, PTA6_OUT, PTA6_IN_PU, PTA6_IN, @@ -2107,7 +2111,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { {} }; -static struct pinmux_data_reg pinmux_data_regs[] = { +static const struct pinmux_data_reg pinmux_data_regs[] = { { PINMUX_DATA_REG("PADR", 0xa4050120, 8) { PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA, PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA } @@ -2203,20 +2207,18 @@ static struct pinmux_data_reg pinmux_data_regs[] = { { }, }; -struct sh_pfc_soc_info sh7724_pinmux_info = { +const struct sh_pfc_soc_info sh7724_pinmux_info = { .name = "sh7724_pfc", - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - .first_gpio = GPIO_PTA7, - .last_gpio = GPIO_FN_INTC_IRQ0, + .pins = pinmux_pins, + .nr_pins = ARRAY_SIZE(pinmux_pins), + .func_gpios = pinmux_func_gpios, + .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios), - .gpios = pinmux_gpios, .cfg_regs = pinmux_config_regs, .data_regs = pinmux_data_regs, diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7734.c b/drivers/pinctrl/sh-pfc/pfc-sh7734.c index 23d76d262c32..2fd5b7d4cb94 100644 --- a/drivers/pinctrl/sh-pfc/pfc-sh7734.c +++ b/drivers/pinctrl/sh-pfc/pfc-sh7734.c @@ -14,11 +14,6 @@ #include "sh_pfc.h" -#define CPU_32_PORT(fn, pfx, sfx) \ - PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ - PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \ - PORT_1(fn, pfx##31, sfx) - #define CPU_32_PORT5(fn, pfx, sfx) \ PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \ PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \ @@ -29,11 +24,11 @@ /* GPSR0 - GPSR5 */ #define CPU_ALL_PORT(fn, pfx, sfx) \ - CPU_32_PORT(fn, pfx##_0_, sfx), \ - CPU_32_PORT(fn, pfx##_1_, sfx), \ - CPU_32_PORT(fn, pfx##_2_, sfx), \ - CPU_32_PORT(fn, pfx##_3_, sfx), \ - CPU_32_PORT(fn, pfx##_4_, sfx), \ + PORT_32(fn, pfx##_0_, sfx), \ + PORT_32(fn, pfx##_1_, sfx), \ + PORT_32(fn, pfx##_2_, sfx), \ + PORT_32(fn, pfx##_3_, sfx), \ + PORT_32(fn, pfx##_4_, sfx), \ CPU_32_PORT5(fn, pfx##_5_, sfx) #define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA) @@ -47,20 +42,8 @@ #define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused) #define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused) -#define PORT_10_REV(fn, pfx, sfx) \ - PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \ - PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \ - PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \ - PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \ - PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx) - -#define CPU_32_PORT_REV(fn, pfx, sfx) \ - PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \ - PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \ - PORT_10_REV(fn, pfx, sfx) - -#define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused) -#define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused) +#define GP_INOUTSEL(bank) PORT_32_REV(_GP_INOUTSEL, _##bank##_, unused) +#define GP_INDT(bank) PORT_32_REV(_GP_INDT, _##bank##_, unused) #define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn) #define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \ @@ -609,7 +592,7 @@ enum { PINMUX_MARK_END, }; -static pinmux_enum_t pinmux_data[] = { +static const pinmux_enum_t pinmux_data[] = { PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */ PINMUX_DATA(CLKOUT_MARK, FN_CLKOUT), @@ -1384,9 +1367,13 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_IPSR_DATA(IP11_28, ST_CLKOUT), }; -static struct pinmux_gpio pinmux_gpios[] = { +static struct sh_pfc_pin pinmux_pins[] = { PINMUX_GPIO_GP_ALL(), +}; + +#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) +static const struct pinmux_func pinmux_func_gpios[] = { GPIO_FN(CLKOUT), GPIO_FN(BS), GPIO_FN(CS0), GPIO_FN(EX_CS0), GPIO_FN(RD), GPIO_FN(WE0), GPIO_FN(WE1), GPIO_FN(SCL0), GPIO_FN(PENC0), GPIO_FN(USB_OVC0), @@ -1665,7 +1652,7 @@ static struct pinmux_gpio pinmux_gpios[] = { GPIO_FN(SCL1), GPIO_FN(SCIF_CLK_C), }; -static struct pinmux_cfg_reg pinmux_config_regs[] = { +static const struct pinmux_cfg_reg pinmux_config_regs[] = { { PINMUX_CFG_REG("GPSR0", 0xFFFC0004, 32, 1) { GP_0_31_FN, FN_IP2_2_0, GP_0_30_FN, FN_IP1_31_29, @@ -2434,7 +2421,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { { }, }; -static struct pinmux_data_reg pinmux_data_regs[] = { +static const struct pinmux_data_reg pinmux_data_regs[] = { /* GPIO 0 - 5*/ { PINMUX_DATA_REG("INDT0", 0xFFC4000C, 32) { GP_INDT(0) } }, { PINMUX_DATA_REG("INDT1", 0xFFC4100C, 32) { GP_INDT(1) } }, @@ -2451,22 +2438,20 @@ static struct pinmux_data_reg pinmux_data_regs[] = { { }, }; -struct sh_pfc_soc_info sh7734_pinmux_info = { +const struct sh_pfc_soc_info sh7734_pinmux_info = { .name = "sh7734_pfc", .unlock_reg = 0xFFFC0000, - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - .first_gpio = GPIO_GP_0_0, - .last_gpio = GPIO_FN_ST_CLKOUT, + .pins = pinmux_pins, + .nr_pins = ARRAY_SIZE(pinmux_pins), + .func_gpios = pinmux_func_gpios, + .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios), - .gpios = pinmux_gpios, .cfg_regs = pinmux_config_regs, .data_regs = pinmux_data_regs, diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7757.c b/drivers/pinctrl/sh-pfc/pfc-sh7757.c index 5ed74cd0ba99..e074230e6243 100644 --- a/drivers/pinctrl/sh-pfc/pfc-sh7757.c +++ b/drivers/pinctrl/sh-pfc/pfc-sh7757.c @@ -526,7 +526,7 @@ enum { PINMUX_MARK_END, }; -static pinmux_enum_t pinmux_data[] = { +static const pinmux_enum_t pinmux_data[] = { /* PTA GPIO */ PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT), PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT), @@ -1114,7 +1114,7 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_DATA(ON_DQ0_MARK, PS8_8_FN2, PTZ0_FN), }; -static struct pinmux_gpio pinmux_gpios[] = { +static struct sh_pfc_pin pinmux_pins[] = { /* PTA */ PINMUX_GPIO(GPIO_PTA7, PTA7_DATA), PINMUX_GPIO(GPIO_PTA6, PTA6_DATA), @@ -1370,359 +1370,363 @@ static struct pinmux_gpio pinmux_gpios[] = { PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA), PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA), PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA), +}; + +#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) +static const struct pinmux_func pinmux_func_gpios[] = { /* PTA (mobule: LBSC, RGMII) */ - PINMUX_GPIO(GPIO_FN_BS, BS_MARK), - PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK), - PINMUX_GPIO(GPIO_FN_WE1, WE1_MARK), - PINMUX_GPIO(GPIO_FN_RDY, RDY_MARK), - PINMUX_GPIO(GPIO_FN_ET0_MDC, ET0_MDC_MARK), - PINMUX_GPIO(GPIO_FN_ET0_MDIO, ET0_MDIO_MARK), - PINMUX_GPIO(GPIO_FN_ET1_MDC, ET1_MDC_MARK), - PINMUX_GPIO(GPIO_FN_ET1_MDIO, ET1_MDIO_MARK), + GPIO_FN(BS), + GPIO_FN(RDWR), + GPIO_FN(WE1), + GPIO_FN(RDY), + GPIO_FN(ET0_MDC), + GPIO_FN(ET0_MDIO), + GPIO_FN(ET1_MDC), + GPIO_FN(ET1_MDIO), /* PTB (mobule: INTC, ONFI, TMU) */ - PINMUX_GPIO(GPIO_FN_IRQ15, IRQ15_MARK), - PINMUX_GPIO(GPIO_FN_IRQ14, IRQ14_MARK), - PINMUX_GPIO(GPIO_FN_IRQ13, IRQ13_MARK), - PINMUX_GPIO(GPIO_FN_IRQ12, IRQ12_MARK), - PINMUX_GPIO(GPIO_FN_IRQ11, IRQ11_MARK), - PINMUX_GPIO(GPIO_FN_IRQ10, IRQ10_MARK), - PINMUX_GPIO(GPIO_FN_IRQ9, IRQ9_MARK), - PINMUX_GPIO(GPIO_FN_IRQ8, IRQ8_MARK), - PINMUX_GPIO(GPIO_FN_ON_NRE, ON_NRE_MARK), - PINMUX_GPIO(GPIO_FN_ON_NWE, ON_NWE_MARK), - PINMUX_GPIO(GPIO_FN_ON_NWP, ON_NWP_MARK), - PINMUX_GPIO(GPIO_FN_ON_NCE0, ON_NCE0_MARK), - PINMUX_GPIO(GPIO_FN_ON_R_B0, ON_R_B0_MARK), - PINMUX_GPIO(GPIO_FN_ON_ALE, ON_ALE_MARK), - PINMUX_GPIO(GPIO_FN_ON_CLE, ON_CLE_MARK), - PINMUX_GPIO(GPIO_FN_TCLK, TCLK_MARK), + GPIO_FN(IRQ15), + GPIO_FN(IRQ14), + GPIO_FN(IRQ13), + GPIO_FN(IRQ12), + GPIO_FN(IRQ11), + GPIO_FN(IRQ10), + GPIO_FN(IRQ9), + GPIO_FN(IRQ8), + GPIO_FN(ON_NRE), + GPIO_FN(ON_NWE), + GPIO_FN(ON_NWP), + GPIO_FN(ON_NCE0), + GPIO_FN(ON_R_B0), + GPIO_FN(ON_ALE), + GPIO_FN(ON_CLE), + GPIO_FN(TCLK), /* PTC (mobule: IRQ, PWMU) */ - PINMUX_GPIO(GPIO_FN_IRQ7, IRQ7_MARK), - PINMUX_GPIO(GPIO_FN_IRQ6, IRQ6_MARK), - PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK), - PINMUX_GPIO(GPIO_FN_IRQ4, IRQ4_MARK), - PINMUX_GPIO(GPIO_FN_IRQ3, IRQ3_MARK), - PINMUX_GPIO(GPIO_FN_IRQ2, IRQ2_MARK), - PINMUX_GPIO(GPIO_FN_IRQ1, IRQ1_MARK), - PINMUX_GPIO(GPIO_FN_IRQ0, IRQ0_MARK), - PINMUX_GPIO(GPIO_FN_PWMU0, PWMU0_MARK), - PINMUX_GPIO(GPIO_FN_PWMU1, PWMU1_MARK), - PINMUX_GPIO(GPIO_FN_PWMU2, PWMU2_MARK), - PINMUX_GPIO(GPIO_FN_PWMU3, PWMU3_MARK), - PINMUX_GPIO(GPIO_FN_PWMU4, PWMU4_MARK), - PINMUX_GPIO(GPIO_FN_PWMU5, PWMU5_MARK), + GPIO_FN(IRQ7), + GPIO_FN(IRQ6), + GPIO_FN(IRQ5), + GPIO_FN(IRQ4), + GPIO_FN(IRQ3), + GPIO_FN(IRQ2), + GPIO_FN(IRQ1), + GPIO_FN(IRQ0), + GPIO_FN(PWMU0), + GPIO_FN(PWMU1), + GPIO_FN(PWMU2), + GPIO_FN(PWMU3), + GPIO_FN(PWMU4), + GPIO_FN(PWMU5), /* PTD (mobule: SPI0, DMAC) */ - PINMUX_GPIO(GPIO_FN_SP0_MOSI, SP0_MOSI_MARK), - PINMUX_GPIO(GPIO_FN_SP0_MISO, SP0_MISO_MARK), - PINMUX_GPIO(GPIO_FN_SP0_SCK, SP0_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SP0_SCK_FB, SP0_SCK_FB_MARK), - PINMUX_GPIO(GPIO_FN_SP0_SS0, SP0_SS0_MARK), - PINMUX_GPIO(GPIO_FN_SP0_SS1, SP0_SS1_MARK), - PINMUX_GPIO(GPIO_FN_SP0_SS2, SP0_SS2_MARK), - PINMUX_GPIO(GPIO_FN_SP0_SS3, SP0_SS3_MARK), - PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK), - PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK), - PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK), + GPIO_FN(SP0_MOSI), + GPIO_FN(SP0_MISO), + GPIO_FN(SP0_SCK), + GPIO_FN(SP0_SCK_FB), + GPIO_FN(SP0_SS0), + GPIO_FN(SP0_SS1), + GPIO_FN(SP0_SS2), + GPIO_FN(SP0_SS3), + GPIO_FN(DREQ0), + GPIO_FN(DACK0), + GPIO_FN(TEND0), /* PTE (mobule: RMII) */ - PINMUX_GPIO(GPIO_FN_RMII0_CRS_DV, RMII0_CRS_DV_MARK), - PINMUX_GPIO(GPIO_FN_RMII0_TXD1, RMII0_TXD1_MARK), - PINMUX_GPIO(GPIO_FN_RMII0_TXD0, RMII0_TXD0_MARK), - PINMUX_GPIO(GPIO_FN_RMII0_TXEN, RMII0_TXEN_MARK), - PINMUX_GPIO(GPIO_FN_RMII0_REFCLK, RMII0_REFCLK_MARK), - PINMUX_GPIO(GPIO_FN_RMII0_RXD1, RMII0_RXD1_MARK), - PINMUX_GPIO(GPIO_FN_RMII0_RXD0, RMII0_RXD0_MARK), - PINMUX_GPIO(GPIO_FN_RMII0_RX_ER, RMII0_RX_ER_MARK), + GPIO_FN(RMII0_CRS_DV), + GPIO_FN(RMII0_TXD1), + GPIO_FN(RMII0_TXD0), + GPIO_FN(RMII0_TXEN), + GPIO_FN(RMII0_REFCLK), + GPIO_FN(RMII0_RXD1), + GPIO_FN(RMII0_RXD0), + GPIO_FN(RMII0_RX_ER), /* PTF (mobule: RMII, SerMux) */ - PINMUX_GPIO(GPIO_FN_RMII1_CRS_DV, RMII1_CRS_DV_MARK), - PINMUX_GPIO(GPIO_FN_RMII1_TXD1, RMII1_TXD1_MARK), - PINMUX_GPIO(GPIO_FN_RMII1_TXD0, RMII1_TXD0_MARK), - PINMUX_GPIO(GPIO_FN_RMII1_TXEN, RMII1_TXEN_MARK), - PINMUX_GPIO(GPIO_FN_RMII1_REFCLK, RMII1_REFCLK_MARK), - PINMUX_GPIO(GPIO_FN_RMII1_RXD1, RMII1_RXD1_MARK), - PINMUX_GPIO(GPIO_FN_RMII1_RXD0, RMII1_RXD0_MARK), - PINMUX_GPIO(GPIO_FN_RMII1_RX_ER, RMII1_RX_ER_MARK), - PINMUX_GPIO(GPIO_FN_RAC_RI, RAC_RI_MARK), + GPIO_FN(RMII1_CRS_DV), + GPIO_FN(RMII1_TXD1), + GPIO_FN(RMII1_TXD0), + GPIO_FN(RMII1_TXEN), + GPIO_FN(RMII1_REFCLK), + GPIO_FN(RMII1_RXD1), + GPIO_FN(RMII1_RXD0), + GPIO_FN(RMII1_RX_ER), + GPIO_FN(RAC_RI), /* PTG (mobule: system, LBSC, LPC, WDT, LPC, eMMC) */ - PINMUX_GPIO(GPIO_FN_BOOTFMS, BOOTFMS_MARK), - PINMUX_GPIO(GPIO_FN_BOOTWP, BOOTWP_MARK), - PINMUX_GPIO(GPIO_FN_A25, A25_MARK), - PINMUX_GPIO(GPIO_FN_A24, A24_MARK), - PINMUX_GPIO(GPIO_FN_SERIRQ, SERIRQ_MARK), - PINMUX_GPIO(GPIO_FN_WDTOVF, WDTOVF_MARK), - PINMUX_GPIO(GPIO_FN_LPCPD, LPCPD_MARK), - PINMUX_GPIO(GPIO_FN_LDRQ, LDRQ_MARK), - PINMUX_GPIO(GPIO_FN_MMCCLK, MMCCLK_MARK), - PINMUX_GPIO(GPIO_FN_MMCCMD, MMCCMD_MARK), + GPIO_FN(BOOTFMS), + GPIO_FN(BOOTWP), + GPIO_FN(A25), + GPIO_FN(A24), + GPIO_FN(SERIRQ), + GPIO_FN(WDTOVF), + GPIO_FN(LPCPD), + GPIO_FN(LDRQ), + GPIO_FN(MMCCLK), + GPIO_FN(MMCCMD), /* PTH (mobule: SPI1, LPC, DMAC, ADC) */ - PINMUX_GPIO(GPIO_FN_SP1_MOSI, SP1_MOSI_MARK), - PINMUX_GPIO(GPIO_FN_SP1_MISO, SP1_MISO_MARK), - PINMUX_GPIO(GPIO_FN_SP1_SCK, SP1_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SP1_SCK_FB, SP1_SCK_FB_MARK), - PINMUX_GPIO(GPIO_FN_SP1_SS0, SP1_SS0_MARK), - PINMUX_GPIO(GPIO_FN_SP1_SS1, SP1_SS1_MARK), - PINMUX_GPIO(GPIO_FN_WP, WP_MARK), - PINMUX_GPIO(GPIO_FN_FMS0, FMS0_MARK), - PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK), - PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK), - PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK), - PINMUX_GPIO(GPIO_FN_ADTRG1, ADTRG1_MARK), - PINMUX_GPIO(GPIO_FN_ADTRG0, ADTRG0_MARK), + GPIO_FN(SP1_MOSI), + GPIO_FN(SP1_MISO), + GPIO_FN(SP1_SCK), + GPIO_FN(SP1_SCK_FB), + GPIO_FN(SP1_SS0), + GPIO_FN(SP1_SS1), + GPIO_FN(WP), + GPIO_FN(FMS0), + GPIO_FN(TEND1), + GPIO_FN(DREQ1), + GPIO_FN(DACK1), + GPIO_FN(ADTRG1), + GPIO_FN(ADTRG0), /* PTI (mobule: LBSC, SDHI) */ - PINMUX_GPIO(GPIO_FN_D15, D15_MARK), - PINMUX_GPIO(GPIO_FN_D14, D14_MARK), - PINMUX_GPIO(GPIO_FN_D13, D13_MARK), - PINMUX_GPIO(GPIO_FN_D12, D12_MARK), - PINMUX_GPIO(GPIO_FN_D11, D11_MARK), - PINMUX_GPIO(GPIO_FN_D10, D10_MARK), - PINMUX_GPIO(GPIO_FN_D9, D9_MARK), - PINMUX_GPIO(GPIO_FN_D8, D8_MARK), - PINMUX_GPIO(GPIO_FN_SD_WP, SD_WP_MARK), - PINMUX_GPIO(GPIO_FN_SD_CD, SD_CD_MARK), - PINMUX_GPIO(GPIO_FN_SD_CLK, SD_CLK_MARK), - PINMUX_GPIO(GPIO_FN_SD_CMD, SD_CMD_MARK), - PINMUX_GPIO(GPIO_FN_SD_D3, SD_D3_MARK), - PINMUX_GPIO(GPIO_FN_SD_D2, SD_D2_MARK), - PINMUX_GPIO(GPIO_FN_SD_D1, SD_D1_MARK), - PINMUX_GPIO(GPIO_FN_SD_D0, SD_D0_MARK), + GPIO_FN(D15), + GPIO_FN(D14), + GPIO_FN(D13), + GPIO_FN(D12), + GPIO_FN(D11), + GPIO_FN(D10), + GPIO_FN(D9), + GPIO_FN(D8), + GPIO_FN(SD_WP), + GPIO_FN(SD_CD), + GPIO_FN(SD_CLK), + GPIO_FN(SD_CMD), + GPIO_FN(SD_D3), + GPIO_FN(SD_D2), + GPIO_FN(SD_D1), + GPIO_FN(SD_D0), /* PTJ (mobule: SCIF234, SERMUX) */ - PINMUX_GPIO(GPIO_FN_RTS3, RTS3_MARK), - PINMUX_GPIO(GPIO_FN_CTS3, CTS3_MARK), - PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK), - PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK), - PINMUX_GPIO(GPIO_FN_RTS4, RTS4_MARK), - PINMUX_GPIO(GPIO_FN_RXD4, RXD4_MARK), - PINMUX_GPIO(GPIO_FN_TXD4, TXD4_MARK), + GPIO_FN(RTS3), + GPIO_FN(CTS3), + GPIO_FN(TXD3), + GPIO_FN(RXD3), + GPIO_FN(RTS4), + GPIO_FN(RXD4), + GPIO_FN(TXD4), /* PTK (mobule: SERMUX, LBSC, SCIF) */ - PINMUX_GPIO(GPIO_FN_COM2_TXD, COM2_TXD_MARK), - PINMUX_GPIO(GPIO_FN_COM2_RXD, COM2_RXD_MARK), - PINMUX_GPIO(GPIO_FN_COM2_RTS, COM2_RTS_MARK), - PINMUX_GPIO(GPIO_FN_COM2_CTS, COM2_CTS_MARK), - PINMUX_GPIO(GPIO_FN_COM2_DTR, COM2_DTR_MARK), - PINMUX_GPIO(GPIO_FN_COM2_DSR, COM2_DSR_MARK), - PINMUX_GPIO(GPIO_FN_COM2_DCD, COM2_DCD_MARK), - PINMUX_GPIO(GPIO_FN_CLKOUT, CLKOUT_MARK), - PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK), - PINMUX_GPIO(GPIO_FN_SCK4, SCK4_MARK), - PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK), + GPIO_FN(COM2_TXD), + GPIO_FN(COM2_RXD), + GPIO_FN(COM2_RTS), + GPIO_FN(COM2_CTS), + GPIO_FN(COM2_DTR), + GPIO_FN(COM2_DSR), + GPIO_FN(COM2_DCD), + GPIO_FN(CLKOUT), + GPIO_FN(SCK2), + GPIO_FN(SCK4), + GPIO_FN(SCK3), /* PTL (mobule: SERMUX, SCIF, LBSC, AUD) */ - PINMUX_GPIO(GPIO_FN_RAC_RXD, RAC_RXD_MARK), - PINMUX_GPIO(GPIO_FN_RAC_RTS, RAC_RTS_MARK), - PINMUX_GPIO(GPIO_FN_RAC_CTS, RAC_CTS_MARK), - PINMUX_GPIO(GPIO_FN_RAC_DTR, RAC_DTR_MARK), - PINMUX_GPIO(GPIO_FN_RAC_DSR, RAC_DSR_MARK), - PINMUX_GPIO(GPIO_FN_RAC_DCD, RAC_DCD_MARK), - PINMUX_GPIO(GPIO_FN_RAC_TXD, RAC_TXD_MARK), - PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK), - PINMUX_GPIO(GPIO_FN_CS5, CS5_MARK), - PINMUX_GPIO(GPIO_FN_CS6, CS6_MARK), - PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK), - PINMUX_GPIO(GPIO_FN_AUDCK, AUDCK_MARK), - PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK), + GPIO_FN(RAC_RXD), + GPIO_FN(RAC_RTS), + GPIO_FN(RAC_CTS), + GPIO_FN(RAC_DTR), + GPIO_FN(RAC_DSR), + GPIO_FN(RAC_DCD), + GPIO_FN(RAC_TXD), + GPIO_FN(RXD2), + GPIO_FN(CS5), + GPIO_FN(CS6), + GPIO_FN(AUDSYNC), + GPIO_FN(AUDCK), + GPIO_FN(TXD2), /* PTM (mobule: LBSC, IIC) */ - PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK), - PINMUX_GPIO(GPIO_FN_RD, RD_MARK), - PINMUX_GPIO(GPIO_FN_WE0, WE0_MARK), - PINMUX_GPIO(GPIO_FN_CS0, CS0_MARK), - PINMUX_GPIO(GPIO_FN_SDA6, SDA6_MARK), - PINMUX_GPIO(GPIO_FN_SCL6, SCL6_MARK), - PINMUX_GPIO(GPIO_FN_SDA7, SDA7_MARK), - PINMUX_GPIO(GPIO_FN_SCL7, SCL7_MARK), + GPIO_FN(CS4), + GPIO_FN(RD), + GPIO_FN(WE0), + GPIO_FN(CS0), + GPIO_FN(SDA6), + GPIO_FN(SCL6), + GPIO_FN(SDA7), + GPIO_FN(SCL7), /* PTN (mobule: USB, JMC, SGPIO, WDT) */ - PINMUX_GPIO(GPIO_FN_VBUS_EN, VBUS_EN_MARK), - PINMUX_GPIO(GPIO_FN_VBUS_OC, VBUS_OC_MARK), - PINMUX_GPIO(GPIO_FN_JMCTCK, JMCTCK_MARK), - PINMUX_GPIO(GPIO_FN_JMCTMS, JMCTMS_MARK), - PINMUX_GPIO(GPIO_FN_JMCTDO, JMCTDO_MARK), - PINMUX_GPIO(GPIO_FN_JMCTDI, JMCTDI_MARK), - PINMUX_GPIO(GPIO_FN_JMCTRST, JMCTRST_MARK), - PINMUX_GPIO(GPIO_FN_SGPIO1_CLK, SGPIO1_CLK_MARK), - PINMUX_GPIO(GPIO_FN_SGPIO1_LOAD, SGPIO1_LOAD_MARK), - PINMUX_GPIO(GPIO_FN_SGPIO1_DI, SGPIO1_DI_MARK), - PINMUX_GPIO(GPIO_FN_SGPIO1_DO, SGPIO1_DO_MARK), - PINMUX_GPIO(GPIO_FN_SUB_CLKIN, SUB_CLKIN_MARK), + GPIO_FN(VBUS_EN), + GPIO_FN(VBUS_OC), + GPIO_FN(JMCTCK), + GPIO_FN(JMCTMS), + GPIO_FN(JMCTDO), + GPIO_FN(JMCTDI), + GPIO_FN(JMCTRST), + GPIO_FN(SGPIO1_CLK), + GPIO_FN(SGPIO1_LOAD), + GPIO_FN(SGPIO1_DI), + GPIO_FN(SGPIO1_DO), + GPIO_FN(SUB_CLKIN), /* PTO (mobule: SGPIO, SerMux) */ - PINMUX_GPIO(GPIO_FN_SGPIO0_CLK, SGPIO0_CLK_MARK), - PINMUX_GPIO(GPIO_FN_SGPIO0_LOAD, SGPIO0_LOAD_MARK), - PINMUX_GPIO(GPIO_FN_SGPIO0_DI, SGPIO0_DI_MARK), - PINMUX_GPIO(GPIO_FN_SGPIO0_DO, SGPIO0_DO_MARK), - PINMUX_GPIO(GPIO_FN_SGPIO2_CLK, SGPIO2_CLK_MARK), - PINMUX_GPIO(GPIO_FN_SGPIO2_LOAD, SGPIO2_LOAD_MARK), - PINMUX_GPIO(GPIO_FN_SGPIO2_DI, SGPIO2_DI_MARK), - PINMUX_GPIO(GPIO_FN_SGPIO2_DO, SGPIO2_DO_MARK), - PINMUX_GPIO(GPIO_FN_COM1_TXD, COM1_TXD_MARK), - PINMUX_GPIO(GPIO_FN_COM1_RXD, COM1_RXD_MARK), - PINMUX_GPIO(GPIO_FN_COM1_RTS, COM1_RTS_MARK), - PINMUX_GPIO(GPIO_FN_COM1_CTS, COM1_CTS_MARK), + GPIO_FN(SGPIO0_CLK), + GPIO_FN(SGPIO0_LOAD), + GPIO_FN(SGPIO0_DI), + GPIO_FN(SGPIO0_DO), + GPIO_FN(SGPIO2_CLK), + GPIO_FN(SGPIO2_LOAD), + GPIO_FN(SGPIO2_DI), + GPIO_FN(SGPIO2_DO), + GPIO_FN(COM1_TXD), + GPIO_FN(COM1_RXD), + GPIO_FN(COM1_RTS), + GPIO_FN(COM1_CTS), /* PTP (mobule: EVC, ADC) */ /* PTQ (mobule: LPC) */ - PINMUX_GPIO(GPIO_FN_LAD3, LAD3_MARK), - PINMUX_GPIO(GPIO_FN_LAD2, LAD2_MARK), - PINMUX_GPIO(GPIO_FN_LAD1, LAD1_MARK), - PINMUX_GPIO(GPIO_FN_LAD0, LAD0_MARK), - PINMUX_GPIO(GPIO_FN_LFRAME, LFRAME_MARK), - PINMUX_GPIO(GPIO_FN_LRESET, LRESET_MARK), - PINMUX_GPIO(GPIO_FN_LCLK, LCLK_MARK), + GPIO_FN(LAD3), + GPIO_FN(LAD2), + GPIO_FN(LAD1), + GPIO_FN(LAD0), + GPIO_FN(LFRAME), + GPIO_FN(LRESET), + GPIO_FN(LCLK), /* PTR (mobule: GRA, IIC) */ - PINMUX_GPIO(GPIO_FN_DDC3, DDC3_MARK), - PINMUX_GPIO(GPIO_FN_DDC2, DDC2_MARK), - PINMUX_GPIO(GPIO_FN_SDA8, SDA8_MARK), - PINMUX_GPIO(GPIO_FN_SCL8, SCL8_MARK), - PINMUX_GPIO(GPIO_FN_SDA2, SDA2_MARK), - PINMUX_GPIO(GPIO_FN_SCL2, SCL2_MARK), - PINMUX_GPIO(GPIO_FN_SDA1, SDA1_MARK), - PINMUX_GPIO(GPIO_FN_SCL1, SCL1_MARK), - PINMUX_GPIO(GPIO_FN_SDA0, SDA0_MARK), - PINMUX_GPIO(GPIO_FN_SCL0, SCL0_MARK), + GPIO_FN(DDC3), + GPIO_FN(DDC2), + GPIO_FN(SDA8), + GPIO_FN(SCL8), + GPIO_FN(SDA2), + GPIO_FN(SCL2), + GPIO_FN(SDA1), + GPIO_FN(SCL1), + GPIO_FN(SDA0), + GPIO_FN(SCL0), /* PTS (mobule: GRA, IIC) */ - PINMUX_GPIO(GPIO_FN_DDC1, DDC1_MARK), - PINMUX_GPIO(GPIO_FN_DDC0, DDC0_MARK), - PINMUX_GPIO(GPIO_FN_SDA9, SDA9_MARK), - PINMUX_GPIO(GPIO_FN_SCL9, SCL9_MARK), - PINMUX_GPIO(GPIO_FN_SDA5, SDA5_MARK), - PINMUX_GPIO(GPIO_FN_SCL5, SCL5_MARK), - PINMUX_GPIO(GPIO_FN_SDA4, SDA4_MARK), - PINMUX_GPIO(GPIO_FN_SCL4, SCL4_MARK), - PINMUX_GPIO(GPIO_FN_SDA3, SDA3_MARK), - PINMUX_GPIO(GPIO_FN_SCL3, SCL3_MARK), + GPIO_FN(DDC1), + GPIO_FN(DDC0), + GPIO_FN(SDA9), + GPIO_FN(SCL9), + GPIO_FN(SDA5), + GPIO_FN(SCL5), + GPIO_FN(SDA4), + GPIO_FN(SCL4), + GPIO_FN(SDA3), + GPIO_FN(SCL3), /* PTT (mobule: PWMX, AUD) */ - PINMUX_GPIO(GPIO_FN_PWMX7, PWMX7_MARK), - PINMUX_GPIO(GPIO_FN_PWMX6, PWMX6_MARK), - PINMUX_GPIO(GPIO_FN_PWMX5, PWMX5_MARK), - PINMUX_GPIO(GPIO_FN_PWMX4, PWMX4_MARK), - PINMUX_GPIO(GPIO_FN_PWMX3, PWMX3_MARK), - PINMUX_GPIO(GPIO_FN_PWMX2, PWMX2_MARK), - PINMUX_GPIO(GPIO_FN_PWMX1, PWMX1_MARK), - PINMUX_GPIO(GPIO_FN_PWMX0, PWMX0_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK), - PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK), - PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK), - PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK), + GPIO_FN(PWMX7), + GPIO_FN(PWMX6), + GPIO_FN(PWMX5), + GPIO_FN(PWMX4), + GPIO_FN(PWMX3), + GPIO_FN(PWMX2), + GPIO_FN(PWMX1), + GPIO_FN(PWMX0), + GPIO_FN(AUDATA3), + GPIO_FN(AUDATA2), + GPIO_FN(AUDATA1), + GPIO_FN(AUDATA0), + GPIO_FN(STATUS1), + GPIO_FN(STATUS0), /* PTU (mobule: LPC, APM) */ - PINMUX_GPIO(GPIO_FN_LGPIO7, LGPIO7_MARK), - PINMUX_GPIO(GPIO_FN_LGPIO6, LGPIO6_MARK), - PINMUX_GPIO(GPIO_FN_LGPIO5, LGPIO5_MARK), - PINMUX_GPIO(GPIO_FN_LGPIO4, LGPIO4_MARK), - PINMUX_GPIO(GPIO_FN_LGPIO3, LGPIO3_MARK), - PINMUX_GPIO(GPIO_FN_LGPIO2, LGPIO2_MARK), - PINMUX_GPIO(GPIO_FN_LGPIO1, LGPIO1_MARK), - PINMUX_GPIO(GPIO_FN_LGPIO0, LGPIO0_MARK), - PINMUX_GPIO(GPIO_FN_APMONCTL_O, APMONCTL_O_MARK), - PINMUX_GPIO(GPIO_FN_APMPWBTOUT_O, APMPWBTOUT_O_MARK), - PINMUX_GPIO(GPIO_FN_APMSCI_O, APMSCI_O_MARK), - PINMUX_GPIO(GPIO_FN_APMVDDON, APMVDDON_MARK), - PINMUX_GPIO(GPIO_FN_APMSLPBTN, APMSLPBTN_MARK), - PINMUX_GPIO(GPIO_FN_APMPWRBTN, APMPWRBTN_MARK), - PINMUX_GPIO(GPIO_FN_APMS5N, APMS5N_MARK), - PINMUX_GPIO(GPIO_FN_APMS3N, APMS3N_MARK), + GPIO_FN(LGPIO7), + GPIO_FN(LGPIO6), + GPIO_FN(LGPIO5), + GPIO_FN(LGPIO4), + GPIO_FN(LGPIO3), + GPIO_FN(LGPIO2), + GPIO_FN(LGPIO1), + GPIO_FN(LGPIO0), + GPIO_FN(APMONCTL_O), + GPIO_FN(APMPWBTOUT_O), + GPIO_FN(APMSCI_O), + GPIO_FN(APMVDDON), + GPIO_FN(APMSLPBTN), + GPIO_FN(APMPWRBTN), + GPIO_FN(APMS5N), + GPIO_FN(APMS3N), /* PTV (mobule: LBSC, SerMux, R-SPI, EVC, GRA) */ - PINMUX_GPIO(GPIO_FN_A23, A23_MARK), - PINMUX_GPIO(GPIO_FN_A22, A22_MARK), - PINMUX_GPIO(GPIO_FN_A21, A21_MARK), - PINMUX_GPIO(GPIO_FN_A20, A20_MARK), - PINMUX_GPIO(GPIO_FN_A19, A19_MARK), - PINMUX_GPIO(GPIO_FN_A18, A18_MARK), - PINMUX_GPIO(GPIO_FN_A17, A17_MARK), - PINMUX_GPIO(GPIO_FN_A16, A16_MARK), - PINMUX_GPIO(GPIO_FN_COM2_RI, COM2_RI_MARK), - PINMUX_GPIO(GPIO_FN_R_SPI_MOSI, R_SPI_MOSI_MARK), - PINMUX_GPIO(GPIO_FN_R_SPI_MISO, R_SPI_MISO_MARK), - PINMUX_GPIO(GPIO_FN_R_SPI_RSPCK, R_SPI_RSPCK_MARK), - PINMUX_GPIO(GPIO_FN_R_SPI_SSL0, R_SPI_SSL0_MARK), - PINMUX_GPIO(GPIO_FN_R_SPI_SSL1, R_SPI_SSL1_MARK), - PINMUX_GPIO(GPIO_FN_EVENT7, EVENT7_MARK), - PINMUX_GPIO(GPIO_FN_EVENT6, EVENT6_MARK), - PINMUX_GPIO(GPIO_FN_VBIOS_DI, VBIOS_DI_MARK), - PINMUX_GPIO(GPIO_FN_VBIOS_DO, VBIOS_DO_MARK), - PINMUX_GPIO(GPIO_FN_VBIOS_CLK, VBIOS_CLK_MARK), - PINMUX_GPIO(GPIO_FN_VBIOS_CS, VBIOS_CS_MARK), + GPIO_FN(A23), + GPIO_FN(A22), + GPIO_FN(A21), + GPIO_FN(A20), + GPIO_FN(A19), + GPIO_FN(A18), + GPIO_FN(A17), + GPIO_FN(A16), + GPIO_FN(COM2_RI), + GPIO_FN(R_SPI_MOSI), + GPIO_FN(R_SPI_MISO), + GPIO_FN(R_SPI_RSPCK), + GPIO_FN(R_SPI_SSL0), + GPIO_FN(R_SPI_SSL1), + GPIO_FN(EVENT7), + GPIO_FN(EVENT6), + GPIO_FN(VBIOS_DI), + GPIO_FN(VBIOS_DO), + GPIO_FN(VBIOS_CLK), + GPIO_FN(VBIOS_CS), /* PTW (mobule: LBSC, EVC, SCIF) */ - PINMUX_GPIO(GPIO_FN_A16, A16_MARK), - PINMUX_GPIO(GPIO_FN_A15, A15_MARK), - PINMUX_GPIO(GPIO_FN_A14, A14_MARK), - PINMUX_GPIO(GPIO_FN_A13, A13_MARK), - PINMUX_GPIO(GPIO_FN_A12, A12_MARK), - PINMUX_GPIO(GPIO_FN_A11, A11_MARK), - PINMUX_GPIO(GPIO_FN_A10, A10_MARK), - PINMUX_GPIO(GPIO_FN_A9, A9_MARK), - PINMUX_GPIO(GPIO_FN_A8, A8_MARK), - PINMUX_GPIO(GPIO_FN_EVENT5, EVENT5_MARK), - PINMUX_GPIO(GPIO_FN_EVENT4, EVENT4_MARK), - PINMUX_GPIO(GPIO_FN_EVENT3, EVENT3_MARK), - PINMUX_GPIO(GPIO_FN_EVENT2, EVENT2_MARK), - PINMUX_GPIO(GPIO_FN_EVENT1, EVENT1_MARK), - PINMUX_GPIO(GPIO_FN_EVENT0, EVENT0_MARK), - PINMUX_GPIO(GPIO_FN_CTS4, CTS4_MARK), - PINMUX_GPIO(GPIO_FN_CTS2, CTS2_MARK), + GPIO_FN(A16), + GPIO_FN(A15), + GPIO_FN(A14), + GPIO_FN(A13), + GPIO_FN(A12), + GPIO_FN(A11), + GPIO_FN(A10), + GPIO_FN(A9), + GPIO_FN(A8), + GPIO_FN(EVENT5), + GPIO_FN(EVENT4), + GPIO_FN(EVENT3), + GPIO_FN(EVENT2), + GPIO_FN(EVENT1), + GPIO_FN(EVENT0), + GPIO_FN(CTS4), + GPIO_FN(CTS2), /* PTX (mobule: LBSC) */ - PINMUX_GPIO(GPIO_FN_A7, A7_MARK), - PINMUX_GPIO(GPIO_FN_A6, A6_MARK), - PINMUX_GPIO(GPIO_FN_A5, A5_MARK), - PINMUX_GPIO(GPIO_FN_A4, A4_MARK), - PINMUX_GPIO(GPIO_FN_A3, A3_MARK), - PINMUX_GPIO(GPIO_FN_A2, A2_MARK), - PINMUX_GPIO(GPIO_FN_A1, A1_MARK), - PINMUX_GPIO(GPIO_FN_A0, A0_MARK), - PINMUX_GPIO(GPIO_FN_RTS2, RTS2_MARK), - PINMUX_GPIO(GPIO_FN_SIM_D, SIM_D_MARK), - PINMUX_GPIO(GPIO_FN_SIM_CLK, SIM_CLK_MARK), - PINMUX_GPIO(GPIO_FN_SIM_RST, SIM_RST_MARK), + GPIO_FN(A7), + GPIO_FN(A6), + GPIO_FN(A5), + GPIO_FN(A4), + GPIO_FN(A3), + GPIO_FN(A2), + GPIO_FN(A1), + GPIO_FN(A0), + GPIO_FN(RTS2), + GPIO_FN(SIM_D), + GPIO_FN(SIM_CLK), + GPIO_FN(SIM_RST), /* PTY (mobule: LBSC) */ - PINMUX_GPIO(GPIO_FN_D7, D7_MARK), - PINMUX_GPIO(GPIO_FN_D6, D6_MARK), - PINMUX_GPIO(GPIO_FN_D5, D5_MARK), - PINMUX_GPIO(GPIO_FN_D4, D4_MARK), - PINMUX_GPIO(GPIO_FN_D3, D3_MARK), - PINMUX_GPIO(GPIO_FN_D2, D2_MARK), - PINMUX_GPIO(GPIO_FN_D1, D1_MARK), - PINMUX_GPIO(GPIO_FN_D0, D0_MARK), + GPIO_FN(D7), + GPIO_FN(D6), + GPIO_FN(D5), + GPIO_FN(D4), + GPIO_FN(D3), + GPIO_FN(D2), + GPIO_FN(D1), + GPIO_FN(D0), /* PTZ (mobule: eMMC, ONFI) */ - PINMUX_GPIO(GPIO_FN_MMCDAT7, MMCDAT7_MARK), - PINMUX_GPIO(GPIO_FN_MMCDAT6, MMCDAT6_MARK), - PINMUX_GPIO(GPIO_FN_MMCDAT5, MMCDAT5_MARK), - PINMUX_GPIO(GPIO_FN_MMCDAT4, MMCDAT4_MARK), - PINMUX_GPIO(GPIO_FN_MMCDAT3, MMCDAT3_MARK), - PINMUX_GPIO(GPIO_FN_MMCDAT2, MMCDAT2_MARK), - PINMUX_GPIO(GPIO_FN_MMCDAT1, MMCDAT1_MARK), - PINMUX_GPIO(GPIO_FN_MMCDAT0, MMCDAT0_MARK), - PINMUX_GPIO(GPIO_FN_ON_DQ7, ON_DQ7_MARK), - PINMUX_GPIO(GPIO_FN_ON_DQ6, ON_DQ6_MARK), - PINMUX_GPIO(GPIO_FN_ON_DQ5, ON_DQ5_MARK), - PINMUX_GPIO(GPIO_FN_ON_DQ4, ON_DQ4_MARK), - PINMUX_GPIO(GPIO_FN_ON_DQ3, ON_DQ3_MARK), - PINMUX_GPIO(GPIO_FN_ON_DQ2, ON_DQ2_MARK), - PINMUX_GPIO(GPIO_FN_ON_DQ1, ON_DQ1_MARK), - PINMUX_GPIO(GPIO_FN_ON_DQ0, ON_DQ0_MARK), + GPIO_FN(MMCDAT7), + GPIO_FN(MMCDAT6), + GPIO_FN(MMCDAT5), + GPIO_FN(MMCDAT4), + GPIO_FN(MMCDAT3), + GPIO_FN(MMCDAT2), + GPIO_FN(MMCDAT1), + GPIO_FN(MMCDAT0), + GPIO_FN(ON_DQ7), + GPIO_FN(ON_DQ6), + GPIO_FN(ON_DQ5), + GPIO_FN(ON_DQ4), + GPIO_FN(ON_DQ3), + GPIO_FN(ON_DQ2), + GPIO_FN(ON_DQ1), + GPIO_FN(ON_DQ0), }; -static struct pinmux_cfg_reg pinmux_config_regs[] = { +static const struct pinmux_cfg_reg pinmux_config_regs[] = { { PINMUX_CFG_REG("PACR", 0xffec0000, 16, 2) { PTA7_FN, PTA7_OUT, PTA7_IN, PTA7_IN_PU, PTA6_FN, PTA6_OUT, PTA6_IN, PTA6_IN_PU, @@ -2152,7 +2156,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { {} }; -static struct pinmux_data_reg pinmux_data_regs[] = { +static const struct pinmux_data_reg pinmux_data_regs[] = { { PINMUX_DATA_REG("PADR", 0xffec0034, 8) { PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA, PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA } @@ -2260,20 +2264,18 @@ static struct pinmux_data_reg pinmux_data_regs[] = { { }, }; -struct sh_pfc_soc_info sh7757_pinmux_info = { +const struct sh_pfc_soc_info sh7757_pinmux_info = { .name = "sh7757_pfc", - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - .first_gpio = GPIO_PTA0, - .last_gpio = GPIO_FN_ON_DQ0, + .pins = pinmux_pins, + .nr_pins = ARRAY_SIZE(pinmux_pins), + .func_gpios = pinmux_func_gpios, + .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios), - .gpios = pinmux_gpios, .cfg_regs = pinmux_config_regs, .data_regs = pinmux_data_regs, diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7785.c b/drivers/pinctrl/sh-pfc/pfc-sh7785.c index 3b1825d925bb..c176b794f240 100644 --- a/drivers/pinctrl/sh-pfc/pfc-sh7785.c +++ b/drivers/pinctrl/sh-pfc/pfc-sh7785.c @@ -355,7 +355,7 @@ enum { PINMUX_MARK_END, }; -static pinmux_enum_t pinmux_data[] = { +static const pinmux_enum_t pinmux_data[] = { /* PA GPIO */ PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU), @@ -702,7 +702,7 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_DATA(IRQOUT_MARK, P2MSEL2_1), }; -static struct pinmux_gpio pinmux_gpios[] = { +static struct sh_pfc_pin pinmux_pins[] = { /* PA */ PINMUX_GPIO(GPIO_PA7, PA7_DATA), PINMUX_GPIO(GPIO_PA6, PA6_DATA), @@ -845,176 +845,180 @@ static struct pinmux_gpio pinmux_gpios[] = { PINMUX_GPIO(GPIO_PR2, PR2_DATA), PINMUX_GPIO(GPIO_PR1, PR1_DATA), PINMUX_GPIO(GPIO_PR0, PR0_DATA), +}; + +#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) +static const struct pinmux_func pinmux_func_gpios[] = { /* FN */ - PINMUX_GPIO(GPIO_FN_D63_AD31, D63_AD31_MARK), - PINMUX_GPIO(GPIO_FN_D62_AD30, D62_AD30_MARK), - PINMUX_GPIO(GPIO_FN_D61_AD29, D61_AD29_MARK), - PINMUX_GPIO(GPIO_FN_D60_AD28, D60_AD28_MARK), - PINMUX_GPIO(GPIO_FN_D59_AD27, D59_AD27_MARK), - PINMUX_GPIO(GPIO_FN_D58_AD26, D58_AD26_MARK), - PINMUX_GPIO(GPIO_FN_D57_AD25, D57_AD25_MARK), - PINMUX_GPIO(GPIO_FN_D56_AD24, D56_AD24_MARK), - PINMUX_GPIO(GPIO_FN_D55_AD23, D55_AD23_MARK), - PINMUX_GPIO(GPIO_FN_D54_AD22, D54_AD22_MARK), - PINMUX_GPIO(GPIO_FN_D53_AD21, D53_AD21_MARK), - PINMUX_GPIO(GPIO_FN_D52_AD20, D52_AD20_MARK), - PINMUX_GPIO(GPIO_FN_D51_AD19, D51_AD19_MARK), - PINMUX_GPIO(GPIO_FN_D50_AD18, D50_AD18_MARK), - PINMUX_GPIO(GPIO_FN_D49_AD17_DB5, D49_AD17_DB5_MARK), - PINMUX_GPIO(GPIO_FN_D48_AD16_DB4, D48_AD16_DB4_MARK), - PINMUX_GPIO(GPIO_FN_D47_AD15_DB3, D47_AD15_DB3_MARK), - PINMUX_GPIO(GPIO_FN_D46_AD14_DB2, D46_AD14_DB2_MARK), - PINMUX_GPIO(GPIO_FN_D45_AD13_DB1, D45_AD13_DB1_MARK), - PINMUX_GPIO(GPIO_FN_D44_AD12_DB0, D44_AD12_DB0_MARK), - PINMUX_GPIO(GPIO_FN_D43_AD11_DG5, D43_AD11_DG5_MARK), - PINMUX_GPIO(GPIO_FN_D42_AD10_DG4, D42_AD10_DG4_MARK), - PINMUX_GPIO(GPIO_FN_D41_AD9_DG3, D41_AD9_DG3_MARK), - PINMUX_GPIO(GPIO_FN_D40_AD8_DG2, D40_AD8_DG2_MARK), - PINMUX_GPIO(GPIO_FN_D39_AD7_DG1, D39_AD7_DG1_MARK), - PINMUX_GPIO(GPIO_FN_D38_AD6_DG0, D38_AD6_DG0_MARK), - PINMUX_GPIO(GPIO_FN_D37_AD5_DR5, D37_AD5_DR5_MARK), - PINMUX_GPIO(GPIO_FN_D36_AD4_DR4, D36_AD4_DR4_MARK), - PINMUX_GPIO(GPIO_FN_D35_AD3_DR3, D35_AD3_DR3_MARK), - PINMUX_GPIO(GPIO_FN_D34_AD2_DR2, D34_AD2_DR2_MARK), - PINMUX_GPIO(GPIO_FN_D33_AD1_DR1, D33_AD1_DR1_MARK), - PINMUX_GPIO(GPIO_FN_D32_AD0_DR0, D32_AD0_DR0_MARK), - PINMUX_GPIO(GPIO_FN_REQ1, REQ1_MARK), - PINMUX_GPIO(GPIO_FN_REQ2, REQ2_MARK), - PINMUX_GPIO(GPIO_FN_REQ3, REQ3_MARK), - PINMUX_GPIO(GPIO_FN_GNT1, GNT1_MARK), - PINMUX_GPIO(GPIO_FN_GNT2, GNT2_MARK), - PINMUX_GPIO(GPIO_FN_GNT3, GNT3_MARK), - PINMUX_GPIO(GPIO_FN_MMCCLK, MMCCLK_MARK), - PINMUX_GPIO(GPIO_FN_D31, D31_MARK), - PINMUX_GPIO(GPIO_FN_D30, D30_MARK), - PINMUX_GPIO(GPIO_FN_D29, D29_MARK), - PINMUX_GPIO(GPIO_FN_D28, D28_MARK), - PINMUX_GPIO(GPIO_FN_D27, D27_MARK), - PINMUX_GPIO(GPIO_FN_D26, D26_MARK), - PINMUX_GPIO(GPIO_FN_D25, D25_MARK), - PINMUX_GPIO(GPIO_FN_D24, D24_MARK), - PINMUX_GPIO(GPIO_FN_D23, D23_MARK), - PINMUX_GPIO(GPIO_FN_D22, D22_MARK), - PINMUX_GPIO(GPIO_FN_D21, D21_MARK), - PINMUX_GPIO(GPIO_FN_D20, D20_MARK), - PINMUX_GPIO(GPIO_FN_D19, D19_MARK), - PINMUX_GPIO(GPIO_FN_D18, D18_MARK), - PINMUX_GPIO(GPIO_FN_D17, D17_MARK), - PINMUX_GPIO(GPIO_FN_D16, D16_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_CTS, SCIF0_CTS_MARK), - PINMUX_GPIO(GPIO_FN_INTD, INTD_MARK), - PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_RTS, SCIF0_RTS_MARK), - PINMUX_GPIO(GPIO_FN_HSPI_CS, HSPI_CS_MARK), - PINMUX_GPIO(GPIO_FN_FSE, FSE_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_SCK, SCIF0_SCK_MARK), - PINMUX_GPIO(GPIO_FN_HSPI_CLK, HSPI_CLK_MARK), - PINMUX_GPIO(GPIO_FN_FRE, FRE_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_RXD, SCIF0_RXD_MARK), - PINMUX_GPIO(GPIO_FN_HSPI_RX, HSPI_RX_MARK), - PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_TXD, SCIF0_TXD_MARK), - PINMUX_GPIO(GPIO_FN_HSPI_TX, HSPI_TX_MARK), - PINMUX_GPIO(GPIO_FN_FWE, FWE_MARK), - PINMUX_GPIO(GPIO_FN_SCIF5_TXD, SCIF5_TXD_MARK), - PINMUX_GPIO(GPIO_FN_HAC1_SYNC, HAC1_SYNC_MARK), - PINMUX_GPIO(GPIO_FN_SSI1_WS, SSI1_WS_MARK), - PINMUX_GPIO(GPIO_FN_SIOF_TXD_PJ, SIOF_TXD_PJ_MARK), - PINMUX_GPIO(GPIO_FN_HAC0_SDOUT, HAC0_SDOUT_MARK), - PINMUX_GPIO(GPIO_FN_SSI0_SDATA, SSI0_SDATA_MARK), - PINMUX_GPIO(GPIO_FN_SIOF_RXD_PJ, SIOF_RXD_PJ_MARK), - PINMUX_GPIO(GPIO_FN_HAC0_SDIN, HAC0_SDIN_MARK), - PINMUX_GPIO(GPIO_FN_SSI0_SCK, SSI0_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SIOF_SYNC_PJ, SIOF_SYNC_PJ_MARK), - PINMUX_GPIO(GPIO_FN_HAC0_SYNC, HAC0_SYNC_MARK), - PINMUX_GPIO(GPIO_FN_SSI0_WS, SSI0_WS_MARK), - PINMUX_GPIO(GPIO_FN_SIOF_MCLK_PJ, SIOF_MCLK_PJ_MARK), - PINMUX_GPIO(GPIO_FN_HAC_RES, HAC_RES_MARK), - PINMUX_GPIO(GPIO_FN_SIOF_SCK_PJ, SIOF_SCK_PJ_MARK), - PINMUX_GPIO(GPIO_FN_HAC0_BITCLK, HAC0_BITCLK_MARK), - PINMUX_GPIO(GPIO_FN_SSI0_CLK, SSI0_CLK_MARK), - PINMUX_GPIO(GPIO_FN_HAC1_BITCLK, HAC1_BITCLK_MARK), - PINMUX_GPIO(GPIO_FN_SSI1_CLK, SSI1_CLK_MARK), - PINMUX_GPIO(GPIO_FN_TCLK, TCLK_MARK), - PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK), - PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK), - PINMUX_GPIO(GPIO_FN_DRAK0_PK3, DRAK0_PK3_MARK), - PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK), - PINMUX_GPIO(GPIO_FN_DRAK1_PK2, DRAK1_PK2_MARK), - PINMUX_GPIO(GPIO_FN_DACK2, DACK2_MARK), - PINMUX_GPIO(GPIO_FN_SCIF2_TXD, SCIF2_TXD_MARK), - PINMUX_GPIO(GPIO_FN_MMCCMD, MMCCMD_MARK), - PINMUX_GPIO(GPIO_FN_SIOF_TXD_PK, SIOF_TXD_PK_MARK), - PINMUX_GPIO(GPIO_FN_DACK3, DACK3_MARK), - PINMUX_GPIO(GPIO_FN_SCIF2_SCK, SCIF2_SCK_MARK), - PINMUX_GPIO(GPIO_FN_MMCDAT, MMCDAT_MARK), - PINMUX_GPIO(GPIO_FN_SIOF_SCK_PK, SIOF_SCK_PK_MARK), - PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK), - PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK), - PINMUX_GPIO(GPIO_FN_DRAK0_PK1, DRAK0_PK1_MARK), - PINMUX_GPIO(GPIO_FN_DRAK1_PK0, DRAK1_PK0_MARK), - PINMUX_GPIO(GPIO_FN_DREQ2, DREQ2_MARK), - PINMUX_GPIO(GPIO_FN_INTB, INTB_MARK), - PINMUX_GPIO(GPIO_FN_DREQ3, DREQ3_MARK), - PINMUX_GPIO(GPIO_FN_INTC, INTC_MARK), - PINMUX_GPIO(GPIO_FN_DRAK2, DRAK2_MARK), - PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK), - PINMUX_GPIO(GPIO_FN_IRL4, IRL4_MARK), - PINMUX_GPIO(GPIO_FN_FD4, FD4_MARK), - PINMUX_GPIO(GPIO_FN_IRL5, IRL5_MARK), - PINMUX_GPIO(GPIO_FN_FD5, FD5_MARK), - PINMUX_GPIO(GPIO_FN_IRL6, IRL6_MARK), - PINMUX_GPIO(GPIO_FN_FD6, FD6_MARK), - PINMUX_GPIO(GPIO_FN_IRL7, IRL7_MARK), - PINMUX_GPIO(GPIO_FN_FD7, FD7_MARK), - PINMUX_GPIO(GPIO_FN_DRAK3, DRAK3_MARK), - PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK), - PINMUX_GPIO(GPIO_FN_BREQ_BSACK, BREQ_BSACK_MARK), - PINMUX_GPIO(GPIO_FN_BACK_BSREQ, BACK_BSREQ_MARK), - PINMUX_GPIO(GPIO_FN_SCIF5_RXD, SCIF5_RXD_MARK), - PINMUX_GPIO(GPIO_FN_HAC1_SDIN, HAC1_SDIN_MARK), - PINMUX_GPIO(GPIO_FN_SSI1_SCK, SSI1_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SCIF5_SCK, SCIF5_SCK_MARK), - PINMUX_GPIO(GPIO_FN_HAC1_SDOUT, HAC1_SDOUT_MARK), - PINMUX_GPIO(GPIO_FN_SSI1_SDATA, SSI1_SDATA_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_TXD, SCIF3_TXD_MARK), - PINMUX_GPIO(GPIO_FN_FCLE, FCLE_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_RXD, SCIF3_RXD_MARK), - PINMUX_GPIO(GPIO_FN_FALE, FALE_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_SCK, SCIF3_SCK_MARK), - PINMUX_GPIO(GPIO_FN_FD0, FD0_MARK), - PINMUX_GPIO(GPIO_FN_SCIF4_TXD, SCIF4_TXD_MARK), - PINMUX_GPIO(GPIO_FN_FD1, FD1_MARK), - PINMUX_GPIO(GPIO_FN_SCIF4_RXD, SCIF4_RXD_MARK), - PINMUX_GPIO(GPIO_FN_FD2, FD2_MARK), - PINMUX_GPIO(GPIO_FN_SCIF4_SCK, SCIF4_SCK_MARK), - PINMUX_GPIO(GPIO_FN_FD3, FD3_MARK), - PINMUX_GPIO(GPIO_FN_DEVSEL_DCLKOUT, DEVSEL_DCLKOUT_MARK), - PINMUX_GPIO(GPIO_FN_STOP_CDE, STOP_CDE_MARK), - PINMUX_GPIO(GPIO_FN_LOCK_ODDF, LOCK_ODDF_MARK), - PINMUX_GPIO(GPIO_FN_TRDY_DISPL, TRDY_DISPL_MARK), - PINMUX_GPIO(GPIO_FN_IRDY_HSYNC, IRDY_HSYNC_MARK), - PINMUX_GPIO(GPIO_FN_PCIFRAME_VSYNC, PCIFRAME_VSYNC_MARK), - PINMUX_GPIO(GPIO_FN_INTA, INTA_MARK), - PINMUX_GPIO(GPIO_FN_GNT0_GNTIN, GNT0_GNTIN_MARK), - PINMUX_GPIO(GPIO_FN_REQ0_REQOUT, REQ0_REQOUT_MARK), - PINMUX_GPIO(GPIO_FN_PERR, PERR_MARK), - PINMUX_GPIO(GPIO_FN_SERR, SERR_MARK), - PINMUX_GPIO(GPIO_FN_WE7_CBE3, WE7_CBE3_MARK), - PINMUX_GPIO(GPIO_FN_WE6_CBE2, WE6_CBE2_MARK), - PINMUX_GPIO(GPIO_FN_WE5_CBE1, WE5_CBE1_MARK), - PINMUX_GPIO(GPIO_FN_WE4_CBE0, WE4_CBE0_MARK), - PINMUX_GPIO(GPIO_FN_SCIF2_RXD, SCIF2_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SIOF_RXD, SIOF_RXD_MARK), - PINMUX_GPIO(GPIO_FN_MRESETOUT, MRESETOUT_MARK), - PINMUX_GPIO(GPIO_FN_IRQOUT, IRQOUT_MARK), + GPIO_FN(D63_AD31), + GPIO_FN(D62_AD30), + GPIO_FN(D61_AD29), + GPIO_FN(D60_AD28), + GPIO_FN(D59_AD27), + GPIO_FN(D58_AD26), + GPIO_FN(D57_AD25), + GPIO_FN(D56_AD24), + GPIO_FN(D55_AD23), + GPIO_FN(D54_AD22), + GPIO_FN(D53_AD21), + GPIO_FN(D52_AD20), + GPIO_FN(D51_AD19), + GPIO_FN(D50_AD18), + GPIO_FN(D49_AD17_DB5), + GPIO_FN(D48_AD16_DB4), + GPIO_FN(D47_AD15_DB3), + GPIO_FN(D46_AD14_DB2), + GPIO_FN(D45_AD13_DB1), + GPIO_FN(D44_AD12_DB0), + GPIO_FN(D43_AD11_DG5), + GPIO_FN(D42_AD10_DG4), + GPIO_FN(D41_AD9_DG3), + GPIO_FN(D40_AD8_DG2), + GPIO_FN(D39_AD7_DG1), + GPIO_FN(D38_AD6_DG0), + GPIO_FN(D37_AD5_DR5), + GPIO_FN(D36_AD4_DR4), + GPIO_FN(D35_AD3_DR3), + GPIO_FN(D34_AD2_DR2), + GPIO_FN(D33_AD1_DR1), + GPIO_FN(D32_AD0_DR0), + GPIO_FN(REQ1), + GPIO_FN(REQ2), + GPIO_FN(REQ3), + GPIO_FN(GNT1), + GPIO_FN(GNT2), + GPIO_FN(GNT3), + GPIO_FN(MMCCLK), + GPIO_FN(D31), + GPIO_FN(D30), + GPIO_FN(D29), + GPIO_FN(D28), + GPIO_FN(D27), + GPIO_FN(D26), + GPIO_FN(D25), + GPIO_FN(D24), + GPIO_FN(D23), + GPIO_FN(D22), + GPIO_FN(D21), + GPIO_FN(D20), + GPIO_FN(D19), + GPIO_FN(D18), + GPIO_FN(D17), + GPIO_FN(D16), + GPIO_FN(SCIF1_SCK), + GPIO_FN(SCIF1_RXD), + GPIO_FN(SCIF1_TXD), + GPIO_FN(SCIF0_CTS), + GPIO_FN(INTD), + GPIO_FN(FCE), + GPIO_FN(SCIF0_RTS), + GPIO_FN(HSPI_CS), + GPIO_FN(FSE), + GPIO_FN(SCIF0_SCK), + GPIO_FN(HSPI_CLK), + GPIO_FN(FRE), + GPIO_FN(SCIF0_RXD), + GPIO_FN(HSPI_RX), + GPIO_FN(FRB), + GPIO_FN(SCIF0_TXD), + GPIO_FN(HSPI_TX), + GPIO_FN(FWE), + GPIO_FN(SCIF5_TXD), + GPIO_FN(HAC1_SYNC), + GPIO_FN(SSI1_WS), + GPIO_FN(SIOF_TXD_PJ), + GPIO_FN(HAC0_SDOUT), + GPIO_FN(SSI0_SDATA), + GPIO_FN(SIOF_RXD_PJ), + GPIO_FN(HAC0_SDIN), + GPIO_FN(SSI0_SCK), + GPIO_FN(SIOF_SYNC_PJ), + GPIO_FN(HAC0_SYNC), + GPIO_FN(SSI0_WS), + GPIO_FN(SIOF_MCLK_PJ), + GPIO_FN(HAC_RES), + GPIO_FN(SIOF_SCK_PJ), + GPIO_FN(HAC0_BITCLK), + GPIO_FN(SSI0_CLK), + GPIO_FN(HAC1_BITCLK), + GPIO_FN(SSI1_CLK), + GPIO_FN(TCLK), + GPIO_FN(IOIS16), + GPIO_FN(STATUS0), + GPIO_FN(DRAK0_PK3), + GPIO_FN(STATUS1), + GPIO_FN(DRAK1_PK2), + GPIO_FN(DACK2), + GPIO_FN(SCIF2_TXD), + GPIO_FN(MMCCMD), + GPIO_FN(SIOF_TXD_PK), + GPIO_FN(DACK3), + GPIO_FN(SCIF2_SCK), + GPIO_FN(MMCDAT), + GPIO_FN(SIOF_SCK_PK), + GPIO_FN(DREQ0), + GPIO_FN(DREQ1), + GPIO_FN(DRAK0_PK1), + GPIO_FN(DRAK1_PK0), + GPIO_FN(DREQ2), + GPIO_FN(INTB), + GPIO_FN(DREQ3), + GPIO_FN(INTC), + GPIO_FN(DRAK2), + GPIO_FN(CE2A), + GPIO_FN(IRL4), + GPIO_FN(FD4), + GPIO_FN(IRL5), + GPIO_FN(FD5), + GPIO_FN(IRL6), + GPIO_FN(FD6), + GPIO_FN(IRL7), + GPIO_FN(FD7), + GPIO_FN(DRAK3), + GPIO_FN(CE2B), + GPIO_FN(BREQ_BSACK), + GPIO_FN(BACK_BSREQ), + GPIO_FN(SCIF5_RXD), + GPIO_FN(HAC1_SDIN), + GPIO_FN(SSI1_SCK), + GPIO_FN(SCIF5_SCK), + GPIO_FN(HAC1_SDOUT), + GPIO_FN(SSI1_SDATA), + GPIO_FN(SCIF3_TXD), + GPIO_FN(FCLE), + GPIO_FN(SCIF3_RXD), + GPIO_FN(FALE), + GPIO_FN(SCIF3_SCK), + GPIO_FN(FD0), + GPIO_FN(SCIF4_TXD), + GPIO_FN(FD1), + GPIO_FN(SCIF4_RXD), + GPIO_FN(FD2), + GPIO_FN(SCIF4_SCK), + GPIO_FN(FD3), + GPIO_FN(DEVSEL_DCLKOUT), + GPIO_FN(STOP_CDE), + GPIO_FN(LOCK_ODDF), + GPIO_FN(TRDY_DISPL), + GPIO_FN(IRDY_HSYNC), + GPIO_FN(PCIFRAME_VSYNC), + GPIO_FN(INTA), + GPIO_FN(GNT0_GNTIN), + GPIO_FN(REQ0_REQOUT), + GPIO_FN(PERR), + GPIO_FN(SERR), + GPIO_FN(WE7_CBE3), + GPIO_FN(WE6_CBE2), + GPIO_FN(WE5_CBE1), + GPIO_FN(WE4_CBE0), + GPIO_FN(SCIF2_RXD), + GPIO_FN(SIOF_RXD), + GPIO_FN(MRESETOUT), + GPIO_FN(IRQOUT), }; -static struct pinmux_cfg_reg pinmux_config_regs[] = { +static const struct pinmux_cfg_reg pinmux_config_regs[] = { { PINMUX_CFG_REG("PACR", 0xffe70000, 16, 2) { PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU, PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU, @@ -1214,7 +1218,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { {} }; -static struct pinmux_data_reg pinmux_data_regs[] = { +static const struct pinmux_data_reg pinmux_data_regs[] = { { PINMUX_DATA_REG("PADR", 0xffe70020, 8) { PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA, PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA } @@ -1282,20 +1286,18 @@ static struct pinmux_data_reg pinmux_data_regs[] = { { }, }; -struct sh_pfc_soc_info sh7785_pinmux_info = { +const struct sh_pfc_soc_info sh7785_pinmux_info = { .name = "sh7785_pfc", - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - .first_gpio = GPIO_PA7, - .last_gpio = GPIO_FN_IRQOUT, + .pins = pinmux_pins, + .nr_pins = ARRAY_SIZE(pinmux_pins), + .func_gpios = pinmux_func_gpios, + .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios), - .gpios = pinmux_gpios, .cfg_regs = pinmux_config_regs, .data_regs = pinmux_data_regs, diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7786.c b/drivers/pinctrl/sh-pfc/pfc-sh7786.c index 1e18b58f9e5f..8ae0e32844e9 100644 --- a/drivers/pinctrl/sh-pfc/pfc-sh7786.c +++ b/drivers/pinctrl/sh-pfc/pfc-sh7786.c @@ -191,7 +191,7 @@ enum { PINMUX_MARK_END, }; -static pinmux_enum_t pinmux_data[] = { +static const pinmux_enum_t pinmux_data[] = { /* PA GPIO */ PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU), @@ -427,7 +427,7 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_DATA(SSI3_SCK_MARK, P2MSEL6_1, P2MSEL5_1, PJ1_FN), }; -static struct pinmux_gpio pinmux_gpios[] = { +static struct sh_pfc_pin pinmux_pins[] = { /* PA */ PINMUX_GPIO(GPIO_PA7, PA7_DATA), PINMUX_GPIO(GPIO_PA6, PA6_DATA), @@ -505,147 +505,151 @@ static struct pinmux_gpio pinmux_gpios[] = { PINMUX_GPIO(GPIO_PJ3, PJ3_DATA), PINMUX_GPIO(GPIO_PJ2, PJ2_DATA), PINMUX_GPIO(GPIO_PJ1, PJ1_DATA), +}; + +#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins) +static const struct pinmux_func pinmux_func_gpios[] = { /* FN */ - PINMUX_GPIO(GPIO_FN_CDE, CDE_MARK), - PINMUX_GPIO(GPIO_FN_ETH_MAGIC, ETH_MAGIC_MARK), - PINMUX_GPIO(GPIO_FN_DISP, DISP_MARK), - PINMUX_GPIO(GPIO_FN_ETH_LINK, ETH_LINK_MARK), - PINMUX_GPIO(GPIO_FN_DR5, DR5_MARK), - PINMUX_GPIO(GPIO_FN_ETH_TX_ER, ETH_TX_ER_MARK), - PINMUX_GPIO(GPIO_FN_DR4, DR4_MARK), - PINMUX_GPIO(GPIO_FN_ETH_TX_EN, ETH_TX_EN_MARK), - PINMUX_GPIO(GPIO_FN_DR3, DR3_MARK), - PINMUX_GPIO(GPIO_FN_ETH_TXD3, ETH_TXD3_MARK), - PINMUX_GPIO(GPIO_FN_DR2, DR2_MARK), - PINMUX_GPIO(GPIO_FN_ETH_TXD2, ETH_TXD2_MARK), - PINMUX_GPIO(GPIO_FN_DR1, DR1_MARK), - PINMUX_GPIO(GPIO_FN_ETH_TXD1, ETH_TXD1_MARK), - PINMUX_GPIO(GPIO_FN_DR0, DR0_MARK), - PINMUX_GPIO(GPIO_FN_ETH_TXD0, ETH_TXD0_MARK), - PINMUX_GPIO(GPIO_FN_VSYNC, VSYNC_MARK), - PINMUX_GPIO(GPIO_FN_HSPI_CLK, HSPI_CLK_MARK), - PINMUX_GPIO(GPIO_FN_ODDF, ODDF_MARK), - PINMUX_GPIO(GPIO_FN_HSPI_CS, HSPI_CS_MARK), - PINMUX_GPIO(GPIO_FN_DG5, DG5_MARK), - PINMUX_GPIO(GPIO_FN_ETH_MDIO, ETH_MDIO_MARK), - PINMUX_GPIO(GPIO_FN_DG4, DG4_MARK), - PINMUX_GPIO(GPIO_FN_ETH_RX_CLK, ETH_RX_CLK_MARK), - PINMUX_GPIO(GPIO_FN_DG3, DG3_MARK), - PINMUX_GPIO(GPIO_FN_ETH_MDC, ETH_MDC_MARK), - PINMUX_GPIO(GPIO_FN_DG2, DG2_MARK), - PINMUX_GPIO(GPIO_FN_ETH_COL, ETH_COL_MARK), - PINMUX_GPIO(GPIO_FN_DG1, DG1_MARK), - PINMUX_GPIO(GPIO_FN_ETH_TX_CLK, ETH_TX_CLK_MARK), - PINMUX_GPIO(GPIO_FN_DG0, DG0_MARK), - PINMUX_GPIO(GPIO_FN_ETH_CRS, ETH_CRS_MARK), - PINMUX_GPIO(GPIO_FN_DCLKIN, DCLKIN_MARK), - PINMUX_GPIO(GPIO_FN_HSPI_RX, HSPI_RX_MARK), - PINMUX_GPIO(GPIO_FN_HSYNC, HSYNC_MARK), - PINMUX_GPIO(GPIO_FN_HSPI_TX, HSPI_TX_MARK), - PINMUX_GPIO(GPIO_FN_DB5, DB5_MARK), - PINMUX_GPIO(GPIO_FN_ETH_RXD3, ETH_RXD3_MARK), - PINMUX_GPIO(GPIO_FN_DB4, DB4_MARK), - PINMUX_GPIO(GPIO_FN_ETH_RXD2, ETH_RXD2_MARK), - PINMUX_GPIO(GPIO_FN_DB3, DB3_MARK), - PINMUX_GPIO(GPIO_FN_ETH_RXD1, ETH_RXD1_MARK), - PINMUX_GPIO(GPIO_FN_DB2, DB2_MARK), - PINMUX_GPIO(GPIO_FN_ETH_RXD0, ETH_RXD0_MARK), - PINMUX_GPIO(GPIO_FN_DB1, DB1_MARK), - PINMUX_GPIO(GPIO_FN_ETH_RX_DV, ETH_RX_DV_MARK), - PINMUX_GPIO(GPIO_FN_DB0, DB0_MARK), - PINMUX_GPIO(GPIO_FN_ETH_RX_ER, ETH_RX_ER_MARK), - PINMUX_GPIO(GPIO_FN_DCLKOUT, DCLKOUT_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK), - PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK), - PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK), - PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK), - PINMUX_GPIO(GPIO_FN_FALE, FALE_MARK), - PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK), - PINMUX_GPIO(GPIO_FN_FCLE, FCLE_MARK), - PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK), - PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK), - PINMUX_GPIO(GPIO_FN_USB_OVC1, USB_OVC1_MARK), - PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK), - PINMUX_GPIO(GPIO_FN_USB_OVC0, USB_OVC0_MARK), - PINMUX_GPIO(GPIO_FN_USB_PENC1, USB_PENC1_MARK), - PINMUX_GPIO(GPIO_FN_USB_PENC0, USB_PENC0_MARK), - PINMUX_GPIO(GPIO_FN_HAC1_SDOUT, HAC1_SDOUT_MARK), - PINMUX_GPIO(GPIO_FN_SSI1_SDATA, SSI1_SDATA_MARK), - PINMUX_GPIO(GPIO_FN_SDIF1CMD, SDIF1CMD_MARK), - PINMUX_GPIO(GPIO_FN_HAC1_SDIN, HAC1_SDIN_MARK), - PINMUX_GPIO(GPIO_FN_SSI1_SCK, SSI1_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SDIF1CD, SDIF1CD_MARK), - PINMUX_GPIO(GPIO_FN_HAC1_SYNC, HAC1_SYNC_MARK), - PINMUX_GPIO(GPIO_FN_SSI1_WS, SSI1_WS_MARK), - PINMUX_GPIO(GPIO_FN_SDIF1WP, SDIF1WP_MARK), - PINMUX_GPIO(GPIO_FN_HAC1_BITCLK, HAC1_BITCLK_MARK), - PINMUX_GPIO(GPIO_FN_SSI1_CLK, SSI1_CLK_MARK), - PINMUX_GPIO(GPIO_FN_SDIF1CLK, SDIF1CLK_MARK), - PINMUX_GPIO(GPIO_FN_HAC0_SDOUT, HAC0_SDOUT_MARK), - PINMUX_GPIO(GPIO_FN_SSI0_SDATA, SSI0_SDATA_MARK), - PINMUX_GPIO(GPIO_FN_SDIF1D3, SDIF1D3_MARK), - PINMUX_GPIO(GPIO_FN_HAC0_SDIN, HAC0_SDIN_MARK), - PINMUX_GPIO(GPIO_FN_SSI0_SCK, SSI0_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SDIF1D2, SDIF1D2_MARK), - PINMUX_GPIO(GPIO_FN_HAC0_SYNC, HAC0_SYNC_MARK), - PINMUX_GPIO(GPIO_FN_SSI0_WS, SSI0_WS_MARK), - PINMUX_GPIO(GPIO_FN_SDIF1D1, SDIF1D1_MARK), - PINMUX_GPIO(GPIO_FN_HAC0_BITCLK, HAC0_BITCLK_MARK), - PINMUX_GPIO(GPIO_FN_SSI0_CLK, SSI0_CLK_MARK), - PINMUX_GPIO(GPIO_FN_SDIF1D0, SDIF1D0_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_SCK, SCIF3_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SSI2_SDATA, SSI2_SDATA_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_RXD, SCIF3_RXD_MARK), - PINMUX_GPIO(GPIO_FN_TCLK, TCLK_MARK), - PINMUX_GPIO(GPIO_FN_SSI2_SCK, SSI2_SCK_MARK), - PINMUX_GPIO(GPIO_FN_SCIF3_TXD, SCIF3_TXD_MARK), - PINMUX_GPIO(GPIO_FN_HAC_RES, HAC_RES_MARK), - PINMUX_GPIO(GPIO_FN_SSI2_WS, SSI2_WS_MARK), - PINMUX_GPIO(GPIO_FN_DACK3, DACK3_MARK), - PINMUX_GPIO(GPIO_FN_SDIF0CMD, SDIF0CMD_MARK), - PINMUX_GPIO(GPIO_FN_DACK2, DACK2_MARK), - PINMUX_GPIO(GPIO_FN_SDIF0CD, SDIF0CD_MARK), - PINMUX_GPIO(GPIO_FN_DREQ3, DREQ3_MARK), - PINMUX_GPIO(GPIO_FN_SDIF0WP, SDIF0WP_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_CTS, SCIF0_CTS_MARK), - PINMUX_GPIO(GPIO_FN_DREQ2, DREQ2_MARK), - PINMUX_GPIO(GPIO_FN_SDIF0CLK, SDIF0CLK_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_RTS, SCIF0_RTS_MARK), - PINMUX_GPIO(GPIO_FN_IRL7, IRL7_MARK), - PINMUX_GPIO(GPIO_FN_SDIF0D3, SDIF0D3_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_SCK, SCIF0_SCK_MARK), - PINMUX_GPIO(GPIO_FN_IRL6, IRL6_MARK), - PINMUX_GPIO(GPIO_FN_SDIF0D2, SDIF0D2_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_RXD, SCIF0_RXD_MARK), - PINMUX_GPIO(GPIO_FN_IRL5, IRL5_MARK), - PINMUX_GPIO(GPIO_FN_SDIF0D1, SDIF0D1_MARK), - PINMUX_GPIO(GPIO_FN_SCIF0_TXD, SCIF0_TXD_MARK), - PINMUX_GPIO(GPIO_FN_IRL4, IRL4_MARK), - PINMUX_GPIO(GPIO_FN_SDIF0D0, SDIF0D0_MARK), - PINMUX_GPIO(GPIO_FN_SCIF5_SCK, SCIF5_SCK_MARK), - PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK), - PINMUX_GPIO(GPIO_FN_SCIF5_RXD, SCIF5_RXD_MARK), - PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK), - PINMUX_GPIO(GPIO_FN_SCIF5_TXD, SCIF5_TXD_MARK), - PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK), - PINMUX_GPIO(GPIO_FN_DRAK3, DRAK3_MARK), - PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK), - PINMUX_GPIO(GPIO_FN_SCIF4_SCK, SCIF4_SCK_MARK), - PINMUX_GPIO(GPIO_FN_DRAK2, DRAK2_MARK), - PINMUX_GPIO(GPIO_FN_SSI3_WS, SSI3_WS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF4_RXD, SCIF4_RXD_MARK), - PINMUX_GPIO(GPIO_FN_DRAK1, DRAK1_MARK), - PINMUX_GPIO(GPIO_FN_SSI3_SDATA, SSI3_SDATA_MARK), - PINMUX_GPIO(GPIO_FN_FSTATUS, FSTATUS_MARK), - PINMUX_GPIO(GPIO_FN_SCIF4_TXD, SCIF4_TXD_MARK), - PINMUX_GPIO(GPIO_FN_DRAK0, DRAK0_MARK), - PINMUX_GPIO(GPIO_FN_SSI3_SCK, SSI3_SCK_MARK), - PINMUX_GPIO(GPIO_FN_FSE, FSE_MARK), + GPIO_FN(CDE), + GPIO_FN(ETH_MAGIC), + GPIO_FN(DISP), + GPIO_FN(ETH_LINK), + GPIO_FN(DR5), + GPIO_FN(ETH_TX_ER), + GPIO_FN(DR4), + GPIO_FN(ETH_TX_EN), + GPIO_FN(DR3), + GPIO_FN(ETH_TXD3), + GPIO_FN(DR2), + GPIO_FN(ETH_TXD2), + GPIO_FN(DR1), + GPIO_FN(ETH_TXD1), + GPIO_FN(DR0), + GPIO_FN(ETH_TXD0), + GPIO_FN(VSYNC), + GPIO_FN(HSPI_CLK), + GPIO_FN(ODDF), + GPIO_FN(HSPI_CS), + GPIO_FN(DG5), + GPIO_FN(ETH_MDIO), + GPIO_FN(DG4), + GPIO_FN(ETH_RX_CLK), + GPIO_FN(DG3), + GPIO_FN(ETH_MDC), + GPIO_FN(DG2), + GPIO_FN(ETH_COL), + GPIO_FN(DG1), + GPIO_FN(ETH_TX_CLK), + GPIO_FN(DG0), + GPIO_FN(ETH_CRS), + GPIO_FN(DCLKIN), + GPIO_FN(HSPI_RX), + GPIO_FN(HSYNC), + GPIO_FN(HSPI_TX), + GPIO_FN(DB5), + GPIO_FN(ETH_RXD3), + GPIO_FN(DB4), + GPIO_FN(ETH_RXD2), + GPIO_FN(DB3), + GPIO_FN(ETH_RXD1), + GPIO_FN(DB2), + GPIO_FN(ETH_RXD0), + GPIO_FN(DB1), + GPIO_FN(ETH_RX_DV), + GPIO_FN(DB0), + GPIO_FN(ETH_RX_ER), + GPIO_FN(DCLKOUT), + GPIO_FN(SCIF1_SCK), + GPIO_FN(SCIF1_RXD), + GPIO_FN(SCIF1_TXD), + GPIO_FN(DACK1), + GPIO_FN(BACK), + GPIO_FN(FALE), + GPIO_FN(DACK0), + GPIO_FN(FCLE), + GPIO_FN(DREQ1), + GPIO_FN(BREQ), + GPIO_FN(USB_OVC1), + GPIO_FN(DREQ0), + GPIO_FN(USB_OVC0), + GPIO_FN(USB_PENC1), + GPIO_FN(USB_PENC0), + GPIO_FN(HAC1_SDOUT), + GPIO_FN(SSI1_SDATA), + GPIO_FN(SDIF1CMD), + GPIO_FN(HAC1_SDIN), + GPIO_FN(SSI1_SCK), + GPIO_FN(SDIF1CD), + GPIO_FN(HAC1_SYNC), + GPIO_FN(SSI1_WS), + GPIO_FN(SDIF1WP), + GPIO_FN(HAC1_BITCLK), + GPIO_FN(SSI1_CLK), + GPIO_FN(SDIF1CLK), + GPIO_FN(HAC0_SDOUT), + GPIO_FN(SSI0_SDATA), + GPIO_FN(SDIF1D3), + GPIO_FN(HAC0_SDIN), + GPIO_FN(SSI0_SCK), + GPIO_FN(SDIF1D2), + GPIO_FN(HAC0_SYNC), + GPIO_FN(SSI0_WS), + GPIO_FN(SDIF1D1), + GPIO_FN(HAC0_BITCLK), + GPIO_FN(SSI0_CLK), + GPIO_FN(SDIF1D0), + GPIO_FN(SCIF3_SCK), + GPIO_FN(SSI2_SDATA), + GPIO_FN(SCIF3_RXD), + GPIO_FN(TCLK), + GPIO_FN(SSI2_SCK), + GPIO_FN(SCIF3_TXD), + GPIO_FN(HAC_RES), + GPIO_FN(SSI2_WS), + GPIO_FN(DACK3), + GPIO_FN(SDIF0CMD), + GPIO_FN(DACK2), + GPIO_FN(SDIF0CD), + GPIO_FN(DREQ3), + GPIO_FN(SDIF0WP), + GPIO_FN(SCIF0_CTS), + GPIO_FN(DREQ2), + GPIO_FN(SDIF0CLK), + GPIO_FN(SCIF0_RTS), + GPIO_FN(IRL7), + GPIO_FN(SDIF0D3), + GPIO_FN(SCIF0_SCK), + GPIO_FN(IRL6), + GPIO_FN(SDIF0D2), + GPIO_FN(SCIF0_RXD), + GPIO_FN(IRL5), + GPIO_FN(SDIF0D1), + GPIO_FN(SCIF0_TXD), + GPIO_FN(IRL4), + GPIO_FN(SDIF0D0), + GPIO_FN(SCIF5_SCK), + GPIO_FN(FRB), + GPIO_FN(SCIF5_RXD), + GPIO_FN(IOIS16), + GPIO_FN(SCIF5_TXD), + GPIO_FN(CE2B), + GPIO_FN(DRAK3), + GPIO_FN(CE2A), + GPIO_FN(SCIF4_SCK), + GPIO_FN(DRAK2), + GPIO_FN(SSI3_WS), + GPIO_FN(SCIF4_RXD), + GPIO_FN(DRAK1), + GPIO_FN(SSI3_SDATA), + GPIO_FN(FSTATUS), + GPIO_FN(SCIF4_TXD), + GPIO_FN(DRAK0), + GPIO_FN(SSI3_SCK), + GPIO_FN(FSE), }; -static struct pinmux_cfg_reg pinmux_config_regs[] = { +static const struct pinmux_cfg_reg pinmux_config_regs[] = { { PINMUX_CFG_REG("PACR", 0xffcc0000, 16, 2) { PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU, PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU, @@ -775,7 +779,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = { {} }; -static struct pinmux_data_reg pinmux_data_regs[] = { +static const struct pinmux_data_reg pinmux_data_regs[] = { { PINMUX_DATA_REG("PADR", 0xffcc0020, 8) { PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA, PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA } @@ -815,20 +819,18 @@ static struct pinmux_data_reg pinmux_data_regs[] = { { }, }; -struct sh_pfc_soc_info sh7786_pinmux_info = { +const struct sh_pfc_soc_info sh7786_pinmux_info = { .name = "sh7786_pfc", - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - .first_gpio = GPIO_PA7, - .last_gpio = GPIO_FN_IRL4, + .pins = pinmux_pins, + .nr_pins = ARRAY_SIZE(pinmux_pins), + .func_gpios = pinmux_func_gpios, + .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios), - .gpios = pinmux_gpios, .cfg_regs = pinmux_config_regs, .data_regs = pinmux_data_regs, diff --git a/drivers/pinctrl/sh-pfc/pfc-shx3.c b/drivers/pinctrl/sh-pfc/pfc-shx3.c index ccf6918b03c6..6594c8c48747 100644 --- a/drivers/pinctrl/sh-pfc/pfc-shx3.c +++ b/drivers/pinctrl/sh-pfc/pfc-shx3.c @@ -147,7 +147,7 @@ enum { PINMUX_MARK_END, }; -static pinmux_enum_t shx3_pinmux_data[] = { +static const pinmux_enum_t shx3_pinmux_data[] = { /* PA GPIO */ PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU), @@ -306,7 +306,7 @@ static pinmux_enum_t shx3_pinmux_data[] = { PINMUX_DATA(IRQOUT_MARK, PH0_FN), }; -static struct pinmux_gpio shx3_pinmux_gpios[] = { +static struct sh_pfc_pin shx3_pinmux_pins[] = { /* PA */ PINMUX_GPIO(GPIO_PA7, PA7_DATA), PINMUX_GPIO(GPIO_PA6, PA6_DATA), @@ -384,73 +384,77 @@ static struct pinmux_gpio shx3_pinmux_gpios[] = { PINMUX_GPIO(GPIO_PH2, PH2_DATA), PINMUX_GPIO(GPIO_PH1, PH1_DATA), PINMUX_GPIO(GPIO_PH0, PH0_DATA), +}; + +#define PINMUX_FN_BASE ARRAY_SIZE(shx3_pinmux_pins) +static const struct pinmux_func shx3_pinmux_func_gpios[] = { /* FN */ - PINMUX_GPIO(GPIO_FN_D31, D31_MARK), - PINMUX_GPIO(GPIO_FN_D30, D30_MARK), - PINMUX_GPIO(GPIO_FN_D29, D29_MARK), - PINMUX_GPIO(GPIO_FN_D28, D28_MARK), - PINMUX_GPIO(GPIO_FN_D27, D27_MARK), - PINMUX_GPIO(GPIO_FN_D26, D26_MARK), - PINMUX_GPIO(GPIO_FN_D25, D25_MARK), - PINMUX_GPIO(GPIO_FN_D24, D24_MARK), - PINMUX_GPIO(GPIO_FN_D23, D23_MARK), - PINMUX_GPIO(GPIO_FN_D22, D22_MARK), - PINMUX_GPIO(GPIO_FN_D21, D21_MARK), - PINMUX_GPIO(GPIO_FN_D20, D20_MARK), - PINMUX_GPIO(GPIO_FN_D19, D19_MARK), - PINMUX_GPIO(GPIO_FN_D18, D18_MARK), - PINMUX_GPIO(GPIO_FN_D17, D17_MARK), - PINMUX_GPIO(GPIO_FN_D16, D16_MARK), - PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK), - PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK), - PINMUX_GPIO(GPIO_FN_WE3, WE3_MARK), - PINMUX_GPIO(GPIO_FN_WE2, WE2_MARK), - PINMUX_GPIO(GPIO_FN_CS6, CS6_MARK), - PINMUX_GPIO(GPIO_FN_CS5, CS5_MARK), - PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK), - PINMUX_GPIO(GPIO_FN_CLKOUTENB, CLKOUTENB_MARK), - PINMUX_GPIO(GPIO_FN_DACK3, DACK3_MARK), - PINMUX_GPIO(GPIO_FN_DACK2, DACK2_MARK), - PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK), - PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK), - PINMUX_GPIO(GPIO_FN_DREQ3, DREQ3_MARK), - PINMUX_GPIO(GPIO_FN_DREQ2, DREQ2_MARK), - PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK), - PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK), - PINMUX_GPIO(GPIO_FN_IRQ3, IRQ3_MARK), - PINMUX_GPIO(GPIO_FN_IRQ2, IRQ2_MARK), - PINMUX_GPIO(GPIO_FN_IRQ1, IRQ1_MARK), - PINMUX_GPIO(GPIO_FN_IRQ0, IRQ0_MARK), - PINMUX_GPIO(GPIO_FN_DRAK3, DRAK3_MARK), - PINMUX_GPIO(GPIO_FN_DRAK2, DRAK2_MARK), - PINMUX_GPIO(GPIO_FN_DRAK1, DRAK1_MARK), - PINMUX_GPIO(GPIO_FN_DRAK0, DRAK0_MARK), - PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK), - PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK), - PINMUX_GPIO(GPIO_FN_SCK1, SCK1_MARK), - PINMUX_GPIO(GPIO_FN_SCK0, SCK0_MARK), - PINMUX_GPIO(GPIO_FN_IRL3, IRL3_MARK), - PINMUX_GPIO(GPIO_FN_IRL2, IRL2_MARK), - PINMUX_GPIO(GPIO_FN_IRL1, IRL1_MARK), - PINMUX_GPIO(GPIO_FN_IRL0, IRL0_MARK), - PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK), - PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK), - PINMUX_GPIO(GPIO_FN_TXD1, TXD1_MARK), - PINMUX_GPIO(GPIO_FN_TXD0, TXD0_MARK), - PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK), - PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK), - PINMUX_GPIO(GPIO_FN_RXD1, RXD1_MARK), - PINMUX_GPIO(GPIO_FN_RXD0, RXD0_MARK), - PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK), - PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK), - PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK), - PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK), - PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK), - PINMUX_GPIO(GPIO_FN_IRQOUT, IRQOUT_MARK), + GPIO_FN(D31), + GPIO_FN(D30), + GPIO_FN(D29), + GPIO_FN(D28), + GPIO_FN(D27), + GPIO_FN(D26), + GPIO_FN(D25), + GPIO_FN(D24), + GPIO_FN(D23), + GPIO_FN(D22), + GPIO_FN(D21), + GPIO_FN(D20), + GPIO_FN(D19), + GPIO_FN(D18), + GPIO_FN(D17), + GPIO_FN(D16), + GPIO_FN(BACK), + GPIO_FN(BREQ), + GPIO_FN(WE3), + GPIO_FN(WE2), + GPIO_FN(CS6), + GPIO_FN(CS5), + GPIO_FN(CS4), + GPIO_FN(CLKOUTENB), + GPIO_FN(DACK3), + GPIO_FN(DACK2), + GPIO_FN(DACK1), + GPIO_FN(DACK0), + GPIO_FN(DREQ3), + GPIO_FN(DREQ2), + GPIO_FN(DREQ1), + GPIO_FN(DREQ0), + GPIO_FN(IRQ3), + GPIO_FN(IRQ2), + GPIO_FN(IRQ1), + GPIO_FN(IRQ0), + GPIO_FN(DRAK3), + GPIO_FN(DRAK2), + GPIO_FN(DRAK1), + GPIO_FN(DRAK0), + GPIO_FN(SCK3), + GPIO_FN(SCK2), + GPIO_FN(SCK1), + GPIO_FN(SCK0), + GPIO_FN(IRL3), + GPIO_FN(IRL2), + GPIO_FN(IRL1), + GPIO_FN(IRL0), + GPIO_FN(TXD3), + GPIO_FN(TXD2), + GPIO_FN(TXD1), + GPIO_FN(TXD0), + GPIO_FN(RXD3), + GPIO_FN(RXD2), + GPIO_FN(RXD1), + GPIO_FN(RXD0), + GPIO_FN(CE2B), + GPIO_FN(CE2A), + GPIO_FN(IOIS16), + GPIO_FN(STATUS1), + GPIO_FN(STATUS0), + GPIO_FN(IRQOUT), }; -static struct pinmux_cfg_reg shx3_pinmux_config_regs[] = { +static const struct pinmux_cfg_reg shx3_pinmux_config_regs[] = { { PINMUX_CFG_REG("PABCR", 0xffc70000, 32, 2) { PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU, PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU, @@ -526,7 +530,7 @@ static struct pinmux_cfg_reg shx3_pinmux_config_regs[] = { { }, }; -static struct pinmux_data_reg shx3_pinmux_data_regs[] = { +static const struct pinmux_data_reg shx3_pinmux_data_regs[] = { { PINMUX_DATA_REG("PABDR", 0xffc70010, 32) { 0, 0, 0, 0, 0, 0, 0, 0, PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA, @@ -562,19 +566,17 @@ static struct pinmux_data_reg shx3_pinmux_data_regs[] = { { }, }; -struct sh_pfc_soc_info shx3_pinmux_info = { +const struct sh_pfc_soc_info shx3_pinmux_info = { .name = "shx3_pfc", - .reserved_id = PINMUX_RESERVED, - .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END }, .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, - .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, - .first_gpio = GPIO_PA7, - .last_gpio = GPIO_FN_STATUS0, - .gpios = shx3_pinmux_gpios, + .pins = shx3_pinmux_pins, + .nr_pins = ARRAY_SIZE(shx3_pinmux_pins), + .func_gpios = shx3_pinmux_func_gpios, + .nr_func_gpios = ARRAY_SIZE(shx3_pinmux_func_gpios), .gpio_data = shx3_pinmux_data, .gpio_data_size = ARRAY_SIZE(shx3_pinmux_data), .cfg_regs = shx3_pinmux_config_regs, diff --git a/drivers/pinctrl/sh-pfc/pinctrl.c b/drivers/pinctrl/sh-pfc/pinctrl.c index 11e0e1374d65..3492ec9a33b7 100644 --- a/drivers/pinctrl/sh-pfc/pinctrl.c +++ b/drivers/pinctrl/sh-pfc/pinctrl.c @@ -9,7 +9,6 @@ */ #define DRV_NAME "sh-pfc" -#define pr_fmt(fmt) KBUILD_MODNAME " pinctrl: " fmt #include <linux/device.h> #include <linux/err.h> @@ -24,25 +23,28 @@ #include <linux/spinlock.h> #include "core.h" +#include "../core.h" +#include "../pinconf.h" + +struct sh_pfc_pin_config { + u32 type; +}; struct sh_pfc_pinctrl { struct pinctrl_dev *pctl; - struct sh_pfc *pfc; - - struct pinmux_gpio **functions; - unsigned int nr_functions; + struct pinctrl_desc pctl_desc; - struct pinctrl_pin_desc *pads; - unsigned int nr_pads; + struct sh_pfc *pfc; - spinlock_t lock; + struct pinctrl_pin_desc *pins; + struct sh_pfc_pin_config *configs; }; static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev) { struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); - return pmx->nr_pads; + return pmx->pfc->info->nr_groups; } static const char *sh_pfc_get_group_name(struct pinctrl_dev *pctldev, @@ -50,16 +52,16 @@ static const char *sh_pfc_get_group_name(struct pinctrl_dev *pctldev, { struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); - return pmx->pads[selector].name; + return pmx->pfc->info->groups[selector].name; } -static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned group, +static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, const unsigned **pins, unsigned *num_pins) { struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); - *pins = &pmx->pads[group].number; - *num_pins = 1; + *pins = pmx->pfc->info->groups[selector].pins; + *num_pins = pmx->pfc->info->groups[selector].nr_pins; return 0; } @@ -70,7 +72,7 @@ static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, seq_printf(s, "%s", DRV_NAME); } -static struct pinctrl_ops sh_pfc_pinctrl_ops = { +static const struct pinctrl_ops sh_pfc_pinctrl_ops = { .get_groups_count = sh_pfc_get_groups_count, .get_group_name = sh_pfc_get_group_name, .get_group_pins = sh_pfc_get_group_pins, @@ -81,7 +83,7 @@ static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev) { struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); - return pmx->nr_functions; + return pmx->pfc->info->nr_functions; } static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev, @@ -89,136 +91,113 @@ static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev, { struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); - return pmx->functions[selector]->name; + return pmx->pfc->info->functions[selector].name; } -static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev, unsigned func, +static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev, + unsigned selector, const char * const **groups, unsigned * const num_groups) { struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); - *groups = &pmx->functions[func]->name; - *num_groups = 1; + *groups = pmx->pfc->info->functions[selector].groups; + *num_groups = pmx->pfc->info->functions[selector].nr_groups; return 0; } -static int sh_pfc_noop_enable(struct pinctrl_dev *pctldev, unsigned func, +static int sh_pfc_func_enable(struct pinctrl_dev *pctldev, unsigned selector, unsigned group) { - return 0; -} + struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); + struct sh_pfc *pfc = pmx->pfc; + const struct sh_pfc_pin_group *grp = &pfc->info->groups[group]; + unsigned long flags; + unsigned int i; + int ret = 0; -static void sh_pfc_noop_disable(struct pinctrl_dev *pctldev, unsigned func, - unsigned group) -{ -} + spin_lock_irqsave(&pfc->lock, flags); -static int sh_pfc_config_function(struct sh_pfc *pfc, unsigned offset) -{ - if (sh_pfc_config_gpio(pfc, offset, - PINMUX_TYPE_FUNCTION, - GPIO_CFG_DRYRUN) != 0) - return -EINVAL; + for (i = 0; i < grp->nr_pins; ++i) { + int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]); + struct sh_pfc_pin_config *cfg = &pmx->configs[idx]; - if (sh_pfc_config_gpio(pfc, offset, - PINMUX_TYPE_FUNCTION, - GPIO_CFG_REQ) != 0) - return -EINVAL; + if (cfg->type != PINMUX_TYPE_NONE) { + ret = -EBUSY; + goto done; + } + } - return 0; + for (i = 0; i < grp->nr_pins; ++i) { + ret = sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION); + if (ret < 0) + break; + } + +done: + spin_unlock_irqrestore(&pfc->lock, flags); + return ret; } -static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset, - int new_type) +static void sh_pfc_func_disable(struct pinctrl_dev *pctldev, unsigned selector, + unsigned group) { + struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); + struct sh_pfc *pfc = pmx->pfc; + const struct sh_pfc_pin_group *grp = &pfc->info->groups[group]; unsigned long flags; - int pinmux_type; - int ret = -EINVAL; + unsigned int i; spin_lock_irqsave(&pfc->lock, flags); - pinmux_type = pfc->info->gpios[offset].flags & PINMUX_FLAG_TYPE; + for (i = 0; i < grp->nr_pins; ++i) { + int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]); + struct sh_pfc_pin_config *cfg = &pmx->configs[idx]; - /* - * See if the present config needs to first be de-configured. - */ - switch (pinmux_type) { - case PINMUX_TYPE_GPIO: - break; - case PINMUX_TYPE_OUTPUT: - case PINMUX_TYPE_INPUT: - case PINMUX_TYPE_INPUT_PULLUP: - case PINMUX_TYPE_INPUT_PULLDOWN: - sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE); - break; - default: - goto err; + cfg->type = PINMUX_TYPE_NONE; } - /* - * Dry run - */ - if (sh_pfc_config_gpio(pfc, offset, new_type, - GPIO_CFG_DRYRUN) != 0) - goto err; - - /* - * Request - */ - if (sh_pfc_config_gpio(pfc, offset, new_type, - GPIO_CFG_REQ) != 0) - goto err; - - pfc->info->gpios[offset].flags &= ~PINMUX_FLAG_TYPE; - pfc->info->gpios[offset].flags |= new_type; - - ret = 0; - -err: spin_unlock_irqrestore(&pfc->lock, flags); - - return ret; } - static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned offset) { struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); struct sh_pfc *pfc = pmx->pfc; + int idx = sh_pfc_get_pin_index(pfc, offset); + struct sh_pfc_pin_config *cfg = &pmx->configs[idx]; unsigned long flags; - int ret, pinmux_type; + int ret; spin_lock_irqsave(&pfc->lock, flags); - pinmux_type = pfc->info->gpios[offset].flags & PINMUX_FLAG_TYPE; + if (cfg->type != PINMUX_TYPE_NONE) { + dev_err(pfc->dev, + "Pin %u is busy, can't configure it as GPIO.\n", + offset); + ret = -EBUSY; + goto done; + } - switch (pinmux_type) { - case PINMUX_TYPE_FUNCTION: - pr_notice_once("Use of GPIO API for function requests is " - "deprecated, convert to pinctrl\n"); - /* handle for now */ - ret = sh_pfc_config_function(pfc, offset); - if (unlikely(ret < 0)) - goto err; + if (!pfc->gpio) { + /* If GPIOs are handled externally the pin mux type need to be + * set to GPIO here. + */ + const struct sh_pfc_pin *pin = &pfc->info->pins[idx]; - break; - case PINMUX_TYPE_GPIO: - case PINMUX_TYPE_INPUT: - case PINMUX_TYPE_OUTPUT: - break; - default: - pr_err("Unsupported mux type (%d), bailing...\n", pinmux_type); - ret = -ENOTSUPP; - goto err; + ret = sh_pfc_config_mux(pfc, pin->enum_id, PINMUX_TYPE_GPIO); + if (ret < 0) + goto done; } + cfg->type = PINMUX_TYPE_GPIO; + ret = 0; -err: +done: spin_unlock_irqrestore(&pfc->lock, flags); return ret; @@ -230,15 +209,12 @@ static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev, { struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); struct sh_pfc *pfc = pmx->pfc; + int idx = sh_pfc_get_pin_index(pfc, offset); + struct sh_pfc_pin_config *cfg = &pmx->configs[idx]; unsigned long flags; - int pinmux_type; spin_lock_irqsave(&pfc->lock, flags); - - pinmux_type = pfc->info->gpios[offset].flags & PINMUX_FLAG_TYPE; - - sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE); - + cfg->type = PINMUX_TYPE_NONE; spin_unlock_irqrestore(&pfc->lock, flags); } @@ -247,207 +223,242 @@ static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev, unsigned offset, bool input) { struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); - int type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT; + struct sh_pfc *pfc = pmx->pfc; + int new_type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT; + int idx = sh_pfc_get_pin_index(pfc, offset); + const struct sh_pfc_pin *pin = &pfc->info->pins[idx]; + struct sh_pfc_pin_config *cfg = &pmx->configs[idx]; + unsigned long flags; + unsigned int dir; + int ret; + + /* Check if the requested direction is supported by the pin. Not all SoC + * provide pin config data, so perform the check conditionally. + */ + if (pin->configs) { + dir = input ? SH_PFC_PIN_CFG_INPUT : SH_PFC_PIN_CFG_OUTPUT; + if (!(pin->configs & dir)) + return -EINVAL; + } + + spin_lock_irqsave(&pfc->lock, flags); + + ret = sh_pfc_config_mux(pfc, pin->enum_id, new_type); + if (ret < 0) + goto done; + + cfg->type = new_type; - return sh_pfc_reconfig_pin(pmx->pfc, offset, type); +done: + spin_unlock_irqrestore(&pfc->lock, flags); + return ret; } -static struct pinmux_ops sh_pfc_pinmux_ops = { +static const struct pinmux_ops sh_pfc_pinmux_ops = { .get_functions_count = sh_pfc_get_functions_count, .get_function_name = sh_pfc_get_function_name, .get_function_groups = sh_pfc_get_function_groups, - .enable = sh_pfc_noop_enable, - .disable = sh_pfc_noop_disable, + .enable = sh_pfc_func_enable, + .disable = sh_pfc_func_disable, .gpio_request_enable = sh_pfc_gpio_request_enable, .gpio_disable_free = sh_pfc_gpio_disable_free, .gpio_set_direction = sh_pfc_gpio_set_direction, }; -static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin, - unsigned long *config) +/* Check whether the requested parameter is supported for a pin. */ +static bool sh_pfc_pinconf_validate(struct sh_pfc *pfc, unsigned int _pin, + enum pin_config_param param) { - struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); - struct sh_pfc *pfc = pmx->pfc; + int idx = sh_pfc_get_pin_index(pfc, _pin); + const struct sh_pfc_pin *pin = &pfc->info->pins[idx]; - *config = pfc->info->gpios[pin].flags & PINMUX_FLAG_TYPE; + switch (param) { + case PIN_CONFIG_BIAS_DISABLE: + return true; - return 0; -} + case PIN_CONFIG_BIAS_PULL_UP: + return pin->configs & SH_PFC_PIN_CFG_PULL_UP; -static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin, - unsigned long config) -{ - struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); - - /* Validate the new type */ - if (config >= PINMUX_FLAG_TYPE) - return -EINVAL; + case PIN_CONFIG_BIAS_PULL_DOWN: + return pin->configs & SH_PFC_PIN_CFG_PULL_DOWN; - return sh_pfc_reconfig_pin(pmx->pfc, pin, config); + default: + return false; + } } -static void sh_pfc_pinconf_dbg_show(struct pinctrl_dev *pctldev, - struct seq_file *s, unsigned pin) +static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned _pin, + unsigned long *config) { - const char *pinmux_type_str[] = { - [PINMUX_TYPE_NONE] = "none", - [PINMUX_TYPE_FUNCTION] = "function", - [PINMUX_TYPE_GPIO] = "gpio", - [PINMUX_TYPE_OUTPUT] = "output", - [PINMUX_TYPE_INPUT] = "input", - [PINMUX_TYPE_INPUT_PULLUP] = "input bias pull up", - [PINMUX_TYPE_INPUT_PULLDOWN] = "input bias pull down", - }; - unsigned long config; - int rc; - - rc = sh_pfc_pinconf_get(pctldev, pin, &config); - if (unlikely(rc != 0)) - return; - - seq_printf(s, " %s", pinmux_type_str[config]); -} + struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); + struct sh_pfc *pfc = pmx->pfc; + enum pin_config_param param = pinconf_to_config_param(*config); + unsigned long flags; + unsigned int bias; -static struct pinconf_ops sh_pfc_pinconf_ops = { - .pin_config_get = sh_pfc_pinconf_get, - .pin_config_set = sh_pfc_pinconf_set, - .pin_config_dbg_show = sh_pfc_pinconf_dbg_show, -}; + if (!sh_pfc_pinconf_validate(pfc, _pin, param)) + return -ENOTSUPP; -static struct pinctrl_gpio_range sh_pfc_gpio_range = { - .name = DRV_NAME, - .id = 0, -}; + switch (param) { + case PIN_CONFIG_BIAS_DISABLE: + case PIN_CONFIG_BIAS_PULL_UP: + case PIN_CONFIG_BIAS_PULL_DOWN: + if (!pfc->info->ops || !pfc->info->ops->get_bias) + return -ENOTSUPP; -static struct pinctrl_desc sh_pfc_pinctrl_desc = { - .name = DRV_NAME, - .owner = THIS_MODULE, - .pctlops = &sh_pfc_pinctrl_ops, - .pmxops = &sh_pfc_pinmux_ops, - .confops = &sh_pfc_pinconf_ops, -}; + spin_lock_irqsave(&pfc->lock, flags); + bias = pfc->info->ops->get_bias(pfc, _pin); + spin_unlock_irqrestore(&pfc->lock, flags); -static void sh_pfc_map_one_gpio(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx, - struct pinmux_gpio *gpio, unsigned offset) -{ - struct pinmux_data_reg *dummy; - unsigned long flags; - int bit; - - gpio->flags &= ~PINMUX_FLAG_TYPE; + if (bias != param) + return -EINVAL; - if (sh_pfc_get_data_reg(pfc, offset, &dummy, &bit) == 0) - gpio->flags |= PINMUX_TYPE_GPIO; - else { - gpio->flags |= PINMUX_TYPE_FUNCTION; + *config = 0; + break; - spin_lock_irqsave(&pmx->lock, flags); - pmx->nr_functions++; - spin_unlock_irqrestore(&pmx->lock, flags); + default: + return -ENOTSUPP; } + + return 0; } -/* pinmux ranges -> pinctrl pin descs */ -static int sh_pfc_map_gpios(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx) +static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned _pin, + unsigned long config) { + struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); + struct sh_pfc *pfc = pmx->pfc; + enum pin_config_param param = pinconf_to_config_param(config); unsigned long flags; - int i; - pmx->nr_pads = pfc->info->last_gpio - pfc->info->first_gpio + 1; + if (!sh_pfc_pinconf_validate(pfc, _pin, param)) + return -ENOTSUPP; - pmx->pads = devm_kzalloc(pfc->dev, sizeof(*pmx->pads) * pmx->nr_pads, - GFP_KERNEL); - if (unlikely(!pmx->pads)) { - pmx->nr_pads = 0; - return -ENOMEM; - } + switch (param) { + case PIN_CONFIG_BIAS_PULL_UP: + case PIN_CONFIG_BIAS_PULL_DOWN: + case PIN_CONFIG_BIAS_DISABLE: + if (!pfc->info->ops || !pfc->info->ops->set_bias) + return -ENOTSUPP; - spin_lock_irqsave(&pfc->lock, flags); + spin_lock_irqsave(&pfc->lock, flags); + pfc->info->ops->set_bias(pfc, _pin, param); + spin_unlock_irqrestore(&pfc->lock, flags); - /* - * We don't necessarily have a 1:1 mapping between pin and linux - * GPIO number, as the latter maps to the associated enum_id. - * Care needs to be taken to translate back to pin space when - * dealing with any pin configurations. - */ - for (i = 0; i < pmx->nr_pads; i++) { - struct pinctrl_pin_desc *pin = pmx->pads + i; - struct pinmux_gpio *gpio = pfc->info->gpios + i; + break; - pin->number = pfc->info->first_gpio + i; - pin->name = gpio->name; + default: + return -ENOTSUPP; + } - /* XXX */ - if (unlikely(!gpio->enum_id)) - continue; + return 0; +} - sh_pfc_map_one_gpio(pfc, pmx, gpio, i); - } +static int sh_pfc_pinconf_group_set(struct pinctrl_dev *pctldev, unsigned group, + unsigned long config) +{ + struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); + const unsigned int *pins; + unsigned int num_pins; + unsigned int i; - spin_unlock_irqrestore(&pfc->lock, flags); + pins = pmx->pfc->info->groups[group].pins; + num_pins = pmx->pfc->info->groups[group].nr_pins; - sh_pfc_pinctrl_desc.pins = pmx->pads; - sh_pfc_pinctrl_desc.npins = pmx->nr_pads; + for (i = 0; i < num_pins; ++i) + sh_pfc_pinconf_set(pctldev, pins[i], config); return 0; } -static int sh_pfc_map_functions(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx) +static const struct pinconf_ops sh_pfc_pinconf_ops = { + .is_generic = true, + .pin_config_get = sh_pfc_pinconf_get, + .pin_config_set = sh_pfc_pinconf_set, + .pin_config_group_set = sh_pfc_pinconf_group_set, + .pin_config_config_dbg_show = pinconf_generic_dump_config, +}; + +/* PFC ranges -> pinctrl pin descs */ +static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx) { - unsigned long flags; - int i, fn; + const struct pinmux_range *ranges; + struct pinmux_range def_range; + unsigned int nr_ranges; + unsigned int nr_pins; + unsigned int i; + + if (pfc->info->ranges == NULL) { + def_range.begin = 0; + def_range.end = pfc->info->nr_pins - 1; + ranges = &def_range; + nr_ranges = 1; + } else { + ranges = pfc->info->ranges; + nr_ranges = pfc->info->nr_ranges; + } - pmx->functions = devm_kzalloc(pfc->dev, pmx->nr_functions * - sizeof(*pmx->functions), GFP_KERNEL); - if (unlikely(!pmx->functions)) + pmx->pins = devm_kzalloc(pfc->dev, + sizeof(*pmx->pins) * pfc->info->nr_pins, + GFP_KERNEL); + if (unlikely(!pmx->pins)) return -ENOMEM; - spin_lock_irqsave(&pmx->lock, flags); - - for (i = fn = 0; i < pmx->nr_pads; i++) { - struct pinmux_gpio *gpio = pfc->info->gpios + i; + pmx->configs = devm_kzalloc(pfc->dev, + sizeof(*pmx->configs) * pfc->info->nr_pins, + GFP_KERNEL); + if (unlikely(!pmx->configs)) + return -ENOMEM; - if ((gpio->flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_FUNCTION) - pmx->functions[fn++] = gpio; + for (i = 0, nr_pins = 0; i < nr_ranges; ++i) { + const struct pinmux_range *range = &ranges[i]; + unsigned int number; + + for (number = range->begin; number <= range->end; + number++, nr_pins++) { + struct sh_pfc_pin_config *cfg = &pmx->configs[nr_pins]; + struct pinctrl_pin_desc *pin = &pmx->pins[nr_pins]; + const struct sh_pfc_pin *info = + &pfc->info->pins[nr_pins]; + + pin->number = number; + pin->name = info->name; + cfg->type = PINMUX_TYPE_NONE; + } } - spin_unlock_irqrestore(&pmx->lock, flags); + pfc->nr_pins = ranges[nr_ranges-1].end + 1; - return 0; + return nr_ranges; } int sh_pfc_register_pinctrl(struct sh_pfc *pfc) { struct sh_pfc_pinctrl *pmx; - int ret; + int nr_ranges; pmx = devm_kzalloc(pfc->dev, sizeof(*pmx), GFP_KERNEL); if (unlikely(!pmx)) return -ENOMEM; - spin_lock_init(&pmx->lock); - pmx->pfc = pfc; pfc->pinctrl = pmx; - ret = sh_pfc_map_gpios(pfc, pmx); - if (unlikely(ret != 0)) - return ret; + nr_ranges = sh_pfc_map_pins(pfc, pmx); + if (unlikely(nr_ranges < 0)) + return nr_ranges; - ret = sh_pfc_map_functions(pfc, pmx); - if (unlikely(ret != 0)) - return ret; + pmx->pctl_desc.name = DRV_NAME; + pmx->pctl_desc.owner = THIS_MODULE; + pmx->pctl_desc.pctlops = &sh_pfc_pinctrl_ops; + pmx->pctl_desc.pmxops = &sh_pfc_pinmux_ops; + pmx->pctl_desc.confops = &sh_pfc_pinconf_ops; + pmx->pctl_desc.pins = pmx->pins; + pmx->pctl_desc.npins = pfc->info->nr_pins; - pmx->pctl = pinctrl_register(&sh_pfc_pinctrl_desc, pfc->dev, pmx); - if (IS_ERR(pmx->pctl)) - return PTR_ERR(pmx->pctl); - - sh_pfc_gpio_range.npins = pfc->info->last_gpio - - pfc->info->first_gpio + 1; - sh_pfc_gpio_range.base = pfc->info->first_gpio; - sh_pfc_gpio_range.pin_base = pfc->info->first_gpio; - - pinctrl_add_gpio_range(pmx->pctl, &sh_pfc_gpio_range); + pmx->pctl = pinctrl_register(&pmx->pctl_desc, pfc->dev, pmx); + if (pmx->pctl == NULL) + return -EINVAL; return 0; } diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h index 13049c4c8d30..3b785fc428d5 100644 --- a/drivers/pinctrl/sh-pfc/sh_pfc.h +++ b/drivers/pinctrl/sh-pfc/sh_pfc.h @@ -15,7 +15,8 @@ #include <asm-generic/gpio.h> typedef unsigned short pinmux_enum_t; -typedef unsigned short pinmux_flag_t; + +#define SH_PFC_MARK_INVALID ((pinmux_enum_t)-1) enum { PINMUX_TYPE_NONE, @@ -30,44 +31,81 @@ enum { PINMUX_FLAG_TYPE, /* must be last */ }; -#define PINMUX_FLAG_DBIT_SHIFT 5 -#define PINMUX_FLAG_DBIT (0x1f << PINMUX_FLAG_DBIT_SHIFT) -#define PINMUX_FLAG_DREG_SHIFT 10 -#define PINMUX_FLAG_DREG (0x3f << PINMUX_FLAG_DREG_SHIFT) +#define SH_PFC_PIN_CFG_INPUT (1 << 0) +#define SH_PFC_PIN_CFG_OUTPUT (1 << 1) +#define SH_PFC_PIN_CFG_PULL_UP (1 << 2) +#define SH_PFC_PIN_CFG_PULL_DOWN (1 << 3) -struct pinmux_gpio { - pinmux_enum_t enum_id; - pinmux_flag_t flags; +struct sh_pfc_pin { + const pinmux_enum_t enum_id; const char *name; + unsigned int configs; }; -#define PINMUX_GPIO(gpio, data_or_mark) \ - [gpio] = { .name = __stringify(gpio), .enum_id = data_or_mark, .flags = PINMUX_TYPE_NONE } +#define SH_PFC_PIN_GROUP(n) \ + { \ + .name = #n, \ + .pins = n##_pins, \ + .mux = n##_mux, \ + .nr_pins = ARRAY_SIZE(n##_pins), \ + } + +struct sh_pfc_pin_group { + const char *name; + const unsigned int *pins; + const unsigned int *mux; + unsigned int nr_pins; +}; + +#define SH_PFC_FUNCTION(n) \ + { \ + .name = #n, \ + .groups = n##_groups, \ + .nr_groups = ARRAY_SIZE(n##_groups), \ + } + +struct sh_pfc_function { + const char *name; + const char * const *groups; + unsigned int nr_groups; +}; + +struct pinmux_func { + const pinmux_enum_t enum_id; + const char *name; +}; + +#define PINMUX_GPIO(gpio, data_or_mark) \ + [gpio] = { \ + .name = __stringify(gpio), \ + .enum_id = data_or_mark, \ + } +#define PINMUX_GPIO_FN(gpio, base, data_or_mark) \ + [gpio - (base)] = { \ + .name = __stringify(gpio), \ + .enum_id = data_or_mark, \ + } #define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0 struct pinmux_cfg_reg { unsigned long reg, reg_width, field_width; - unsigned long *cnt; - pinmux_enum_t *enum_ids; - unsigned long *var_field_width; + const pinmux_enum_t *enum_ids; + const unsigned long *var_field_width; }; #define PINMUX_CFG_REG(name, r, r_width, f_width) \ .reg = r, .reg_width = r_width, .field_width = f_width, \ - .cnt = (unsigned long [r_width / f_width]) {}, \ .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)]) #define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \ .reg = r, .reg_width = r_width, \ - .cnt = (unsigned long [r_width]) {}, \ .var_field_width = (unsigned long [r_width]) { var_fw0, var_fwn, 0 }, \ .enum_ids = (pinmux_enum_t []) struct pinmux_data_reg { - unsigned long reg, reg_width, reg_shadow; - pinmux_enum_t *enum_ids; - void __iomem *mapped_reg; + unsigned long reg, reg_width; + const pinmux_enum_t *enum_ids; }; #define PINMUX_DATA_REG(name, r, r_width) \ @@ -76,11 +114,11 @@ struct pinmux_data_reg { struct pinmux_irq { int irq; - pinmux_enum_t *enum_ids; + unsigned short *gpios; }; #define PINMUX_IRQ(irq_nr, ids...) \ - { .irq = irq_nr, .enum_ids = (pinmux_enum_t []) { ids, 0 } } \ + { .irq = irq_nr, .gpios = (unsigned short []) { ids, 0 } } \ struct pinmux_range { pinmux_enum_t begin; @@ -88,33 +126,49 @@ struct pinmux_range { pinmux_enum_t force; }; +struct sh_pfc; + +struct sh_pfc_soc_operations { + unsigned int (*get_bias)(struct sh_pfc *pfc, unsigned int pin); + void (*set_bias)(struct sh_pfc *pfc, unsigned int pin, + unsigned int bias); +}; + struct sh_pfc_soc_info { - char *name; - pinmux_enum_t reserved_id; - struct pinmux_range data; + const char *name; + const struct sh_pfc_soc_operations *ops; + struct pinmux_range input; struct pinmux_range input_pd; struct pinmux_range input_pu; struct pinmux_range output; - struct pinmux_range mark; struct pinmux_range function; - unsigned first_gpio, last_gpio; + const struct sh_pfc_pin *pins; + unsigned int nr_pins; + const struct pinmux_range *ranges; + unsigned int nr_ranges; + const struct sh_pfc_pin_group *groups; + unsigned int nr_groups; + const struct sh_pfc_function *functions; + unsigned int nr_functions; + + const struct pinmux_func *func_gpios; + unsigned int nr_func_gpios; - struct pinmux_gpio *gpios; - struct pinmux_cfg_reg *cfg_regs; - struct pinmux_data_reg *data_regs; + const struct pinmux_cfg_reg *cfg_regs; + const struct pinmux_data_reg *data_regs; - pinmux_enum_t *gpio_data; + const pinmux_enum_t *gpio_data; unsigned int gpio_data_size; - struct pinmux_irq *gpio_irq; + const struct pinmux_irq *gpio_irq; unsigned int gpio_irq_size; unsigned long unlock_reg; }; -enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE }; +enum { GPIO_CFG_REQ, GPIO_CFG_FREE }; /* helper macro for port */ #define PORT_1(fn, pfx, sfx) fn(pfx, sfx) @@ -126,6 +180,23 @@ enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE }; PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \ PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx) +#define PORT_10_REV(fn, pfx, sfx) \ + PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \ + PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \ + PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \ + PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \ + PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx) + +#define PORT_32(fn, pfx, sfx) \ + PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ + PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \ + PORT_1(fn, pfx##31, sfx) + +#define PORT_32_REV(fn, pfx, sfx) \ + PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \ + PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \ + PORT_10_REV(fn, pfx, sfx) + #define PORT_90(fn, pfx, sfx) \ PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx), \ PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx), \ @@ -137,7 +208,7 @@ enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE }; #define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA) #define PORT_ALL(str) CPU_ALL_PORT(_PORT_ALL, PORT, str) #define GPIO_PORT_ALL() CPU_ALL_PORT(_GPIO_PORT, , unused) -#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK) +#define GPIO_FN(str) PINMUX_GPIO_FN(GPIO_FN_##str, PINMUX_FN_BASE, str##_MARK) /* helper macro for pinmux_enum_t */ #define PORT_DATA_I(nr) \ diff --git a/drivers/pinctrl/spear/pinctrl-plgpio.c b/drivers/pinctrl/spear/pinctrl-plgpio.c index 295b349a05cf..a4908ecd74fb 100644 --- a/drivers/pinctrl/spear/pinctrl-plgpio.c +++ b/drivers/pinctrl/spear/pinctrl-plgpio.c @@ -15,12 +15,12 @@ #include <linux/io.h> #include <linux/irq.h> #include <linux/irqdomain.h> +#include <linux/irqchip/chained_irq.h> #include <linux/module.h> #include <linux/pinctrl/consumer.h> #include <linux/platform_device.h> #include <linux/pm.h> #include <linux/spinlock.h> -#include <asm/mach/irq.h> #define MAX_GPIO_PER_REG 32 #define PIN_OFFSET(pin) (pin % MAX_GPIO_PER_REG) diff --git a/drivers/pinctrl/spear/pinctrl-spear.c b/drivers/pinctrl/spear/pinctrl-spear.c index 6a7dae70db08..116da0412c4b 100644 --- a/drivers/pinctrl/spear/pinctrl-spear.c +++ b/drivers/pinctrl/spear/pinctrl-spear.c @@ -198,7 +198,7 @@ static void spear_pinctrl_dt_free_map(struct pinctrl_dev *pctldev, kfree(map); } -static struct pinctrl_ops spear_pinctrl_ops = { +static const struct pinctrl_ops spear_pinctrl_ops = { .get_groups_count = spear_pinctrl_get_groups_cnt, .get_group_name = spear_pinctrl_get_group_name, .get_group_pins = spear_pinctrl_get_group_pins, @@ -340,7 +340,7 @@ static void gpio_disable_free(struct pinctrl_dev *pctldev, gpio_request_endisable(pctldev, range, offset, false); } -static struct pinmux_ops spear_pinmux_ops = { +static const struct pinmux_ops spear_pinmux_ops = { .get_functions_count = spear_pinctrl_get_funcs_count, .get_function_name = spear_pinctrl_get_func_name, .get_function_groups = spear_pinctrl_get_func_groups, diff --git a/drivers/rtc/rtc-at91rm9200.c b/drivers/rtc/rtc-at91rm9200.c index 434ebc3a99dc..0a9f27e094ea 100644 --- a/drivers/rtc/rtc-at91rm9200.c +++ b/drivers/rtc/rtc-at91rm9200.c @@ -44,6 +44,7 @@ static DECLARE_COMPLETION(at91_rtc_updated); static unsigned int at91_alarm_year = AT91_RTC_EPOCH; static void __iomem *at91_rtc_regs; static int irq; +static u32 at91_rtc_imr; /* * Decode time/date into rtc_time structure @@ -108,9 +109,11 @@ static int at91_rtc_settime(struct device *dev, struct rtc_time *tm) cr = at91_rtc_read(AT91_RTC_CR); at91_rtc_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM); + at91_rtc_imr |= AT91_RTC_ACKUPD; at91_rtc_write(AT91_RTC_IER, AT91_RTC_ACKUPD); wait_for_completion(&at91_rtc_updated); /* wait for ACKUPD interrupt */ at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD); + at91_rtc_imr &= ~AT91_RTC_ACKUPD; at91_rtc_write(AT91_RTC_TIMR, bin2bcd(tm->tm_sec) << 0 @@ -142,7 +145,7 @@ static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year); tm->tm_year = at91_alarm_year - 1900; - alrm->enabled = (at91_rtc_read(AT91_RTC_IMR) & AT91_RTC_ALARM) + alrm->enabled = (at91_rtc_imr & AT91_RTC_ALARM) ? 1 : 0; dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__, @@ -168,6 +171,7 @@ static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) tm.tm_sec = alrm->time.tm_sec; at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ALARM); + at91_rtc_imr &= ~AT91_RTC_ALARM; at91_rtc_write(AT91_RTC_TIMALR, bin2bcd(tm.tm_sec) << 0 | bin2bcd(tm.tm_min) << 8 @@ -180,6 +184,7 @@ static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) if (alrm->enabled) { at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM); + at91_rtc_imr |= AT91_RTC_ALARM; at91_rtc_write(AT91_RTC_IER, AT91_RTC_ALARM); } @@ -196,9 +201,12 @@ static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) if (enabled) { at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM); + at91_rtc_imr |= AT91_RTC_ALARM; at91_rtc_write(AT91_RTC_IER, AT91_RTC_ALARM); - } else + } else { at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ALARM); + at91_rtc_imr &= ~AT91_RTC_ALARM; + } return 0; } @@ -207,12 +215,10 @@ static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) */ static int at91_rtc_proc(struct device *dev, struct seq_file *seq) { - unsigned long imr = at91_rtc_read(AT91_RTC_IMR); - seq_printf(seq, "update_IRQ\t: %s\n", - (imr & AT91_RTC_ACKUPD) ? "yes" : "no"); + (at91_rtc_imr & AT91_RTC_ACKUPD) ? "yes" : "no"); seq_printf(seq, "periodic_IRQ\t: %s\n", - (imr & AT91_RTC_SECEV) ? "yes" : "no"); + (at91_rtc_imr & AT91_RTC_SECEV) ? "yes" : "no"); return 0; } @@ -227,7 +233,7 @@ static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id) unsigned int rtsr; unsigned long events = 0; - rtsr = at91_rtc_read(AT91_RTC_SR) & at91_rtc_read(AT91_RTC_IMR); + rtsr = at91_rtc_read(AT91_RTC_SR) & at91_rtc_imr; if (rtsr) { /* this interrupt is shared! Is it ours? */ if (rtsr & AT91_RTC_ALARM) events |= (RTC_AF | RTC_IRQF); @@ -291,6 +297,7 @@ static int __init at91_rtc_probe(struct platform_device *pdev) at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | AT91_RTC_SECEV | AT91_RTC_TIMEV | AT91_RTC_CALEV); + at91_rtc_imr = 0; ret = request_irq(irq, at91_rtc_interrupt, IRQF_SHARED, @@ -329,6 +336,7 @@ static int __exit at91_rtc_remove(struct platform_device *pdev) at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM | AT91_RTC_SECEV | AT91_RTC_TIMEV | AT91_RTC_CALEV); + at91_rtc_imr = 0; free_irq(irq, pdev); rtc_device_unregister(rtc); @@ -341,31 +349,35 @@ static int __exit at91_rtc_remove(struct platform_device *pdev) /* AT91RM9200 RTC Power management control */ -static u32 at91_rtc_imr; +static u32 at91_rtc_bkpimr; + static int at91_rtc_suspend(struct device *dev) { /* this IRQ is shared with DBGU and other hardware which isn't * necessarily doing PM like we are... */ - at91_rtc_imr = at91_rtc_read(AT91_RTC_IMR) - & (AT91_RTC_ALARM|AT91_RTC_SECEV); - if (at91_rtc_imr) { - if (device_may_wakeup(dev)) + at91_rtc_bkpimr = at91_rtc_imr & (AT91_RTC_ALARM|AT91_RTC_SECEV); + if (at91_rtc_bkpimr) { + if (device_may_wakeup(dev)) { enable_irq_wake(irq); - else - at91_rtc_write(AT91_RTC_IDR, at91_rtc_imr); - } + } else { + at91_rtc_write(AT91_RTC_IDR, at91_rtc_bkpimr); + at91_rtc_imr &= ~at91_rtc_bkpimr; + } +} return 0; } static int at91_rtc_resume(struct device *dev) { - if (at91_rtc_imr) { - if (device_may_wakeup(dev)) + if (at91_rtc_bkpimr) { + if (device_may_wakeup(dev)) { disable_irq_wake(irq); - else - at91_rtc_write(AT91_RTC_IER, at91_rtc_imr); + } else { + at91_rtc_imr |= at91_rtc_bkpimr; + at91_rtc_write(AT91_RTC_IER, at91_rtc_bkpimr); + } } return 0; } diff --git a/drivers/rtc/rtc-at91rm9200.h b/drivers/rtc/rtc-at91rm9200.h index da1945e5f714..5f940b6844cb 100644 --- a/drivers/rtc/rtc-at91rm9200.h +++ b/drivers/rtc/rtc-at91rm9200.h @@ -64,7 +64,6 @@ #define AT91_RTC_SCCR 0x1c /* Status Clear Command Register */ #define AT91_RTC_IER 0x20 /* Interrupt Enable Register */ #define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */ -#define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */ #define AT91_RTC_VER 0x2c /* Valid Entry Register */ #define AT91_RTC_NVTIM (1 << 0) /* Non valid Time */ diff --git a/drivers/rtc/rtc-da9052.c b/drivers/rtc/rtc-da9052.c index 0dde688ca09b..969abbad7fe3 100644 --- a/drivers/rtc/rtc-da9052.c +++ b/drivers/rtc/rtc-da9052.c @@ -239,11 +239,9 @@ static int da9052_rtc_probe(struct platform_device *pdev) rtc->da9052 = dev_get_drvdata(pdev->dev.parent); platform_set_drvdata(pdev, rtc); - rtc->irq = platform_get_irq_byname(pdev, "ALM"); - ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL, - da9052_rtc_irq, - IRQF_TRIGGER_LOW | IRQF_ONESHOT, - "ALM", rtc); + rtc->irq = DA9052_IRQ_ALARM; + ret = da9052_request_irq(rtc->da9052, rtc->irq, "ALM", + da9052_rtc_irq, rtc); if (ret != 0) { rtc_err(rtc->da9052, "irq registration failed: %d\n", ret); return ret; diff --git a/drivers/rtc/rtc-mv.c b/drivers/rtc/rtc-mv.c index 57233c885998..8f87fec27ce7 100644 --- a/drivers/rtc/rtc-mv.c +++ b/drivers/rtc/rtc-mv.c @@ -14,6 +14,7 @@ #include <linux/platform_device.h> #include <linux/of.h> #include <linux/delay.h> +#include <linux/clk.h> #include <linux/gfp.h> #include <linux/module.h> @@ -41,6 +42,7 @@ struct rtc_plat_data { struct rtc_device *rtc; void __iomem *ioaddr; int irq; + struct clk *clk; }; static int mv_rtc_set_time(struct device *dev, struct rtc_time *tm) @@ -221,6 +223,7 @@ static int mv_rtc_probe(struct platform_device *pdev) struct rtc_plat_data *pdata; resource_size_t size; u32 rtc_time; + int ret = 0; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) @@ -239,11 +242,17 @@ static int mv_rtc_probe(struct platform_device *pdev) if (!pdata->ioaddr) return -ENOMEM; + pdata->clk = devm_clk_get(&pdev->dev, NULL); + /* Not all SoCs require a clock.*/ + if (!IS_ERR(pdata->clk)) + clk_prepare_enable(pdata->clk); + /* make sure the 24 hours mode is enabled */ rtc_time = readl(pdata->ioaddr + RTC_TIME_REG_OFFS); if (rtc_time & RTC_HOURS_12H_MODE) { dev_err(&pdev->dev, "24 Hours mode not supported.\n"); - return -EINVAL; + ret = -EINVAL; + goto out; } /* make sure it is actually functional */ @@ -252,7 +261,8 @@ static int mv_rtc_probe(struct platform_device *pdev) rtc_time = readl(pdata->ioaddr + RTC_TIME_REG_OFFS); if (rtc_time == 0x01000000) { dev_err(&pdev->dev, "internal RTC not ticking\n"); - return -ENODEV; + ret = -ENODEV; + goto out; } } @@ -268,8 +278,10 @@ static int mv_rtc_probe(struct platform_device *pdev) } else pdata->rtc = rtc_device_register(pdev->name, &pdev->dev, &mv_rtc_ops, THIS_MODULE); - if (IS_ERR(pdata->rtc)) - return PTR_ERR(pdata->rtc); + if (IS_ERR(pdata->rtc)) { + ret = PTR_ERR(pdata->rtc); + goto out; + } if (pdata->irq >= 0) { writel(0, pdata->ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS); @@ -282,6 +294,11 @@ static int mv_rtc_probe(struct platform_device *pdev) } return 0; +out: + if (!IS_ERR(pdata->clk)) + clk_disable_unprepare(pdata->clk); + + return ret; } static int __exit mv_rtc_remove(struct platform_device *pdev) @@ -292,6 +309,9 @@ static int __exit mv_rtc_remove(struct platform_device *pdev) device_init_wakeup(&pdev->dev, 0); rtc_device_unregister(pdata->rtc); + if (!IS_ERR(pdata->clk)) + clk_disable_unprepare(pdata->clk); + return 0; } diff --git a/drivers/s390/block/scm_blk.c b/drivers/s390/block/scm_blk.c index 9978ad4433cb..5ac9c935c151 100644 --- a/drivers/s390/block/scm_blk.c +++ b/drivers/s390/block/scm_blk.c @@ -135,6 +135,11 @@ static const struct block_device_operations scm_blk_devops = { .release = scm_release, }; +static bool scm_permit_request(struct scm_blk_dev *bdev, struct request *req) +{ + return rq_data_dir(req) != WRITE || bdev->state != SCM_WR_PROHIBIT; +} + static void scm_request_prepare(struct scm_request *scmrq) { struct scm_blk_dev *bdev = scmrq->bdev; @@ -195,14 +200,18 @@ void scm_request_requeue(struct scm_request *scmrq) scm_release_cluster(scmrq); blk_requeue_request(bdev->rq, scmrq->request); + atomic_dec(&bdev->queued_reqs); scm_request_done(scmrq); scm_ensure_queue_restart(bdev); } void scm_request_finish(struct scm_request *scmrq) { + struct scm_blk_dev *bdev = scmrq->bdev; + scm_release_cluster(scmrq); blk_end_request_all(scmrq->request, scmrq->error); + atomic_dec(&bdev->queued_reqs); scm_request_done(scmrq); } @@ -218,6 +227,10 @@ static void scm_blk_request(struct request_queue *rq) if (req->cmd_type != REQ_TYPE_FS) continue; + if (!scm_permit_request(bdev, req)) { + scm_ensure_queue_restart(bdev); + return; + } scmrq = scm_request_fetch(); if (!scmrq) { SCM_LOG(5, "no request"); @@ -231,11 +244,13 @@ static void scm_blk_request(struct request_queue *rq) return; } if (scm_need_cluster_request(scmrq)) { + atomic_inc(&bdev->queued_reqs); blk_start_request(req); scm_initiate_cluster_request(scmrq); return; } scm_request_prepare(scmrq); + atomic_inc(&bdev->queued_reqs); blk_start_request(req); ret = scm_start_aob(scmrq->aob); @@ -244,7 +259,6 @@ static void scm_blk_request(struct request_queue *rq) scm_request_requeue(scmrq); return; } - atomic_inc(&bdev->queued_reqs); } } @@ -280,6 +294,38 @@ void scm_blk_irq(struct scm_device *scmdev, void *data, int error) tasklet_hi_schedule(&bdev->tasklet); } +static void scm_blk_handle_error(struct scm_request *scmrq) +{ + struct scm_blk_dev *bdev = scmrq->bdev; + unsigned long flags; + + if (scmrq->error != -EIO) + goto restart; + + /* For -EIO the response block is valid. */ + switch (scmrq->aob->response.eqc) { + case EQC_WR_PROHIBIT: + spin_lock_irqsave(&bdev->lock, flags); + if (bdev->state != SCM_WR_PROHIBIT) + pr_info("%lu: Write access to the SCM increment is suspended\n", + (unsigned long) bdev->scmdev->address); + bdev->state = SCM_WR_PROHIBIT; + spin_unlock_irqrestore(&bdev->lock, flags); + goto requeue; + default: + break; + } + +restart: + if (!scm_start_aob(scmrq->aob)) + return; + +requeue: + spin_lock_irqsave(&bdev->rq_lock, flags); + scm_request_requeue(scmrq); + spin_unlock_irqrestore(&bdev->rq_lock, flags); +} + static void scm_blk_tasklet(struct scm_blk_dev *bdev) { struct scm_request *scmrq; @@ -293,11 +339,8 @@ static void scm_blk_tasklet(struct scm_blk_dev *bdev) spin_unlock_irqrestore(&bdev->lock, flags); if (scmrq->error && scmrq->retries-- > 0) { - if (scm_start_aob(scmrq->aob)) { - spin_lock_irqsave(&bdev->rq_lock, flags); - scm_request_requeue(scmrq); - spin_unlock_irqrestore(&bdev->rq_lock, flags); - } + scm_blk_handle_error(scmrq); + /* Request restarted or requeued, handle next. */ spin_lock_irqsave(&bdev->lock, flags); continue; @@ -310,7 +353,6 @@ static void scm_blk_tasklet(struct scm_blk_dev *bdev) } scm_request_finish(scmrq); - atomic_dec(&bdev->queued_reqs); spin_lock_irqsave(&bdev->lock, flags); } spin_unlock_irqrestore(&bdev->lock, flags); @@ -332,6 +374,7 @@ int scm_blk_dev_setup(struct scm_blk_dev *bdev, struct scm_device *scmdev) } bdev->scmdev = scmdev; + bdev->state = SCM_OPER; spin_lock_init(&bdev->rq_lock); spin_lock_init(&bdev->lock); INIT_LIST_HEAD(&bdev->finished_requests); @@ -396,6 +439,18 @@ void scm_blk_dev_cleanup(struct scm_blk_dev *bdev) put_disk(bdev->gendisk); } +void scm_blk_set_available(struct scm_blk_dev *bdev) +{ + unsigned long flags; + + spin_lock_irqsave(&bdev->lock, flags); + if (bdev->state == SCM_WR_PROHIBIT) + pr_info("%lu: Write access to the SCM increment is restored\n", + (unsigned long) bdev->scmdev->address); + bdev->state = SCM_OPER; + spin_unlock_irqrestore(&bdev->lock, flags); +} + static int __init scm_blk_init(void) { int ret = -EINVAL; diff --git a/drivers/s390/block/scm_blk.h b/drivers/s390/block/scm_blk.h index 3c1ccf494647..8b387b32fd62 100644 --- a/drivers/s390/block/scm_blk.h +++ b/drivers/s390/block/scm_blk.h @@ -21,6 +21,7 @@ struct scm_blk_dev { spinlock_t rq_lock; /* guard the request queue */ spinlock_t lock; /* guard the rest of the blockdev */ atomic_t queued_reqs; + enum {SCM_OPER, SCM_WR_PROHIBIT} state; struct list_head finished_requests; #ifdef CONFIG_SCM_BLOCK_CLUSTER_WRITE struct list_head cluster_list; @@ -48,6 +49,7 @@ struct scm_request { int scm_blk_dev_setup(struct scm_blk_dev *, struct scm_device *); void scm_blk_dev_cleanup(struct scm_blk_dev *); +void scm_blk_set_available(struct scm_blk_dev *); void scm_blk_irq(struct scm_device *, void *, int); void scm_request_finish(struct scm_request *); diff --git a/drivers/s390/block/scm_drv.c b/drivers/s390/block/scm_drv.c index 9fa0a908607b..5f6180d6ff08 100644 --- a/drivers/s390/block/scm_drv.c +++ b/drivers/s390/block/scm_drv.c @@ -13,12 +13,23 @@ #include <asm/eadm.h> #include "scm_blk.h" -static void notify(struct scm_device *scmdev) +static void scm_notify(struct scm_device *scmdev, enum scm_event event) { - pr_info("%lu: The capabilities of the SCM increment changed\n", - (unsigned long) scmdev->address); - SCM_LOG(2, "State changed"); - SCM_LOG_STATE(2, scmdev); + struct scm_blk_dev *bdev = dev_get_drvdata(&scmdev->dev); + + switch (event) { + case SCM_CHANGE: + pr_info("%lu: The capabilities of the SCM increment changed\n", + (unsigned long) scmdev->address); + SCM_LOG(2, "State changed"); + SCM_LOG_STATE(2, scmdev); + break; + case SCM_AVAIL: + SCM_LOG(2, "Increment available"); + SCM_LOG_STATE(2, scmdev); + scm_blk_set_available(bdev); + break; + } } static int scm_probe(struct scm_device *scmdev) @@ -64,7 +75,7 @@ static struct scm_driver scm_drv = { .name = "scm_block", .owner = THIS_MODULE, }, - .notify = notify, + .notify = scm_notify, .probe = scm_probe, .remove = scm_remove, .handler = scm_blk_irq, diff --git a/drivers/s390/char/sclp_cmd.c b/drivers/s390/char/sclp_cmd.c index 30a2255389e5..cd798386b622 100644 --- a/drivers/s390/char/sclp_cmd.c +++ b/drivers/s390/char/sclp_cmd.c @@ -627,6 +627,8 @@ static int __init sclp_detect_standby_memory(void) struct read_storage_sccb *sccb; int i, id, assigned, rc; + if (OLDMEM_BASE) /* No standby memory in kdump mode */ + return 0; if (!early_read_info_sccb_valid) return 0; if ((sclp_facilities & 0xe00000000000ULL) != 0xe00000000000ULL) diff --git a/drivers/s390/cio/chsc.c b/drivers/s390/cio/chsc.c index 31ceef1beb8b..e16c553f6556 100644 --- a/drivers/s390/cio/chsc.c +++ b/drivers/s390/cio/chsc.c @@ -433,6 +433,20 @@ static void chsc_process_sei_scm_change(struct chsc_sei_nt0_area *sei_area) " failed (rc=%d).\n", ret); } +static void chsc_process_sei_scm_avail(struct chsc_sei_nt0_area *sei_area) +{ + int ret; + + CIO_CRW_EVENT(4, "chsc: scm available information\n"); + if (sei_area->rs != 7) + return; + + ret = scm_process_availability_information(); + if (ret) + CIO_CRW_EVENT(0, "chsc: process availability information" + " failed (rc=%d).\n", ret); +} + static void chsc_process_sei_nt2(struct chsc_sei_nt2_area *sei_area) { switch (sei_area->cc) { @@ -468,6 +482,9 @@ static void chsc_process_sei_nt0(struct chsc_sei_nt0_area *sei_area) case 12: /* scm change notification */ chsc_process_sei_scm_change(sei_area); break; + case 14: /* scm available notification */ + chsc_process_sei_scm_avail(sei_area); + break; default: /* other stuff */ CIO_CRW_EVENT(2, "chsc: sei nt0 unhandled cc=%d\n", sei_area->cc); diff --git a/drivers/s390/cio/chsc.h b/drivers/s390/cio/chsc.h index 227e05f674b3..349d5fc47196 100644 --- a/drivers/s390/cio/chsc.h +++ b/drivers/s390/cio/chsc.h @@ -156,8 +156,10 @@ int chsc_scm_info(struct chsc_scm_info *scm_area, u64 token); #ifdef CONFIG_SCM_BUS int scm_update_information(void); +int scm_process_availability_information(void); #else /* CONFIG_SCM_BUS */ static inline int scm_update_information(void) { return 0; } +static inline int scm_process_availability_information(void) { return 0; } #endif /* CONFIG_SCM_BUS */ diff --git a/drivers/s390/cio/scm.c b/drivers/s390/cio/scm.c index bcf20f3aa51b..46ec25632e8b 100644 --- a/drivers/s390/cio/scm.c +++ b/drivers/s390/cio/scm.c @@ -211,7 +211,7 @@ static void scmdev_update(struct scm_device *scmdev, struct sale *sale) goto out; scmdrv = to_scm_drv(scmdev->dev.driver); if (changed && scmdrv->notify) - scmdrv->notify(scmdev); + scmdrv->notify(scmdev, SCM_CHANGE); out: device_unlock(&scmdev->dev); if (changed) @@ -297,6 +297,22 @@ int scm_update_information(void) return ret; } +static int scm_dev_avail(struct device *dev, void *unused) +{ + struct scm_driver *scmdrv = to_scm_drv(dev->driver); + struct scm_device *scmdev = to_scm_dev(dev); + + if (dev->driver && scmdrv->notify) + scmdrv->notify(scmdev, SCM_AVAIL); + + return 0; +} + +int scm_process_availability_information(void) +{ + return bus_for_each_dev(&scm_bus_type, NULL, NULL, scm_dev_avail); +} + static int __init scm_init(void) { int ret; diff --git a/drivers/s390/net/qeth_core.h b/drivers/s390/net/qeth_core.h index d87961d4c0de..8c0622399fcd 100644 --- a/drivers/s390/net/qeth_core.h +++ b/drivers/s390/net/qeth_core.h @@ -916,6 +916,7 @@ int qeth_send_control_data(struct qeth_card *, int, struct qeth_cmd_buffer *, void *reply_param); int qeth_get_priority_queue(struct qeth_card *, struct sk_buff *, int, int); int qeth_get_elements_no(struct qeth_card *, void *, struct sk_buff *, int); +int qeth_get_elements_for_frags(struct sk_buff *); int qeth_do_send_packet_fast(struct qeth_card *, struct qeth_qdio_out_q *, struct sk_buff *, struct qeth_hdr *, int, int, int); int qeth_do_send_packet(struct qeth_card *, struct qeth_qdio_out_q *, diff --git a/drivers/s390/net/qeth_core_main.c b/drivers/s390/net/qeth_core_main.c index 0d8cdff81813..0d73a999983d 100644 --- a/drivers/s390/net/qeth_core_main.c +++ b/drivers/s390/net/qeth_core_main.c @@ -3679,6 +3679,25 @@ int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, } EXPORT_SYMBOL_GPL(qeth_get_priority_queue); +int qeth_get_elements_for_frags(struct sk_buff *skb) +{ + int cnt, length, e, elements = 0; + struct skb_frag_struct *frag; + char *data; + + for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { + frag = &skb_shinfo(skb)->frags[cnt]; + data = (char *)page_to_phys(skb_frag_page(frag)) + + frag->page_offset; + length = frag->size; + e = PFN_UP((unsigned long)data + length - 1) - + PFN_DOWN((unsigned long)data); + elements += e; + } + return elements; +} +EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags); + int qeth_get_elements_no(struct qeth_card *card, void *hdr, struct sk_buff *skb, int elems) { @@ -3686,7 +3705,8 @@ int qeth_get_elements_no(struct qeth_card *card, void *hdr, int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) - PFN_DOWN((unsigned long)skb->data); - elements_needed += skb_shinfo(skb)->nr_frags; + elements_needed += qeth_get_elements_for_frags(skb); + if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) { QETH_DBF_MESSAGE(2, "Invalid size of IP packet " "(Number=%d / Length=%d). Discarded.\n", @@ -3771,12 +3791,23 @@ static inline void __qeth_fill_buffer(struct sk_buff *skb, for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { frag = &skb_shinfo(skb)->frags[cnt]; - buffer->element[element].addr = (char *) - page_to_phys(skb_frag_page(frag)) - + frag->page_offset; - buffer->element[element].length = frag->size; - buffer->element[element].eflags = SBAL_EFLAGS_MIDDLE_FRAG; - element++; + data = (char *)page_to_phys(skb_frag_page(frag)) + + frag->page_offset; + length = frag->size; + while (length > 0) { + length_here = PAGE_SIZE - + ((unsigned long) data % PAGE_SIZE); + if (length < length_here) + length_here = length; + + buffer->element[element].addr = data; + buffer->element[element].length = length_here; + buffer->element[element].eflags = + SBAL_EFLAGS_MIDDLE_FRAG; + length -= length_here; + data += length_here; + element++; + } } if (buffer->element[element - 1].eflags) diff --git a/drivers/s390/net/qeth_l3_main.c b/drivers/s390/net/qeth_l3_main.c index 091ca0efa1c5..8710337dab3e 100644 --- a/drivers/s390/net/qeth_l3_main.c +++ b/drivers/s390/net/qeth_l3_main.c @@ -623,7 +623,7 @@ static int qeth_l3_send_setrouting(struct qeth_card *card, return rc; } -static void qeth_l3_correct_routing_type(struct qeth_card *card, +static int qeth_l3_correct_routing_type(struct qeth_card *card, enum qeth_routing_types *type, enum qeth_prot_versions prot) { if (card->info.type == QETH_CARD_TYPE_IQD) { @@ -632,7 +632,7 @@ static void qeth_l3_correct_routing_type(struct qeth_card *card, case PRIMARY_CONNECTOR: case SECONDARY_CONNECTOR: case MULTICAST_ROUTER: - return; + return 0; default: goto out_inval; } @@ -641,17 +641,18 @@ static void qeth_l3_correct_routing_type(struct qeth_card *card, case NO_ROUTER: case PRIMARY_ROUTER: case SECONDARY_ROUTER: - return; + return 0; case MULTICAST_ROUTER: if (qeth_is_ipafunc_supported(card, prot, IPA_OSA_MC_ROUTER)) - return; + return 0; default: goto out_inval; } } out_inval: *type = NO_ROUTER; + return -EINVAL; } int qeth_l3_setrouting_v4(struct qeth_card *card) @@ -660,8 +661,10 @@ int qeth_l3_setrouting_v4(struct qeth_card *card) QETH_CARD_TEXT(card, 3, "setrtg4"); - qeth_l3_correct_routing_type(card, &card->options.route4.type, + rc = qeth_l3_correct_routing_type(card, &card->options.route4.type, QETH_PROT_IPV4); + if (rc) + return rc; rc = qeth_l3_send_setrouting(card, card->options.route4.type, QETH_PROT_IPV4); @@ -683,8 +686,10 @@ int qeth_l3_setrouting_v6(struct qeth_card *card) if (!qeth_is_supported(card, IPA_IPV6)) return 0; - qeth_l3_correct_routing_type(card, &card->options.route6.type, + rc = qeth_l3_correct_routing_type(card, &card->options.route6.type, QETH_PROT_IPV6); + if (rc) + return rc; rc = qeth_l3_send_setrouting(card, card->options.route6.type, QETH_PROT_IPV6); @@ -2898,7 +2903,9 @@ static inline int qeth_l3_tso_elements(struct sk_buff *skb) tcp_hdr(skb)->doff * 4; int tcpd_len = skb->len - (tcpd - (unsigned long)skb->data); int elements = PFN_UP(tcpd + tcpd_len - 1) - PFN_DOWN(tcpd); - elements += skb_shinfo(skb)->nr_frags; + + elements += qeth_get_elements_for_frags(skb); + return elements; } @@ -3348,7 +3355,6 @@ static int __qeth_l3_set_online(struct ccwgroup_device *gdev, int recovery_mode) rc = -ENODEV; goto out_remove; } - qeth_trace_features(card); if (!card->dev && qeth_l3_setup_netdev(card)) { rc = -ENODEV; @@ -3425,6 +3431,7 @@ contin: qeth_l3_set_multicast_list(card->dev); rtnl_unlock(); } + qeth_trace_features(card); /* let user_space know that device is online */ kobject_uevent(&gdev->dev.kobj, KOBJ_CHANGE); mutex_unlock(&card->conf_mutex); diff --git a/drivers/s390/net/qeth_l3_sys.c b/drivers/s390/net/qeth_l3_sys.c index ebc379486267..e70af2406ff9 100644 --- a/drivers/s390/net/qeth_l3_sys.c +++ b/drivers/s390/net/qeth_l3_sys.c @@ -87,6 +87,8 @@ static ssize_t qeth_l3_dev_route_store(struct qeth_card *card, rc = qeth_l3_setrouting_v6(card); } out: + if (rc) + route->type = old_route_type; mutex_unlock(&card->conf_mutex); return rc ? rc : count; } diff --git a/drivers/staging/comedi/drivers/dt9812.c b/drivers/staging/comedi/drivers/dt9812.c index 192cf088f834..57b451904791 100644 --- a/drivers/staging/comedi/drivers/dt9812.c +++ b/drivers/staging/comedi/drivers/dt9812.c @@ -947,12 +947,13 @@ static int dt9812_di_rinsn(struct comedi_device *dev, unsigned int *data) { struct comedi_dt9812 *devpriv = dev->private; + unsigned int channel = CR_CHAN(insn->chanspec); int n; u8 bits = 0; dt9812_digital_in(devpriv->slot, &bits); for (n = 0; n < insn->n; n++) - data[n] = ((1 << insn->chanspec) & bits) != 0; + data[n] = ((1 << channel) & bits) != 0; return n; } @@ -961,12 +962,13 @@ static int dt9812_do_winsn(struct comedi_device *dev, unsigned int *data) { struct comedi_dt9812 *devpriv = dev->private; + unsigned int channel = CR_CHAN(insn->chanspec); int n; u8 bits = 0; dt9812_digital_out_shadow(devpriv->slot, &bits); for (n = 0; n < insn->n; n++) { - u8 mask = 1 << insn->chanspec; + u8 mask = 1 << channel; bits &= ~mask; if (data[n]) @@ -981,13 +983,13 @@ static int dt9812_ai_rinsn(struct comedi_device *dev, unsigned int *data) { struct comedi_dt9812 *devpriv = dev->private; + unsigned int channel = CR_CHAN(insn->chanspec); int n; for (n = 0; n < insn->n; n++) { u16 value = 0; - dt9812_analog_in(devpriv->slot, insn->chanspec, &value, - DT9812_GAIN_1); + dt9812_analog_in(devpriv->slot, channel, &value, DT9812_GAIN_1); data[n] = value; } return n; @@ -998,12 +1000,13 @@ static int dt9812_ao_rinsn(struct comedi_device *dev, unsigned int *data) { struct comedi_dt9812 *devpriv = dev->private; + unsigned int channel = CR_CHAN(insn->chanspec); int n; u16 value; for (n = 0; n < insn->n; n++) { value = 0; - dt9812_analog_out_shadow(devpriv->slot, insn->chanspec, &value); + dt9812_analog_out_shadow(devpriv->slot, channel, &value); data[n] = value; } return n; @@ -1014,10 +1017,11 @@ static int dt9812_ao_winsn(struct comedi_device *dev, unsigned int *data) { struct comedi_dt9812 *devpriv = dev->private; + unsigned int channel = CR_CHAN(insn->chanspec); int n; for (n = 0; n < insn->n; n++) - dt9812_analog_out(devpriv->slot, insn->chanspec, data[n]); + dt9812_analog_out(devpriv->slot, channel, data[n]); return n; } diff --git a/drivers/staging/comedi/drivers/s626.c b/drivers/staging/comedi/drivers/s626.c index 81a1fe661579..71a73ec5af8d 100644 --- a/drivers/staging/comedi/drivers/s626.c +++ b/drivers/staging/comedi/drivers/s626.c @@ -1483,7 +1483,7 @@ static int s626_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s) case TRIG_NONE: /* continous acquisition */ devpriv->ai_continous = 1; - devpriv->ai_sample_count = 0; + devpriv->ai_sample_count = 1; break; } diff --git a/drivers/staging/comedi/drivers/usbdux.c b/drivers/staging/comedi/drivers/usbdux.c index 1a0062a04456..6aac1f60bc42 100644 --- a/drivers/staging/comedi/drivers/usbdux.c +++ b/drivers/staging/comedi/drivers/usbdux.c @@ -730,10 +730,14 @@ static void usbduxsub_ao_IsocIrq(struct urb *urb) static int usbduxsub_start(struct usbduxsub *usbduxsub) { int errcode = 0; - uint8_t local_transfer_buffer[16]; + uint8_t *local_transfer_buffer; + + local_transfer_buffer = kmalloc(1, GFP_KERNEL); + if (!local_transfer_buffer) + return -ENOMEM; /* 7f92 to zero */ - local_transfer_buffer[0] = 0; + *local_transfer_buffer = 0; errcode = usb_control_msg(usbduxsub->usbdev, /* create a pipe for a control transfer */ usb_sndctrlpipe(usbduxsub->usbdev, 0), @@ -751,22 +755,25 @@ static int usbduxsub_start(struct usbduxsub *usbduxsub) 1, /* Timeout */ BULK_TIMEOUT); - if (errcode < 0) { + if (errcode < 0) dev_err(&usbduxsub->interface->dev, "comedi_: control msg failed (start)\n"); - return errcode; - } - return 0; + + kfree(local_transfer_buffer); + return errcode; } static int usbduxsub_stop(struct usbduxsub *usbduxsub) { int errcode = 0; + uint8_t *local_transfer_buffer; - uint8_t local_transfer_buffer[16]; + local_transfer_buffer = kmalloc(1, GFP_KERNEL); + if (!local_transfer_buffer) + return -ENOMEM; /* 7f92 to one */ - local_transfer_buffer[0] = 1; + *local_transfer_buffer = 1; errcode = usb_control_msg(usbduxsub->usbdev, usb_sndctrlpipe(usbduxsub->usbdev, 0), /* bRequest, "Firmware" */ @@ -781,12 +788,12 @@ static int usbduxsub_stop(struct usbduxsub *usbduxsub) 1, /* Timeout */ BULK_TIMEOUT); - if (errcode < 0) { + if (errcode < 0) dev_err(&usbduxsub->interface->dev, "comedi_: control msg failed (stop)\n"); - return errcode; - } - return 0; + + kfree(local_transfer_buffer); + return errcode; } static int usbduxsub_upload(struct usbduxsub *usbduxsub, diff --git a/drivers/staging/comedi/drivers/usbduxfast.c b/drivers/staging/comedi/drivers/usbduxfast.c index 4bf5dd094dc9..1ba0e3df492d 100644 --- a/drivers/staging/comedi/drivers/usbduxfast.c +++ b/drivers/staging/comedi/drivers/usbduxfast.c @@ -436,10 +436,14 @@ static void usbduxfastsub_ai_Irq(struct urb *urb) static int usbduxfastsub_start(struct usbduxfastsub_s *udfs) { int ret; - unsigned char local_transfer_buffer[16]; + unsigned char *local_transfer_buffer; + + local_transfer_buffer = kmalloc(1, GFP_KERNEL); + if (!local_transfer_buffer) + return -ENOMEM; /* 7f92 to zero */ - local_transfer_buffer[0] = 0; + *local_transfer_buffer = 0; /* bRequest, "Firmware" */ ret = usb_control_msg(udfs->usbdev, usb_sndctrlpipe(udfs->usbdev, 0), USBDUXFASTSUB_FIRMWARE, @@ -450,22 +454,25 @@ static int usbduxfastsub_start(struct usbduxfastsub_s *udfs) local_transfer_buffer, 1, /* Length */ EZTIMEOUT); /* Timeout */ - if (ret < 0) { + if (ret < 0) dev_err(&udfs->interface->dev, "control msg failed (start)\n"); - return ret; - } - return 0; + kfree(local_transfer_buffer); + return ret; } static int usbduxfastsub_stop(struct usbduxfastsub_s *udfs) { int ret; - unsigned char local_transfer_buffer[16]; + unsigned char *local_transfer_buffer; + + local_transfer_buffer = kmalloc(1, GFP_KERNEL); + if (!local_transfer_buffer) + return -ENOMEM; /* 7f92 to one */ - local_transfer_buffer[0] = 1; + *local_transfer_buffer = 1; /* bRequest, "Firmware" */ ret = usb_control_msg(udfs->usbdev, usb_sndctrlpipe(udfs->usbdev, 0), USBDUXFASTSUB_FIRMWARE, @@ -474,13 +481,12 @@ static int usbduxfastsub_stop(struct usbduxfastsub_s *udfs) 0x0000, /* Index */ local_transfer_buffer, 1, /* Length */ EZTIMEOUT); /* Timeout */ - if (ret < 0) { + if (ret < 0) dev_err(&udfs->interface->dev, "control msg failed (stop)\n"); - return ret; - } - return 0; + kfree(local_transfer_buffer); + return ret; } static int usbduxfastsub_upload(struct usbduxfastsub_s *udfs, diff --git a/drivers/staging/comedi/drivers/usbduxsigma.c b/drivers/staging/comedi/drivers/usbduxsigma.c index d066351a71b2..a728c8fc32a2 100644 --- a/drivers/staging/comedi/drivers/usbduxsigma.c +++ b/drivers/staging/comedi/drivers/usbduxsigma.c @@ -681,7 +681,11 @@ static void usbduxsub_ao_IsocIrq(struct urb *urb) static int usbduxsub_start(struct usbduxsub *usbduxsub) { int errcode = 0; - uint8_t local_transfer_buffer[16]; + uint8_t *local_transfer_buffer; + + local_transfer_buffer = kmalloc(16, GFP_KERNEL); + if (!local_transfer_buffer) + return -ENOMEM; /* 7f92 to zero */ local_transfer_buffer[0] = 0; @@ -702,19 +706,22 @@ static int usbduxsub_start(struct usbduxsub *usbduxsub) 1, /* Timeout */ BULK_TIMEOUT); - if (errcode < 0) { + if (errcode < 0) dev_err(&usbduxsub->interface->dev, "comedi_: control msg failed (start)\n"); - return errcode; - } - return 0; + + kfree(local_transfer_buffer); + return errcode; } static int usbduxsub_stop(struct usbduxsub *usbduxsub) { int errcode = 0; + uint8_t *local_transfer_buffer; - uint8_t local_transfer_buffer[16]; + local_transfer_buffer = kmalloc(16, GFP_KERNEL); + if (!local_transfer_buffer) + return -ENOMEM; /* 7f92 to one */ local_transfer_buffer[0] = 1; @@ -732,12 +739,12 @@ static int usbduxsub_stop(struct usbduxsub *usbduxsub) 1, /* Timeout */ BULK_TIMEOUT); - if (errcode < 0) { + if (errcode < 0) dev_err(&usbduxsub->interface->dev, "comedi_: control msg failed (stop)\n"); - return errcode; - } - return 0; + + kfree(local_transfer_buffer); + return errcode; } static int usbduxsub_upload(struct usbduxsub *usbduxsub, diff --git a/drivers/staging/imx-drm/ipu-v3/ipu-common.c b/drivers/staging/imx-drm/ipu-v3/ipu-common.c index 366f259e3756..6efe4e1b499f 100644 --- a/drivers/staging/imx-drm/ipu-v3/ipu-common.c +++ b/drivers/staging/imx-drm/ipu-v3/ipu-common.c @@ -25,8 +25,8 @@ #include <linux/clk.h> #include <linux/list.h> #include <linux/irq.h> +#include <linux/irqchip/chained_irq.h> #include <linux/of_device.h> -#include <asm/mach/irq.h> #include "imx-ipu-v3.h" #include "ipu-prv.h" diff --git a/drivers/staging/imx-drm/ipuv3-crtc.c b/drivers/staging/imx-drm/ipuv3-crtc.c index 4b3a019409b5..b028b0d1317b 100644 --- a/drivers/staging/imx-drm/ipuv3-crtc.c +++ b/drivers/staging/imx-drm/ipuv3-crtc.c @@ -483,17 +483,6 @@ static int ipu_get_resources(struct ipu_crtc *ipu_crtc, goto err_out; } - ipu_crtc->irq = ipu_idmac_channel_irq(ipu, ipu_crtc->ipu_ch, - IPU_IRQ_EOF); - ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0, - "imx_drm", ipu_crtc); - if (ret < 0) { - dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret); - goto err_out; - } - - disable_irq(ipu_crtc->irq); - return 0; err_out: ipu_put_resources(ipu_crtc); @@ -504,6 +493,7 @@ err_out: static int ipu_crtc_init(struct ipu_crtc *ipu_crtc, struct ipu_client_platformdata *pdata) { + struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent); int ret; ret = ipu_get_resources(ipu_crtc, pdata); @@ -522,6 +512,17 @@ static int ipu_crtc_init(struct ipu_crtc *ipu_crtc, goto err_put_resources; } + ipu_crtc->irq = ipu_idmac_channel_irq(ipu, ipu_crtc->ipu_ch, + IPU_IRQ_EOF); + ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0, + "imx_drm", ipu_crtc); + if (ret < 0) { + dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret); + goto err_put_resources; + } + + disable_irq(ipu_crtc->irq); + return 0; err_put_resources: diff --git a/drivers/staging/tidspbridge/rmgr/drv.c b/drivers/staging/tidspbridge/rmgr/drv.c index db1da28cecba..be26917a6896 100644 --- a/drivers/staging/tidspbridge/rmgr/drv.c +++ b/drivers/staging/tidspbridge/rmgr/drv.c @@ -76,37 +76,28 @@ int drv_insert_node_res_element(void *hnode, void *node_resource, struct node_res_object **node_res_obj = (struct node_res_object **)node_resource; struct process_context *ctxt = (struct process_context *)process_ctxt; - int status = 0; int retval; *node_res_obj = kzalloc(sizeof(struct node_res_object), GFP_KERNEL); - if (!*node_res_obj) { - status = -ENOMEM; - goto func_end; - } + if (!*node_res_obj) + return -ENOMEM; (*node_res_obj)->node = hnode; - retval = idr_get_new(ctxt->node_id, *node_res_obj, - &(*node_res_obj)->id); - if (retval == -EAGAIN) { - if (!idr_pre_get(ctxt->node_id, GFP_KERNEL)) { - pr_err("%s: OUT OF MEMORY\n", __func__); - status = -ENOMEM; - goto func_end; - } - - retval = idr_get_new(ctxt->node_id, *node_res_obj, - &(*node_res_obj)->id); + retval = idr_alloc(ctxt->node_id, *node_res_obj, 0, 0, GFP_KERNEL); + if (retval >= 0) { + (*node_res_obj)->id = retval; + return 0; } - if (retval) { + + kfree(*node_res_obj); + + if (retval == -ENOSPC) { pr_err("%s: FAILED, IDR is FULL\n", __func__); - status = -EFAULT; + return -EFAULT; + } else { + pr_err("%s: OUT OF MEMORY\n", __func__); + return -ENOMEM; } -func_end: - if (status) - kfree(*node_res_obj); - - return status; } /* Release all Node resources and its context @@ -201,35 +192,26 @@ int drv_proc_insert_strm_res_element(void *stream_obj, struct strm_res_object **pstrm_res = (struct strm_res_object **)strm_res; struct process_context *ctxt = (struct process_context *)process_ctxt; - int status = 0; int retval; *pstrm_res = kzalloc(sizeof(struct strm_res_object), GFP_KERNEL); - if (*pstrm_res == NULL) { - status = -EFAULT; - goto func_end; - } + if (*pstrm_res == NULL) + return -EFAULT; (*pstrm_res)->stream = stream_obj; - retval = idr_get_new(ctxt->stream_id, *pstrm_res, - &(*pstrm_res)->id); - if (retval == -EAGAIN) { - if (!idr_pre_get(ctxt->stream_id, GFP_KERNEL)) { - pr_err("%s: OUT OF MEMORY\n", __func__); - status = -ENOMEM; - goto func_end; - } - - retval = idr_get_new(ctxt->stream_id, *pstrm_res, - &(*pstrm_res)->id); + retval = idr_alloc(ctxt->stream_id, *pstrm_res, 0, 0, GFP_KERNEL); + if (retval >= 0) { + (*pstrm_res)->id = retval; + return 0; } - if (retval) { + + if (retval == -ENOSPC) { pr_err("%s: FAILED, IDR is FULL\n", __func__); - status = -EPERM; + return -EPERM; + } else { + pr_err("%s: OUT OF MEMORY\n", __func__); + return -ENOMEM; } - -func_end: - return status; } static int drv_proc_free_strm_res(int id, void *p, void *process_ctxt) diff --git a/drivers/staging/vt6656/card.c b/drivers/staging/vt6656/card.c index 22918a106d73..d2479b766450 100644 --- a/drivers/staging/vt6656/card.c +++ b/drivers/staging/vt6656/card.c @@ -790,7 +790,7 @@ u64 CARDqGetNextTBTT(u64 qwTSF, WORD wBeaconInterval) if ((~uLowNextTBTT) < uLowRemain) qwTSF = ((qwTSF >> 32) + 1) << 32; - qwTSF = (qwTSF & 0xffffffff00000000UL) | + qwTSF = (qwTSF & 0xffffffff00000000ULL) | (u64)(uLowNextTBTT + uLowRemain); return (qwTSF); diff --git a/drivers/staging/vt6656/main_usb.c b/drivers/staging/vt6656/main_usb.c index d5f53e1a74a2..a5063a6f64d9 100644 --- a/drivers/staging/vt6656/main_usb.c +++ b/drivers/staging/vt6656/main_usb.c @@ -669,8 +669,6 @@ static int vt6656_suspend(struct usb_interface *intf, pm_message_t message) if (device->flags & DEVICE_FLAGS_OPENED) device_close(device->dev); - usb_put_dev(interface_to_usbdev(intf)); - return 0; } @@ -681,8 +679,6 @@ static int vt6656_resume(struct usb_interface *intf) if (!device || !device->dev) return -ENODEV; - usb_get_dev(interface_to_usbdev(intf)); - if (!(device->flags & DEVICE_FLAGS_OPENED)) device_open(device->dev); diff --git a/drivers/staging/zcache/Kconfig b/drivers/staging/zcache/Kconfig index 73582705e8c5..5c3714530961 100644 --- a/drivers/staging/zcache/Kconfig +++ b/drivers/staging/zcache/Kconfig @@ -15,7 +15,7 @@ config RAMSTER depends on CONFIGFS_FS=y && SYSFS=y && !HIGHMEM && ZCACHE=y depends on NET # must ensure struct page is 8-byte aligned - select HAVE_ALIGNED_STRUCT_PAGE if !64_BIT + select HAVE_ALIGNED_STRUCT_PAGE if !64BIT default n help RAMster allows RAM on other machines in a cluster to be utilized diff --git a/drivers/staging/zcache/ramster/tcp.c b/drivers/staging/zcache/ramster/tcp.c index aa2a1a763aa4..f6e1e5209d88 100644 --- a/drivers/staging/zcache/ramster/tcp.c +++ b/drivers/staging/zcache/ramster/tcp.c @@ -300,27 +300,22 @@ static u8 r2net_num_from_nn(struct r2net_node *nn) static int r2net_prep_nsw(struct r2net_node *nn, struct r2net_status_wait *nsw) { - int ret = 0; + int ret; - do { - if (!idr_pre_get(&nn->nn_status_idr, GFP_ATOMIC)) { - ret = -EAGAIN; - break; - } - spin_lock(&nn->nn_lock); - ret = idr_get_new(&nn->nn_status_idr, nsw, &nsw->ns_id); - if (ret == 0) - list_add_tail(&nsw->ns_node_item, - &nn->nn_status_list); - spin_unlock(&nn->nn_lock); - } while (ret == -EAGAIN); + spin_lock(&nn->nn_lock); + ret = idr_alloc(&nn->nn_status_idr, nsw, 0, 0, GFP_ATOMIC); + if (ret >= 0) { + nsw->ns_id = ret; + list_add_tail(&nsw->ns_node_item, &nn->nn_status_list); + } + spin_unlock(&nn->nn_lock); - if (ret == 0) { + if (ret >= 0) { init_waitqueue_head(&nsw->ns_wq); nsw->ns_sys_status = R2NET_ERR_NONE; nsw->ns_status = 0; + return 0; } - return ret; } diff --git a/drivers/target/iscsi/iscsi_target_auth.c b/drivers/target/iscsi/iscsi_target_auth.c index db0cf7c8adde..a0fc7b9eea65 100644 --- a/drivers/target/iscsi/iscsi_target_auth.c +++ b/drivers/target/iscsi/iscsi_target_auth.c @@ -166,6 +166,7 @@ static int chap_server_compute_md5( { char *endptr; unsigned long id; + unsigned char id_as_uchar; unsigned char digest[MD5_SIGNATURE_SIZE]; unsigned char type, response[MD5_SIGNATURE_SIZE * 2 + 2]; unsigned char identifier[10], *challenge = NULL; @@ -355,7 +356,9 @@ static int chap_server_compute_md5( goto out; } - sg_init_one(&sg, &id, 1); + /* To handle both endiannesses */ + id_as_uchar = id; + sg_init_one(&sg, &id_as_uchar, 1); ret = crypto_hash_update(&desc, &sg, 1); if (ret < 0) { pr_err("crypto_hash_update() failed for id\n"); diff --git a/drivers/target/target_core_file.h b/drivers/target/target_core_file.h index bc02b018ae46..37ffc5bd2399 100644 --- a/drivers/target/target_core_file.h +++ b/drivers/target/target_core_file.h @@ -7,7 +7,7 @@ #define FD_DEVICE_QUEUE_DEPTH 32 #define FD_MAX_DEVICE_QUEUE_DEPTH 128 #define FD_BLOCKSIZE 512 -#define FD_MAX_SECTORS 1024 +#define FD_MAX_SECTORS 2048 #define RRF_EMULATE_CDB 0x01 #define RRF_GOT_LBA 0x02 diff --git a/drivers/target/target_core_pscsi.c b/drivers/target/target_core_pscsi.c index 82e78d72fdb6..e992b27aa090 100644 --- a/drivers/target/target_core_pscsi.c +++ b/drivers/target/target_core_pscsi.c @@ -883,7 +883,14 @@ pscsi_map_sg(struct se_cmd *cmd, struct scatterlist *sgl, u32 sgl_nents, pr_debug("PSCSI: i: %d page: %p len: %d off: %d\n", i, page, len, off); - while (len > 0 && data_len > 0) { + /* + * We only have one page of data in each sg element, + * we can not cross a page boundary. + */ + if (off + len > PAGE_SIZE) + goto fail; + + if (len > 0 && data_len > 0) { bytes = min_t(unsigned int, len, PAGE_SIZE - off); bytes = min(bytes, data_len); @@ -940,9 +947,7 @@ pscsi_map_sg(struct se_cmd *cmd, struct scatterlist *sgl, u32 sgl_nents, bio = NULL; } - len -= bytes; data_len -= bytes; - off = 0; } } diff --git a/drivers/target/target_core_sbc.c b/drivers/target/target_core_sbc.c index 290230de2c53..60d4b5185f32 100644 --- a/drivers/target/target_core_sbc.c +++ b/drivers/target/target_core_sbc.c @@ -464,8 +464,11 @@ sbc_parse_cdb(struct se_cmd *cmd, struct sbc_ops *ops) break; case SYNCHRONIZE_CACHE: case SYNCHRONIZE_CACHE_16: - if (!ops->execute_sync_cache) - return TCM_UNSUPPORTED_SCSI_OPCODE; + if (!ops->execute_sync_cache) { + size = 0; + cmd->execute_cmd = sbc_emulate_noop; + break; + } /* * Extract LBA and range to be flushed for emulated SYNCHRONIZE_CACHE diff --git a/drivers/target/target_core_tpg.c b/drivers/target/target_core_tpg.c index 9169d6a5d7e4..aac9d2727e3c 100644 --- a/drivers/target/target_core_tpg.c +++ b/drivers/target/target_core_tpg.c @@ -711,7 +711,8 @@ int core_tpg_register( if (se_tpg->se_tpg_type == TRANSPORT_TPG_TYPE_NORMAL) { if (core_tpg_setup_virtual_lun0(se_tpg) < 0) { - kfree(se_tpg); + array_free(se_tpg->tpg_lun_list, + TRANSPORT_MAX_LUNS_PER_TPG); return -ENOMEM; } } diff --git a/drivers/target/target_core_transport.c b/drivers/target/target_core_transport.c index 2030b608136d..3243ea790eab 100644 --- a/drivers/target/target_core_transport.c +++ b/drivers/target/target_core_transport.c @@ -1139,8 +1139,10 @@ target_setup_cmd_from_cdb(struct se_cmd *cmd, unsigned char *cdb) return ret; ret = target_check_reservation(cmd); - if (ret) + if (ret) { + cmd->scsi_status = SAM_STAT_RESERVATION_CONFLICT; return ret; + } ret = dev->transport->parse_cdb(cmd); if (ret) diff --git a/drivers/thermal/dove_thermal.c b/drivers/thermal/dove_thermal.c index 7b0bfa0e7a9c..3078c403b42d 100644 --- a/drivers/thermal/dove_thermal.c +++ b/drivers/thermal/dove_thermal.c @@ -143,22 +143,18 @@ static int dove_thermal_probe(struct platform_device *pdev) if (!priv) return -ENOMEM; - priv->sensor = devm_request_and_ioremap(&pdev->dev, res); - if (!priv->sensor) { - dev_err(&pdev->dev, "Failed to request_ioremap memory\n"); - return -EADDRNOTAVAIL; - } + priv->sensor = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(priv->sensor)) + return PTR_ERR(priv->sensor); res = platform_get_resource(pdev, IORESOURCE_MEM, 1); if (!res) { dev_err(&pdev->dev, "Failed to get platform resource\n"); return -ENODEV; } - priv->control = devm_request_and_ioremap(&pdev->dev, res); - if (!priv->control) { - dev_err(&pdev->dev, "Failed to request_ioremap memory\n"); - return -EADDRNOTAVAIL; - } + priv->control = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(priv->control)) + return PTR_ERR(priv->control); ret = dove_init_sensor(priv); if (ret) { diff --git a/drivers/thermal/exynos_thermal.c b/drivers/thermal/exynos_thermal.c index e04ebd8671ac..46568c078dee 100644 --- a/drivers/thermal/exynos_thermal.c +++ b/drivers/thermal/exynos_thermal.c @@ -476,7 +476,7 @@ static int exynos_register_thermal(struct thermal_sensor_conf *sensor_conf) if (IS_ERR(th_zone->therm_dev)) { pr_err("Failed to register thermal zone device\n"); - ret = -EINVAL; + ret = PTR_ERR(th_zone->therm_dev); goto err_unregister; } th_zone->mode = THERMAL_DEVICE_ENABLED; diff --git a/drivers/thermal/kirkwood_thermal.c b/drivers/thermal/kirkwood_thermal.c index 65cb4f09e8f6..e5500edb5285 100644 --- a/drivers/thermal/kirkwood_thermal.c +++ b/drivers/thermal/kirkwood_thermal.c @@ -85,11 +85,9 @@ static int kirkwood_thermal_probe(struct platform_device *pdev) if (!priv) return -ENOMEM; - priv->sensor = devm_request_and_ioremap(&pdev->dev, res); - if (!priv->sensor) { - dev_err(&pdev->dev, "Failed to request_ioremap memory\n"); - return -EADDRNOTAVAIL; - } + priv->sensor = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(priv->sensor)) + return PTR_ERR(priv->sensor); thermal = thermal_zone_device_register("kirkwood_thermal", 0, 0, priv, &ops, NULL, 0, 0); diff --git a/drivers/thermal/rcar_thermal.c b/drivers/thermal/rcar_thermal.c index 28f091994013..2cc5b6115e3e 100644 --- a/drivers/thermal/rcar_thermal.c +++ b/drivers/thermal/rcar_thermal.c @@ -145,6 +145,7 @@ static int rcar_thermal_update_temp(struct rcar_thermal_priv *priv) struct device *dev = rcar_priv_to_dev(priv); int i; int ctemp, old, new; + int ret = -EINVAL; mutex_lock(&priv->lock); @@ -174,7 +175,7 @@ static int rcar_thermal_update_temp(struct rcar_thermal_priv *priv) if (!ctemp) { dev_err(dev, "thermal sensor was broken\n"); - return -EINVAL; + goto err_out_unlock; } /* @@ -192,10 +193,10 @@ static int rcar_thermal_update_temp(struct rcar_thermal_priv *priv) dev_dbg(dev, "thermal%d %d -> %d\n", priv->id, priv->ctemp, ctemp); priv->ctemp = ctemp; - + ret = 0; +err_out_unlock: mutex_unlock(&priv->lock); - - return 0; + return ret; } static int rcar_thermal_get_temp(struct thermal_zone_device *zone, @@ -363,6 +364,7 @@ static int rcar_thermal_probe(struct platform_device *pdev) struct resource *res, *irq; int mres = 0; int i; + int ret = -ENODEV; int idle = IDLE_INTERVAL; common = devm_kzalloc(dev, sizeof(*common), GFP_KERNEL); @@ -399,11 +401,9 @@ static int rcar_thermal_probe(struct platform_device *pdev) /* * rcar_has_irq_support() will be enabled */ - common->base = devm_request_and_ioremap(dev, res); - if (!common->base) { - dev_err(dev, "Unable to ioremap thermal register\n"); - return -ENOMEM; - } + common->base = devm_ioremap_resource(dev, res); + if (IS_ERR(common->base)) + return PTR_ERR(common->base); /* enable temperature comparation */ rcar_thermal_common_write(common, ENR, 0x00030303); @@ -422,11 +422,9 @@ static int rcar_thermal_probe(struct platform_device *pdev) return -ENOMEM; } - priv->base = devm_request_and_ioremap(dev, res); - if (!priv->base) { - dev_err(dev, "Unable to ioremap priv register\n"); - return -ENOMEM; - } + priv->base = devm_ioremap_resource(dev, res); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); priv->common = common; priv->id = i; @@ -441,6 +439,7 @@ static int rcar_thermal_probe(struct platform_device *pdev) idle); if (IS_ERR(priv->zone)) { dev_err(dev, "can't register thermal zone\n"); + ret = PTR_ERR(priv->zone); goto error_unregister; } @@ -460,7 +459,7 @@ error_unregister: rcar_thermal_for_each_priv(priv, common) thermal_zone_device_unregister(priv->zone); - return -ENODEV; + return ret; } static int rcar_thermal_remove(struct platform_device *pdev) diff --git a/drivers/tty/serial/8250/8250.c b/drivers/tty/serial/8250/8250_core.c index 0efc815a4968..35f9c96aada9 100644 --- a/drivers/tty/serial/8250/8250.c +++ b/drivers/tty/serial/8250/8250_core.c @@ -301,7 +301,28 @@ static const struct serial8250_config uart_config[] = { }, [PORT_8250_CIR] = { .name = "CIR port" - } + }, + [PORT_ALTR_16550_F32] = { + .name = "Altera 16550 FIFO32", + .fifo_size = 32, + .tx_loadsz = 32, + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, + .flags = UART_CAP_FIFO | UART_CAP_AFE, + }, + [PORT_ALTR_16550_F64] = { + .name = "Altera 16550 FIFO64", + .fifo_size = 64, + .tx_loadsz = 64, + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, + .flags = UART_CAP_FIFO | UART_CAP_AFE, + }, + [PORT_ALTR_16550_F128] = { + .name = "Altera 16550 FIFO128", + .fifo_size = 128, + .tx_loadsz = 128, + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, + .flags = UART_CAP_FIFO | UART_CAP_AFE, + }, }; /* Uart divisor latch read */ @@ -3396,3 +3417,34 @@ module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444); MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA"); #endif MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR); + +#ifdef CONFIG_SERIAL_8250_DEPRECATED_OPTIONS +#ifndef MODULE +/* This module was renamed to 8250_core in 3.7. Keep the old "8250" name + * working as well for the module options so we don't break people. We + * need to keep the names identical and the convenient macros will happily + * refuse to let us do that by failing the build with redefinition errors + * of global variables. So we stick them inside a dummy function to avoid + * those conflicts. The options still get parsed, and the redefined + * MODULE_PARAM_PREFIX lets us keep the "8250." syntax alive. + * + * This is hacky. I'm sorry. + */ +static void __used s8250_options(void) +{ +#undef MODULE_PARAM_PREFIX +#define MODULE_PARAM_PREFIX "8250_core." + + module_param_cb(share_irqs, ¶m_ops_uint, &share_irqs, 0644); + module_param_cb(nr_uarts, ¶m_ops_uint, &nr_uarts, 0644); + module_param_cb(skip_txen_test, ¶m_ops_uint, &skip_txen_test, 0644); +#ifdef CONFIG_SERIAL_8250_RSA + __module_param_call(MODULE_PARAM_PREFIX, probe_rsa, + ¶m_array_ops, .arr = &__param_arr_probe_rsa, + 0444, -1); +#endif +} +#else +MODULE_ALIAS("8250_core"); +#endif +#endif diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c index 791c5a77ec61..26e3a97ab157 100644 --- a/drivers/tty/serial/8250/8250_pci.c +++ b/drivers/tty/serial/8250/8250_pci.c @@ -1554,6 +1554,7 @@ pci_wch_ch353_setup(struct serial_private *priv, #define PCI_DEVICE_ID_PLX_CRONYX_OMEGA 0xc001 #define PCI_DEVICE_ID_INTEL_PATSBURG_KT 0x1d3d #define PCI_VENDOR_ID_WCH 0x4348 +#define PCI_DEVICE_ID_WCH_CH352_2S 0x3253 #define PCI_DEVICE_ID_WCH_CH353_4S 0x3453 #define PCI_DEVICE_ID_WCH_CH353_2S1PF 0x5046 #define PCI_DEVICE_ID_WCH_CH353_2S1P 0x7053 @@ -1571,6 +1572,7 @@ pci_wch_ch353_setup(struct serial_private *priv, /* Unknown vendors/cards - this should not be in linux/pci_ids.h */ #define PCI_SUBDEVICE_ID_UNKNOWN_0x1584 0x1584 +#define PCI_SUBDEVICE_ID_UNKNOWN_0x1588 0x1588 /* * Master list of serial port init/setup/exit quirks. @@ -1852,15 +1854,6 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = { }, { .vendor = PCI_VENDOR_ID_PLX, - .device = PCI_DEVICE_ID_PLX_9050, - .subvendor = PCI_VENDOR_ID_PLX, - .subdevice = PCI_SUBDEVICE_ID_UNKNOWN_0x1584, - .init = pci_plx9050_init, - .setup = pci_default_setup, - .exit = pci_plx9050_exit, - }, - { - .vendor = PCI_VENDOR_ID_PLX, .device = PCI_DEVICE_ID_PLX_ROMULUS, .subvendor = PCI_VENDOR_ID_PLX, .subdevice = PCI_DEVICE_ID_PLX_ROMULUS, @@ -2180,6 +2173,14 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = { .subdevice = PCI_ANY_ID, .setup = pci_wch_ch353_setup, }, + /* WCH CH352 2S card (16550 clone) */ + { + .vendor = PCI_VENDOR_ID_WCH, + .device = PCI_DEVICE_ID_WCH_CH352_2S, + .subvendor = PCI_ANY_ID, + .subdevice = PCI_ANY_ID, + .setup = pci_wch_ch353_setup, + }, /* * ASIX devices with FIFO bug */ @@ -3733,7 +3734,12 @@ static struct pci_device_id serial_pci_tbl[] = { { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_PLX, PCI_SUBDEVICE_ID_UNKNOWN_0x1584, 0, 0, - pbn_b0_4_115200 }, + pbn_b2_4_115200 }, + /* Unknown card - subdevice 0x1588 */ + { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, + PCI_VENDOR_ID_PLX, + PCI_SUBDEVICE_ID_UNKNOWN_0x1588, 0, 0, + pbn_b2_8_115200 }, { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_SUBVENDOR_ID_KEYSPAN, PCI_SUBDEVICE_ID_KEYSPAN_SX2, 0, 0, @@ -4791,6 +4797,10 @@ static struct pci_device_id serial_pci_tbl[] = { PCI_VENDOR_ID_IBM, 0x0299, 0, 0, pbn_b0_bt_2_115200 }, + { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9835, + 0x1000, 0x0012, + 0, 0, pbn_b0_bt_2_115200 }, + { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9901, 0xA000, 0x1000, 0, 0, pbn_b0_1_115200 }, @@ -4869,6 +4879,10 @@ static struct pci_device_id serial_pci_tbl[] = { PCI_ANY_ID, PCI_ANY_ID, 0, 0, pbn_b0_bt_2_115200 }, + { PCI_VENDOR_ID_WCH, PCI_DEVICE_ID_WCH_CH352_2S, + PCI_ANY_ID, PCI_ANY_ID, + 0, 0, pbn_b0_bt_2_115200 }, + /* * Commtech, Inc. Fastcom adapters */ diff --git a/drivers/tty/serial/8250/8250_pnp.c b/drivers/tty/serial/8250/8250_pnp.c index 35d9ab95c5cb..b3455a970a1d 100644 --- a/drivers/tty/serial/8250/8250_pnp.c +++ b/drivers/tty/serial/8250/8250_pnp.c @@ -429,6 +429,7 @@ serial_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *dev_id) { struct uart_8250_port uart; int ret, line, flags = dev_id->driver_data; + struct resource *res = NULL; if (flags & UNKNOWN_DEV) { ret = serial_pnp_guess_board(dev); @@ -439,11 +440,12 @@ serial_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *dev_id) memset(&uart, 0, sizeof(uart)); if (pnp_irq_valid(dev, 0)) uart.port.irq = pnp_irq(dev, 0); - if ((flags & CIR_PORT) && pnp_port_valid(dev, 2)) { - uart.port.iobase = pnp_port_start(dev, 2); - uart.port.iotype = UPIO_PORT; - } else if (pnp_port_valid(dev, 0)) { - uart.port.iobase = pnp_port_start(dev, 0); + if ((flags & CIR_PORT) && pnp_port_valid(dev, 2)) + res = pnp_get_resource(dev, IORESOURCE_IO, 2); + else if (pnp_port_valid(dev, 0)) + res = pnp_get_resource(dev, IORESOURCE_IO, 0); + if (pnp_resource_enabled(res)) { + uart.port.iobase = res->start; uart.port.iotype = UPIO_PORT; } else if (pnp_mem_valid(dev, 0)) { uart.port.mapbase = pnp_mem_start(dev, 0); diff --git a/drivers/tty/serial/8250/Kconfig b/drivers/tty/serial/8250/Kconfig index 2ef9537bcb2c..80fe91e64a52 100644 --- a/drivers/tty/serial/8250/Kconfig +++ b/drivers/tty/serial/8250/Kconfig @@ -33,6 +33,23 @@ config SERIAL_8250 Most people will say Y or M here, so that they can use serial mice, modems and similar devices connecting to the standard serial ports. +config SERIAL_8250_DEPRECATED_OPTIONS + bool "Support 8250_core.* kernel options (DEPRECATED)" + depends on SERIAL_8250 + default y + ---help--- + In 3.7 we renamed 8250 to 8250_core by mistake, so now we have to + accept kernel parameters in both forms like 8250_core.nr_uarts=4 and + 8250.nr_uarts=4. We now renamed the module back to 8250, but if + anybody noticed in 3.7 and changed their userspace we still have to + keep the 8350_core.* options around until they revert the changes + they already did. + + If 8250 is built as a module, this adds 8250_core alias instead. + + If you did not notice yet and/or you have userspace from pre-3.7, it + is safe (and recommended) to say N here. + config SERIAL_8250_PNP bool "8250/16550 PNP device support" if EXPERT depends on SERIAL_8250 && PNP diff --git a/drivers/tty/serial/8250/Makefile b/drivers/tty/serial/8250/Makefile index a23838a4d535..36d68d054307 100644 --- a/drivers/tty/serial/8250/Makefile +++ b/drivers/tty/serial/8250/Makefile @@ -2,10 +2,10 @@ # Makefile for the 8250 serial device drivers. # -obj-$(CONFIG_SERIAL_8250) += 8250_core.o -8250_core-y := 8250.o -8250_core-$(CONFIG_SERIAL_8250_PNP) += 8250_pnp.o -8250_core-$(CONFIG_SERIAL_8250_DMA) += 8250_dma.o +obj-$(CONFIG_SERIAL_8250) += 8250.o +8250-y := 8250_core.o +8250-$(CONFIG_SERIAL_8250_PNP) += 8250_pnp.o +8250-$(CONFIG_SERIAL_8250_DMA) += 8250_dma.o obj-$(CONFIG_SERIAL_8250_GSC) += 8250_gsc.o obj-$(CONFIG_SERIAL_8250_PCI) += 8250_pci.o obj-$(CONFIG_SERIAL_8250_HP300) += 8250_hp300.o diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index cf9210db9fa9..7e7006fd404e 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig @@ -211,14 +211,14 @@ config SERIAL_SAMSUNG config SERIAL_SAMSUNG_UARTS_4 bool depends on PLAT_SAMSUNG - default y if !(CPU_S3C2410 || SERIAL_S3C2412 || CPU_S3C2440 || CPU_S3C2442) + default y if !(CPU_S3C2410 || CPU_S3C2412 || CPU_S3C2440 || CPU_S3C2442) help Internal node for the common case of 4 Samsung compatible UARTs config SERIAL_SAMSUNG_UARTS int depends on PLAT_SAMSUNG - default 6 if ARCH_S5P6450 + default 6 if CPU_S5P6450 default 4 if SERIAL_SAMSUNG_UARTS_4 || CPU_S3C2416 default 3 help diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c index d4a7c241b751..3467462869ce 100644 --- a/drivers/tty/serial/atmel_serial.c +++ b/drivers/tty/serial/atmel_serial.c @@ -158,7 +158,7 @@ struct atmel_uart_port { }; static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART]; -static unsigned long atmel_ports_in_use; +static DECLARE_BITMAP(atmel_ports_in_use, ATMEL_MAX_UART); #ifdef SUPPORT_SYSRQ static struct console atmel_console; @@ -1769,15 +1769,14 @@ static int atmel_serial_probe(struct platform_device *pdev) if (ret < 0) /* port id not found in platform data nor device-tree aliases: * auto-enumerate it */ - ret = find_first_zero_bit(&atmel_ports_in_use, - sizeof(atmel_ports_in_use)); + ret = find_first_zero_bit(atmel_ports_in_use, ATMEL_MAX_UART); - if (ret > ATMEL_MAX_UART) { + if (ret >= ATMEL_MAX_UART) { ret = -ENODEV; goto err; } - if (test_and_set_bit(ret, &atmel_ports_in_use)) { + if (test_and_set_bit(ret, atmel_ports_in_use)) { /* port already in use */ ret = -EBUSY; goto err; @@ -1857,7 +1856,7 @@ static int atmel_serial_remove(struct platform_device *pdev) /* "port" is allocated statically, so we shouldn't free it */ - clear_bit(port->line, &atmel_ports_in_use); + clear_bit(port->line, atmel_ports_in_use); clk_put(atmel_port->clk); diff --git a/drivers/tty/serial/bcm63xx_uart.c b/drivers/tty/serial/bcm63xx_uart.c index 719594e5fc21..52a3ecd40421 100644 --- a/drivers/tty/serial/bcm63xx_uart.c +++ b/drivers/tty/serial/bcm63xx_uart.c @@ -235,7 +235,7 @@ static const char *bcm_uart_type(struct uart_port *port) */ static void bcm_uart_do_rx(struct uart_port *port) { - struct tty_port *port = &port->state->port; + struct tty_port *tty_port = &port->state->port; unsigned int max_count; /* limit number of char read in interrupt, should not be @@ -260,7 +260,7 @@ static void bcm_uart_do_rx(struct uart_port *port) bcm_uart_writel(port, val, UART_CTL_REG); port->icount.overrun++; - tty_insert_flip_char(port, 0, TTY_OVERRUN); + tty_insert_flip_char(tty_port, 0, TTY_OVERRUN); } if (!(iestat & UART_IR_STAT(UART_IR_RXNOTEMPTY))) @@ -299,11 +299,11 @@ static void bcm_uart_do_rx(struct uart_port *port) if ((cstat & port->ignore_status_mask) == 0) - tty_insert_flip_char(port, c, flag); + tty_insert_flip_char(tty_port, c, flag); } while (--max_count); - tty_flip_buffer_push(port); + tty_flip_buffer_push(tty_port); } /* diff --git a/drivers/tty/serial/mpc52xx_uart.c b/drivers/tty/serial/mpc52xx_uart.c index c0e1fad51be7..018bad922554 100644 --- a/drivers/tty/serial/mpc52xx_uart.c +++ b/drivers/tty/serial/mpc52xx_uart.c @@ -550,7 +550,7 @@ static int mpc512x_psc_clock(struct uart_port *port, int enable) return 0; psc_num = (port->mapbase & 0xf00) >> 8; - snprintf(clk_name, sizeof(clk_name), "psc%d_clk", psc_num); + snprintf(clk_name, sizeof(clk_name), "psc%d_mclk", psc_num); psc_clk = clk_get(port->dev, clk_name); if (IS_ERR(psc_clk)) { dev_err(port->dev, "Failed to get PSC clock entry!\n"); diff --git a/drivers/tty/serial/of_serial.c b/drivers/tty/serial/of_serial.c index d5874605682b..b025d5438275 100644 --- a/drivers/tty/serial/of_serial.c +++ b/drivers/tty/serial/of_serial.c @@ -241,6 +241,12 @@ static struct of_device_id of_platform_serial_table[] = { { .compatible = "ns16850", .data = (void *)PORT_16850, }, { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, }, { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, }, + { .compatible = "altr,16550-FIFO32", + .data = (void *)PORT_ALTR_16550_F32, }, + { .compatible = "altr,16550-FIFO64", + .data = (void *)PORT_ALTR_16550_F64, }, + { .compatible = "altr,16550-FIFO128", + .data = (void *)PORT_ALTR_16550_F128, }, #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL { .compatible = "ibm,qpace-nwp-serial", .data = (void *)PORT_NWPSERIAL, }, diff --git a/drivers/tty/serial/sunsu.c b/drivers/tty/serial/sunsu.c index e343d6670854..451687cb9685 100644 --- a/drivers/tty/serial/sunsu.c +++ b/drivers/tty/serial/sunsu.c @@ -968,6 +968,7 @@ static struct uart_ops sunsu_pops = { #define UART_NR 4 static struct uart_sunsu_port sunsu_ports[UART_NR]; +static int nr_inst; /* Number of already registered ports */ #ifdef CONFIG_SERIO @@ -1337,13 +1338,8 @@ static int __init sunsu_console_setup(struct console *co, char *options) printk("Console: ttyS%d (SU)\n", (sunsu_reg.minor - 64) + co->index); - /* - * Check whether an invalid uart number has been specified, and - * if so, search for the first available port that does have - * console support. - */ - if (co->index >= UART_NR) - co->index = 0; + if (co->index > nr_inst) + return -ENODEV; port = &sunsu_ports[co->index].port; /* @@ -1408,7 +1404,6 @@ static enum su_type su_get_type(struct device_node *dp) static int su_probe(struct platform_device *op) { - static int inst; struct device_node *dp = op->dev.of_node; struct uart_sunsu_port *up; struct resource *rp; @@ -1418,16 +1413,16 @@ static int su_probe(struct platform_device *op) type = su_get_type(dp); if (type == SU_PORT_PORT) { - if (inst >= UART_NR) + if (nr_inst >= UART_NR) return -EINVAL; - up = &sunsu_ports[inst]; + up = &sunsu_ports[nr_inst]; } else { up = kzalloc(sizeof(*up), GFP_KERNEL); if (!up) return -ENOMEM; } - up->port.line = inst; + up->port.line = nr_inst; spin_lock_init(&up->port.lock); @@ -1461,6 +1456,8 @@ static int su_probe(struct platform_device *op) } dev_set_drvdata(&op->dev, up); + nr_inst++; + return 0; } @@ -1488,7 +1485,7 @@ static int su_probe(struct platform_device *op) dev_set_drvdata(&op->dev, up); - inst++; + nr_inst++; return 0; diff --git a/drivers/tty/serial/vt8500_serial.c b/drivers/tty/serial/vt8500_serial.c index a3f9dd5c9dff..705240e6c4ec 100644 --- a/drivers/tty/serial/vt8500_serial.c +++ b/drivers/tty/serial/vt8500_serial.c @@ -611,14 +611,7 @@ static int vt8500_serial_probe(struct platform_device *pdev) vt8500_port->uart.dev = &pdev->dev; vt8500_port->uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF; - vt8500_port->clk = of_clk_get(pdev->dev.of_node, 0); - if (!IS_ERR(vt8500_port->clk)) { - vt8500_port->uart.uartclk = clk_get_rate(vt8500_port->clk); - } else { - /* use the default of 24Mhz if not specified and warn */ - pr_warn("%s: serial clock source not specified\n", __func__); - vt8500_port->uart.uartclk = 24000000; - } + vt8500_port->uart.uartclk = clk_get_rate(vt8500_port->clk); snprintf(vt8500_port->name, sizeof(vt8500_port->name), "VT8500 UART%d", pdev->id); diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c index ba451c7209fc..f36bbba1ac8b 100644 --- a/drivers/tty/serial/xilinx_uartps.c +++ b/drivers/tty/serial/xilinx_uartps.c @@ -578,6 +578,8 @@ static int xuartps_startup(struct uart_port *port) /* Receive Timeout register is enabled with value of 10 */ xuartps_writel(10, XUARTPS_RXTOUT_OFFSET); + /* Clear out any pending interrupts before enabling them */ + xuartps_writel(xuartps_readl(XUARTPS_ISR_OFFSET), XUARTPS_ISR_OFFSET); /* Set the Interrupt Registers with desired interrupts */ xuartps_writel(XUARTPS_IXR_TXEMPTY | XUARTPS_IXR_PARITY | diff --git a/drivers/tty/tty_buffer.c b/drivers/tty/tty_buffer.c index bb119934e76c..578aa7594b11 100644 --- a/drivers/tty/tty_buffer.c +++ b/drivers/tty/tty_buffer.c @@ -425,7 +425,7 @@ static void flush_to_ldisc(struct work_struct *work) struct tty_ldisc *disc; tty = port->itty; - if (WARN_RATELIMIT(tty == NULL, "tty is NULL\n")) + if (tty == NULL) return; disc = tty_ldisc_ref(tty); diff --git a/drivers/tty/vt/vc_screen.c b/drivers/tty/vt/vc_screen.c index e4ca345873c3..d7799deacb21 100644 --- a/drivers/tty/vt/vc_screen.c +++ b/drivers/tty/vt/vc_screen.c @@ -93,7 +93,7 @@ vcs_poll_data_free(struct vcs_poll_data *poll) static struct vcs_poll_data * vcs_poll_data_get(struct file *file) { - struct vcs_poll_data *poll = file->private_data; + struct vcs_poll_data *poll = file->private_data, *kill = NULL; if (poll) return poll; @@ -122,10 +122,12 @@ vcs_poll_data_get(struct file *file) file->private_data = poll; } else { /* someone else raced ahead of us */ - vcs_poll_data_free(poll); + kill = poll; poll = file->private_data; } spin_unlock(&file->f_lock); + if (kill) + vcs_poll_data_free(kill); return poll; } diff --git a/drivers/usb/Makefile b/drivers/usb/Makefile index f5ed3d75fa5a..8f5ebced5df0 100644 --- a/drivers/usb/Makefile +++ b/drivers/usb/Makefile @@ -46,7 +46,7 @@ obj-$(CONFIG_USB_MICROTEK) += image/ obj-$(CONFIG_USB_SERIAL) += serial/ obj-$(CONFIG_USB) += misc/ -obj-$(CONFIG_USB_COMMON) += phy/ +obj-$(CONFIG_USB_OTG_UTILS) += phy/ obj-$(CONFIG_EARLY_PRINTK_DBGP) += early/ obj-$(CONFIG_USB_ATM) += atm/ diff --git a/drivers/usb/c67x00/c67x00-sched.c b/drivers/usb/c67x00/c67x00-sched.c index a03fbc15fa9c..aa491627a45b 100644 --- a/drivers/usb/c67x00/c67x00-sched.c +++ b/drivers/usb/c67x00/c67x00-sched.c @@ -100,7 +100,7 @@ struct c67x00_urb_priv { #define TD_PIDEP_OFFSET 0x04 #define TD_PIDEPMASK_PID 0xF0 #define TD_PIDEPMASK_EP 0x0F -#define TD_PORTLENMASK_DL 0x02FF +#define TD_PORTLENMASK_DL 0x03FF #define TD_PORTLENMASK_PN 0xC000 #define TD_STATUS_OFFSET 0x07 @@ -590,7 +590,7 @@ static int c67x00_create_td(struct c67x00_hcd *c67x00, struct urb *urb, { struct c67x00_td *td; struct c67x00_urb_priv *urbp = urb->hcpriv; - const __u8 active_flag = 1, retry_cnt = 1; + const __u8 active_flag = 1, retry_cnt = 3; __u8 cmd = 0; int tt = 0; diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c index 2f45bba8561d..f64fbea1cf20 100644 --- a/drivers/usb/chipidea/udc.c +++ b/drivers/usb/chipidea/udc.c @@ -1767,7 +1767,7 @@ static int udc_start(struct ci13xxx *ci) goto put_transceiver; } - retval = dbg_create_files(&ci->gadget.dev); + retval = dbg_create_files(ci->dev); if (retval) goto unreg_device; @@ -1796,7 +1796,7 @@ remove_trans: dev_err(dev, "error = %i\n", retval); remove_dbg: - dbg_remove_files(&ci->gadget.dev); + dbg_remove_files(ci->dev); unreg_device: device_unregister(&ci->gadget.dev); put_transceiver: @@ -1836,7 +1836,7 @@ static void udc_stop(struct ci13xxx *ci) if (ci->global_phy) usb_put_phy(ci->transceiver); } - dbg_remove_files(&ci->gadget.dev); + dbg_remove_files(ci->dev); device_unregister(&ci->gadget.dev); /* my kobject is dynamic, I swear! */ memset(&ci->gadget, 0, sizeof(ci->gadget)); diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c index 8ac25adf31b4..387dc6c8ad25 100644 --- a/drivers/usb/class/cdc-acm.c +++ b/drivers/usb/class/cdc-acm.c @@ -593,7 +593,6 @@ static void acm_port_destruct(struct tty_port *port) dev_dbg(&acm->control->dev, "%s\n", __func__); - tty_unregister_device(acm_tty_driver, acm->minor); acm_release_minor(acm); usb_put_intf(acm->control); kfree(acm->country_codes); @@ -977,6 +976,8 @@ static int acm_probe(struct usb_interface *intf, int num_rx_buf; int i; int combined_interfaces = 0; + struct device *tty_dev; + int rv = -ENOMEM; /* normal quirks */ quirks = (unsigned long)id->driver_info; @@ -1339,11 +1340,24 @@ skip_countries: usb_set_intfdata(data_interface, acm); usb_get_intf(control_interface); - tty_port_register_device(&acm->port, acm_tty_driver, minor, + tty_dev = tty_port_register_device(&acm->port, acm_tty_driver, minor, &control_interface->dev); + if (IS_ERR(tty_dev)) { + rv = PTR_ERR(tty_dev); + goto alloc_fail8; + } return 0; +alloc_fail8: + if (acm->country_codes) { + device_remove_file(&acm->control->dev, + &dev_attr_wCountryCodes); + device_remove_file(&acm->control->dev, + &dev_attr_iCountryCodeRelDate); + } + device_remove_file(&acm->control->dev, &dev_attr_bmCapabilities); alloc_fail7: + usb_set_intfdata(intf, NULL); for (i = 0; i < ACM_NW; i++) usb_free_urb(acm->wb[i].urb); alloc_fail6: @@ -1359,7 +1373,7 @@ alloc_fail2: acm_release_minor(acm); kfree(acm); alloc_fail: - return -ENOMEM; + return rv; } static void stop_data_traffic(struct acm *acm) @@ -1411,6 +1425,8 @@ static void acm_disconnect(struct usb_interface *intf) stop_data_traffic(acm); + tty_unregister_device(acm_tty_driver, acm->minor); + usb_free_urb(acm->ctrlurb); for (i = 0; i < ACM_NW; i++) usb_free_urb(acm->wb[i].urb); diff --git a/drivers/usb/class/cdc-wdm.c b/drivers/usb/class/cdc-wdm.c index 5f0cb417b736..122d056d96d5 100644 --- a/drivers/usb/class/cdc-wdm.c +++ b/drivers/usb/class/cdc-wdm.c @@ -56,6 +56,7 @@ MODULE_DEVICE_TABLE (usb, wdm_ids); #define WDM_RESPONDING 7 #define WDM_SUSPENDING 8 #define WDM_RESETTING 9 +#define WDM_OVERFLOW 10 #define WDM_MAX 16 @@ -155,6 +156,7 @@ static void wdm_in_callback(struct urb *urb) { struct wdm_device *desc = urb->context; int status = urb->status; + int length = urb->actual_length; spin_lock(&desc->iuspin); clear_bit(WDM_RESPONDING, &desc->flags); @@ -185,9 +187,17 @@ static void wdm_in_callback(struct urb *urb) } desc->rerr = status; - desc->reslength = urb->actual_length; - memmove(desc->ubuf + desc->length, desc->inbuf, desc->reslength); - desc->length += desc->reslength; + if (length + desc->length > desc->wMaxCommand) { + /* The buffer would overflow */ + set_bit(WDM_OVERFLOW, &desc->flags); + } else { + /* we may already be in overflow */ + if (!test_bit(WDM_OVERFLOW, &desc->flags)) { + memmove(desc->ubuf + desc->length, desc->inbuf, length); + desc->length += length; + desc->reslength = length; + } + } skip_error: wake_up(&desc->wait); @@ -435,6 +445,11 @@ retry: rv = -ENODEV; goto err; } + if (test_bit(WDM_OVERFLOW, &desc->flags)) { + clear_bit(WDM_OVERFLOW, &desc->flags); + rv = -ENOBUFS; + goto err; + } i++; if (file->f_flags & O_NONBLOCK) { if (!test_bit(WDM_READ, &desc->flags)) { @@ -478,6 +493,7 @@ retry: spin_unlock_irq(&desc->iuspin); goto retry; } + if (!desc->reslength) { /* zero length read */ dev_dbg(&desc->intf->dev, "%s: zero length - clearing WDM_READ\n", __func__); clear_bit(WDM_READ, &desc->flags); @@ -1004,6 +1020,7 @@ static int wdm_post_reset(struct usb_interface *intf) struct wdm_device *desc = wdm_find_device(intf); int rv; + clear_bit(WDM_OVERFLOW, &desc->flags); clear_bit(WDM_RESETTING, &desc->flags); rv = recover_from_urb_loss(desc); mutex_unlock(&desc->wlock); diff --git a/drivers/usb/core/hcd-pci.c b/drivers/usb/core/hcd-pci.c index 622b4a48e732..2b487d4797bd 100644 --- a/drivers/usb/core/hcd-pci.c +++ b/drivers/usb/core/hcd-pci.c @@ -173,6 +173,7 @@ int usb_hcd_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) struct hc_driver *driver; struct usb_hcd *hcd; int retval; + int hcd_irq = 0; if (usb_disabled()) return -ENODEV; @@ -187,15 +188,19 @@ int usb_hcd_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) return -ENODEV; dev->current_state = PCI_D0; - /* The xHCI driver supports MSI and MSI-X, - * so don't fail if the BIOS doesn't provide a legacy IRQ. + /* + * The xHCI driver has its own irq management + * make sure irq setup is not touched for xhci in generic hcd code */ - if (!dev->irq && (driver->flags & HCD_MASK) != HCD_USB3) { - dev_err(&dev->dev, - "Found HC with no IRQ. Check BIOS/PCI %s setup!\n", - pci_name(dev)); - retval = -ENODEV; - goto disable_pci; + if ((driver->flags & HCD_MASK) != HCD_USB3) { + if (!dev->irq) { + dev_err(&dev->dev, + "Found HC with no IRQ. Check BIOS/PCI %s setup!\n", + pci_name(dev)); + retval = -ENODEV; + goto disable_pci; + } + hcd_irq = dev->irq; } hcd = usb_create_hcd(driver, &dev->dev, pci_name(dev)); @@ -245,7 +250,7 @@ int usb_hcd_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) pci_set_master(dev); - retval = usb_add_hcd(hcd, dev->irq, IRQF_SHARED); + retval = usb_add_hcd(hcd, hcd_irq, IRQF_SHARED); if (retval != 0) goto unmap_registers; set_hs_companion(dev, hcd); diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c index 99b34a30354f..f9ec44cbb82f 100644 --- a/drivers/usb/core/hcd.c +++ b/drivers/usb/core/hcd.c @@ -2412,6 +2412,14 @@ int usb_hcd_is_primary_hcd(struct usb_hcd *hcd) } EXPORT_SYMBOL_GPL(usb_hcd_is_primary_hcd); +int usb_hcd_find_raw_port_number(struct usb_hcd *hcd, int port1) +{ + if (!hcd->driver->find_raw_port_number) + return port1; + + return hcd->driver->find_raw_port_number(hcd, port1); +} + static int usb_hcd_request_irqs(struct usb_hcd *hcd, unsigned int irqnum, unsigned long irqflags) { diff --git a/drivers/usb/core/usb-acpi.c b/drivers/usb/core/usb-acpi.c index b6f4bad3f756..255c14464bf2 100644 --- a/drivers/usb/core/usb-acpi.c +++ b/drivers/usb/core/usb-acpi.c @@ -15,6 +15,7 @@ #include <linux/kernel.h> #include <linux/acpi.h> #include <linux/pci.h> +#include <linux/usb/hcd.h> #include <acpi/acpi_bus.h> #include "usb.h" @@ -188,8 +189,13 @@ static int usb_acpi_find_device(struct device *dev, acpi_handle *handle) * connected to. */ if (!udev->parent) { - *handle = acpi_get_child(DEVICE_ACPI_HANDLE(&udev->dev), + struct usb_hcd *hcd = bus_to_hcd(udev->bus); + int raw_port_num; + + raw_port_num = usb_hcd_find_raw_port_number(hcd, port_num); + *handle = acpi_get_child(DEVICE_ACPI_HANDLE(&udev->dev), + raw_port_num); if (!*handle) return -ENODEV; } else { diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 999909451e37..ffa6b004a84b 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -583,6 +583,7 @@ static int dwc3_remove(struct platform_device *pdev) break; } + dwc3_free_event_buffers(dwc); dwc3_core_exit(dwc); return 0; diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c index b50da53e9a52..b082bec7343e 100644 --- a/drivers/usb/dwc3/dwc3-exynos.c +++ b/drivers/usb/dwc3/dwc3-exynos.c @@ -23,8 +23,6 @@ #include <linux/usb/nop-usb-xceiv.h> #include <linux/of.h> -#include "core.h" - struct dwc3_exynos { struct platform_device *dwc3; struct platform_device *usb2_phy; diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c index 22f337f57219..afa05e3c9cf4 100644 --- a/drivers/usb/dwc3/dwc3-omap.c +++ b/drivers/usb/dwc3/dwc3-omap.c @@ -54,8 +54,6 @@ #include <linux/usb/otg.h> #include <linux/usb/nop-usb-xceiv.h> -#include "core.h" - /* * All these registers belong to OMAP's Wrapper around the * DesignWare USB3 Core. @@ -465,20 +463,20 @@ static int dwc3_omap_remove(struct platform_device *pdev) return 0; } -static const struct of_device_id of_dwc3_matach[] = { +static const struct of_device_id of_dwc3_match[] = { { "ti,dwc3", }, { }, }; -MODULE_DEVICE_TABLE(of, of_dwc3_matach); +MODULE_DEVICE_TABLE(of, of_dwc3_match); static struct platform_driver dwc3_omap_driver = { .probe = dwc3_omap_probe, .remove = dwc3_omap_remove, .driver = { .name = "omap-dwc3", - .of_match_table = of_dwc3_matach, + .of_match_table = of_dwc3_match, }, }; diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c index 7d70f44567d2..e8d77689a322 100644 --- a/drivers/usb/dwc3/dwc3-pci.c +++ b/drivers/usb/dwc3/dwc3-pci.c @@ -45,8 +45,6 @@ #include <linux/usb/otg.h> #include <linux/usb/nop-usb-xceiv.h> -#include "core.h" - /* FIXME define these in <linux/pci_ids.h> */ #define PCI_VENDOR_ID_SYNOPSYS 0x16c3 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c index d7da073a23fe..1d139ca05ef1 100644 --- a/drivers/usb/dwc3/ep0.c +++ b/drivers/usb/dwc3/ep0.c @@ -891,7 +891,8 @@ static void __dwc3_ep0_do_control_data(struct dwc3 *dwc, DWC3_TRBCTL_CONTROL_DATA); } else if (!IS_ALIGNED(req->request.length, dep->endpoint.maxpacket) && (dep->number == 0)) { - u32 transfer_size; + u32 transfer_size; + u32 maxpacket; ret = usb_gadget_map_request(&dwc->gadget, &req->request, dep->number); @@ -902,8 +903,8 @@ static void __dwc3_ep0_do_control_data(struct dwc3 *dwc, WARN_ON(req->request.length > DWC3_EP0_BOUNCE_SIZE); - transfer_size = roundup(req->request.length, - (u32) dep->endpoint.maxpacket); + maxpacket = dep->endpoint.maxpacket; + transfer_size = roundup(req->request.length, maxpacket); dwc->ep0_bounced = true; diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index a04342f6cbfa..82e160e96fca 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -2159,7 +2159,6 @@ static void dwc3_gadget_phy_suspend(struct dwc3 *dwc, u8 speed) static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc) { - struct dwc3_gadget_ep_cmd_params params; struct dwc3_ep *dep; int ret; u32 reg; @@ -2167,8 +2166,6 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc) dev_vdbg(dwc->dev, "%s\n", __func__); - memset(¶ms, 0x00, sizeof(params)); - reg = dwc3_readl(dwc->regs, DWC3_DSTS); speed = reg & DWC3_DSTS_CONNECTSPD; dwc->speed = speed; diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 5a0c541daf89..c7525b1cad74 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -145,6 +145,7 @@ config USB_LPC32XX tristate "LPC32XX USB Peripheral Controller" depends on ARCH_LPC32XX select USB_ISP1301 + select USB_OTG_UTILS help This option selects the USB device controller in the LPC32xx SoC. diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index 97a13c349cc5..82fb22511356 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -35,6 +35,12 @@ mv_udc-y := mv_udc_core.o obj-$(CONFIG_USB_FUSB300) += fusb300_udc.o obj-$(CONFIG_USB_MV_U3D) += mv_u3d_core.o +# USB Functions +obj-$(CONFIG_USB_F_ACM) += f_acm.o +f_ss_lb-y := f_loopback.o f_sourcesink.o +obj-$(CONFIG_USB_F_SS_LB) += f_ss_lb.o +obj-$(CONFIG_USB_U_SERIAL) += u_serial.o + # # USB gadget drivers # @@ -74,9 +80,3 @@ obj-$(CONFIG_USB_G_WEBCAM) += g_webcam.o obj-$(CONFIG_USB_G_NCM) += g_ncm.o obj-$(CONFIG_USB_G_ACM_MS) += g_acm_ms.o obj-$(CONFIG_USB_GADGET_TARGET) += tcm_usb_gadget.o - -# USB Functions -obj-$(CONFIG_USB_F_ACM) += f_acm.o -f_ss_lb-y := f_loopback.o f_sourcesink.o -obj-$(CONFIG_USB_F_SS_LB) += f_ss_lb.o -obj-$(CONFIG_USB_U_SERIAL) += u_serial.o diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c index 7c821de8ce3d..c0d62b278610 100644 --- a/drivers/usb/gadget/composite.c +++ b/drivers/usb/gadget/composite.c @@ -1757,10 +1757,7 @@ static const struct usb_gadget_driver composite_driver_template = { /** * usb_composite_probe() - register a composite driver * @driver: the driver to register - * @bind: the callback used to allocate resources that are shared across the - * whole device, such as string IDs, and add its configurations using - * @usb_add_config(). This may fail by returning a negative errno - * value; it should return zero on successful initialization. + * * Context: single threaded during gadget setup * * This function is used to register drivers using the composite driver diff --git a/drivers/usb/gadget/f_rndis.c b/drivers/usb/gadget/f_rndis.c index 71beeb833558..cc9c49c57c80 100644 --- a/drivers/usb/gadget/f_rndis.c +++ b/drivers/usb/gadget/f_rndis.c @@ -447,14 +447,13 @@ static void rndis_response_complete(struct usb_ep *ep, struct usb_request *req) static void rndis_command_complete(struct usb_ep *ep, struct usb_request *req) { struct f_rndis *rndis = req->context; - struct usb_composite_dev *cdev = rndis->port.func.config->cdev; int status; /* received RNDIS command from USB_CDC_SEND_ENCAPSULATED_COMMAND */ // spin_lock(&dev->lock); status = rndis_msg_parser(rndis->config, (u8 *) req->buf); if (status < 0) - ERROR(cdev, "RNDIS command error %d, %d/%d\n", + pr_err("RNDIS command error %d, %d/%d\n", status, req->actual, req->length); // spin_unlock(&dev->lock); } diff --git a/drivers/usb/gadget/f_uac1.c b/drivers/usb/gadget/f_uac1.c index f570e667a640..fa8ea4ea00c1 100644 --- a/drivers/usb/gadget/f_uac1.c +++ b/drivers/usb/gadget/f_uac1.c @@ -418,6 +418,7 @@ static int audio_get_intf_req(struct usb_function *f, req->context = audio; req->complete = f_audio_complete; + len = min_t(size_t, sizeof(value), len); memcpy(req->buf, &value, len); return len; diff --git a/drivers/usb/gadget/g_ffs.c b/drivers/usb/gadget/g_ffs.c index 3953dd4d7186..3b343b23e4b0 100644 --- a/drivers/usb/gadget/g_ffs.c +++ b/drivers/usb/gadget/g_ffs.c @@ -357,7 +357,7 @@ static int gfs_bind(struct usb_composite_dev *cdev) goto error; gfs_dev_desc.iProduct = gfs_strings[USB_GADGET_PRODUCT_IDX].id; - for (i = func_num; --i; ) { + for (i = func_num; i--; ) { ret = functionfs_bind(ffs_tab[i].ffs_data, cdev); if (unlikely(ret < 0)) { while (++i < func_num) @@ -413,7 +413,7 @@ static int gfs_unbind(struct usb_composite_dev *cdev) gether_cleanup(); gfs_ether_setup = false; - for (i = func_num; --i; ) + for (i = func_num; i--; ) if (ffs_tab[i].ffs_data) functionfs_unbind(ffs_tab[i].ffs_data); diff --git a/drivers/usb/gadget/imx_udc.c b/drivers/usb/gadget/imx_udc.c index 8efd7555fa21..5bd930d779b9 100644 --- a/drivers/usb/gadget/imx_udc.c +++ b/drivers/usb/gadget/imx_udc.c @@ -1334,27 +1334,18 @@ static int imx_udc_start(struct usb_gadget *gadget, struct usb_gadget_driver *driver) { struct imx_udc_struct *imx_usb; - int retval; imx_usb = container_of(gadget, struct imx_udc_struct, gadget); /* first hook up the driver ... */ imx_usb->driver = driver; imx_usb->gadget.dev.driver = &driver->driver; - retval = device_add(&imx_usb->gadget.dev); - if (retval) - goto fail; - D_INI(imx_usb->dev, "<%s> registered gadget driver '%s'\n", __func__, driver->driver.name); imx_udc_enable(imx_usb); return 0; -fail: - imx_usb->driver = NULL; - imx_usb->gadget.dev.driver = NULL; - return retval; } static int imx_udc_stop(struct usb_gadget *gadget, @@ -1370,8 +1361,6 @@ static int imx_udc_stop(struct usb_gadget *gadget, imx_usb->gadget.dev.driver = NULL; imx_usb->driver = NULL; - device_del(&imx_usb->gadget.dev); - D_INI(imx_usb->dev, "<%s> unregistered gadget driver '%s'\n", __func__, driver->driver.name); @@ -1477,6 +1466,10 @@ static int __init imx_udc_probe(struct platform_device *pdev) imx_usb->gadget.dev.parent = &pdev->dev; imx_usb->gadget.dev.dma_mask = pdev->dev.dma_mask; + ret = device_add(&imx_usb->gadget.dev); + if (retval) + goto fail4; + platform_set_drvdata(pdev, imx_usb); usb_init_data(imx_usb); @@ -1488,9 +1481,11 @@ static int __init imx_udc_probe(struct platform_device *pdev) ret = usb_add_gadget_udc(&pdev->dev, &imx_usb->gadget); if (ret) - goto fail4; + goto fail5; return 0; +fail5: + device_unregister(&imx_usb->gadget.dev); fail4: for (i = 0; i < IMX_USB_NB_EP + 1; i++) free_irq(imx_usb->usbd_int[i], imx_usb); @@ -1514,6 +1509,7 @@ static int __exit imx_udc_remove(struct platform_device *pdev) int i; usb_del_gadget_udc(&imx_usb->gadget); + device_unregister(&imx_usb->gadget.dev); imx_udc_disable(imx_usb); del_timer(&imx_usb->timer); diff --git a/drivers/usb/gadget/net2272.c b/drivers/usb/gadget/net2272.c index d226058e3b88..32524b631959 100644 --- a/drivers/usb/gadget/net2272.c +++ b/drivers/usb/gadget/net2272.c @@ -59,7 +59,7 @@ static const char * const ep_name[] = { }; #define DMA_ADDR_INVALID (~(dma_addr_t)0) -#ifdef CONFIG_USB_GADGET_NET2272_DMA +#ifdef CONFIG_USB_NET2272_DMA /* * use_dma: the NET2272 can use an external DMA controller. * Note that since there is no generic DMA api, some functions, @@ -1495,6 +1495,13 @@ stop_activity(struct net2272 *dev, struct usb_gadget_driver *driver) for (i = 0; i < 4; ++i) net2272_dequeue_all(&dev->ep[i]); + /* report disconnect; the driver is already quiesced */ + if (driver) { + spin_unlock(&dev->lock); + driver->disconnect(&dev->gadget); + spin_lock(&dev->lock); + } + net2272_usb_reinit(dev); } diff --git a/drivers/usb/gadget/net2280.c b/drivers/usb/gadget/net2280.c index a1b650e11339..3bd0f992fb49 100644 --- a/drivers/usb/gadget/net2280.c +++ b/drivers/usb/gadget/net2280.c @@ -1924,7 +1924,6 @@ static int net2280_start(struct usb_gadget *_gadget, err_func: device_remove_file (&dev->pdev->dev, &dev_attr_function); err_unbind: - driver->unbind (&dev->gadget); dev->gadget.dev.driver = NULL; dev->driver = NULL; return retval; @@ -1946,6 +1945,13 @@ stop_activity (struct net2280 *dev, struct usb_gadget_driver *driver) for (i = 0; i < 7; i++) nuke (&dev->ep [i]); + /* report disconnect; the driver is already quiesced */ + if (driver) { + spin_unlock(&dev->lock); + driver->disconnect(&dev->gadget); + spin_lock(&dev->lock); + } + usb_reinit (dev); } diff --git a/drivers/usb/gadget/omap_udc.c b/drivers/usb/gadget/omap_udc.c index 06be85c2b233..f8445653577f 100644 --- a/drivers/usb/gadget/omap_udc.c +++ b/drivers/usb/gadget/omap_udc.c @@ -62,6 +62,7 @@ #define DRIVER_VERSION "4 October 2004" #define OMAP_DMA_USB_W2FC_TX0 29 +#define OMAP_DMA_USB_W2FC_RX0 26 /* * The OMAP UDC needs _very_ early endpoint setup: before enabling the @@ -1310,7 +1311,7 @@ static int omap_pullup(struct usb_gadget *gadget, int is_on) } static int omap_udc_start(struct usb_gadget *g, - struct usb_gadget_driver *driver) + struct usb_gadget_driver *driver); static int omap_udc_stop(struct usb_gadget *g, struct usb_gadget_driver *driver); diff --git a/drivers/usb/gadget/pxa25x_udc.c b/drivers/usb/gadget/pxa25x_udc.c index 2bbcdce942dc..d0f37484b6b0 100644 --- a/drivers/usb/gadget/pxa25x_udc.c +++ b/drivers/usb/gadget/pxa25x_udc.c @@ -1266,13 +1266,6 @@ static int pxa25x_udc_start(struct usb_gadget *g, dev->gadget.dev.driver = &driver->driver; dev->pullup = 1; - retval = device_add (&dev->gadget.dev); - if (retval) { - dev->driver = NULL; - dev->gadget.dev.driver = NULL; - return retval; - } - /* ... then enable host detection and ep0; and we're ready * for set_configuration as well as eventual disconnect. */ @@ -1310,6 +1303,10 @@ stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver) } del_timer_sync(&dev->timer); + /* report disconnect; the driver is already quiesced */ + if (driver) + driver->disconnect(&dev->gadget); + /* re-init driver-visible data structures */ udc_reinit(dev); } @@ -1331,7 +1328,6 @@ static int pxa25x_udc_stop(struct usb_gadget*g, dev->gadget.dev.driver = NULL; dev->driver = NULL; - device_del (&dev->gadget.dev); dump_state(dev); return 0; @@ -2146,6 +2142,13 @@ static int __init pxa25x_udc_probe(struct platform_device *pdev) dev->gadget.dev.parent = &pdev->dev; dev->gadget.dev.dma_mask = pdev->dev.dma_mask; + retval = device_add(&dev->gadget.dev); + if (retval) { + dev->driver = NULL; + dev->gadget.dev.driver = NULL; + goto err_device_add; + } + the_controller = dev; platform_set_drvdata(pdev, dev); @@ -2196,6 +2199,8 @@ lubbock_fail0: free_irq(irq, dev); #endif err_irq1: + device_unregister(&dev->gadget.dev); + err_device_add: if (gpio_is_valid(dev->mach->gpio_pullup)) gpio_free(dev->mach->gpio_pullup); err_gpio_pullup: @@ -2217,10 +2222,11 @@ static int __exit pxa25x_udc_remove(struct platform_device *pdev) { struct pxa25x_udc *dev = platform_get_drvdata(pdev); - usb_del_gadget_udc(&dev->gadget); if (dev->driver) return -EBUSY; + usb_del_gadget_udc(&dev->gadget); + device_unregister(&dev->gadget.dev); dev->pullup = 0; pullup(dev); diff --git a/drivers/usb/gadget/pxa27x_udc.c b/drivers/usb/gadget/pxa27x_udc.c index f7d25795821a..2fc867652ef5 100644 --- a/drivers/usb/gadget/pxa27x_udc.c +++ b/drivers/usb/gadget/pxa27x_udc.c @@ -1814,11 +1814,6 @@ static int pxa27x_udc_start(struct usb_gadget *g, udc->gadget.dev.driver = &driver->driver; dplus_pullup(udc, 1); - retval = device_add(&udc->gadget.dev); - if (retval) { - dev_err(udc->dev, "device_add error %d\n", retval); - goto fail; - } if (!IS_ERR_OR_NULL(udc->transceiver)) { retval = otg_set_peripheral(udc->transceiver->otg, &udc->gadget); @@ -1876,7 +1871,6 @@ static int pxa27x_udc_stop(struct usb_gadget *g, udc->driver = NULL; - device_del(&udc->gadget.dev); if (!IS_ERR_OR_NULL(udc->transceiver)) return otg_set_peripheral(udc->transceiver->otg, NULL); @@ -2480,13 +2474,24 @@ static int __init pxa_udc_probe(struct platform_device *pdev) driver_name, udc->irq, retval); goto err_irq; } + + retval = device_add(&udc->gadget.dev); + if (retval) { + dev_err(udc->dev, "device_add error %d\n", retval); + goto err_dev_add; + } + retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget); if (retval) goto err_add_udc; pxa_init_debugfs(udc); + return 0; + err_add_udc: + device_unregister(&udc->gadget.dev); +err_dev_add: free_irq(udc->irq, udc); err_irq: iounmap(udc->regs); @@ -2507,6 +2512,7 @@ static int __exit pxa_udc_remove(struct platform_device *_dev) int gpio = udc->mach->gpio_pullup; usb_del_gadget_udc(&udc->gadget); + device_del(&udc->gadget.dev); usb_gadget_unregister_driver(udc->driver); free_irq(udc->irq, udc); pxa_cleanup_debugfs(udc); diff --git a/drivers/usb/gadget/s3c2410_udc.c b/drivers/usb/gadget/s3c2410_udc.c index fc07b4381286..08f89652533b 100644 --- a/drivers/usb/gadget/s3c2410_udc.c +++ b/drivers/usb/gadget/s3c2410_udc.c @@ -1668,8 +1668,7 @@ static void s3c2410_udc_enable(struct s3c2410_udc *dev) static int s3c2410_udc_start(struct usb_gadget *g, struct usb_gadget_driver *driver) { - struct s3c2410_udc *udc = to_s3c2410(g) - int retval; + struct s3c2410_udc *udc = to_s3c2410(g); dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name); @@ -1677,22 +1676,10 @@ static int s3c2410_udc_start(struct usb_gadget *g, udc->driver = driver; udc->gadget.dev.driver = &driver->driver; - /* Bind the driver */ - retval = device_add(&udc->gadget.dev); - if (retval) { - dev_err(&udc->gadget.dev, "Error in device_add() : %d\n", retval); - goto register_error; - } - /* Enable udc */ s3c2410_udc_enable(udc); return 0; - -register_error: - udc->driver = NULL; - udc->gadget.dev.driver = NULL; - return retval; } static int s3c2410_udc_stop(struct usb_gadget *g, @@ -1700,7 +1687,6 @@ static int s3c2410_udc_stop(struct usb_gadget *g, { struct s3c2410_udc *udc = to_s3c2410(g); - device_del(&udc->gadget.dev); udc->driver = NULL; /* Disable udc */ @@ -1842,6 +1828,13 @@ static int s3c2410_udc_probe(struct platform_device *pdev) udc->gadget.dev.parent = &pdev->dev; udc->gadget.dev.dma_mask = pdev->dev.dma_mask; + /* Bind the driver */ + retval = device_add(&udc->gadget.dev); + if (retval) { + dev_err(&udc->gadget.dev, "Error in device_add() : %d\n", retval); + goto err_device_add; + } + the_controller = udc; platform_set_drvdata(pdev, udc); @@ -1930,6 +1923,8 @@ err_gpio_claim: err_int: free_irq(IRQ_USBD, udc); err_map: + device_unregister(&udc->gadget.dev); +err_device_add: iounmap(base_addr); err_mem: release_mem_region(rsrc_start, rsrc_len); @@ -1947,10 +1942,11 @@ static int s3c2410_udc_remove(struct platform_device *pdev) dev_dbg(&pdev->dev, "%s()\n", __func__); - usb_del_gadget_udc(&udc->gadget); if (udc->driver) return -EBUSY; + usb_del_gadget_udc(&udc->gadget); + device_unregister(&udc->gadget.dev); debugfs_remove(udc->regs_info); if (udc_info && !udc_info->udc_command && diff --git a/drivers/usb/gadget/u_serial.c b/drivers/usb/gadget/u_serial.c index c5034d9c946b..b369292d4b90 100644 --- a/drivers/usb/gadget/u_serial.c +++ b/drivers/usb/gadget/u_serial.c @@ -136,7 +136,7 @@ static struct portmaster { pr_debug(fmt, ##arg) #endif /* pr_vdebug */ #else -#ifndef pr_vdebig +#ifndef pr_vdebug #define pr_vdebug(fmt, arg...) \ ({ if (0) pr_debug(fmt, ##arg); }) #endif /* pr_vdebug */ diff --git a/drivers/usb/gadget/u_uac1.c b/drivers/usb/gadget/u_uac1.c index e0c5e88e03ed..c7d460f43390 100644 --- a/drivers/usb/gadget/u_uac1.c +++ b/drivers/usb/gadget/u_uac1.c @@ -240,8 +240,11 @@ static int gaudio_open_snd_dev(struct gaudio *card) snd = &card->playback; snd->filp = filp_open(fn_play, O_WRONLY, 0); if (IS_ERR(snd->filp)) { + int ret = PTR_ERR(snd->filp); + ERROR(card, "No such PCM playback device: %s\n", fn_play); snd->filp = NULL; + return ret; } pcm_file = snd->filp->private_data; snd->substream = pcm_file->substream; diff --git a/drivers/usb/gadget/udc-core.c b/drivers/usb/gadget/udc-core.c index 2a9cd369f71c..f8f62c3ed65e 100644 --- a/drivers/usb/gadget/udc-core.c +++ b/drivers/usb/gadget/udc-core.c @@ -216,7 +216,7 @@ static void usb_gadget_remove_driver(struct usb_udc *udc) usb_gadget_disconnect(udc->gadget); udc->driver->disconnect(udc->gadget); udc->driver->unbind(udc->gadget); - usb_gadget_udc_stop(udc->gadget, udc->driver); + usb_gadget_udc_stop(udc->gadget, NULL); udc->driver = NULL; udc->dev.driver = NULL; diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index b416a3fc9959..416a6dce5e11 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -302,6 +302,7 @@ static void ehci_quiesce (struct ehci_hcd *ehci) static void end_unlink_async(struct ehci_hcd *ehci); static void unlink_empty_async(struct ehci_hcd *ehci); +static void unlink_empty_async_suspended(struct ehci_hcd *ehci); static void ehci_work(struct ehci_hcd *ehci); static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh); static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh); @@ -748,11 +749,9 @@ static irqreturn_t ehci_irq (struct usb_hcd *hcd) /* guard against (alleged) silicon errata */ if (cmd & CMD_IAAD) ehci_dbg(ehci, "IAA with IAAD still set?\n"); - if (ehci->async_iaa) { + if (ehci->async_iaa) COUNT(ehci->stats.iaa); - end_unlink_async(ehci); - } else - ehci_dbg(ehci, "IAA with nothing unlinked?\n"); + end_unlink_async(ehci); } /* remote wakeup [4.3.1] */ diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c index 4d3b294f203e..7d06e77f6c4f 100644 --- a/drivers/usb/host/ehci-hub.c +++ b/drivers/usb/host/ehci-hub.c @@ -328,7 +328,7 @@ static int ehci_bus_suspend (struct usb_hcd *hcd) ehci->rh_state = EHCI_RH_SUSPENDED; end_unlink_async(ehci); - unlink_empty_async(ehci); + unlink_empty_async_suspended(ehci); ehci_handle_intr_unlinks(ehci); end_free_itds(ehci); diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c index fd252f0cfb3a..23d136904285 100644 --- a/drivers/usb/host/ehci-q.c +++ b/drivers/usb/host/ehci-q.c @@ -135,7 +135,7 @@ qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh) * qtd is updated in qh_completions(). Update the QH * overlay here. */ - if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw->hw_current) { + if (qh->hw->hw_token & ACTIVE_BIT(ehci)) { qh->hw->hw_qtd_next = qtd->hw_next; qtd = NULL; } @@ -449,11 +449,19 @@ qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh) else if (last_status == -EINPROGRESS && !urb->unlinked) continue; - /* qh unlinked; token in overlay may be most current */ - if (state == QH_STATE_IDLE - && cpu_to_hc32(ehci, qtd->qtd_dma) - == hw->hw_current) { + /* + * If this was the active qtd when the qh was unlinked + * and the overlay's token is active, then the overlay + * hasn't been written back to the qtd yet so use its + * token instead of the qtd's. After the qtd is + * processed and removed, the overlay won't be valid + * any more. + */ + if (state == QH_STATE_IDLE && + qh->qtd_list.next == &qtd->qtd_list && + (hw->hw_token & ACTIVE_BIT(ehci))) { token = hc32_to_cpu(ehci, hw->hw_token); + hw->hw_token &= ~ACTIVE_BIT(ehci); /* An unlink may leave an incomplete * async transaction in the TT buffer. @@ -1170,7 +1178,7 @@ static void single_unlink_async(struct ehci_hcd *ehci, struct ehci_qh *qh) struct ehci_qh *prev; /* Add to the end of the list of QHs waiting for the next IAAD */ - qh->qh_state = QH_STATE_UNLINK; + qh->qh_state = QH_STATE_UNLINK_WAIT; if (ehci->async_unlink) ehci->async_unlink_last->unlink_next = qh; else @@ -1213,9 +1221,19 @@ static void start_iaa_cycle(struct ehci_hcd *ehci, bool nested) /* Do only the first waiting QH (nVidia bug?) */ qh = ehci->async_unlink; - ehci->async_iaa = qh; - ehci->async_unlink = qh->unlink_next; - qh->unlink_next = NULL; + + /* + * Intel (?) bug: The HC can write back the overlay region + * even after the IAA interrupt occurs. In self-defense, + * always go through two IAA cycles for each QH. + */ + if (qh->qh_state == QH_STATE_UNLINK_WAIT) { + qh->qh_state = QH_STATE_UNLINK; + } else { + ehci->async_iaa = qh; + ehci->async_unlink = qh->unlink_next; + qh->unlink_next = NULL; + } /* Make sure the unlinks are all visible to the hardware */ wmb(); @@ -1298,6 +1316,19 @@ static void unlink_empty_async(struct ehci_hcd *ehci) } } +/* The root hub is suspended; unlink all the async QHs */ +static void unlink_empty_async_suspended(struct ehci_hcd *ehci) +{ + struct ehci_qh *qh; + + while (ehci->async->qh_next.qh) { + qh = ehci->async->qh_next.qh; + WARN_ON(!list_empty(&qh->qtd_list)); + single_unlink_async(ehci, qh); + } + start_iaa_cycle(ehci, false); +} + /* makes sure the async qh will become idle */ /* caller must own ehci->lock */ diff --git a/drivers/usb/host/ehci-sched.c b/drivers/usb/host/ehci-sched.c index b476daf49f6f..010f686d8881 100644 --- a/drivers/usb/host/ehci-sched.c +++ b/drivers/usb/host/ehci-sched.c @@ -1214,6 +1214,7 @@ itd_urb_transaction ( memset (itd, 0, sizeof *itd); itd->itd_dma = itd_dma; + itd->frame = 9999; /* an invalid value */ list_add (&itd->itd_list, &sched->td_list); } spin_unlock_irqrestore (&ehci->lock, flags); @@ -1915,6 +1916,7 @@ sitd_urb_transaction ( memset (sitd, 0, sizeof *sitd); sitd->sitd_dma = sitd_dma; + sitd->frame = 9999; /* an invalid value */ list_add (&sitd->sitd_list, &iso_sched->td_list); } diff --git a/drivers/usb/host/ehci-timer.c b/drivers/usb/host/ehci-timer.c index 20dbdcbe9b0f..c3fa1305f830 100644 --- a/drivers/usb/host/ehci-timer.c +++ b/drivers/usb/host/ehci-timer.c @@ -304,7 +304,7 @@ static void ehci_iaa_watchdog(struct ehci_hcd *ehci) * (a) SMP races against real IAA firing and retriggering, and * (b) clean HC shutdown, when IAA watchdog was pending. */ - if (ehci->async_iaa) { + if (1) { u32 cmd, status; /* If we get here, IAA is *REALLY* late. It's barely diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c index 35616ffbe3ae..6dc238c592bc 100644 --- a/drivers/usb/host/xhci-mem.c +++ b/drivers/usb/host/xhci-mem.c @@ -1022,44 +1022,24 @@ void xhci_copy_ep0_dequeue_into_input_ctx(struct xhci_hcd *xhci, * is attached to (or the roothub port its ancestor hub is attached to). All we * know is the index of that port under either the USB 2.0 or the USB 3.0 * roothub, but that doesn't give us the real index into the HW port status - * registers. Scan through the xHCI roothub port array, looking for the Nth - * entry of the correct port speed. Return the port number of that entry. + * registers. Call xhci_find_raw_port_number() to get real index. */ static u32 xhci_find_real_port_number(struct xhci_hcd *xhci, struct usb_device *udev) { struct usb_device *top_dev; - unsigned int num_similar_speed_ports; - unsigned int faked_port_num; - int i; + struct usb_hcd *hcd; + + if (udev->speed == USB_SPEED_SUPER) + hcd = xhci->shared_hcd; + else + hcd = xhci->main_hcd; for (top_dev = udev; top_dev->parent && top_dev->parent->parent; top_dev = top_dev->parent) /* Found device below root hub */; - faked_port_num = top_dev->portnum; - for (i = 0, num_similar_speed_ports = 0; - i < HCS_MAX_PORTS(xhci->hcs_params1); i++) { - u8 port_speed = xhci->port_array[i]; - - /* - * Skip ports that don't have known speeds, or have duplicate - * Extended Capabilities port speed entries. - */ - if (port_speed == 0 || port_speed == DUPLICATE_ENTRY) - continue; - /* - * USB 3.0 ports are always under a USB 3.0 hub. USB 2.0 and - * 1.1 ports are under the USB 2.0 hub. If the port speed - * matches the device speed, it's a similar speed port. - */ - if ((port_speed == 0x03) == (udev->speed == USB_SPEED_SUPER)) - num_similar_speed_ports++; - if (num_similar_speed_ports == faked_port_num) - /* Roothub ports are numbered from 1 to N */ - return i+1; - } - return 0; + return xhci_find_raw_port_number(hcd, top_dev->portnum); } /* Setup an xHCI virtual device for a Set Address command */ diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c index af259e0ec172..1a30c380043c 100644 --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c @@ -313,6 +313,7 @@ static const struct hc_driver xhci_pci_hc_driver = { .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm, .enable_usb3_lpm_timeout = xhci_enable_usb3_lpm_timeout, .disable_usb3_lpm_timeout = xhci_disable_usb3_lpm_timeout, + .find_raw_port_number = xhci_find_raw_port_number, }; /*-------------------------------------------------------------------------*/ diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index 882875465301..1969c001b3f9 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c @@ -1599,14 +1599,20 @@ static void handle_port_status(struct xhci_hcd *xhci, max_ports = HCS_MAX_PORTS(xhci->hcs_params1); if ((port_id <= 0) || (port_id > max_ports)) { xhci_warn(xhci, "Invalid port id %d\n", port_id); - bogus_port_status = true; - goto cleanup; + inc_deq(xhci, xhci->event_ring); + return; } /* Figure out which usb_hcd this port is attached to: * is it a USB 3.0 port or a USB 2.0/1.1 port? */ major_revision = xhci->port_array[port_id - 1]; + + /* Find the right roothub. */ + hcd = xhci_to_hcd(xhci); + if ((major_revision == 0x03) != (hcd->speed == HCD_USB3)) + hcd = xhci->shared_hcd; + if (major_revision == 0) { xhci_warn(xhci, "Event for port %u not in " "Extended Capabilities, ignoring.\n", @@ -1629,10 +1635,6 @@ static void handle_port_status(struct xhci_hcd *xhci, * into the index into the ports on the correct split roothub, and the * correct bus_state structure. */ - /* Find the right roothub. */ - hcd = xhci_to_hcd(xhci); - if ((major_revision == 0x03) != (hcd->speed == HCD_USB3)) - hcd = xhci->shared_hcd; bus_state = &xhci->bus_state[hcd_index(hcd)]; if (hcd->speed == HCD_USB3) port_array = xhci->usb3_ports; @@ -2027,8 +2029,8 @@ static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td, if (event_trb != ep_ring->dequeue && event_trb != td->last_trb) td->urb->actual_length = - td->urb->transfer_buffer_length - - TRB_LEN(le32_to_cpu(event->transfer_len)); + td->urb->transfer_buffer_length - + EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)); else td->urb->actual_length = 0; @@ -2060,7 +2062,7 @@ static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td, /* Maybe the event was for the data stage? */ td->urb->actual_length = td->urb->transfer_buffer_length - - TRB_LEN(le32_to_cpu(event->transfer_len)); + EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)); xhci_dbg(xhci, "Waiting for status " "stage event\n"); return 0; @@ -2096,7 +2098,7 @@ static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td, /* handle completion code */ switch (trb_comp_code) { case COMP_SUCCESS: - if (TRB_LEN(le32_to_cpu(event->transfer_len)) == 0) { + if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) == 0) { frame->status = 0; break; } @@ -2141,7 +2143,7 @@ static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td, len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])); } len += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) - - TRB_LEN(le32_to_cpu(event->transfer_len)); + EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)); if (trb_comp_code != COMP_STOP_INVAL) { frame->actual_length = len; @@ -2199,7 +2201,7 @@ static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td, case COMP_SUCCESS: /* Double check that the HW transferred everything. */ if (event_trb != td->last_trb || - TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) { + EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) { xhci_warn(xhci, "WARN Successful completion " "on short TX\n"); if (td->urb->transfer_flags & URB_SHORT_NOT_OK) @@ -2227,18 +2229,18 @@ static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td, "%d bytes untransferred\n", td->urb->ep->desc.bEndpointAddress, td->urb->transfer_buffer_length, - TRB_LEN(le32_to_cpu(event->transfer_len))); + EVENT_TRB_LEN(le32_to_cpu(event->transfer_len))); /* Fast path - was this the last TRB in the TD for this URB? */ if (event_trb == td->last_trb) { - if (TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) { + if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) != 0) { td->urb->actual_length = td->urb->transfer_buffer_length - - TRB_LEN(le32_to_cpu(event->transfer_len)); + EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)); if (td->urb->transfer_buffer_length < td->urb->actual_length) { xhci_warn(xhci, "HC gave bad length " "of %d bytes left\n", - TRB_LEN(le32_to_cpu(event->transfer_len))); + EVENT_TRB_LEN(le32_to_cpu(event->transfer_len))); td->urb->actual_length = 0; if (td->urb->transfer_flags & URB_SHORT_NOT_OK) *status = -EREMOTEIO; @@ -2280,7 +2282,7 @@ static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td, if (trb_comp_code != COMP_STOP_INVAL) td->urb->actual_length += TRB_LEN(le32_to_cpu(cur_trb->generic.field[2])) - - TRB_LEN(le32_to_cpu(event->transfer_len)); + EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)); } return finish_td(xhci, td, event_trb, event, ep, status, false); @@ -2368,7 +2370,7 @@ static int handle_tx_event(struct xhci_hcd *xhci, * transfer type */ case COMP_SUCCESS: - if (TRB_LEN(le32_to_cpu(event->transfer_len)) == 0) + if (EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)) == 0) break; if (xhci->quirks & XHCI_TRUST_TX_LENGTH) trb_comp_code = COMP_SHORT_TX; @@ -2461,14 +2463,21 @@ static int handle_tx_event(struct xhci_hcd *xhci, * TD list. */ if (list_empty(&ep_ring->td_list)) { - xhci_warn(xhci, "WARN Event TRB for slot %d ep %d " - "with no TDs queued?\n", - TRB_TO_SLOT_ID(le32_to_cpu(event->flags)), - ep_index); - xhci_dbg(xhci, "Event TRB with TRB type ID %u\n", - (le32_to_cpu(event->flags) & - TRB_TYPE_BITMASK)>>10); - xhci_print_trb_offsets(xhci, (union xhci_trb *) event); + /* + * A stopped endpoint may generate an extra completion + * event if the device was suspended. Don't print + * warnings. + */ + if (!(trb_comp_code == COMP_STOP || + trb_comp_code == COMP_STOP_INVAL)) { + xhci_warn(xhci, "WARN Event TRB for slot %d ep %d with no TDs queued?\n", + TRB_TO_SLOT_ID(le32_to_cpu(event->flags)), + ep_index); + xhci_dbg(xhci, "Event TRB with TRB type ID %u\n", + (le32_to_cpu(event->flags) & + TRB_TYPE_BITMASK)>>10); + xhci_print_trb_offsets(xhci, (union xhci_trb *) event); + } if (ep->skip) { ep->skip = false; xhci_dbg(xhci, "td_list is empty while skip " diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c index f1f01a834ba7..53b8f89a0b1c 100644 --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c @@ -350,7 +350,7 @@ static int xhci_try_enable_msi(struct usb_hcd *hcd) * generate interrupts. Don't even try to enable MSI. */ if (xhci->quirks & XHCI_BROKEN_MSI) - return 0; + goto legacy_irq; /* unregister the legacy interrupt */ if (hcd->irq) @@ -371,6 +371,7 @@ static int xhci_try_enable_msi(struct usb_hcd *hcd) return -EINVAL; } + legacy_irq: /* fall back to legacy interrupt*/ ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED, hcd->irq_descr, hcd); @@ -3778,6 +3779,28 @@ int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev) return 0; } +/* + * Transfer the port index into real index in the HW port status + * registers. Caculate offset between the port's PORTSC register + * and port status base. Divide the number of per port register + * to get the real index. The raw port number bases 1. + */ +int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1) +{ + struct xhci_hcd *xhci = hcd_to_xhci(hcd); + __le32 __iomem *base_addr = &xhci->op_regs->port_status_base; + __le32 __iomem *addr; + int raw_port; + + if (hcd->speed != HCD_USB3) + addr = xhci->usb2_ports[port1 - 1]; + else + addr = xhci->usb3_ports[port1 - 1]; + + raw_port = (addr - base_addr)/NUM_PORT_REGS + 1; + return raw_port; +} + #ifdef CONFIG_USB_SUSPEND /* BESL to HIRD Encoding array for USB2 LPM */ diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index f791bd0aee6c..63582719e0fb 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h @@ -206,8 +206,8 @@ struct xhci_op_regs { /* bits 12:31 are reserved (and should be preserved on writes). */ /* IMAN - Interrupt Management Register */ -#define IMAN_IP (1 << 1) -#define IMAN_IE (1 << 0) +#define IMAN_IE (1 << 1) +#define IMAN_IP (1 << 0) /* USBSTS - USB status - status bitmasks */ /* HC not running - set to 1 when run/stop bit is cleared. */ @@ -972,6 +972,10 @@ struct xhci_transfer_event { __le32 flags; }; +/* Transfer event TRB length bit mask */ +/* bits 0:23 */ +#define EVENT_TRB_LEN(p) ((p) & 0xffffff) + /** Transfer Event bit fields **/ #define TRB_TO_EP_ID(p) (((p) >> 16) & 0x1f) @@ -1829,6 +1833,7 @@ void xhci_test_and_clear_bit(struct xhci_hcd *xhci, __le32 __iomem **port_array, int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, u16 wIndex, char *buf, u16 wLength); int xhci_hub_status_data(struct usb_hcd *hcd, char *buf); +int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1); #ifdef CONFIG_PM int xhci_bus_suspend(struct usb_hcd *hcd); diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig index 45b19e2c60ba..05e51432dd2f 100644 --- a/drivers/usb/musb/Kconfig +++ b/drivers/usb/musb/Kconfig @@ -7,11 +7,6 @@ config USB_MUSB_HDRC tristate 'Inventra Highspeed Dual Role Controller (TI, ADI, ...)' depends on USB && USB_GADGET - select NOP_USB_XCEIV if (ARCH_DAVINCI || MACH_OMAP3EVM || BLACKFIN) - select NOP_USB_XCEIV if (SOC_TI81XX || SOC_AM33XX) - select TWL4030_USB if MACH_OMAP_3430SDP - select TWL6030_USB if MACH_OMAP_4430SDP || MACH_OMAP4_PANDA - select OMAP_CONTROL_USB if MACH_OMAP_4430SDP || MACH_OMAP4_PANDA select USB_OTG_UTILS help Say Y here if your system has a dual role high speed USB diff --git a/drivers/usb/musb/da8xx.c b/drivers/usb/musb/da8xx.c index 7c71769d71ff..41613a2b35e8 100644 --- a/drivers/usb/musb/da8xx.c +++ b/drivers/usb/musb/da8xx.c @@ -327,7 +327,7 @@ static irqreturn_t da8xx_musb_interrupt(int irq, void *hci) u8 devctl = musb_readb(mregs, MUSB_DEVCTL); int err; - err = musb->int_usb & USB_INTR_VBUSERROR; + err = musb->int_usb & MUSB_INTR_VBUSERROR; if (err) { /* * The Mentor core doesn't debounce VBUS as needed diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c index 60b41cc28da4..daec6e0f7e38 100644 --- a/drivers/usb/musb/musb_core.c +++ b/drivers/usb/musb/musb_core.c @@ -1624,8 +1624,6 @@ EXPORT_SYMBOL_GPL(musb_dma_completion); /*-------------------------------------------------------------------------*/ -#ifdef CONFIG_SYSFS - static ssize_t musb_mode_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -1742,8 +1740,6 @@ static const struct attribute_group musb_attr_group = { .attrs = musb_attributes, }; -#endif /* sysfs */ - /* Only used to provide driver mode change events */ static void musb_irq_work(struct work_struct *data) { @@ -1968,11 +1964,9 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl) if (status < 0) goto fail4; -#ifdef CONFIG_SYSFS status = sysfs_create_group(&musb->controller->kobj, &musb_attr_group); if (status) goto fail5; -#endif pm_runtime_put(musb->controller); diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c index be18537c5f14..83eddedcd9be 100644 --- a/drivers/usb/musb/musb_gadget.c +++ b/drivers/usb/musb/musb_gadget.c @@ -141,7 +141,9 @@ static inline void map_dma_buffer(struct musb_request *request, static inline void unmap_dma_buffer(struct musb_request *request, struct musb *musb) { - if (!is_buffer_mapped(request)) + struct musb_ep *musb_ep = request->ep; + + if (!is_buffer_mapped(request) || !musb_ep->dma) return; if (request->request.dma == DMA_ADDR_INVALID) { @@ -195,7 +197,10 @@ __acquires(ep->musb->lock) ep->busy = 1; spin_unlock(&musb->lock); - unmap_dma_buffer(req, musb); + + if (!dma_mapping_error(&musb->g.dev, request->dma)) + unmap_dma_buffer(req, musb); + if (request->status == 0) dev_dbg(musb->controller, "%s done request %p, %d/%d\n", ep->end_point.name, request, diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c index 1762354fe793..1a42a458f2c4 100644 --- a/drivers/usb/musb/omap2430.c +++ b/drivers/usb/musb/omap2430.c @@ -51,7 +51,7 @@ struct omap2430_glue { }; #define glue_to_musb(g) platform_get_drvdata(g->musb) -struct omap2430_glue *_glue; +static struct omap2430_glue *_glue; static struct timer_list musb_idle_timer; @@ -237,9 +237,13 @@ void omap_musb_mailbox(enum omap_musb_vbus_id_status status) { struct omap2430_glue *glue = _glue; - if (glue && glue_to_musb(glue)) { - glue->status = status; - } else { + if (!glue) { + pr_err("%s: musb core is not yet initialized\n", __func__); + return; + } + glue->status = status; + + if (!glue_to_musb(glue)) { pr_err("%s: musb core is not yet ready\n", __func__); return; } diff --git a/drivers/usb/otg/otg.c b/drivers/usb/otg/otg.c index e1814397ca3a..2bd03d261a50 100644 --- a/drivers/usb/otg/otg.c +++ b/drivers/usb/otg/otg.c @@ -130,7 +130,7 @@ struct usb_phy *usb_get_phy(enum usb_phy_type type) spin_lock_irqsave(&phy_lock, flags); phy = __usb_find_phy(&phy_list, type); - if (IS_ERR(phy)) { + if (IS_ERR(phy) || !try_module_get(phy->dev->driver->owner)) { pr_err("unable to find transceiver of type %s\n", usb_phy_type_string(type)); goto err0; @@ -228,7 +228,7 @@ struct usb_phy *usb_get_phy_dev(struct device *dev, u8 index) spin_lock_irqsave(&phy_lock, flags); phy = __usb_find_phy_dev(dev, &phy_bind_list, index); - if (IS_ERR(phy)) { + if (IS_ERR(phy) || !try_module_get(phy->dev->driver->owner)) { pr_err("unable to find transceiver\n"); goto err0; } @@ -301,8 +301,12 @@ EXPORT_SYMBOL(devm_usb_put_phy); */ void usb_put_phy(struct usb_phy *x) { - if (x) + if (x) { + struct module *owner = x->dev->driver->owner; + put_device(x->dev); + module_put(owner); + } } EXPORT_SYMBOL(usb_put_phy); diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig index 65217a590068..90549382eba5 100644 --- a/drivers/usb/phy/Kconfig +++ b/drivers/usb/phy/Kconfig @@ -38,6 +38,7 @@ config USB_ISP1301 tristate "NXP ISP1301 USB transceiver support" depends on USB || USB_GADGET depends on I2C + select USB_OTG_UTILS help Say Y here to add support for the NXP ISP1301 USB transceiver driver. This chip is typically used as USB transceiver for USB host, gadget diff --git a/drivers/usb/phy/omap-control-usb.c b/drivers/usb/phy/omap-control-usb.c index 5323b71c3521..1419ceda9759 100644 --- a/drivers/usb/phy/omap-control-usb.c +++ b/drivers/usb/phy/omap-control-usb.c @@ -219,32 +219,26 @@ static int omap_control_usb_probe(struct platform_device *pdev) res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "control_dev_conf"); - control_usb->dev_conf = devm_request_and_ioremap(&pdev->dev, res); - if (!control_usb->dev_conf) { - dev_err(&pdev->dev, "Failed to obtain io memory\n"); - return -EADDRNOTAVAIL; - } + control_usb->dev_conf = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(control_usb->dev_conf)) + return PTR_ERR(control_usb->dev_conf); if (control_usb->type == OMAP_CTRL_DEV_TYPE1) { res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "otghs_control"); - control_usb->otghs_control = devm_request_and_ioremap( + control_usb->otghs_control = devm_ioremap_resource( &pdev->dev, res); - if (!control_usb->otghs_control) { - dev_err(&pdev->dev, "Failed to obtain io memory\n"); - return -EADDRNOTAVAIL; - } + if (IS_ERR(control_usb->otghs_control)) + return PTR_ERR(control_usb->otghs_control); } if (control_usb->type == OMAP_CTRL_DEV_TYPE2) { res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phy_power_usb"); - control_usb->phy_power = devm_request_and_ioremap( + control_usb->phy_power = devm_ioremap_resource( &pdev->dev, res); - if (!control_usb->phy_power) { - dev_dbg(&pdev->dev, "Failed to obtain io memory\n"); - return -EADDRNOTAVAIL; - } + if (IS_ERR(control_usb->phy_power)) + return PTR_ERR(control_usb->phy_power); control_usb->sys_clk = devm_clk_get(control_usb->dev, "sys_clkin"); diff --git a/drivers/usb/phy/omap-usb3.c b/drivers/usb/phy/omap-usb3.c index fadc0c2b65bb..a6e60b1e102e 100644 --- a/drivers/usb/phy/omap-usb3.c +++ b/drivers/usb/phy/omap-usb3.c @@ -212,11 +212,9 @@ static int omap_usb3_probe(struct platform_device *pdev) } res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pll_ctrl"); - phy->pll_ctrl_base = devm_request_and_ioremap(&pdev->dev, res); - if (!phy->pll_ctrl_base) { - dev_err(&pdev->dev, "ioremap of pll_ctrl failed\n"); - return -ENOMEM; - } + phy->pll_ctrl_base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(phy->pll_ctrl_base)) + return PTR_ERR(phy->pll_ctrl_base); phy->dev = &pdev->dev; diff --git a/drivers/usb/phy/samsung-usbphy.c b/drivers/usb/phy/samsung-usbphy.c index 6ea553733832..967101ec15fd 100644 --- a/drivers/usb/phy/samsung-usbphy.c +++ b/drivers/usb/phy/samsung-usbphy.c @@ -787,11 +787,9 @@ static int samsung_usbphy_probe(struct platform_device *pdev) return -ENODEV; } - phy_base = devm_request_and_ioremap(dev, phy_mem); - if (!phy_base) { - dev_err(dev, "%s: register mapping failed\n", __func__); - return -ENXIO; - } + phy_base = devm_ioremap_resource(dev, phy_mem); + if (IS_ERR(phy_base)) + return PTR_ERR(phy_base); sphy = devm_kzalloc(dev, sizeof(*sphy), GFP_KERNEL); if (!sphy) diff --git a/drivers/usb/serial/ark3116.c b/drivers/usb/serial/ark3116.c index cbd904b8fba5..4775f8209e55 100644 --- a/drivers/usb/serial/ark3116.c +++ b/drivers/usb/serial/ark3116.c @@ -62,7 +62,6 @@ static int is_irda(struct usb_serial *serial) } struct ark3116_private { - wait_queue_head_t delta_msr_wait; struct async_icount icount; int irda; /* 1 for irda device */ @@ -146,7 +145,6 @@ static int ark3116_port_probe(struct usb_serial_port *port) if (!priv) return -ENOMEM; - init_waitqueue_head(&priv->delta_msr_wait); mutex_init(&priv->hw_lock); spin_lock_init(&priv->status_lock); @@ -456,10 +454,14 @@ static int ark3116_ioctl(struct tty_struct *tty, case TIOCMIWAIT: for (;;) { struct async_icount prev = priv->icount; - interruptible_sleep_on(&priv->delta_msr_wait); + interruptible_sleep_on(&port->delta_msr_wait); /* see if a signal did it */ if (signal_pending(current)) return -ERESTARTSYS; + + if (port->serial->disconnected) + return -EIO; + if ((prev.rng == priv->icount.rng) && (prev.dsr == priv->icount.dsr) && (prev.dcd == priv->icount.dcd) && @@ -580,7 +582,7 @@ static void ark3116_update_msr(struct usb_serial_port *port, __u8 msr) priv->icount.dcd++; if (msr & UART_MSR_TERI) priv->icount.rng++; - wake_up_interruptible(&priv->delta_msr_wait); + wake_up_interruptible(&port->delta_msr_wait); } } diff --git a/drivers/usb/serial/ch341.c b/drivers/usb/serial/ch341.c index d255f66e708e..07d4650a32ab 100644 --- a/drivers/usb/serial/ch341.c +++ b/drivers/usb/serial/ch341.c @@ -80,7 +80,6 @@ MODULE_DEVICE_TABLE(usb, id_table); struct ch341_private { spinlock_t lock; /* access lock */ - wait_queue_head_t delta_msr_wait; /* wait queue for modem status */ unsigned baud_rate; /* set baud rate */ u8 line_control; /* set line control value RTS/DTR */ u8 line_status; /* active status of modem control inputs */ @@ -252,7 +251,6 @@ static int ch341_port_probe(struct usb_serial_port *port) return -ENOMEM; spin_lock_init(&priv->lock); - init_waitqueue_head(&priv->delta_msr_wait); priv->baud_rate = DEFAULT_BAUD_RATE; priv->line_control = CH341_BIT_RTS | CH341_BIT_DTR; @@ -298,7 +296,7 @@ static void ch341_dtr_rts(struct usb_serial_port *port, int on) priv->line_control &= ~(CH341_BIT_RTS | CH341_BIT_DTR); spin_unlock_irqrestore(&priv->lock, flags); ch341_set_handshake(port->serial->dev, priv->line_control); - wake_up_interruptible(&priv->delta_msr_wait); + wake_up_interruptible(&port->delta_msr_wait); } static void ch341_close(struct usb_serial_port *port) @@ -491,7 +489,7 @@ static void ch341_read_int_callback(struct urb *urb) tty_kref_put(tty); } - wake_up_interruptible(&priv->delta_msr_wait); + wake_up_interruptible(&port->delta_msr_wait); } exit: @@ -517,11 +515,14 @@ static int wait_modem_info(struct usb_serial_port *port, unsigned int arg) spin_unlock_irqrestore(&priv->lock, flags); while (!multi_change) { - interruptible_sleep_on(&priv->delta_msr_wait); + interruptible_sleep_on(&port->delta_msr_wait); /* see if a signal did it */ if (signal_pending(current)) return -ERESTARTSYS; + if (port->serial->disconnected) + return -EIO; + spin_lock_irqsave(&priv->lock, flags); status = priv->line_status; multi_change = priv->multi_status_change; diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c index edc0f0dcad83..4747d1c328ff 100644 --- a/drivers/usb/serial/cp210x.c +++ b/drivers/usb/serial/cp210x.c @@ -85,6 +85,7 @@ static const struct usb_device_id id_table[] = { { USB_DEVICE(0x10C4, 0x813F) }, /* Tams Master Easy Control */ { USB_DEVICE(0x10C4, 0x814A) }, /* West Mountain Radio RIGblaster P&P */ { USB_DEVICE(0x10C4, 0x814B) }, /* West Mountain Radio RIGtalk */ + { USB_DEVICE(0x2405, 0x0003) }, /* West Mountain Radio RIGblaster Advantage */ { USB_DEVICE(0x10C4, 0x8156) }, /* B&G H3000 link cable */ { USB_DEVICE(0x10C4, 0x815E) }, /* Helicomm IP-Link 1220-DVM */ { USB_DEVICE(0x10C4, 0x815F) }, /* Timewave HamLinkUSB */ @@ -150,6 +151,25 @@ static const struct usb_device_id id_table[] = { { USB_DEVICE(0x1BE3, 0x07A6) }, /* WAGO 750-923 USB Service Cable */ { USB_DEVICE(0x1E29, 0x0102) }, /* Festo CPX-USB */ { USB_DEVICE(0x1E29, 0x0501) }, /* Festo CMSP */ + { USB_DEVICE(0x1FB9, 0x0100) }, /* Lake Shore Model 121 Current Source */ + { USB_DEVICE(0x1FB9, 0x0200) }, /* Lake Shore Model 218A Temperature Monitor */ + { USB_DEVICE(0x1FB9, 0x0201) }, /* Lake Shore Model 219 Temperature Monitor */ + { USB_DEVICE(0x1FB9, 0x0202) }, /* Lake Shore Model 233 Temperature Transmitter */ + { USB_DEVICE(0x1FB9, 0x0203) }, /* Lake Shore Model 235 Temperature Transmitter */ + { USB_DEVICE(0x1FB9, 0x0300) }, /* Lake Shore Model 335 Temperature Controller */ + { USB_DEVICE(0x1FB9, 0x0301) }, /* Lake Shore Model 336 Temperature Controller */ + { USB_DEVICE(0x1FB9, 0x0302) }, /* Lake Shore Model 350 Temperature Controller */ + { USB_DEVICE(0x1FB9, 0x0303) }, /* Lake Shore Model 371 AC Bridge */ + { USB_DEVICE(0x1FB9, 0x0400) }, /* Lake Shore Model 411 Handheld Gaussmeter */ + { USB_DEVICE(0x1FB9, 0x0401) }, /* Lake Shore Model 425 Gaussmeter */ + { USB_DEVICE(0x1FB9, 0x0402) }, /* Lake Shore Model 455A Gaussmeter */ + { USB_DEVICE(0x1FB9, 0x0403) }, /* Lake Shore Model 475A Gaussmeter */ + { USB_DEVICE(0x1FB9, 0x0404) }, /* Lake Shore Model 465 Three Axis Gaussmeter */ + { USB_DEVICE(0x1FB9, 0x0600) }, /* Lake Shore Model 625A Superconducting MPS */ + { USB_DEVICE(0x1FB9, 0x0601) }, /* Lake Shore Model 642A Magnet Power Supply */ + { USB_DEVICE(0x1FB9, 0x0602) }, /* Lake Shore Model 648 Magnet Power Supply */ + { USB_DEVICE(0x1FB9, 0x0700) }, /* Lake Shore Model 737 VSM Controller */ + { USB_DEVICE(0x1FB9, 0x0701) }, /* Lake Shore Model 776 Hall Matrix */ { USB_DEVICE(0x3195, 0xF190) }, /* Link Instruments MSO-19 */ { USB_DEVICE(0x3195, 0xF280) }, /* Link Instruments MSO-28 */ { USB_DEVICE(0x3195, 0xF281) }, /* Link Instruments MSO-28 */ diff --git a/drivers/usb/serial/cypress_m8.c b/drivers/usb/serial/cypress_m8.c index 8efa19d0e9fb..ba7352e4187e 100644 --- a/drivers/usb/serial/cypress_m8.c +++ b/drivers/usb/serial/cypress_m8.c @@ -111,7 +111,6 @@ struct cypress_private { int baud_rate; /* stores current baud rate in integer form */ int isthrottled; /* if throttled, discard reads */ - wait_queue_head_t delta_msr_wait; /* used for TIOCMIWAIT */ char prev_status, diff_status; /* used for TIOCMIWAIT */ /* we pass a pointer to this as the argument sent to cypress_set_termios old_termios */ @@ -449,7 +448,6 @@ static int cypress_generic_port_probe(struct usb_serial_port *port) kfree(priv); return -ENOMEM; } - init_waitqueue_head(&priv->delta_msr_wait); usb_reset_configuration(serial->dev); @@ -868,12 +866,16 @@ static int cypress_ioctl(struct tty_struct *tty, switch (cmd) { /* This code comes from drivers/char/serial.c and ftdi_sio.c */ case TIOCMIWAIT: - while (priv != NULL) { - interruptible_sleep_on(&priv->delta_msr_wait); + for (;;) { + interruptible_sleep_on(&port->delta_msr_wait); /* see if a signal did it */ if (signal_pending(current)) return -ERESTARTSYS; - else { + + if (port->serial->disconnected) + return -EIO; + + { char diff = priv->diff_status; if (diff == 0) return -EIO; /* no change => error */ @@ -1187,7 +1189,7 @@ static void cypress_read_int_callback(struct urb *urb) if (priv->current_status != priv->prev_status) { priv->diff_status |= priv->current_status ^ priv->prev_status; - wake_up_interruptible(&priv->delta_msr_wait); + wake_up_interruptible(&port->delta_msr_wait); priv->prev_status = priv->current_status; } spin_unlock_irqrestore(&priv->lock, flags); diff --git a/drivers/usb/serial/f81232.c b/drivers/usb/serial/f81232.c index b1b2dc64b50b..a172ad5c5ce8 100644 --- a/drivers/usb/serial/f81232.c +++ b/drivers/usb/serial/f81232.c @@ -47,7 +47,6 @@ MODULE_DEVICE_TABLE(usb, id_table); struct f81232_private { spinlock_t lock; - wait_queue_head_t delta_msr_wait; u8 line_control; u8 line_status; }; @@ -111,7 +110,7 @@ static void f81232_process_read_urb(struct urb *urb) line_status = priv->line_status; priv->line_status &= ~UART_STATE_TRANSIENT_MASK; spin_unlock_irqrestore(&priv->lock, flags); - wake_up_interruptible(&priv->delta_msr_wait); + wake_up_interruptible(&port->delta_msr_wait); if (!urb->actual_length) return; @@ -256,11 +255,14 @@ static int wait_modem_info(struct usb_serial_port *port, unsigned int arg) spin_unlock_irqrestore(&priv->lock, flags); while (1) { - interruptible_sleep_on(&priv->delta_msr_wait); + interruptible_sleep_on(&port->delta_msr_wait); /* see if a signal did it */ if (signal_pending(current)) return -ERESTARTSYS; + if (port->serial->disconnected) + return -EIO; + spin_lock_irqsave(&priv->lock, flags); status = priv->line_status; spin_unlock_irqrestore(&priv->lock, flags); @@ -322,7 +324,6 @@ static int f81232_port_probe(struct usb_serial_port *port) return -ENOMEM; spin_lock_init(&priv->lock); - init_waitqueue_head(&priv->delta_msr_wait); usb_set_serial_port_data(port, priv); diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c index edd162df49ca..9886180e45f1 100644 --- a/drivers/usb/serial/ftdi_sio.c +++ b/drivers/usb/serial/ftdi_sio.c @@ -69,9 +69,7 @@ struct ftdi_private { int flags; /* some ASYNC_xxxx flags are supported */ unsigned long last_dtr_rts; /* saved modem control outputs */ struct async_icount icount; - wait_queue_head_t delta_msr_wait; /* Used for TIOCMIWAIT */ char prev_status; /* Used for TIOCMIWAIT */ - bool dev_gone; /* Used to abort TIOCMIWAIT */ char transmit_empty; /* If transmitter is empty or not */ __u16 interface; /* FT2232C, FT2232H or FT4232H port interface (0 for FT232/245) */ @@ -642,6 +640,7 @@ static struct usb_device_id id_table_combined [] = { { USB_DEVICE(FTDI_VID, FTDI_RM_CANVIEW_PID) }, { USB_DEVICE(ACTON_VID, ACTON_SPECTRAPRO_PID) }, { USB_DEVICE(CONTEC_VID, CONTEC_COM1USBH_PID) }, + { USB_DEVICE(MITSUBISHI_VID, MITSUBISHI_FXUSB_PID) }, { USB_DEVICE(BANDB_VID, BANDB_USOTL4_PID) }, { USB_DEVICE(BANDB_VID, BANDB_USTL4_PID) }, { USB_DEVICE(BANDB_VID, BANDB_USO9ML2_PID) }, @@ -1691,10 +1690,8 @@ static int ftdi_sio_port_probe(struct usb_serial_port *port) kref_init(&priv->kref); mutex_init(&priv->cfg_lock); - init_waitqueue_head(&priv->delta_msr_wait); priv->flags = ASYNC_LOW_LATENCY; - priv->dev_gone = false; if (quirk && quirk->port_probe) quirk->port_probe(priv); @@ -1840,8 +1837,7 @@ static int ftdi_sio_port_remove(struct usb_serial_port *port) { struct ftdi_private *priv = usb_get_serial_port_data(port); - priv->dev_gone = true; - wake_up_interruptible_all(&priv->delta_msr_wait); + wake_up_interruptible(&port->delta_msr_wait); remove_sysfs_attrs(port); @@ -1989,7 +1985,7 @@ static int ftdi_process_packet(struct usb_serial_port *port, if (diff_status & FTDI_RS0_RLSD) priv->icount.dcd++; - wake_up_interruptible_all(&priv->delta_msr_wait); + wake_up_interruptible(&port->delta_msr_wait); priv->prev_status = status; } @@ -2440,11 +2436,15 @@ static int ftdi_ioctl(struct tty_struct *tty, */ case TIOCMIWAIT: cprev = priv->icount; - while (!priv->dev_gone) { - interruptible_sleep_on(&priv->delta_msr_wait); + for (;;) { + interruptible_sleep_on(&port->delta_msr_wait); /* see if a signal did it */ if (signal_pending(current)) return -ERESTARTSYS; + + if (port->serial->disconnected) + return -EIO; + cnow = priv->icount; if (((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) || ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) || @@ -2454,8 +2454,6 @@ static int ftdi_ioctl(struct tty_struct *tty, } cprev = cnow; } - return -EIO; - break; case TIOCSERGETLSR: return get_lsr_info(port, (struct serial_struct __user *)arg); break; diff --git a/drivers/usb/serial/ftdi_sio_ids.h b/drivers/usb/serial/ftdi_sio_ids.h index 9d359e189a64..e79861eeed4c 100644 --- a/drivers/usb/serial/ftdi_sio_ids.h +++ b/drivers/usb/serial/ftdi_sio_ids.h @@ -584,6 +584,13 @@ #define CONTEC_COM1USBH_PID 0x8311 /* COM-1(USB)H */ /* + * Mitsubishi Electric Corp. (http://www.meau.com) + * Submitted by Konstantin Holoborodko + */ +#define MITSUBISHI_VID 0x06D3 +#define MITSUBISHI_FXUSB_PID 0x0284 /* USB/RS422 converters: FX-USB-AW/-BD */ + +/* * Definitions for B&B Electronics products. */ #define BANDB_VID 0x0856 /* B&B Electronics Vendor ID */ diff --git a/drivers/usb/serial/garmin_gps.c b/drivers/usb/serial/garmin_gps.c index 1a07b12ef341..81caf5623ee2 100644 --- a/drivers/usb/serial/garmin_gps.c +++ b/drivers/usb/serial/garmin_gps.c @@ -956,10 +956,7 @@ static void garmin_close(struct usb_serial_port *port) if (!serial) return; - mutex_lock(&port->serial->disc_mutex); - - if (!port->serial->disconnected) - garmin_clear(garmin_data_p); + garmin_clear(garmin_data_p); /* shutdown our urbs */ usb_kill_urb(port->read_urb); @@ -968,8 +965,6 @@ static void garmin_close(struct usb_serial_port *port) /* keep reset state so we know that we must start a new session */ if (garmin_data_p->state != STATE_RESET) garmin_data_p->state = STATE_DISCONNECTED; - - mutex_unlock(&port->serial->disc_mutex); } diff --git a/drivers/usb/serial/io_edgeport.c b/drivers/usb/serial/io_edgeport.c index b00e5cbf741f..efd8b978128c 100644 --- a/drivers/usb/serial/io_edgeport.c +++ b/drivers/usb/serial/io_edgeport.c @@ -110,7 +110,6 @@ struct edgeport_port { wait_queue_head_t wait_chase; /* for handling sleeping while waiting for chase to finish */ wait_queue_head_t wait_open; /* for handling sleeping while waiting for open to finish */ wait_queue_head_t wait_command; /* for handling sleeping while waiting for command to finish */ - wait_queue_head_t delta_msr_wait; /* for handling sleeping while waiting for msr change to happen */ struct async_icount icount; struct usb_serial_port *port; /* loop back to the owner of this object */ @@ -884,7 +883,6 @@ static int edge_open(struct tty_struct *tty, struct usb_serial_port *port) /* initialize our wait queues */ init_waitqueue_head(&edge_port->wait_open); init_waitqueue_head(&edge_port->wait_chase); - init_waitqueue_head(&edge_port->delta_msr_wait); init_waitqueue_head(&edge_port->wait_command); /* initialize our icount structure */ @@ -1669,13 +1667,17 @@ static int edge_ioctl(struct tty_struct *tty, dev_dbg(&port->dev, "%s (%d) TIOCMIWAIT\n", __func__, port->number); cprev = edge_port->icount; while (1) { - prepare_to_wait(&edge_port->delta_msr_wait, + prepare_to_wait(&port->delta_msr_wait, &wait, TASK_INTERRUPTIBLE); schedule(); - finish_wait(&edge_port->delta_msr_wait, &wait); + finish_wait(&port->delta_msr_wait, &wait); /* see if a signal did it */ if (signal_pending(current)) return -ERESTARTSYS; + + if (port->serial->disconnected) + return -EIO; + cnow = edge_port->icount; if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr && cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) @@ -2051,7 +2053,7 @@ static void handle_new_msr(struct edgeport_port *edge_port, __u8 newMsr) icount->dcd++; if (newMsr & EDGEPORT_MSR_DELTA_RI) icount->rng++; - wake_up_interruptible(&edge_port->delta_msr_wait); + wake_up_interruptible(&edge_port->port->delta_msr_wait); } /* Save the new modem status */ diff --git a/drivers/usb/serial/io_ti.c b/drivers/usb/serial/io_ti.c index c23776679f70..7777172206de 100644 --- a/drivers/usb/serial/io_ti.c +++ b/drivers/usb/serial/io_ti.c @@ -87,9 +87,6 @@ struct edgeport_port { int close_pending; int lsr_event; struct async_icount icount; - wait_queue_head_t delta_msr_wait; /* for handling sleeping while - waiting for msr change to - happen */ struct edgeport_serial *edge_serial; struct usb_serial_port *port; __u8 bUartMode; /* Port type, 0: RS232, etc. */ @@ -1459,7 +1456,7 @@ static void handle_new_msr(struct edgeport_port *edge_port, __u8 msr) icount->dcd++; if (msr & EDGEPORT_MSR_DELTA_RI) icount->rng++; - wake_up_interruptible(&edge_port->delta_msr_wait); + wake_up_interruptible(&edge_port->port->delta_msr_wait); } /* Save the new modem status */ @@ -1754,7 +1751,6 @@ static int edge_open(struct tty_struct *tty, struct usb_serial_port *port) dev = port->serial->dev; memset(&(edge_port->icount), 0x00, sizeof(edge_port->icount)); - init_waitqueue_head(&edge_port->delta_msr_wait); /* turn off loopback */ status = ti_do_config(edge_port, UMPC_SET_CLR_LOOPBACK, 0); @@ -2434,10 +2430,14 @@ static int edge_ioctl(struct tty_struct *tty, dev_dbg(&port->dev, "%s - TIOCMIWAIT\n", __func__); cprev = edge_port->icount; while (1) { - interruptible_sleep_on(&edge_port->delta_msr_wait); + interruptible_sleep_on(&port->delta_msr_wait); /* see if a signal did it */ if (signal_pending(current)) return -ERESTARTSYS; + + if (port->serial->disconnected) + return -EIO; + cnow = edge_port->icount; if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr && cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) @@ -2649,6 +2649,7 @@ static struct usb_serial_driver edgeport_2port_device = { .set_termios = edge_set_termios, .tiocmget = edge_tiocmget, .tiocmset = edge_tiocmset, + .get_icount = edge_get_icount, .write = edge_write, .write_room = edge_write_room, .chars_in_buffer = edge_chars_in_buffer, diff --git a/drivers/usb/serial/mct_u232.c b/drivers/usb/serial/mct_u232.c index a64d420f687b..06d5a60be2c4 100644 --- a/drivers/usb/serial/mct_u232.c +++ b/drivers/usb/serial/mct_u232.c @@ -114,8 +114,6 @@ struct mct_u232_private { unsigned char last_msr; /* Modem Status Register */ unsigned int rx_flags; /* Throttling flags */ struct async_icount icount; - wait_queue_head_t msr_wait; /* for handling sleeping while waiting - for msr change to happen */ }; #define THROTTLED 0x01 @@ -409,7 +407,6 @@ static int mct_u232_port_probe(struct usb_serial_port *port) return -ENOMEM; spin_lock_init(&priv->lock); - init_waitqueue_head(&priv->msr_wait); usb_set_serial_port_data(port, priv); @@ -601,7 +598,7 @@ static void mct_u232_read_int_callback(struct urb *urb) tty_kref_put(tty); } #endif - wake_up_interruptible(&priv->msr_wait); + wake_up_interruptible(&port->delta_msr_wait); spin_unlock_irqrestore(&priv->lock, flags); exit: retval = usb_submit_urb(urb, GFP_ATOMIC); @@ -810,13 +807,17 @@ static int mct_u232_ioctl(struct tty_struct *tty, cprev = mct_u232_port->icount; spin_unlock_irqrestore(&mct_u232_port->lock, flags); for ( ; ; ) { - prepare_to_wait(&mct_u232_port->msr_wait, + prepare_to_wait(&port->delta_msr_wait, &wait, TASK_INTERRUPTIBLE); schedule(); - finish_wait(&mct_u232_port->msr_wait, &wait); + finish_wait(&port->delta_msr_wait, &wait); /* see if a signal did it */ if (signal_pending(current)) return -ERESTARTSYS; + + if (port->serial->disconnected) + return -EIO; + spin_lock_irqsave(&mct_u232_port->lock, flags); cnow = mct_u232_port->icount; spin_unlock_irqrestore(&mct_u232_port->lock, flags); diff --git a/drivers/usb/serial/mos7840.c b/drivers/usb/serial/mos7840.c index 809fb329eca5..b8051fa61911 100644 --- a/drivers/usb/serial/mos7840.c +++ b/drivers/usb/serial/mos7840.c @@ -219,7 +219,6 @@ struct moschip_port { char open; char open_ports; wait_queue_head_t wait_chase; /* for handling sleeping while waiting for chase to finish */ - wait_queue_head_t delta_msr_wait; /* for handling sleeping while waiting for msr change to happen */ int delta_msr_cond; struct async_icount icount; struct usb_serial_port *port; /* loop back to the owner of this object */ @@ -423,6 +422,9 @@ static void mos7840_handle_new_msr(struct moschip_port *port, __u8 new_msr) icount->rng++; smp_wmb(); } + + mos7840_port->delta_msr_cond = 1; + wake_up_interruptible(&port->port->delta_msr_wait); } } @@ -1127,7 +1129,6 @@ static int mos7840_open(struct tty_struct *tty, struct usb_serial_port *port) /* initialize our wait queues */ init_waitqueue_head(&mos7840_port->wait_chase); - init_waitqueue_head(&mos7840_port->delta_msr_wait); /* initialize our icount structure */ memset(&(mos7840_port->icount), 0x00, sizeof(mos7840_port->icount)); @@ -2017,8 +2018,6 @@ static void mos7840_change_port_settings(struct tty_struct *tty, mos7840_port->read_urb_busy = false; } } - wake_up(&mos7840_port->delta_msr_wait); - mos7840_port->delta_msr_cond = 1; dev_dbg(&port->dev, "%s - mos7840_port->shadowLCR is End %x\n", __func__, mos7840_port->shadowLCR); } @@ -2219,13 +2218,18 @@ static int mos7840_ioctl(struct tty_struct *tty, while (1) { /* interruptible_sleep_on(&mos7840_port->delta_msr_wait); */ mos7840_port->delta_msr_cond = 0; - wait_event_interruptible(mos7840_port->delta_msr_wait, - (mos7840_port-> + wait_event_interruptible(port->delta_msr_wait, + (port->serial->disconnected || + mos7840_port-> delta_msr_cond == 1)); /* see if a signal did it */ if (signal_pending(current)) return -ERESTARTSYS; + + if (port->serial->disconnected) + return -EIO; + cnow = mos7840_port->icount; smp_rmb(); if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr && diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c index f7d339d8187b..558adfc05007 100644 --- a/drivers/usb/serial/option.c +++ b/drivers/usb/serial/option.c @@ -341,6 +341,8 @@ static void option_instat_callback(struct urb *urb); #define CINTERION_PRODUCT_EU3_E 0x0051 #define CINTERION_PRODUCT_EU3_P 0x0052 #define CINTERION_PRODUCT_PH8 0x0053 +#define CINTERION_PRODUCT_AH6 0x0055 +#define CINTERION_PRODUCT_PLS8 0x0060 /* Olivetti products */ #define OLIVETTI_VENDOR_ID 0x0b3c @@ -579,6 +581,7 @@ static const struct usb_device_id option_ids[] = { { USB_DEVICE(QUANTA_VENDOR_ID, 0xea42), .driver_info = (kernel_ulong_t)&net_intf4_blacklist }, { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0x1c05, USB_CLASS_COMM, 0x02, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0x1c1f, USB_CLASS_COMM, 0x02, 0xff) }, { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0x1c23, USB_CLASS_COMM, 0x02, 0xff) }, { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E173, 0xff, 0xff, 0xff), .driver_info = (kernel_ulong_t) &net_intf1_blacklist }, @@ -1260,6 +1263,8 @@ static const struct usb_device_id option_ids[] = { { USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_EU3_E) }, { USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_EU3_P) }, { USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_PH8) }, + { USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_AH6) }, + { USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_PLS8) }, { USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_HC28_MDM) }, { USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_HC28_MDMNET) }, { USB_DEVICE(SIEMENS_VENDOR_ID, CINTERION_PRODUCT_HC25_MDM) }, diff --git a/drivers/usb/serial/oti6858.c b/drivers/usb/serial/oti6858.c index a958fd41b5b3..87c71ccfee87 100644 --- a/drivers/usb/serial/oti6858.c +++ b/drivers/usb/serial/oti6858.c @@ -188,7 +188,6 @@ struct oti6858_private { u8 setup_done; struct delayed_work delayed_setup_work; - wait_queue_head_t intr_wait; struct usb_serial_port *port; /* USB port with which associated */ }; @@ -339,7 +338,6 @@ static int oti6858_port_probe(struct usb_serial_port *port) return -ENOMEM; spin_lock_init(&priv->lock); - init_waitqueue_head(&priv->intr_wait); priv->port = port; INIT_DELAYED_WORK(&priv->delayed_setup_work, setup_line); INIT_DELAYED_WORK(&priv->delayed_write_work, send_data); @@ -664,11 +662,15 @@ static int wait_modem_info(struct usb_serial_port *port, unsigned int arg) spin_unlock_irqrestore(&priv->lock, flags); while (1) { - wait_event_interruptible(priv->intr_wait, + wait_event_interruptible(port->delta_msr_wait, + port->serial->disconnected || priv->status.pin_state != prev); if (signal_pending(current)) return -ERESTARTSYS; + if (port->serial->disconnected) + return -EIO; + spin_lock_irqsave(&priv->lock, flags); status = priv->status.pin_state & PIN_MASK; spin_unlock_irqrestore(&priv->lock, flags); @@ -763,7 +765,7 @@ static void oti6858_read_int_callback(struct urb *urb) if (!priv->transient) { if (xs->pin_state != priv->status.pin_state) - wake_up_interruptible(&priv->intr_wait); + wake_up_interruptible(&port->delta_msr_wait); memcpy(&priv->status, xs, OTI6858_CTRL_PKT_SIZE); } diff --git a/drivers/usb/serial/pl2303.c b/drivers/usb/serial/pl2303.c index 54adc9125e5c..3b10018d89a3 100644 --- a/drivers/usb/serial/pl2303.c +++ b/drivers/usb/serial/pl2303.c @@ -139,7 +139,6 @@ struct pl2303_serial_private { struct pl2303_private { spinlock_t lock; - wait_queue_head_t delta_msr_wait; u8 line_control; u8 line_status; }; @@ -233,7 +232,6 @@ static int pl2303_port_probe(struct usb_serial_port *port) return -ENOMEM; spin_lock_init(&priv->lock); - init_waitqueue_head(&priv->delta_msr_wait); usb_set_serial_port_data(port, priv); @@ -607,11 +605,14 @@ static int wait_modem_info(struct usb_serial_port *port, unsigned int arg) spin_unlock_irqrestore(&priv->lock, flags); while (1) { - interruptible_sleep_on(&priv->delta_msr_wait); + interruptible_sleep_on(&port->delta_msr_wait); /* see if a signal did it */ if (signal_pending(current)) return -ERESTARTSYS; + if (port->serial->disconnected) + return -EIO; + spin_lock_irqsave(&priv->lock, flags); status = priv->line_status; spin_unlock_irqrestore(&priv->lock, flags); @@ -719,7 +720,7 @@ static void pl2303_update_line_status(struct usb_serial_port *port, spin_unlock_irqrestore(&priv->lock, flags); if (priv->line_status & UART_BREAK_ERROR) usb_serial_handle_break(port); - wake_up_interruptible(&priv->delta_msr_wait); + wake_up_interruptible(&port->delta_msr_wait); tty = tty_port_tty_get(&port->port); if (!tty) @@ -783,7 +784,7 @@ static void pl2303_process_read_urb(struct urb *urb) line_status = priv->line_status; priv->line_status &= ~UART_STATE_TRANSIENT_MASK; spin_unlock_irqrestore(&priv->lock, flags); - wake_up_interruptible(&priv->delta_msr_wait); + wake_up_interruptible(&port->delta_msr_wait); if (!urb->actual_length) return; diff --git a/drivers/usb/serial/qcaux.c b/drivers/usb/serial/qcaux.c index 9b1b96f2d095..31f81c3c15eb 100644 --- a/drivers/usb/serial/qcaux.c +++ b/drivers/usb/serial/qcaux.c @@ -69,6 +69,7 @@ static struct usb_device_id id_table[] = { { USB_VENDOR_AND_INTERFACE_INFO(UTSTARCOM_VENDOR_ID, 0xff, 0xfd, 0xff) }, /* NMEA */ { USB_VENDOR_AND_INTERFACE_INFO(UTSTARCOM_VENDOR_ID, 0xff, 0xfe, 0xff) }, /* WMC */ { USB_VENDOR_AND_INTERFACE_INFO(UTSTARCOM_VENDOR_ID, 0xff, 0xff, 0xff) }, /* DIAG */ + { USB_DEVICE_AND_INTERFACE_INFO(0x1fac, 0x0151, 0xff, 0xff, 0xff) }, { }, }; MODULE_DEVICE_TABLE(usb, id_table); diff --git a/drivers/usb/serial/qcserial.c b/drivers/usb/serial/qcserial.c index 24662547dc5b..59b32b782126 100644 --- a/drivers/usb/serial/qcserial.c +++ b/drivers/usb/serial/qcserial.c @@ -197,12 +197,15 @@ static int qcprobe(struct usb_serial *serial, const struct usb_device_id *id) if (is_gobi1k) { /* Gobi 1K USB layout: - * 0: serial port (doesn't respond) + * 0: DM/DIAG (use libqcdm from ModemManager for communication) * 1: serial port (doesn't respond) * 2: AT-capable modem port * 3: QMI/net */ - if (ifnum == 2) + if (ifnum == 0) { + dev_dbg(dev, "Gobi 1K DM/DIAG interface found\n"); + altsetting = 1; + } else if (ifnum == 2) dev_dbg(dev, "Modem port found\n"); else altsetting = -1; diff --git a/drivers/usb/serial/quatech2.c b/drivers/usb/serial/quatech2.c index 00e6c9bac8a3..75f125ddb0c9 100644 --- a/drivers/usb/serial/quatech2.c +++ b/drivers/usb/serial/quatech2.c @@ -128,7 +128,6 @@ struct qt2_port_private { u8 shadowLSR; u8 shadowMSR; - wait_queue_head_t delta_msr_wait; /* Used for TIOCMIWAIT */ struct async_icount icount; struct usb_serial_port *port; @@ -506,8 +505,9 @@ static int wait_modem_info(struct usb_serial_port *port, unsigned int arg) spin_unlock_irqrestore(&priv->lock, flags); while (1) { - wait_event_interruptible(priv->delta_msr_wait, - ((priv->icount.rng != prev.rng) || + wait_event_interruptible(port->delta_msr_wait, + (port->serial->disconnected || + (priv->icount.rng != prev.rng) || (priv->icount.dsr != prev.dsr) || (priv->icount.dcd != prev.dcd) || (priv->icount.cts != prev.cts))); @@ -515,6 +515,9 @@ static int wait_modem_info(struct usb_serial_port *port, unsigned int arg) if (signal_pending(current)) return -ERESTARTSYS; + if (port->serial->disconnected) + return -EIO; + spin_lock_irqsave(&priv->lock, flags); cur = priv->icount; spin_unlock_irqrestore(&priv->lock, flags); @@ -661,7 +664,9 @@ void qt2_process_read_urb(struct urb *urb) __func__); break; } - tty_flip_buffer_push(&port->port); + + if (port_priv->is_open) + tty_flip_buffer_push(&port->port); newport = *(ch + 3); @@ -704,7 +709,8 @@ void qt2_process_read_urb(struct urb *urb) tty_insert_flip_string(&port->port, ch, 1); } - tty_flip_buffer_push(&port->port); + if (port_priv->is_open) + tty_flip_buffer_push(&port->port); } static void qt2_write_bulk_callback(struct urb *urb) @@ -824,7 +830,6 @@ static int qt2_port_probe(struct usb_serial_port *port) spin_lock_init(&port_priv->lock); spin_lock_init(&port_priv->urb_lock); - init_waitqueue_head(&port_priv->delta_msr_wait); port_priv->port = port; port_priv->write_urb = usb_alloc_urb(0, GFP_KERNEL); @@ -967,7 +972,7 @@ static void qt2_update_msr(struct usb_serial_port *port, unsigned char *ch) if (newMSR & UART_MSR_TERI) port_priv->icount.rng++; - wake_up_interruptible(&port_priv->delta_msr_wait); + wake_up_interruptible(&port->delta_msr_wait); } } diff --git a/drivers/usb/serial/spcp8x5.c b/drivers/usb/serial/spcp8x5.c index 91ff8e3bddbd..549ef68ff5fa 100644 --- a/drivers/usb/serial/spcp8x5.c +++ b/drivers/usb/serial/spcp8x5.c @@ -149,7 +149,6 @@ enum spcp8x5_type { struct spcp8x5_private { spinlock_t lock; enum spcp8x5_type type; - wait_queue_head_t delta_msr_wait; u8 line_control; u8 line_status; }; @@ -179,7 +178,6 @@ static int spcp8x5_port_probe(struct usb_serial_port *port) return -ENOMEM; spin_lock_init(&priv->lock); - init_waitqueue_head(&priv->delta_msr_wait); priv->type = type; usb_set_serial_port_data(port , priv); @@ -475,7 +473,7 @@ static void spcp8x5_process_read_urb(struct urb *urb) priv->line_status &= ~UART_STATE_TRANSIENT_MASK; spin_unlock_irqrestore(&priv->lock, flags); /* wake up the wait for termios */ - wake_up_interruptible(&priv->delta_msr_wait); + wake_up_interruptible(&port->delta_msr_wait); if (!urb->actual_length) return; @@ -526,12 +524,15 @@ static int spcp8x5_wait_modem_info(struct usb_serial_port *port, while (1) { /* wake up in bulk read */ - interruptible_sleep_on(&priv->delta_msr_wait); + interruptible_sleep_on(&port->delta_msr_wait); /* see if a signal did it */ if (signal_pending(current)) return -ERESTARTSYS; + if (port->serial->disconnected) + return -EIO; + spin_lock_irqsave(&priv->lock, flags); status = priv->line_status; spin_unlock_irqrestore(&priv->lock, flags); diff --git a/drivers/usb/serial/ssu100.c b/drivers/usb/serial/ssu100.c index b57cf841c5b6..4b2a19757b4d 100644 --- a/drivers/usb/serial/ssu100.c +++ b/drivers/usb/serial/ssu100.c @@ -61,7 +61,6 @@ struct ssu100_port_private { spinlock_t status_lock; u8 shadowLSR; u8 shadowMSR; - wait_queue_head_t delta_msr_wait; /* Used for TIOCMIWAIT */ struct async_icount icount; }; @@ -355,8 +354,9 @@ static int wait_modem_info(struct usb_serial_port *port, unsigned int arg) spin_unlock_irqrestore(&priv->status_lock, flags); while (1) { - wait_event_interruptible(priv->delta_msr_wait, - ((priv->icount.rng != prev.rng) || + wait_event_interruptible(port->delta_msr_wait, + (port->serial->disconnected || + (priv->icount.rng != prev.rng) || (priv->icount.dsr != prev.dsr) || (priv->icount.dcd != prev.dcd) || (priv->icount.cts != prev.cts))); @@ -364,6 +364,9 @@ static int wait_modem_info(struct usb_serial_port *port, unsigned int arg) if (signal_pending(current)) return -ERESTARTSYS; + if (port->serial->disconnected) + return -EIO; + spin_lock_irqsave(&priv->status_lock, flags); cur = priv->icount; spin_unlock_irqrestore(&priv->status_lock, flags); @@ -445,7 +448,6 @@ static int ssu100_port_probe(struct usb_serial_port *port) return -ENOMEM; spin_lock_init(&priv->status_lock); - init_waitqueue_head(&priv->delta_msr_wait); usb_set_serial_port_data(port, priv); @@ -537,7 +539,7 @@ static void ssu100_update_msr(struct usb_serial_port *port, u8 msr) priv->icount.dcd++; if (msr & UART_MSR_TERI) priv->icount.rng++; - wake_up_interruptible(&priv->delta_msr_wait); + wake_up_interruptible(&port->delta_msr_wait); } } diff --git a/drivers/usb/serial/ti_usb_3410_5052.c b/drivers/usb/serial/ti_usb_3410_5052.c index 39cb9b807c3c..73deb029fc05 100644 --- a/drivers/usb/serial/ti_usb_3410_5052.c +++ b/drivers/usb/serial/ti_usb_3410_5052.c @@ -74,7 +74,6 @@ struct ti_port { int tp_flags; int tp_closing_wait;/* in .01 secs */ struct async_icount tp_icount; - wait_queue_head_t tp_msr_wait; /* wait for msr change */ wait_queue_head_t tp_write_wait; struct ti_device *tp_tdev; struct usb_serial_port *tp_port; @@ -432,7 +431,6 @@ static int ti_port_probe(struct usb_serial_port *port) else tport->tp_uart_base_addr = TI_UART2_BASE_ADDR; tport->tp_closing_wait = closing_wait; - init_waitqueue_head(&tport->tp_msr_wait); init_waitqueue_head(&tport->tp_write_wait); if (kfifo_alloc(&tport->write_fifo, TI_WRITE_BUF_SIZE, GFP_KERNEL)) { kfree(tport); @@ -784,9 +782,13 @@ static int ti_ioctl(struct tty_struct *tty, dev_dbg(&port->dev, "%s - TIOCMIWAIT\n", __func__); cprev = tport->tp_icount; while (1) { - interruptible_sleep_on(&tport->tp_msr_wait); + interruptible_sleep_on(&port->delta_msr_wait); if (signal_pending(current)) return -ERESTARTSYS; + + if (port->serial->disconnected) + return -EIO; + cnow = tport->tp_icount; if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr && cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) @@ -1392,7 +1394,7 @@ static void ti_handle_new_msr(struct ti_port *tport, __u8 msr) icount->dcd++; if (msr & TI_MSR_DELTA_RI) icount->rng++; - wake_up_interruptible(&tport->tp_msr_wait); + wake_up_interruptible(&tport->tp_port->delta_msr_wait); spin_unlock_irqrestore(&tport->tp_lock, flags); } diff --git a/drivers/usb/serial/usb-serial.c b/drivers/usb/serial/usb-serial.c index a19ed74d770d..5d9b178484fd 100644 --- a/drivers/usb/serial/usb-serial.c +++ b/drivers/usb/serial/usb-serial.c @@ -151,6 +151,7 @@ static void destroy_serial(struct kref *kref) } } + usb_put_intf(serial->interface); usb_put_dev(serial->dev); kfree(serial); } @@ -620,7 +621,7 @@ static struct usb_serial *create_serial(struct usb_device *dev, } serial->dev = usb_get_dev(dev); serial->type = driver; - serial->interface = interface; + serial->interface = usb_get_intf(interface); kref_init(&serial->kref); mutex_init(&serial->disc_mutex); serial->minor = SERIAL_TTY_NO_MINOR; @@ -902,6 +903,7 @@ static int usb_serial_probe(struct usb_interface *interface, port->port.ops = &serial_port_ops; port->serial = serial; spin_lock_init(&port->lock); + init_waitqueue_head(&port->delta_msr_wait); /* Keep this for private driver use for the moment but should probably go away */ INIT_WORK(&port->work, usb_serial_port_work); diff --git a/drivers/usb/storage/initializers.c b/drivers/usb/storage/initializers.c index 7ab9046ae0ec..105d900150c1 100644 --- a/drivers/usb/storage/initializers.c +++ b/drivers/usb/storage/initializers.c @@ -92,8 +92,8 @@ int usb_stor_ucr61s2b_init(struct us_data *us) return 0; } -/* This places the HUAWEI usb dongles in multi-port mode */ -static int usb_stor_huawei_feature_init(struct us_data *us) +/* This places the HUAWEI E220 devices in multi-port mode */ +int usb_stor_huawei_e220_init(struct us_data *us) { int result; @@ -104,75 +104,3 @@ static int usb_stor_huawei_feature_init(struct us_data *us) US_DEBUGP("Huawei mode set result is %d\n", result); return 0; } - -/* - * It will send a scsi switch command called rewind' to huawei dongle. - * When the dongle receives this command at the first time, - * it will reboot immediately. After rebooted, it will ignore this command. - * So it is unnecessary to read its response. - */ -static int usb_stor_huawei_scsi_init(struct us_data *us) -{ - int result = 0; - int act_len = 0; - struct bulk_cb_wrap *bcbw = (struct bulk_cb_wrap *) us->iobuf; - char rewind_cmd[] = {0x11, 0x06, 0x20, 0x00, 0x00, 0x01, 0x01, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; - - bcbw->Signature = cpu_to_le32(US_BULK_CB_SIGN); - bcbw->Tag = 0; - bcbw->DataTransferLength = 0; - bcbw->Flags = bcbw->Lun = 0; - bcbw->Length = sizeof(rewind_cmd); - memset(bcbw->CDB, 0, sizeof(bcbw->CDB)); - memcpy(bcbw->CDB, rewind_cmd, sizeof(rewind_cmd)); - - result = usb_stor_bulk_transfer_buf(us, us->send_bulk_pipe, bcbw, - US_BULK_CB_WRAP_LEN, &act_len); - US_DEBUGP("transfer actual length=%d, result=%d\n", act_len, result); - return result; -} - -/* - * It tries to find the supported Huawei USB dongles. - * In Huawei, they assign the following product IDs - * for all of their mobile broadband dongles, - * including the new dongles in the future. - * So if the product ID is not included in this list, - * it means it is not Huawei's mobile broadband dongles. - */ -static int usb_stor_huawei_dongles_pid(struct us_data *us) -{ - struct usb_interface_descriptor *idesc; - int idProduct; - - idesc = &us->pusb_intf->cur_altsetting->desc; - idProduct = le16_to_cpu(us->pusb_dev->descriptor.idProduct); - /* The first port is CDROM, - * means the dongle in the single port mode, - * and a switch command is required to be sent. */ - if (idesc && idesc->bInterfaceNumber == 0) { - if ((idProduct == 0x1001) - || (idProduct == 0x1003) - || (idProduct == 0x1004) - || (idProduct >= 0x1401 && idProduct <= 0x1500) - || (idProduct >= 0x1505 && idProduct <= 0x1600) - || (idProduct >= 0x1c02 && idProduct <= 0x2202)) { - return 1; - } - } - return 0; -} - -int usb_stor_huawei_init(struct us_data *us) -{ - int result = 0; - - if (usb_stor_huawei_dongles_pid(us)) { - if (le16_to_cpu(us->pusb_dev->descriptor.idProduct) >= 0x1446) - result = usb_stor_huawei_scsi_init(us); - else - result = usb_stor_huawei_feature_init(us); - } - return result; -} diff --git a/drivers/usb/storage/initializers.h b/drivers/usb/storage/initializers.h index 5376d4fc76f0..529327fbb06b 100644 --- a/drivers/usb/storage/initializers.h +++ b/drivers/usb/storage/initializers.h @@ -46,5 +46,5 @@ int usb_stor_euscsi_init(struct us_data *us); * flash reader */ int usb_stor_ucr61s2b_init(struct us_data *us); -/* This places the HUAWEI usb dongles in multi-port mode */ -int usb_stor_huawei_init(struct us_data *us); +/* This places the HUAWEI E220 devices in multi-port mode */ +int usb_stor_huawei_e220_init(struct us_data *us); diff --git a/drivers/usb/storage/unusual_devs.h b/drivers/usb/storage/unusual_devs.h index 72923b56bbf6..1799335288bd 100644 --- a/drivers/usb/storage/unusual_devs.h +++ b/drivers/usb/storage/unusual_devs.h @@ -53,6 +53,14 @@ * as opposed to devices that do something strangely or wrongly. */ +/* In-kernel mode switching is deprecated. Do not add new devices to + * this list for the sole purpose of switching them to a different + * mode. Existing userspace solutions are superior. + * + * New mode switching devices should instead be added to the database + * maintained at http://www.draisberghof.de/usb_modeswitch/ + */ + #if !defined(CONFIG_USB_STORAGE_SDDR09) && \ !defined(CONFIG_USB_STORAGE_SDDR09_MODULE) #define NO_SDDR09 @@ -488,6 +496,13 @@ UNUSUAL_DEV( 0x04e8, 0x5122, 0x0000, 0x9999, USB_SC_DEVICE, USB_PR_DEVICE, NULL, US_FL_MAX_SECTORS_64 | US_FL_BULK_IGNORE_TAG), +/* Added by Dmitry Artamonow <mad_soft@inbox.ru> */ +UNUSUAL_DEV( 0x04e8, 0x5136, 0x0000, 0x9999, + "Samsung", + "YP-Z3", + USB_SC_DEVICE, USB_PR_DEVICE, NULL, + US_FL_MAX_SECTORS_64), + /* Entry and supporting patch by Theodore Kilgore <kilgota@auburn.edu>. * Device uses standards-violating 32-byte Bulk Command Block Wrappers and * reports itself as "Proprietary SCSI Bulk." Cf. device entry 0x084d:0x0011. @@ -1527,10 +1542,335 @@ UNUSUAL_DEV( 0x1210, 0x0003, 0x0100, 0x0100, /* Reported by fangxiaozhi <huananhu@huawei.com> * This brings the HUAWEI data card devices into multi-port mode */ -UNUSUAL_VENDOR_INTF(0x12d1, 0x08, 0x06, 0x50, +UNUSUAL_DEV( 0x12d1, 0x1001, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1003, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1004, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1401, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1402, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1403, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1404, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1405, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1406, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1407, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1408, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1409, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x140A, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x140B, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x140C, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x140D, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x140E, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x140F, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1410, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1411, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1412, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1413, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1414, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1415, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1416, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1417, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1418, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1419, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x141A, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x141B, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x141C, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x141D, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x141E, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x141F, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1420, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1421, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1422, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1423, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1424, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1425, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1426, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1427, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1428, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1429, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x142A, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x142B, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x142C, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x142D, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x142E, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x142F, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1430, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1431, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1432, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1433, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1434, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1435, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1436, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1437, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1438, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x1439, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x143A, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x143B, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x143C, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x143D, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x143E, 0x0000, 0x0000, + "HUAWEI MOBILE", + "Mass Storage", + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, + 0), +UNUSUAL_DEV( 0x12d1, 0x143F, 0x0000, 0x0000, "HUAWEI MOBILE", "Mass Storage", - USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_init, + USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_huawei_e220_init, 0), /* Reported by Vilius Bilinkevicius <vilisas AT xxx DOT lt) */ diff --git a/drivers/vfio/pci/vfio_pci_config.c b/drivers/vfio/pci/vfio_pci_config.c index 964ff22bf281..aeb00fc2d3be 100644 --- a/drivers/vfio/pci/vfio_pci_config.c +++ b/drivers/vfio/pci/vfio_pci_config.c @@ -27,6 +27,7 @@ #include <linux/pci.h> #include <linux/uaccess.h> #include <linux/vfio.h> +#include <linux/slab.h> #include "vfio_pci_private.h" diff --git a/drivers/vfio/pci/vfio_pci_intrs.c b/drivers/vfio/pci/vfio_pci_intrs.c index 3639371fa697..a96509187deb 100644 --- a/drivers/vfio/pci/vfio_pci_intrs.c +++ b/drivers/vfio/pci/vfio_pci_intrs.c @@ -22,6 +22,7 @@ #include <linux/vfio.h> #include <linux/wait.h> #include <linux/workqueue.h> +#include <linux/slab.h> #include "vfio_pci_private.h" diff --git a/drivers/vhost/net.c b/drivers/vhost/net.c index 959b1cd89e6a..ec6fb3fa59bb 100644 --- a/drivers/vhost/net.c +++ b/drivers/vhost/net.c @@ -339,7 +339,8 @@ static void handle_tx(struct vhost_net *net) msg.msg_controllen = 0; ubufs = NULL; } else { - struct ubuf_info *ubuf = &vq->ubuf_info[head]; + struct ubuf_info *ubuf; + ubuf = vq->ubuf_info + vq->upend_idx; vq->heads[vq->upend_idx].len = VHOST_DMA_IN_PROGRESS; diff --git a/drivers/vhost/tcm_vhost.c b/drivers/vhost/tcm_vhost.c index 9951297b2427..2968b4934659 100644 --- a/drivers/vhost/tcm_vhost.c +++ b/drivers/vhost/tcm_vhost.c @@ -60,6 +60,15 @@ enum { VHOST_SCSI_VQ_IO = 2, }; +/* + * VIRTIO_RING_F_EVENT_IDX seems broken. Not sure the bug is in + * kernel but disabling it helps. + * TODO: debug and remove the workaround. + */ +enum { + VHOST_SCSI_FEATURES = VHOST_FEATURES & (~VIRTIO_RING_F_EVENT_IDX) +}; + #define VHOST_SCSI_MAX_TARGET 256 #define VHOST_SCSI_MAX_VQ 128 @@ -850,7 +859,7 @@ static int vhost_scsi_clear_endpoint( for (index = 0; index < vs->dev.nvqs; ++index) { if (!vhost_vq_access_ok(&vs->vqs[index])) { ret = -EFAULT; - goto err; + goto err_dev; } } for (i = 0; i < VHOST_SCSI_MAX_TARGET; i++) { @@ -860,10 +869,11 @@ static int vhost_scsi_clear_endpoint( if (!tv_tpg) continue; + mutex_lock(&tv_tpg->tv_tpg_mutex); tv_tport = tv_tpg->tport; if (!tv_tport) { ret = -ENODEV; - goto err; + goto err_tpg; } if (strcmp(tv_tport->tport_name, t->vhost_wwpn)) { @@ -872,16 +882,19 @@ static int vhost_scsi_clear_endpoint( tv_tport->tport_name, tv_tpg->tport_tpgt, t->vhost_wwpn, t->vhost_tpgt); ret = -EINVAL; - goto err; + goto err_tpg; } tv_tpg->tv_tpg_vhost_count--; vs->vs_tpg[target] = NULL; vs->vs_endpoint = false; + mutex_unlock(&tv_tpg->tv_tpg_mutex); } mutex_unlock(&vs->dev.mutex); return 0; -err: +err_tpg: + mutex_unlock(&tv_tpg->tv_tpg_mutex); +err_dev: mutex_unlock(&vs->dev.mutex); return ret; } @@ -937,11 +950,12 @@ static void vhost_scsi_flush(struct vhost_scsi *vs) for (i = 0; i < VHOST_SCSI_MAX_VQ; i++) vhost_scsi_flush_vq(vs, i); + vhost_work_flush(&vs->dev, &vs->vs_completion_work); } static int vhost_scsi_set_features(struct vhost_scsi *vs, u64 features) { - if (features & ~VHOST_FEATURES) + if (features & ~VHOST_SCSI_FEATURES) return -EOPNOTSUPP; mutex_lock(&vs->dev.mutex); @@ -987,7 +1001,7 @@ static long vhost_scsi_ioctl(struct file *f, unsigned int ioctl, return -EFAULT; return 0; case VHOST_GET_FEATURES: - features = VHOST_FEATURES; + features = VHOST_SCSI_FEATURES; if (copy_to_user(featurep, &features, sizeof features)) return -EFAULT; return 0; diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c index 12cf5f31ee8f..025428e04c33 100644 --- a/drivers/video/atmel_lcdfb.c +++ b/drivers/video/atmel_lcdfb.c @@ -422,17 +422,22 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var, = var->bits_per_pixel; break; case 16: + /* Older SOCs use IBGR:555 rather than BGR:565. */ + if (sinfo->have_intensity_bit) + var->green.length = 5; + else + var->green.length = 6; + if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) { - /* RGB:565 mode */ - var->red.offset = 11; + /* RGB:5X5 mode */ + var->red.offset = var->green.length + 5; var->blue.offset = 0; } else { - /* BGR:565 mode */ + /* BGR:5X5 mode */ var->red.offset = 0; - var->blue.offset = 11; + var->blue.offset = var->green.length + 5; } var->green.offset = 5; - var->green.length = 6; var->red.length = var->blue.length = 5; break; case 32: @@ -679,8 +684,7 @@ static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red, case FB_VISUAL_PSEUDOCOLOR: if (regno < 256) { - if (cpu_is_at91sam9261() || cpu_is_at91sam9263() - || cpu_is_at91sam9rl()) { + if (sinfo->have_intensity_bit) { /* old style I+BGR:555 */ val = ((red >> 11) & 0x001f); val |= ((green >> 6) & 0x03e0); @@ -870,6 +874,10 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev) } sinfo->info = info; sinfo->pdev = pdev; + if (cpu_is_at91sam9261() || cpu_is_at91sam9263() || + cpu_is_at91sam9rl()) { + sinfo->have_intensity_bit = true; + } strcpy(info->fix.id, sinfo->pdev->name); info->flags = ATMEL_LCDFB_FBINFO_DEFAULT; diff --git a/drivers/video/ep93xx-fb.c b/drivers/video/ep93xx-fb.c index 3f2519d30715..e06cd5d90c97 100644 --- a/drivers/video/ep93xx-fb.c +++ b/drivers/video/ep93xx-fb.c @@ -23,6 +23,7 @@ #include <linux/slab.h> #include <linux/clk.h> #include <linux/fb.h> +#include <linux/io.h> #include <linux/platform_data/video-ep93xx.h> diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c index 755556ca5b2d..45169cbaba6e 100644 --- a/drivers/video/mxsfb.c +++ b/drivers/video/mxsfb.c @@ -169,6 +169,7 @@ struct mxsfb_info { unsigned dotclk_delay; const struct mxsfb_devdata *devdata; int mapped; + u32 sync; }; #define mxsfb_is_v3(host) (host->devdata->ipversion == 3) @@ -456,9 +457,9 @@ static int mxsfb_set_par(struct fb_info *fb_info) vdctrl0 |= VDCTRL0_HSYNC_ACT_HIGH; if (fb_info->var.sync & FB_SYNC_VERT_HIGH_ACT) vdctrl0 |= VDCTRL0_VSYNC_ACT_HIGH; - if (fb_info->var.sync & FB_SYNC_DATA_ENABLE_HIGH_ACT) + if (host->sync & MXSFB_SYNC_DATA_ENABLE_HIGH_ACT) vdctrl0 |= VDCTRL0_ENABLE_ACT_HIGH; - if (fb_info->var.sync & FB_SYNC_DOTCLK_FAILING_ACT) + if (host->sync & MXSFB_SYNC_DOTCLK_FAILING_ACT) vdctrl0 |= VDCTRL0_DOTCLK_ACT_FAILING; writel(vdctrl0, host->base + LCDC_VDCTRL0); @@ -861,6 +862,8 @@ static int mxsfb_probe(struct platform_device *pdev) INIT_LIST_HEAD(&fb_info->modelist); + host->sync = pdata->sync; + ret = mxsfb_init_fbinfo(host); if (ret != 0) goto error_init_fb; diff --git a/drivers/video/omap/lcd_ams_delta.c b/drivers/video/omap/lcd_ams_delta.c index ed4cad87fbcd..4a5f2cd3d3bf 100644 --- a/drivers/video/omap/lcd_ams_delta.c +++ b/drivers/video/omap/lcd_ams_delta.c @@ -27,6 +27,7 @@ #include <linux/lcd.h> #include <linux/gpio.h> +#include <mach/hardware.h> #include <mach/board-ams-delta.h> #include "omapfb.h" diff --git a/drivers/video/omap/lcd_osk.c b/drivers/video/omap/lcd_osk.c index 3aa62da89195..7fbe04bce0ed 100644 --- a/drivers/video/omap/lcd_osk.c +++ b/drivers/video/omap/lcd_osk.c @@ -24,7 +24,10 @@ #include <linux/platform_device.h> #include <asm/gpio.h> + +#include <mach/hardware.h> #include <mach/mux.h> + #include "omapfb.h" static int osk_panel_init(struct lcd_panel *panel, struct omapfb_device *fbdev) diff --git a/drivers/video/omap/omapfb_main.c b/drivers/video/omap/omapfb_main.c index e31f5b33b501..d40612c31a98 100644 --- a/drivers/video/omap/omapfb_main.c +++ b/drivers/video/omap/omapfb_main.c @@ -32,6 +32,8 @@ #include <linux/omap-dma.h> +#include <mach/hardware.h> + #include "omapfb.h" #include "lcdc.h" diff --git a/drivers/video/omap2/displays/panel-tpo-td043mtea1.c b/drivers/video/omap2/displays/panel-tpo-td043mtea1.c index 6b6643911d29..048c98381ef6 100644 --- a/drivers/video/omap2/displays/panel-tpo-td043mtea1.c +++ b/drivers/video/omap2/displays/panel-tpo-td043mtea1.c @@ -63,6 +63,9 @@ struct tpo_td043_device { u32 power_on_resume:1; }; +/* used to pass spi_device from SPI to DSS portion of the driver */ +static struct tpo_td043_device *g_tpo_td043; + static int tpo_td043_write(struct spi_device *spi, u8 addr, u8 data) { struct spi_message m; @@ -403,7 +406,7 @@ static void tpo_td043_disable(struct omap_dss_device *dssdev) static int tpo_td043_probe(struct omap_dss_device *dssdev) { - struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev); + struct tpo_td043_device *tpo_td043 = g_tpo_td043; int nreset_gpio = dssdev->reset_gpio; int ret = 0; @@ -440,6 +443,8 @@ static int tpo_td043_probe(struct omap_dss_device *dssdev) if (ret) dev_warn(&dssdev->dev, "failed to create sysfs files\n"); + dev_set_drvdata(&dssdev->dev, tpo_td043); + return 0; fail_gpio_req: @@ -505,6 +510,9 @@ static int tpo_td043_spi_probe(struct spi_device *spi) return -ENODEV; } + if (g_tpo_td043 != NULL) + return -EBUSY; + spi->bits_per_word = 16; spi->mode = SPI_MODE_0; @@ -521,7 +529,7 @@ static int tpo_td043_spi_probe(struct spi_device *spi) tpo_td043->spi = spi; tpo_td043->nreset_gpio = dssdev->reset_gpio; dev_set_drvdata(&spi->dev, tpo_td043); - dev_set_drvdata(&dssdev->dev, tpo_td043); + g_tpo_td043 = tpo_td043; omap_dss_register_driver(&tpo_td043_driver); @@ -534,6 +542,7 @@ static int tpo_td043_spi_remove(struct spi_device *spi) omap_dss_unregister_driver(&tpo_td043_driver); kfree(tpo_td043); + g_tpo_td043 = NULL; return 0; } diff --git a/drivers/video/omap2/dss/dss_features.c b/drivers/video/omap2/dss/dss_features.c index d7d66ef5cb58..7f791aeda4d2 100644 --- a/drivers/video/omap2/dss/dss_features.c +++ b/drivers/video/omap2/dss/dss_features.c @@ -202,12 +202,10 @@ static const enum omap_dss_output_id omap3630_dss_supported_outputs[] = { static const enum omap_dss_output_id omap4_dss_supported_outputs[] = { /* OMAP_DSS_CHANNEL_LCD */ - OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI | - OMAP_DSS_OUTPUT_DSI1, + OMAP_DSS_OUTPUT_DBI | OMAP_DSS_OUTPUT_DSI1, /* OMAP_DSS_CHANNEL_DIGIT */ - OMAP_DSS_OUTPUT_VENC | OMAP_DSS_OUTPUT_HDMI | - OMAP_DSS_OUTPUT_DPI, + OMAP_DSS_OUTPUT_VENC | OMAP_DSS_OUTPUT_HDMI, /* OMAP_DSS_CHANNEL_LCD2 */ OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI | diff --git a/drivers/w1/masters/w1-gpio.c b/drivers/w1/masters/w1-gpio.c index d39dfa4cc235..46d97014342e 100644 --- a/drivers/w1/masters/w1-gpio.c +++ b/drivers/w1/masters/w1-gpio.c @@ -47,11 +47,13 @@ static u8 w1_gpio_read_bit(void *data) return gpio_get_value(pdata->pin) ? 1 : 0; } +#if defined(CONFIG_OF) static struct of_device_id w1_gpio_dt_ids[] = { { .compatible = "w1-gpio" }, {} }; MODULE_DEVICE_TABLE(of, w1_gpio_dt_ids); +#endif static int w1_gpio_probe_dt(struct platform_device *pdev) { @@ -158,7 +160,7 @@ static int w1_gpio_probe(struct platform_device *pdev) return err; } -static int __exit w1_gpio_remove(struct platform_device *pdev) +static int w1_gpio_remove(struct platform_device *pdev) { struct w1_bus_master *master = platform_get_drvdata(pdev); struct w1_gpio_platform_data *pdata = pdev->dev.platform_data; @@ -210,7 +212,7 @@ static struct platform_driver w1_gpio_driver = { .of_match_table = of_match_ptr(w1_gpio_dt_ids), }, .probe = w1_gpio_probe, - .remove = __exit_p(w1_gpio_remove), + .remove = w1_gpio_remove, .suspend = w1_gpio_suspend, .resume = w1_gpio_resume, }; diff --git a/drivers/w1/w1.c b/drivers/w1/w1.c index 7994d933f040..7ce277d2bb67 100644 --- a/drivers/w1/w1.c +++ b/drivers/w1/w1.c @@ -924,7 +924,8 @@ void w1_search(struct w1_master *dev, u8 search_type, w1_slave_found_callback cb tmp64 = (triplet_ret >> 2); rn |= (tmp64 << i); - if (kthread_should_stop()) { + /* ensure we're called from kthread and not by netlink callback */ + if (!dev->priv && kthread_should_stop()) { mutex_unlock(&dev->bus_mutex); dev_dbg(&dev->dev, "Abort w1_search\n"); return; diff --git a/drivers/watchdog/sp5100_tco.c b/drivers/watchdog/sp5100_tco.c index e3b8f757d2d3..0e9d8c479c35 100644 --- a/drivers/watchdog/sp5100_tco.c +++ b/drivers/watchdog/sp5100_tco.c @@ -40,13 +40,12 @@ #include "sp5100_tco.h" /* Module and version information */ -#define TCO_VERSION "0.03" +#define TCO_VERSION "0.05" #define TCO_MODULE_NAME "SP5100 TCO timer" #define TCO_DRIVER_NAME TCO_MODULE_NAME ", v" TCO_VERSION /* internal variables */ static u32 tcobase_phys; -static u32 resbase_phys; static u32 tco_wdt_fired; static void __iomem *tcobase; static unsigned int pm_iobase; @@ -54,10 +53,6 @@ static DEFINE_SPINLOCK(tco_lock); /* Guards the hardware */ static unsigned long timer_alive; static char tco_expect_close; static struct pci_dev *sp5100_tco_pci; -static struct resource wdt_res = { - .name = "Watchdog Timer", - .flags = IORESOURCE_MEM, -}; /* the watchdog platform device */ static struct platform_device *sp5100_tco_platform_device; @@ -75,12 +70,6 @@ module_param(nowayout, bool, 0); MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started." " (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); -static unsigned int force_addr; -module_param(force_addr, uint, 0); -MODULE_PARM_DESC(force_addr, "Force the use of specified MMIO address." - " ONLY USE THIS PARAMETER IF YOU REALLY KNOW" - " WHAT YOU ARE DOING (default=none)"); - /* * Some TCO specific functions */ @@ -176,39 +165,6 @@ static void tco_timer_enable(void) } } -static void tco_timer_disable(void) -{ - int val; - - if (sp5100_tco_pci->revision >= 0x40) { - /* For SB800 or later */ - /* Enable watchdog decode bit and Disable watchdog timer */ - outb(SB800_PM_WATCHDOG_CONTROL, SB800_IO_PM_INDEX_REG); - val = inb(SB800_IO_PM_DATA_REG); - val |= SB800_PCI_WATCHDOG_DECODE_EN; - val |= SB800_PM_WATCHDOG_DISABLE; - outb(val, SB800_IO_PM_DATA_REG); - } else { - /* For SP5100 or SB7x0 */ - /* Enable watchdog decode bit */ - pci_read_config_dword(sp5100_tco_pci, - SP5100_PCI_WATCHDOG_MISC_REG, - &val); - - val |= SP5100_PCI_WATCHDOG_DECODE_EN; - - pci_write_config_dword(sp5100_tco_pci, - SP5100_PCI_WATCHDOG_MISC_REG, - val); - - /* Disable Watchdog timer */ - outb(SP5100_PM_WATCHDOG_CONTROL, SP5100_IO_PM_INDEX_REG); - val = inb(SP5100_IO_PM_DATA_REG); - val |= SP5100_PM_WATCHDOG_DISABLE; - outb(val, SP5100_IO_PM_DATA_REG); - } -} - /* * /dev/watchdog handling */ @@ -361,7 +317,7 @@ static unsigned char sp5100_tco_setupdevice(void) { struct pci_dev *dev = NULL; const char *dev_name = NULL; - u32 val, tmp_val; + u32 val; u32 index_reg, data_reg, base_addr; /* Match the PCI device */ @@ -459,63 +415,8 @@ static unsigned char sp5100_tco_setupdevice(void) } else pr_debug("SBResource_MMIO is disabled(0x%04x)\n", val); - /* - * Lastly re-programming the watchdog timer MMIO address, - * This method is a last resort... - * - * Before re-programming, to ensure that the watchdog timer - * is disabled, disable the watchdog timer. - */ - tco_timer_disable(); - - if (force_addr) { - /* - * Force the use of watchdog timer MMIO address, and aligned to - * 8byte boundary. - */ - force_addr &= ~0x7; - val = force_addr; - - pr_info("Force the use of 0x%04x as MMIO address\n", val); - } else { - /* - * Get empty slot into the resource tree for watchdog timer. - */ - if (allocate_resource(&iomem_resource, - &wdt_res, - SP5100_WDT_MEM_MAP_SIZE, - 0xf0000000, - 0xfffffff8, - 0x8, - NULL, - NULL)) { - pr_err("MMIO allocation failed\n"); - goto unreg_region; - } - - val = resbase_phys = wdt_res.start; - pr_debug("Got 0x%04x from resource tree\n", val); - } - - /* Restore to the low three bits */ - outb(base_addr+0, index_reg); - tmp_val = val | (inb(data_reg) & 0x7); - - /* Re-programming the watchdog timer base address */ - outb(base_addr+0, index_reg); - outb((tmp_val >> 0) & 0xff, data_reg); - outb(base_addr+1, index_reg); - outb((tmp_val >> 8) & 0xff, data_reg); - outb(base_addr+2, index_reg); - outb((tmp_val >> 16) & 0xff, data_reg); - outb(base_addr+3, index_reg); - outb((tmp_val >> 24) & 0xff, data_reg); - - if (!request_mem_region_exclusive(val, SP5100_WDT_MEM_MAP_SIZE, - dev_name)) { - pr_err("MMIO address 0x%04x already in use\n", val); - goto unreg_resource; - } + pr_notice("failed to find MMIO address, giving up.\n"); + goto unreg_region; setup_wdt: tcobase_phys = val; @@ -555,9 +456,6 @@ setup_wdt: unreg_mem_region: release_mem_region(tcobase_phys, SP5100_WDT_MEM_MAP_SIZE); -unreg_resource: - if (resbase_phys) - release_resource(&wdt_res); unreg_region: release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE); exit: @@ -567,7 +465,6 @@ exit: static int sp5100_tco_init(struct platform_device *dev) { int ret; - char addr_str[16]; /* * Check whether or not the hardware watchdog is there. If found, then @@ -599,23 +496,14 @@ static int sp5100_tco_init(struct platform_device *dev) clear_bit(0, &timer_alive); /* Show module parameters */ - if (force_addr == tcobase_phys) - /* The force_addr is vaild */ - sprintf(addr_str, "0x%04x", force_addr); - else - strcpy(addr_str, "none"); - - pr_info("initialized (0x%p). heartbeat=%d sec (nowayout=%d, " - "force_addr=%s)\n", - tcobase, heartbeat, nowayout, addr_str); + pr_info("initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n", + tcobase, heartbeat, nowayout); return 0; exit: iounmap(tcobase); release_mem_region(tcobase_phys, SP5100_WDT_MEM_MAP_SIZE); - if (resbase_phys) - release_resource(&wdt_res); release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE); return ret; } @@ -630,8 +518,6 @@ static void sp5100_tco_cleanup(void) misc_deregister(&sp5100_tco_miscdev); iounmap(tcobase); release_mem_region(tcobase_phys, SP5100_WDT_MEM_MAP_SIZE); - if (resbase_phys) - release_resource(&wdt_res); release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE); } diff --git a/drivers/watchdog/sp5100_tco.h b/drivers/watchdog/sp5100_tco.h index 71594a0c14b7..2b28c00da0df 100644 --- a/drivers/watchdog/sp5100_tco.h +++ b/drivers/watchdog/sp5100_tco.h @@ -57,7 +57,7 @@ #define SB800_PM_WATCHDOG_DISABLE (1 << 2) #define SB800_PM_WATCHDOG_SECOND_RES (3 << 0) #define SB800_ACPI_MMIO_DECODE_EN (1 << 0) -#define SB800_ACPI_MMIO_SEL (1 << 2) +#define SB800_ACPI_MMIO_SEL (1 << 1) #define SB800_PM_WDT_MMIO_OFFSET 0xB00 diff --git a/drivers/xen/Kconfig b/drivers/xen/Kconfig index 5a32232cf7c1..67af155cf602 100644 --- a/drivers/xen/Kconfig +++ b/drivers/xen/Kconfig @@ -182,7 +182,7 @@ config XEN_PRIVCMD config XEN_STUB bool "Xen stub drivers" - depends on XEN && X86_64 + depends on XEN && X86_64 && BROKEN default n help Allow kernel to install stub drivers, to reserve space for Xen drivers, diff --git a/drivers/xen/events.c b/drivers/xen/events.c index d17aa41a9041..aa85881d17b2 100644 --- a/drivers/xen/events.c +++ b/drivers/xen/events.c @@ -403,11 +403,23 @@ static void unmask_evtchn(int port) if (unlikely((cpu != cpu_from_evtchn(port)))) do_hypercall = 1; - else + else { + /* + * Need to clear the mask before checking pending to + * avoid a race with an event becoming pending. + * + * EVTCHNOP_unmask will only trigger an upcall if the + * mask bit was set, so if a hypercall is needed + * remask the event. + */ + sync_clear_bit(port, BM(&s->evtchn_mask[0])); evtchn_pending = sync_test_bit(port, BM(&s->evtchn_pending[0])); - if (unlikely(evtchn_pending && xen_hvm_domain())) - do_hypercall = 1; + if (unlikely(evtchn_pending && xen_hvm_domain())) { + sync_set_bit(port, BM(&s->evtchn_mask[0])); + do_hypercall = 1; + } + } /* Slow path (hypercall) if this is a non-local port or if this is * an hvm domain and an event is pending (hvm domains don't have @@ -418,8 +430,6 @@ static void unmask_evtchn(int port) } else { struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu); - sync_clear_bit(port, BM(&s->evtchn_mask[0])); - /* * The following is basically the equivalent of * 'hw_resend_irq'. Just like a real IO-APIC we 'lose diff --git a/drivers/xen/fallback.c b/drivers/xen/fallback.c index 0ef7c4d40f86..b04fb64c5a91 100644 --- a/drivers/xen/fallback.c +++ b/drivers/xen/fallback.c @@ -44,7 +44,7 @@ int xen_event_channel_op_compat(int cmd, void *arg) } EXPORT_SYMBOL_GPL(xen_event_channel_op_compat); -int HYPERVISOR_physdev_op_compat(int cmd, void *arg) +int xen_physdev_op_compat(int cmd, void *arg) { struct physdev_op op; int rc; @@ -78,3 +78,4 @@ int HYPERVISOR_physdev_op_compat(int cmd, void *arg) return rc; } +EXPORT_SYMBOL_GPL(xen_physdev_op_compat); diff --git a/drivers/xen/xen-acpi-processor.c b/drivers/xen/xen-acpi-processor.c index 316df65163cf..90e34ac7e522 100644 --- a/drivers/xen/xen-acpi-processor.c +++ b/drivers/xen/xen-acpi-processor.c @@ -500,16 +500,19 @@ static int __init xen_acpi_processor_init(void) (void)acpi_processor_preregister_performance(acpi_perf_data); for_each_possible_cpu(i) { + struct acpi_processor *pr; struct acpi_processor_performance *perf; + pr = per_cpu(processors, i); perf = per_cpu_ptr(acpi_perf_data, i); - rc = acpi_processor_register_performance(perf, i); + if (!pr) + continue; + + pr->performance = perf; + rc = acpi_processor_get_performance_info(pr); if (rc) goto err_out; } - rc = acpi_processor_notify_smm(THIS_MODULE); - if (rc) - goto err_unregister; for_each_possible_cpu(i) { struct acpi_processor *_pr; diff --git a/drivers/xen/xen-pciback/pci_stub.c b/drivers/xen/xen-pciback/pci_stub.c index 9204126f1560..a2278ba7fb27 100644 --- a/drivers/xen/xen-pciback/pci_stub.c +++ b/drivers/xen/xen-pciback/pci_stub.c @@ -17,6 +17,7 @@ #include <xen/events.h> #include <asm/xen/pci.h> #include <asm/xen/hypervisor.h> +#include <xen/interface/physdev.h> #include "pciback.h" #include "conf_space.h" #include "conf_space_quirks.h" @@ -85,37 +86,52 @@ static struct pcistub_device *pcistub_device_alloc(struct pci_dev *dev) static void pcistub_device_release(struct kref *kref) { struct pcistub_device *psdev; + struct pci_dev *dev; struct xen_pcibk_dev_data *dev_data; psdev = container_of(kref, struct pcistub_device, kref); - dev_data = pci_get_drvdata(psdev->dev); + dev = psdev->dev; + dev_data = pci_get_drvdata(dev); - dev_dbg(&psdev->dev->dev, "pcistub_device_release\n"); + dev_dbg(&dev->dev, "pcistub_device_release\n"); - xen_unregister_device_domain_owner(psdev->dev); + xen_unregister_device_domain_owner(dev); /* Call the reset function which does not take lock as this * is called from "unbind" which takes a device_lock mutex. */ - __pci_reset_function_locked(psdev->dev); - if (pci_load_and_free_saved_state(psdev->dev, - &dev_data->pci_saved_state)) { - dev_dbg(&psdev->dev->dev, "Could not reload PCI state\n"); - } else - pci_restore_state(psdev->dev); + __pci_reset_function_locked(dev); + if (pci_load_and_free_saved_state(dev, &dev_data->pci_saved_state)) + dev_dbg(&dev->dev, "Could not reload PCI state\n"); + else + pci_restore_state(dev); + + if (pci_find_capability(dev, PCI_CAP_ID_MSIX)) { + struct physdev_pci_device ppdev = { + .seg = pci_domain_nr(dev->bus), + .bus = dev->bus->number, + .devfn = dev->devfn + }; + int err = HYPERVISOR_physdev_op(PHYSDEVOP_release_msix, + &ppdev); + + if (err) + dev_warn(&dev->dev, "MSI-X release failed (%d)\n", + err); + } /* Disable the device */ - xen_pcibk_reset_device(psdev->dev); + xen_pcibk_reset_device(dev); kfree(dev_data); - pci_set_drvdata(psdev->dev, NULL); + pci_set_drvdata(dev, NULL); /* Clean-up the device */ - xen_pcibk_config_free_dyn_fields(psdev->dev); - xen_pcibk_config_free_dev(psdev->dev); + xen_pcibk_config_free_dyn_fields(dev); + xen_pcibk_config_free_dev(dev); - psdev->dev->dev_flags &= ~PCI_DEV_FLAGS_ASSIGNED; - pci_dev_put(psdev->dev); + dev->dev_flags &= ~PCI_DEV_FLAGS_ASSIGNED; + pci_dev_put(dev); kfree(psdev); } @@ -355,6 +371,19 @@ static int pcistub_init_device(struct pci_dev *dev) if (err) goto config_release; + if (pci_find_capability(dev, PCI_CAP_ID_MSIX)) { + struct physdev_pci_device ppdev = { + .seg = pci_domain_nr(dev->bus), + .bus = dev->bus->number, + .devfn = dev->devfn + }; + + err = HYPERVISOR_physdev_op(PHYSDEVOP_prepare_msix, &ppdev); + if (err) + dev_err(&dev->dev, "MSI-X preparation failed (%d)\n", + err); + } + /* We need the device active to save the state. */ dev_dbg(&dev->dev, "save state of device\n"); pci_save_state(dev); diff --git a/drivers/xen/xen-pciback/pciback_ops.c b/drivers/xen/xen-pciback/pciback_ops.c index 37c1f825f513..b98cf0c35725 100644 --- a/drivers/xen/xen-pciback/pciback_ops.c +++ b/drivers/xen/xen-pciback/pciback_ops.c @@ -113,7 +113,8 @@ void xen_pcibk_reset_device(struct pci_dev *dev) if (dev->msi_enabled) pci_disable_msi(dev); #endif - pci_disable_device(dev); + if (pci_is_enabled(dev)) + pci_disable_device(dev); pci_write_config_word(dev, PCI_COMMAND, 0); diff --git a/drivers/xen/xen-stub.c b/drivers/xen/xen-stub.c index d85e411cbf89..bbef194c5b01 100644 --- a/drivers/xen/xen-stub.c +++ b/drivers/xen/xen-stub.c @@ -25,7 +25,6 @@ #include <linux/export.h> #include <linux/types.h> #include <linux/acpi.h> -#include <acpi/acpi_drivers.h> #include <xen/acpi.h> #ifdef CONFIG_ACPI diff --git a/firmware/Makefile b/firmware/Makefile index cbb09ce9730a..5d8ee1319b5c 100644 --- a/firmware/Makefile +++ b/firmware/Makefile @@ -82,7 +82,7 @@ fw-shipped-$(CONFIG_SCSI_ADVANSYS) += advansys/mcode.bin advansys/38C1600.bin \ fw-shipped-$(CONFIG_SCSI_QLOGIC_1280) += qlogic/1040.bin qlogic/1280.bin \ qlogic/12160.bin fw-shipped-$(CONFIG_SCSI_QLOGICPTI) += qlogic/isp1000.bin -fw-shipped-$(CONFIG_INFINIBAND_QIB) += qlogic/sd7220.fw +fw-shipped-$(CONFIG_INFINIBAND_QIB) += intel/sd7220.fw fw-shipped-$(CONFIG_SND_KORG1212) += korg/k1212.dsp fw-shipped-$(CONFIG_SND_MAESTRO3) += ess/maestro3_assp_kernel.fw \ ess/maestro3_assp_minisrc.fw diff --git a/firmware/qlogic/sd7220.fw.ihex b/firmware/intel/sd7220.fw.ihex index a33636319112..a33636319112 100644 --- a/firmware/qlogic/sd7220.fw.ihex +++ b/firmware/intel/sd7220.fw.ihex diff --git a/fs/btrfs/ctree.c b/fs/btrfs/ctree.c index ecd25a1b4e51..ca9d8f1a3bb6 100644 --- a/fs/btrfs/ctree.c +++ b/fs/btrfs/ctree.c @@ -651,6 +651,8 @@ tree_mod_log_insert_root(struct btrfs_fs_info *fs_info, if (tree_mod_dont_log(fs_info, NULL)) return 0; + __tree_mod_log_free_eb(fs_info, old_root); + ret = tree_mod_alloc(fs_info, flags, &tm); if (ret < 0) goto out; @@ -736,7 +738,7 @@ tree_mod_log_search(struct btrfs_fs_info *fs_info, u64 start, u64 min_seq) static noinline void tree_mod_log_eb_copy(struct btrfs_fs_info *fs_info, struct extent_buffer *dst, struct extent_buffer *src, unsigned long dst_offset, - unsigned long src_offset, int nr_items) + unsigned long src_offset, int nr_items, int log_removal) { int ret; int i; @@ -750,10 +752,12 @@ tree_mod_log_eb_copy(struct btrfs_fs_info *fs_info, struct extent_buffer *dst, } for (i = 0; i < nr_items; i++) { - ret = tree_mod_log_insert_key_locked(fs_info, src, - i + src_offset, - MOD_LOG_KEY_REMOVE); - BUG_ON(ret < 0); + if (log_removal) { + ret = tree_mod_log_insert_key_locked(fs_info, src, + i + src_offset, + MOD_LOG_KEY_REMOVE); + BUG_ON(ret < 0); + } ret = tree_mod_log_insert_key_locked(fs_info, dst, i + dst_offset, MOD_LOG_KEY_ADD); @@ -927,7 +931,6 @@ static noinline int update_ref_for_cow(struct btrfs_trans_handle *trans, ret = btrfs_dec_ref(trans, root, buf, 1, 1); BUG_ON(ret); /* -ENOMEM */ } - tree_mod_log_free_eb(root->fs_info, buf); clean_tree_block(trans, root, buf); *last_ref = 1; } @@ -1046,6 +1049,7 @@ static noinline int __btrfs_cow_block(struct btrfs_trans_handle *trans, btrfs_set_node_ptr_generation(parent, parent_slot, trans->transid); btrfs_mark_buffer_dirty(parent); + tree_mod_log_free_eb(root->fs_info, buf); btrfs_free_tree_block(trans, root, buf, parent_start, last_ref); } @@ -1750,7 +1754,6 @@ static noinline int balance_level(struct btrfs_trans_handle *trans, goto enospc; } - tree_mod_log_free_eb(root->fs_info, root->node); tree_mod_log_set_root_pointer(root, child); rcu_assign_pointer(root->node, child); @@ -2995,7 +2998,7 @@ static int push_node_left(struct btrfs_trans_handle *trans, push_items = min(src_nritems - 8, push_items); tree_mod_log_eb_copy(root->fs_info, dst, src, dst_nritems, 0, - push_items); + push_items, 1); copy_extent_buffer(dst, src, btrfs_node_key_ptr_offset(dst_nritems), btrfs_node_key_ptr_offset(0), @@ -3066,7 +3069,7 @@ static int balance_node_right(struct btrfs_trans_handle *trans, sizeof(struct btrfs_key_ptr)); tree_mod_log_eb_copy(root->fs_info, dst, src, 0, - src_nritems - push_items, push_items); + src_nritems - push_items, push_items, 1); copy_extent_buffer(dst, src, btrfs_node_key_ptr_offset(0), btrfs_node_key_ptr_offset(src_nritems - push_items), @@ -3218,12 +3221,18 @@ static noinline int split_node(struct btrfs_trans_handle *trans, int mid; int ret; u32 c_nritems; + int tree_mod_log_removal = 1; c = path->nodes[level]; WARN_ON(btrfs_header_generation(c) != trans->transid); if (c == root->node) { /* trying to split the root, lets make a new one */ ret = insert_new_root(trans, root, path, level + 1); + /* + * removal of root nodes has been logged by + * tree_mod_log_set_root_pointer due to locking + */ + tree_mod_log_removal = 0; if (ret) return ret; } else { @@ -3261,7 +3270,8 @@ static noinline int split_node(struct btrfs_trans_handle *trans, (unsigned long)btrfs_header_chunk_tree_uuid(split), BTRFS_UUID_SIZE); - tree_mod_log_eb_copy(root->fs_info, split, c, 0, mid, c_nritems - mid); + tree_mod_log_eb_copy(root->fs_info, split, c, 0, mid, c_nritems - mid, + tree_mod_log_removal); copy_extent_buffer(split, c, btrfs_node_key_ptr_offset(0), btrfs_node_key_ptr_offset(mid), diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c index 7d84651e850b..6d19a0a554aa 100644 --- a/fs/btrfs/disk-io.c +++ b/fs/btrfs/disk-io.c @@ -1291,6 +1291,7 @@ struct btrfs_root *btrfs_create_tree(struct btrfs_trans_handle *trans, 0, objectid, NULL, 0, 0, 0); if (IS_ERR(leaf)) { ret = PTR_ERR(leaf); + leaf = NULL; goto fail; } @@ -1334,11 +1335,16 @@ struct btrfs_root *btrfs_create_tree(struct btrfs_trans_handle *trans, btrfs_tree_unlock(leaf); + return root; + fail: - if (ret) - return ERR_PTR(ret); + if (leaf) { + btrfs_tree_unlock(leaf); + free_extent_buffer(leaf); + } + kfree(root); - return root; + return ERR_PTR(ret); } static struct btrfs_root *alloc_log_tree(struct btrfs_trans_handle *trans, @@ -3253,7 +3259,7 @@ void btrfs_free_fs_root(struct btrfs_fs_info *fs_info, struct btrfs_root *root) if (btrfs_root_refs(&root->root_item) == 0) synchronize_srcu(&fs_info->subvol_srcu); - if (fs_info->fs_state & BTRFS_SUPER_FLAG_ERROR) { + if (test_bit(BTRFS_FS_STATE_ERROR, &fs_info->fs_state)) { btrfs_free_log(NULL, root); btrfs_free_log_root_tree(NULL, fs_info); } diff --git a/fs/btrfs/extent-tree.c b/fs/btrfs/extent-tree.c index 3e074dab2d57..3d551231caba 100644 --- a/fs/btrfs/extent-tree.c +++ b/fs/btrfs/extent-tree.c @@ -257,7 +257,8 @@ static int exclude_super_stripes(struct btrfs_root *root, cache->bytes_super += stripe_len; ret = add_excluded_extent(root, cache->key.objectid, stripe_len); - BUG_ON(ret); /* -ENOMEM */ + if (ret) + return ret; } for (i = 0; i < BTRFS_SUPER_MIRROR_MAX; i++) { @@ -265,13 +266,17 @@ static int exclude_super_stripes(struct btrfs_root *root, ret = btrfs_rmap_block(&root->fs_info->mapping_tree, cache->key.objectid, bytenr, 0, &logical, &nr, &stripe_len); - BUG_ON(ret); /* -ENOMEM */ + if (ret) + return ret; while (nr--) { cache->bytes_super += stripe_len; ret = add_excluded_extent(root, logical[nr], stripe_len); - BUG_ON(ret); /* -ENOMEM */ + if (ret) { + kfree(logical); + return ret; + } } kfree(logical); @@ -1467,8 +1472,11 @@ int lookup_inline_extent_backref(struct btrfs_trans_handle *trans, if (ret && !insert) { err = -ENOENT; goto out; + } else if (ret) { + err = -EIO; + WARN_ON(1); + goto out; } - BUG_ON(ret); /* Corruption */ leaf = path->nodes[0]; item_size = btrfs_item_size_nr(leaf, path->slots[0]); @@ -4435,7 +4443,7 @@ static void update_global_block_rsv(struct btrfs_fs_info *fs_info) spin_lock(&sinfo->lock); spin_lock(&block_rsv->lock); - block_rsv->size = num_bytes; + block_rsv->size = min_t(u64, num_bytes, 512 * 1024 * 1024); num_bytes = sinfo->bytes_used + sinfo->bytes_pinned + sinfo->bytes_reserved + sinfo->bytes_readonly + @@ -4790,14 +4798,49 @@ out_fail: * If the inodes csum_bytes is the same as the original * csum_bytes then we know we haven't raced with any free()ers * so we can just reduce our inodes csum bytes and carry on. - * Otherwise we have to do the normal free thing to account for - * the case that the free side didn't free up its reserve - * because of this outstanding reservation. */ - if (BTRFS_I(inode)->csum_bytes == csum_bytes) + if (BTRFS_I(inode)->csum_bytes == csum_bytes) { calc_csum_metadata_size(inode, num_bytes, 0); - else - to_free = calc_csum_metadata_size(inode, num_bytes, 0); + } else { + u64 orig_csum_bytes = BTRFS_I(inode)->csum_bytes; + u64 bytes; + + /* + * This is tricky, but first we need to figure out how much we + * free'd from any free-ers that occured during this + * reservation, so we reset ->csum_bytes to the csum_bytes + * before we dropped our lock, and then call the free for the + * number of bytes that were freed while we were trying our + * reservation. + */ + bytes = csum_bytes - BTRFS_I(inode)->csum_bytes; + BTRFS_I(inode)->csum_bytes = csum_bytes; + to_free = calc_csum_metadata_size(inode, bytes, 0); + + + /* + * Now we need to see how much we would have freed had we not + * been making this reservation and our ->csum_bytes were not + * artificially inflated. + */ + BTRFS_I(inode)->csum_bytes = csum_bytes - num_bytes; + bytes = csum_bytes - orig_csum_bytes; + bytes = calc_csum_metadata_size(inode, bytes, 0); + + /* + * Now reset ->csum_bytes to what it should be. If bytes is + * more than to_free then we would have free'd more space had we + * not had an artificially high ->csum_bytes, so we need to free + * the remainder. If bytes is the same or less then we don't + * need to do anything, the other free-ers did the correct + * thing. + */ + BTRFS_I(inode)->csum_bytes = orig_csum_bytes - num_bytes; + if (bytes > to_free) + to_free = bytes - to_free; + else + to_free = 0; + } spin_unlock(&BTRFS_I(inode)->lock); if (dropped) to_free += btrfs_calc_trans_metadata_size(root, dropped); @@ -7944,7 +7987,17 @@ int btrfs_read_block_groups(struct btrfs_root *root) * info has super bytes accounted for, otherwise we'll think * we have more space than we actually do. */ - exclude_super_stripes(root, cache); + ret = exclude_super_stripes(root, cache); + if (ret) { + /* + * We may have excluded something, so call this just in + * case. + */ + free_excluded_extents(root, cache); + kfree(cache->free_space_ctl); + kfree(cache); + goto error; + } /* * check for two cases, either we are full, and therefore @@ -8086,7 +8139,17 @@ int btrfs_make_block_group(struct btrfs_trans_handle *trans, cache->last_byte_to_unpin = (u64)-1; cache->cached = BTRFS_CACHE_FINISHED; - exclude_super_stripes(root, cache); + ret = exclude_super_stripes(root, cache); + if (ret) { + /* + * We may have excluded something, so call this just in + * case. + */ + free_excluded_extents(root, cache); + kfree(cache->free_space_ctl); + kfree(cache); + return ret; + } add_new_free_space(cache, root->fs_info, chunk_offset, chunk_offset + size); diff --git a/fs/btrfs/extent_io.c b/fs/btrfs/extent_io.c index f173c5af6461..cdee391fc7bf 100644 --- a/fs/btrfs/extent_io.c +++ b/fs/btrfs/extent_io.c @@ -1257,6 +1257,39 @@ int unlock_extent(struct extent_io_tree *tree, u64 start, u64 end) GFP_NOFS); } +int extent_range_clear_dirty_for_io(struct inode *inode, u64 start, u64 end) +{ + unsigned long index = start >> PAGE_CACHE_SHIFT; + unsigned long end_index = end >> PAGE_CACHE_SHIFT; + struct page *page; + + while (index <= end_index) { + page = find_get_page(inode->i_mapping, index); + BUG_ON(!page); /* Pages should be in the extent_io_tree */ + clear_page_dirty_for_io(page); + page_cache_release(page); + index++; + } + return 0; +} + +int extent_range_redirty_for_io(struct inode *inode, u64 start, u64 end) +{ + unsigned long index = start >> PAGE_CACHE_SHIFT; + unsigned long end_index = end >> PAGE_CACHE_SHIFT; + struct page *page; + + while (index <= end_index) { + page = find_get_page(inode->i_mapping, index); + BUG_ON(!page); /* Pages should be in the extent_io_tree */ + account_page_redirty(page); + __set_page_dirty_nobuffers(page); + page_cache_release(page); + index++; + } + return 0; +} + /* * helper function to set both pages and extents in the tree writeback */ diff --git a/fs/btrfs/extent_io.h b/fs/btrfs/extent_io.h index 6068a1985560..258c92156857 100644 --- a/fs/btrfs/extent_io.h +++ b/fs/btrfs/extent_io.h @@ -325,6 +325,8 @@ int map_private_extent_buffer(struct extent_buffer *eb, unsigned long offset, unsigned long *map_len); int extent_range_uptodate(struct extent_io_tree *tree, u64 start, u64 end); +int extent_range_clear_dirty_for_io(struct inode *inode, u64 start, u64 end); +int extent_range_redirty_for_io(struct inode *inode, u64 start, u64 end); int extent_clear_unlock_delalloc(struct inode *inode, struct extent_io_tree *tree, u64 start, u64 end, struct page *locked_page, diff --git a/fs/btrfs/file-item.c b/fs/btrfs/file-item.c index ec160202be3e..c4628a201cb3 100644 --- a/fs/btrfs/file-item.c +++ b/fs/btrfs/file-item.c @@ -118,9 +118,11 @@ struct btrfs_csum_item *btrfs_lookup_csum(struct btrfs_trans_handle *trans, csums_in_item = btrfs_item_size_nr(leaf, path->slots[0]); csums_in_item /= csum_size; - if (csum_offset >= csums_in_item) { + if (csum_offset == csums_in_item) { ret = -EFBIG; goto fail; + } else if (csum_offset > csums_in_item) { + goto fail; } } item = btrfs_item_ptr(leaf, path->slots[0], struct btrfs_csum_item); @@ -728,7 +730,6 @@ int btrfs_csum_file_blocks(struct btrfs_trans_handle *trans, return -ENOMEM; sector_sum = sums->sums; - trans->adding_csums = 1; again: next_offset = (u64)-1; found_next = 0; @@ -899,7 +900,6 @@ next_sector: goto again; } out: - trans->adding_csums = 0; btrfs_free_path(path); return ret; diff --git a/fs/btrfs/file.c b/fs/btrfs/file.c index af1d0605a5c1..ade03e6f7bd2 100644 --- a/fs/btrfs/file.c +++ b/fs/btrfs/file.c @@ -591,6 +591,7 @@ void btrfs_drop_extent_cache(struct inode *inode, u64 start, u64 end, } compressed = test_bit(EXTENT_FLAG_COMPRESSED, &em->flags); clear_bit(EXTENT_FLAG_PINNED, &em->flags); + clear_bit(EXTENT_FLAG_LOGGING, &flags); remove_extent_mapping(em_tree, em); if (no_splits) goto next; @@ -2141,6 +2142,7 @@ static long btrfs_fallocate(struct file *file, int mode, { struct inode *inode = file_inode(file); struct extent_state *cached_state = NULL; + struct btrfs_root *root = BTRFS_I(inode)->root; u64 cur_offset; u64 last_byte; u64 alloc_start; @@ -2168,6 +2170,11 @@ static long btrfs_fallocate(struct file *file, int mode, ret = btrfs_check_data_free_space(inode, alloc_end - alloc_start); if (ret) return ret; + if (root->fs_info->quota_enabled) { + ret = btrfs_qgroup_reserve(root, alloc_end - alloc_start); + if (ret) + goto out_reserve_fail; + } /* * wait for ordered IO before we have any locks. We'll loop again @@ -2271,6 +2278,9 @@ static long btrfs_fallocate(struct file *file, int mode, &cached_state, GFP_NOFS); out: mutex_unlock(&inode->i_mutex); + if (root->fs_info->quota_enabled) + btrfs_qgroup_free(root, alloc_end - alloc_start); +out_reserve_fail: /* Let go of our reservation. */ btrfs_free_reserved_data_space(inode, alloc_end - alloc_start); return ret; diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c index d1470adca8f8..09c58a35b429 100644 --- a/fs/btrfs/inode.c +++ b/fs/btrfs/inode.c @@ -353,6 +353,7 @@ static noinline int compress_file_range(struct inode *inode, int i; int will_compress; int compress_type = root->fs_info->compress_type; + int redirty = 0; /* if this is a small write inside eof, kick off a defrag */ if ((end - start + 1) < 16 * 1024 && @@ -415,6 +416,17 @@ again: if (BTRFS_I(inode)->force_compress) compress_type = BTRFS_I(inode)->force_compress; + /* + * we need to call clear_page_dirty_for_io on each + * page in the range. Otherwise applications with the file + * mmap'd can wander in and change the page contents while + * we are compressing them. + * + * If the compression fails for any reason, we set the pages + * dirty again later on. + */ + extent_range_clear_dirty_for_io(inode, start, end); + redirty = 1; ret = btrfs_compress_pages(compress_type, inode->i_mapping, start, total_compressed, pages, @@ -554,6 +566,8 @@ cleanup_and_bail_uncompressed: __set_page_dirty_nobuffers(locked_page); /* unlocked later on in the async handlers */ } + if (redirty) + extent_range_redirty_for_io(inode, start, end); add_async_extent(async_cow, start, end - start + 1, 0, NULL, 0, BTRFS_COMPRESS_NONE); *num_added += 1; @@ -1743,8 +1757,10 @@ static noinline int add_pending_csums(struct btrfs_trans_handle *trans, struct btrfs_ordered_sum *sum; list_for_each_entry(sum, list, list) { + trans->adding_csums = 1; btrfs_csum_file_blocks(trans, BTRFS_I(inode)->root->fs_info->csum_root, sum); + trans->adding_csums = 0; } return 0; } @@ -2312,6 +2328,7 @@ again: key.type = BTRFS_EXTENT_DATA_KEY; key.offset = start; + path->leave_spinning = 1; if (merge) { struct btrfs_file_extent_item *fi; u64 extent_len; @@ -2368,6 +2385,7 @@ again: btrfs_mark_buffer_dirty(leaf); inode_add_bytes(inode, len); + btrfs_release_path(path); ret = btrfs_inc_extent_ref(trans, root, new->bytenr, new->disk_len, 0, @@ -2381,6 +2399,7 @@ again: ret = 1; out_free_path: btrfs_release_path(path); + path->leave_spinning = 0; btrfs_end_transaction(trans, root); out_unlock: unlock_extent_cached(&BTRFS_I(inode)->io_tree, lock_start, lock_end, @@ -3676,11 +3695,9 @@ static struct btrfs_trans_handle *__unlink_start_trans(struct inode *dir, * 1 for the dir item * 1 for the dir index * 1 for the inode ref - * 1 for the inode ref in the tree log - * 2 for the dir entries in the log * 1 for the inode */ - trans = btrfs_start_transaction(root, 8); + trans = btrfs_start_transaction(root, 5); if (!IS_ERR(trans) || PTR_ERR(trans) != -ENOSPC) return trans; @@ -8124,7 +8141,7 @@ static int btrfs_rename(struct inode *old_dir, struct dentry *old_dentry, * inodes. So 5 * 2 is 10, plus 1 for the new link, so 11 total items * should cover the worst case number of items we'll modify. */ - trans = btrfs_start_transaction(root, 20); + trans = btrfs_start_transaction(root, 11); if (IS_ERR(trans)) { ret = PTR_ERR(trans); goto out_notrans; diff --git a/fs/btrfs/locking.h b/fs/btrfs/locking.h index ca52681e5f40..b81e0e9a4894 100644 --- a/fs/btrfs/locking.h +++ b/fs/btrfs/locking.h @@ -26,7 +26,6 @@ void btrfs_tree_lock(struct extent_buffer *eb); void btrfs_tree_unlock(struct extent_buffer *eb); -int btrfs_try_spin_lock(struct extent_buffer *eb); void btrfs_tree_read_lock(struct extent_buffer *eb); void btrfs_tree_read_unlock(struct extent_buffer *eb); diff --git a/fs/btrfs/ordered-data.c b/fs/btrfs/ordered-data.c index dc08d77b717e..005c45db699e 100644 --- a/fs/btrfs/ordered-data.c +++ b/fs/btrfs/ordered-data.c @@ -557,6 +557,7 @@ void btrfs_wait_ordered_extents(struct btrfs_root *root, int delay_iput) INIT_LIST_HEAD(&splice); INIT_LIST_HEAD(&works); + mutex_lock(&root->fs_info->ordered_operations_mutex); spin_lock(&root->fs_info->ordered_extent_lock); list_splice_init(&root->fs_info->ordered_extents, &splice); while (!list_empty(&splice)) { @@ -600,6 +601,7 @@ void btrfs_wait_ordered_extents(struct btrfs_root *root, int delay_iput) cond_resched(); } + mutex_unlock(&root->fs_info->ordered_operations_mutex); } /* diff --git a/fs/btrfs/qgroup.c b/fs/btrfs/qgroup.c index aee4b1cc3d98..b44124dd2370 100644 --- a/fs/btrfs/qgroup.c +++ b/fs/btrfs/qgroup.c @@ -1153,7 +1153,7 @@ int btrfs_qgroup_account_ref(struct btrfs_trans_handle *trans, ret = btrfs_find_all_roots(trans, fs_info, node->bytenr, sgn > 0 ? node->seq - 1 : node->seq, &roots); if (ret < 0) - goto out; + return ret; spin_lock(&fs_info->qgroup_lock); quota_root = fs_info->quota_root; @@ -1275,7 +1275,6 @@ int btrfs_qgroup_account_ref(struct btrfs_trans_handle *trans, ret = 0; unlock: spin_unlock(&fs_info->qgroup_lock); -out: ulist_free(roots); ulist_free(tmp); @@ -1525,21 +1524,23 @@ int btrfs_qgroup_reserve(struct btrfs_root *root, u64 num_bytes) if ((qg->lim_flags & BTRFS_QGROUP_LIMIT_MAX_RFER) && qg->reserved + qg->rfer + num_bytes > - qg->max_rfer) + qg->max_rfer) { ret = -EDQUOT; + goto out; + } if ((qg->lim_flags & BTRFS_QGROUP_LIMIT_MAX_EXCL) && qg->reserved + qg->excl + num_bytes > - qg->max_excl) + qg->max_excl) { ret = -EDQUOT; + goto out; + } list_for_each_entry(glist, &qg->groups, next_group) { ulist_add(ulist, glist->group->qgroupid, (uintptr_t)glist->group, GFP_ATOMIC); } } - if (ret) - goto out; /* * no limits exceeded, now record the reservation into all qgroups diff --git a/fs/btrfs/scrub.c b/fs/btrfs/scrub.c index 53c3501fa4ca..85e072b956d5 100644 --- a/fs/btrfs/scrub.c +++ b/fs/btrfs/scrub.c @@ -542,7 +542,6 @@ static void scrub_print_warning(const char *errstr, struct scrub_block *sblock) eb = path->nodes[0]; ei = btrfs_item_ptr(eb, path->slots[0], struct btrfs_extent_item); item_size = btrfs_item_size_nr(eb, path->slots[0]); - btrfs_release_path(path); if (flags & BTRFS_EXTENT_FLAG_TREE_BLOCK) { do { @@ -558,7 +557,9 @@ static void scrub_print_warning(const char *errstr, struct scrub_block *sblock) ret < 0 ? -1 : ref_level, ret < 0 ? -1 : ref_root); } while (ret != 1); + btrfs_release_path(path); } else { + btrfs_release_path(path); swarn.path = path; swarn.dev = dev; iterate_extent_inodes(fs_info, found_key.objectid, diff --git a/fs/btrfs/send.c b/fs/btrfs/send.c index f7a8b861058b..c85e7c6b4598 100644 --- a/fs/btrfs/send.c +++ b/fs/btrfs/send.c @@ -3945,12 +3945,10 @@ static int is_extent_unchanged(struct send_ctx *sctx, found_key.type != key.type) { key.offset += right_len; break; - } else { - if (found_key.offset != key.offset + right_len) { - /* Should really not happen */ - ret = -EIO; - goto out; - } + } + if (found_key.offset != key.offset + right_len) { + ret = 0; + goto out; } key = found_key; } diff --git a/fs/btrfs/transaction.c b/fs/btrfs/transaction.c index 9250b9c4f01e..50767bbaad6c 100644 --- a/fs/btrfs/transaction.c +++ b/fs/btrfs/transaction.c @@ -625,14 +625,13 @@ static int __btrfs_end_transaction(struct btrfs_trans_handle *trans, btrfs_trans_release_metadata(trans, root); trans->block_rsv = NULL; - /* - * the same root has to be passed to start_transaction and - * end_transaction. Subvolume quota depends on this. - */ - WARN_ON(trans->root != root); if (trans->qgroup_reserved) { - btrfs_qgroup_free(root, trans->qgroup_reserved); + /* + * the same root has to be passed here between start_transaction + * and end_transaction. Subvolume quota depends on this. + */ + btrfs_qgroup_free(trans->root, trans->qgroup_reserved); trans->qgroup_reserved = 0; } diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c index 6b9cff42265d..2854c824ab64 100644 --- a/fs/btrfs/volumes.c +++ b/fs/btrfs/volumes.c @@ -684,6 +684,12 @@ int btrfs_close_devices(struct btrfs_fs_devices *fs_devices) __btrfs_close_devices(fs_devices); free_fs_devices(fs_devices); } + /* + * Wait for rcu kworkers under __btrfs_close_devices + * to finish all blkdev_puts so device is really + * free when umount is done. + */ + rcu_barrier(); return ret; } @@ -4929,7 +4935,18 @@ int btrfs_rmap_block(struct btrfs_mapping_tree *map_tree, em = lookup_extent_mapping(em_tree, chunk_start, 1); read_unlock(&em_tree->lock); - BUG_ON(!em || em->start != chunk_start); + if (!em) { + printk(KERN_ERR "btrfs: couldn't find em for chunk %Lu\n", + chunk_start); + return -EIO; + } + + if (em->start != chunk_start) { + printk(KERN_ERR "btrfs: bad chunk start, em=%Lu, wanted=%Lu\n", + em->start, chunk_start); + free_extent_map(em); + return -EIO; + } map = (struct map_lookup *)em->bdev; length = em->len; diff --git a/fs/cifs/asn1.c b/fs/cifs/asn1.c index cfd1ce34e0bc..1d36db114772 100644 --- a/fs/cifs/asn1.c +++ b/fs/cifs/asn1.c @@ -614,53 +614,10 @@ decode_negTokenInit(unsigned char *security_blob, int length, } } - /* mechlistMIC */ - if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) { - /* Check if we have reached the end of the blob, but with - no mechListMic (e.g. NTLMSSP instead of KRB5) */ - if (ctx.error == ASN1_ERR_DEC_EMPTY) - goto decode_negtoken_exit; - cFYI(1, "Error decoding last part negTokenInit exit3"); - return 0; - } else if ((cls != ASN1_CTX) || (con != ASN1_CON)) { - /* tag = 3 indicating mechListMIC */ - cFYI(1, "Exit 4 cls = %d con = %d tag = %d end = %p (%d)", - cls, con, tag, end, *end); - return 0; - } - - /* sequence */ - if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) { - cFYI(1, "Error decoding last part negTokenInit exit5"); - return 0; - } else if ((cls != ASN1_UNI) || (con != ASN1_CON) - || (tag != ASN1_SEQ)) { - cFYI(1, "cls = %d con = %d tag = %d end = %p (%d)", - cls, con, tag, end, *end); - } - - /* sequence of */ - if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) { - cFYI(1, "Error decoding last part negTokenInit exit 7"); - return 0; - } else if ((cls != ASN1_CTX) || (con != ASN1_CON)) { - cFYI(1, "Exit 8 cls = %d con = %d tag = %d end = %p (%d)", - cls, con, tag, end, *end); - return 0; - } - - /* general string */ - if (asn1_header_decode(&ctx, &end, &cls, &con, &tag) == 0) { - cFYI(1, "Error decoding last part negTokenInit exit9"); - return 0; - } else if ((cls != ASN1_UNI) || (con != ASN1_PRI) - || (tag != ASN1_GENSTR)) { - cFYI(1, "Exit10 cls = %d con = %d tag = %d end = %p (%d)", - cls, con, tag, end, *end); - return 0; - } - cFYI(1, "Need to call asn1_octets_decode() function for %s", - ctx.pointer); /* is this UTF-8 or ASCII? */ -decode_negtoken_exit: + /* + * We currently ignore anything at the end of the SPNEGO blob after + * the mechTypes have been parsed, since none of that info is + * used at the moment. + */ return 1; } diff --git a/fs/cifs/cifsfs.c b/fs/cifs/cifsfs.c index 1a052c0eee8e..345fc89c4286 100644 --- a/fs/cifs/cifsfs.c +++ b/fs/cifs/cifsfs.c @@ -91,6 +91,30 @@ struct workqueue_struct *cifsiod_wq; __u8 cifs_client_guid[SMB2_CLIENT_GUID_SIZE]; #endif +/* + * Bumps refcount for cifs super block. + * Note that it should be only called if a referece to VFS super block is + * already held, e.g. in open-type syscalls context. Otherwise it can race with + * atomic_dec_and_test in deactivate_locked_super. + */ +void +cifs_sb_active(struct super_block *sb) +{ + struct cifs_sb_info *server = CIFS_SB(sb); + + if (atomic_inc_return(&server->active) == 1) + atomic_inc(&sb->s_active); +} + +void +cifs_sb_deactive(struct super_block *sb) +{ + struct cifs_sb_info *server = CIFS_SB(sb); + + if (atomic_dec_and_test(&server->active)) + deactivate_super(sb); +} + static int cifs_read_super(struct super_block *sb) { @@ -777,6 +801,7 @@ struct file_system_type cifs_fs_type = { .kill_sb = cifs_kill_sb, /* .fs_flags */ }; +MODULE_ALIAS_FS("cifs"); const struct inode_operations cifs_dir_inode_ops = { .create = cifs_create, .atomic_open = cifs_atomic_open, diff --git a/fs/cifs/cifsfs.h b/fs/cifs/cifsfs.h index 7163419cecd9..0e32c3446ce9 100644 --- a/fs/cifs/cifsfs.h +++ b/fs/cifs/cifsfs.h @@ -41,6 +41,10 @@ extern struct file_system_type cifs_fs_type; extern const struct address_space_operations cifs_addr_ops; extern const struct address_space_operations cifs_addr_ops_smallbuf; +/* Functions related to super block operations */ +extern void cifs_sb_active(struct super_block *sb); +extern void cifs_sb_deactive(struct super_block *sb); + /* Functions related to inodes */ extern const struct inode_operations cifs_dir_inode_ops; extern struct inode *cifs_root_iget(struct super_block *); diff --git a/fs/cifs/file.c b/fs/cifs/file.c index 8c0d85577314..7a0dd99e4507 100644 --- a/fs/cifs/file.c +++ b/fs/cifs/file.c @@ -300,6 +300,8 @@ cifs_new_fileinfo(struct cifs_fid *fid, struct file *file, INIT_WORK(&cfile->oplock_break, cifs_oplock_break); mutex_init(&cfile->fh_mutex); + cifs_sb_active(inode->i_sb); + /* * If the server returned a read oplock and we have mandatory brlocks, * set oplock level to None. @@ -349,7 +351,8 @@ void cifsFileInfo_put(struct cifsFileInfo *cifs_file) struct cifs_tcon *tcon = tlink_tcon(cifs_file->tlink); struct TCP_Server_Info *server = tcon->ses->server; struct cifsInodeInfo *cifsi = CIFS_I(inode); - struct cifs_sb_info *cifs_sb = CIFS_SB(inode->i_sb); + struct super_block *sb = inode->i_sb; + struct cifs_sb_info *cifs_sb = CIFS_SB(sb); struct cifsLockInfo *li, *tmp; struct cifs_fid fid; struct cifs_pending_open open; @@ -414,6 +417,7 @@ void cifsFileInfo_put(struct cifsFileInfo *cifs_file) cifs_put_tlink(cifs_file->tlink); dput(cifs_file->dentry); + cifs_sb_deactive(sb); kfree(cifs_file); } diff --git a/fs/cifs/inode.c b/fs/cifs/inode.c index 0079696305c9..20887bf63121 100644 --- a/fs/cifs/inode.c +++ b/fs/cifs/inode.c @@ -1043,7 +1043,7 @@ cifs_rename_pending_delete(const char *full_path, struct dentry *dentry, cifs_sb->mnt_cifs_flags & CIFS_MOUNT_MAP_SPECIAL_CHR); if (rc != 0) { - rc = -ETXTBSY; + rc = -EBUSY; goto undo_setattr; } @@ -1062,7 +1062,7 @@ cifs_rename_pending_delete(const char *full_path, struct dentry *dentry, if (rc == -ENOENT) rc = 0; else if (rc != 0) { - rc = -ETXTBSY; + rc = -EBUSY; goto undo_rename; } cifsInode->delete_pending = true; @@ -1169,15 +1169,13 @@ psx_del_no_retry: cifs_drop_nlink(inode); } else if (rc == -ENOENT) { d_drop(dentry); - } else if (rc == -ETXTBSY) { + } else if (rc == -EBUSY) { if (server->ops->rename_pending_delete) { rc = server->ops->rename_pending_delete(full_path, dentry, xid); if (rc == 0) cifs_drop_nlink(inode); } - if (rc == -ETXTBSY) - rc = -EBUSY; } else if ((rc == -EACCES) && (dosattr == 0) && inode) { attrs = kzalloc(sizeof(*attrs), GFP_KERNEL); if (attrs == NULL) { @@ -1518,7 +1516,7 @@ cifs_do_rename(const unsigned int xid, struct dentry *from_dentry, * source. Note that cross directory moves do not work with * rename by filehandle to various Windows servers. */ - if (rc == 0 || rc != -ETXTBSY) + if (rc == 0 || rc != -EBUSY) goto do_rename_exit; /* open-file renames don't work across directories */ diff --git a/fs/cifs/netmisc.c b/fs/cifs/netmisc.c index a82bc51fdc82..c0b25b28be6c 100644 --- a/fs/cifs/netmisc.c +++ b/fs/cifs/netmisc.c @@ -62,7 +62,7 @@ static const struct smb_to_posix_error mapping_table_ERRDOS[] = { {ERRdiffdevice, -EXDEV}, {ERRnofiles, -ENOENT}, {ERRwriteprot, -EROFS}, - {ERRbadshare, -ETXTBSY}, + {ERRbadshare, -EBUSY}, {ERRlock, -EACCES}, {ERRunsup, -EINVAL}, {ERRnosuchshare, -ENXIO}, diff --git a/fs/compat.c b/fs/compat.c index fe40fde29111..d487985dd0ea 100644 --- a/fs/compat.c +++ b/fs/compat.c @@ -558,6 +558,10 @@ ssize_t compat_rw_copy_check_uvector(int type, } *ret_pointer = iov; + ret = -EFAULT; + if (!access_ok(VERIFY_READ, uvector, nr_segs*sizeof(*uvector))) + goto out; + /* * Single unix specification: * We should -EINVAL if an element length is not >= 0 and fitting an @@ -1080,17 +1084,12 @@ static ssize_t compat_do_readv_writev(int type, struct file *file, if (!file->f_op) goto out; - ret = -EFAULT; - if (!access_ok(VERIFY_READ, uvector, nr_segs*sizeof(*uvector))) - goto out; - - tot_len = compat_rw_copy_check_uvector(type, uvector, nr_segs, + ret = compat_rw_copy_check_uvector(type, uvector, nr_segs, UIO_FASTIOV, iovstack, &iov); - if (tot_len == 0) { - ret = 0; + if (ret <= 0) goto out; - } + tot_len = ret; ret = rw_verify_area(type, file, pos, tot_len); if (ret < 0) goto out; diff --git a/fs/dcache.c b/fs/dcache.c index fbfae008ba44..e8bc3420d63e 100644 --- a/fs/dcache.c +++ b/fs/dcache.c @@ -2542,7 +2542,6 @@ static int prepend_path(const struct path *path, bool slash = false; int error = 0; - br_read_lock(&vfsmount_lock); while (dentry != root->dentry || vfsmnt != root->mnt) { struct dentry * parent; @@ -2572,8 +2571,6 @@ static int prepend_path(const struct path *path, if (!error && !slash) error = prepend(buffer, buflen, "/", 1); -out: - br_read_unlock(&vfsmount_lock); return error; global_root: @@ -2590,7 +2587,7 @@ global_root: error = prepend(buffer, buflen, "/", 1); if (!error) error = is_mounted(vfsmnt) ? 1 : 2; - goto out; + return error; } /** @@ -2617,9 +2614,11 @@ char *__d_path(const struct path *path, int error; prepend(&res, &buflen, "\0", 1); + br_read_lock(&vfsmount_lock); write_seqlock(&rename_lock); error = prepend_path(path, root, &res, &buflen); write_sequnlock(&rename_lock); + br_read_unlock(&vfsmount_lock); if (error < 0) return ERR_PTR(error); @@ -2636,9 +2635,11 @@ char *d_absolute_path(const struct path *path, int error; prepend(&res, &buflen, "\0", 1); + br_read_lock(&vfsmount_lock); write_seqlock(&rename_lock); error = prepend_path(path, &root, &res, &buflen); write_sequnlock(&rename_lock); + br_read_unlock(&vfsmount_lock); if (error > 1) error = -EINVAL; @@ -2702,11 +2703,13 @@ char *d_path(const struct path *path, char *buf, int buflen) return path->dentry->d_op->d_dname(path->dentry, buf, buflen); get_fs_root(current->fs, &root); + br_read_lock(&vfsmount_lock); write_seqlock(&rename_lock); error = path_with_deleted(path, &root, &res, &buflen); + write_sequnlock(&rename_lock); + br_read_unlock(&vfsmount_lock); if (error < 0) res = ERR_PTR(error); - write_sequnlock(&rename_lock); path_put(&root); return res; } @@ -2830,6 +2833,7 @@ SYSCALL_DEFINE2(getcwd, char __user *, buf, unsigned long, size) get_fs_root_and_pwd(current->fs, &root, &pwd); error = -ENOENT; + br_read_lock(&vfsmount_lock); write_seqlock(&rename_lock); if (!d_unlinked(pwd.dentry)) { unsigned long len; @@ -2839,6 +2843,7 @@ SYSCALL_DEFINE2(getcwd, char __user *, buf, unsigned long, size) prepend(&cwd, &buflen, "\0", 1); error = prepend_path(&pwd, &root, &cwd, &buflen); write_sequnlock(&rename_lock); + br_read_unlock(&vfsmount_lock); if (error < 0) goto out; @@ -2859,6 +2864,7 @@ SYSCALL_DEFINE2(getcwd, char __user *, buf, unsigned long, size) } } else { write_sequnlock(&rename_lock); + br_read_unlock(&vfsmount_lock); } out: diff --git a/fs/ext2/ialloc.c b/fs/ext2/ialloc.c index 8f370e012e61..7cadd823bb31 100644 --- a/fs/ext2/ialloc.c +++ b/fs/ext2/ialloc.c @@ -118,7 +118,6 @@ void ext2_free_inode (struct inode * inode) * as writing the quota to disk may need the lock as well. */ /* Quota is already initialized in iput() */ - ext2_xattr_delete_inode(inode); dquot_free_inode(inode); dquot_drop(inode); diff --git a/fs/ext2/inode.c b/fs/ext2/inode.c index c3881e56662e..fe60cc1117d8 100644 --- a/fs/ext2/inode.c +++ b/fs/ext2/inode.c @@ -34,6 +34,7 @@ #include "ext2.h" #include "acl.h" #include "xip.h" +#include "xattr.h" static int __ext2_write_inode(struct inode *inode, int do_sync); @@ -88,6 +89,7 @@ void ext2_evict_inode(struct inode * inode) inode->i_size = 0; if (inode->i_blocks) ext2_truncate_blocks(inode, 0); + ext2_xattr_delete_inode(inode); } invalidate_inode_buffers(inode); diff --git a/fs/ext3/super.c b/fs/ext3/super.c index 1d6e2ed85322..fb5120a5505c 100644 --- a/fs/ext3/super.c +++ b/fs/ext3/super.c @@ -353,7 +353,7 @@ static struct block_device *ext3_blkdev_get(dev_t dev, struct super_block *sb) return bdev; fail: - ext3_msg(sb, "error: failed to open journal device %s: %ld", + ext3_msg(sb, KERN_ERR, "error: failed to open journal device %s: %ld", __bdevname(dev, b), PTR_ERR(bdev)); return NULL; @@ -887,7 +887,7 @@ static ext3_fsblk_t get_sb_block(void **data, struct super_block *sb) /*todo: use simple_strtoll with >32bit ext3 */ sb_block = simple_strtoul(options, &options, 0); if (*options && *options != ',') { - ext3_msg(sb, "error: invalid sb specification: %s", + ext3_msg(sb, KERN_ERR, "error: invalid sb specification: %s", (char *) *data); return 1; } diff --git a/fs/ext4/ext4.h b/fs/ext4/ext4.h index 4a01ba315262..3b83cd604796 100644 --- a/fs/ext4/ext4.h +++ b/fs/ext4/ext4.h @@ -335,9 +335,9 @@ struct ext4_group_desc */ struct flex_groups { - atomic_t free_inodes; - atomic_t free_clusters; - atomic_t used_dirs; + atomic64_t free_clusters; + atomic_t free_inodes; + atomic_t used_dirs; }; #define EXT4_BG_INODE_UNINIT 0x0001 /* Inode table/bitmap not in use */ @@ -2617,7 +2617,7 @@ extern int ext4_move_extents(struct file *o_filp, struct file *d_filp, extern int __init ext4_init_pageio(void); extern void ext4_add_complete_io(ext4_io_end_t *io_end); extern void ext4_exit_pageio(void); -extern void ext4_ioend_wait(struct inode *); +extern void ext4_ioend_shutdown(struct inode *); extern void ext4_free_io_end(ext4_io_end_t *io); extern ext4_io_end_t *ext4_init_io_end(struct inode *inode, gfp_t flags); extern void ext4_end_io_work(struct work_struct *work); diff --git a/fs/ext4/extents.c b/fs/ext4/extents.c index 28dd8eeea6a9..56efcaadf848 100644 --- a/fs/ext4/extents.c +++ b/fs/ext4/extents.c @@ -1584,10 +1584,12 @@ ext4_can_extents_be_merged(struct inode *inode, struct ext4_extent *ex1, unsigned short ext1_ee_len, ext2_ee_len, max_len; /* - * Make sure that either both extents are uninitialized, or - * both are _not_. + * Make sure that both extents are initialized. We don't merge + * uninitialized extents so that we can be sure that end_io code has + * the extent that was written properly split out and conversion to + * initialized is trivial. */ - if (ext4_ext_is_uninitialized(ex1) ^ ext4_ext_is_uninitialized(ex2)) + if (ext4_ext_is_uninitialized(ex1) || ext4_ext_is_uninitialized(ex2)) return 0; if (ext4_ext_is_uninitialized(ex1)) @@ -2923,7 +2925,7 @@ static int ext4_split_extent_at(handle_t *handle, { ext4_fsblk_t newblock; ext4_lblk_t ee_block; - struct ext4_extent *ex, newex, orig_ex; + struct ext4_extent *ex, newex, orig_ex, zero_ex; struct ext4_extent *ex2 = NULL; unsigned int ee_len, depth; int err = 0; @@ -2943,6 +2945,10 @@ static int ext4_split_extent_at(handle_t *handle, newblock = split - ee_block + ext4_ext_pblock(ex); BUG_ON(split < ee_block || split >= (ee_block + ee_len)); + BUG_ON(!ext4_ext_is_uninitialized(ex) && + split_flag & (EXT4_EXT_MAY_ZEROOUT | + EXT4_EXT_MARK_UNINIT1 | + EXT4_EXT_MARK_UNINIT2)); err = ext4_ext_get_access(handle, inode, path + depth); if (err) @@ -2990,12 +2996,26 @@ static int ext4_split_extent_at(handle_t *handle, err = ext4_ext_insert_extent(handle, inode, path, &newex, flags); if (err == -ENOSPC && (EXT4_EXT_MAY_ZEROOUT & split_flag)) { if (split_flag & (EXT4_EXT_DATA_VALID1|EXT4_EXT_DATA_VALID2)) { - if (split_flag & EXT4_EXT_DATA_VALID1) + if (split_flag & EXT4_EXT_DATA_VALID1) { err = ext4_ext_zeroout(inode, ex2); - else + zero_ex.ee_block = ex2->ee_block; + zero_ex.ee_len = ext4_ext_get_actual_len(ex2); + ext4_ext_store_pblock(&zero_ex, + ext4_ext_pblock(ex2)); + } else { err = ext4_ext_zeroout(inode, ex); - } else + zero_ex.ee_block = ex->ee_block; + zero_ex.ee_len = ext4_ext_get_actual_len(ex); + ext4_ext_store_pblock(&zero_ex, + ext4_ext_pblock(ex)); + } + } else { err = ext4_ext_zeroout(inode, &orig_ex); + zero_ex.ee_block = orig_ex.ee_block; + zero_ex.ee_len = ext4_ext_get_actual_len(&orig_ex); + ext4_ext_store_pblock(&zero_ex, + ext4_ext_pblock(&orig_ex)); + } if (err) goto fix_extent_len; @@ -3003,6 +3023,12 @@ static int ext4_split_extent_at(handle_t *handle, ex->ee_len = cpu_to_le16(ee_len); ext4_ext_try_to_merge(handle, inode, path, ex); err = ext4_ext_dirty(handle, inode, path + path->p_depth); + if (err) + goto fix_extent_len; + + /* update extent status tree */ + err = ext4_es_zeroout(inode, &zero_ex); + goto out; } else if (err) goto fix_extent_len; @@ -3041,6 +3067,7 @@ static int ext4_split_extent(handle_t *handle, int err = 0; int uninitialized; int split_flag1, flags1; + int allocated = map->m_len; depth = ext_depth(inode); ex = path[depth].p_ext; @@ -3060,20 +3087,29 @@ static int ext4_split_extent(handle_t *handle, map->m_lblk + map->m_len, split_flag1, flags1); if (err) goto out; + } else { + allocated = ee_len - (map->m_lblk - ee_block); } - + /* + * Update path is required because previous ext4_split_extent_at() may + * result in split of original leaf or extent zeroout. + */ ext4_ext_drop_refs(path); path = ext4_ext_find_extent(inode, map->m_lblk, path); if (IS_ERR(path)) return PTR_ERR(path); + depth = ext_depth(inode); + ex = path[depth].p_ext; + uninitialized = ext4_ext_is_uninitialized(ex); + split_flag1 = 0; if (map->m_lblk >= ee_block) { - split_flag1 = split_flag & (EXT4_EXT_MAY_ZEROOUT | - EXT4_EXT_DATA_VALID2); - if (uninitialized) + split_flag1 = split_flag & EXT4_EXT_DATA_VALID2; + if (uninitialized) { split_flag1 |= EXT4_EXT_MARK_UNINIT1; - if (split_flag & EXT4_EXT_MARK_UNINIT2) - split_flag1 |= EXT4_EXT_MARK_UNINIT2; + split_flag1 |= split_flag & (EXT4_EXT_MAY_ZEROOUT | + EXT4_EXT_MARK_UNINIT2); + } err = ext4_split_extent_at(handle, inode, path, map->m_lblk, split_flag1, flags); if (err) @@ -3082,7 +3118,7 @@ static int ext4_split_extent(handle_t *handle, ext4_ext_show_leaf(inode, path); out: - return err ? err : map->m_len; + return err ? err : allocated; } /* @@ -3137,6 +3173,7 @@ static int ext4_ext_convert_to_initialized(handle_t *handle, ee_block = le32_to_cpu(ex->ee_block); ee_len = ext4_ext_get_actual_len(ex); allocated = ee_len - (map->m_lblk - ee_block); + zero_ex.ee_len = 0; trace_ext4_ext_convert_to_initialized_enter(inode, map, ex); @@ -3227,13 +3264,16 @@ static int ext4_ext_convert_to_initialized(handle_t *handle, if (EXT4_EXT_MAY_ZEROOUT & split_flag) max_zeroout = sbi->s_extent_max_zeroout_kb >> - inode->i_sb->s_blocksize_bits; + (inode->i_sb->s_blocksize_bits - 10); /* If extent is less than s_max_zeroout_kb, zeroout directly */ if (max_zeroout && (ee_len <= max_zeroout)) { err = ext4_ext_zeroout(inode, ex); if (err) goto out; + zero_ex.ee_block = ex->ee_block; + zero_ex.ee_len = ext4_ext_get_actual_len(ex); + ext4_ext_store_pblock(&zero_ex, ext4_ext_pblock(ex)); err = ext4_ext_get_access(handle, inode, path + depth); if (err) @@ -3292,6 +3332,9 @@ static int ext4_ext_convert_to_initialized(handle_t *handle, err = allocated; out: + /* If we have gotten a failure, don't zero out status tree */ + if (!err) + err = ext4_es_zeroout(inode, &zero_ex); return err ? err : allocated; } @@ -3374,8 +3417,19 @@ static int ext4_convert_unwritten_extents_endio(handle_t *handle, "block %llu, max_blocks %u\n", inode->i_ino, (unsigned long long)ee_block, ee_len); - /* If extent is larger than requested then split is required */ + /* If extent is larger than requested it is a clear sign that we still + * have some extent state machine issues left. So extent_split is still + * required. + * TODO: Once all related issues will be fixed this situation should be + * illegal. + */ if (ee_block != map->m_lblk || ee_len > map->m_len) { +#ifdef EXT4_DEBUG + ext4_warning("Inode (%ld) finished: extent logical block %llu," + " len %u; IO logical block %llu, len %u\n", + inode->i_ino, (unsigned long long)ee_block, ee_len, + (unsigned long long)map->m_lblk, map->m_len); +#endif err = ext4_split_unwritten_extents(handle, inode, map, path, EXT4_GET_BLOCKS_CONVERT); if (err < 0) @@ -3626,6 +3680,10 @@ ext4_ext_handle_uninitialized_extents(handle_t *handle, struct inode *inode, path, map->m_len); } else err = ret; + map->m_flags |= EXT4_MAP_MAPPED; + if (allocated > map->m_len) + allocated = map->m_len; + map->m_len = allocated; goto out2; } /* buffered IO case */ @@ -3675,6 +3733,7 @@ out: allocated - map->m_len); allocated = map->m_len; } + map->m_len = allocated; /* * If we have done fallocate with the offset that is already @@ -4106,9 +4165,6 @@ got_allocated_blocks: } } else { BUG_ON(allocated_clusters < reserved_clusters); - /* We will claim quota for all newly allocated blocks.*/ - ext4_da_update_reserve_space(inode, allocated_clusters, - 1); if (reserved_clusters < allocated_clusters) { struct ext4_inode_info *ei = EXT4_I(inode); int reservation = allocated_clusters - @@ -4159,6 +4215,15 @@ got_allocated_blocks: ei->i_reserved_data_blocks += reservation; spin_unlock(&ei->i_block_reservation_lock); } + /* + * We will claim quota for all newly allocated blocks. + * We're updating the reserved space *after* the + * correction above so we do not accidentally free + * all the metadata reservation because we might + * actually need it later on. + */ + ext4_da_update_reserve_space(inode, allocated_clusters, + 1); } } @@ -4368,8 +4433,6 @@ long ext4_fallocate(struct file *file, int mode, loff_t offset, loff_t len) if (len <= EXT_UNINIT_MAX_LEN << blkbits) flags |= EXT4_GET_BLOCKS_NO_NORMALIZE; - /* Prevent race condition between unwritten */ - ext4_flush_unwritten_io(inode); retry: while (ret >= 0 && ret < max_blocks) { map.m_lblk = map.m_lblk + ret; diff --git a/fs/ext4/extents_status.c b/fs/ext4/extents_status.c index 95796a1b7522..fe3337a85ede 100644 --- a/fs/ext4/extents_status.c +++ b/fs/ext4/extents_status.c @@ -333,17 +333,27 @@ static void ext4_es_free_extent(struct inode *inode, struct extent_status *es) static int ext4_es_can_be_merged(struct extent_status *es1, struct extent_status *es2) { - if (es1->es_lblk + es1->es_len != es2->es_lblk) + if (ext4_es_status(es1) != ext4_es_status(es2)) return 0; - if (ext4_es_status(es1) != ext4_es_status(es2)) + if (((__u64) es1->es_len) + es2->es_len > 0xFFFFFFFFULL) return 0; - if ((ext4_es_is_written(es1) || ext4_es_is_unwritten(es1)) && - (ext4_es_pblock(es1) + es1->es_len != ext4_es_pblock(es2))) + if (((__u64) es1->es_lblk) + es1->es_len != es2->es_lblk) return 0; - return 1; + if ((ext4_es_is_written(es1) || ext4_es_is_unwritten(es1)) && + (ext4_es_pblock(es1) + es1->es_len == ext4_es_pblock(es2))) + return 1; + + if (ext4_es_is_hole(es1)) + return 1; + + /* we need to check delayed extent is without unwritten status */ + if (ext4_es_is_delayed(es1) && !ext4_es_is_unwritten(es1)) + return 1; + + return 0; } static struct extent_status * @@ -389,6 +399,179 @@ ext4_es_try_to_merge_right(struct inode *inode, struct extent_status *es) return es; } +#ifdef ES_AGGRESSIVE_TEST +static void ext4_es_insert_extent_ext_check(struct inode *inode, + struct extent_status *es) +{ + struct ext4_ext_path *path = NULL; + struct ext4_extent *ex; + ext4_lblk_t ee_block; + ext4_fsblk_t ee_start; + unsigned short ee_len; + int depth, ee_status, es_status; + + path = ext4_ext_find_extent(inode, es->es_lblk, NULL); + if (IS_ERR(path)) + return; + + depth = ext_depth(inode); + ex = path[depth].p_ext; + + if (ex) { + + ee_block = le32_to_cpu(ex->ee_block); + ee_start = ext4_ext_pblock(ex); + ee_len = ext4_ext_get_actual_len(ex); + + ee_status = ext4_ext_is_uninitialized(ex) ? 1 : 0; + es_status = ext4_es_is_unwritten(es) ? 1 : 0; + + /* + * Make sure ex and es are not overlap when we try to insert + * a delayed/hole extent. + */ + if (!ext4_es_is_written(es) && !ext4_es_is_unwritten(es)) { + if (in_range(es->es_lblk, ee_block, ee_len)) { + pr_warn("ES insert assertation failed for " + "inode: %lu we can find an extent " + "at block [%d/%d/%llu/%c], but we " + "want to add an delayed/hole extent " + "[%d/%d/%llu/%llx]\n", + inode->i_ino, ee_block, ee_len, + ee_start, ee_status ? 'u' : 'w', + es->es_lblk, es->es_len, + ext4_es_pblock(es), ext4_es_status(es)); + } + goto out; + } + + /* + * We don't check ee_block == es->es_lblk, etc. because es + * might be a part of whole extent, vice versa. + */ + if (es->es_lblk < ee_block || + ext4_es_pblock(es) != ee_start + es->es_lblk - ee_block) { + pr_warn("ES insert assertation failed for inode: %lu " + "ex_status [%d/%d/%llu/%c] != " + "es_status [%d/%d/%llu/%c]\n", inode->i_ino, + ee_block, ee_len, ee_start, + ee_status ? 'u' : 'w', es->es_lblk, es->es_len, + ext4_es_pblock(es), es_status ? 'u' : 'w'); + goto out; + } + + if (ee_status ^ es_status) { + pr_warn("ES insert assertation failed for inode: %lu " + "ex_status [%d/%d/%llu/%c] != " + "es_status [%d/%d/%llu/%c]\n", inode->i_ino, + ee_block, ee_len, ee_start, + ee_status ? 'u' : 'w', es->es_lblk, es->es_len, + ext4_es_pblock(es), es_status ? 'u' : 'w'); + } + } else { + /* + * We can't find an extent on disk. So we need to make sure + * that we don't want to add an written/unwritten extent. + */ + if (!ext4_es_is_delayed(es) && !ext4_es_is_hole(es)) { + pr_warn("ES insert assertation failed for inode: %lu " + "can't find an extent at block %d but we want " + "to add an written/unwritten extent " + "[%d/%d/%llu/%llx]\n", inode->i_ino, + es->es_lblk, es->es_lblk, es->es_len, + ext4_es_pblock(es), ext4_es_status(es)); + } + } +out: + if (path) { + ext4_ext_drop_refs(path); + kfree(path); + } +} + +static void ext4_es_insert_extent_ind_check(struct inode *inode, + struct extent_status *es) +{ + struct ext4_map_blocks map; + int retval; + + /* + * Here we call ext4_ind_map_blocks to lookup a block mapping because + * 'Indirect' structure is defined in indirect.c. So we couldn't + * access direct/indirect tree from outside. It is too dirty to define + * this function in indirect.c file. + */ + + map.m_lblk = es->es_lblk; + map.m_len = es->es_len; + + retval = ext4_ind_map_blocks(NULL, inode, &map, 0); + if (retval > 0) { + if (ext4_es_is_delayed(es) || ext4_es_is_hole(es)) { + /* + * We want to add a delayed/hole extent but this + * block has been allocated. + */ + pr_warn("ES insert assertation failed for inode: %lu " + "We can find blocks but we want to add a " + "delayed/hole extent [%d/%d/%llu/%llx]\n", + inode->i_ino, es->es_lblk, es->es_len, + ext4_es_pblock(es), ext4_es_status(es)); + return; + } else if (ext4_es_is_written(es)) { + if (retval != es->es_len) { + pr_warn("ES insert assertation failed for " + "inode: %lu retval %d != es_len %d\n", + inode->i_ino, retval, es->es_len); + return; + } + if (map.m_pblk != ext4_es_pblock(es)) { + pr_warn("ES insert assertation failed for " + "inode: %lu m_pblk %llu != " + "es_pblk %llu\n", + inode->i_ino, map.m_pblk, + ext4_es_pblock(es)); + return; + } + } else { + /* + * We don't need to check unwritten extent because + * indirect-based file doesn't have it. + */ + BUG_ON(1); + } + } else if (retval == 0) { + if (ext4_es_is_written(es)) { + pr_warn("ES insert assertation failed for inode: %lu " + "We can't find the block but we want to add " + "an written extent [%d/%d/%llu/%llx]\n", + inode->i_ino, es->es_lblk, es->es_len, + ext4_es_pblock(es), ext4_es_status(es)); + return; + } + } +} + +static inline void ext4_es_insert_extent_check(struct inode *inode, + struct extent_status *es) +{ + /* + * We don't need to worry about the race condition because + * caller takes i_data_sem locking. + */ + BUG_ON(!rwsem_is_locked(&EXT4_I(inode)->i_data_sem)); + if (ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS)) + ext4_es_insert_extent_ext_check(inode, es); + else + ext4_es_insert_extent_ind_check(inode, es); +} +#else +static inline void ext4_es_insert_extent_check(struct inode *inode, + struct extent_status *es) +{ +} +#endif + static int __es_insert_extent(struct inode *inode, struct extent_status *newes) { struct ext4_es_tree *tree = &EXT4_I(inode)->i_es_tree; @@ -471,6 +654,8 @@ int ext4_es_insert_extent(struct inode *inode, ext4_lblk_t lblk, ext4_es_store_status(&newes, status); trace_ext4_es_insert_extent(inode, &newes); + ext4_es_insert_extent_check(inode, &newes); + write_lock(&EXT4_I(inode)->i_es_lock); err = __es_remove_extent(inode, lblk, end); if (err != 0) @@ -669,6 +854,23 @@ int ext4_es_remove_extent(struct inode *inode, ext4_lblk_t lblk, return err; } +int ext4_es_zeroout(struct inode *inode, struct ext4_extent *ex) +{ + ext4_lblk_t ee_block; + ext4_fsblk_t ee_pblock; + unsigned int ee_len; + + ee_block = le32_to_cpu(ex->ee_block); + ee_len = ext4_ext_get_actual_len(ex); + ee_pblock = ext4_ext_pblock(ex); + + if (ee_len == 0) + return 0; + + return ext4_es_insert_extent(inode, ee_block, ee_len, ee_pblock, + EXTENT_STATUS_WRITTEN); +} + static int ext4_es_shrink(struct shrinker *shrink, struct shrink_control *sc) { struct ext4_sb_info *sbi = container_of(shrink, diff --git a/fs/ext4/extents_status.h b/fs/ext4/extents_status.h index f190dfe969da..d8e2d4dc311e 100644 --- a/fs/ext4/extents_status.h +++ b/fs/ext4/extents_status.h @@ -21,6 +21,12 @@ #endif /* + * With ES_AGGRESSIVE_TEST defined, the result of es caching will be + * checked with old map_block's result. + */ +#define ES_AGGRESSIVE_TEST__ + +/* * These flags live in the high bits of extent_status.es_pblk */ #define EXTENT_STATUS_WRITTEN (1ULL << 63) @@ -33,6 +39,8 @@ EXTENT_STATUS_DELAYED | \ EXTENT_STATUS_HOLE) +struct ext4_extent; + struct extent_status { struct rb_node rb_node; ext4_lblk_t es_lblk; /* first logical block extent covers */ @@ -58,6 +66,7 @@ extern void ext4_es_find_delayed_extent(struct inode *inode, ext4_lblk_t lblk, struct extent_status *es); extern int ext4_es_lookup_extent(struct inode *inode, ext4_lblk_t lblk, struct extent_status *es); +extern int ext4_es_zeroout(struct inode *inode, struct ext4_extent *ex); static inline int ext4_es_is_written(struct extent_status *es) { diff --git a/fs/ext4/ialloc.c b/fs/ext4/ialloc.c index 32fd2b9075dd..6c5bb8d993fe 100644 --- a/fs/ext4/ialloc.c +++ b/fs/ext4/ialloc.c @@ -324,8 +324,8 @@ error_return: } struct orlov_stats { + __u64 free_clusters; __u32 free_inodes; - __u32 free_clusters; __u32 used_dirs; }; @@ -342,7 +342,7 @@ static void get_orlov_stats(struct super_block *sb, ext4_group_t g, if (flex_size > 1) { stats->free_inodes = atomic_read(&flex_group[g].free_inodes); - stats->free_clusters = atomic_read(&flex_group[g].free_clusters); + stats->free_clusters = atomic64_read(&flex_group[g].free_clusters); stats->used_dirs = atomic_read(&flex_group[g].used_dirs); return; } diff --git a/fs/ext4/inode.c b/fs/ext4/inode.c index 9ea0cde3fa9e..b3a5213bc73e 100644 --- a/fs/ext4/inode.c +++ b/fs/ext4/inode.c @@ -185,8 +185,6 @@ void ext4_evict_inode(struct inode *inode) trace_ext4_evict_inode(inode); - ext4_ioend_wait(inode); - if (inode->i_nlink) { /* * When journalling data dirty buffers are tracked only in the @@ -207,7 +205,8 @@ void ext4_evict_inode(struct inode *inode) * don't use page cache. */ if (ext4_should_journal_data(inode) && - (S_ISLNK(inode->i_mode) || S_ISREG(inode->i_mode))) { + (S_ISLNK(inode->i_mode) || S_ISREG(inode->i_mode)) && + inode->i_ino != EXT4_JOURNAL_INO) { journal_t *journal = EXT4_SB(inode->i_sb)->s_journal; tid_t commit_tid = EXT4_I(inode)->i_datasync_tid; @@ -216,6 +215,7 @@ void ext4_evict_inode(struct inode *inode) filemap_write_and_wait(&inode->i_data); } truncate_inode_pages(&inode->i_data, 0); + ext4_ioend_shutdown(inode); goto no_delete; } @@ -225,6 +225,7 @@ void ext4_evict_inode(struct inode *inode) if (ext4_should_order_data(inode)) ext4_begin_ordered_truncate(inode, 0); truncate_inode_pages(&inode->i_data, 0); + ext4_ioend_shutdown(inode); if (is_bad_inode(inode)) goto no_delete; @@ -482,6 +483,58 @@ static pgoff_t ext4_num_dirty_pages(struct inode *inode, pgoff_t idx, return num; } +#ifdef ES_AGGRESSIVE_TEST +static void ext4_map_blocks_es_recheck(handle_t *handle, + struct inode *inode, + struct ext4_map_blocks *es_map, + struct ext4_map_blocks *map, + int flags) +{ + int retval; + + map->m_flags = 0; + /* + * There is a race window that the result is not the same. + * e.g. xfstests #223 when dioread_nolock enables. The reason + * is that we lookup a block mapping in extent status tree with + * out taking i_data_sem. So at the time the unwritten extent + * could be converted. + */ + if (!(flags & EXT4_GET_BLOCKS_NO_LOCK)) + down_read((&EXT4_I(inode)->i_data_sem)); + if (ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS)) { + retval = ext4_ext_map_blocks(handle, inode, map, flags & + EXT4_GET_BLOCKS_KEEP_SIZE); + } else { + retval = ext4_ind_map_blocks(handle, inode, map, flags & + EXT4_GET_BLOCKS_KEEP_SIZE); + } + if (!(flags & EXT4_GET_BLOCKS_NO_LOCK)) + up_read((&EXT4_I(inode)->i_data_sem)); + /* + * Clear EXT4_MAP_FROM_CLUSTER and EXT4_MAP_BOUNDARY flag + * because it shouldn't be marked in es_map->m_flags. + */ + map->m_flags &= ~(EXT4_MAP_FROM_CLUSTER | EXT4_MAP_BOUNDARY); + + /* + * We don't check m_len because extent will be collpased in status + * tree. So the m_len might not equal. + */ + if (es_map->m_lblk != map->m_lblk || + es_map->m_flags != map->m_flags || + es_map->m_pblk != map->m_pblk) { + printk("ES cache assertation failed for inode: %lu " + "es_cached ex [%d/%d/%llu/%x] != " + "found ex [%d/%d/%llu/%x] retval %d flags %x\n", + inode->i_ino, es_map->m_lblk, es_map->m_len, + es_map->m_pblk, es_map->m_flags, map->m_lblk, + map->m_len, map->m_pblk, map->m_flags, + retval, flags); + } +} +#endif /* ES_AGGRESSIVE_TEST */ + /* * The ext4_map_blocks() function tries to look up the requested blocks, * and returns if the blocks are already mapped. @@ -509,6 +562,11 @@ int ext4_map_blocks(handle_t *handle, struct inode *inode, { struct extent_status es; int retval; +#ifdef ES_AGGRESSIVE_TEST + struct ext4_map_blocks orig_map; + + memcpy(&orig_map, map, sizeof(*map)); +#endif map->m_flags = 0; ext_debug("ext4_map_blocks(): inode %lu, flag %d, max_blocks %u," @@ -531,6 +589,10 @@ int ext4_map_blocks(handle_t *handle, struct inode *inode, } else { BUG_ON(1); } +#ifdef ES_AGGRESSIVE_TEST + ext4_map_blocks_es_recheck(handle, inode, map, + &orig_map, flags); +#endif goto found; } @@ -551,6 +613,15 @@ int ext4_map_blocks(handle_t *handle, struct inode *inode, int ret; unsigned long long status; +#ifdef ES_AGGRESSIVE_TEST + if (retval != map->m_len) { + printk("ES len assertation failed for inode: %lu " + "retval %d != map->m_len %d " + "in %s (lookup)\n", inode->i_ino, retval, + map->m_len, __func__); + } +#endif + status = map->m_flags & EXT4_MAP_UNWRITTEN ? EXTENT_STATUS_UNWRITTEN : EXTENT_STATUS_WRITTEN; if (!(flags & EXT4_GET_BLOCKS_DELALLOC_RESERVE) && @@ -643,6 +714,24 @@ found: int ret; unsigned long long status; +#ifdef ES_AGGRESSIVE_TEST + if (retval != map->m_len) { + printk("ES len assertation failed for inode: %lu " + "retval %d != map->m_len %d " + "in %s (allocation)\n", inode->i_ino, retval, + map->m_len, __func__); + } +#endif + + /* + * If the extent has been zeroed out, we don't need to update + * extent status tree. + */ + if ((flags & EXT4_GET_BLOCKS_PRE_IO) && + ext4_es_lookup_extent(inode, map->m_lblk, &es)) { + if (ext4_es_is_written(&es)) + goto has_zeroout; + } status = map->m_flags & EXT4_MAP_UNWRITTEN ? EXTENT_STATUS_UNWRITTEN : EXTENT_STATUS_WRITTEN; if (!(flags & EXT4_GET_BLOCKS_DELALLOC_RESERVE) && @@ -655,6 +744,7 @@ found: retval = ret; } +has_zeroout: up_write((&EXT4_I(inode)->i_data_sem)); if (retval > 0 && map->m_flags & EXT4_MAP_MAPPED) { int ret = check_block_validity(inode, map); @@ -1216,6 +1306,55 @@ static int ext4_journalled_write_end(struct file *file, } /* + * Reserve a metadata for a single block located at lblock + */ +static int ext4_da_reserve_metadata(struct inode *inode, ext4_lblk_t lblock) +{ + int retries = 0; + struct ext4_sb_info *sbi = EXT4_SB(inode->i_sb); + struct ext4_inode_info *ei = EXT4_I(inode); + unsigned int md_needed; + ext4_lblk_t save_last_lblock; + int save_len; + + /* + * recalculate the amount of metadata blocks to reserve + * in order to allocate nrblocks + * worse case is one extent per block + */ +repeat: + spin_lock(&ei->i_block_reservation_lock); + /* + * ext4_calc_metadata_amount() has side effects, which we have + * to be prepared undo if we fail to claim space. + */ + save_len = ei->i_da_metadata_calc_len; + save_last_lblock = ei->i_da_metadata_calc_last_lblock; + md_needed = EXT4_NUM_B2C(sbi, + ext4_calc_metadata_amount(inode, lblock)); + trace_ext4_da_reserve_space(inode, md_needed); + + /* + * We do still charge estimated metadata to the sb though; + * we cannot afford to run out of free blocks. + */ + if (ext4_claim_free_clusters(sbi, md_needed, 0)) { + ei->i_da_metadata_calc_len = save_len; + ei->i_da_metadata_calc_last_lblock = save_last_lblock; + spin_unlock(&ei->i_block_reservation_lock); + if (ext4_should_retry_alloc(inode->i_sb, &retries)) { + cond_resched(); + goto repeat; + } + return -ENOSPC; + } + ei->i_reserved_meta_blocks += md_needed; + spin_unlock(&ei->i_block_reservation_lock); + + return 0; /* success */ +} + +/* * Reserve a single cluster located at lblock */ static int ext4_da_reserve_space(struct inode *inode, ext4_lblk_t lblock) @@ -1263,7 +1402,7 @@ repeat: ei->i_da_metadata_calc_last_lblock = save_last_lblock; spin_unlock(&ei->i_block_reservation_lock); if (ext4_should_retry_alloc(inode->i_sb, &retries)) { - yield(); + cond_resched(); goto repeat; } dquot_release_reservation_block(inode, EXT4_C2B(sbi, 1)); @@ -1768,6 +1907,11 @@ static int ext4_da_map_blocks(struct inode *inode, sector_t iblock, struct extent_status es; int retval; sector_t invalid_block = ~((sector_t) 0xffff); +#ifdef ES_AGGRESSIVE_TEST + struct ext4_map_blocks orig_map; + + memcpy(&orig_map, map, sizeof(*map)); +#endif if (invalid_block < ext4_blocks_count(EXT4_SB(inode->i_sb)->s_es)) invalid_block = ~0; @@ -1809,6 +1953,9 @@ static int ext4_da_map_blocks(struct inode *inode, sector_t iblock, else BUG_ON(1); +#ifdef ES_AGGRESSIVE_TEST + ext4_map_blocks_es_recheck(NULL, inode, map, &orig_map, 0); +#endif return retval; } @@ -1843,8 +1990,11 @@ add_delayed: * XXX: __block_prepare_write() unmaps passed block, * is it OK? */ - /* If the block was allocated from previously allocated cluster, - * then we dont need to reserve it again. */ + /* + * If the block was allocated from previously allocated cluster, + * then we don't need to reserve it again. However we still need + * to reserve metadata for every block we're going to write. + */ if (!(map->m_flags & EXT4_MAP_FROM_CLUSTER)) { ret = ext4_da_reserve_space(inode, iblock); if (ret) { @@ -1852,6 +2002,13 @@ add_delayed: retval = ret; goto out_unlock; } + } else { + ret = ext4_da_reserve_metadata(inode, iblock); + if (ret) { + /* not enough space to reserve */ + retval = ret; + goto out_unlock; + } } ret = ext4_es_insert_extent(inode, map->m_lblk, map->m_len, @@ -1873,6 +2030,15 @@ add_delayed: int ret; unsigned long long status; +#ifdef ES_AGGRESSIVE_TEST + if (retval != map->m_len) { + printk("ES len assertation failed for inode: %lu " + "retval %d != map->m_len %d " + "in %s (lookup)\n", inode->i_ino, retval, + map->m_len, __func__); + } +#endif + status = map->m_flags & EXT4_MAP_UNWRITTEN ? EXTENT_STATUS_UNWRITTEN : EXTENT_STATUS_WRITTEN; ret = ext4_es_insert_extent(inode, map->m_lblk, map->m_len, @@ -2908,8 +3074,8 @@ static int ext4_releasepage(struct page *page, gfp_t wait) trace_ext4_releasepage(page); - WARN_ON(PageChecked(page)); - if (!page_has_buffers(page)) + /* Page has dirty journalled data -> cannot release */ + if (PageChecked(page)) return 0; if (journal) return jbd2_journal_try_to_free_buffers(journal, page, wait); diff --git a/fs/ext4/mballoc.c b/fs/ext4/mballoc.c index 7bb713a46fe4..ee6614bdb639 100644 --- a/fs/ext4/mballoc.c +++ b/fs/ext4/mballoc.c @@ -2804,8 +2804,8 @@ ext4_mb_mark_diskspace_used(struct ext4_allocation_context *ac, if (sbi->s_log_groups_per_flex) { ext4_group_t flex_group = ext4_flex_group(sbi, ac->ac_b_ex.fe_group); - atomic_sub(ac->ac_b_ex.fe_len, - &sbi->s_flex_groups[flex_group].free_clusters); + atomic64_sub(ac->ac_b_ex.fe_len, + &sbi->s_flex_groups[flex_group].free_clusters); } err = ext4_handle_dirty_metadata(handle, NULL, bitmap_bh); @@ -3692,11 +3692,7 @@ repeat: if (free < needed && busy) { busy = 0; ext4_unlock_group(sb, group); - /* - * Yield the CPU here so that we don't get soft lockup - * in non preempt case. - */ - yield(); + cond_resched(); goto repeat; } @@ -4246,7 +4242,7 @@ ext4_fsblk_t ext4_mb_new_blocks(handle_t *handle, ext4_claim_free_clusters(sbi, ar->len, ar->flags)) { /* let others to free the space */ - yield(); + cond_resched(); ar->len = ar->len >> 1; } if (!ar->len) { @@ -4464,7 +4460,6 @@ void ext4_free_blocks(handle_t *handle, struct inode *inode, struct buffer_head *bitmap_bh = NULL; struct super_block *sb = inode->i_sb; struct ext4_group_desc *gdp; - unsigned long freed = 0; unsigned int overflow; ext4_grpblk_t bit; struct buffer_head *gd_bh; @@ -4666,14 +4661,12 @@ do_more: if (sbi->s_log_groups_per_flex) { ext4_group_t flex_group = ext4_flex_group(sbi, block_group); - atomic_add(count_clusters, - &sbi->s_flex_groups[flex_group].free_clusters); + atomic64_add(count_clusters, + &sbi->s_flex_groups[flex_group].free_clusters); } ext4_mb_unload_buddy(&e4b); - freed += count; - if (!(flags & EXT4_FREE_BLOCKS_NO_QUOT_UPDATE)) dquot_free_block(inode, EXT4_C2B(sbi, count_clusters)); @@ -4811,8 +4804,8 @@ int ext4_group_add_blocks(handle_t *handle, struct super_block *sb, if (sbi->s_log_groups_per_flex) { ext4_group_t flex_group = ext4_flex_group(sbi, block_group); - atomic_add(EXT4_NUM_B2C(sbi, blocks_freed), - &sbi->s_flex_groups[flex_group].free_clusters); + atomic64_add(EXT4_NUM_B2C(sbi, blocks_freed), + &sbi->s_flex_groups[flex_group].free_clusters); } ext4_mb_unload_buddy(&e4b); diff --git a/fs/ext4/move_extent.c b/fs/ext4/move_extent.c index 4e81d47aa8cb..33e1c086858b 100644 --- a/fs/ext4/move_extent.c +++ b/fs/ext4/move_extent.c @@ -32,16 +32,18 @@ */ static inline int get_ext_path(struct inode *inode, ext4_lblk_t lblock, - struct ext4_ext_path **path) + struct ext4_ext_path **orig_path) { int ret = 0; + struct ext4_ext_path *path; - *path = ext4_ext_find_extent(inode, lblock, *path); - if (IS_ERR(*path)) { - ret = PTR_ERR(*path); - *path = NULL; - } else if ((*path)[ext_depth(inode)].p_ext == NULL) + path = ext4_ext_find_extent(inode, lblock, *orig_path); + if (IS_ERR(path)) + ret = PTR_ERR(path); + else if (path[ext_depth(inode)].p_ext == NULL) ret = -ENODATA; + else + *orig_path = path; return ret; } @@ -611,24 +613,25 @@ mext_check_coverage(struct inode *inode, ext4_lblk_t from, ext4_lblk_t count, { struct ext4_ext_path *path = NULL; struct ext4_extent *ext; + int ret = 0; ext4_lblk_t last = from + count; while (from < last) { *err = get_ext_path(inode, from, &path); if (*err) - return 0; + goto out; ext = path[ext_depth(inode)].p_ext; - if (!ext) { - ext4_ext_drop_refs(path); - return 0; - } - if (uninit != ext4_ext_is_uninitialized(ext)) { - ext4_ext_drop_refs(path); - return 0; - } + if (uninit != ext4_ext_is_uninitialized(ext)) + goto out; from += ext4_ext_get_actual_len(ext); ext4_ext_drop_refs(path); } - return 1; + ret = 1; +out: + if (path) { + ext4_ext_drop_refs(path); + kfree(path); + } + return ret; } /** @@ -666,6 +669,14 @@ mext_replace_branches(handle_t *handle, struct inode *orig_inode, int replaced_count = 0; int dext_alen; + *err = ext4_es_remove_extent(orig_inode, from, count); + if (*err) + goto out; + + *err = ext4_es_remove_extent(donor_inode, from, count); + if (*err) + goto out; + /* Get the original extent for the block "orig_off" */ *err = get_ext_path(orig_inode, orig_off, &orig_path); if (*err) diff --git a/fs/ext4/page-io.c b/fs/ext4/page-io.c index 809b31003ecc..047a6de04a0a 100644 --- a/fs/ext4/page-io.c +++ b/fs/ext4/page-io.c @@ -50,11 +50,21 @@ void ext4_exit_pageio(void) kmem_cache_destroy(io_page_cachep); } -void ext4_ioend_wait(struct inode *inode) +/* + * This function is called by ext4_evict_inode() to make sure there is + * no more pending I/O completion work left to do. + */ +void ext4_ioend_shutdown(struct inode *inode) { wait_queue_head_t *wq = ext4_ioend_wq(inode); wait_event(*wq, (atomic_read(&EXT4_I(inode)->i_ioend_count) == 0)); + /* + * We need to make sure the work structure is finished being + * used before we let the inode get destroyed. + */ + if (work_pending(&EXT4_I(inode)->i_unwritten_work)) + cancel_work_sync(&EXT4_I(inode)->i_unwritten_work); } static void put_io_page(struct ext4_io_page *io_page) diff --git a/fs/ext4/resize.c b/fs/ext4/resize.c index b2c8ee56eb98..c169477a62c9 100644 --- a/fs/ext4/resize.c +++ b/fs/ext4/resize.c @@ -1360,8 +1360,8 @@ static void ext4_update_super(struct super_block *sb, sbi->s_log_groups_per_flex) { ext4_group_t flex_group; flex_group = ext4_flex_group(sbi, group_data[0].group); - atomic_add(EXT4_NUM_B2C(sbi, free_blocks), - &sbi->s_flex_groups[flex_group].free_clusters); + atomic64_add(EXT4_NUM_B2C(sbi, free_blocks), + &sbi->s_flex_groups[flex_group].free_clusters); atomic_add(EXT4_INODES_PER_GROUP(sb) * flex_gd->count, &sbi->s_flex_groups[flex_group].free_inodes); } diff --git a/fs/ext4/super.c b/fs/ext4/super.c index 34e855219231..5d6d53578124 100644 --- a/fs/ext4/super.c +++ b/fs/ext4/super.c @@ -91,6 +91,7 @@ static struct file_system_type ext2_fs_type = { .fs_flags = FS_REQUIRES_DEV, }; MODULE_ALIAS_FS("ext2"); +MODULE_ALIAS("ext2"); #define IS_EXT2_SB(sb) ((sb)->s_bdev->bd_holder == &ext2_fs_type) #else #define IS_EXT2_SB(sb) (0) @@ -106,6 +107,7 @@ static struct file_system_type ext3_fs_type = { .fs_flags = FS_REQUIRES_DEV, }; MODULE_ALIAS_FS("ext3"); +MODULE_ALIAS("ext3"); #define IS_EXT3_SB(sb) ((sb)->s_bdev->bd_holder == &ext3_fs_type) #else #define IS_EXT3_SB(sb) (0) @@ -1925,8 +1927,8 @@ static int ext4_fill_flex_info(struct super_block *sb) flex_group = ext4_flex_group(sbi, i); atomic_add(ext4_free_inodes_count(sb, gdp), &sbi->s_flex_groups[flex_group].free_inodes); - atomic_add(ext4_free_group_clusters(sb, gdp), - &sbi->s_flex_groups[flex_group].free_clusters); + atomic64_add(ext4_free_group_clusters(sb, gdp), + &sbi->s_flex_groups[flex_group].free_clusters); atomic_add(ext4_used_dirs_count(sb, gdp), &sbi->s_flex_groups[flex_group].used_dirs); } diff --git a/fs/freevxfs/vxfs_super.c b/fs/freevxfs/vxfs_super.c index 455074308069..e37eb274e492 100644 --- a/fs/freevxfs/vxfs_super.c +++ b/fs/freevxfs/vxfs_super.c @@ -258,6 +258,7 @@ static struct file_system_type vxfs_fs_type = { .fs_flags = FS_REQUIRES_DEV, }; MODULE_ALIAS_FS("vxfs"); /* makes mount -t vxfs autoload the module */ +MODULE_ALIAS("vxfs"); static int __init vxfs_init(void) diff --git a/fs/hostfs/hostfs_kern.c b/fs/hostfs/hostfs_kern.c index fbabb906066f..0f6e52d22b84 100644 --- a/fs/hostfs/hostfs_kern.c +++ b/fs/hostfs/hostfs_kern.c @@ -845,15 +845,8 @@ int hostfs_setattr(struct dentry *dentry, struct iattr *attr) return err; if ((attr->ia_valid & ATTR_SIZE) && - attr->ia_size != i_size_read(inode)) { - int error; - - error = inode_newsize_ok(inode, attr->ia_size); - if (error) - return error; - + attr->ia_size != i_size_read(inode)) truncate_setsize(inode, attr->ia_size); - } setattr_copy(inode, attr); mark_inode_dirty(inode); @@ -993,6 +986,7 @@ static struct file_system_type hostfs_type = { .kill_sb = hostfs_kill_sb, .fs_flags = 0, }; +MODULE_ALIAS_FS("hostfs"); static int __init init_hostfs(void) { diff --git a/fs/hpfs/super.c b/fs/hpfs/super.c index a3076228523d..a0617e706957 100644 --- a/fs/hpfs/super.c +++ b/fs/hpfs/super.c @@ -688,6 +688,7 @@ static struct file_system_type hpfs_fs_type = { .kill_sb = kill_block_super, .fs_flags = FS_REQUIRES_DEV, }; +MODULE_ALIAS_FS("hpfs"); static int __init init_hpfs_fs(void) { diff --git a/fs/internal.h b/fs/internal.h index 507141fceb99..4be78237d896 100644 --- a/fs/internal.h +++ b/fs/internal.h @@ -125,3 +125,8 @@ extern int invalidate_inodes(struct super_block *, bool); * dcache.c */ extern struct dentry *__d_alloc(struct super_block *, const struct qstr *); + +/* + * read_write.c + */ +extern ssize_t __kernel_write(struct file *, const char *, size_t, loff_t *); diff --git a/fs/isofs/inode.c b/fs/isofs/inode.c index a67f16e846a2..d9b8aebdeb22 100644 --- a/fs/isofs/inode.c +++ b/fs/isofs/inode.c @@ -1557,6 +1557,7 @@ static struct file_system_type iso9660_fs_type = { .fs_flags = FS_REQUIRES_DEV, }; MODULE_ALIAS_FS("iso9660"); +MODULE_ALIAS("iso9660"); static int __init init_iso9660_fs(void) { diff --git a/fs/jbd2/transaction.c b/fs/jbd2/transaction.c index d6ee5aed56b1..325bc019ed88 100644 --- a/fs/jbd2/transaction.c +++ b/fs/jbd2/transaction.c @@ -1065,9 +1065,12 @@ out: void jbd2_journal_set_triggers(struct buffer_head *bh, struct jbd2_buffer_trigger_type *type) { - struct journal_head *jh = bh2jh(bh); + struct journal_head *jh = jbd2_journal_grab_journal_head(bh); + if (WARN_ON(!jh)) + return; jh->b_triggers = type; + jbd2_journal_put_journal_head(jh); } void jbd2_buffer_frozen_trigger(struct journal_head *jh, void *mapped_data, @@ -1119,17 +1122,18 @@ int jbd2_journal_dirty_metadata(handle_t *handle, struct buffer_head *bh) { transaction_t *transaction = handle->h_transaction; journal_t *journal = transaction->t_journal; - struct journal_head *jh = bh2jh(bh); + struct journal_head *jh; int ret = 0; - jbd_debug(5, "journal_head %p\n", jh); - JBUFFER_TRACE(jh, "entry"); if (is_handle_aborted(handle)) goto out; - if (!buffer_jbd(bh)) { + jh = jbd2_journal_grab_journal_head(bh); + if (!jh) { ret = -EUCLEAN; goto out; } + jbd_debug(5, "journal_head %p\n", jh); + JBUFFER_TRACE(jh, "entry"); jbd_lock_bh_state(bh); @@ -1220,6 +1224,7 @@ int jbd2_journal_dirty_metadata(handle_t *handle, struct buffer_head *bh) spin_unlock(&journal->j_list_lock); out_unlock_bh: jbd_unlock_bh_state(bh); + jbd2_journal_put_journal_head(jh); out: JBUFFER_TRACE(jh, "exit"); WARN_ON(ret); /* All errors are bugs, so dump the stack */ diff --git a/fs/namespace.c b/fs/namespace.c index 50ca17d3cb45..d581e45c0a9f 100644 --- a/fs/namespace.c +++ b/fs/namespace.c @@ -798,6 +798,10 @@ static struct mount *clone_mnt(struct mount *old, struct dentry *root, } mnt->mnt.mnt_flags = old->mnt.mnt_flags & ~MNT_WRITE_HOLD; + /* Don't allow unprivileged users to change mount flags */ + if ((flag & CL_UNPRIVILEGED) && (mnt->mnt.mnt_flags & MNT_READONLY)) + mnt->mnt.mnt_flags |= MNT_LOCK_READONLY; + atomic_inc(&sb->s_active); mnt->mnt.mnt_sb = sb; mnt->mnt.mnt_root = dget(root); @@ -1713,6 +1717,9 @@ static int change_mount_flags(struct vfsmount *mnt, int ms_flags) if (readonly_request == __mnt_is_readonly(mnt)) return 0; + if (mnt->mnt_flags & MNT_LOCK_READONLY) + return -EPERM; + if (readonly_request) error = mnt_make_readonly(real_mount(mnt)); else @@ -2339,7 +2346,7 @@ static struct mnt_namespace *dup_mnt_ns(struct mnt_namespace *mnt_ns, /* First pass: copy the tree topology */ copy_flags = CL_COPY_ALL | CL_EXPIRE; if (user_ns != mnt_ns->user_ns) - copy_flags |= CL_SHARED_TO_SLAVE; + copy_flags |= CL_SHARED_TO_SLAVE | CL_UNPRIVILEGED; new = copy_tree(old, old->mnt.mnt_root, copy_flags); if (IS_ERR(new)) { up_write(&namespace_sem); @@ -2732,6 +2739,51 @@ bool our_mnt(struct vfsmount *mnt) return check_mnt(real_mount(mnt)); } +bool current_chrooted(void) +{ + /* Does the current process have a non-standard root */ + struct path ns_root; + struct path fs_root; + bool chrooted; + + /* Find the namespace root */ + ns_root.mnt = ¤t->nsproxy->mnt_ns->root->mnt; + ns_root.dentry = ns_root.mnt->mnt_root; + path_get(&ns_root); + while (d_mountpoint(ns_root.dentry) && follow_down_one(&ns_root)) + ; + + get_fs_root(current->fs, &fs_root); + + chrooted = !path_equal(&fs_root, &ns_root); + + path_put(&fs_root); + path_put(&ns_root); + + return chrooted; +} + +void update_mnt_policy(struct user_namespace *userns) +{ + struct mnt_namespace *ns = current->nsproxy->mnt_ns; + struct mount *mnt; + + down_read(&namespace_sem); + list_for_each_entry(mnt, &ns->list, mnt_list) { + switch (mnt->mnt.mnt_sb->s_magic) { + case SYSFS_MAGIC: + userns->may_mount_sysfs = true; + break; + case PROC_SUPER_MAGIC: + userns->may_mount_proc = true; + break; + } + if (userns->may_mount_sysfs && userns->may_mount_proc) + break; + } + up_read(&namespace_sem); +} + static void *mntns_get(struct task_struct *task) { struct mnt_namespace *ns = NULL; diff --git a/fs/nfs/blocklayout/blocklayoutdm.c b/fs/nfs/blocklayout/blocklayoutdm.c index 737d839bc17b..6fc7b5cae92b 100644 --- a/fs/nfs/blocklayout/blocklayoutdm.c +++ b/fs/nfs/blocklayout/blocklayoutdm.c @@ -55,7 +55,8 @@ static void dev_remove(struct net *net, dev_t dev) bl_pipe_msg.bl_wq = &nn->bl_wq; memset(msg, 0, sizeof(*msg)); - msg->data = kzalloc(1 + sizeof(bl_umount_request), GFP_NOFS); + msg->len = sizeof(bl_msg) + bl_msg.totallen; + msg->data = kzalloc(msg->len, GFP_NOFS); if (!msg->data) goto out; @@ -66,7 +67,6 @@ static void dev_remove(struct net *net, dev_t dev) memcpy(msg->data, &bl_msg, sizeof(bl_msg)); dataptr = (uint8_t *) msg->data; memcpy(&dataptr[sizeof(bl_msg)], &bl_umount_request, sizeof(bl_umount_request)); - msg->len = sizeof(bl_msg) + bl_msg.totallen; add_wait_queue(&nn->bl_wq, &wq); if (rpc_queue_upcall(nn->bl_device_pipe, msg) < 0) { diff --git a/fs/nfs/idmap.c b/fs/nfs/idmap.c index dc0f98dfa717..c516da5873fd 100644 --- a/fs/nfs/idmap.c +++ b/fs/nfs/idmap.c @@ -726,9 +726,9 @@ out1: return ret; } -static int nfs_idmap_instantiate(struct key *key, struct key *authkey, char *data) +static int nfs_idmap_instantiate(struct key *key, struct key *authkey, char *data, size_t datalen) { - return key_instantiate_and_link(key, data, strlen(data) + 1, + return key_instantiate_and_link(key, data, datalen, id_resolver_cache->thread_keyring, authkey); } @@ -738,6 +738,7 @@ static int nfs_idmap_read_and_verify_message(struct idmap_msg *im, struct key *key, struct key *authkey) { char id_str[NFS_UINT_MAXLEN]; + size_t len; int ret = -ENOKEY; /* ret = -ENOKEY */ @@ -747,13 +748,15 @@ static int nfs_idmap_read_and_verify_message(struct idmap_msg *im, case IDMAP_CONV_NAMETOID: if (strcmp(upcall->im_name, im->im_name) != 0) break; - sprintf(id_str, "%d", im->im_id); - ret = nfs_idmap_instantiate(key, authkey, id_str); + /* Note: here we store the NUL terminator too */ + len = sprintf(id_str, "%d", im->im_id) + 1; + ret = nfs_idmap_instantiate(key, authkey, id_str, len); break; case IDMAP_CONV_IDTONAME: if (upcall->im_id != im->im_id) break; - ret = nfs_idmap_instantiate(key, authkey, im->im_name); + len = strlen(im->im_name); + ret = nfs_idmap_instantiate(key, authkey, im->im_name, len); break; default: ret = -EINVAL; diff --git a/fs/nfs/nfs4filelayout.c b/fs/nfs/nfs4filelayout.c index 49eeb044c109..4fb234d3aefb 100644 --- a/fs/nfs/nfs4filelayout.c +++ b/fs/nfs/nfs4filelayout.c @@ -129,7 +129,6 @@ static void filelayout_fenceme(struct inode *inode, struct pnfs_layout_hdr *lo) { if (!test_and_clear_bit(NFS_LAYOUT_RETURN, &lo->plh_flags)) return; - clear_bit(NFS_INO_LAYOUTCOMMIT, &NFS_I(inode)->flags); pnfs_return_layout(inode); } diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c index b2671cb0f901..26431cf62ddb 100644 --- a/fs/nfs/nfs4proc.c +++ b/fs/nfs/nfs4proc.c @@ -2632,7 +2632,7 @@ nfs4_proc_setattr(struct dentry *dentry, struct nfs_fattr *fattr, int status; if (pnfs_ld_layoutret_on_setattr(inode)) - pnfs_return_layout(inode); + pnfs_commit_and_return_layout(inode); nfs_fattr_init(fattr); @@ -6416,22 +6416,8 @@ nfs4_layoutcommit_done(struct rpc_task *task, void *calldata) static void nfs4_layoutcommit_release(void *calldata) { struct nfs4_layoutcommit_data *data = calldata; - struct pnfs_layout_segment *lseg, *tmp; - unsigned long *bitlock = &NFS_I(data->args.inode)->flags; pnfs_cleanup_layoutcommit(data); - /* Matched by references in pnfs_set_layoutcommit */ - list_for_each_entry_safe(lseg, tmp, &data->lseg_list, pls_lc_list) { - list_del_init(&lseg->pls_lc_list); - if (test_and_clear_bit(NFS_LSEG_LAYOUTCOMMIT, - &lseg->pls_flags)) - pnfs_put_lseg(lseg); - } - - clear_bit_unlock(NFS_INO_LAYOUTCOMMITTING, bitlock); - smp_mb__after_clear_bit(); - wake_up_bit(bitlock, NFS_INO_LAYOUTCOMMITTING); - put_rpccred(data->cred); kfree(data); } diff --git a/fs/nfs/pnfs.c b/fs/nfs/pnfs.c index 48ac5aad6258..4bdffe0ba025 100644 --- a/fs/nfs/pnfs.c +++ b/fs/nfs/pnfs.c @@ -417,6 +417,16 @@ should_free_lseg(struct pnfs_layout_range *lseg_range, lo_seg_intersecting(lseg_range, recall_range); } +static bool pnfs_lseg_dec_and_remove_zero(struct pnfs_layout_segment *lseg, + struct list_head *tmp_list) +{ + if (!atomic_dec_and_test(&lseg->pls_refcount)) + return false; + pnfs_layout_remove_lseg(lseg->pls_layout, lseg); + list_add(&lseg->pls_list, tmp_list); + return true; +} + /* Returns 1 if lseg is removed from list, 0 otherwise */ static int mark_lseg_invalid(struct pnfs_layout_segment *lseg, struct list_head *tmp_list) @@ -430,11 +440,8 @@ static int mark_lseg_invalid(struct pnfs_layout_segment *lseg, */ dprintk("%s: lseg %p ref %d\n", __func__, lseg, atomic_read(&lseg->pls_refcount)); - if (atomic_dec_and_test(&lseg->pls_refcount)) { - pnfs_layout_remove_lseg(lseg->pls_layout, lseg); - list_add(&lseg->pls_list, tmp_list); + if (pnfs_lseg_dec_and_remove_zero(lseg, tmp_list)) rv = 1; - } } return rv; } @@ -777,6 +784,21 @@ send_layoutget(struct pnfs_layout_hdr *lo, return lseg; } +static void pnfs_clear_layoutcommit(struct inode *inode, + struct list_head *head) +{ + struct nfs_inode *nfsi = NFS_I(inode); + struct pnfs_layout_segment *lseg, *tmp; + + if (!test_and_clear_bit(NFS_INO_LAYOUTCOMMIT, &nfsi->flags)) + return; + list_for_each_entry_safe(lseg, tmp, &nfsi->layout->plh_segs, pls_list) { + if (!test_and_clear_bit(NFS_LSEG_LAYOUTCOMMIT, &lseg->pls_flags)) + continue; + pnfs_lseg_dec_and_remove_zero(lseg, head); + } +} + /* * Initiates a LAYOUTRETURN(FILE), and removes the pnfs_layout_hdr * when the layout segment list is empty. @@ -808,6 +830,7 @@ _pnfs_return_layout(struct inode *ino) /* Reference matched in nfs4_layoutreturn_release */ pnfs_get_layout_hdr(lo); empty = list_empty(&lo->plh_segs); + pnfs_clear_layoutcommit(ino, &tmp_list); pnfs_mark_matching_lsegs_invalid(lo, &tmp_list, NULL); /* Don't send a LAYOUTRETURN if list was initially empty */ if (empty) { @@ -820,8 +843,6 @@ _pnfs_return_layout(struct inode *ino) spin_unlock(&ino->i_lock); pnfs_free_lseg_list(&tmp_list); - WARN_ON(test_bit(NFS_INO_LAYOUTCOMMIT, &nfsi->flags)); - lrp = kzalloc(sizeof(*lrp), GFP_KERNEL); if (unlikely(lrp == NULL)) { status = -ENOMEM; @@ -845,6 +866,33 @@ out: } EXPORT_SYMBOL_GPL(_pnfs_return_layout); +int +pnfs_commit_and_return_layout(struct inode *inode) +{ + struct pnfs_layout_hdr *lo; + int ret; + + spin_lock(&inode->i_lock); + lo = NFS_I(inode)->layout; + if (lo == NULL) { + spin_unlock(&inode->i_lock); + return 0; + } + pnfs_get_layout_hdr(lo); + /* Block new layoutgets and read/write to ds */ + lo->plh_block_lgets++; + spin_unlock(&inode->i_lock); + filemap_fdatawait(inode->i_mapping); + ret = pnfs_layoutcommit_inode(inode, true); + if (ret == 0) + ret = _pnfs_return_layout(inode); + spin_lock(&inode->i_lock); + lo->plh_block_lgets--; + spin_unlock(&inode->i_lock); + pnfs_put_layout_hdr(lo); + return ret; +} + bool pnfs_roc(struct inode *ino) { struct pnfs_layout_hdr *lo; @@ -1458,7 +1506,6 @@ static void pnfs_ld_handle_write_error(struct nfs_write_data *data) dprintk("pnfs write error = %d\n", hdr->pnfs_error); if (NFS_SERVER(hdr->inode)->pnfs_curr_ld->flags & PNFS_LAYOUTRET_ON_ERROR) { - clear_bit(NFS_INO_LAYOUTCOMMIT, &NFS_I(hdr->inode)->flags); pnfs_return_layout(hdr->inode); } if (!test_and_set_bit(NFS_IOHDR_REDO, &hdr->flags)) @@ -1613,7 +1660,6 @@ static void pnfs_ld_handle_read_error(struct nfs_read_data *data) dprintk("pnfs read error = %d\n", hdr->pnfs_error); if (NFS_SERVER(hdr->inode)->pnfs_curr_ld->flags & PNFS_LAYOUTRET_ON_ERROR) { - clear_bit(NFS_INO_LAYOUTCOMMIT, &NFS_I(hdr->inode)->flags); pnfs_return_layout(hdr->inode); } if (!test_and_set_bit(NFS_IOHDR_REDO, &hdr->flags)) @@ -1746,11 +1792,27 @@ static void pnfs_list_write_lseg(struct inode *inode, struct list_head *listp) list_for_each_entry(lseg, &NFS_I(inode)->layout->plh_segs, pls_list) { if (lseg->pls_range.iomode == IOMODE_RW && - test_bit(NFS_LSEG_LAYOUTCOMMIT, &lseg->pls_flags)) + test_and_clear_bit(NFS_LSEG_LAYOUTCOMMIT, &lseg->pls_flags)) list_add(&lseg->pls_lc_list, listp); } } +static void pnfs_list_write_lseg_done(struct inode *inode, struct list_head *listp) +{ + struct pnfs_layout_segment *lseg, *tmp; + unsigned long *bitlock = &NFS_I(inode)->flags; + + /* Matched by references in pnfs_set_layoutcommit */ + list_for_each_entry_safe(lseg, tmp, listp, pls_lc_list) { + list_del_init(&lseg->pls_lc_list); + pnfs_put_lseg(lseg); + } + + clear_bit_unlock(NFS_INO_LAYOUTCOMMITTING, bitlock); + smp_mb__after_clear_bit(); + wake_up_bit(bitlock, NFS_INO_LAYOUTCOMMITTING); +} + void pnfs_set_lo_fail(struct pnfs_layout_segment *lseg) { pnfs_layout_io_set_failed(lseg->pls_layout, lseg->pls_range.iomode); @@ -1795,6 +1857,7 @@ void pnfs_cleanup_layoutcommit(struct nfs4_layoutcommit_data *data) if (nfss->pnfs_curr_ld->cleanup_layoutcommit) nfss->pnfs_curr_ld->cleanup_layoutcommit(data); + pnfs_list_write_lseg_done(data->args.inode, &data->lseg_list); } /* diff --git a/fs/nfs/pnfs.h b/fs/nfs/pnfs.h index 94ba80417748..f5f8a470a647 100644 --- a/fs/nfs/pnfs.h +++ b/fs/nfs/pnfs.h @@ -219,6 +219,7 @@ void pnfs_set_layoutcommit(struct nfs_write_data *wdata); void pnfs_cleanup_layoutcommit(struct nfs4_layoutcommit_data *data); int pnfs_layoutcommit_inode(struct inode *inode, bool sync); int _pnfs_return_layout(struct inode *); +int pnfs_commit_and_return_layout(struct inode *); void pnfs_ld_write_done(struct nfs_write_data *); void pnfs_ld_read_done(struct nfs_read_data *); struct pnfs_layout_segment *pnfs_update_layout(struct inode *ino, @@ -407,6 +408,11 @@ static inline int pnfs_return_layout(struct inode *ino) return 0; } +static inline int pnfs_commit_and_return_layout(struct inode *inode) +{ + return 0; +} + static inline bool pnfs_ld_layoutret_on_setattr(struct inode *inode) { diff --git a/fs/nfs/super.c b/fs/nfs/super.c index 95cdcb208dfb..2f8a29db0f1b 100644 --- a/fs/nfs/super.c +++ b/fs/nfs/super.c @@ -335,6 +335,7 @@ struct file_system_type nfs4_fs_type = { .fs_flags = FS_RENAME_DOES_D_MOVE|FS_BINARY_MOUNTDATA, }; MODULE_ALIAS_FS("nfs4"); +MODULE_ALIAS("nfs4"); EXPORT_SYMBOL_GPL(nfs4_fs_type); static int __init register_nfs4_fs(void) diff --git a/fs/nfsd/nfs4state.c b/fs/nfsd/nfs4state.c index 16d39c6c4fbb..2e27430b9070 100644 --- a/fs/nfsd/nfs4state.c +++ b/fs/nfsd/nfs4state.c @@ -230,37 +230,6 @@ static void nfs4_file_put_access(struct nfs4_file *fp, int oflag) __nfs4_file_put_access(fp, oflag); } -static inline int get_new_stid(struct nfs4_stid *stid) -{ - static int min_stateid = 0; - struct idr *stateids = &stid->sc_client->cl_stateids; - int new_stid; - int error; - - error = idr_get_new_above(stateids, stid, min_stateid, &new_stid); - /* - * Note: the necessary preallocation was done in - * nfs4_alloc_stateid(). The idr code caps the number of - * preallocations that can exist at a time, but the state lock - * prevents anyone from using ours before we get here: - */ - WARN_ON_ONCE(error); - /* - * It shouldn't be a problem to reuse an opaque stateid value. - * I don't think it is for 4.1. But with 4.0 I worry that, for - * example, a stray write retransmission could be accepted by - * the server when it should have been rejected. Therefore, - * adopt a trick from the sctp code to attempt to maximize the - * amount of time until an id is reused, by ensuring they always - * "increase" (mod INT_MAX): - */ - - min_stateid = new_stid+1; - if (min_stateid == INT_MAX) - min_stateid = 0; - return new_stid; -} - static struct nfs4_stid *nfs4_alloc_stid(struct nfs4_client *cl, struct kmem_cache *slab) { @@ -273,9 +242,8 @@ kmem_cache *slab) if (!stid) return NULL; - if (!idr_pre_get(stateids, GFP_KERNEL)) - goto out_free; - if (idr_get_new_above(stateids, stid, min_stateid, &new_id)) + new_id = idr_alloc(stateids, stid, min_stateid, 0, GFP_KERNEL); + if (new_id < 0) goto out_free; stid->sc_client = cl; stid->sc_type = 0; diff --git a/fs/nfsd/nfscache.c b/fs/nfsd/nfscache.c index 62c1ee128aeb..ca05f6dc3544 100644 --- a/fs/nfsd/nfscache.c +++ b/fs/nfsd/nfscache.c @@ -102,7 +102,8 @@ nfsd_reply_cache_free_locked(struct svc_cacherep *rp) { if (rp->c_type == RC_REPLBUFF) kfree(rp->c_replvec.iov_base); - hlist_del(&rp->c_hash); + if (!hlist_unhashed(&rp->c_hash)) + hlist_del(&rp->c_hash); list_del(&rp->c_lru); --num_drc_entries; kmem_cache_free(drc_slab, rp); @@ -118,6 +119,10 @@ nfsd_reply_cache_free(struct svc_cacherep *rp) int nfsd_reply_cache_init(void) { + INIT_LIST_HEAD(&lru_head); + max_drc_entries = nfsd_cache_size_limit(); + num_drc_entries = 0; + register_shrinker(&nfsd_reply_cache_shrinker); drc_slab = kmem_cache_create("nfsd_drc", sizeof(struct svc_cacherep), 0, 0, NULL); @@ -128,10 +133,6 @@ int nfsd_reply_cache_init(void) if (!cache_hash) goto out_nomem; - INIT_LIST_HEAD(&lru_head); - max_drc_entries = nfsd_cache_size_limit(); - num_drc_entries = 0; - return 0; out_nomem: printk(KERN_ERR "nfsd: failed to allocate reply cache\n"); diff --git a/fs/nfsd/vfs.c b/fs/nfsd/vfs.c index 2a7eb536de0b..2b2e2396a869 100644 --- a/fs/nfsd/vfs.c +++ b/fs/nfsd/vfs.c @@ -1013,6 +1013,7 @@ nfsd_vfs_write(struct svc_rqst *rqstp, struct svc_fh *fhp, struct file *file, int host_err; int stable = *stablep; int use_wgather; + loff_t pos = offset; dentry = file->f_path.dentry; inode = dentry->d_inode; @@ -1025,7 +1026,7 @@ nfsd_vfs_write(struct svc_rqst *rqstp, struct svc_fh *fhp, struct file *file, /* Write the data. */ oldfs = get_fs(); set_fs(KERNEL_DS); - host_err = vfs_writev(file, (struct iovec __user *)vec, vlen, &offset); + host_err = vfs_writev(file, (struct iovec __user *)vec, vlen, &pos); set_fs(oldfs); if (host_err < 0) goto out_nfserr; diff --git a/fs/pipe.c b/fs/pipe.c index 64a494cef0a0..2234f3f61f8d 100644 --- a/fs/pipe.c +++ b/fs/pipe.c @@ -863,6 +863,9 @@ pipe_rdwr_open(struct inode *inode, struct file *filp) { int ret = -ENOENT; + if (!(filp->f_mode & (FMODE_READ|FMODE_WRITE))) + return -EINVAL; + mutex_lock(&inode->i_mutex); if (inode->i_pipe) { diff --git a/fs/pnode.c b/fs/pnode.c index 3e000a51ac0d..8b29d2164da6 100644 --- a/fs/pnode.c +++ b/fs/pnode.c @@ -9,6 +9,7 @@ #include <linux/mnt_namespace.h> #include <linux/mount.h> #include <linux/fs.h> +#include <linux/nsproxy.h> #include "internal.h" #include "pnode.h" @@ -220,6 +221,7 @@ static struct mount *get_source(struct mount *dest, int propagate_mnt(struct mount *dest_mnt, struct dentry *dest_dentry, struct mount *source_mnt, struct list_head *tree_list) { + struct user_namespace *user_ns = current->nsproxy->mnt_ns->user_ns; struct mount *m, *child; int ret = 0; struct mount *prev_dest_mnt = dest_mnt; @@ -237,6 +239,10 @@ int propagate_mnt(struct mount *dest_mnt, struct dentry *dest_dentry, source = get_source(m, prev_dest_mnt, prev_src_mnt, &type); + /* Notice when we are propagating across user namespaces */ + if (m->mnt_ns->user_ns != user_ns) + type |= CL_UNPRIVILEGED; + child = copy_tree(source, source->mnt.mnt_root, type); if (IS_ERR(child)) { ret = PTR_ERR(child); diff --git a/fs/pnode.h b/fs/pnode.h index 19b853a3445c..a0493d5ebfbf 100644 --- a/fs/pnode.h +++ b/fs/pnode.h @@ -23,6 +23,7 @@ #define CL_MAKE_SHARED 0x08 #define CL_PRIVATE 0x10 #define CL_SHARED_TO_SLAVE 0x20 +#define CL_UNPRIVILEGED 0x40 static inline void set_mnt_shared(struct mount *mnt) { diff --git a/fs/proc/inode.c b/fs/proc/inode.c index a86aebc9ba7c..869116c2afbe 100644 --- a/fs/proc/inode.c +++ b/fs/proc/inode.c @@ -446,9 +446,10 @@ static const struct file_operations proc_reg_file_ops_no_compat = { struct inode *proc_get_inode(struct super_block *sb, struct proc_dir_entry *de) { - struct inode *inode = iget_locked(sb, de->low_ino); + struct inode *inode = new_inode_pseudo(sb); - if (inode && (inode->i_state & I_NEW)) { + if (inode) { + inode->i_ino = de->low_ino; inode->i_mtime = inode->i_atime = inode->i_ctime = CURRENT_TIME; PROC_I(inode)->pde = de; @@ -476,7 +477,6 @@ struct inode *proc_get_inode(struct super_block *sb, struct proc_dir_entry *de) inode->i_fop = de->proc_fops; } } - unlock_new_inode(inode); } else pde_put(de); return inode; diff --git a/fs/proc/root.c b/fs/proc/root.c index c6e9fac26bac..9c7fab1d23f0 100644 --- a/fs/proc/root.c +++ b/fs/proc/root.c @@ -16,6 +16,7 @@ #include <linux/sched.h> #include <linux/module.h> #include <linux/bitops.h> +#include <linux/user_namespace.h> #include <linux/mount.h> #include <linux/pid_namespace.h> #include <linux/parser.h> @@ -108,6 +109,9 @@ static struct dentry *proc_mount(struct file_system_type *fs_type, } else { ns = task_active_pid_ns(current); options = data; + + if (!current_user_ns()->may_mount_proc) + return ERR_PTR(-EPERM); } sb = sget(fs_type, proc_test_super, proc_set_super, flags, ns); diff --git a/fs/quota/dquot.c b/fs/quota/dquot.c index 05ae3c97f7a5..3e64169ef527 100644 --- a/fs/quota/dquot.c +++ b/fs/quota/dquot.c @@ -1439,8 +1439,11 @@ static void __dquot_initialize(struct inode *inode, int type) * did a write before quota was turned on */ rsv = inode_get_rsv_space(inode); - if (unlikely(rsv)) + if (unlikely(rsv)) { + spin_lock(&dq_data_lock); dquot_resv_space(inode->i_dquot[cnt], rsv); + spin_unlock(&dq_data_lock); + } } } out_err: diff --git a/fs/read_write.c b/fs/read_write.c index a698eff457fb..e6ddc8dceb96 100644 --- a/fs/read_write.c +++ b/fs/read_write.c @@ -17,6 +17,7 @@ #include <linux/splice.h> #include <linux/compat.h> #include "read_write.h" +#include "internal.h" #include <asm/uaccess.h> #include <asm/unistd.h> @@ -417,6 +418,33 @@ ssize_t do_sync_write(struct file *filp, const char __user *buf, size_t len, lof EXPORT_SYMBOL(do_sync_write); +ssize_t __kernel_write(struct file *file, const char *buf, size_t count, loff_t *pos) +{ + mm_segment_t old_fs; + const char __user *p; + ssize_t ret; + + if (!file->f_op || (!file->f_op->write && !file->f_op->aio_write)) + return -EINVAL; + + old_fs = get_fs(); + set_fs(get_ds()); + p = (__force const char __user *)buf; + if (count > MAX_RW_COUNT) + count = MAX_RW_COUNT; + if (file->f_op->write) + ret = file->f_op->write(file, p, count, pos); + else + ret = do_sync_write(file, p, count, pos); + set_fs(old_fs); + if (ret > 0) { + fsnotify_modify(file); + add_wchar(current, ret); + } + inc_syscw(current); + return ret; +} + ssize_t vfs_write(struct file *file, const char __user *buf, size_t count, loff_t *pos) { ssize_t ret; diff --git a/fs/reiserfs/super.c b/fs/reiserfs/super.c index 194113b1b11b..f8a23c3078f8 100644 --- a/fs/reiserfs/super.c +++ b/fs/reiserfs/super.c @@ -1147,8 +1147,7 @@ static int reiserfs_parse_options(struct super_block *s, char *options, /* strin "on filesystem root."); return 0; } - qf_names[qtype] = - kmalloc(strlen(arg) + 1, GFP_KERNEL); + qf_names[qtype] = kstrdup(arg, GFP_KERNEL); if (!qf_names[qtype]) { reiserfs_warning(s, "reiserfs-2502", "not enough memory " @@ -1156,7 +1155,6 @@ static int reiserfs_parse_options(struct super_block *s, char *options, /* strin "quotafile name."); return 0; } - strcpy(qf_names[qtype], arg); if (qtype == USRQUOTA) *mount_options |= 1 << REISERFS_USRQUOTA; else diff --git a/fs/splice.c b/fs/splice.c index 718bd0056384..29e394e49ddd 100644 --- a/fs/splice.c +++ b/fs/splice.c @@ -31,6 +31,7 @@ #include <linux/security.h> #include <linux/gfp.h> #include <linux/socket.h> +#include "internal.h" /* * Attempt to steal a page from a pipe buffer. This should perhaps go into @@ -1048,9 +1049,10 @@ static int write_pipe_buf(struct pipe_inode_info *pipe, struct pipe_buffer *buf, { int ret; void *data; + loff_t tmp = sd->pos; data = buf->ops->map(pipe, buf, 0); - ret = kernel_write(sd->u.file, data + buf->offset, sd->len, sd->pos); + ret = __kernel_write(sd->u.file, data + buf->offset, sd->len, &tmp); buf->ops->unmap(pipe, buf, data); return ret; diff --git a/fs/squashfs/super.c b/fs/squashfs/super.c index 260e3928d4f5..60553a9053ca 100644 --- a/fs/squashfs/super.c +++ b/fs/squashfs/super.c @@ -489,6 +489,7 @@ static struct file_system_type squashfs_fs_type = { .kill_sb = kill_block_super, .fs_flags = FS_REQUIRES_DEV }; +MODULE_ALIAS_FS("squashfs"); static const struct super_operations squashfs_super_ops = { .alloc_inode = squashfs_alloc_inode, diff --git a/fs/sysfs/dir.c b/fs/sysfs/dir.c index 2fbdff6be25c..e14512678c9b 100644 --- a/fs/sysfs/dir.c +++ b/fs/sysfs/dir.c @@ -1020,6 +1020,8 @@ static int sysfs_readdir(struct file * filp, void * dirent, filldir_t filldir) ino = parent_sd->s_ino; if (filldir(dirent, ".", 1, filp->f_pos, ino, DT_DIR) == 0) filp->f_pos++; + else + return 0; } if (filp->f_pos == 1) { if (parent_sd->s_parent) @@ -1028,6 +1030,8 @@ static int sysfs_readdir(struct file * filp, void * dirent, filldir_t filldir) ino = parent_sd->s_ino; if (filldir(dirent, "..", 2, filp->f_pos, ino, DT_DIR) == 0) filp->f_pos++; + else + return 0; } mutex_lock(&sysfs_mutex); for (pos = sysfs_dir_pos(ns, parent_sd, filp->f_pos, pos); @@ -1058,10 +1062,21 @@ static int sysfs_readdir(struct file * filp, void * dirent, filldir_t filldir) return 0; } +static loff_t sysfs_dir_llseek(struct file *file, loff_t offset, int whence) +{ + struct inode *inode = file_inode(file); + loff_t ret; + + mutex_lock(&inode->i_mutex); + ret = generic_file_llseek(file, offset, whence); + mutex_unlock(&inode->i_mutex); + + return ret; +} const struct file_operations sysfs_dir_operations = { .read = generic_read_dir, .readdir = sysfs_readdir, .release = sysfs_dir_release, - .llseek = generic_file_llseek, + .llseek = sysfs_dir_llseek, }; diff --git a/fs/sysfs/mount.c b/fs/sysfs/mount.c index 8d924b5ec733..afd83273e6ce 100644 --- a/fs/sysfs/mount.c +++ b/fs/sysfs/mount.c @@ -19,6 +19,7 @@ #include <linux/module.h> #include <linux/magic.h> #include <linux/slab.h> +#include <linux/user_namespace.h> #include "sysfs.h" @@ -111,6 +112,9 @@ static struct dentry *sysfs_mount(struct file_system_type *fs_type, struct super_block *sb; int error; + if (!(flags & MS_KERNMOUNT) && !current_user_ns()->may_mount_sysfs) + return ERR_PTR(-EPERM); + info = kzalloc(sizeof(*info), GFP_KERNEL); if (!info) return ERR_PTR(-ENOMEM); diff --git a/fs/sysv/super.c b/fs/sysv/super.c index a39938b1feea..d0c6a007ce83 100644 --- a/fs/sysv/super.c +++ b/fs/sysv/super.c @@ -555,6 +555,7 @@ static struct file_system_type v7_fs_type = { .fs_flags = FS_REQUIRES_DEV, }; MODULE_ALIAS_FS("v7"); +MODULE_ALIAS("v7"); static int __init init_sysv_fs(void) { diff --git a/fs/udf/super.c b/fs/udf/super.c index bc5b30a819e8..9ac4057a86c9 100644 --- a/fs/udf/super.c +++ b/fs/udf/super.c @@ -118,6 +118,7 @@ static struct file_system_type udf_fstype = { .kill_sb = kill_block_super, .fs_flags = FS_REQUIRES_DEV, }; +MODULE_ALIAS_FS("udf"); static struct kmem_cache *udf_inode_cachep; diff --git a/fs/xfs/xfs_buf.c b/fs/xfs/xfs_buf.c index 4e8f0df82d02..8459b5d8cb71 100644 --- a/fs/xfs/xfs_buf.c +++ b/fs/xfs/xfs_buf.c @@ -1334,6 +1334,12 @@ _xfs_buf_ioapply( int size; int i; + /* + * Make sure we capture only current IO errors rather than stale errors + * left over from previous use of the buffer (e.g. failed readahead). + */ + bp->b_error = 0; + if (bp->b_flags & XBF_WRITE) { if (bp->b_flags & XBF_SYNCIO) rw = WRITE_SYNC; diff --git a/fs/xfs/xfs_iomap.c b/fs/xfs/xfs_iomap.c index 912d83d8860a..5a30dd899d2b 100644 --- a/fs/xfs/xfs_iomap.c +++ b/fs/xfs/xfs_iomap.c @@ -325,7 +325,7 @@ xfs_iomap_eof_want_preallocate( * rather than falling short due to things like stripe unit/width alignment of * real extents. */ -STATIC int +STATIC xfs_fsblock_t xfs_iomap_eof_prealloc_initial_size( struct xfs_mount *mp, struct xfs_inode *ip, @@ -413,7 +413,7 @@ xfs_iomap_prealloc_size( * have a large file on a small filesystem and the above * lowspace thresholds are smaller than MAXEXTLEN. */ - while (alloc_blocks >= freesp) + while (alloc_blocks && alloc_blocks >= freesp) alloc_blocks >>= 4; } diff --git a/include/acpi/processor.h b/include/acpi/processor.h index 555d0337ad95..b327b5a9296d 100644 --- a/include/acpi/processor.h +++ b/include/acpi/processor.h @@ -235,6 +235,9 @@ extern void acpi_processor_unregister_performance(struct if a _PPC object exists, rmmod is disallowed then */ int acpi_processor_notify_smm(struct module *calling_module); +/* parsing the _P* objects. */ +extern int acpi_processor_get_performance_info(struct acpi_processor *pr); + /* for communication between multiple parts of the processor kernel module */ DECLARE_PER_CPU(struct acpi_processor *, processors); extern struct acpi_processor_errata errata; diff --git a/include/asm-generic/atomic.h b/include/asm-generic/atomic.h index 1ced6413ea03..33bd2de3bc1e 100644 --- a/include/asm-generic/atomic.h +++ b/include/asm-generic/atomic.h @@ -136,12 +136,6 @@ static inline void atomic_dec(atomic_t *v) #define atomic_xchg(ptr, v) (xchg(&(ptr)->counter, (v))) #define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), (old), (new))) -#define cmpxchg_local(ptr, o, n) \ - ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\ - (unsigned long)(n), sizeof(*(ptr)))) - -#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) - static inline int __atomic_add_unless(atomic_t *v, int a, int u) { int c, old; diff --git a/include/asm-generic/cmpxchg.h b/include/asm-generic/cmpxchg.h index 14883026015d..811fb1e9b061 100644 --- a/include/asm-generic/cmpxchg.h +++ b/include/asm-generic/cmpxchg.h @@ -92,6 +92,16 @@ unsigned long __xchg(unsigned long x, volatile void *ptr, int size) */ #include <asm-generic/cmpxchg-local.h> +#ifndef cmpxchg_local +#define cmpxchg_local(ptr, o, n) \ + ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\ + (unsigned long)(n), sizeof(*(ptr)))) +#endif + +#ifndef cmpxchg64_local +#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) +#endif + #define cmpxchg(ptr, o, n) cmpxchg_local((ptr), (o), (n)) #define cmpxchg64(ptr, o, n) cmpxchg64_local((ptr), (o), (n)) diff --git a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h index a386b0b654cc..918e8fe2f5e9 100644 --- a/include/drm/drm_pciids.h +++ b/include/drm/drm_pciids.h @@ -581,7 +581,11 @@ {0x1002, 0x9908, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ {0x1002, 0x9909, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ {0x1002, 0x990A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x990F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ + {0x1002, 0x990B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ + {0x1002, 0x990C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ + {0x1002, 0x990D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ + {0x1002, 0x990E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ + {0x1002, 0x990F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ {0x1002, 0x9910, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ {0x1002, 0x9913, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ {0x1002, 0x9917, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ @@ -592,6 +596,13 @@ {0x1002, 0x9992, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ {0x1002, 0x9993, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ {0x1002, 0x9994, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ + {0x1002, 0x9995, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ + {0x1002, 0x9996, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ + {0x1002, 0x9997, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ + {0x1002, 0x9998, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ + {0x1002, 0x9999, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ + {0x1002, 0x999A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ + {0x1002, 0x999B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ {0x1002, 0x99A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ {0x1002, 0x99A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ {0x1002, 0x99A4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h index 27cfda427dd9..192d6d1771ee 100644 --- a/include/linux/clocksource.h +++ b/include/linux/clocksource.h @@ -332,15 +332,23 @@ extern int clocksource_mmio_init(void __iomem *, const char *, extern int clocksource_i8253_init(void); +struct device_node; +typedef void(*clocksource_of_init_fn)(struct device_node *); #ifdef CONFIG_CLKSRC_OF extern void clocksource_of_init(void); #define CLOCKSOURCE_OF_DECLARE(name, compat, fn) \ static const struct of_device_id __clksrc_of_table_##name \ __used __section(__clksrc_of_table) \ - = { .compatible = compat, .data = fn }; + = { .compatible = compat, \ + .data = (fn == (clocksource_of_init_fn)NULL) ? fn : fn } #else -#define CLOCKSOURCE_OF_DECLARE(name, compat, fn) +static inline void clocksource_of_init(void) {} +#define CLOCKSOURCE_OF_DECLARE(name, compat, fn) \ + static const struct of_device_id __clksrc_of_table_##name \ + __attribute__((unused)) \ + = { .compatible = compat, \ + .data = (fn == (clocksource_of_init_fn)NULL) ? fn : fn } #endif #endif /* _LINUX_CLOCKSOURCE_H */ diff --git a/include/linux/debug_locks.h b/include/linux/debug_locks.h index a975de1ff59f..3bd46f766751 100644 --- a/include/linux/debug_locks.h +++ b/include/linux/debug_locks.h @@ -51,7 +51,7 @@ struct task_struct; extern void debug_show_all_locks(void); extern void debug_show_held_locks(struct task_struct *task); extern void debug_check_no_locks_freed(const void *from, unsigned long len); -extern void debug_check_no_locks_held(void); +extern void debug_check_no_locks_held(struct task_struct *task); #else static inline void debug_show_all_locks(void) { @@ -67,7 +67,7 @@ debug_check_no_locks_freed(const void *from, unsigned long len) } static inline void -debug_check_no_locks_held(void) +debug_check_no_locks_held(struct task_struct *task) { } #endif diff --git a/include/linux/edac.h b/include/linux/edac.h index 4fd4999ccb5b..0b763276f619 100644 --- a/include/linux/edac.h +++ b/include/linux/edac.h @@ -561,7 +561,6 @@ struct csrow_info { u32 ue_count; /* Uncorrectable Errors for this csrow */ u32 ce_count; /* Correctable Errors for this csrow */ - u32 nr_pages; /* combined pages count of all channels */ struct mem_ctl_info *mci; /* the parent */ @@ -676,11 +675,11 @@ struct mem_ctl_info { * sees memory sticks ("dimms"), and the ones that sees memory ranks. * All old memory controllers enumerate memories per rank, but most * of the recent drivers enumerate memories per DIMM, instead. - * When the memory controller is per rank, mem_is_per_rank is true. + * When the memory controller is per rank, csbased is true. */ unsigned n_layers; struct edac_mc_layer *layers; - bool mem_is_per_rank; + bool csbased; /* * DIMM info. Will eventually remove the entire csrows_info some day @@ -741,8 +740,6 @@ struct mem_ctl_info { u32 fake_inject_ue; u16 fake_inject_count; #endif - __u8 csbased : 1, /* csrow-based memory controller */ - __resv : 7; }; #endif diff --git a/include/linux/freezer.h b/include/linux/freezer.h index 043a5cf8b5ba..e70df40d84f6 100644 --- a/include/linux/freezer.h +++ b/include/linux/freezer.h @@ -3,7 +3,6 @@ #ifndef FREEZER_H_INCLUDED #define FREEZER_H_INCLUDED -#include <linux/debug_locks.h> #include <linux/sched.h> #include <linux/wait.h> #include <linux/atomic.h> @@ -49,8 +48,6 @@ extern void thaw_kernel_threads(void); static inline bool try_to_freeze(void) { - if (!(current->flags & PF_NOFREEZE)) - debug_check_no_locks_held(); might_sleep(); if (likely(!freezing(current))) return false; diff --git a/include/linux/fs_struct.h b/include/linux/fs_struct.h index 729eded4b24f..2b93a9a5a1e6 100644 --- a/include/linux/fs_struct.h +++ b/include/linux/fs_struct.h @@ -50,4 +50,6 @@ static inline void get_fs_root_and_pwd(struct fs_struct *fs, struct path *root, spin_unlock(&fs->lock); } +extern bool current_chrooted(void); + #endif /* _LINUX_FS_STRUCT_H */ diff --git a/include/linux/hash.h b/include/linux/hash.h index 61c97ae22e01..f09a0ae4d858 100644 --- a/include/linux/hash.h +++ b/include/linux/hash.h @@ -15,6 +15,7 @@ */ #include <asm/types.h> +#include <linux/compiler.h> /* 2^31 + 2^29 - 2^25 + 2^22 - 2^19 - 2^16 + 1 */ #define GOLDEN_RATIO_PRIME_32 0x9e370001UL @@ -31,7 +32,7 @@ #error Wordsize not 32 or 64 #endif -static inline u64 hash_64(u64 val, unsigned int bits) +static __always_inline u64 hash_64(u64 val, unsigned int bits) { u64 hash = val; diff --git a/include/linux/idr.h b/include/linux/idr.h index a6f38b5c34e4..2640c7e99e51 100644 --- a/include/linux/idr.h +++ b/include/linux/idr.h @@ -73,8 +73,6 @@ struct idr { */ void *idr_find_slowpath(struct idr *idp, int id); -int idr_pre_get(struct idr *idp, gfp_t gfp_mask); -int idr_get_new_above(struct idr *idp, void *ptr, int starting_id, int *id); void idr_preload(gfp_t gfp_mask); int idr_alloc(struct idr *idp, void *ptr, int start, int end, gfp_t gfp_mask); int idr_for_each(struct idr *idp, @@ -99,7 +97,7 @@ static inline void idr_preload_end(void) /** * idr_find - return pointer for given id - * @idp: idr handle + * @idr: idr handle * @id: lookup key * * Return the pointer given the id it has been registered with. A %NULL @@ -120,19 +118,6 @@ static inline void *idr_find(struct idr *idr, int id) } /** - * idr_get_new - allocate new idr entry - * @idp: idr handle - * @ptr: pointer you want associated with the id - * @id: pointer to the allocated handle - * - * Simple wrapper around idr_get_new_above() w/ @starting_id of zero. - */ -static inline int idr_get_new(struct idr *idp, void *ptr, int *id) -{ - return idr_get_new_above(idp, ptr, 0, id); -} - -/** * idr_for_each_entry - iterate over an idr's elements of a given type * @idp: idr handle * @entry: the type * to use as cursor @@ -143,7 +128,56 @@ static inline int idr_get_new(struct idr *idp, void *ptr, int *id) entry != NULL; \ ++id, entry = (typeof(entry))idr_get_next((idp), &(id))) -void __idr_remove_all(struct idr *idp); /* don't use */ +/* + * Don't use the following functions. These exist only to suppress + * deprecated warnings on EXPORT_SYMBOL()s. + */ +int __idr_pre_get(struct idr *idp, gfp_t gfp_mask); +int __idr_get_new_above(struct idr *idp, void *ptr, int starting_id, int *id); +void __idr_remove_all(struct idr *idp); + +/** + * idr_pre_get - reserve resources for idr allocation + * @idp: idr handle + * @gfp_mask: memory allocation flags + * + * Part of old alloc interface. This is going away. Use + * idr_preload[_end]() and idr_alloc() instead. + */ +static inline int __deprecated idr_pre_get(struct idr *idp, gfp_t gfp_mask) +{ + return __idr_pre_get(idp, gfp_mask); +} + +/** + * idr_get_new_above - allocate new idr entry above or equal to a start id + * @idp: idr handle + * @ptr: pointer you want associated with the id + * @starting_id: id to start search at + * @id: pointer to the allocated handle + * + * Part of old alloc interface. This is going away. Use + * idr_preload[_end]() and idr_alloc() instead. + */ +static inline int __deprecated idr_get_new_above(struct idr *idp, void *ptr, + int starting_id, int *id) +{ + return __idr_get_new_above(idp, ptr, starting_id, id); +} + +/** + * idr_get_new - allocate new idr entry + * @idp: idr handle + * @ptr: pointer you want associated with the id + * @id: pointer to the allocated handle + * + * Part of old alloc interface. This is going away. Use + * idr_preload[_end]() and idr_alloc() instead. + */ +static inline int __deprecated idr_get_new(struct idr *idp, void *ptr, int *id) +{ + return __idr_get_new_above(idp, ptr, 0, id); +} /** * idr_remove_all - remove all ids from the given idr tree diff --git a/include/linux/iio/common/st_sensors.h b/include/linux/iio/common/st_sensors.h index 1f86a97ab2e2..8bd12be0b02f 100644 --- a/include/linux/iio/common/st_sensors.h +++ b/include/linux/iio/common/st_sensors.h @@ -227,14 +227,17 @@ struct st_sensor_data { }; #ifdef CONFIG_IIO_BUFFER +irqreturn_t st_sensors_trigger_handler(int irq, void *p); + +int st_sensors_get_buffer_element(struct iio_dev *indio_dev, u8 *buf); +#endif + +#ifdef CONFIG_IIO_TRIGGER int st_sensors_allocate_trigger(struct iio_dev *indio_dev, const struct iio_trigger_ops *trigger_ops); void st_sensors_deallocate_trigger(struct iio_dev *indio_dev); -irqreturn_t st_sensors_trigger_handler(int irq, void *p); - -int st_sensors_get_buffer_element(struct iio_dev *indio_dev, u8 *buf); #else static inline int st_sensors_allocate_trigger(struct iio_dev *indio_dev, const struct iio_trigger_ops *trigger_ops) diff --git a/include/linux/irq_work.h b/include/linux/irq_work.h index f5dbce50466e..66017028dcb3 100644 --- a/include/linux/irq_work.h +++ b/include/linux/irq_work.h @@ -37,7 +37,7 @@ void irq_work_sync(struct irq_work *work); #ifdef CONFIG_IRQ_WORK bool irq_work_needs_cpu(void); #else -static bool irq_work_needs_cpu(void) { return false; } +static inline bool irq_work_needs_cpu(void) { return false; } #endif #endif /* _LINUX_IRQ_WORK_H */ diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h index 3fd8e4290a1c..3e203eb23cc7 100644 --- a/include/linux/irqchip/arm-gic.h +++ b/include/linux/irqchip/arm-gic.h @@ -65,7 +65,6 @@ extern struct irq_chip gic_arch_extn; void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *, u32 offset, struct device_node *); -void gic_secondary_init(unsigned int); void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); static inline void gic_init(unsigned int nr, int start, diff --git a/include/linux/irqchip/chained_irq.h b/include/linux/irqchip/chained_irq.h new file mode 100644 index 000000000000..adf4c30f3af6 --- /dev/null +++ b/include/linux/irqchip/chained_irq.h @@ -0,0 +1,52 @@ +/* + * Chained IRQ handlers support. + * + * Copyright (C) 2011 ARM Ltd. + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ +#ifndef __IRQCHIP_CHAINED_IRQ_H +#define __IRQCHIP_CHAINED_IRQ_H + +#include <linux/irq.h> + +/* + * Entry/exit functions for chained handlers where the primary IRQ chip + * may implement either fasteoi or level-trigger flow control. + */ +static inline void chained_irq_enter(struct irq_chip *chip, + struct irq_desc *desc) +{ + /* FastEOI controllers require no action on entry. */ + if (chip->irq_eoi) + return; + + if (chip->irq_mask_ack) { + chip->irq_mask_ack(&desc->irq_data); + } else { + chip->irq_mask(&desc->irq_data); + if (chip->irq_ack) + chip->irq_ack(&desc->irq_data); + } +} + +static inline void chained_irq_exit(struct irq_chip *chip, + struct irq_desc *desc) +{ + if (chip->irq_eoi) + chip->irq_eoi(&desc->irq_data); + else + chip->irq_unmask(&desc->irq_data); +} + +#endif /* __IRQCHIP_CHAINED_IRQ_H */ diff --git a/include/linux/kernel.h b/include/linux/kernel.h index 80d36874689b..79fdd80a42d4 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -390,7 +390,6 @@ extern struct pid *session_of_pgrp(struct pid *pgrp); unsigned long int_sqrt(unsigned long); extern void bust_spinlocks(int yes); -extern void wake_up_klogd(void); extern int oops_in_progress; /* If set, an oops, panic(), BUG() or die() is in progress */ extern int panic_timeout; extern int panic_on_oops; diff --git a/include/linux/list.h b/include/linux/list.h index d991cc147c98..6a1f8df9144b 100644 --- a/include/linux/list.h +++ b/include/linux/list.h @@ -667,7 +667,9 @@ static inline void hlist_move_list(struct hlist_head *old, pos = n) #define hlist_entry_safe(ptr, type, member) \ - (ptr) ? hlist_entry(ptr, type, member) : NULL + ({ typeof(ptr) ____ptr = (ptr); \ + ____ptr ? hlist_entry(____ptr, type, member) : NULL; \ + }) /** * hlist_for_each_entry - iterate over list of given type diff --git a/include/linux/mfd/max77693-private.h b/include/linux/mfd/max77693-private.h index 5b18ecde69b5..1aa4f13cdfa6 100644 --- a/include/linux/mfd/max77693-private.h +++ b/include/linux/mfd/max77693-private.h @@ -106,6 +106,29 @@ enum max77693_muic_reg { MAX77693_MUIC_REG_END, }; +/* MAX77693 INTMASK1~2 Register */ +#define INTMASK1_ADC1K_SHIFT 3 +#define INTMASK1_ADCERR_SHIFT 2 +#define INTMASK1_ADCLOW_SHIFT 1 +#define INTMASK1_ADC_SHIFT 0 +#define INTMASK1_ADC1K_MASK (1 << INTMASK1_ADC1K_SHIFT) +#define INTMASK1_ADCERR_MASK (1 << INTMASK1_ADCERR_SHIFT) +#define INTMASK1_ADCLOW_MASK (1 << INTMASK1_ADCLOW_SHIFT) +#define INTMASK1_ADC_MASK (1 << INTMASK1_ADC_SHIFT) + +#define INTMASK2_VIDRM_SHIFT 5 +#define INTMASK2_VBVOLT_SHIFT 4 +#define INTMASK2_DXOVP_SHIFT 3 +#define INTMASK2_DCDTMR_SHIFT 2 +#define INTMASK2_CHGDETRUN_SHIFT 1 +#define INTMASK2_CHGTYP_SHIFT 0 +#define INTMASK2_VIDRM_MASK (1 << INTMASK2_VIDRM_SHIFT) +#define INTMASK2_VBVOLT_MASK (1 << INTMASK2_VBVOLT_SHIFT) +#define INTMASK2_DXOVP_MASK (1 << INTMASK2_DXOVP_SHIFT) +#define INTMASK2_DCDTMR_MASK (1 << INTMASK2_DCDTMR_SHIFT) +#define INTMASK2_CHGDETRUN_MASK (1 << INTMASK2_CHGDETRUN_SHIFT) +#define INTMASK2_CHGTYP_MASK (1 << INTMASK2_CHGTYP_SHIFT) + /* MAX77693 MUIC - STATUS1~3 Register */ #define STATUS1_ADC_SHIFT (0) #define STATUS1_ADCLOW_SHIFT (5) diff --git a/include/linux/mfd/palmas.h b/include/linux/mfd/palmas.h index a4d13d7cd001..3bbda22721ea 100644 --- a/include/linux/mfd/palmas.h +++ b/include/linux/mfd/palmas.h @@ -221,6 +221,7 @@ struct palmas_clk_platform_data { }; struct palmas_platform_data { + int irq_flags; int gpio_base; /* bit value to be loaded to the POWER_CTRL register */ diff --git a/include/linux/mfd/tps65912.h b/include/linux/mfd/tps65912.h index aaceab402ec5..6d309032dc0d 100644 --- a/include/linux/mfd/tps65912.h +++ b/include/linux/mfd/tps65912.h @@ -323,5 +323,6 @@ int tps65912_device_init(struct tps65912 *tps65912); void tps65912_device_exit(struct tps65912 *tps65912); int tps65912_irq_init(struct tps65912 *tps65912, int irq, struct tps65912_platform_data *pdata); +int tps65912_irq_exit(struct tps65912 *tps65912); #endif /* __LINUX_MFD_TPS65912_H */ diff --git a/include/linux/mfd/wm831x/auxadc.h b/include/linux/mfd/wm831x/auxadc.h index b132067e9e99..867aa23f9370 100644 --- a/include/linux/mfd/wm831x/auxadc.h +++ b/include/linux/mfd/wm831x/auxadc.h @@ -15,6 +15,8 @@ #ifndef __MFD_WM831X_AUXADC_H__ #define __MFD_WM831X_AUXADC_H__ +struct wm831x; + /* * R16429 (0x402D) - AuxADC Data */ diff --git a/include/linux/mfd/wm831x/core.h b/include/linux/mfd/wm831x/core.h index 4a3b83a77614..76c22648436f 100644 --- a/include/linux/mfd/wm831x/core.h +++ b/include/linux/mfd/wm831x/core.h @@ -20,6 +20,7 @@ #include <linux/irqdomain.h> #include <linux/list.h> #include <linux/regmap.h> +#include <linux/mfd/wm831x/auxadc.h> /* * Register values. @@ -355,7 +356,6 @@ enum wm831x_parent { }; struct wm831x; -enum wm831x_auxadc; typedef int (*wm831x_auxadc_read_fn)(struct wm831x *wm831x, enum wm831x_auxadc input); diff --git a/include/linux/mm.h b/include/linux/mm.h index 7acc9dc73c9f..e19ff30ad0a2 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -87,7 +87,6 @@ extern unsigned int kobjsize(const void *objp); #define VM_PFNMAP 0x00000400 /* Page-ranges managed without "struct page", just pure PFN */ #define VM_DENYWRITE 0x00000800 /* ETXTBSY on write attempts.. */ -#define VM_POPULATE 0x00001000 #define VM_LOCKED 0x00002000 #define VM_IO 0x00004000 /* Memory mapped I/O or similar */ diff --git a/include/linux/mman.h b/include/linux/mman.h index 61c7a87e5d2b..9aa863da287f 100644 --- a/include/linux/mman.h +++ b/include/linux/mman.h @@ -79,8 +79,6 @@ calc_vm_flag_bits(unsigned long flags) { return _calc_vm_trans(flags, MAP_GROWSDOWN, VM_GROWSDOWN ) | _calc_vm_trans(flags, MAP_DENYWRITE, VM_DENYWRITE ) | - ((flags & MAP_LOCKED) ? (VM_LOCKED | VM_POPULATE) : 0) | - (((flags & (MAP_POPULATE | MAP_NONBLOCK)) == MAP_POPULATE) ? - VM_POPULATE : 0); + _calc_vm_trans(flags, MAP_LOCKED, VM_LOCKED ); } #endif /* _LINUX_MMAN_H */ diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h index ede274957e05..c74092eebf5c 100644 --- a/include/linux/mmzone.h +++ b/include/linux/mmzone.h @@ -527,7 +527,7 @@ static inline int zone_is_oom_locked(const struct zone *zone) return test_bit(ZONE_OOM_LOCKED, &zone->flags); } -static inline unsigned zone_end_pfn(const struct zone *zone) +static inline unsigned long zone_end_pfn(const struct zone *zone) { return zone->zone_start_pfn + zone->spanned_pages; } diff --git a/include/linux/mount.h b/include/linux/mount.h index d7029f4a191a..73005f9957ea 100644 --- a/include/linux/mount.h +++ b/include/linux/mount.h @@ -47,6 +47,8 @@ struct mnt_namespace; #define MNT_INTERNAL 0x4000 +#define MNT_LOCK_READONLY 0x400000 + struct vfsmount { struct dentry *mnt_root; /* root of the mounted tree */ struct super_block *mnt_sb; /* pointer to superblock */ diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 7ccb3c59ed60..ef52d9c91459 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -187,6 +187,13 @@ typedef enum { * This happens with the Renesas AG-AND chips, possibly others. */ #define BBT_AUTO_REFRESH 0x00000080 +/* + * Chip requires ready check on read (for auto-incremented sequential read). + * True only for small page devices; large page devices do not support + * autoincrement. + */ +#define NAND_NEED_READRDY 0x00000100 + /* Chip does not allow subpage writes */ #define NAND_NO_SUBPAGE_WRITE 0x00000200 diff --git a/include/linux/mxsfb.h b/include/linux/mxsfb.h index f14943d55315..f80af8674342 100644 --- a/include/linux/mxsfb.h +++ b/include/linux/mxsfb.h @@ -24,8 +24,8 @@ #define STMLCDIF_18BIT 2 /** pixel data bus to the display is of 18 bit width */ #define STMLCDIF_24BIT 3 /** pixel data bus to the display is of 24 bit width */ -#define FB_SYNC_DATA_ENABLE_HIGH_ACT (1 << 6) -#define FB_SYNC_DOTCLK_FAILING_ACT (1 << 7) /* failing/negtive edge sampling */ +#define MXSFB_SYNC_DATA_ENABLE_HIGH_ACT (1 << 6) +#define MXSFB_SYNC_DOTCLK_FAILING_ACT (1 << 7) /* failing/negtive edge sampling */ struct mxsfb_platform_data { struct fb_videomode *mode_list; @@ -44,6 +44,9 @@ struct mxsfb_platform_data { * allocated. If specified,fb_size must also be specified. * fb_phys must be unused by Linux. */ + u32 sync; /* sync mask, contains MXSFB specifics not + * carried in fb_info->var.sync + */ }; #endif /* __LINUX_MXSFB_H */ diff --git a/include/linux/nvme.h b/include/linux/nvme.h index c25cccaa555a..4fa3b0b9b071 100644 --- a/include/linux/nvme.h +++ b/include/linux/nvme.h @@ -137,6 +137,34 @@ enum { NVME_LBAF_RP_DEGRADED = 3, }; +struct nvme_smart_log { + __u8 critical_warning; + __u8 temperature[2]; + __u8 avail_spare; + __u8 spare_thresh; + __u8 percent_used; + __u8 rsvd6[26]; + __u8 data_units_read[16]; + __u8 data_units_written[16]; + __u8 host_reads[16]; + __u8 host_writes[16]; + __u8 ctrl_busy_time[16]; + __u8 power_cycles[16]; + __u8 power_on_hours[16]; + __u8 unsafe_shutdowns[16]; + __u8 media_errors[16]; + __u8 num_err_log_entries[16]; + __u8 rsvd192[320]; +}; + +enum { + NVME_SMART_CRIT_SPARE = 1 << 0, + NVME_SMART_CRIT_TEMPERATURE = 1 << 1, + NVME_SMART_CRIT_RELIABILITY = 1 << 2, + NVME_SMART_CRIT_MEDIA = 1 << 3, + NVME_SMART_CRIT_VOLATILE_MEMORY = 1 << 4, +}; + struct nvme_lba_range_type { __u8 type; __u8 attributes; diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index e47ee462c2f2..1d795df6f4cf 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -799,6 +799,12 @@ static inline int __perf_event_disable(void *info) { return -1; } static inline void perf_event_task_tick(void) { } #endif +#if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL) +extern void perf_restore_debug_store(void); +#else +static inline void perf_restore_debug_store(void) { } +#endif + #define perf_output_put(handle, x) perf_output_copy((handle), &(x), sizeof(x)) /* diff --git a/include/linux/pinctrl/pinctrl.h b/include/linux/pinctrl/pinctrl.h index 778804df293f..2c2a9e8d8578 100644 --- a/include/linux/pinctrl/pinctrl.h +++ b/include/linux/pinctrl/pinctrl.h @@ -118,9 +118,9 @@ struct pinctrl_desc { const char *name; struct pinctrl_pin_desc const *pins; unsigned int npins; - struct pinctrl_ops *pctlops; - struct pinmux_ops *pmxops; - struct pinconf_ops *confops; + const struct pinctrl_ops *pctlops; + const struct pinmux_ops *pmxops; + const struct pinconf_ops *confops; struct module *owner; }; diff --git a/include/linux/platform_data/gpio-rcar.h b/include/linux/platform_data/gpio-rcar.h new file mode 100644 index 000000000000..b253f77a7ddf --- /dev/null +++ b/include/linux/platform_data/gpio-rcar.h @@ -0,0 +1,26 @@ +/* + * Renesas R-Car GPIO Support + * + * Copyright (C) 2013 Magnus Damm + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __GPIO_RCAR_H__ +#define __GPIO_RCAR_H__ + +struct gpio_rcar_config { + unsigned int gpio_base; + unsigned int irq_base; + unsigned int number_of_pins; + const char *pctl_name; +}; + +#endif /* __GPIO_RCAR_H__ */ diff --git a/include/linux/printk.h b/include/linux/printk.h index 1249a54d17e0..822171fcb1c8 100644 --- a/include/linux/printk.h +++ b/include/linux/printk.h @@ -134,6 +134,8 @@ extern int printk_delay_msec; extern int dmesg_restrict; extern int kptr_restrict; +extern void wake_up_klogd(void); + void log_buf_kexec_setup(void); void __init setup_log_buf(int early); #else @@ -162,6 +164,10 @@ static inline bool printk_timed_ratelimit(unsigned long *caller_jiffies, return false; } +static inline void wake_up_klogd(void) +{ +} + static inline void log_buf_kexec_setup(void) { } diff --git a/include/linux/res_counter.h b/include/linux/res_counter.h index 5ae8456d9670..c23099413ad6 100644 --- a/include/linux/res_counter.h +++ b/include/linux/res_counter.h @@ -14,6 +14,7 @@ */ #include <linux/cgroup.h> +#include <linux/errno.h> /* * The core object. the cgroup that wishes to account for some diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h index 821c7f45d2a7..441f5bfdab8e 100644 --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h @@ -500,7 +500,7 @@ struct sk_buff { union { __u32 mark; __u32 dropcount; - __u32 avail_size; + __u32 reserved_tailroom; }; sk_buff_data_t inner_transport_header; @@ -1288,11 +1288,13 @@ static inline void __skb_fill_page_desc(struct sk_buff *skb, int i, * do not lose pfmemalloc information as the pages would not be * allocated using __GFP_MEMALLOC. */ - if (page->pfmemalloc && !page->mapping) - skb->pfmemalloc = true; frag->page.p = page; frag->page_offset = off; skb_frag_size_set(frag, size); + + page = compound_head(page); + if (page->pfmemalloc && !page->mapping) + skb->pfmemalloc = true; } /** @@ -1447,7 +1449,10 @@ static inline int skb_tailroom(const struct sk_buff *skb) */ static inline int skb_availroom(const struct sk_buff *skb) { - return skb_is_nonlinear(skb) ? 0 : skb->avail_size - skb->len; + if (skb_is_nonlinear(skb)) + return 0; + + return skb->end - skb->tail - skb->reserved_tailroom; } /** diff --git a/include/linux/thermal.h b/include/linux/thermal.h index f0bd7f90a90d..e3c0ae9bb1fa 100644 --- a/include/linux/thermal.h +++ b/include/linux/thermal.h @@ -44,7 +44,7 @@ /* Adding event notification support elements */ #define THERMAL_GENL_FAMILY_NAME "thermal_event" #define THERMAL_GENL_VERSION 0x01 -#define THERMAL_GENL_MCAST_GROUP_NAME "thermal_mc_group" +#define THERMAL_GENL_MCAST_GROUP_NAME "thermal_mc_grp" /* Default Thermal Governor */ #if defined(CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE) diff --git a/include/linux/udp.h b/include/linux/udp.h index 9d81de123c90..42278bbf7a88 100644 --- a/include/linux/udp.h +++ b/include/linux/udp.h @@ -68,6 +68,7 @@ struct udp_sock { * For encapsulation sockets. */ int (*encap_rcv)(struct sock *sk, struct sk_buff *skb); + void (*encap_destroy)(struct sock *sk); }; static inline struct udp_sock *udp_sk(const struct sock *sk) diff --git a/include/linux/usb/cdc_ncm.h b/include/linux/usb/cdc_ncm.h index 3b8f9d4fc3fe..cc25b70af33c 100644 --- a/include/linux/usb/cdc_ncm.h +++ b/include/linux/usb/cdc_ncm.h @@ -127,6 +127,7 @@ struct cdc_ncm_ctx { u16 connected; }; +extern u8 cdc_ncm_select_altsetting(struct usbnet *dev, struct usb_interface *intf); extern int cdc_ncm_bind_common(struct usbnet *dev, struct usb_interface *intf, u8 data_altsetting); extern void cdc_ncm_unbind(struct usbnet *dev, struct usb_interface *intf); extern struct sk_buff *cdc_ncm_fill_tx_frame(struct cdc_ncm_ctx *ctx, struct sk_buff *skb, __le32 sign); diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h index 3c671c1b37f6..8860594d6364 100644 --- a/include/linux/usb/composite.h +++ b/include/linux/usb/composite.h @@ -60,7 +60,7 @@ struct usb_configuration; * @name: For diagnostics, identifies the function. * @strings: tables of strings, keyed by identifiers assigned during bind() * and by language IDs provided in control requests - * @descriptors: Table of full (or low) speed descriptors, using interface and + * @fs_descriptors: Table of full (or low) speed descriptors, using interface and * string identifiers assigned during @bind(). If this pointer is null, * the function will not be available at full speed (or at low speed). * @hs_descriptors: Table of high speed descriptors, using interface and @@ -290,6 +290,7 @@ enum { * after function notifications * @resume: Notifies configuration when the host restarts USB traffic, * before function notifications + * @gadget_driver: Gadget driver controlling this driver * * Devices default to reporting self powered operation. Devices which rely * on bus powered operation should report this in their @bind method. diff --git a/include/linux/usb/hcd.h b/include/linux/usb/hcd.h index 0a78df5f6cfd..59694b5e5e90 100644 --- a/include/linux/usb/hcd.h +++ b/include/linux/usb/hcd.h @@ -357,6 +357,7 @@ struct hc_driver { */ int (*disable_usb3_lpm_timeout)(struct usb_hcd *, struct usb_device *, enum usb3_link_state state); + int (*find_raw_port_number)(struct usb_hcd *, int); }; extern int usb_hcd_link_urb_to_ep(struct usb_hcd *hcd, struct urb *urb); @@ -396,6 +397,7 @@ extern int usb_hcd_is_primary_hcd(struct usb_hcd *hcd); extern int usb_add_hcd(struct usb_hcd *hcd, unsigned int irqnum, unsigned long irqflags); extern void usb_remove_hcd(struct usb_hcd *hcd); +extern int usb_hcd_find_raw_port_number(struct usb_hcd *hcd, int port1); struct platform_device; extern void usb_hcd_platform_shutdown(struct platform_device *dev); diff --git a/include/linux/usb/serial.h b/include/linux/usb/serial.h index ef9be7e1e190..1819b59aab2a 100644 --- a/include/linux/usb/serial.h +++ b/include/linux/usb/serial.h @@ -66,6 +66,7 @@ * port. * @flags: usb serial port flags * @write_wait: a wait_queue_head_t used by the port. + * @delta_msr_wait: modem-status-change wait queue * @work: work queue entry for the line discipline waking up. * @throttled: nonzero if the read urb is inactive to throttle the device * @throttle_req: nonzero if the tty wants to throttle us @@ -112,6 +113,7 @@ struct usb_serial_port { unsigned long flags; wait_queue_head_t write_wait; + wait_queue_head_t delta_msr_wait; struct work_struct work; char throttled; char throttle_req; diff --git a/include/linux/usb/ulpi.h b/include/linux/usb/ulpi.h index 6f033a415ecb..5c295c26ad37 100644 --- a/include/linux/usb/ulpi.h +++ b/include/linux/usb/ulpi.h @@ -181,8 +181,16 @@ /*-------------------------------------------------------------------------*/ +#if IS_ENABLED(CONFIG_USB_ULPI) struct usb_phy *otg_ulpi_create(struct usb_phy_io_ops *ops, unsigned int flags); +#else +static inline struct usb_phy *otg_ulpi_create(struct usb_phy_io_ops *ops, + unsigned int flags) +{ + return NULL; +} +#endif #ifdef CONFIG_USB_ULPI_VIEWPORT /* access ops for controllers with a viewport register */ diff --git a/include/linux/user_namespace.h b/include/linux/user_namespace.h index 4ce009324933..b6b215f13b45 100644 --- a/include/linux/user_namespace.h +++ b/include/linux/user_namespace.h @@ -26,6 +26,8 @@ struct user_namespace { kuid_t owner; kgid_t group; unsigned int proc_inum; + bool may_mount_sysfs; + bool may_mount_proc; }; extern struct user_namespace init_user_ns; @@ -82,4 +84,6 @@ static inline void put_user_ns(struct user_namespace *ns) #endif +void update_mnt_policy(struct user_namespace *userns); + #endif /* _LINUX_USER_H */ diff --git a/include/net/dst.h b/include/net/dst.h index 853cda11e518..1f8fd109e225 100644 --- a/include/net/dst.h +++ b/include/net/dst.h @@ -413,13 +413,15 @@ static inline int dst_neigh_output(struct dst_entry *dst, struct neighbour *n, static inline struct neighbour *dst_neigh_lookup(const struct dst_entry *dst, const void *daddr) { - return dst->ops->neigh_lookup(dst, NULL, daddr); + struct neighbour *n = dst->ops->neigh_lookup(dst, NULL, daddr); + return IS_ERR(n) ? NULL : n; } static inline struct neighbour *dst_neigh_lookup_skb(const struct dst_entry *dst, struct sk_buff *skb) { - return dst->ops->neigh_lookup(dst, skb, NULL); + struct neighbour *n = dst->ops->neigh_lookup(dst, skb, NULL); + return IS_ERR(n) ? NULL : n; } static inline void dst_link_failure(struct sk_buff *skb) diff --git a/include/net/flow_keys.h b/include/net/flow_keys.h index 80461c1ae9ef..bb8271d487b7 100644 --- a/include/net/flow_keys.h +++ b/include/net/flow_keys.h @@ -9,6 +9,7 @@ struct flow_keys { __be32 ports; __be16 port16[2]; }; + u16 thoff; u8 ip_proto; }; diff --git a/include/net/inet_frag.h b/include/net/inet_frag.h index 76c3fe5ecc2e..0a1dcc2fa2f5 100644 --- a/include/net/inet_frag.h +++ b/include/net/inet_frag.h @@ -43,6 +43,13 @@ struct inet_frag_queue { #define INETFRAGS_HASHSZ 64 +/* averaged: + * max_depth = default ipfrag_high_thresh / INETFRAGS_HASHSZ / + * rounded up (SKB_TRUELEN(0) + sizeof(struct ipq or + * struct frag_queue)) + */ +#define INETFRAGS_MAXDEPTH 128 + struct inet_frags { struct hlist_head hash[INETFRAGS_HASHSZ]; /* This rwlock is a global lock (seperate per IPv4, IPv6 and @@ -76,6 +83,8 @@ int inet_frag_evictor(struct netns_frags *nf, struct inet_frags *f, bool force); struct inet_frag_queue *inet_frag_find(struct netns_frags *nf, struct inet_frags *f, void *key, unsigned int hash) __releases(&f->lock); +void inet_frag_maybe_warn_overflow(struct inet_frag_queue *q, + const char *prefix); static inline void inet_frag_put(struct inet_frag_queue *q, struct inet_frags *f) { diff --git a/include/net/ip_fib.h b/include/net/ip_fib.h index 9497be1ad4c0..e49db91593a9 100644 --- a/include/net/ip_fib.h +++ b/include/net/ip_fib.h @@ -152,18 +152,16 @@ struct fib_result_nl { }; #ifdef CONFIG_IP_ROUTE_MULTIPATH - #define FIB_RES_NH(res) ((res).fi->fib_nh[(res).nh_sel]) - -#define FIB_TABLE_HASHSZ 2 - #else /* CONFIG_IP_ROUTE_MULTIPATH */ - #define FIB_RES_NH(res) ((res).fi->fib_nh[0]) +#endif /* CONFIG_IP_ROUTE_MULTIPATH */ +#ifdef CONFIG_IP_MULTIPLE_TABLES #define FIB_TABLE_HASHSZ 256 - -#endif /* CONFIG_IP_ROUTE_MULTIPATH */ +#else +#define FIB_TABLE_HASHSZ 2 +#endif extern __be32 fib_info_update_nh_saddr(struct net *net, struct fib_nh *nh); diff --git a/include/net/ip_vs.h b/include/net/ip_vs.h index 68c69d54d392..fce8e6b66d55 100644 --- a/include/net/ip_vs.h +++ b/include/net/ip_vs.h @@ -976,6 +976,7 @@ struct netns_ipvs { int sysctl_sync_retries; int sysctl_nat_icmp_send; int sysctl_pmtu_disc; + int sysctl_backup_only; /* ip_vs_lblc */ int sysctl_lblc_expiration; @@ -1067,6 +1068,12 @@ static inline int sysctl_pmtu_disc(struct netns_ipvs *ipvs) return ipvs->sysctl_pmtu_disc; } +static inline int sysctl_backup_only(struct netns_ipvs *ipvs) +{ + return ipvs->sync_state & IP_VS_STATE_BACKUP && + ipvs->sysctl_backup_only; +} + #else static inline int sysctl_sync_threshold(struct netns_ipvs *ipvs) @@ -1114,6 +1121,11 @@ static inline int sysctl_pmtu_disc(struct netns_ipvs *ipvs) return 1; } +static inline int sysctl_backup_only(struct netns_ipvs *ipvs) +{ + return 0; +} + #endif /* diff --git a/include/net/ipip.h b/include/net/ipip.h index fd19625ff99d..982141c15200 100644 --- a/include/net/ipip.h +++ b/include/net/ipip.h @@ -77,15 +77,11 @@ static inline void tunnel_ip_select_ident(struct sk_buff *skb, { struct iphdr *iph = ip_hdr(skb); - if (iph->frag_off & htons(IP_DF)) - iph->id = 0; - else { - /* Use inner packet iph-id if possible. */ - if (skb->protocol == htons(ETH_P_IP) && old_iph->id) - iph->id = old_iph->id; - else - __ip_select_ident(iph, dst, - (skb_shinfo(skb)->gso_segs ?: 1) - 1); - } + /* Use inner packet iph-id if possible. */ + if (skb->protocol == htons(ETH_P_IP) && old_iph->id) + iph->id = old_iph->id; + else + __ip_select_ident(iph, dst, + (skb_shinfo(skb)->gso_segs ?: 1) - 1); } #endif diff --git a/include/uapi/linux/acct.h b/include/uapi/linux/acct.h index 11b6ca3e0873..df2f9a0bba6a 100644 --- a/include/uapi/linux/acct.h +++ b/include/uapi/linux/acct.h @@ -107,10 +107,12 @@ struct acct_v3 #define ACORE 0x08 /* ... dumped core */ #define AXSIG 0x10 /* ... was killed by a signal */ -#ifdef __BIG_ENDIAN +#if defined(__BYTE_ORDER) ? __BYTE_ORDER == __BIG_ENDIAN : defined(__BIG_ENDIAN) #define ACCT_BYTEORDER 0x80 /* accounting file is big endian */ -#else +#elif defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN) #define ACCT_BYTEORDER 0x00 /* accounting file is little endian */ +#else +#error unspecified endianness #endif #ifndef __KERNEL__ diff --git a/include/uapi/linux/aio_abi.h b/include/uapi/linux/aio_abi.h index 86fa7a71336a..bb2554f7fbd1 100644 --- a/include/uapi/linux/aio_abi.h +++ b/include/uapi/linux/aio_abi.h @@ -62,9 +62,9 @@ struct io_event { __s64 res2; /* secondary result */ }; -#if defined(__LITTLE_ENDIAN) +#if defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN) #define PADDED(x,y) x, y -#elif defined(__BIG_ENDIAN) +#elif defined(__BYTE_ORDER) ? __BYTE_ORDER == __BIG_ENDIAN : defined(__BIG_ENDIAN) #define PADDED(x,y) y, x #else #error edit for your odd byteorder. diff --git a/include/uapi/linux/packet_diag.h b/include/uapi/linux/packet_diag.h index 93f5fa94a431..afafd703ad92 100644 --- a/include/uapi/linux/packet_diag.h +++ b/include/uapi/linux/packet_diag.h @@ -33,9 +33,11 @@ enum { PACKET_DIAG_TX_RING, PACKET_DIAG_FANOUT, - PACKET_DIAG_MAX, + __PACKET_DIAG_MAX, }; +#define PACKET_DIAG_MAX (__PACKET_DIAG_MAX - 1) + struct packet_diag_info { __u32 pdi_index; __u32 pdi_version; diff --git a/include/uapi/linux/raid/md_p.h b/include/uapi/linux/raid/md_p.h index ee753536ab70..fe1a5406d4d9 100644 --- a/include/uapi/linux/raid/md_p.h +++ b/include/uapi/linux/raid/md_p.h @@ -145,16 +145,18 @@ typedef struct mdp_superblock_s { __u32 failed_disks; /* 4 Number of failed disks */ __u32 spare_disks; /* 5 Number of spare disks */ __u32 sb_csum; /* 6 checksum of the whole superblock */ -#ifdef __BIG_ENDIAN +#if defined(__BYTE_ORDER) ? __BYTE_ORDER == __BIG_ENDIAN : defined(__BIG_ENDIAN) __u32 events_hi; /* 7 high-order of superblock update count */ __u32 events_lo; /* 8 low-order of superblock update count */ __u32 cp_events_hi; /* 9 high-order of checkpoint update count */ __u32 cp_events_lo; /* 10 low-order of checkpoint update count */ -#else +#elif defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN) __u32 events_lo; /* 7 low-order of superblock update count */ __u32 events_hi; /* 8 high-order of superblock update count */ __u32 cp_events_lo; /* 9 low-order of checkpoint update count */ __u32 cp_events_hi; /* 10 high-order of checkpoint update count */ +#else +#error unspecified endianness #endif __u32 recovery_cp; /* 11 recovery checkpoint sector count */ /* There are only valid for minor_version > 90 */ diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h index b6a23a483d74..74c2bf7211f8 100644 --- a/include/uapi/linux/serial_core.h +++ b/include/uapi/linux/serial_core.h @@ -51,7 +51,10 @@ #define PORT_8250_CIR 23 /* CIR infrared port, has its own driver */ #define PORT_XR17V35X 24 /* Exar XR17V35x UARTs */ #define PORT_BRCM_TRUMANAGE 25 -#define PORT_MAX_8250 25 /* max port ID */ +#define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */ +#define PORT_ALTR_16550_F64 27 /* Altera 16550 UART with 64 FIFOs */ +#define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */ +#define PORT_MAX_8250 28 /* max port ID */ /* * ARM specific type numbers. These are not currently guaranteed diff --git a/include/uapi/linux/unix_diag.h b/include/uapi/linux/unix_diag.h index b8a24941db21..b9e2a6a7446f 100644 --- a/include/uapi/linux/unix_diag.h +++ b/include/uapi/linux/unix_diag.h @@ -39,9 +39,11 @@ enum { UNIX_DIAG_MEMINFO, UNIX_DIAG_SHUTDOWN, - UNIX_DIAG_MAX, + __UNIX_DIAG_MAX, }; +#define UNIX_DIAG_MAX (__UNIX_DIAG_MAX - 1) + struct unix_diag_vfs { __u32 udiag_vfs_ino; __u32 udiag_vfs_dev; diff --git a/include/video/atmel_lcdc.h b/include/video/atmel_lcdc.h index 28447f1594fa..8deb22672ada 100644 --- a/include/video/atmel_lcdc.h +++ b/include/video/atmel_lcdc.h @@ -30,7 +30,6 @@ */ #define ATMEL_LCDC_WIRING_BGR 0 #define ATMEL_LCDC_WIRING_RGB 1 -#define ATMEL_LCDC_WIRING_RGB555 2 /* LCD Controller info data structure, stored in device platform_data */ @@ -62,6 +61,7 @@ struct atmel_lcdfb_info { void (*atmel_lcdfb_power_control)(int on); struct fb_monspecs *default_monspecs; u32 pseudo_palette[16]; + bool have_intensity_bit; }; #define ATMEL_LCDC_DMABADDR1 0x00 diff --git a/include/xen/interface/io/blkif.h b/include/xen/interface/io/blkif.h index 01c3d62436ef..ffd4652de91c 100644 --- a/include/xen/interface/io/blkif.h +++ b/include/xen/interface/io/blkif.h @@ -138,11 +138,21 @@ struct blkif_request_discard { uint8_t _pad3; } __attribute__((__packed__)); +struct blkif_request_other { + uint8_t _pad1; + blkif_vdev_t _pad2; /* only for read/write requests */ +#ifdef CONFIG_X86_64 + uint32_t _pad3; /* offsetof(blkif_req..,u.other.id)==8*/ +#endif + uint64_t id; /* private guest value, echoed in resp */ +} __attribute__((__packed__)); + struct blkif_request { uint8_t operation; /* BLKIF_OP_??? */ union { struct blkif_request_rw rw; struct blkif_request_discard discard; + struct blkif_request_other other; } u; } __attribute__((__packed__)); diff --git a/include/xen/interface/physdev.h b/include/xen/interface/physdev.h index 1844d31f4552..7000bb1f6e96 100644 --- a/include/xen/interface/physdev.h +++ b/include/xen/interface/physdev.h @@ -251,6 +251,12 @@ struct physdev_pci_device_add { #define PHYSDEVOP_pci_device_remove 26 #define PHYSDEVOP_restore_msi_ext 27 +/* + * Dom0 should use these two to announce MMIO resources assigned to + * MSI-X capable devices won't (prepare) or may (release) change. + */ +#define PHYSDEVOP_prepare_msix 30 +#define PHYSDEVOP_release_msix 31 struct physdev_pci_device { /* IN */ uint16_t seg; diff --git a/init/Kconfig b/init/Kconfig index 22616cd434bc..5341d7232c3a 100644 --- a/init/Kconfig +++ b/init/Kconfig @@ -28,10 +28,6 @@ config BUILDTIME_EXTABLE_SORT menu "General setup" -config EXPERIMENTAL - bool - default y - config BROKEN bool diff --git a/ipc/mqueue.c b/ipc/mqueue.c index e5c4f609f22c..e4e47f647446 100644 --- a/ipc/mqueue.c +++ b/ipc/mqueue.c @@ -330,8 +330,16 @@ static struct dentry *mqueue_mount(struct file_system_type *fs_type, int flags, const char *dev_name, void *data) { - if (!(flags & MS_KERNMOUNT)) - data = current->nsproxy->ipc_ns; + if (!(flags & MS_KERNMOUNT)) { + struct ipc_namespace *ns = current->nsproxy->ipc_ns; + /* Don't allow mounting unless the caller has CAP_SYS_ADMIN + * over the ipc namespace. + */ + if (!ns_capable(ns->user_ns, CAP_SYS_ADMIN)) + return ERR_PTR(-EPERM); + + data = ns; + } return mount_ns(fs_type, flags, data, mqueue_fill_super); } @@ -840,7 +848,8 @@ out_putfd: fd = error; } mutex_unlock(&root->d_inode->i_mutex); - mnt_drop_write(mnt); + if (!ro) + mnt_drop_write(mnt); out_putname: putname(name); return fd; diff --git a/kernel/events/core.c b/kernel/events/core.c index b0cd86501c30..59412d037eed 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -4434,12 +4434,15 @@ static void perf_event_task_event(struct perf_task_event *task_event) if (ctxn < 0) goto next; ctx = rcu_dereference(current->perf_event_ctxp[ctxn]); + if (ctx) + perf_event_task_ctx(ctx, task_event); } - if (ctx) - perf_event_task_ctx(ctx, task_event); next: put_cpu_ptr(pmu->pmu_cpu_context); } + if (task_event->task_ctx) + perf_event_task_ctx(task_event->task_ctx, task_event); + rcu_read_unlock(); } @@ -5647,6 +5650,7 @@ static void perf_swevent_init_hrtimer(struct perf_event *event) event->attr.sample_period = NSEC_PER_SEC / freq; hwc->sample_period = event->attr.sample_period; local64_set(&hwc->period_left, hwc->sample_period); + hwc->last_period = hwc->sample_period; event->attr.freq = 0; } } diff --git a/kernel/exit.c b/kernel/exit.c index 51e485ca9935..60bc027c61c3 100644 --- a/kernel/exit.c +++ b/kernel/exit.c @@ -835,7 +835,7 @@ void do_exit(long code) /* * Make sure we are holding no locks: */ - debug_check_no_locks_held(); + debug_check_no_locks_held(tsk); /* * We can do this unlocked here. The futex code uses this flag * just to verify whether the pi state cleanup has been done diff --git a/kernel/fork.c b/kernel/fork.c index 8d932b1c9056..1766d324d5e3 100644 --- a/kernel/fork.c +++ b/kernel/fork.c @@ -1141,6 +1141,9 @@ static struct task_struct *copy_process(unsigned long clone_flags, if ((clone_flags & (CLONE_NEWNS|CLONE_FS)) == (CLONE_NEWNS|CLONE_FS)) return ERR_PTR(-EINVAL); + if ((clone_flags & (CLONE_NEWUSER|CLONE_FS)) == (CLONE_NEWUSER|CLONE_FS)) + return ERR_PTR(-EINVAL); + /* * Thread groups must share signals as well, and detached threads * can only be started up within the thread group. @@ -1807,7 +1810,7 @@ SYSCALL_DEFINE1(unshare, unsigned long, unshare_flags) * If unsharing a user namespace must also unshare the thread. */ if (unshare_flags & CLONE_NEWUSER) - unshare_flags |= CLONE_THREAD; + unshare_flags |= CLONE_THREAD | CLONE_FS; /* * If unsharing a pid namespace must also unshare the thread. */ diff --git a/kernel/futex.c b/kernel/futex.c index f0090a993dab..b26dcfc02c94 100644 --- a/kernel/futex.c +++ b/kernel/futex.c @@ -223,7 +223,8 @@ static void drop_futex_key_refs(union futex_key *key) * @rw: mapping needs to be read/write (values: VERIFY_READ, * VERIFY_WRITE) * - * Returns a negative error code or 0 + * Return: a negative error code or 0 + * * The key words are stored in *key on success. * * For shared mappings, it's (page->index, file_inode(vma->vm_file), @@ -705,9 +706,9 @@ lookup_pi_state(u32 uval, struct futex_hash_bucket *hb, * be "current" except in the case of requeue pi. * @set_waiters: force setting the FUTEX_WAITERS bit (1) or not (0) * - * Returns: - * 0 - ready to wait - * 1 - acquired the lock + * Return: + * 0 - ready to wait; + * 1 - acquired the lock; * <0 - error * * The hb->lock and futex_key refs shall be held by the caller. @@ -1191,9 +1192,9 @@ void requeue_pi_wake_futex(struct futex_q *q, union futex_key *key, * then direct futex_lock_pi_atomic() to force setting the FUTEX_WAITERS bit. * hb1 and hb2 must be held by the caller. * - * Returns: - * 0 - failed to acquire the lock atomicly - * 1 - acquired the lock + * Return: + * 0 - failed to acquire the lock atomically; + * 1 - acquired the lock; * <0 - error */ static int futex_proxy_trylock_atomic(u32 __user *pifutex, @@ -1254,8 +1255,8 @@ static int futex_proxy_trylock_atomic(u32 __user *pifutex, * Requeue waiters on uaddr1 to uaddr2. In the requeue_pi case, try to acquire * uaddr2 atomically on behalf of the top waiter. * - * Returns: - * >=0 - on success, the number of tasks requeued or woken + * Return: + * >=0 - on success, the number of tasks requeued or woken; * <0 - on error */ static int futex_requeue(u32 __user *uaddr1, unsigned int flags, @@ -1536,8 +1537,8 @@ static inline void queue_me(struct futex_q *q, struct futex_hash_bucket *hb) * The q->lock_ptr must not be held by the caller. A call to unqueue_me() must * be paired with exactly one earlier call to queue_me(). * - * Returns: - * 1 - if the futex_q was still queued (and we removed unqueued it) + * Return: + * 1 - if the futex_q was still queued (and we removed unqueued it); * 0 - if the futex_q was already removed by the waking thread */ static int unqueue_me(struct futex_q *q) @@ -1707,9 +1708,9 @@ static long futex_wait_restart(struct restart_block *restart); * the pi_state owner as well as handle race conditions that may allow us to * acquire the lock. Must be called with the hb lock held. * - * Returns: - * 1 - success, lock taken - * 0 - success, lock not taken + * Return: + * 1 - success, lock taken; + * 0 - success, lock not taken; * <0 - on error (-EFAULT) */ static int fixup_owner(u32 __user *uaddr, struct futex_q *q, int locked) @@ -1824,8 +1825,8 @@ static void futex_wait_queue_me(struct futex_hash_bucket *hb, struct futex_q *q, * Return with the hb lock held and a q.key reference on success, and unlocked * with no q.key reference on failure. * - * Returns: - * 0 - uaddr contains val and hb has been locked + * Return: + * 0 - uaddr contains val and hb has been locked; * <1 - -EFAULT or -EWOULDBLOCK (uaddr does not contain val) and hb is unlocked */ static int futex_wait_setup(u32 __user *uaddr, u32 val, unsigned int flags, @@ -2203,9 +2204,9 @@ pi_faulted: * the wakeup and return the appropriate error code to the caller. Must be * called with the hb lock held. * - * Returns - * 0 - no early wakeup detected - * <0 - -ETIMEDOUT or -ERESTARTNOINTR + * Return: + * 0 = no early wakeup detected; + * <0 = -ETIMEDOUT or -ERESTARTNOINTR */ static inline int handle_early_requeue_pi_wakeup(struct futex_hash_bucket *hb, @@ -2247,7 +2248,6 @@ int handle_early_requeue_pi_wakeup(struct futex_hash_bucket *hb, * @val: the expected value of uaddr * @abs_time: absolute timeout * @bitset: 32 bit wakeup bitset set by userspace, defaults to all - * @clockrt: whether to use CLOCK_REALTIME (1) or CLOCK_MONOTONIC (0) * @uaddr2: the pi futex we will take prior to returning to user-space * * The caller will wait on uaddr and will be requeued by futex_requeue() to @@ -2258,7 +2258,7 @@ int handle_early_requeue_pi_wakeup(struct futex_hash_bucket *hb, * there was a need to. * * We call schedule in futex_wait_queue_me() when we enqueue and return there - * via the following: + * via the following-- * 1) wakeup on uaddr2 after an atomic lock acquisition by futex_requeue() * 2) wakeup on uaddr2 after a requeue * 3) signal @@ -2276,8 +2276,8 @@ int handle_early_requeue_pi_wakeup(struct futex_hash_bucket *hb, * * If 4 or 7, we cleanup and return with -ETIMEDOUT. * - * Returns: - * 0 - On success + * Return: + * 0 - On success; * <0 - On error */ static int futex_wait_requeue_pi(u32 __user *uaddr, unsigned int flags, diff --git a/kernel/lockdep.c b/kernel/lockdep.c index 259db207b5d9..8a0efac4f99d 100644 --- a/kernel/lockdep.c +++ b/kernel/lockdep.c @@ -4088,7 +4088,7 @@ void debug_check_no_locks_freed(const void *mem_from, unsigned long mem_len) } EXPORT_SYMBOL_GPL(debug_check_no_locks_freed); -static void print_held_locks_bug(void) +static void print_held_locks_bug(struct task_struct *curr) { if (!debug_locks_off()) return; @@ -4097,21 +4097,22 @@ static void print_held_locks_bug(void) printk("\n"); printk("=====================================\n"); - printk("[ BUG: %s/%d still has locks held! ]\n", - current->comm, task_pid_nr(current)); + printk("[ BUG: lock held at task exit time! ]\n"); print_kernel_ident(); printk("-------------------------------------\n"); - lockdep_print_held_locks(current); + printk("%s/%d is exiting with locks still held!\n", + curr->comm, task_pid_nr(curr)); + lockdep_print_held_locks(curr); + printk("\nstack backtrace:\n"); dump_stack(); } -void debug_check_no_locks_held(void) +void debug_check_no_locks_held(struct task_struct *task) { - if (unlikely(current->lockdep_depth > 0)) - print_held_locks_bug(); + if (unlikely(task->lockdep_depth > 0)) + print_held_locks_bug(task); } -EXPORT_SYMBOL_GPL(debug_check_no_locks_held); void debug_show_all_locks(void) { diff --git a/kernel/pid_namespace.c b/kernel/pid_namespace.c index c1c3dc1c6023..bea15bdf82b0 100644 --- a/kernel/pid_namespace.c +++ b/kernel/pid_namespace.c @@ -181,6 +181,7 @@ void zap_pid_ns_processes(struct pid_namespace *pid_ns) int nr; int rc; struct task_struct *task, *me = current; + int init_pids = thread_group_leader(me) ? 1 : 2; /* Don't allow any more processes into the pid namespace */ disable_pid_allocation(pid_ns); @@ -230,7 +231,7 @@ void zap_pid_ns_processes(struct pid_namespace *pid_ns) */ for (;;) { set_current_state(TASK_UNINTERRUPTIBLE); - if (pid_ns->nr_hashed == 1) + if (pid_ns->nr_hashed == init_pids) break; schedule(); } diff --git a/kernel/printk.c b/kernel/printk.c index 0b31715f335a..abbdd9e2ac82 100644 --- a/kernel/printk.c +++ b/kernel/printk.c @@ -63,8 +63,6 @@ void asmlinkage __attribute__((weak)) early_printk(const char *fmt, ...) #define MINIMUM_CONSOLE_LOGLEVEL 1 /* Minimum loglevel we let people use */ #define DEFAULT_CONSOLE_LOGLEVEL 7 /* anything MORE serious than KERN_DEBUG */ -DECLARE_WAIT_QUEUE_HEAD(log_wait); - int console_printk[4] = { DEFAULT_CONSOLE_LOGLEVEL, /* console_loglevel */ DEFAULT_MESSAGE_LOGLEVEL, /* default_message_loglevel */ @@ -224,6 +222,7 @@ struct log { static DEFINE_RAW_SPINLOCK(logbuf_lock); #ifdef CONFIG_PRINTK +DECLARE_WAIT_QUEUE_HEAD(log_wait); /* the next printk record to read by syslog(READ) or /proc/kmsg */ static u64 syslog_seq; static u32 syslog_idx; @@ -1957,45 +1956,6 @@ int is_console_locked(void) return console_locked; } -/* - * Delayed printk version, for scheduler-internal messages: - */ -#define PRINTK_BUF_SIZE 512 - -#define PRINTK_PENDING_WAKEUP 0x01 -#define PRINTK_PENDING_SCHED 0x02 - -static DEFINE_PER_CPU(int, printk_pending); -static DEFINE_PER_CPU(char [PRINTK_BUF_SIZE], printk_sched_buf); - -static void wake_up_klogd_work_func(struct irq_work *irq_work) -{ - int pending = __this_cpu_xchg(printk_pending, 0); - - if (pending & PRINTK_PENDING_SCHED) { - char *buf = __get_cpu_var(printk_sched_buf); - printk(KERN_WARNING "[sched_delayed] %s", buf); - } - - if (pending & PRINTK_PENDING_WAKEUP) - wake_up_interruptible(&log_wait); -} - -static DEFINE_PER_CPU(struct irq_work, wake_up_klogd_work) = { - .func = wake_up_klogd_work_func, - .flags = IRQ_WORK_LAZY, -}; - -void wake_up_klogd(void) -{ - preempt_disable(); - if (waitqueue_active(&log_wait)) { - this_cpu_or(printk_pending, PRINTK_PENDING_WAKEUP); - irq_work_queue(&__get_cpu_var(wake_up_klogd_work)); - } - preempt_enable(); -} - static void console_cont_flush(char *text, size_t size) { unsigned long flags; @@ -2458,6 +2418,44 @@ static int __init printk_late_init(void) late_initcall(printk_late_init); #if defined CONFIG_PRINTK +/* + * Delayed printk version, for scheduler-internal messages: + */ +#define PRINTK_BUF_SIZE 512 + +#define PRINTK_PENDING_WAKEUP 0x01 +#define PRINTK_PENDING_SCHED 0x02 + +static DEFINE_PER_CPU(int, printk_pending); +static DEFINE_PER_CPU(char [PRINTK_BUF_SIZE], printk_sched_buf); + +static void wake_up_klogd_work_func(struct irq_work *irq_work) +{ + int pending = __this_cpu_xchg(printk_pending, 0); + + if (pending & PRINTK_PENDING_SCHED) { + char *buf = __get_cpu_var(printk_sched_buf); + printk(KERN_WARNING "[sched_delayed] %s", buf); + } + + if (pending & PRINTK_PENDING_WAKEUP) + wake_up_interruptible(&log_wait); +} + +static DEFINE_PER_CPU(struct irq_work, wake_up_klogd_work) = { + .func = wake_up_klogd_work_func, + .flags = IRQ_WORK_LAZY, +}; + +void wake_up_klogd(void) +{ + preempt_disable(); + if (waitqueue_active(&log_wait)) { + this_cpu_or(printk_pending, PRINTK_PENDING_WAKEUP); + irq_work_queue(&__get_cpu_var(wake_up_klogd_work)); + } + preempt_enable(); +} int printk_sched(const char *fmt, ...) { diff --git a/kernel/signal.c b/kernel/signal.c index 2ec870a4c3c4..dd72567767d9 100644 --- a/kernel/signal.c +++ b/kernel/signal.c @@ -485,6 +485,9 @@ flush_signal_handlers(struct task_struct *t, int force_default) if (force_default || ka->sa.sa_handler != SIG_IGN) ka->sa.sa_handler = SIG_DFL; ka->sa.sa_flags = 0; +#ifdef __ARCH_HAS_SA_RESTORER + ka->sa.sa_restorer = NULL; +#endif sigemptyset(&ka->sa.sa_mask); ka++; } @@ -2682,7 +2685,7 @@ static int do_sigpending(void *set, unsigned long sigsetsize) /** * sys_rt_sigpending - examine a pending signal that has been raised * while blocked - * @set: stores pending signals + * @uset: stores pending signals * @sigsetsize: size of sigset_t type or larger */ SYSCALL_DEFINE2(rt_sigpending, sigset_t __user *, uset, size_t, sigsetsize) diff --git a/kernel/sys.c b/kernel/sys.c index 81f56445fba9..39c9c4a2949f 100644 --- a/kernel/sys.c +++ b/kernel/sys.c @@ -2185,9 +2185,8 @@ SYSCALL_DEFINE3(getcpu, unsigned __user *, cpup, unsigned __user *, nodep, char poweroff_cmd[POWEROFF_CMD_PATH_LEN] = "/sbin/poweroff"; -static int __orderly_poweroff(void) +static int __orderly_poweroff(bool force) { - int argc; char **argv; static char *envp[] = { "HOME=/", @@ -2196,20 +2195,40 @@ static int __orderly_poweroff(void) }; int ret; - argv = argv_split(GFP_ATOMIC, poweroff_cmd, &argc); - if (argv == NULL) { + argv = argv_split(GFP_KERNEL, poweroff_cmd, NULL); + if (argv) { + ret = call_usermodehelper(argv[0], argv, envp, UMH_WAIT_EXEC); + argv_free(argv); + } else { printk(KERN_WARNING "%s failed to allocate memory for \"%s\"\n", - __func__, poweroff_cmd); - return -ENOMEM; + __func__, poweroff_cmd); + ret = -ENOMEM; } - ret = call_usermodehelper_fns(argv[0], argv, envp, UMH_WAIT_EXEC, - NULL, NULL, NULL); - argv_free(argv); + if (ret && force) { + printk(KERN_WARNING "Failed to start orderly shutdown: " + "forcing the issue\n"); + /* + * I guess this should try to kick off some daemon to sync and + * poweroff asap. Or not even bother syncing if we're doing an + * emergency shutdown? + */ + emergency_sync(); + kernel_power_off(); + } return ret; } +static bool poweroff_force; + +static void poweroff_work_func(struct work_struct *work) +{ + __orderly_poweroff(poweroff_force); +} + +static DECLARE_WORK(poweroff_work, poweroff_work_func); + /** * orderly_poweroff - Trigger an orderly system poweroff * @force: force poweroff if command execution fails @@ -2219,21 +2238,9 @@ static int __orderly_poweroff(void) */ int orderly_poweroff(bool force) { - int ret = __orderly_poweroff(); - - if (ret && force) { - printk(KERN_WARNING "Failed to start orderly shutdown: " - "forcing the issue\n"); - - /* - * I guess this should try to kick off some daemon to sync and - * poweroff asap. Or not even bother syncing if we're doing an - * emergency shutdown? - */ - emergency_sync(); - kernel_power_off(); - } - - return ret; + if (force) /* do not override the pending "true" */ + poweroff_force = true; + schedule_work(&poweroff_work); + return 0; } EXPORT_SYMBOL_GPL(orderly_poweroff); diff --git a/kernel/time/tick-broadcast.c b/kernel/time/tick-broadcast.c index 2fb8cb88df8d..7f32fe0e52cd 100644 --- a/kernel/time/tick-broadcast.c +++ b/kernel/time/tick-broadcast.c @@ -67,7 +67,8 @@ static void tick_broadcast_start_periodic(struct clock_event_device *bc) */ int tick_check_broadcast_device(struct clock_event_device *dev) { - if ((tick_broadcast_device.evtdev && + if ((dev->features & CLOCK_EVT_FEAT_DUMMY) || + (tick_broadcast_device.evtdev && tick_broadcast_device.evtdev->rating >= dev->rating) || (dev->features & CLOCK_EVT_FEAT_C3STOP)) return 0; diff --git a/kernel/trace/Kconfig b/kernel/trace/Kconfig index 192473b22799..fc382d6e2765 100644 --- a/kernel/trace/Kconfig +++ b/kernel/trace/Kconfig @@ -414,24 +414,28 @@ config PROBE_EVENTS def_bool n config DYNAMIC_FTRACE - bool "enable/disable ftrace tracepoints dynamically" + bool "enable/disable function tracing dynamically" depends on FUNCTION_TRACER depends on HAVE_DYNAMIC_FTRACE default y help - This option will modify all the calls to ftrace dynamically - (will patch them out of the binary image and replace them - with a No-Op instruction) as they are called. A table is - created to dynamically enable them again. + This option will modify all the calls to function tracing + dynamically (will patch them out of the binary image and + replace them with a No-Op instruction) on boot up. During + compile time, a table is made of all the locations that ftrace + can function trace, and this table is linked into the kernel + image. When this is enabled, functions can be individually + enabled, and the functions not enabled will not affect + performance of the system. + + See the files in /sys/kernel/debug/tracing: + available_filter_functions + set_ftrace_filter + set_ftrace_notrace This way a CONFIG_FUNCTION_TRACER kernel is slightly larger, but otherwise has native performance as long as no tracing is active. - The changes to the code are done by a kernel thread that - wakes up once a second and checks to see if any ftrace calls - were made. If so, it runs stop_machine (stops all CPUS) - and modifies the code to jump over the call to ftrace. - config DYNAMIC_FTRACE_WITH_REGS def_bool y depends on DYNAMIC_FTRACE diff --git a/kernel/trace/ftrace.c b/kernel/trace/ftrace.c index ab25b88aae56..6893d5a2bf08 100644 --- a/kernel/trace/ftrace.c +++ b/kernel/trace/ftrace.c @@ -3104,8 +3104,8 @@ __unregister_ftrace_function_probe(char *glob, struct ftrace_probe_ops *ops, continue; } - hlist_del(&entry->node); - call_rcu(&entry->rcu, ftrace_free_entry_rcu); + hlist_del_rcu(&entry->node); + call_rcu_sched(&entry->rcu, ftrace_free_entry_rcu); } } __disable_ftrace_function_probe(); diff --git a/kernel/trace/trace.c b/kernel/trace/trace.c index c2e2c2310374..4f1dade56981 100644 --- a/kernel/trace/trace.c +++ b/kernel/trace/trace.c @@ -704,7 +704,7 @@ __update_max_tr(struct trace_array *tr, struct task_struct *tsk, int cpu) void update_max_tr(struct trace_array *tr, struct task_struct *tsk, int cpu) { - struct ring_buffer *buf = tr->buffer; + struct ring_buffer *buf; if (trace_stop_count) return; @@ -719,6 +719,7 @@ update_max_tr(struct trace_array *tr, struct task_struct *tsk, int cpu) arch_spin_lock(&ftrace_max_lock); + buf = tr->buffer; tr->buffer = max_tr.buffer; max_tr.buffer = buf; @@ -2400,6 +2401,27 @@ static void test_ftrace_alive(struct seq_file *m) seq_printf(m, "# MAY BE MISSING FUNCTION EVENTS\n"); } +#ifdef CONFIG_TRACER_MAX_TRACE +static void print_snapshot_help(struct seq_file *m, struct trace_iterator *iter) +{ + if (iter->trace->allocated_snapshot) + seq_printf(m, "#\n# * Snapshot is allocated *\n#\n"); + else + seq_printf(m, "#\n# * Snapshot is freed *\n#\n"); + + seq_printf(m, "# Snapshot commands:\n"); + seq_printf(m, "# echo 0 > snapshot : Clears and frees snapshot buffer\n"); + seq_printf(m, "# echo 1 > snapshot : Allocates snapshot buffer, if not already allocated.\n"); + seq_printf(m, "# Takes a snapshot of the main buffer.\n"); + seq_printf(m, "# echo 2 > snapshot : Clears snapshot buffer (but does not allocate)\n"); + seq_printf(m, "# (Doesn't have to be '2' works with any number that\n"); + seq_printf(m, "# is not a '0' or '1')\n"); +} +#else +/* Should never be called */ +static inline void print_snapshot_help(struct seq_file *m, struct trace_iterator *iter) { } +#endif + static int s_show(struct seq_file *m, void *v) { struct trace_iterator *iter = v; @@ -2411,7 +2433,9 @@ static int s_show(struct seq_file *m, void *v) seq_puts(m, "#\n"); test_ftrace_alive(m); } - if (iter->trace && iter->trace->print_header) + if (iter->snapshot && trace_empty(iter)) + print_snapshot_help(m, iter); + else if (iter->trace && iter->trace->print_header) iter->trace->print_header(m); else trace_default_header(m); @@ -2857,11 +2881,25 @@ static int set_tracer_option(struct tracer *trace, char *cmp, int neg) return -EINVAL; } -static void set_tracer_flags(unsigned int mask, int enabled) +/* Some tracers require overwrite to stay enabled */ +int trace_keep_overwrite(struct tracer *tracer, u32 mask, int set) +{ + if (tracer->enabled && (mask & TRACE_ITER_OVERWRITE) && !set) + return -1; + + return 0; +} + +int set_tracer_flag(unsigned int mask, int enabled) { /* do nothing if flag is already set */ if (!!(trace_flags & mask) == !!enabled) - return; + return 0; + + /* Give the tracer a chance to approve the change */ + if (current_trace->flag_changed) + if (current_trace->flag_changed(current_trace, mask, !!enabled)) + return -EINVAL; if (enabled) trace_flags |= mask; @@ -2871,18 +2909,24 @@ static void set_tracer_flags(unsigned int mask, int enabled) if (mask == TRACE_ITER_RECORD_CMD) trace_event_enable_cmd_record(enabled); - if (mask == TRACE_ITER_OVERWRITE) + if (mask == TRACE_ITER_OVERWRITE) { ring_buffer_change_overwrite(global_trace.buffer, enabled); +#ifdef CONFIG_TRACER_MAX_TRACE + ring_buffer_change_overwrite(max_tr.buffer, enabled); +#endif + } if (mask == TRACE_ITER_PRINTK) trace_printk_start_stop_comm(enabled); + + return 0; } static int trace_set_options(char *option) { char *cmp; int neg = 0; - int ret = 0; + int ret = -ENODEV; int i; cmp = strstrip(option); @@ -2892,19 +2936,20 @@ static int trace_set_options(char *option) cmp += 2; } + mutex_lock(&trace_types_lock); + for (i = 0; trace_options[i]; i++) { if (strcmp(cmp, trace_options[i]) == 0) { - set_tracer_flags(1 << i, !neg); + ret = set_tracer_flag(1 << i, !neg); break; } } /* If no option could be set, test the specific tracer options */ - if (!trace_options[i]) { - mutex_lock(&trace_types_lock); + if (!trace_options[i]) ret = set_tracer_option(current_trace, cmp, neg); - mutex_unlock(&trace_types_lock); - } + + mutex_unlock(&trace_types_lock); return ret; } @@ -2914,6 +2959,7 @@ tracing_trace_options_write(struct file *filp, const char __user *ubuf, size_t cnt, loff_t *ppos) { char buf[64]; + int ret; if (cnt >= sizeof(buf)) return -EINVAL; @@ -2923,7 +2969,9 @@ tracing_trace_options_write(struct file *filp, const char __user *ubuf, buf[cnt] = 0; - trace_set_options(buf); + ret = trace_set_options(buf); + if (ret < 0) + return ret; *ppos += cnt; @@ -3227,6 +3275,9 @@ static int tracing_set_tracer(const char *buf) goto out; trace_branch_disable(); + + current_trace->enabled = false; + if (current_trace->reset) current_trace->reset(tr); @@ -3271,6 +3322,7 @@ static int tracing_set_tracer(const char *buf) } current_trace = t; + current_trace->enabled = true; trace_branch_enable(tr); out: mutex_unlock(&trace_types_lock); @@ -4144,8 +4196,6 @@ tracing_snapshot_write(struct file *filp, const char __user *ubuf, size_t cnt, default: if (current_trace->allocated_snapshot) tracing_reset_online_cpus(&max_tr); - else - ret = -EINVAL; break; } @@ -4759,7 +4809,13 @@ trace_options_core_write(struct file *filp, const char __user *ubuf, size_t cnt, if (val != 0 && val != 1) return -EINVAL; - set_tracer_flags(1 << index, val); + + mutex_lock(&trace_types_lock); + ret = set_tracer_flag(1 << index, val); + mutex_unlock(&trace_types_lock); + + if (ret < 0) + return ret; *ppos += cnt; diff --git a/kernel/trace/trace.h b/kernel/trace/trace.h index 57d7e5397d56..2081971367ea 100644 --- a/kernel/trace/trace.h +++ b/kernel/trace/trace.h @@ -283,11 +283,15 @@ struct tracer { enum print_line_t (*print_line)(struct trace_iterator *iter); /* If you handled the flag setting, return 0 */ int (*set_flag)(u32 old_flags, u32 bit, int set); + /* Return 0 if OK with change, else return non-zero */ + int (*flag_changed)(struct tracer *tracer, + u32 mask, int set); struct tracer *next; struct tracer_flags *flags; bool print_max; bool use_max_tr; bool allocated_snapshot; + bool enabled; }; @@ -943,6 +947,8 @@ extern const char *__stop___trace_bprintk_fmt[]; void trace_printk_init_buffers(void); void trace_printk_start_comm(void); +int trace_keep_overwrite(struct tracer *tracer, u32 mask, int set); +int set_tracer_flag(unsigned int mask, int enabled); #undef FTRACE_ENTRY #define FTRACE_ENTRY(call, struct_name, id, tstruct, print, filter) \ diff --git a/kernel/trace/trace_irqsoff.c b/kernel/trace/trace_irqsoff.c index 713a2cac4881..443b25b43b4f 100644 --- a/kernel/trace/trace_irqsoff.c +++ b/kernel/trace/trace_irqsoff.c @@ -32,7 +32,7 @@ enum { static int trace_type __read_mostly; -static int save_lat_flag; +static int save_flags; static void stop_irqsoff_tracer(struct trace_array *tr, int graph); static int start_irqsoff_tracer(struct trace_array *tr, int graph); @@ -558,8 +558,11 @@ static void stop_irqsoff_tracer(struct trace_array *tr, int graph) static void __irqsoff_tracer_init(struct trace_array *tr) { - save_lat_flag = trace_flags & TRACE_ITER_LATENCY_FMT; - trace_flags |= TRACE_ITER_LATENCY_FMT; + save_flags = trace_flags; + + /* non overwrite screws up the latency tracers */ + set_tracer_flag(TRACE_ITER_OVERWRITE, 1); + set_tracer_flag(TRACE_ITER_LATENCY_FMT, 1); tracing_max_latency = 0; irqsoff_trace = tr; @@ -573,10 +576,13 @@ static void __irqsoff_tracer_init(struct trace_array *tr) static void irqsoff_tracer_reset(struct trace_array *tr) { + int lat_flag = save_flags & TRACE_ITER_LATENCY_FMT; + int overwrite_flag = save_flags & TRACE_ITER_OVERWRITE; + stop_irqsoff_tracer(tr, is_graph()); - if (!save_lat_flag) - trace_flags &= ~TRACE_ITER_LATENCY_FMT; + set_tracer_flag(TRACE_ITER_LATENCY_FMT, lat_flag); + set_tracer_flag(TRACE_ITER_OVERWRITE, overwrite_flag); } static void irqsoff_tracer_start(struct trace_array *tr) @@ -609,6 +615,7 @@ static struct tracer irqsoff_tracer __read_mostly = .print_line = irqsoff_print_line, .flags = &tracer_flags, .set_flag = irqsoff_set_flag, + .flag_changed = trace_keep_overwrite, #ifdef CONFIG_FTRACE_SELFTEST .selftest = trace_selftest_startup_irqsoff, #endif @@ -642,6 +649,7 @@ static struct tracer preemptoff_tracer __read_mostly = .print_line = irqsoff_print_line, .flags = &tracer_flags, .set_flag = irqsoff_set_flag, + .flag_changed = trace_keep_overwrite, #ifdef CONFIG_FTRACE_SELFTEST .selftest = trace_selftest_startup_preemptoff, #endif @@ -677,6 +685,7 @@ static struct tracer preemptirqsoff_tracer __read_mostly = .print_line = irqsoff_print_line, .flags = &tracer_flags, .set_flag = irqsoff_set_flag, + .flag_changed = trace_keep_overwrite, #ifdef CONFIG_FTRACE_SELFTEST .selftest = trace_selftest_startup_preemptirqsoff, #endif diff --git a/kernel/trace/trace_sched_wakeup.c b/kernel/trace/trace_sched_wakeup.c index 75aa97fbe1a1..fde652c9a511 100644 --- a/kernel/trace/trace_sched_wakeup.c +++ b/kernel/trace/trace_sched_wakeup.c @@ -36,7 +36,7 @@ static void __wakeup_reset(struct trace_array *tr); static int wakeup_graph_entry(struct ftrace_graph_ent *trace); static void wakeup_graph_return(struct ftrace_graph_ret *trace); -static int save_lat_flag; +static int save_flags; #define TRACE_DISPLAY_GRAPH 1 @@ -540,8 +540,11 @@ static void stop_wakeup_tracer(struct trace_array *tr) static int __wakeup_tracer_init(struct trace_array *tr) { - save_lat_flag = trace_flags & TRACE_ITER_LATENCY_FMT; - trace_flags |= TRACE_ITER_LATENCY_FMT; + save_flags = trace_flags; + + /* non overwrite screws up the latency tracers */ + set_tracer_flag(TRACE_ITER_OVERWRITE, 1); + set_tracer_flag(TRACE_ITER_LATENCY_FMT, 1); tracing_max_latency = 0; wakeup_trace = tr; @@ -563,12 +566,15 @@ static int wakeup_rt_tracer_init(struct trace_array *tr) static void wakeup_tracer_reset(struct trace_array *tr) { + int lat_flag = save_flags & TRACE_ITER_LATENCY_FMT; + int overwrite_flag = save_flags & TRACE_ITER_OVERWRITE; + stop_wakeup_tracer(tr); /* make sure we put back any tasks we are tracing */ wakeup_reset(tr); - if (!save_lat_flag) - trace_flags &= ~TRACE_ITER_LATENCY_FMT; + set_tracer_flag(TRACE_ITER_LATENCY_FMT, lat_flag); + set_tracer_flag(TRACE_ITER_OVERWRITE, overwrite_flag); } static void wakeup_tracer_start(struct trace_array *tr) @@ -594,6 +600,7 @@ static struct tracer wakeup_tracer __read_mostly = .print_line = wakeup_print_line, .flags = &tracer_flags, .set_flag = wakeup_set_flag, + .flag_changed = trace_keep_overwrite, #ifdef CONFIG_FTRACE_SELFTEST .selftest = trace_selftest_startup_wakeup, #endif @@ -615,6 +622,7 @@ static struct tracer wakeup_rt_tracer __read_mostly = .print_line = wakeup_print_line, .flags = &tracer_flags, .set_flag = wakeup_set_flag, + .flag_changed = trace_keep_overwrite, #ifdef CONFIG_FTRACE_SELFTEST .selftest = trace_selftest_startup_wakeup, #endif diff --git a/kernel/user.c b/kernel/user.c index e81978e8c03b..8e635a18ab52 100644 --- a/kernel/user.c +++ b/kernel/user.c @@ -51,6 +51,8 @@ struct user_namespace init_user_ns = { .owner = GLOBAL_ROOT_UID, .group = GLOBAL_ROOT_GID, .proc_inum = PROC_USER_INIT_INO, + .may_mount_sysfs = true, + .may_mount_proc = true, }; EXPORT_SYMBOL_GPL(init_user_ns); diff --git a/kernel/user_namespace.c b/kernel/user_namespace.c index 8b650837083e..a54f26f82eb2 100644 --- a/kernel/user_namespace.c +++ b/kernel/user_namespace.c @@ -21,6 +21,7 @@ #include <linux/uaccess.h> #include <linux/ctype.h> #include <linux/projid.h> +#include <linux/fs_struct.h> static struct kmem_cache *user_ns_cachep __read_mostly; @@ -60,6 +61,15 @@ int create_user_ns(struct cred *new) kgid_t group = new->egid; int ret; + /* + * Verify that we can not violate the policy of which files + * may be accessed that is specified by the root directory, + * by verifing that the root directory is at the root of the + * mount namespace which allows all files to be accessed. + */ + if (current_chrooted()) + return -EPERM; + /* The creator needs a mapping in the parent user namespace * or else we won't be able to reasonably tell userspace who * created a user_namespace. @@ -86,6 +96,8 @@ int create_user_ns(struct cred *new) set_cred_user_ns(new, ns); + update_mnt_policy(ns); + return 0; } @@ -837,6 +849,9 @@ static int userns_install(struct nsproxy *nsproxy, void *ns) if (atomic_read(¤t->mm->mm_users) > 1) return -EINVAL; + if (current->fs->users != 1) + return -EINVAL; + if (!ns_capable(user_ns, CAP_SYS_ADMIN)) return -EPERM; diff --git a/kernel/workqueue.c b/kernel/workqueue.c index 81f2457811eb..b48cd597145d 100644 --- a/kernel/workqueue.c +++ b/kernel/workqueue.c @@ -457,11 +457,12 @@ static int worker_pool_assign_id(struct worker_pool *pool) int ret; mutex_lock(&worker_pool_idr_mutex); - idr_pre_get(&worker_pool_idr, GFP_KERNEL); - ret = idr_get_new(&worker_pool_idr, pool, &pool->id); + ret = idr_alloc(&worker_pool_idr, pool, 0, 0, GFP_KERNEL); + if (ret >= 0) + pool->id = ret; mutex_unlock(&worker_pool_idr_mutex); - return ret; + return ret < 0 ? ret : 0; } /* @@ -3446,28 +3447,34 @@ static void wq_unbind_fn(struct work_struct *work) spin_unlock_irq(&pool->lock); mutex_unlock(&pool->assoc_mutex); - } - /* - * Call schedule() so that we cross rq->lock and thus can guarantee - * sched callbacks see the %WORKER_UNBOUND flag. This is necessary - * as scheduler callbacks may be invoked from other cpus. - */ - schedule(); + /* + * Call schedule() so that we cross rq->lock and thus can + * guarantee sched callbacks see the %WORKER_UNBOUND flag. + * This is necessary as scheduler callbacks may be invoked + * from other cpus. + */ + schedule(); - /* - * Sched callbacks are disabled now. Zap nr_running. After this, - * nr_running stays zero and need_more_worker() and keep_working() - * are always true as long as the worklist is not empty. Pools on - * @cpu now behave as unbound (in terms of concurrency management) - * pools which are served by workers tied to the CPU. - * - * On return from this function, the current worker would trigger - * unbound chain execution of pending work items if other workers - * didn't already. - */ - for_each_std_worker_pool(pool, cpu) + /* + * Sched callbacks are disabled now. Zap nr_running. + * After this, nr_running stays zero and need_more_worker() + * and keep_working() are always true as long as the + * worklist is not empty. This pool now behaves as an + * unbound (in terms of concurrency management) pool which + * are served by workers tied to the pool. + */ atomic_set(&pool->nr_running, 0); + + /* + * With concurrency management just turned off, a busy + * worker blocking could lead to lengthy stalls. Kick off + * unbound chain execution of currently pending work items. + */ + spin_lock_irq(&pool->lock); + wake_up_worker(pool); + spin_unlock_irq(&pool->lock); + } } /* diff --git a/lib/bust_spinlocks.c b/lib/bust_spinlocks.c index 9681d54b95d1..f8e0e5367398 100644 --- a/lib/bust_spinlocks.c +++ b/lib/bust_spinlocks.c @@ -8,6 +8,7 @@ */ #include <linux/kernel.h> +#include <linux/printk.h> #include <linux/spinlock.h> #include <linux/tty.h> #include <linux/wait.h> @@ -28,5 +29,3 @@ void __attribute__((weak)) bust_spinlocks(int yes) wake_up_klogd(); } } - - diff --git a/lib/dma-debug.c b/lib/dma-debug.c index 5e396accd3d0..d87a17a819d0 100644 --- a/lib/dma-debug.c +++ b/lib/dma-debug.c @@ -862,17 +862,21 @@ static void check_unmap(struct dma_debug_entry *ref) entry = bucket_find_exact(bucket, ref); if (!entry) { + /* must drop lock before calling dma_mapping_error */ + put_hash_bucket(bucket, &flags); + if (dma_mapping_error(ref->dev, ref->dev_addr)) { err_printk(ref->dev, NULL, - "DMA-API: device driver tries " - "to free an invalid DMA memory address\n"); - return; + "DMA-API: device driver tries to free an " + "invalid DMA memory address\n"); + } else { + err_printk(ref->dev, NULL, + "DMA-API: device driver tries to free DMA " + "memory it has not allocated [device " + "address=0x%016llx] [size=%llu bytes]\n", + ref->dev_addr, ref->size); } - err_printk(ref->dev, NULL, "DMA-API: device driver tries " - "to free DMA memory it has not allocated " - "[device address=0x%016llx] [size=%llu bytes]\n", - ref->dev_addr, ref->size); - goto out; + return; } if (ref->size != entry->size) { @@ -936,7 +940,6 @@ static void check_unmap(struct dma_debug_entry *ref) hash_bucket_del(entry); dma_entry_free(entry); -out: put_hash_bucket(bucket, &flags); } @@ -1082,13 +1085,27 @@ void debug_dma_mapping_error(struct device *dev, dma_addr_t dma_addr) ref.dev = dev; ref.dev_addr = dma_addr; bucket = get_hash_bucket(&ref, &flags); - entry = bucket_find_exact(bucket, &ref); - if (!entry) - goto out; + list_for_each_entry(entry, &bucket->list, list) { + if (!exact_match(&ref, entry)) + continue; + + /* + * The same physical address can be mapped multiple + * times. Without a hardware IOMMU this results in the + * same device addresses being put into the dma-debug + * hash multiple times too. This can result in false + * positives being reported. Therefore we implement a + * best-fit algorithm here which updates the first entry + * from the hash which fits the reference value and is + * not currently listed as being checked. + */ + if (entry->map_err_type == MAP_ERR_NOT_CHECKED) { + entry->map_err_type = MAP_ERR_CHECKED; + break; + } + } - entry->map_err_type = MAP_ERR_CHECKED; -out: put_hash_bucket(bucket, &flags); } EXPORT_SYMBOL(debug_dma_mapping_error); diff --git a/lib/idr.c b/lib/idr.c index 00739aaf95a2..322e2816f2fb 100644 --- a/lib/idr.c +++ b/lib/idr.c @@ -106,8 +106,14 @@ static struct idr_layer *idr_layer_alloc(gfp_t gfp_mask, struct idr *layer_idr) if (layer_idr) return get_from_free_list(layer_idr); - /* try to allocate directly from kmem_cache */ - new = kmem_cache_zalloc(idr_layer_cache, gfp_mask); + /* + * Try to allocate directly from kmem_cache. We want to try this + * before preload buffer; otherwise, non-preloading idr_alloc() + * users will end up taking advantage of preloading ones. As the + * following is allowed to fail for preloaded cases, suppress + * warning this time. + */ + new = kmem_cache_zalloc(idr_layer_cache, gfp_mask | __GFP_NOWARN); if (new) return new; @@ -115,18 +121,24 @@ static struct idr_layer *idr_layer_alloc(gfp_t gfp_mask, struct idr *layer_idr) * Try to fetch one from the per-cpu preload buffer if in process * context. See idr_preload() for details. */ - if (in_interrupt()) - return NULL; - - preempt_disable(); - new = __this_cpu_read(idr_preload_head); - if (new) { - __this_cpu_write(idr_preload_head, new->ary[0]); - __this_cpu_dec(idr_preload_cnt); - new->ary[0] = NULL; + if (!in_interrupt()) { + preempt_disable(); + new = __this_cpu_read(idr_preload_head); + if (new) { + __this_cpu_write(idr_preload_head, new->ary[0]); + __this_cpu_dec(idr_preload_cnt); + new->ary[0] = NULL; + } + preempt_enable(); + if (new) + return new; } - preempt_enable(); - return new; + + /* + * Both failed. Try kmem_cache again w/o adding __GFP_NOWARN so + * that memory allocation failure warning is printed as intended. + */ + return kmem_cache_zalloc(idr_layer_cache, gfp_mask); } static void idr_layer_rcu_free(struct rcu_head *head) @@ -184,20 +196,7 @@ static void idr_mark_full(struct idr_layer **pa, int id) } } -/** - * idr_pre_get - reserve resources for idr allocation - * @idp: idr handle - * @gfp_mask: memory allocation flags - * - * This function should be called prior to calling the idr_get_new* functions. - * It preallocates enough memory to satisfy the worst possible allocation. The - * caller should pass in GFP_KERNEL if possible. This of course requires that - * no spinning locks be held. - * - * If the system is REALLY out of memory this function returns %0, - * otherwise %1. - */ -int idr_pre_get(struct idr *idp, gfp_t gfp_mask) +int __idr_pre_get(struct idr *idp, gfp_t gfp_mask) { while (idp->id_free_cnt < MAX_IDR_FREE) { struct idr_layer *new; @@ -208,13 +207,12 @@ int idr_pre_get(struct idr *idp, gfp_t gfp_mask) } return 1; } -EXPORT_SYMBOL(idr_pre_get); +EXPORT_SYMBOL(__idr_pre_get); /** * sub_alloc - try to allocate an id without growing the tree depth * @idp: idr handle * @starting_id: id to start search at - * @id: pointer to the allocated handle * @pa: idr_layer[MAX_IDR_LEVEL] used as backtrack buffer * @gfp_mask: allocation mask for idr_layer_alloc() * @layer_idr: optional idr passed to idr_layer_alloc() @@ -376,25 +374,7 @@ static void idr_fill_slot(struct idr *idr, void *ptr, int id, idr_mark_full(pa, id); } -/** - * idr_get_new_above - allocate new idr entry above or equal to a start id - * @idp: idr handle - * @ptr: pointer you want associated with the id - * @starting_id: id to start search at - * @id: pointer to the allocated handle - * - * This is the allocate id function. It should be called with any - * required locks. - * - * If allocation from IDR's private freelist fails, idr_get_new_above() will - * return %-EAGAIN. The caller should retry the idr_pre_get() call to refill - * IDR's preallocation and then retry the idr_get_new_above() call. - * - * If the idr is full idr_get_new_above() will return %-ENOSPC. - * - * @id returns a value in the range @starting_id ... %0x7fffffff - */ -int idr_get_new_above(struct idr *idp, void *ptr, int starting_id, int *id) +int __idr_get_new_above(struct idr *idp, void *ptr, int starting_id, int *id) { struct idr_layer *pa[MAX_IDR_LEVEL + 1]; int rv; @@ -407,7 +387,7 @@ int idr_get_new_above(struct idr *idp, void *ptr, int starting_id, int *id) *id = rv; return 0; } -EXPORT_SYMBOL(idr_get_new_above); +EXPORT_SYMBOL(__idr_get_new_above); /** * idr_preload - preload for idr_alloc() @@ -908,7 +888,7 @@ static void free_bitmap(struct ida *ida, struct ida_bitmap *bitmap) int ida_pre_get(struct ida *ida, gfp_t gfp_mask) { /* allocate idr_layers */ - if (!idr_pre_get(&ida->idr, gfp_mask)) + if (!__idr_pre_get(&ida->idr, gfp_mask)) return 0; /* allocate free_bitmap */ diff --git a/lib/xz/Kconfig b/lib/xz/Kconfig index 82a04d7ba99e..08837db52d94 100644 --- a/lib/xz/Kconfig +++ b/lib/xz/Kconfig @@ -15,7 +15,7 @@ config XZ_DEC_X86 config XZ_DEC_POWERPC bool "PowerPC BCJ filter decoder" - default y if POWERPC + default y if PPC select XZ_DEC_BCJ config XZ_DEC_IA64 diff --git a/mm/Kconfig b/mm/Kconfig index ae55c1e04d10..3bea74f1ccfe 100644 --- a/mm/Kconfig +++ b/mm/Kconfig @@ -286,8 +286,12 @@ config NR_QUICK default "1" config VIRT_TO_BUS - def_bool y - depends on HAVE_VIRT_TO_BUS + bool + help + An architecture should select this if it implements the + deprecated interface virt_to_bus(). All new architectures + should probably not select this. + config MMU_NOTIFIER bool diff --git a/mm/fremap.c b/mm/fremap.c index 0cd4c11488ed..87da3590c61e 100644 --- a/mm/fremap.c +++ b/mm/fremap.c @@ -129,7 +129,7 @@ SYSCALL_DEFINE5(remap_file_pages, unsigned long, start, unsigned long, size, struct vm_area_struct *vma; int err = -EINVAL; int has_write_lock = 0; - vm_flags_t vm_flags; + vm_flags_t vm_flags = 0; if (prot) return err; @@ -204,10 +204,8 @@ get_write_lock: unsigned long addr; struct file *file = get_file(vma->vm_file); - vm_flags = vma->vm_flags; - if (!(flags & MAP_NONBLOCK)) - vm_flags |= VM_POPULATE; - addr = mmap_region(file, start, size, vm_flags, pgoff); + addr = mmap_region(file, start, size, + vma->vm_flags, pgoff); fput(file); if (IS_ERR_VALUE(addr)) { err = addr; @@ -226,12 +224,6 @@ get_write_lock: mutex_unlock(&mapping->i_mmap_mutex); } - if (!(flags & MAP_NONBLOCK) && !(vma->vm_flags & VM_POPULATE)) { - if (!has_write_lock) - goto get_write_lock; - vma->vm_flags |= VM_POPULATE; - } - if (vma->vm_flags & VM_LOCKED) { /* * drop PG_Mlocked flag for over-mapped range @@ -254,7 +246,8 @@ get_write_lock: */ out: - vm_flags = vma->vm_flags; + if (vma) + vm_flags = vma->vm_flags; if (likely(!has_write_lock)) up_read(&mm->mmap_sem); else diff --git a/mm/hugetlb.c b/mm/hugetlb.c index 0a0be33bb199..ca9a7c6d7e97 100644 --- a/mm/hugetlb.c +++ b/mm/hugetlb.c @@ -2124,8 +2124,12 @@ int hugetlb_report_node_meminfo(int nid, char *buf) /* Return the number pages of memory we physically have, in PAGE_SIZE units. */ unsigned long hugetlb_total_pages(void) { - struct hstate *h = &default_hstate; - return h->nr_huge_pages * pages_per_huge_page(h); + struct hstate *h; + unsigned long nr_total_pages = 0; + + for_each_hstate(h) + nr_total_pages += h->nr_huge_pages * pages_per_huge_page(h); + return nr_total_pages; } static int hugetlb_acct_memory(struct hstate *h, long delta) diff --git a/mm/memory_hotplug.c b/mm/memory_hotplug.c index b81a367b9f39..ee3765760818 100644 --- a/mm/memory_hotplug.c +++ b/mm/memory_hotplug.c @@ -1779,7 +1779,11 @@ void try_offline_node(int nid) for (i = 0; i < MAX_NR_ZONES; i++) { struct zone *zone = pgdat->node_zones + i; - if (zone->wait_table) + /* + * wait_table may be allocated from boot memory, + * here only free if it's allocated by vmalloc. + */ + if (is_vmalloc_addr(zone->wait_table)) vfree(zone->wait_table); } @@ -1801,7 +1805,7 @@ int __ref remove_memory(int nid, u64 start, u64 size) int retry = 1; start_pfn = PFN_DOWN(start); - end_pfn = start_pfn + PFN_DOWN(size); + end_pfn = PFN_UP(start + size - 1); /* * When CONFIG_MEMCG is on, one memory block may be used by other diff --git a/mm/mlock.c b/mm/mlock.c index 1c5e33fce639..79b7cf7d1bca 100644 --- a/mm/mlock.c +++ b/mm/mlock.c @@ -358,7 +358,7 @@ static int do_mlock(unsigned long start, size_t len, int on) newflags = vma->vm_flags & ~VM_LOCKED; if (on) - newflags |= VM_LOCKED | VM_POPULATE; + newflags |= VM_LOCKED; tmp = vma->vm_end; if (tmp > end) @@ -418,8 +418,7 @@ int __mm_populate(unsigned long start, unsigned long len, int ignore_errors) * range with the first VMA. Also, skip undesirable VMA types. */ nend = min(end, vma->vm_end); - if ((vma->vm_flags & (VM_IO | VM_PFNMAP | VM_POPULATE)) != - VM_POPULATE) + if (vma->vm_flags & (VM_IO | VM_PFNMAP)) continue; if (nstart < vma->vm_start) nstart = vma->vm_start; @@ -492,9 +491,9 @@ static int do_mlockall(int flags) struct vm_area_struct * vma, * prev = NULL; if (flags & MCL_FUTURE) - current->mm->def_flags |= VM_LOCKED | VM_POPULATE; + current->mm->def_flags |= VM_LOCKED; else - current->mm->def_flags &= ~(VM_LOCKED | VM_POPULATE); + current->mm->def_flags &= ~VM_LOCKED; if (flags == MCL_FUTURE) goto out; @@ -503,7 +502,7 @@ static int do_mlockall(int flags) newflags = vma->vm_flags & ~VM_LOCKED; if (flags & MCL_CURRENT) - newflags |= VM_LOCKED | VM_POPULATE; + newflags |= VM_LOCKED; /* Ignore errors */ mlock_fixup(vma, &prev, vma->vm_start, vma->vm_end, newflags); diff --git a/mm/mmap.c b/mm/mmap.c index 2664a47cec93..6466699b16cb 100644 --- a/mm/mmap.c +++ b/mm/mmap.c @@ -1306,7 +1306,9 @@ unsigned long do_mmap_pgoff(struct file *file, unsigned long addr, } addr = mmap_region(file, addr, len, vm_flags, pgoff); - if (!IS_ERR_VALUE(addr) && (vm_flags & VM_POPULATE)) + if (!IS_ERR_VALUE(addr) && + ((vm_flags & VM_LOCKED) || + (flags & (MAP_POPULATE | MAP_NONBLOCK)) == MAP_POPULATE)) *populate = len; return addr; } diff --git a/mm/process_vm_access.c b/mm/process_vm_access.c index 926b46649749..fd26d0433509 100644 --- a/mm/process_vm_access.c +++ b/mm/process_vm_access.c @@ -429,12 +429,6 @@ compat_process_vm_rw(compat_pid_t pid, if (flags != 0) return -EINVAL; - if (!access_ok(VERIFY_READ, lvec, liovcnt * sizeof(*lvec))) - goto out; - - if (!access_ok(VERIFY_READ, rvec, riovcnt * sizeof(*rvec))) - goto out; - if (vm_write) rc = compat_rw_copy_check_uvector(WRITE, lvec, liovcnt, UIO_FASTIOV, iovstack_l, @@ -459,8 +453,6 @@ free_iovecs: kfree(iov_r); if (iov_l != iovstack_l) kfree(iov_l); - -out: return rc; } diff --git a/net/8021q/vlan.c b/net/8021q/vlan.c index a18714469bf7..85addcd9372b 100644 --- a/net/8021q/vlan.c +++ b/net/8021q/vlan.c @@ -86,13 +86,6 @@ void unregister_vlan_dev(struct net_device *dev, struct list_head *head) grp = &vlan_info->grp; - /* Take it out of our own structures, but be sure to interlock with - * HW accelerating devices or SW vlan input packet processing if - * VLAN is not 0 (leave it there for 802.1p). - */ - if (vlan_id) - vlan_vid_del(real_dev, vlan_id); - grp->nr_vlan_devs--; if (vlan->flags & VLAN_FLAG_MVRP) @@ -114,6 +107,13 @@ void unregister_vlan_dev(struct net_device *dev, struct list_head *head) vlan_gvrp_uninit_applicant(real_dev); } + /* Take it out of our own structures, but be sure to interlock with + * HW accelerating devices or SW vlan input packet processing if + * VLAN is not 0 (leave it there for 802.1p). + */ + if (vlan_id) + vlan_vid_del(real_dev, vlan_id); + /* Get rid of the vlan's reference to real_dev */ dev_put(real_dev); } diff --git a/net/batman-adv/bat_iv_ogm.c b/net/batman-adv/bat_iv_ogm.c index a0b253ecadaf..a5bb0a769eb9 100644 --- a/net/batman-adv/bat_iv_ogm.c +++ b/net/batman-adv/bat_iv_ogm.c @@ -1288,7 +1288,8 @@ static int batadv_iv_ogm_receive(struct sk_buff *skb, batadv_ogm_packet = (struct batadv_ogm_packet *)packet_buff; /* unpack the aggregated packets and process them one by one */ - do { + while (batadv_iv_ogm_aggr_packet(buff_pos, packet_len, + batadv_ogm_packet->tt_num_changes)) { tt_buff = packet_buff + buff_pos + BATADV_OGM_HLEN; batadv_iv_ogm_process(ethhdr, batadv_ogm_packet, tt_buff, @@ -1299,8 +1300,7 @@ static int batadv_iv_ogm_receive(struct sk_buff *skb, packet_pos = packet_buff + buff_pos; batadv_ogm_packet = (struct batadv_ogm_packet *)packet_pos; - } while (batadv_iv_ogm_aggr_packet(buff_pos, packet_len, - batadv_ogm_packet->tt_num_changes)); + } kfree_skb(skb); return NET_RX_SUCCESS; diff --git a/net/bluetooth/sco.c b/net/bluetooth/sco.c index 79d87d8d4f51..fad0302bdb32 100644 --- a/net/bluetooth/sco.c +++ b/net/bluetooth/sco.c @@ -359,6 +359,7 @@ static void __sco_sock_close(struct sock *sk) sco_chan_del(sk, ECONNRESET); break; + case BT_CONNECT2: case BT_CONNECT: case BT_DISCONN: sco_chan_del(sk, ECONNRESET); diff --git a/net/bridge/br_device.c b/net/bridge/br_device.c index d5f1d3fd4b28..314c73ed418f 100644 --- a/net/bridge/br_device.c +++ b/net/bridge/br_device.c @@ -66,7 +66,7 @@ netdev_tx_t br_dev_xmit(struct sk_buff *skb, struct net_device *dev) goto out; } - mdst = br_mdb_get(br, skb); + mdst = br_mdb_get(br, skb, vid); if (mdst || BR_INPUT_SKB_CB_MROUTERS_ONLY(skb)) br_multicast_deliver(mdst, skb); else diff --git a/net/bridge/br_fdb.c b/net/bridge/br_fdb.c index b0812c91c0f0..bab338e6270d 100644 --- a/net/bridge/br_fdb.c +++ b/net/bridge/br_fdb.c @@ -423,7 +423,7 @@ static int fdb_insert(struct net_bridge *br, struct net_bridge_port *source, return 0; br_warn(br, "adding interface %s with same address " "as a received packet\n", - source->dev->name); + source ? source->dev->name : br->dev->name); fdb_delete(br, fdb); } diff --git a/net/bridge/br_input.c b/net/bridge/br_input.c index 480330151898..828e2bcc1f52 100644 --- a/net/bridge/br_input.c +++ b/net/bridge/br_input.c @@ -97,7 +97,7 @@ int br_handle_frame_finish(struct sk_buff *skb) if (is_broadcast_ether_addr(dest)) skb2 = skb; else if (is_multicast_ether_addr(dest)) { - mdst = br_mdb_get(br, skb); + mdst = br_mdb_get(br, skb, vid); if (mdst || BR_INPUT_SKB_CB_MROUTERS_ONLY(skb)) { if ((mdst && mdst->mglist) || br_multicast_is_router(br)) diff --git a/net/bridge/br_mdb.c b/net/bridge/br_mdb.c index 9f97b850fc65..ee79f3f20383 100644 --- a/net/bridge/br_mdb.c +++ b/net/bridge/br_mdb.c @@ -80,6 +80,7 @@ static int br_mdb_fill_info(struct sk_buff *skb, struct netlink_callback *cb, port = p->port; if (port) { struct br_mdb_entry e; + memset(&e, 0, sizeof(e)); e.ifindex = port->dev->ifindex; e.state = p->state; if (p->addr.proto == htons(ETH_P_IP)) @@ -136,6 +137,7 @@ static int br_mdb_dump(struct sk_buff *skb, struct netlink_callback *cb) break; bpm = nlmsg_data(nlh); + memset(bpm, 0, sizeof(*bpm)); bpm->ifindex = dev->ifindex; if (br_mdb_fill_info(skb, cb, dev) < 0) goto out; @@ -171,6 +173,7 @@ static int nlmsg_populate_mdb_fill(struct sk_buff *skb, return -EMSGSIZE; bpm = nlmsg_data(nlh); + memset(bpm, 0, sizeof(*bpm)); bpm->family = AF_BRIDGE; bpm->ifindex = dev->ifindex; nest = nla_nest_start(skb, MDBA_MDB); @@ -228,6 +231,7 @@ void br_mdb_notify(struct net_device *dev, struct net_bridge_port *port, { struct br_mdb_entry entry; + memset(&entry, 0, sizeof(entry)); entry.ifindex = port->dev->ifindex; entry.addr.proto = group->proto; entry.addr.u.ip4 = group->u.ip4; diff --git a/net/bridge/br_multicast.c b/net/bridge/br_multicast.c index 10e6fce1bb62..923fbeaf7afd 100644 --- a/net/bridge/br_multicast.c +++ b/net/bridge/br_multicast.c @@ -132,7 +132,7 @@ static struct net_bridge_mdb_entry *br_mdb_ip6_get( #endif struct net_bridge_mdb_entry *br_mdb_get(struct net_bridge *br, - struct sk_buff *skb) + struct sk_buff *skb, u16 vid) { struct net_bridge_mdb_htable *mdb = rcu_dereference(br->mdb); struct br_ip ip; @@ -144,6 +144,7 @@ struct net_bridge_mdb_entry *br_mdb_get(struct net_bridge *br, return NULL; ip.proto = skb->protocol; + ip.vid = vid; switch (skb->protocol) { case htons(ETH_P_IP): diff --git a/net/bridge/br_netlink.c b/net/bridge/br_netlink.c index 27aa3ee517ce..299fc5f40a26 100644 --- a/net/bridge/br_netlink.c +++ b/net/bridge/br_netlink.c @@ -29,6 +29,7 @@ static inline size_t br_port_info_size(void) + nla_total_size(1) /* IFLA_BRPORT_MODE */ + nla_total_size(1) /* IFLA_BRPORT_GUARD */ + nla_total_size(1) /* IFLA_BRPORT_PROTECT */ + + nla_total_size(1) /* IFLA_BRPORT_FAST_LEAVE */ + 0; } @@ -329,6 +330,7 @@ static int br_setport(struct net_bridge_port *p, struct nlattr *tb[]) br_set_port_flag(p, tb, IFLA_BRPORT_MODE, BR_HAIRPIN_MODE); br_set_port_flag(p, tb, IFLA_BRPORT_GUARD, BR_BPDU_GUARD); br_set_port_flag(p, tb, IFLA_BRPORT_FAST_LEAVE, BR_MULTICAST_FAST_LEAVE); + br_set_port_flag(p, tb, IFLA_BRPORT_PROTECT, BR_ROOT_BLOCK); if (tb[IFLA_BRPORT_COST]) { err = br_stp_set_path_cost(p, nla_get_u32(tb[IFLA_BRPORT_COST])); diff --git a/net/bridge/br_private.h b/net/bridge/br_private.h index 6d314c4e6bcb..3cbf5beb3d4b 100644 --- a/net/bridge/br_private.h +++ b/net/bridge/br_private.h @@ -442,7 +442,7 @@ extern int br_multicast_rcv(struct net_bridge *br, struct net_bridge_port *port, struct sk_buff *skb); extern struct net_bridge_mdb_entry *br_mdb_get(struct net_bridge *br, - struct sk_buff *skb); + struct sk_buff *skb, u16 vid); extern void br_multicast_add_port(struct net_bridge_port *port); extern void br_multicast_del_port(struct net_bridge_port *port); extern void br_multicast_enable_port(struct net_bridge_port *port); @@ -504,7 +504,7 @@ static inline int br_multicast_rcv(struct net_bridge *br, } static inline struct net_bridge_mdb_entry *br_mdb_get(struct net_bridge *br, - struct sk_buff *skb) + struct sk_buff *skb, u16 vid) { return NULL; } diff --git a/net/ceph/osdmap.c b/net/ceph/osdmap.c index 69bc4bf89e3e..4543b9aba40c 100644 --- a/net/ceph/osdmap.c +++ b/net/ceph/osdmap.c @@ -654,6 +654,24 @@ static int osdmap_set_max_osd(struct ceph_osdmap *map, int max) return 0; } +static int __decode_pgid(void **p, void *end, struct ceph_pg *pg) +{ + u8 v; + + ceph_decode_need(p, end, 1+8+4+4, bad); + v = ceph_decode_8(p); + if (v != 1) + goto bad; + pg->pool = ceph_decode_64(p); + pg->seed = ceph_decode_32(p); + *p += 4; /* skip preferred */ + return 0; + +bad: + dout("error decoding pgid\n"); + return -EINVAL; +} + /* * decode a full map. */ @@ -745,13 +763,12 @@ struct ceph_osdmap *osdmap_decode(void **p, void *end) for (i = 0; i < len; i++) { int n, j; struct ceph_pg pgid; - struct ceph_pg_v1 pgid_v1; struct ceph_pg_mapping *pg; - ceph_decode_need(p, end, sizeof(u32) + sizeof(u64), bad); - ceph_decode_copy(p, &pgid_v1, sizeof(pgid_v1)); - pgid.pool = le32_to_cpu(pgid_v1.pool); - pgid.seed = le16_to_cpu(pgid_v1.ps); + err = __decode_pgid(p, end, &pgid); + if (err) + goto bad; + ceph_decode_need(p, end, sizeof(u32), bad); n = ceph_decode_32(p); err = -EINVAL; if (n > (UINT_MAX - sizeof(*pg)) / sizeof(u32)) @@ -818,8 +835,8 @@ struct ceph_osdmap *osdmap_apply_incremental(void **p, void *end, u16 version; ceph_decode_16_safe(p, end, version, bad); - if (version > 6) { - pr_warning("got unknown v %d > %d of inc osdmap\n", version, 6); + if (version != 6) { + pr_warning("got unknown v %d != 6 of inc osdmap\n", version); goto bad; } @@ -963,15 +980,14 @@ struct ceph_osdmap *osdmap_apply_incremental(void **p, void *end, while (len--) { struct ceph_pg_mapping *pg; int j; - struct ceph_pg_v1 pgid_v1; struct ceph_pg pgid; u32 pglen; - ceph_decode_need(p, end, sizeof(u64) + sizeof(u32), bad); - ceph_decode_copy(p, &pgid_v1, sizeof(pgid_v1)); - pgid.pool = le32_to_cpu(pgid_v1.pool); - pgid.seed = le16_to_cpu(pgid_v1.ps); - pglen = ceph_decode_32(p); + err = __decode_pgid(p, end, &pgid); + if (err) + goto bad; + ceph_decode_need(p, end, sizeof(u32), bad); + pglen = ceph_decode_32(p); if (pglen) { ceph_decode_need(p, end, pglen*sizeof(u32), bad); diff --git a/net/core/dev.c b/net/core/dev.c index a06a7a58dd11..b13e5c766c11 100644 --- a/net/core/dev.c +++ b/net/core/dev.c @@ -1545,7 +1545,6 @@ void net_enable_timestamp(void) return; } #endif - WARN_ON(in_interrupt()); static_key_slow_inc(&netstamp_needed); } EXPORT_SYMBOL(net_enable_timestamp); @@ -2219,9 +2218,9 @@ struct sk_buff *skb_mac_gso_segment(struct sk_buff *skb, struct sk_buff *segs = ERR_PTR(-EPROTONOSUPPORT); struct packet_offload *ptype; __be16 type = skb->protocol; + int vlan_depth = ETH_HLEN; while (type == htons(ETH_P_8021Q)) { - int vlan_depth = ETH_HLEN; struct vlan_hdr *vh; if (unlikely(!pskb_may_pull(skb, vlan_depth + VLAN_HLEN))) @@ -3444,6 +3443,7 @@ ncls: } switch (rx_handler(&skb)) { case RX_HANDLER_CONSUMED: + ret = NET_RX_SUCCESS; goto unlock; case RX_HANDLER_ANOTHER: goto another_round; @@ -4103,7 +4103,7 @@ static void net_rx_action(struct softirq_action *h) * Allow this to run for 2 jiffies since which will allow * an average latency of 1.5/HZ. */ - if (unlikely(budget <= 0 || time_after(jiffies, time_limit))) + if (unlikely(budget <= 0 || time_after_eq(jiffies, time_limit))) goto softnet_break; local_irq_enable(); @@ -4780,7 +4780,7 @@ EXPORT_SYMBOL(dev_set_mac_address); /** * dev_change_carrier - Change device carrier * @dev: device - * @new_carries: new value + * @new_carrier: new value * * Change device carrier */ diff --git a/net/core/flow_dissector.c b/net/core/flow_dissector.c index 9d4c7201400d..e187bf06d673 100644 --- a/net/core/flow_dissector.c +++ b/net/core/flow_dissector.c @@ -140,6 +140,8 @@ ipv6: flow->ports = *ports; } + flow->thoff = (u16) nhoff; + return true; } EXPORT_SYMBOL(skb_flow_dissect); diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c index b376410ff259..5fb8d7e47294 100644 --- a/net/core/rtnetlink.c +++ b/net/core/rtnetlink.c @@ -979,6 +979,7 @@ static int rtnl_fill_ifinfo(struct sk_buff *skb, struct net_device *dev, * report anything. */ ivi.spoofchk = -1; + memset(ivi.mac, 0, sizeof(ivi.mac)); if (dev->netdev_ops->ndo_get_vf_config(dev, i, &ivi)) break; vf_mac.vf = @@ -2620,7 +2621,7 @@ static int rtnetlink_rcv_msg(struct sk_buff *skb, struct nlmsghdr *nlh) struct rtattr *attr = (void *)nlh + NLMSG_ALIGN(min_len); while (RTA_OK(attr, attrlen)) { - unsigned int flavor = attr->rta_type; + unsigned int flavor = attr->rta_type & NLA_TYPE_MASK; if (flavor) { if (flavor > rta_max[sz_idx]) return -EINVAL; diff --git a/net/core/scm.c b/net/core/scm.c index 905dcc6ad1e3..2dc6cdaaae8a 100644 --- a/net/core/scm.c +++ b/net/core/scm.c @@ -24,6 +24,7 @@ #include <linux/interrupt.h> #include <linux/netdevice.h> #include <linux/security.h> +#include <linux/pid_namespace.h> #include <linux/pid.h> #include <linux/nsproxy.h> #include <linux/slab.h> @@ -52,7 +53,8 @@ static __inline__ int scm_check_creds(struct ucred *creds) if (!uid_valid(uid) || !gid_valid(gid)) return -EINVAL; - if ((creds->pid == task_tgid_vnr(current) || nsown_capable(CAP_SYS_ADMIN)) && + if ((creds->pid == task_tgid_vnr(current) || + ns_capable(current->nsproxy->pid_ns->user_ns, CAP_SYS_ADMIN)) && ((uid_eq(uid, cred->uid) || uid_eq(uid, cred->euid) || uid_eq(uid, cred->suid)) || nsown_capable(CAP_SETUID)) && ((gid_eq(gid, cred->gid) || gid_eq(gid, cred->egid) || diff --git a/net/dcb/dcbnl.c b/net/dcb/dcbnl.c index 1b588e23cf80..21291f1abcd6 100644 --- a/net/dcb/dcbnl.c +++ b/net/dcb/dcbnl.c @@ -284,6 +284,7 @@ static int dcbnl_getperm_hwaddr(struct net_device *netdev, struct nlmsghdr *nlh, if (!netdev->dcbnl_ops->getpermhwaddr) return -EOPNOTSUPP; + memset(perm_addr, 0, sizeof(perm_addr)); netdev->dcbnl_ops->getpermhwaddr(netdev, perm_addr); return nla_put(skb, DCB_ATTR_PERM_HWADDR, sizeof(perm_addr), perm_addr); @@ -1042,6 +1043,7 @@ static int dcbnl_ieee_fill(struct sk_buff *skb, struct net_device *netdev) if (ops->ieee_getets) { struct ieee_ets ets; + memset(&ets, 0, sizeof(ets)); err = ops->ieee_getets(netdev, &ets); if (!err && nla_put(skb, DCB_ATTR_IEEE_ETS, sizeof(ets), &ets)) @@ -1050,6 +1052,7 @@ static int dcbnl_ieee_fill(struct sk_buff *skb, struct net_device *netdev) if (ops->ieee_getmaxrate) { struct ieee_maxrate maxrate; + memset(&maxrate, 0, sizeof(maxrate)); err = ops->ieee_getmaxrate(netdev, &maxrate); if (!err) { err = nla_put(skb, DCB_ATTR_IEEE_MAXRATE, @@ -1061,6 +1064,7 @@ static int dcbnl_ieee_fill(struct sk_buff *skb, struct net_device *netdev) if (ops->ieee_getpfc) { struct ieee_pfc pfc; + memset(&pfc, 0, sizeof(pfc)); err = ops->ieee_getpfc(netdev, &pfc); if (!err && nla_put(skb, DCB_ATTR_IEEE_PFC, sizeof(pfc), &pfc)) @@ -1094,6 +1098,7 @@ static int dcbnl_ieee_fill(struct sk_buff *skb, struct net_device *netdev) /* get peer info if available */ if (ops->ieee_peer_getets) { struct ieee_ets ets; + memset(&ets, 0, sizeof(ets)); err = ops->ieee_peer_getets(netdev, &ets); if (!err && nla_put(skb, DCB_ATTR_IEEE_PEER_ETS, sizeof(ets), &ets)) @@ -1102,6 +1107,7 @@ static int dcbnl_ieee_fill(struct sk_buff *skb, struct net_device *netdev) if (ops->ieee_peer_getpfc) { struct ieee_pfc pfc; + memset(&pfc, 0, sizeof(pfc)); err = ops->ieee_peer_getpfc(netdev, &pfc); if (!err && nla_put(skb, DCB_ATTR_IEEE_PEER_PFC, sizeof(pfc), &pfc)) @@ -1280,6 +1286,7 @@ static int dcbnl_cee_fill(struct sk_buff *skb, struct net_device *netdev) /* peer info if available */ if (ops->cee_peer_getpg) { struct cee_pg pg; + memset(&pg, 0, sizeof(pg)); err = ops->cee_peer_getpg(netdev, &pg); if (!err && nla_put(skb, DCB_ATTR_CEE_PEER_PG, sizeof(pg), &pg)) @@ -1288,6 +1295,7 @@ static int dcbnl_cee_fill(struct sk_buff *skb, struct net_device *netdev) if (ops->cee_peer_getpfc) { struct cee_pfc pfc; + memset(&pfc, 0, sizeof(pfc)); err = ops->cee_peer_getpfc(netdev, &pfc); if (!err && nla_put(skb, DCB_ATTR_CEE_PEER_PFC, sizeof(pfc), &pfc)) diff --git a/net/ieee802154/6lowpan.h b/net/ieee802154/6lowpan.h index 8c2251fb0a3f..bba5f8336317 100644 --- a/net/ieee802154/6lowpan.h +++ b/net/ieee802154/6lowpan.h @@ -84,7 +84,7 @@ (memcmp(addr1, addr2, length >> 3) == 0) /* local link, i.e. FE80::/10 */ -#define is_addr_link_local(a) (((a)->s6_addr16[0]) == 0x80FE) +#define is_addr_link_local(a) (((a)->s6_addr16[0]) == htons(0xFE80)) /* * check whether we can compress the IID to 16 bits, diff --git a/net/ipv4/af_inet.c b/net/ipv4/af_inet.c index 68f6a94f7661..c929d9c1c4b6 100644 --- a/net/ipv4/af_inet.c +++ b/net/ipv4/af_inet.c @@ -1333,8 +1333,7 @@ static struct sk_buff *inet_gso_segment(struct sk_buff *skb, iph->frag_off |= htons(IP_MF); offset += (skb->len - skb->mac_len - iph->ihl * 4); } else { - if (!(iph->frag_off & htons(IP_DF))) - iph->id = htons(id++); + iph->id = htons(id++); } iph->tot_len = htons(skb->len - skb->mac_len); iph->check = 0; diff --git a/net/ipv4/inet_connection_sock.c b/net/ipv4/inet_connection_sock.c index 7d1874be1df3..786d97aee751 100644 --- a/net/ipv4/inet_connection_sock.c +++ b/net/ipv4/inet_connection_sock.c @@ -735,6 +735,7 @@ EXPORT_SYMBOL(inet_csk_destroy_sock); * tcp/dccp_create_openreq_child(). */ void inet_csk_prepare_forced_close(struct sock *sk) + __releases(&sk->sk_lock.slock) { /* sk_clone_lock locked the socket and set refcnt to 2 */ bh_unlock_sock(sk); diff --git a/net/ipv4/inet_fragment.c b/net/ipv4/inet_fragment.c index 245ae078a07f..f4fd23de9b13 100644 --- a/net/ipv4/inet_fragment.c +++ b/net/ipv4/inet_fragment.c @@ -21,6 +21,7 @@ #include <linux/rtnetlink.h> #include <linux/slab.h> +#include <net/sock.h> #include <net/inet_frag.h> static void inet_frag_secret_rebuild(unsigned long dummy) @@ -277,6 +278,7 @@ struct inet_frag_queue *inet_frag_find(struct netns_frags *nf, __releases(&f->lock) { struct inet_frag_queue *q; + int depth = 0; hlist_for_each_entry(q, &f->hash[hash], list) { if (q->net == nf && f->match(q, key)) { @@ -284,9 +286,25 @@ struct inet_frag_queue *inet_frag_find(struct netns_frags *nf, read_unlock(&f->lock); return q; } + depth++; } read_unlock(&f->lock); - return inet_frag_create(nf, f, key); + if (depth <= INETFRAGS_MAXDEPTH) + return inet_frag_create(nf, f, key); + else + return ERR_PTR(-ENOBUFS); } EXPORT_SYMBOL(inet_frag_find); + +void inet_frag_maybe_warn_overflow(struct inet_frag_queue *q, + const char *prefix) +{ + static const char msg[] = "inet_frag_find: Fragment hash bucket" + " list length grew over limit " __stringify(INETFRAGS_MAXDEPTH) + ". Dropping fragment.\n"; + + if (PTR_ERR(q) == -ENOBUFS) + LIMIT_NETDEBUG(KERN_WARNING "%s%s", prefix, msg); +} +EXPORT_SYMBOL(inet_frag_maybe_warn_overflow); diff --git a/net/ipv4/ip_fragment.c b/net/ipv4/ip_fragment.c index b6d30acb600c..a6445b843ef4 100644 --- a/net/ipv4/ip_fragment.c +++ b/net/ipv4/ip_fragment.c @@ -292,14 +292,11 @@ static inline struct ipq *ip_find(struct net *net, struct iphdr *iph, u32 user) hash = ipqhashfn(iph->id, iph->saddr, iph->daddr, iph->protocol); q = inet_frag_find(&net->ipv4.frags, &ip4_frags, &arg, hash); - if (q == NULL) - goto out_nomem; - + if (IS_ERR_OR_NULL(q)) { + inet_frag_maybe_warn_overflow(q, pr_fmt()); + return NULL; + } return container_of(q, struct ipq, q); - -out_nomem: - LIMIT_NETDEBUG(KERN_ERR pr_fmt("ip_frag_create: no memory left !\n")); - return NULL; } /* Is the fragment too far ahead to be part of ipq? */ diff --git a/net/ipv4/ip_gre.c b/net/ipv4/ip_gre.c index d0ef0e674ec5..91d66dbde9c0 100644 --- a/net/ipv4/ip_gre.c +++ b/net/ipv4/ip_gre.c @@ -798,10 +798,7 @@ static netdev_tx_t ipgre_tunnel_xmit(struct sk_buff *skb, struct net_device *dev if (dev->header_ops && dev->type == ARPHRD_IPGRE) { gre_hlen = 0; - if (skb->protocol == htons(ETH_P_IP)) - tiph = (const struct iphdr *)skb->data; - else - tiph = &tunnel->parms.iph; + tiph = (const struct iphdr *)skb->data; } else { gre_hlen = tunnel->hlen; tiph = &tunnel->parms.iph; diff --git a/net/ipv4/ip_options.c b/net/ipv4/ip_options.c index f6289bf6f332..ec7264514a82 100644 --- a/net/ipv4/ip_options.c +++ b/net/ipv4/ip_options.c @@ -370,7 +370,6 @@ int ip_options_compile(struct net *net, } switch (optptr[3]&0xF) { case IPOPT_TS_TSONLY: - opt->ts = optptr - iph; if (skb) timeptr = &optptr[optptr[2]-1]; opt->ts_needtime = 1; @@ -381,7 +380,6 @@ int ip_options_compile(struct net *net, pp_ptr = optptr + 2; goto error; } - opt->ts = optptr - iph; if (rt) { spec_dst_fill(&spec_dst, skb); memcpy(&optptr[optptr[2]-1], &spec_dst, 4); @@ -396,7 +394,6 @@ int ip_options_compile(struct net *net, pp_ptr = optptr + 2; goto error; } - opt->ts = optptr - iph; { __be32 addr; memcpy(&addr, &optptr[optptr[2]-1], 4); @@ -423,18 +420,18 @@ int ip_options_compile(struct net *net, put_unaligned_be32(midtime, timeptr); opt->is_changed = 1; } - } else { + } else if ((optptr[3]&0xF) != IPOPT_TS_PRESPEC) { unsigned int overflow = optptr[3]>>4; if (overflow == 15) { pp_ptr = optptr + 3; goto error; } - opt->ts = optptr - iph; if (skb) { optptr[3] = (optptr[3]&0xF)|((overflow+1)<<4); opt->is_changed = 1; } } + opt->ts = optptr - iph; break; case IPOPT_RA: if (optlen < 4) { diff --git a/net/ipv4/ipconfig.c b/net/ipv4/ipconfig.c index 98cbc6877019..bf6c5cf31aed 100644 --- a/net/ipv4/ipconfig.c +++ b/net/ipv4/ipconfig.c @@ -1522,7 +1522,8 @@ static int __init ip_auto_config(void) } for (i++; i < CONF_NAMESERVERS_MAX; i++) if (ic_nameservers[i] != NONE) - pr_cont(", nameserver%u=%pI4\n", i, &ic_nameservers[i]); + pr_cont(", nameserver%u=%pI4", i, &ic_nameservers[i]); + pr_cont("\n"); #endif /* !SILENT */ return 0; diff --git a/net/ipv4/netfilter/Kconfig b/net/ipv4/netfilter/Kconfig index ce2d43e1f09f..0d755c50994b 100644 --- a/net/ipv4/netfilter/Kconfig +++ b/net/ipv4/netfilter/Kconfig @@ -36,19 +36,6 @@ config NF_CONNTRACK_PROC_COMPAT If unsure, say Y. -config IP_NF_QUEUE - tristate "IP Userspace queueing via NETLINK (OBSOLETE)" - depends on NETFILTER_ADVANCED - help - Netfilter has the ability to queue packets to user space: the - netlink device can be used to access them using this driver. - - This option enables the old IPv4-only "ip_queue" implementation - which has been obsoleted by the new "nfnetlink_queue" code (see - CONFIG_NETFILTER_NETLINK_QUEUE). - - To compile it as a module, choose M here. If unsure, say N. - config IP_NF_IPTABLES tristate "IP tables support (required for filtering/masq/NAT)" default m if NETFILTER_ADVANCED=n diff --git a/net/ipv4/tcp.c b/net/ipv4/tcp.c index 47e854fcae24..e22020790709 100644 --- a/net/ipv4/tcp.c +++ b/net/ipv4/tcp.c @@ -775,7 +775,7 @@ struct sk_buff *sk_stream_alloc_skb(struct sock *sk, int size, gfp_t gfp) * Make sure that we have exactly size bytes * available to the caller, no more, no less. */ - skb->avail_size = size; + skb->reserved_tailroom = skb->end - skb->tail - size; return skb; } __kfree_skb(skb); diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c index 0d9bdacce99f..3bd55bad230a 100644 --- a/net/ipv4/tcp_input.c +++ b/net/ipv4/tcp_input.c @@ -2059,11 +2059,8 @@ void tcp_enter_loss(struct sock *sk, int how) if (tcp_is_reno(tp)) tcp_reset_reno_sack(tp); - if (!how) { - /* Push undo marker, if it was plain RTO and nothing - * was retransmitted. */ - tp->undo_marker = tp->snd_una; - } else { + tp->undo_marker = tp->snd_una; + if (how) { tp->sacked_out = 0; tp->fackets_out = 0; } diff --git a/net/ipv4/tcp_ipv4.c b/net/ipv4/tcp_ipv4.c index 4a8ec457310f..d09203c63264 100644 --- a/net/ipv4/tcp_ipv4.c +++ b/net/ipv4/tcp_ipv4.c @@ -274,13 +274,6 @@ static void tcp_v4_mtu_reduced(struct sock *sk) struct inet_sock *inet = inet_sk(sk); u32 mtu = tcp_sk(sk)->mtu_info; - /* We are not interested in TCP_LISTEN and open_requests (SYN-ACKs - * send out by Linux are always <576bytes so they should go through - * unfragmented). - */ - if (sk->sk_state == TCP_LISTEN) - return; - dst = inet_csk_update_pmtu(sk, mtu); if (!dst) return; @@ -408,6 +401,13 @@ void tcp_v4_err(struct sk_buff *icmp_skb, u32 info) goto out; if (code == ICMP_FRAG_NEEDED) { /* PMTU discovery (RFC1191) */ + /* We are not interested in TCP_LISTEN and open_requests + * (SYN-ACKs send out by Linux are always <576bytes so + * they should go through unfragmented). + */ + if (sk->sk_state == TCP_LISTEN) + goto out; + tp->mtu_info = info; if (!sock_owned_by_user(sk)) { tcp_v4_mtu_reduced(sk); diff --git a/net/ipv4/tcp_output.c b/net/ipv4/tcp_output.c index e2b4461074da..5d0b4387cba6 100644 --- a/net/ipv4/tcp_output.c +++ b/net/ipv4/tcp_output.c @@ -1298,7 +1298,6 @@ static void __pskb_trim_head(struct sk_buff *skb, int len) eat = min_t(int, len, skb_headlen(skb)); if (eat) { __skb_pull(skb, eat); - skb->avail_size -= eat; len -= eat; if (!len) return; @@ -1810,8 +1809,11 @@ static bool tcp_tso_should_defer(struct sock *sk, struct sk_buff *skb) goto send_now; } - /* Ok, it looks like it is advisable to defer. */ - tp->tso_deferred = 1 | (jiffies << 1); + /* Ok, it looks like it is advisable to defer. + * Do not rearm the timer if already set to not break TCP ACK clocking. + */ + if (!tp->tso_deferred) + tp->tso_deferred = 1 | (jiffies << 1); return true; diff --git a/net/ipv4/udp.c b/net/ipv4/udp.c index 265c42cf963c..0a073a263720 100644 --- a/net/ipv4/udp.c +++ b/net/ipv4/udp.c @@ -1762,9 +1762,16 @@ int udp_rcv(struct sk_buff *skb) void udp_destroy_sock(struct sock *sk) { + struct udp_sock *up = udp_sk(sk); bool slow = lock_sock_fast(sk); udp_flush_pending_frames(sk); unlock_sock_fast(sk, slow); + if (static_key_false(&udp_encap_needed) && up->encap_type) { + void (*encap_destroy)(struct sock *sk); + encap_destroy = ACCESS_ONCE(up->encap_destroy); + if (encap_destroy) + encap_destroy(sk); + } } /* diff --git a/net/ipv6/addrconf.c b/net/ipv6/addrconf.c index f2c7e615f902..26512250e095 100644 --- a/net/ipv6/addrconf.c +++ b/net/ipv6/addrconf.c @@ -4784,26 +4784,20 @@ static void addrconf_sysctl_unregister(struct inet6_dev *idev) static int __net_init addrconf_init_net(struct net *net) { - int err; + int err = -ENOMEM; struct ipv6_devconf *all, *dflt; - err = -ENOMEM; - all = &ipv6_devconf; - dflt = &ipv6_devconf_dflt; + all = kmemdup(&ipv6_devconf, sizeof(ipv6_devconf), GFP_KERNEL); + if (all == NULL) + goto err_alloc_all; - if (!net_eq(net, &init_net)) { - all = kmemdup(all, sizeof(ipv6_devconf), GFP_KERNEL); - if (all == NULL) - goto err_alloc_all; + dflt = kmemdup(&ipv6_devconf_dflt, sizeof(ipv6_devconf_dflt), GFP_KERNEL); + if (dflt == NULL) + goto err_alloc_dflt; - dflt = kmemdup(dflt, sizeof(ipv6_devconf_dflt), GFP_KERNEL); - if (dflt == NULL) - goto err_alloc_dflt; - } else { - /* these will be inherited by all namespaces */ - dflt->autoconf = ipv6_defaults.autoconf; - dflt->disable_ipv6 = ipv6_defaults.disable_ipv6; - } + /* these will be inherited by all namespaces */ + dflt->autoconf = ipv6_defaults.autoconf; + dflt->disable_ipv6 = ipv6_defaults.disable_ipv6; net->ipv6.devconf_all = all; net->ipv6.devconf_dflt = dflt; diff --git a/net/ipv6/ip6_input.c b/net/ipv6/ip6_input.c index b1876e52091e..e33fe0ab2568 100644 --- a/net/ipv6/ip6_input.c +++ b/net/ipv6/ip6_input.c @@ -281,7 +281,8 @@ int ip6_mc_input(struct sk_buff *skb) * IPv6 multicast router mode is now supported ;) */ if (dev_net(skb->dev)->ipv6.devconf_all->mc_forwarding && - !(ipv6_addr_type(&hdr->daddr) & IPV6_ADDR_LINKLOCAL) && + !(ipv6_addr_type(&hdr->daddr) & + (IPV6_ADDR_LOOPBACK|IPV6_ADDR_LINKLOCAL)) && likely(!(IP6CB(skb)->flags & IP6SKB_FORWARDED))) { /* * Okay, we try to forward - split and duplicate diff --git a/net/ipv6/netfilter/ip6t_NPT.c b/net/ipv6/netfilter/ip6t_NPT.c index 83acc1405a18..33608c610276 100644 --- a/net/ipv6/netfilter/ip6t_NPT.c +++ b/net/ipv6/netfilter/ip6t_NPT.c @@ -114,6 +114,7 @@ ip6t_dnpt_tg(struct sk_buff *skb, const struct xt_action_param *par) static struct xt_target ip6t_npt_target_reg[] __read_mostly = { { .name = "SNPT", + .table = "mangle", .target = ip6t_snpt_tg, .targetsize = sizeof(struct ip6t_npt_tginfo), .checkentry = ip6t_npt_checkentry, @@ -124,6 +125,7 @@ static struct xt_target ip6t_npt_target_reg[] __read_mostly = { }, { .name = "DNPT", + .table = "mangle", .target = ip6t_dnpt_tg, .targetsize = sizeof(struct ip6t_npt_tginfo), .checkentry = ip6t_npt_checkentry, diff --git a/net/ipv6/netfilter/nf_conntrack_reasm.c b/net/ipv6/netfilter/nf_conntrack_reasm.c index 54087e96d7b8..6700069949dd 100644 --- a/net/ipv6/netfilter/nf_conntrack_reasm.c +++ b/net/ipv6/netfilter/nf_conntrack_reasm.c @@ -14,6 +14,8 @@ * 2 of the License, or (at your option) any later version. */ +#define pr_fmt(fmt) "IPv6-nf: " fmt + #include <linux/errno.h> #include <linux/types.h> #include <linux/string.h> @@ -180,13 +182,11 @@ static inline struct frag_queue *fq_find(struct net *net, __be32 id, q = inet_frag_find(&net->nf_frag.frags, &nf_frags, &arg, hash); local_bh_enable(); - if (q == NULL) - goto oom; - + if (IS_ERR_OR_NULL(q)) { + inet_frag_maybe_warn_overflow(q, pr_fmt()); + return NULL; + } return container_of(q, struct frag_queue, q); - -oom: - return NULL; } diff --git a/net/ipv6/reassembly.c b/net/ipv6/reassembly.c index 3c6a77290c6e..196ab9347ad1 100644 --- a/net/ipv6/reassembly.c +++ b/net/ipv6/reassembly.c @@ -26,6 +26,9 @@ * YOSHIFUJI,H. @USAGI Always remove fragment header to * calculate ICV correctly. */ + +#define pr_fmt(fmt) "IPv6: " fmt + #include <linux/errno.h> #include <linux/types.h> #include <linux/string.h> @@ -185,9 +188,10 @@ fq_find(struct net *net, __be32 id, const struct in6_addr *src, const struct in6 hash = inet6_hash_frag(id, src, dst, ip6_frags.rnd); q = inet_frag_find(&net->ipv6.frags, &ip6_frags, &arg, hash); - if (q == NULL) + if (IS_ERR_OR_NULL(q)) { + inet_frag_maybe_warn_overflow(q, pr_fmt()); return NULL; - + } return container_of(q, struct frag_queue, q); } diff --git a/net/ipv6/tcp_ipv6.c b/net/ipv6/tcp_ipv6.c index 9b6460055df5..f6d629fd6aee 100644 --- a/net/ipv6/tcp_ipv6.c +++ b/net/ipv6/tcp_ipv6.c @@ -389,6 +389,13 @@ static void tcp_v6_err(struct sk_buff *skb, struct inet6_skb_parm *opt, } if (type == ICMPV6_PKT_TOOBIG) { + /* We are not interested in TCP_LISTEN and open_requests + * (SYN-ACKs send out by Linux are always <576bytes so + * they should go through unfragmented). + */ + if (sk->sk_state == TCP_LISTEN) + goto out; + tp->mtu_info = ntohl(info); if (!sock_owned_by_user(sk)) tcp_v6_mtu_reduced(sk); diff --git a/net/ipv6/udp.c b/net/ipv6/udp.c index 599e1ba6d1ce..d8e5e852fc7a 100644 --- a/net/ipv6/udp.c +++ b/net/ipv6/udp.c @@ -1285,10 +1285,18 @@ do_confirm: void udpv6_destroy_sock(struct sock *sk) { + struct udp_sock *up = udp_sk(sk); lock_sock(sk); udp_v6_flush_pending_frames(sk); release_sock(sk); + if (static_key_false(&udpv6_encap_needed) && up->encap_type) { + void (*encap_destroy)(struct sock *sk); + encap_destroy = ACCESS_ONCE(up->encap_destroy); + if (encap_destroy) + encap_destroy(sk); + } + inet6_destroy_sock(sk); } diff --git a/net/irda/af_irda.c b/net/irda/af_irda.c index d07e3a626446..d28e7f014cc6 100644 --- a/net/irda/af_irda.c +++ b/net/irda/af_irda.c @@ -2583,8 +2583,10 @@ bed: NULL, NULL, NULL); /* Check if the we got some results */ - if (!self->cachedaddr) - return -EAGAIN; /* Didn't find any devices */ + if (!self->cachedaddr) { + err = -EAGAIN; /* Didn't find any devices */ + goto out; + } daddr = self->cachedaddr; /* Cleanup */ self->cachedaddr = 0; diff --git a/net/irda/ircomm/ircomm_tty.c b/net/irda/ircomm/ircomm_tty.c index 9a5fd3c3e530..362ba47968e4 100644 --- a/net/irda/ircomm/ircomm_tty.c +++ b/net/irda/ircomm/ircomm_tty.c @@ -280,7 +280,7 @@ static int ircomm_tty_block_til_ready(struct ircomm_tty_cb *self, struct tty_port *port = &self->port; DECLARE_WAITQUEUE(wait, current); int retval; - int do_clocal = 0, extra_count = 0; + int do_clocal = 0; unsigned long flags; IRDA_DEBUG(2, "%s()\n", __func__ ); @@ -289,8 +289,15 @@ static int ircomm_tty_block_til_ready(struct ircomm_tty_cb *self, * If non-blocking mode is set, or the port is not enabled, * then make the check up front and then exit. */ - if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){ - /* nonblock mode is set or port is not enabled */ + if (test_bit(TTY_IO_ERROR, &tty->flags)) { + port->flags |= ASYNC_NORMAL_ACTIVE; + return 0; + } + + if (filp->f_flags & O_NONBLOCK) { + /* nonblock mode is set */ + if (tty->termios.c_cflag & CBAUD) + tty_port_raise_dtr_rts(port); port->flags |= ASYNC_NORMAL_ACTIVE; IRDA_DEBUG(1, "%s(), O_NONBLOCK requested!\n", __func__ ); return 0; @@ -315,18 +322,16 @@ static int ircomm_tty_block_til_ready(struct ircomm_tty_cb *self, __FILE__, __LINE__, tty->driver->name, port->count); spin_lock_irqsave(&port->lock, flags); - if (!tty_hung_up_p(filp)) { - extra_count = 1; + if (!tty_hung_up_p(filp)) port->count--; - } - spin_unlock_irqrestore(&port->lock, flags); port->blocked_open++; + spin_unlock_irqrestore(&port->lock, flags); while (1) { if (tty->termios.c_cflag & CBAUD) tty_port_raise_dtr_rts(port); - current->state = TASK_INTERRUPTIBLE; + set_current_state(TASK_INTERRUPTIBLE); if (tty_hung_up_p(filp) || !test_bit(ASYNCB_INITIALIZED, &port->flags)) { @@ -361,13 +366,11 @@ static int ircomm_tty_block_til_ready(struct ircomm_tty_cb *self, __set_current_state(TASK_RUNNING); remove_wait_queue(&port->open_wait, &wait); - if (extra_count) { - /* ++ is not atomic, so this should be protected - Jean II */ - spin_lock_irqsave(&port->lock, flags); + spin_lock_irqsave(&port->lock, flags); + if (!tty_hung_up_p(filp)) port->count++; - spin_unlock_irqrestore(&port->lock, flags); - } port->blocked_open--; + spin_unlock_irqrestore(&port->lock, flags); IRDA_DEBUG(1, "%s(%d):block_til_ready after blocking on %s open_count=%d\n", __FILE__, __LINE__, tty->driver->name, port->count); diff --git a/net/key/af_key.c b/net/key/af_key.c index 556fdafdd1ea..8555f331ea60 100644 --- a/net/key/af_key.c +++ b/net/key/af_key.c @@ -2201,7 +2201,7 @@ static int pfkey_spdadd(struct sock *sk, struct sk_buff *skb, const struct sadb_ XFRM_POLICY_BLOCK : XFRM_POLICY_ALLOW); xp->priority = pol->sadb_x_policy_priority; - sa = ext_hdrs[SADB_EXT_ADDRESS_SRC-1], + sa = ext_hdrs[SADB_EXT_ADDRESS_SRC-1]; xp->family = pfkey_sadb_addr2xfrm_addr(sa, &xp->selector.saddr); if (!xp->family) { err = -EINVAL; @@ -2214,7 +2214,7 @@ static int pfkey_spdadd(struct sock *sk, struct sk_buff *skb, const struct sadb_ if (xp->selector.sport) xp->selector.sport_mask = htons(0xffff); - sa = ext_hdrs[SADB_EXT_ADDRESS_DST-1], + sa = ext_hdrs[SADB_EXT_ADDRESS_DST-1]; pfkey_sadb_addr2xfrm_addr(sa, &xp->selector.daddr); xp->selector.prefixlen_d = sa->sadb_address_prefixlen; @@ -2315,7 +2315,7 @@ static int pfkey_spddelete(struct sock *sk, struct sk_buff *skb, const struct sa memset(&sel, 0, sizeof(sel)); - sa = ext_hdrs[SADB_EXT_ADDRESS_SRC-1], + sa = ext_hdrs[SADB_EXT_ADDRESS_SRC-1]; sel.family = pfkey_sadb_addr2xfrm_addr(sa, &sel.saddr); sel.prefixlen_s = sa->sadb_address_prefixlen; sel.proto = pfkey_proto_to_xfrm(sa->sadb_address_proto); @@ -2323,7 +2323,7 @@ static int pfkey_spddelete(struct sock *sk, struct sk_buff *skb, const struct sa if (sel.sport) sel.sport_mask = htons(0xffff); - sa = ext_hdrs[SADB_EXT_ADDRESS_DST-1], + sa = ext_hdrs[SADB_EXT_ADDRESS_DST-1]; pfkey_sadb_addr2xfrm_addr(sa, &sel.daddr); sel.prefixlen_d = sa->sadb_address_prefixlen; sel.proto = pfkey_proto_to_xfrm(sa->sadb_address_proto); diff --git a/net/l2tp/l2tp_core.c b/net/l2tp/l2tp_core.c index d36875f3427e..8aecf5df6656 100644 --- a/net/l2tp/l2tp_core.c +++ b/net/l2tp/l2tp_core.c @@ -114,7 +114,6 @@ struct l2tp_net { static void l2tp_session_set_header_len(struct l2tp_session *session, int version); static void l2tp_tunnel_free(struct l2tp_tunnel *tunnel); -static void l2tp_tunnel_closeall(struct l2tp_tunnel *tunnel); static inline struct l2tp_net *l2tp_pernet(struct net *net) { @@ -192,6 +191,7 @@ struct sock *l2tp_tunnel_sock_lookup(struct l2tp_tunnel *tunnel) } else { /* Socket is owned by kernelspace */ sk = tunnel->sock; + sock_hold(sk); } out: @@ -210,6 +210,7 @@ void l2tp_tunnel_sock_put(struct sock *sk) } sock_put(sk); } + sock_put(sk); } EXPORT_SYMBOL_GPL(l2tp_tunnel_sock_put); @@ -373,10 +374,8 @@ static void l2tp_recv_queue_skb(struct l2tp_session *session, struct sk_buff *sk struct sk_buff *skbp; struct sk_buff *tmp; u32 ns = L2TP_SKB_CB(skb)->ns; - struct l2tp_stats *sstats; spin_lock_bh(&session->reorder_q.lock); - sstats = &session->stats; skb_queue_walk_safe(&session->reorder_q, skbp, tmp) { if (L2TP_SKB_CB(skbp)->ns > ns) { __skb_queue_before(&session->reorder_q, skbp, skb); @@ -384,9 +383,7 @@ static void l2tp_recv_queue_skb(struct l2tp_session *session, struct sk_buff *sk "%s: pkt %hu, inserted before %hu, reorder_q len=%d\n", session->name, ns, L2TP_SKB_CB(skbp)->ns, skb_queue_len(&session->reorder_q)); - u64_stats_update_begin(&sstats->syncp); - sstats->rx_oos_packets++; - u64_stats_update_end(&sstats->syncp); + atomic_long_inc(&session->stats.rx_oos_packets); goto out; } } @@ -403,23 +400,16 @@ static void l2tp_recv_dequeue_skb(struct l2tp_session *session, struct sk_buff * { struct l2tp_tunnel *tunnel = session->tunnel; int length = L2TP_SKB_CB(skb)->length; - struct l2tp_stats *tstats, *sstats; /* We're about to requeue the skb, so return resources * to its current owner (a socket receive buffer). */ skb_orphan(skb); - tstats = &tunnel->stats; - u64_stats_update_begin(&tstats->syncp); - sstats = &session->stats; - u64_stats_update_begin(&sstats->syncp); - tstats->rx_packets++; - tstats->rx_bytes += length; - sstats->rx_packets++; - sstats->rx_bytes += length; - u64_stats_update_end(&tstats->syncp); - u64_stats_update_end(&sstats->syncp); + atomic_long_inc(&tunnel->stats.rx_packets); + atomic_long_add(length, &tunnel->stats.rx_bytes); + atomic_long_inc(&session->stats.rx_packets); + atomic_long_add(length, &session->stats.rx_bytes); if (L2TP_SKB_CB(skb)->has_seq) { /* Bump our Nr */ @@ -450,7 +440,6 @@ static void l2tp_recv_dequeue(struct l2tp_session *session) { struct sk_buff *skb; struct sk_buff *tmp; - struct l2tp_stats *sstats; /* If the pkt at the head of the queue has the nr that we * expect to send up next, dequeue it and any other @@ -458,13 +447,10 @@ static void l2tp_recv_dequeue(struct l2tp_session *session) */ start: spin_lock_bh(&session->reorder_q.lock); - sstats = &session->stats; skb_queue_walk_safe(&session->reorder_q, skb, tmp) { if (time_after(jiffies, L2TP_SKB_CB(skb)->expires)) { - u64_stats_update_begin(&sstats->syncp); - sstats->rx_seq_discards++; - sstats->rx_errors++; - u64_stats_update_end(&sstats->syncp); + atomic_long_inc(&session->stats.rx_seq_discards); + atomic_long_inc(&session->stats.rx_errors); l2tp_dbg(session, L2TP_MSG_SEQ, "%s: oos pkt %u len %d discarded (too old), waiting for %u, reorder_q_len=%d\n", session->name, L2TP_SKB_CB(skb)->ns, @@ -623,7 +609,6 @@ void l2tp_recv_common(struct l2tp_session *session, struct sk_buff *skb, struct l2tp_tunnel *tunnel = session->tunnel; int offset; u32 ns, nr; - struct l2tp_stats *sstats = &session->stats; /* The ref count is increased since we now hold a pointer to * the session. Take care to decrement the refcnt when exiting @@ -640,9 +625,7 @@ void l2tp_recv_common(struct l2tp_session *session, struct sk_buff *skb, "%s: cookie mismatch (%u/%u). Discarding.\n", tunnel->name, tunnel->tunnel_id, session->session_id); - u64_stats_update_begin(&sstats->syncp); - sstats->rx_cookie_discards++; - u64_stats_update_end(&sstats->syncp); + atomic_long_inc(&session->stats.rx_cookie_discards); goto discard; } ptr += session->peer_cookie_len; @@ -711,9 +694,7 @@ void l2tp_recv_common(struct l2tp_session *session, struct sk_buff *skb, l2tp_warn(session, L2TP_MSG_SEQ, "%s: recv data has no seq numbers when required. Discarding.\n", session->name); - u64_stats_update_begin(&sstats->syncp); - sstats->rx_seq_discards++; - u64_stats_update_end(&sstats->syncp); + atomic_long_inc(&session->stats.rx_seq_discards); goto discard; } @@ -732,9 +713,7 @@ void l2tp_recv_common(struct l2tp_session *session, struct sk_buff *skb, l2tp_warn(session, L2TP_MSG_SEQ, "%s: recv data has no seq numbers when required. Discarding.\n", session->name); - u64_stats_update_begin(&sstats->syncp); - sstats->rx_seq_discards++; - u64_stats_update_end(&sstats->syncp); + atomic_long_inc(&session->stats.rx_seq_discards); goto discard; } } @@ -788,9 +767,7 @@ void l2tp_recv_common(struct l2tp_session *session, struct sk_buff *skb, * packets */ if (L2TP_SKB_CB(skb)->ns != session->nr) { - u64_stats_update_begin(&sstats->syncp); - sstats->rx_seq_discards++; - u64_stats_update_end(&sstats->syncp); + atomic_long_inc(&session->stats.rx_seq_discards); l2tp_dbg(session, L2TP_MSG_SEQ, "%s: oos pkt %u len %d discarded, waiting for %u, reorder_q_len=%d\n", session->name, L2TP_SKB_CB(skb)->ns, @@ -816,9 +793,7 @@ void l2tp_recv_common(struct l2tp_session *session, struct sk_buff *skb, return; discard: - u64_stats_update_begin(&sstats->syncp); - sstats->rx_errors++; - u64_stats_update_end(&sstats->syncp); + atomic_long_inc(&session->stats.rx_errors); kfree_skb(skb); if (session->deref) @@ -828,6 +803,23 @@ discard: } EXPORT_SYMBOL(l2tp_recv_common); +/* Drop skbs from the session's reorder_q + */ +int l2tp_session_queue_purge(struct l2tp_session *session) +{ + struct sk_buff *skb = NULL; + BUG_ON(!session); + BUG_ON(session->magic != L2TP_SESSION_MAGIC); + while ((skb = skb_dequeue(&session->reorder_q))) { + atomic_long_inc(&session->stats.rx_errors); + kfree_skb(skb); + if (session->deref) + (*session->deref)(session); + } + return 0; +} +EXPORT_SYMBOL_GPL(l2tp_session_queue_purge); + /* Internal UDP receive frame. Do the real work of receiving an L2TP data frame * here. The skb is not on a list when we get here. * Returns 0 if the packet was a data packet and was successfully passed on. @@ -843,7 +835,6 @@ static int l2tp_udp_recv_core(struct l2tp_tunnel *tunnel, struct sk_buff *skb, u32 tunnel_id, session_id; u16 version; int length; - struct l2tp_stats *tstats; if (tunnel->sock && l2tp_verify_udp_checksum(tunnel->sock, skb)) goto discard_bad_csum; @@ -932,10 +923,7 @@ static int l2tp_udp_recv_core(struct l2tp_tunnel *tunnel, struct sk_buff *skb, discard_bad_csum: LIMIT_NETDEBUG("%s: UDP: bad checksum\n", tunnel->name); UDP_INC_STATS_USER(tunnel->l2tp_net, UDP_MIB_INERRORS, 0); - tstats = &tunnel->stats; - u64_stats_update_begin(&tstats->syncp); - tstats->rx_errors++; - u64_stats_update_end(&tstats->syncp); + atomic_long_inc(&tunnel->stats.rx_errors); kfree_skb(skb); return 0; @@ -1062,7 +1050,6 @@ static int l2tp_xmit_core(struct l2tp_session *session, struct sk_buff *skb, struct l2tp_tunnel *tunnel = session->tunnel; unsigned int len = skb->len; int error; - struct l2tp_stats *tstats, *sstats; /* Debug */ if (session->send_seq) @@ -1091,21 +1078,15 @@ static int l2tp_xmit_core(struct l2tp_session *session, struct sk_buff *skb, error = ip_queue_xmit(skb, fl); /* Update stats */ - tstats = &tunnel->stats; - u64_stats_update_begin(&tstats->syncp); - sstats = &session->stats; - u64_stats_update_begin(&sstats->syncp); if (error >= 0) { - tstats->tx_packets++; - tstats->tx_bytes += len; - sstats->tx_packets++; - sstats->tx_bytes += len; + atomic_long_inc(&tunnel->stats.tx_packets); + atomic_long_add(len, &tunnel->stats.tx_bytes); + atomic_long_inc(&session->stats.tx_packets); + atomic_long_add(len, &session->stats.tx_bytes); } else { - tstats->tx_errors++; - sstats->tx_errors++; + atomic_long_inc(&tunnel->stats.tx_errors); + atomic_long_inc(&session->stats.tx_errors); } - u64_stats_update_end(&tstats->syncp); - u64_stats_update_end(&sstats->syncp); return 0; } @@ -1282,6 +1263,7 @@ static void l2tp_tunnel_destruct(struct sock *sk) /* No longer an encapsulation socket. See net/ipv4/udp.c */ (udp_sk(sk))->encap_type = 0; (udp_sk(sk))->encap_rcv = NULL; + (udp_sk(sk))->encap_destroy = NULL; break; case L2TP_ENCAPTYPE_IP: break; @@ -1311,7 +1293,7 @@ end: /* When the tunnel is closed, all the attached sessions need to go too. */ -static void l2tp_tunnel_closeall(struct l2tp_tunnel *tunnel) +void l2tp_tunnel_closeall(struct l2tp_tunnel *tunnel) { int hash; struct hlist_node *walk; @@ -1334,25 +1316,13 @@ again: hlist_del_init(&session->hlist); - /* Since we should hold the sock lock while - * doing any unbinding, we need to release the - * lock we're holding before taking that lock. - * Hold a reference to the sock so it doesn't - * disappear as we're jumping between locks. - */ if (session->ref != NULL) (*session->ref)(session); write_unlock_bh(&tunnel->hlist_lock); - if (tunnel->version != L2TP_HDR_VER_2) { - struct l2tp_net *pn = l2tp_pernet(tunnel->l2tp_net); - - spin_lock_bh(&pn->l2tp_session_hlist_lock); - hlist_del_init_rcu(&session->global_hlist); - spin_unlock_bh(&pn->l2tp_session_hlist_lock); - synchronize_rcu(); - } + __l2tp_session_unhash(session); + l2tp_session_queue_purge(session); if (session->session_close != NULL) (*session->session_close)(session); @@ -1360,6 +1330,8 @@ again: if (session->deref != NULL) (*session->deref)(session); + l2tp_session_dec_refcount(session); + write_lock_bh(&tunnel->hlist_lock); /* Now restart from the beginning of this hash @@ -1372,6 +1344,17 @@ again: } write_unlock_bh(&tunnel->hlist_lock); } +EXPORT_SYMBOL_GPL(l2tp_tunnel_closeall); + +/* Tunnel socket destroy hook for UDP encapsulation */ +static void l2tp_udp_encap_destroy(struct sock *sk) +{ + struct l2tp_tunnel *tunnel = l2tp_sock_to_tunnel(sk); + if (tunnel) { + l2tp_tunnel_closeall(tunnel); + sock_put(sk); + } +} /* Really kill the tunnel. * Come here only when all sessions have been cleared from the tunnel. @@ -1397,19 +1380,21 @@ static void l2tp_tunnel_del_work(struct work_struct *work) return; sock = sk->sk_socket; - BUG_ON(!sock); - /* If the tunnel socket was created directly by the kernel, use the - * sk_* API to release the socket now. Otherwise go through the - * inet_* layer to shut the socket down, and let userspace close it. + /* If the tunnel socket was created by userspace, then go through the + * inet layer to shut the socket down, and let userspace close it. + * Otherwise, if we created the socket directly within the kernel, use + * the sk API to release it here. * In either case the tunnel resources are freed in the socket * destructor when the tunnel socket goes away. */ - if (sock->file == NULL) { - kernel_sock_shutdown(sock, SHUT_RDWR); - sk_release_kernel(sk); + if (tunnel->fd >= 0) { + if (sock) + inet_shutdown(sock, 2); } else { - inet_shutdown(sock, 2); + if (sock) + kernel_sock_shutdown(sock, SHUT_RDWR); + sk_release_kernel(sk); } l2tp_tunnel_sock_put(sk); @@ -1668,6 +1653,7 @@ int l2tp_tunnel_create(struct net *net, int fd, int version, u32 tunnel_id, u32 /* Mark socket as an encapsulation socket. See net/ipv4/udp.c */ udp_sk(sk)->encap_type = UDP_ENCAP_L2TPINUDP; udp_sk(sk)->encap_rcv = l2tp_udp_encap_recv; + udp_sk(sk)->encap_destroy = l2tp_udp_encap_destroy; #if IS_ENABLED(CONFIG_IPV6) if (sk->sk_family == PF_INET6) udpv6_encap_enable(); @@ -1723,6 +1709,7 @@ EXPORT_SYMBOL_GPL(l2tp_tunnel_create); */ int l2tp_tunnel_delete(struct l2tp_tunnel *tunnel) { + l2tp_tunnel_closeall(tunnel); return (false == queue_work(l2tp_wq, &tunnel->del_work)); } EXPORT_SYMBOL_GPL(l2tp_tunnel_delete); @@ -1731,62 +1718,71 @@ EXPORT_SYMBOL_GPL(l2tp_tunnel_delete); */ void l2tp_session_free(struct l2tp_session *session) { - struct l2tp_tunnel *tunnel; + struct l2tp_tunnel *tunnel = session->tunnel; BUG_ON(atomic_read(&session->ref_count) != 0); - tunnel = session->tunnel; - if (tunnel != NULL) { + if (tunnel) { BUG_ON(tunnel->magic != L2TP_TUNNEL_MAGIC); + if (session->session_id != 0) + atomic_dec(&l2tp_session_count); + sock_put(tunnel->sock); + session->tunnel = NULL; + l2tp_tunnel_dec_refcount(tunnel); + } + + kfree(session); - /* Delete the session from the hash */ + return; +} +EXPORT_SYMBOL_GPL(l2tp_session_free); + +/* Remove an l2tp session from l2tp_core's hash lists. + * Provides a tidyup interface for pseudowire code which can't just route all + * shutdown via. l2tp_session_delete and a pseudowire-specific session_close + * callback. + */ +void __l2tp_session_unhash(struct l2tp_session *session) +{ + struct l2tp_tunnel *tunnel = session->tunnel; + + /* Remove the session from core hashes */ + if (tunnel) { + /* Remove from the per-tunnel hash */ write_lock_bh(&tunnel->hlist_lock); hlist_del_init(&session->hlist); write_unlock_bh(&tunnel->hlist_lock); - /* Unlink from the global hash if not L2TPv2 */ + /* For L2TPv3 we have a per-net hash: remove from there, too */ if (tunnel->version != L2TP_HDR_VER_2) { struct l2tp_net *pn = l2tp_pernet(tunnel->l2tp_net); - spin_lock_bh(&pn->l2tp_session_hlist_lock); hlist_del_init_rcu(&session->global_hlist); spin_unlock_bh(&pn->l2tp_session_hlist_lock); synchronize_rcu(); } - - if (session->session_id != 0) - atomic_dec(&l2tp_session_count); - - sock_put(tunnel->sock); - - /* This will delete the tunnel context if this - * is the last session on the tunnel. - */ - session->tunnel = NULL; - l2tp_tunnel_dec_refcount(tunnel); } - - kfree(session); - - return; } -EXPORT_SYMBOL_GPL(l2tp_session_free); +EXPORT_SYMBOL_GPL(__l2tp_session_unhash); /* This function is used by the netlink SESSION_DELETE command and by pseudowire modules. */ int l2tp_session_delete(struct l2tp_session *session) { + if (session->ref) + (*session->ref)(session); + __l2tp_session_unhash(session); + l2tp_session_queue_purge(session); if (session->session_close != NULL) (*session->session_close)(session); - + if (session->deref) + (*session->ref)(session); l2tp_session_dec_refcount(session); - return 0; } EXPORT_SYMBOL_GPL(l2tp_session_delete); - /* We come here whenever a session's send_seq, cookie_len or * l2specific_len parameters are set. */ diff --git a/net/l2tp/l2tp_core.h b/net/l2tp/l2tp_core.h index 8eb8f1d47f3a..485a490fd990 100644 --- a/net/l2tp/l2tp_core.h +++ b/net/l2tp/l2tp_core.h @@ -36,16 +36,15 @@ enum { struct sk_buff; struct l2tp_stats { - u64 tx_packets; - u64 tx_bytes; - u64 tx_errors; - u64 rx_packets; - u64 rx_bytes; - u64 rx_seq_discards; - u64 rx_oos_packets; - u64 rx_errors; - u64 rx_cookie_discards; - struct u64_stats_sync syncp; + atomic_long_t tx_packets; + atomic_long_t tx_bytes; + atomic_long_t tx_errors; + atomic_long_t rx_packets; + atomic_long_t rx_bytes; + atomic_long_t rx_seq_discards; + atomic_long_t rx_oos_packets; + atomic_long_t rx_errors; + atomic_long_t rx_cookie_discards; }; struct l2tp_tunnel; @@ -240,11 +239,14 @@ extern struct l2tp_tunnel *l2tp_tunnel_find(struct net *net, u32 tunnel_id); extern struct l2tp_tunnel *l2tp_tunnel_find_nth(struct net *net, int nth); extern int l2tp_tunnel_create(struct net *net, int fd, int version, u32 tunnel_id, u32 peer_tunnel_id, struct l2tp_tunnel_cfg *cfg, struct l2tp_tunnel **tunnelp); +extern void l2tp_tunnel_closeall(struct l2tp_tunnel *tunnel); extern int l2tp_tunnel_delete(struct l2tp_tunnel *tunnel); extern struct l2tp_session *l2tp_session_create(int priv_size, struct l2tp_tunnel *tunnel, u32 session_id, u32 peer_session_id, struct l2tp_session_cfg *cfg); +extern void __l2tp_session_unhash(struct l2tp_session *session); extern int l2tp_session_delete(struct l2tp_session *session); extern void l2tp_session_free(struct l2tp_session *session); extern void l2tp_recv_common(struct l2tp_session *session, struct sk_buff *skb, unsigned char *ptr, unsigned char *optr, u16 hdrflags, int length, int (*payload_hook)(struct sk_buff *skb)); +extern int l2tp_session_queue_purge(struct l2tp_session *session); extern int l2tp_udp_encap_recv(struct sock *sk, struct sk_buff *skb); extern int l2tp_xmit_skb(struct l2tp_session *session, struct sk_buff *skb, int hdr_len); diff --git a/net/l2tp/l2tp_debugfs.c b/net/l2tp/l2tp_debugfs.c index c3813bc84552..072d7202e182 100644 --- a/net/l2tp/l2tp_debugfs.c +++ b/net/l2tp/l2tp_debugfs.c @@ -146,14 +146,14 @@ static void l2tp_dfs_seq_tunnel_show(struct seq_file *m, void *v) tunnel->sock ? atomic_read(&tunnel->sock->sk_refcnt) : 0, atomic_read(&tunnel->ref_count)); - seq_printf(m, " %08x rx %llu/%llu/%llu rx %llu/%llu/%llu\n", + seq_printf(m, " %08x rx %ld/%ld/%ld rx %ld/%ld/%ld\n", tunnel->debug, - (unsigned long long)tunnel->stats.tx_packets, - (unsigned long long)tunnel->stats.tx_bytes, - (unsigned long long)tunnel->stats.tx_errors, - (unsigned long long)tunnel->stats.rx_packets, - (unsigned long long)tunnel->stats.rx_bytes, - (unsigned long long)tunnel->stats.rx_errors); + atomic_long_read(&tunnel->stats.tx_packets), + atomic_long_read(&tunnel->stats.tx_bytes), + atomic_long_read(&tunnel->stats.tx_errors), + atomic_long_read(&tunnel->stats.rx_packets), + atomic_long_read(&tunnel->stats.rx_bytes), + atomic_long_read(&tunnel->stats.rx_errors)); if (tunnel->show != NULL) tunnel->show(m, tunnel); @@ -203,14 +203,14 @@ static void l2tp_dfs_seq_session_show(struct seq_file *m, void *v) seq_printf(m, "\n"); } - seq_printf(m, " %hu/%hu tx %llu/%llu/%llu rx %llu/%llu/%llu\n", + seq_printf(m, " %hu/%hu tx %ld/%ld/%ld rx %ld/%ld/%ld\n", session->nr, session->ns, - (unsigned long long)session->stats.tx_packets, - (unsigned long long)session->stats.tx_bytes, - (unsigned long long)session->stats.tx_errors, - (unsigned long long)session->stats.rx_packets, - (unsigned long long)session->stats.rx_bytes, - (unsigned long long)session->stats.rx_errors); + atomic_long_read(&session->stats.tx_packets), + atomic_long_read(&session->stats.tx_bytes), + atomic_long_read(&session->stats.tx_errors), + atomic_long_read(&session->stats.rx_packets), + atomic_long_read(&session->stats.rx_bytes), + atomic_long_read(&session->stats.rx_errors)); if (session->show != NULL) session->show(m, session); diff --git a/net/l2tp/l2tp_ip.c b/net/l2tp/l2tp_ip.c index 7f41b7051269..571db8dd2292 100644 --- a/net/l2tp/l2tp_ip.c +++ b/net/l2tp/l2tp_ip.c @@ -228,10 +228,16 @@ static void l2tp_ip_close(struct sock *sk, long timeout) static void l2tp_ip_destroy_sock(struct sock *sk) { struct sk_buff *skb; + struct l2tp_tunnel *tunnel = l2tp_sock_to_tunnel(sk); while ((skb = __skb_dequeue_tail(&sk->sk_write_queue)) != NULL) kfree_skb(skb); + if (tunnel) { + l2tp_tunnel_closeall(tunnel); + sock_put(sk); + } + sk_refcnt_debug_dec(sk); } diff --git a/net/l2tp/l2tp_ip6.c b/net/l2tp/l2tp_ip6.c index 41f2f8126ebc..c74f5a91ff6a 100644 --- a/net/l2tp/l2tp_ip6.c +++ b/net/l2tp/l2tp_ip6.c @@ -241,10 +241,17 @@ static void l2tp_ip6_close(struct sock *sk, long timeout) static void l2tp_ip6_destroy_sock(struct sock *sk) { + struct l2tp_tunnel *tunnel = l2tp_sock_to_tunnel(sk); + lock_sock(sk); ip6_flush_pending_frames(sk); release_sock(sk); + if (tunnel) { + l2tp_tunnel_closeall(tunnel); + sock_put(sk); + } + inet6_destroy_sock(sk); } diff --git a/net/l2tp/l2tp_netlink.c b/net/l2tp/l2tp_netlink.c index c1bab22db85e..0825ff26e113 100644 --- a/net/l2tp/l2tp_netlink.c +++ b/net/l2tp/l2tp_netlink.c @@ -246,8 +246,6 @@ static int l2tp_nl_tunnel_send(struct sk_buff *skb, u32 portid, u32 seq, int fla #if IS_ENABLED(CONFIG_IPV6) struct ipv6_pinfo *np = NULL; #endif - struct l2tp_stats stats; - unsigned int start; hdr = genlmsg_put(skb, portid, seq, &l2tp_nl_family, flags, L2TP_CMD_TUNNEL_GET); @@ -265,28 +263,22 @@ static int l2tp_nl_tunnel_send(struct sk_buff *skb, u32 portid, u32 seq, int fla if (nest == NULL) goto nla_put_failure; - do { - start = u64_stats_fetch_begin(&tunnel->stats.syncp); - stats.tx_packets = tunnel->stats.tx_packets; - stats.tx_bytes = tunnel->stats.tx_bytes; - stats.tx_errors = tunnel->stats.tx_errors; - stats.rx_packets = tunnel->stats.rx_packets; - stats.rx_bytes = tunnel->stats.rx_bytes; - stats.rx_errors = tunnel->stats.rx_errors; - stats.rx_seq_discards = tunnel->stats.rx_seq_discards; - stats.rx_oos_packets = tunnel->stats.rx_oos_packets; - } while (u64_stats_fetch_retry(&tunnel->stats.syncp, start)); - - if (nla_put_u64(skb, L2TP_ATTR_TX_PACKETS, stats.tx_packets) || - nla_put_u64(skb, L2TP_ATTR_TX_BYTES, stats.tx_bytes) || - nla_put_u64(skb, L2TP_ATTR_TX_ERRORS, stats.tx_errors) || - nla_put_u64(skb, L2TP_ATTR_RX_PACKETS, stats.rx_packets) || - nla_put_u64(skb, L2TP_ATTR_RX_BYTES, stats.rx_bytes) || + if (nla_put_u64(skb, L2TP_ATTR_TX_PACKETS, + atomic_long_read(&tunnel->stats.tx_packets)) || + nla_put_u64(skb, L2TP_ATTR_TX_BYTES, + atomic_long_read(&tunnel->stats.tx_bytes)) || + nla_put_u64(skb, L2TP_ATTR_TX_ERRORS, + atomic_long_read(&tunnel->stats.tx_errors)) || + nla_put_u64(skb, L2TP_ATTR_RX_PACKETS, + atomic_long_read(&tunnel->stats.rx_packets)) || + nla_put_u64(skb, L2TP_ATTR_RX_BYTES, + atomic_long_read(&tunnel->stats.rx_bytes)) || nla_put_u64(skb, L2TP_ATTR_RX_SEQ_DISCARDS, - stats.rx_seq_discards) || + atomic_long_read(&tunnel->stats.rx_seq_discards)) || nla_put_u64(skb, L2TP_ATTR_RX_OOS_PACKETS, - stats.rx_oos_packets) || - nla_put_u64(skb, L2TP_ATTR_RX_ERRORS, stats.rx_errors)) + atomic_long_read(&tunnel->stats.rx_oos_packets)) || + nla_put_u64(skb, L2TP_ATTR_RX_ERRORS, + atomic_long_read(&tunnel->stats.rx_errors))) goto nla_put_failure; nla_nest_end(skb, nest); @@ -612,8 +604,6 @@ static int l2tp_nl_session_send(struct sk_buff *skb, u32 portid, u32 seq, int fl struct nlattr *nest; struct l2tp_tunnel *tunnel = session->tunnel; struct sock *sk = NULL; - struct l2tp_stats stats; - unsigned int start; sk = tunnel->sock; @@ -656,28 +646,22 @@ static int l2tp_nl_session_send(struct sk_buff *skb, u32 portid, u32 seq, int fl if (nest == NULL) goto nla_put_failure; - do { - start = u64_stats_fetch_begin(&session->stats.syncp); - stats.tx_packets = session->stats.tx_packets; - stats.tx_bytes = session->stats.tx_bytes; - stats.tx_errors = session->stats.tx_errors; - stats.rx_packets = session->stats.rx_packets; - stats.rx_bytes = session->stats.rx_bytes; - stats.rx_errors = session->stats.rx_errors; - stats.rx_seq_discards = session->stats.rx_seq_discards; - stats.rx_oos_packets = session->stats.rx_oos_packets; - } while (u64_stats_fetch_retry(&session->stats.syncp, start)); - - if (nla_put_u64(skb, L2TP_ATTR_TX_PACKETS, stats.tx_packets) || - nla_put_u64(skb, L2TP_ATTR_TX_BYTES, stats.tx_bytes) || - nla_put_u64(skb, L2TP_ATTR_TX_ERRORS, stats.tx_errors) || - nla_put_u64(skb, L2TP_ATTR_RX_PACKETS, stats.rx_packets) || - nla_put_u64(skb, L2TP_ATTR_RX_BYTES, stats.rx_bytes) || + if (nla_put_u64(skb, L2TP_ATTR_TX_PACKETS, + atomic_long_read(&session->stats.tx_packets)) || + nla_put_u64(skb, L2TP_ATTR_TX_BYTES, + atomic_long_read(&session->stats.tx_bytes)) || + nla_put_u64(skb, L2TP_ATTR_TX_ERRORS, + atomic_long_read(&session->stats.tx_errors)) || + nla_put_u64(skb, L2TP_ATTR_RX_PACKETS, + atomic_long_read(&session->stats.rx_packets)) || + nla_put_u64(skb, L2TP_ATTR_RX_BYTES, + atomic_long_read(&session->stats.rx_bytes)) || nla_put_u64(skb, L2TP_ATTR_RX_SEQ_DISCARDS, - stats.rx_seq_discards) || + atomic_long_read(&session->stats.rx_seq_discards)) || nla_put_u64(skb, L2TP_ATTR_RX_OOS_PACKETS, - stats.rx_oos_packets) || - nla_put_u64(skb, L2TP_ATTR_RX_ERRORS, stats.rx_errors)) + atomic_long_read(&session->stats.rx_oos_packets)) || + nla_put_u64(skb, L2TP_ATTR_RX_ERRORS, + atomic_long_read(&session->stats.rx_errors))) goto nla_put_failure; nla_nest_end(skb, nest); diff --git a/net/l2tp/l2tp_ppp.c b/net/l2tp/l2tp_ppp.c index 6a53371dba1f..637a341c1e2d 100644 --- a/net/l2tp/l2tp_ppp.c +++ b/net/l2tp/l2tp_ppp.c @@ -97,6 +97,7 @@ #include <net/ip.h> #include <net/udp.h> #include <net/xfrm.h> +#include <net/inet_common.h> #include <asm/byteorder.h> #include <linux/atomic.h> @@ -259,7 +260,7 @@ static void pppol2tp_recv(struct l2tp_session *session, struct sk_buff *skb, int session->name); /* Not bound. Nothing we can do, so discard. */ - session->stats.rx_errors++; + atomic_long_inc(&session->stats.rx_errors); kfree_skb(skb); } @@ -447,34 +448,16 @@ static void pppol2tp_session_close(struct l2tp_session *session) { struct pppol2tp_session *ps = l2tp_session_priv(session); struct sock *sk = ps->sock; - struct sk_buff *skb; + struct socket *sock = sk->sk_socket; BUG_ON(session->magic != L2TP_SESSION_MAGIC); - if (session->session_id == 0) - goto out; - - if (sk != NULL) { - lock_sock(sk); - - if (sk->sk_state & (PPPOX_CONNECTED | PPPOX_BOUND)) { - pppox_unbind_sock(sk); - sk->sk_state = PPPOX_DEAD; - sk->sk_state_change(sk); - } - - /* Purge any queued data */ - skb_queue_purge(&sk->sk_receive_queue); - skb_queue_purge(&sk->sk_write_queue); - while ((skb = skb_dequeue(&session->reorder_q))) { - kfree_skb(skb); - sock_put(sk); - } - release_sock(sk); + if (sock) { + inet_shutdown(sock, 2); + /* Don't let the session go away before our socket does */ + l2tp_session_inc_refcount(session); } - -out: return; } @@ -483,19 +466,12 @@ out: */ static void pppol2tp_session_destruct(struct sock *sk) { - struct l2tp_session *session; - - if (sk->sk_user_data != NULL) { - session = sk->sk_user_data; - if (session == NULL) - goto out; - + struct l2tp_session *session = sk->sk_user_data; + if (session) { sk->sk_user_data = NULL; BUG_ON(session->magic != L2TP_SESSION_MAGIC); l2tp_session_dec_refcount(session); } - -out: return; } @@ -525,16 +501,13 @@ static int pppol2tp_release(struct socket *sock) session = pppol2tp_sock_to_session(sk); /* Purge any queued data */ - skb_queue_purge(&sk->sk_receive_queue); - skb_queue_purge(&sk->sk_write_queue); if (session != NULL) { - struct sk_buff *skb; - while ((skb = skb_dequeue(&session->reorder_q))) { - kfree_skb(skb); - sock_put(sk); - } + __l2tp_session_unhash(session); + l2tp_session_queue_purge(session); sock_put(sk); } + skb_queue_purge(&sk->sk_receive_queue); + skb_queue_purge(&sk->sk_write_queue); release_sock(sk); @@ -880,18 +853,6 @@ out: return error; } -/* Called when deleting sessions via the netlink interface. - */ -static int pppol2tp_session_delete(struct l2tp_session *session) -{ - struct pppol2tp_session *ps = l2tp_session_priv(session); - - if (ps->sock == NULL) - l2tp_session_dec_refcount(session); - - return 0; -} - #endif /* CONFIG_L2TP_V3 */ /* getname() support. @@ -1025,14 +986,14 @@ end: static void pppol2tp_copy_stats(struct pppol2tp_ioc_stats *dest, struct l2tp_stats *stats) { - dest->tx_packets = stats->tx_packets; - dest->tx_bytes = stats->tx_bytes; - dest->tx_errors = stats->tx_errors; - dest->rx_packets = stats->rx_packets; - dest->rx_bytes = stats->rx_bytes; - dest->rx_seq_discards = stats->rx_seq_discards; - dest->rx_oos_packets = stats->rx_oos_packets; - dest->rx_errors = stats->rx_errors; + dest->tx_packets = atomic_long_read(&stats->tx_packets); + dest->tx_bytes = atomic_long_read(&stats->tx_bytes); + dest->tx_errors = atomic_long_read(&stats->tx_errors); + dest->rx_packets = atomic_long_read(&stats->rx_packets); + dest->rx_bytes = atomic_long_read(&stats->rx_bytes); + dest->rx_seq_discards = atomic_long_read(&stats->rx_seq_discards); + dest->rx_oos_packets = atomic_long_read(&stats->rx_oos_packets); + dest->rx_errors = atomic_long_read(&stats->rx_errors); } /* Session ioctl helper. @@ -1666,14 +1627,14 @@ static void pppol2tp_seq_tunnel_show(struct seq_file *m, void *v) tunnel->name, (tunnel == tunnel->sock->sk_user_data) ? 'Y' : 'N', atomic_read(&tunnel->ref_count) - 1); - seq_printf(m, " %08x %llu/%llu/%llu %llu/%llu/%llu\n", + seq_printf(m, " %08x %ld/%ld/%ld %ld/%ld/%ld\n", tunnel->debug, - (unsigned long long)tunnel->stats.tx_packets, - (unsigned long long)tunnel->stats.tx_bytes, - (unsigned long long)tunnel->stats.tx_errors, - (unsigned long long)tunnel->stats.rx_packets, - (unsigned long long)tunnel->stats.rx_bytes, - (unsigned long long)tunnel->stats.rx_errors); + atomic_long_read(&tunnel->stats.tx_packets), + atomic_long_read(&tunnel->stats.tx_bytes), + atomic_long_read(&tunnel->stats.tx_errors), + atomic_long_read(&tunnel->stats.rx_packets), + atomic_long_read(&tunnel->stats.rx_bytes), + atomic_long_read(&tunnel->stats.rx_errors)); } static void pppol2tp_seq_session_show(struct seq_file *m, void *v) @@ -1708,14 +1669,14 @@ static void pppol2tp_seq_session_show(struct seq_file *m, void *v) session->lns_mode ? "LNS" : "LAC", session->debug, jiffies_to_msecs(session->reorder_timeout)); - seq_printf(m, " %hu/%hu %llu/%llu/%llu %llu/%llu/%llu\n", + seq_printf(m, " %hu/%hu %ld/%ld/%ld %ld/%ld/%ld\n", session->nr, session->ns, - (unsigned long long)session->stats.tx_packets, - (unsigned long long)session->stats.tx_bytes, - (unsigned long long)session->stats.tx_errors, - (unsigned long long)session->stats.rx_packets, - (unsigned long long)session->stats.rx_bytes, - (unsigned long long)session->stats.rx_errors); + atomic_long_read(&session->stats.tx_packets), + atomic_long_read(&session->stats.tx_bytes), + atomic_long_read(&session->stats.tx_errors), + atomic_long_read(&session->stats.rx_packets), + atomic_long_read(&session->stats.rx_bytes), + atomic_long_read(&session->stats.rx_errors)); if (po) seq_printf(m, " interface %s\n", ppp_dev_name(&po->chan)); @@ -1839,7 +1800,7 @@ static const struct pppox_proto pppol2tp_proto = { static const struct l2tp_nl_cmd_ops pppol2tp_nl_cmd_ops = { .session_create = pppol2tp_session_create, - .session_delete = pppol2tp_session_delete, + .session_delete = l2tp_session_delete, }; #endif /* CONFIG_L2TP_V3 */ diff --git a/net/mac80211/cfg.c b/net/mac80211/cfg.c index 808f5fcd1ced..fb306814576a 100644 --- a/net/mac80211/cfg.c +++ b/net/mac80211/cfg.c @@ -3290,14 +3290,19 @@ static int ieee80211_cfg_get_channel(struct wiphy *wiphy, int ret = -ENODATA; rcu_read_lock(); - if (local->use_chanctx) { - chanctx_conf = rcu_dereference(sdata->vif.chanctx_conf); - if (chanctx_conf) { - *chandef = chanctx_conf->def; - ret = 0; - } - } else if (local->open_count == local->monitors) { - *chandef = local->monitor_chandef; + chanctx_conf = rcu_dereference(sdata->vif.chanctx_conf); + if (chanctx_conf) { + *chandef = chanctx_conf->def; + ret = 0; + } else if (local->open_count > 0 && + local->open_count == local->monitors && + sdata->vif.type == NL80211_IFTYPE_MONITOR) { + if (local->use_chanctx) + *chandef = local->monitor_chandef; + else + cfg80211_chandef_create(chandef, + local->_oper_channel, + local->_oper_channel_type); ret = 0; } rcu_read_unlock(); diff --git a/net/mac80211/iface.c b/net/mac80211/iface.c index 640afab304d7..baaa8608e52d 100644 --- a/net/mac80211/iface.c +++ b/net/mac80211/iface.c @@ -541,6 +541,9 @@ int ieee80211_do_open(struct wireless_dev *wdev, bool coming_up) ieee80211_adjust_monitor_flags(sdata, 1); ieee80211_configure_filter(local); + mutex_lock(&local->mtx); + ieee80211_recalc_idle(local); + mutex_unlock(&local->mtx); netif_carrier_on(dev); break; @@ -812,6 +815,9 @@ static void ieee80211_do_stop(struct ieee80211_sub_if_data *sdata, ieee80211_adjust_monitor_flags(sdata, -1); ieee80211_configure_filter(local); + mutex_lock(&local->mtx); + ieee80211_recalc_idle(local); + mutex_unlock(&local->mtx); break; case NL80211_IFTYPE_P2P_DEVICE: /* relies on synchronize_rcu() below */ diff --git a/net/mac80211/mlme.c b/net/mac80211/mlme.c index 9f6464f3e05f..141577412d84 100644 --- a/net/mac80211/mlme.c +++ b/net/mac80211/mlme.c @@ -647,6 +647,9 @@ static void ieee80211_add_vht_ie(struct ieee80211_sub_if_data *sdata, our_mcs = (le16_to_cpu(vht_cap.vht_mcs.rx_mcs_map) & mask) >> shift; + if (our_mcs == IEEE80211_VHT_MCS_NOT_SUPPORTED) + continue; + switch (ap_mcs) { default: if (our_mcs <= ap_mcs) @@ -3503,6 +3506,14 @@ void ieee80211_sta_quiesce(struct ieee80211_sub_if_data *sdata) struct ieee80211_if_managed *ifmgd = &sdata->u.mgd; /* + * Stop timers before deleting work items, as timers + * could race and re-add the work-items. They will be + * re-established on connection. + */ + del_timer_sync(&ifmgd->conn_mon_timer); + del_timer_sync(&ifmgd->bcn_mon_timer); + + /* * we need to use atomic bitops for the running bits * only because both timers might fire at the same * time -- the code here is properly synchronised. @@ -3516,13 +3527,9 @@ void ieee80211_sta_quiesce(struct ieee80211_sub_if_data *sdata) if (del_timer_sync(&ifmgd->timer)) set_bit(TMR_RUNNING_TIMER, &ifmgd->timers_running); - cancel_work_sync(&ifmgd->chswitch_work); if (del_timer_sync(&ifmgd->chswitch_timer)) set_bit(TMR_RUNNING_CHANSW, &ifmgd->timers_running); - - /* these will just be re-established on connection */ - del_timer_sync(&ifmgd->conn_mon_timer); - del_timer_sync(&ifmgd->bcn_mon_timer); + cancel_work_sync(&ifmgd->chswitch_work); } void ieee80211_sta_restart(struct ieee80211_sub_if_data *sdata) @@ -4315,6 +4322,17 @@ void ieee80211_mgd_stop(struct ieee80211_sub_if_data *sdata) { struct ieee80211_if_managed *ifmgd = &sdata->u.mgd; + /* + * Make sure some work items will not run after this, + * they will not do anything but might not have been + * cancelled when disconnecting. + */ + cancel_work_sync(&ifmgd->monitor_work); + cancel_work_sync(&ifmgd->beacon_connection_loss_work); + cancel_work_sync(&ifmgd->request_smps_work); + cancel_work_sync(&ifmgd->csa_connection_drop_work); + cancel_work_sync(&ifmgd->chswitch_work); + mutex_lock(&ifmgd->mtx); if (ifmgd->assoc_data) ieee80211_destroy_assoc_data(sdata, false); diff --git a/net/mac80211/tx.c b/net/mac80211/tx.c index ce78d1149f1d..8914d2d2881a 100644 --- a/net/mac80211/tx.c +++ b/net/mac80211/tx.c @@ -2745,7 +2745,8 @@ ieee80211_get_buffered_bc(struct ieee80211_hw *hw, cpu_to_le16(IEEE80211_FCTL_MOREDATA); } - sdata = IEEE80211_DEV_TO_SUB_IF(skb->dev); + if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN) + sdata = IEEE80211_DEV_TO_SUB_IF(skb->dev); if (!ieee80211_tx_prepare(sdata, &tx, skb)) break; dev_kfree_skb_any(skb); diff --git a/net/netfilter/ipvs/ip_vs_core.c b/net/netfilter/ipvs/ip_vs_core.c index 47edf5a40a59..61f49d241712 100644 --- a/net/netfilter/ipvs/ip_vs_core.c +++ b/net/netfilter/ipvs/ip_vs_core.c @@ -1394,10 +1394,8 @@ ip_vs_in_icmp(struct sk_buff *skb, int *related, unsigned int hooknum) skb_reset_network_header(skb); IP_VS_DBG(12, "ICMP for IPIP %pI4->%pI4: mtu=%u\n", &ip_hdr(skb)->saddr, &ip_hdr(skb)->daddr, mtu); - rcu_read_lock(); ipv4_update_pmtu(skb, dev_net(skb->dev), mtu, 0, 0, 0, 0); - rcu_read_unlock(); /* Client uses PMTUD? */ if (!(cih->frag_off & htons(IP_DF))) goto ignore_ipip; @@ -1577,7 +1575,8 @@ ip_vs_in(unsigned int hooknum, struct sk_buff *skb, int af) } /* ipvs enabled in this netns ? */ net = skb_net(skb); - if (!net_ipvs(net)->enable) + ipvs = net_ipvs(net); + if (unlikely(sysctl_backup_only(ipvs) || !ipvs->enable)) return NF_ACCEPT; ip_vs_fill_iph_skb(af, skb, &iph); @@ -1654,7 +1653,6 @@ ip_vs_in(unsigned int hooknum, struct sk_buff *skb, int af) } IP_VS_DBG_PKT(11, af, pp, skb, 0, "Incoming packet"); - ipvs = net_ipvs(net); /* Check the server status */ if (cp->dest && !(cp->dest->flags & IP_VS_DEST_F_AVAILABLE)) { /* the destination server is not available */ @@ -1815,13 +1813,15 @@ ip_vs_forward_icmp(unsigned int hooknum, struct sk_buff *skb, { int r; struct net *net; + struct netns_ipvs *ipvs; if (ip_hdr(skb)->protocol != IPPROTO_ICMP) return NF_ACCEPT; /* ipvs enabled in this netns ? */ net = skb_net(skb); - if (!net_ipvs(net)->enable) + ipvs = net_ipvs(net); + if (unlikely(sysctl_backup_only(ipvs) || !ipvs->enable)) return NF_ACCEPT; return ip_vs_in_icmp(skb, &r, hooknum); @@ -1835,6 +1835,7 @@ ip_vs_forward_icmp_v6(unsigned int hooknum, struct sk_buff *skb, { int r; struct net *net; + struct netns_ipvs *ipvs; struct ip_vs_iphdr iphdr; ip_vs_fill_iph_skb(AF_INET6, skb, &iphdr); @@ -1843,7 +1844,8 @@ ip_vs_forward_icmp_v6(unsigned int hooknum, struct sk_buff *skb, /* ipvs enabled in this netns ? */ net = skb_net(skb); - if (!net_ipvs(net)->enable) + ipvs = net_ipvs(net); + if (unlikely(sysctl_backup_only(ipvs) || !ipvs->enable)) return NF_ACCEPT; return ip_vs_in_icmp_v6(skb, &r, hooknum, &iphdr); diff --git a/net/netfilter/ipvs/ip_vs_ctl.c b/net/netfilter/ipvs/ip_vs_ctl.c index c68198bf9128..9e2d1cccd1eb 100644 --- a/net/netfilter/ipvs/ip_vs_ctl.c +++ b/net/netfilter/ipvs/ip_vs_ctl.c @@ -1808,6 +1808,12 @@ static struct ctl_table vs_vars[] = { .mode = 0644, .proc_handler = proc_dointvec, }, + { + .procname = "backup_only", + .maxlen = sizeof(int), + .mode = 0644, + .proc_handler = proc_dointvec, + }, #ifdef CONFIG_IP_VS_DEBUG { .procname = "debug_level", @@ -3741,6 +3747,7 @@ static int __net_init ip_vs_control_net_init_sysctl(struct net *net) tbl[idx++].data = &ipvs->sysctl_nat_icmp_send; ipvs->sysctl_pmtu_disc = 1; tbl[idx++].data = &ipvs->sysctl_pmtu_disc; + tbl[idx++].data = &ipvs->sysctl_backup_only; ipvs->sysctl_hdr = register_net_sysctl(net, "net/ipv4/vs", tbl); diff --git a/net/netfilter/ipvs/ip_vs_proto_sctp.c b/net/netfilter/ipvs/ip_vs_proto_sctp.c index ae8ec6f27688..cd1d7298f7ba 100644 --- a/net/netfilter/ipvs/ip_vs_proto_sctp.c +++ b/net/netfilter/ipvs/ip_vs_proto_sctp.c @@ -906,7 +906,7 @@ set_sctp_state(struct ip_vs_proto_data *pd, struct ip_vs_conn *cp, sctp_chunkhdr_t _sctpch, *sch; unsigned char chunk_type; int event, next_state; - int ihl; + int ihl, cofs; #ifdef CONFIG_IP_VS_IPV6 ihl = cp->af == AF_INET ? ip_hdrlen(skb) : sizeof(struct ipv6hdr); @@ -914,8 +914,8 @@ set_sctp_state(struct ip_vs_proto_data *pd, struct ip_vs_conn *cp, ihl = ip_hdrlen(skb); #endif - sch = skb_header_pointer(skb, ihl + sizeof(sctp_sctphdr_t), - sizeof(_sctpch), &_sctpch); + cofs = ihl + sizeof(sctp_sctphdr_t); + sch = skb_header_pointer(skb, cofs, sizeof(_sctpch), &_sctpch); if (sch == NULL) return; @@ -933,10 +933,12 @@ set_sctp_state(struct ip_vs_proto_data *pd, struct ip_vs_conn *cp, */ if ((sch->type == SCTP_CID_COOKIE_ECHO) || (sch->type == SCTP_CID_COOKIE_ACK)) { - sch = skb_header_pointer(skb, (ihl + sizeof(sctp_sctphdr_t) + - sch->length), sizeof(_sctpch), &_sctpch); - if (sch) { - if (sch->type == SCTP_CID_ABORT) + int clen = ntohs(sch->length); + + if (clen >= sizeof(sctp_chunkhdr_t)) { + sch = skb_header_pointer(skb, cofs + ALIGN(clen, 4), + sizeof(_sctpch), &_sctpch); + if (sch && sch->type == SCTP_CID_ABORT) chunk_type = sch->type; } } diff --git a/net/netfilter/nf_conntrack_helper.c b/net/netfilter/nf_conntrack_helper.c index a9740bd6fe54..94b4b9853f60 100644 --- a/net/netfilter/nf_conntrack_helper.c +++ b/net/netfilter/nf_conntrack_helper.c @@ -339,6 +339,13 @@ void nf_ct_helper_log(struct sk_buff *skb, const struct nf_conn *ct, { const struct nf_conn_help *help; const struct nf_conntrack_helper *helper; + struct va_format vaf; + va_list args; + + va_start(args, fmt); + + vaf.fmt = fmt; + vaf.va = &args; /* Called from the helper function, this call never fails */ help = nfct_help(ct); @@ -347,7 +354,9 @@ void nf_ct_helper_log(struct sk_buff *skb, const struct nf_conn *ct, helper = rcu_dereference(help->helper); nf_log_packet(nf_ct_l3num(ct), 0, skb, NULL, NULL, NULL, - "nf_ct_%s: dropping packet: %s ", helper->name, fmt); + "nf_ct_%s: dropping packet: %pV ", helper->name, &vaf); + + va_end(args); } EXPORT_SYMBOL_GPL(nf_ct_helper_log); diff --git a/net/netfilter/nf_conntrack_proto_dccp.c b/net/netfilter/nf_conntrack_proto_dccp.c index 432f95780003..ba65b2041eb4 100644 --- a/net/netfilter/nf_conntrack_proto_dccp.c +++ b/net/netfilter/nf_conntrack_proto_dccp.c @@ -969,6 +969,10 @@ static int __init nf_conntrack_proto_dccp_init(void) { int ret; + ret = register_pernet_subsys(&dccp_net_ops); + if (ret < 0) + goto out_pernet; + ret = nf_ct_l4proto_register(&dccp_proto4); if (ret < 0) goto out_dccp4; @@ -977,16 +981,12 @@ static int __init nf_conntrack_proto_dccp_init(void) if (ret < 0) goto out_dccp6; - ret = register_pernet_subsys(&dccp_net_ops); - if (ret < 0) - goto out_pernet; - return 0; -out_pernet: - nf_ct_l4proto_unregister(&dccp_proto6); out_dccp6: nf_ct_l4proto_unregister(&dccp_proto4); out_dccp4: + unregister_pernet_subsys(&dccp_net_ops); +out_pernet: return ret; } diff --git a/net/netfilter/nf_conntrack_proto_gre.c b/net/netfilter/nf_conntrack_proto_gre.c index bd7d01d9c7e7..155ce9f8a0db 100644 --- a/net/netfilter/nf_conntrack_proto_gre.c +++ b/net/netfilter/nf_conntrack_proto_gre.c @@ -420,18 +420,18 @@ static int __init nf_ct_proto_gre_init(void) { int ret; - ret = nf_ct_l4proto_register(&nf_conntrack_l4proto_gre4); - if (ret < 0) - goto out_gre4; - ret = register_pernet_subsys(&proto_gre_net_ops); if (ret < 0) goto out_pernet; + ret = nf_ct_l4proto_register(&nf_conntrack_l4proto_gre4); + if (ret < 0) + goto out_gre4; + return 0; -out_pernet: - nf_ct_l4proto_unregister(&nf_conntrack_l4proto_gre4); out_gre4: + unregister_pernet_subsys(&proto_gre_net_ops); +out_pernet: return ret; } diff --git a/net/netfilter/nf_conntrack_proto_sctp.c b/net/netfilter/nf_conntrack_proto_sctp.c index 480f616d5936..ec83536def9a 100644 --- a/net/netfilter/nf_conntrack_proto_sctp.c +++ b/net/netfilter/nf_conntrack_proto_sctp.c @@ -888,6 +888,10 @@ static int __init nf_conntrack_proto_sctp_init(void) { int ret; + ret = register_pernet_subsys(&sctp_net_ops); + if (ret < 0) + goto out_pernet; + ret = nf_ct_l4proto_register(&nf_conntrack_l4proto_sctp4); if (ret < 0) goto out_sctp4; @@ -896,16 +900,12 @@ static int __init nf_conntrack_proto_sctp_init(void) if (ret < 0) goto out_sctp6; - ret = register_pernet_subsys(&sctp_net_ops); - if (ret < 0) - goto out_pernet; - return 0; -out_pernet: - nf_ct_l4proto_unregister(&nf_conntrack_l4proto_sctp6); out_sctp6: nf_ct_l4proto_unregister(&nf_conntrack_l4proto_sctp4); out_sctp4: + unregister_pernet_subsys(&sctp_net_ops); +out_pernet: return ret; } diff --git a/net/netfilter/nf_conntrack_proto_udplite.c b/net/netfilter/nf_conntrack_proto_udplite.c index 157489581c31..ca969f6273f7 100644 --- a/net/netfilter/nf_conntrack_proto_udplite.c +++ b/net/netfilter/nf_conntrack_proto_udplite.c @@ -371,6 +371,10 @@ static int __init nf_conntrack_proto_udplite_init(void) { int ret; + ret = register_pernet_subsys(&udplite_net_ops); + if (ret < 0) + goto out_pernet; + ret = nf_ct_l4proto_register(&nf_conntrack_l4proto_udplite4); if (ret < 0) goto out_udplite4; @@ -379,16 +383,12 @@ static int __init nf_conntrack_proto_udplite_init(void) if (ret < 0) goto out_udplite6; - ret = register_pernet_subsys(&udplite_net_ops); - if (ret < 0) - goto out_pernet; - return 0; -out_pernet: - nf_ct_l4proto_unregister(&nf_conntrack_l4proto_udplite6); out_udplite6: nf_ct_l4proto_unregister(&nf_conntrack_l4proto_udplite4); out_udplite4: + unregister_pernet_subsys(&udplite_net_ops); +out_pernet: return ret; } diff --git a/net/netfilter/nfnetlink.c b/net/netfilter/nfnetlink.c index d578ec251712..0b1b32cda307 100644 --- a/net/netfilter/nfnetlink.c +++ b/net/netfilter/nfnetlink.c @@ -62,11 +62,6 @@ void nfnl_unlock(__u8 subsys_id) } EXPORT_SYMBOL_GPL(nfnl_unlock); -static struct mutex *nfnl_get_lock(__u8 subsys_id) -{ - return &table[subsys_id].mutex; -} - int nfnetlink_subsys_register(const struct nfnetlink_subsystem *n) { nfnl_lock(n->subsys_id); @@ -199,7 +194,7 @@ replay: rcu_read_unlock(); nfnl_lock(subsys_id); if (rcu_dereference_protected(table[subsys_id].subsys, - lockdep_is_held(nfnl_get_lock(subsys_id))) != ss || + lockdep_is_held(&table[subsys_id].mutex)) != ss || nfnetlink_find_client(type, ss) != nc) err = -EAGAIN; else if (nc->call) diff --git a/net/netfilter/nfnetlink_queue_core.c b/net/netfilter/nfnetlink_queue_core.c index 858fd52c1040..1cb48540f86a 100644 --- a/net/netfilter/nfnetlink_queue_core.c +++ b/net/netfilter/nfnetlink_queue_core.c @@ -112,7 +112,7 @@ instance_create(u_int16_t queue_num, int portid) inst->queue_num = queue_num; inst->peer_portid = portid; inst->queue_maxlen = NFQNL_QMAX_DEFAULT; - inst->copy_range = 0xfffff; + inst->copy_range = 0xffff; inst->copy_mode = NFQNL_COPY_NONE; spin_lock_init(&inst->lock); INIT_LIST_HEAD(&inst->queue_list); diff --git a/net/netfilter/xt_AUDIT.c b/net/netfilter/xt_AUDIT.c index ba92824086f3..3228d7f24eb4 100644 --- a/net/netfilter/xt_AUDIT.c +++ b/net/netfilter/xt_AUDIT.c @@ -124,6 +124,9 @@ audit_tg(struct sk_buff *skb, const struct xt_action_param *par) const struct xt_audit_info *info = par->targinfo; struct audit_buffer *ab; + if (audit_enabled == 0) + goto errout; + ab = audit_log_start(NULL, GFP_ATOMIC, AUDIT_NETFILTER_PKT); if (ab == NULL) goto errout; diff --git a/net/netlabel/netlabel_unlabeled.c b/net/netlabel/netlabel_unlabeled.c index 847d495cd4de..8a6c6ea466d8 100644 --- a/net/netlabel/netlabel_unlabeled.c +++ b/net/netlabel/netlabel_unlabeled.c @@ -1189,8 +1189,6 @@ static int netlbl_unlabel_staticlist(struct sk_buff *skb, struct netlbl_unlhsh_walk_arg cb_arg; u32 skip_bkt = cb->args[0]; u32 skip_chain = cb->args[1]; - u32 skip_addr4 = cb->args[2]; - u32 skip_addr6 = cb->args[3]; u32 iter_bkt; u32 iter_chain = 0, iter_addr4 = 0, iter_addr6 = 0; struct netlbl_unlhsh_iface *iface; @@ -1215,7 +1213,7 @@ static int netlbl_unlabel_staticlist(struct sk_buff *skb, continue; netlbl_af4list_foreach_rcu(addr4, &iface->addr4_list) { - if (iter_addr4++ < skip_addr4) + if (iter_addr4++ < cb->args[2]) continue; if (netlbl_unlabel_staticlist_gen( NLBL_UNLABEL_C_STATICLIST, @@ -1231,7 +1229,7 @@ static int netlbl_unlabel_staticlist(struct sk_buff *skb, #if IS_ENABLED(CONFIG_IPV6) netlbl_af6list_foreach_rcu(addr6, &iface->addr6_list) { - if (iter_addr6++ < skip_addr6) + if (iter_addr6++ < cb->args[3]) continue; if (netlbl_unlabel_staticlist_gen( NLBL_UNLABEL_C_STATICLIST, @@ -1250,10 +1248,10 @@ static int netlbl_unlabel_staticlist(struct sk_buff *skb, unlabel_staticlist_return: rcu_read_unlock(); - cb->args[0] = skip_bkt; - cb->args[1] = skip_chain; - cb->args[2] = skip_addr4; - cb->args[3] = skip_addr6; + cb->args[0] = iter_bkt; + cb->args[1] = iter_chain; + cb->args[2] = iter_addr4; + cb->args[3] = iter_addr6; return skb->len; } @@ -1273,12 +1271,9 @@ static int netlbl_unlabel_staticlistdef(struct sk_buff *skb, { struct netlbl_unlhsh_walk_arg cb_arg; struct netlbl_unlhsh_iface *iface; - u32 skip_addr4 = cb->args[0]; - u32 skip_addr6 = cb->args[1]; - u32 iter_addr4 = 0; + u32 iter_addr4 = 0, iter_addr6 = 0; struct netlbl_af4list *addr4; #if IS_ENABLED(CONFIG_IPV6) - u32 iter_addr6 = 0; struct netlbl_af6list *addr6; #endif @@ -1292,7 +1287,7 @@ static int netlbl_unlabel_staticlistdef(struct sk_buff *skb, goto unlabel_staticlistdef_return; netlbl_af4list_foreach_rcu(addr4, &iface->addr4_list) { - if (iter_addr4++ < skip_addr4) + if (iter_addr4++ < cb->args[0]) continue; if (netlbl_unlabel_staticlist_gen(NLBL_UNLABEL_C_STATICLISTDEF, iface, @@ -1305,7 +1300,7 @@ static int netlbl_unlabel_staticlistdef(struct sk_buff *skb, } #if IS_ENABLED(CONFIG_IPV6) netlbl_af6list_foreach_rcu(addr6, &iface->addr6_list) { - if (iter_addr6++ < skip_addr6) + if (iter_addr6++ < cb->args[1]) continue; if (netlbl_unlabel_staticlist_gen(NLBL_UNLABEL_C_STATICLISTDEF, iface, @@ -1320,8 +1315,8 @@ static int netlbl_unlabel_staticlistdef(struct sk_buff *skb, unlabel_staticlistdef_return: rcu_read_unlock(); - cb->args[0] = skip_addr4; - cb->args[1] = skip_addr6; + cb->args[0] = iter_addr4; + cb->args[1] = iter_addr6; return skb->len; } diff --git a/net/netlink/genetlink.c b/net/netlink/genetlink.c index f2aabb6f4105..5a55be3f17a5 100644 --- a/net/netlink/genetlink.c +++ b/net/netlink/genetlink.c @@ -142,6 +142,7 @@ int genl_register_mc_group(struct genl_family *family, int err = 0; BUG_ON(grp->name[0] == '\0'); + BUG_ON(memchr(grp->name, '\0', GENL_NAMSIZ) == NULL); genl_lock(); diff --git a/net/nfc/llcp/llcp.c b/net/nfc/llcp/llcp.c index 7f8266dd14cb..b530afadd76c 100644 --- a/net/nfc/llcp/llcp.c +++ b/net/nfc/llcp/llcp.c @@ -68,7 +68,8 @@ static void nfc_llcp_socket_purge(struct nfc_llcp_sock *sock) } } -static void nfc_llcp_socket_release(struct nfc_llcp_local *local, bool listen) +static void nfc_llcp_socket_release(struct nfc_llcp_local *local, bool listen, + int err) { struct sock *sk; struct hlist_node *tmp; @@ -100,7 +101,10 @@ static void nfc_llcp_socket_release(struct nfc_llcp_local *local, bool listen) nfc_llcp_accept_unlink(accept_sk); + if (err) + accept_sk->sk_err = err; accept_sk->sk_state = LLCP_CLOSED; + accept_sk->sk_state_change(sk); bh_unlock_sock(accept_sk); @@ -123,7 +127,10 @@ static void nfc_llcp_socket_release(struct nfc_llcp_local *local, bool listen) continue; } + if (err) + sk->sk_err = err; sk->sk_state = LLCP_CLOSED; + sk->sk_state_change(sk); bh_unlock_sock(sk); @@ -133,6 +140,36 @@ static void nfc_llcp_socket_release(struct nfc_llcp_local *local, bool listen) } write_unlock(&local->sockets.lock); + + /* + * If we want to keep the listening sockets alive, + * we don't touch the RAW ones. + */ + if (listen == true) + return; + + write_lock(&local->raw_sockets.lock); + + sk_for_each_safe(sk, tmp, &local->raw_sockets.head) { + llcp_sock = nfc_llcp_sock(sk); + + bh_lock_sock(sk); + + nfc_llcp_socket_purge(llcp_sock); + + if (err) + sk->sk_err = err; + sk->sk_state = LLCP_CLOSED; + sk->sk_state_change(sk); + + bh_unlock_sock(sk); + + sock_orphan(sk); + + sk_del_node_init(sk); + } + + write_unlock(&local->raw_sockets.lock); } struct nfc_llcp_local *nfc_llcp_local_get(struct nfc_llcp_local *local) @@ -142,20 +179,25 @@ struct nfc_llcp_local *nfc_llcp_local_get(struct nfc_llcp_local *local) return local; } -static void local_release(struct kref *ref) +static void local_cleanup(struct nfc_llcp_local *local, bool listen) { - struct nfc_llcp_local *local; - - local = container_of(ref, struct nfc_llcp_local, ref); - - list_del(&local->list); - nfc_llcp_socket_release(local, false); + nfc_llcp_socket_release(local, listen, ENXIO); del_timer_sync(&local->link_timer); skb_queue_purge(&local->tx_queue); cancel_work_sync(&local->tx_work); cancel_work_sync(&local->rx_work); cancel_work_sync(&local->timeout_work); kfree_skb(local->rx_pending); +} + +static void local_release(struct kref *ref) +{ + struct nfc_llcp_local *local; + + local = container_of(ref, struct nfc_llcp_local, ref); + + list_del(&local->list); + local_cleanup(local, false); kfree(local); } @@ -1348,7 +1390,7 @@ void nfc_llcp_mac_is_down(struct nfc_dev *dev) return; /* Close and purge all existing sockets */ - nfc_llcp_socket_release(local, true); + nfc_llcp_socket_release(local, true, 0); } void nfc_llcp_mac_is_up(struct nfc_dev *dev, u32 target_idx, @@ -1427,6 +1469,8 @@ void nfc_llcp_unregister_device(struct nfc_dev *dev) return; } + local_cleanup(local, false); + nfc_llcp_local_put(local); } diff --git a/net/nfc/llcp/sock.c b/net/nfc/llcp/sock.c index 5332751943a9..5c7cdf3f2a83 100644 --- a/net/nfc/llcp/sock.c +++ b/net/nfc/llcp/sock.c @@ -278,6 +278,8 @@ struct sock *nfc_llcp_accept_dequeue(struct sock *parent, pr_debug("Returning sk state %d\n", sk->sk_state); + sk_acceptq_removed(parent); + return sk; } diff --git a/net/openvswitch/actions.c b/net/openvswitch/actions.c index ac2defeeba83..d4d5363c7ba7 100644 --- a/net/openvswitch/actions.c +++ b/net/openvswitch/actions.c @@ -58,7 +58,7 @@ static int __pop_vlan_tci(struct sk_buff *skb, __be16 *current_tci) if (skb->ip_summed == CHECKSUM_COMPLETE) skb->csum = csum_sub(skb->csum, csum_partial(skb->data - + ETH_HLEN, VLAN_HLEN, 0)); + + (2 * ETH_ALEN), VLAN_HLEN, 0)); vhdr = (struct vlan_hdr *)(skb->data + ETH_HLEN); *current_tci = vhdr->h_vlan_TCI; @@ -115,7 +115,7 @@ static int push_vlan(struct sk_buff *skb, const struct ovs_action_push_vlan *vla if (skb->ip_summed == CHECKSUM_COMPLETE) skb->csum = csum_add(skb->csum, csum_partial(skb->data - + ETH_HLEN, VLAN_HLEN, 0)); + + (2 * ETH_ALEN), VLAN_HLEN, 0)); } __vlan_hwaccel_put_tag(skb, ntohs(vlan->vlan_tci) & ~VLAN_TAG_PRESENT); diff --git a/net/openvswitch/datapath.c b/net/openvswitch/datapath.c index e87a26506dba..a4b724708a1a 100644 --- a/net/openvswitch/datapath.c +++ b/net/openvswitch/datapath.c @@ -394,6 +394,7 @@ static int queue_userspace_packet(struct net *net, int dp_ifindex, skb_copy_and_csum_dev(skb, nla_data(nla)); + genlmsg_end(user_skb, upcall); err = genlmsg_unicast(net, user_skb, upcall_info->portid); out: @@ -1690,6 +1691,7 @@ static int ovs_vport_cmd_new(struct sk_buff *skb, struct genl_info *info) if (IS_ERR(vport)) goto exit_unlock; + err = 0; reply = ovs_vport_cmd_build_info(vport, info->snd_portid, info->snd_seq, OVS_VPORT_CMD_NEW); if (IS_ERR(reply)) { @@ -1771,6 +1773,7 @@ static int ovs_vport_cmd_del(struct sk_buff *skb, struct genl_info *info) if (IS_ERR(reply)) goto exit_unlock; + err = 0; ovs_dp_detach_port(vport); genl_notify(reply, genl_info_net(info), info->snd_portid, diff --git a/net/openvswitch/flow.c b/net/openvswitch/flow.c index 20605ecf100b..fe0e4215c73d 100644 --- a/net/openvswitch/flow.c +++ b/net/openvswitch/flow.c @@ -482,7 +482,11 @@ static __be16 parse_ethertype(struct sk_buff *skb) return htons(ETH_P_802_2); __skb_pull(skb, sizeof(struct llc_snap_hdr)); - return llc->ethertype; + + if (ntohs(llc->ethertype) >= 1536) + return llc->ethertype; + + return htons(ETH_P_802_2); } static int parse_icmpv6(struct sk_buff *skb, struct sw_flow_key *key, diff --git a/net/openvswitch/vport-netdev.c b/net/openvswitch/vport-netdev.c index 670cbc3518de..2130d61c384a 100644 --- a/net/openvswitch/vport-netdev.c +++ b/net/openvswitch/vport-netdev.c @@ -43,8 +43,7 @@ static void netdev_port_receive(struct vport *vport, struct sk_buff *skb) /* Make our own copy of the packet. Otherwise we will mangle the * packet for anyone who came before us (e.g. tcpdump via AF_PACKET). - * (No one comes after us, since we tell handle_bridge() that we took - * the packet.) */ + */ skb = skb_share_check(skb, GFP_ATOMIC); if (unlikely(!skb)) return; diff --git a/net/openvswitch/vport.c b/net/openvswitch/vport.c index ba717cc038b3..f6b8132ce4cb 100644 --- a/net/openvswitch/vport.c +++ b/net/openvswitch/vport.c @@ -325,8 +325,7 @@ int ovs_vport_get_options(const struct vport *vport, struct sk_buff *skb) * @skb: skb that was received * * Must be called with rcu_read_lock. The packet cannot be shared and - * skb->data should point to the Ethernet header. The caller must have already - * called compute_ip_summed() to initialize the checksumming fields. + * skb->data should point to the Ethernet header. */ void ovs_vport_receive(struct vport *vport, struct sk_buff *skb) { diff --git a/net/rds/stats.c b/net/rds/stats.c index 7be790d60b90..73be187d389e 100644 --- a/net/rds/stats.c +++ b/net/rds/stats.c @@ -87,6 +87,7 @@ void rds_stats_info_copy(struct rds_info_iterator *iter, for (i = 0; i < nr; i++) { BUG_ON(strlen(names[i]) >= sizeof(ctr.name)); strncpy(ctr.name, names[i], sizeof(ctr.name) - 1); + ctr.name[sizeof(ctr.name) - 1] = '\0'; ctr.value = values[i]; rds_info_copy(iter, &ctr, sizeof(ctr)); diff --git a/net/sched/sch_qfq.c b/net/sched/sch_qfq.c index e9a77f621c3d..d51852bba01c 100644 --- a/net/sched/sch_qfq.c +++ b/net/sched/sch_qfq.c @@ -298,6 +298,10 @@ static void qfq_update_agg(struct qfq_sched *q, struct qfq_aggregate *agg, new_num_classes == q->max_agg_classes - 1) /* agg no more full */ hlist_add_head(&agg->nonfull_next, &q->nonfull_aggs); + /* The next assignment may let + * agg->initial_budget > agg->budgetmax + * hold, we will take it into account in charge_actual_service(). + */ agg->budgetmax = new_num_classes * agg->lmax; new_agg_weight = agg->class_weight * new_num_classes; agg->inv_w = ONE_FP/new_agg_weight; @@ -817,7 +821,7 @@ static void qfq_make_eligible(struct qfq_sched *q) unsigned long old_vslot = q->oldV >> q->min_slot_shift; if (vslot != old_vslot) { - unsigned long mask = (1UL << fls(vslot ^ old_vslot)) - 1; + unsigned long mask = (1ULL << fls(vslot ^ old_vslot)) - 1; qfq_move_groups(q, mask, IR, ER); qfq_move_groups(q, mask, IB, EB); } @@ -988,12 +992,23 @@ static inline struct sk_buff *qfq_peek_skb(struct qfq_aggregate *agg, /* Update F according to the actual service received by the aggregate. */ static inline void charge_actual_service(struct qfq_aggregate *agg) { - /* compute the service received by the aggregate */ - u32 service_received = agg->initial_budget - agg->budget; + /* Compute the service received by the aggregate, taking into + * account that, after decreasing the number of classes in + * agg, it may happen that + * agg->initial_budget - agg->budget > agg->bugdetmax + */ + u32 service_received = min(agg->budgetmax, + agg->initial_budget - agg->budget); agg->F = agg->S + (u64)service_received * agg->inv_w; } +static inline void qfq_update_agg_ts(struct qfq_sched *q, + struct qfq_aggregate *agg, + enum update_reason reason); + +static void qfq_schedule_agg(struct qfq_sched *q, struct qfq_aggregate *agg); + static struct sk_buff *qfq_dequeue(struct Qdisc *sch) { struct qfq_sched *q = qdisc_priv(sch); @@ -1021,7 +1036,7 @@ static struct sk_buff *qfq_dequeue(struct Qdisc *sch) in_serv_agg->initial_budget = in_serv_agg->budget = in_serv_agg->budgetmax; - if (!list_empty(&in_serv_agg->active)) + if (!list_empty(&in_serv_agg->active)) { /* * Still active: reschedule for * service. Possible optimization: if no other @@ -1032,8 +1047,9 @@ static struct sk_buff *qfq_dequeue(struct Qdisc *sch) * handle it, we would need to maintain an * extra num_active_aggs field. */ - qfq_activate_agg(q, in_serv_agg, requeue); - else if (sch->q.qlen == 0) { /* no aggregate to serve */ + qfq_update_agg_ts(q, in_serv_agg, requeue); + qfq_schedule_agg(q, in_serv_agg); + } else if (sch->q.qlen == 0) { /* no aggregate to serve */ q->in_serv_agg = NULL; return NULL; } @@ -1052,7 +1068,15 @@ static struct sk_buff *qfq_dequeue(struct Qdisc *sch) qdisc_bstats_update(sch, skb); agg_dequeue(in_serv_agg, cl, len); - in_serv_agg->budget -= len; + /* If lmax is lowered, through qfq_change_class, for a class + * owning pending packets with larger size than the new value + * of lmax, then the following condition may hold. + */ + if (unlikely(in_serv_agg->budget < len)) + in_serv_agg->budget = 0; + else + in_serv_agg->budget -= len; + q->V += (u64)len * IWSUM; pr_debug("qfq dequeue: len %u F %lld now %lld\n", len, (unsigned long long) in_serv_agg->F, @@ -1217,17 +1241,11 @@ static int qfq_enqueue(struct sk_buff *skb, struct Qdisc *sch) cl->deficit = agg->lmax; list_add_tail(&cl->alist, &agg->active); - if (list_first_entry(&agg->active, struct qfq_class, alist) != cl) - return err; /* aggregate was not empty, nothing else to do */ + if (list_first_entry(&agg->active, struct qfq_class, alist) != cl || + q->in_serv_agg == agg) + return err; /* non-empty or in service, nothing else to do */ - /* recharge budget */ - agg->initial_budget = agg->budget = agg->budgetmax; - - qfq_update_agg_ts(q, agg, enqueue); - if (q->in_serv_agg == NULL) - q->in_serv_agg = agg; - else if (agg != q->in_serv_agg) - qfq_schedule_agg(q, agg); + qfq_activate_agg(q, agg, enqueue); return err; } @@ -1261,7 +1279,8 @@ static void qfq_schedule_agg(struct qfq_sched *q, struct qfq_aggregate *agg) /* group was surely ineligible, remove */ __clear_bit(grp->index, &q->bitmaps[IR]); __clear_bit(grp->index, &q->bitmaps[IB]); - } else if (!q->bitmaps[ER] && qfq_gt(roundedS, q->V)) + } else if (!q->bitmaps[ER] && qfq_gt(roundedS, q->V) && + q->in_serv_agg == NULL) q->V = roundedS; grp->S = roundedS; @@ -1284,8 +1303,15 @@ skip_update: static void qfq_activate_agg(struct qfq_sched *q, struct qfq_aggregate *agg, enum update_reason reason) { + agg->initial_budget = agg->budget = agg->budgetmax; /* recharge budg. */ + qfq_update_agg_ts(q, agg, reason); - qfq_schedule_agg(q, agg); + if (q->in_serv_agg == NULL) { /* no aggr. in service or scheduled */ + q->in_serv_agg = agg; /* start serving this aggregate */ + /* update V: to be in service, agg must be eligible */ + q->oldV = q->V = agg->S; + } else if (agg != q->in_serv_agg) + qfq_schedule_agg(q, agg); } static void qfq_slot_remove(struct qfq_sched *q, struct qfq_group *grp, @@ -1357,8 +1383,6 @@ static void qfq_deactivate_agg(struct qfq_sched *q, struct qfq_aggregate *agg) __set_bit(grp->index, &q->bitmaps[s]); } } - - qfq_update_eligible(q); } static void qfq_qlen_notify(struct Qdisc *sch, unsigned long arg) diff --git a/net/sctp/associola.c b/net/sctp/associola.c index 43cd0dd9149d..d2709e2b7be6 100644 --- a/net/sctp/associola.c +++ b/net/sctp/associola.c @@ -1079,7 +1079,7 @@ struct sctp_transport *sctp_assoc_lookup_tsn(struct sctp_association *asoc, transports) { if (transport == active) - break; + continue; list_for_each_entry(chunk, &transport->transmitted, transmitted_list) { if (key == chunk->subh.data_hdr->tsn) { diff --git a/net/sctp/sm_statefuns.c b/net/sctp/sm_statefuns.c index 5131fcfedb03..de1a0138317f 100644 --- a/net/sctp/sm_statefuns.c +++ b/net/sctp/sm_statefuns.c @@ -2082,7 +2082,7 @@ sctp_disposition_t sctp_sf_do_5_2_4_dupcook(struct net *net, } /* Delete the tempory new association. */ - sctp_add_cmd_sf(commands, SCTP_CMD_NEW_ASOC, SCTP_ASOC(new_asoc)); + sctp_add_cmd_sf(commands, SCTP_CMD_SET_ASOC, SCTP_ASOC(new_asoc)); sctp_add_cmd_sf(commands, SCTP_CMD_DELETE_TCB, SCTP_NULL()); /* Restore association pointer to provide SCTP command interpeter diff --git a/net/sunrpc/auth_gss/svcauth_gss.c b/net/sunrpc/auth_gss/svcauth_gss.c index f7d34e7b6f81..5ead60550895 100644 --- a/net/sunrpc/auth_gss/svcauth_gss.c +++ b/net/sunrpc/auth_gss/svcauth_gss.c @@ -447,17 +447,21 @@ static int rsc_parse(struct cache_detail *cd, else { int N, i; + /* + * NOTE: we skip uid_valid()/gid_valid() checks here: + * instead, * -1 id's are later mapped to the + * (export-specific) anonymous id by nfsd_setuser. + * + * (But supplementary gid's get no such special + * treatment so are checked for validity here.) + */ /* uid */ rsci.cred.cr_uid = make_kuid(&init_user_ns, id); - if (!uid_valid(rsci.cred.cr_uid)) - goto out; /* gid */ if (get_int(&mesg, &id)) goto out; rsci.cred.cr_gid = make_kgid(&init_user_ns, id); - if (!gid_valid(rsci.cred.cr_gid)) - goto out; /* number of additional gid's */ if (get_int(&mesg, &N)) diff --git a/net/sunrpc/rpc_pipe.c b/net/sunrpc/rpc_pipe.c index a0f48a51e14e..a9129f8d7070 100644 --- a/net/sunrpc/rpc_pipe.c +++ b/net/sunrpc/rpc_pipe.c @@ -1175,6 +1175,7 @@ static struct file_system_type rpc_pipe_fs_type = { .kill_sb = rpc_kill_sb, }; MODULE_ALIAS_FS("rpc_pipefs"); +MODULE_ALIAS("rpc_pipefs"); static void init_once(void *foo) diff --git a/net/sunrpc/sched.c b/net/sunrpc/sched.c index fb20f25ddec9..f8529fc8e542 100644 --- a/net/sunrpc/sched.c +++ b/net/sunrpc/sched.c @@ -180,6 +180,8 @@ static void __rpc_add_wait_queue(struct rpc_wait_queue *queue, list_add_tail(&task->u.tk_wait.list, &queue->tasks[0]); task->tk_waitqueue = queue; queue->qlen++; + /* barrier matches the read in rpc_wake_up_task_queue_locked() */ + smp_wmb(); rpc_set_queued(task); dprintk("RPC: %5u added to queue %p \"%s\"\n", @@ -430,8 +432,11 @@ static void __rpc_do_wake_up_task(struct rpc_wait_queue *queue, struct rpc_task */ static void rpc_wake_up_task_queue_locked(struct rpc_wait_queue *queue, struct rpc_task *task) { - if (RPC_IS_QUEUED(task) && task->tk_waitqueue == queue) - __rpc_do_wake_up_task(queue, task); + if (RPC_IS_QUEUED(task)) { + smp_rmb(); + if (task->tk_waitqueue == queue) + __rpc_do_wake_up_task(queue, task); + } } /* diff --git a/net/sunrpc/xprtsock.c b/net/sunrpc/xprtsock.c index c1d8476b7692..3d02130828da 100644 --- a/net/sunrpc/xprtsock.c +++ b/net/sunrpc/xprtsock.c @@ -849,6 +849,14 @@ static void xs_tcp_close(struct rpc_xprt *xprt) xs_tcp_shutdown(xprt); } +static void xs_local_destroy(struct rpc_xprt *xprt) +{ + xs_close(xprt); + xs_free_peer_addresses(xprt); + xprt_free(xprt); + module_put(THIS_MODULE); +} + /** * xs_destroy - prepare to shutdown a transport * @xprt: doomed transport @@ -862,10 +870,7 @@ static void xs_destroy(struct rpc_xprt *xprt) cancel_delayed_work_sync(&transport->connect_worker); - xs_close(xprt); - xs_free_peer_addresses(xprt); - xprt_free(xprt); - module_put(THIS_MODULE); + xs_local_destroy(xprt); } static inline struct rpc_xprt *xprt_from_sock(struct sock *sk) @@ -2482,7 +2487,7 @@ static struct rpc_xprt_ops xs_local_ops = { .send_request = xs_local_send_request, .set_retrans_timeout = xprt_set_retrans_timeout_def, .close = xs_close, - .destroy = xs_destroy, + .destroy = xs_local_destroy, .print_stats = xs_local_print_stats, }; diff --git a/net/unix/af_unix.c b/net/unix/af_unix.c index 51be64f163ec..971282b6f6a3 100644 --- a/net/unix/af_unix.c +++ b/net/unix/af_unix.c @@ -382,7 +382,7 @@ static void unix_sock_destructor(struct sock *sk) #endif } -static int unix_release_sock(struct sock *sk, int embrion) +static void unix_release_sock(struct sock *sk, int embrion) { struct unix_sock *u = unix_sk(sk); struct path path; @@ -451,8 +451,6 @@ static int unix_release_sock(struct sock *sk, int embrion) if (unix_tot_inflight) unix_gc(); /* Garbage collect fds */ - - return 0; } static void init_peercred(struct sock *sk) @@ -699,9 +697,10 @@ static int unix_release(struct socket *sock) if (!sk) return 0; + unix_release_sock(sk, 0); sock->sk = NULL; - return unix_release_sock(sk, 0); + return 0; } static int unix_autobind(struct socket *sock) @@ -1413,8 +1412,8 @@ static void maybe_add_creds(struct sk_buff *skb, const struct socket *sock, if (UNIXCB(skb).cred) return; if (test_bit(SOCK_PASSCRED, &sock->flags) || - !other->sk_socket || - test_bit(SOCK_PASSCRED, &other->sk_socket->flags)) { + (other->sk_socket && + test_bit(SOCK_PASSCRED, &other->sk_socket->flags))) { UNIXCB(skb).pid = get_pid(task_tgid(current)); UNIXCB(skb).cred = get_current_cred(); } diff --git a/net/wireless/core.c b/net/wireless/core.c index 5ffff039b017..ea4155fe9733 100644 --- a/net/wireless/core.c +++ b/net/wireless/core.c @@ -367,8 +367,7 @@ struct wiphy *wiphy_new(const struct cfg80211_ops *ops, int sizeof_priv) rdev->wiphy.rts_threshold = (u32) -1; rdev->wiphy.coverage_class = 0; - rdev->wiphy.features = NL80211_FEATURE_SCAN_FLUSH | - NL80211_FEATURE_ADVERTISE_CHAN_LIMITS; + rdev->wiphy.features = NL80211_FEATURE_SCAN_FLUSH; return &rdev->wiphy; } diff --git a/net/wireless/nl80211.c b/net/wireless/nl80211.c index e652d05ff712..d44ab216c0ec 100644 --- a/net/wireless/nl80211.c +++ b/net/wireless/nl80211.c @@ -557,18 +557,6 @@ static int nl80211_msg_put_channel(struct sk_buff *msg, if ((chan->flags & IEEE80211_CHAN_RADAR) && nla_put_flag(msg, NL80211_FREQUENCY_ATTR_RADAR)) goto nla_put_failure; - if ((chan->flags & IEEE80211_CHAN_NO_HT40MINUS) && - nla_put_flag(msg, NL80211_FREQUENCY_ATTR_NO_HT40_MINUS)) - goto nla_put_failure; - if ((chan->flags & IEEE80211_CHAN_NO_HT40PLUS) && - nla_put_flag(msg, NL80211_FREQUENCY_ATTR_NO_HT40_PLUS)) - goto nla_put_failure; - if ((chan->flags & IEEE80211_CHAN_NO_80MHZ) && - nla_put_flag(msg, NL80211_FREQUENCY_ATTR_NO_80MHZ)) - goto nla_put_failure; - if ((chan->flags & IEEE80211_CHAN_NO_160MHZ) && - nla_put_flag(msg, NL80211_FREQUENCY_ATTR_NO_160MHZ)) - goto nla_put_failure; if (nla_put_u32(msg, NL80211_FREQUENCY_ATTR_MAX_TX_POWER, DBM_TO_MBM(chan->max_power))) @@ -1310,15 +1298,6 @@ static int nl80211_send_wiphy(struct sk_buff *msg, u32 portid, u32 seq, int flag dev->wiphy.max_acl_mac_addrs)) goto nla_put_failure; - if (dev->wiphy.extended_capabilities && - (nla_put(msg, NL80211_ATTR_EXT_CAPA, - dev->wiphy.extended_capabilities_len, - dev->wiphy.extended_capabilities) || - nla_put(msg, NL80211_ATTR_EXT_CAPA_MASK, - dev->wiphy.extended_capabilities_len, - dev->wiphy.extended_capabilities_mask))) - goto nla_put_failure; - return genlmsg_end(msg, hdr); nla_put_failure: @@ -1328,7 +1307,7 @@ static int nl80211_send_wiphy(struct sk_buff *msg, u32 portid, u32 seq, int flag static int nl80211_dump_wiphy(struct sk_buff *skb, struct netlink_callback *cb) { - int idx = 0; + int idx = 0, ret; int start = cb->args[0]; struct cfg80211_registered_device *dev; @@ -1338,9 +1317,29 @@ static int nl80211_dump_wiphy(struct sk_buff *skb, struct netlink_callback *cb) continue; if (++idx <= start) continue; - if (nl80211_send_wiphy(skb, NETLINK_CB(cb->skb).portid, - cb->nlh->nlmsg_seq, NLM_F_MULTI, - dev) < 0) { + ret = nl80211_send_wiphy(skb, NETLINK_CB(cb->skb).portid, + cb->nlh->nlmsg_seq, NLM_F_MULTI, + dev); + if (ret < 0) { + /* + * If sending the wiphy data didn't fit (ENOBUFS or + * EMSGSIZE returned), this SKB is still empty (so + * it's not too big because another wiphy dataset is + * already in the skb) and we've not tried to adjust + * the dump allocation yet ... then adjust the alloc + * size to be bigger, and return 1 but with the empty + * skb. This results in an empty message being RX'ed + * in userspace, but that is ignored. + * + * We can then retry with the larger buffer. + */ + if ((ret == -ENOBUFS || ret == -EMSGSIZE) && + !skb->len && + cb->min_dump_alloc < 4096) { + cb->min_dump_alloc = 4096; + mutex_unlock(&cfg80211_mutex); + return 1; + } idx--; break; } @@ -1357,7 +1356,7 @@ static int nl80211_get_wiphy(struct sk_buff *skb, struct genl_info *info) struct sk_buff *msg; struct cfg80211_registered_device *dev = info->user_ptr[0]; - msg = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL); + msg = nlmsg_new(4096, GFP_KERNEL); if (!msg) return -ENOMEM; diff --git a/scripts/Makefile.headersinst b/scripts/Makefile.headersinst index 25f216a841d5..477d137c0557 100644 --- a/scripts/Makefile.headersinst +++ b/scripts/Makefile.headersinst @@ -14,7 +14,7 @@ kbuild-file := $(srctree)/$(obj)/Kbuild include $(kbuild-file) # called may set destination dir (when installing to asm/) -_dst := $(or $(destination-y),$(dst),$(obj)) +_dst := $(if $(destination-y),$(destination-y),$(if $(dst),$(dst),$(obj))) old-kbuild-file := $(srctree)/$(subst uapi/,,$(obj))/Kbuild ifneq ($(wildcard $(old-kbuild-file)),) @@ -48,13 +48,14 @@ all-files := $(header-y) $(genhdr-y) $(wrapper-files) output-files := $(addprefix $(installdir)/, $(all-files)) input-files := $(foreach hdr, $(header-y), \ - $(or \ + $(if $(wildcard $(srcdir)/$(hdr)), \ $(wildcard $(srcdir)/$(hdr)), \ - $(wildcard $(oldsrcdir)/$(hdr)), \ - $(error Missing UAPI file $(srcdir)/$(hdr)) \ + $(if $(wildcard $(oldsrcdir)/$(hdr)), \ + $(wildcard $(oldsrcdir)/$(hdr)), \ + $(error Missing UAPI file $(srcdir)/$(hdr))) \ )) \ $(foreach hdr, $(genhdr-y), \ - $(or \ + $(if $(wildcard $(gendir)/$(hdr)), \ $(wildcard $(gendir)/$(hdr)), \ $(error Missing generated UAPI file $(gendir)/$(hdr)) \ )) diff --git a/security/keys/compat.c b/security/keys/compat.c index 1c261763f479..d65fa7fa29ba 100644 --- a/security/keys/compat.c +++ b/security/keys/compat.c @@ -40,12 +40,12 @@ static long compat_keyctl_instantiate_key_iov( ARRAY_SIZE(iovstack), iovstack, &iov); if (ret < 0) - return ret; + goto err; if (ret == 0) goto no_payload_free; ret = keyctl_instantiate_key_common(id, iov, ioc, ret, ringid); - +err: if (iov != iovstack) kfree(iov); return ret; diff --git a/security/keys/process_keys.c b/security/keys/process_keys.c index a571fad91010..42defae1e161 100644 --- a/security/keys/process_keys.c +++ b/security/keys/process_keys.c @@ -57,7 +57,7 @@ int install_user_keyrings(void) kenter("%p{%u}", user, uid); - if (user->uid_keyring) { + if (user->uid_keyring && user->session_keyring) { kleave(" = 0 [exist]"); return 0; } diff --git a/security/selinux/xfrm.c b/security/selinux/xfrm.c index 48665ecd1197..8ab295154517 100644 --- a/security/selinux/xfrm.c +++ b/security/selinux/xfrm.c @@ -310,7 +310,7 @@ int selinux_xfrm_policy_clone(struct xfrm_sec_ctx *old_ctx, if (old_ctx) { new_ctx = kmalloc(sizeof(*old_ctx) + old_ctx->ctx_len, - GFP_KERNEL); + GFP_ATOMIC); if (!new_ctx) return -ENOMEM; diff --git a/security/yama/yama_lsm.c b/security/yama/yama_lsm.c index 23414b93771f..13c88fbcf037 100644 --- a/security/yama/yama_lsm.c +++ b/security/yama/yama_lsm.c @@ -347,10 +347,8 @@ int yama_ptrace_traceme(struct task_struct *parent) /* Only disallow PTRACE_TRACEME on more aggressive settings. */ switch (ptrace_scope) { case YAMA_SCOPE_CAPABILITY: - rcu_read_lock(); - if (!ns_capable(__task_cred(parent)->user_ns, CAP_SYS_PTRACE)) + if (!has_ns_capability(parent, current_user_ns(), CAP_SYS_PTRACE)) rc = -EPERM; - rcu_read_unlock(); break; case YAMA_SCOPE_NO_ATTACH: rc = -EPERM; diff --git a/sound/core/seq/seq_timer.c b/sound/core/seq/seq_timer.c index 160b1bd0cd62..24d44b2f61ac 100644 --- a/sound/core/seq/seq_timer.c +++ b/sound/core/seq/seq_timer.c @@ -290,10 +290,10 @@ int snd_seq_timer_open(struct snd_seq_queue *q) tid.device = SNDRV_TIMER_GLOBAL_SYSTEM; err = snd_timer_open(&t, str, &tid, q->queue); } - if (err < 0) { - snd_printk(KERN_ERR "seq fatal error: cannot create timer (%i)\n", err); - return err; - } + } + if (err < 0) { + snd_printk(KERN_ERR "seq fatal error: cannot create timer (%i)\n", err); + return err; } t->callback = snd_seq_timer_interrupt; t->callback_data = q; diff --git a/sound/oss/sequencer.c b/sound/oss/sequencer.c index 30bcfe470f83..4ff60a6427d9 100644 --- a/sound/oss/sequencer.c +++ b/sound/oss/sequencer.c @@ -545,6 +545,9 @@ static void seq_chn_common_event(unsigned char *event_rec) case MIDI_PGM_CHANGE: if (seq_mode == SEQ_2) { + if (chn > 15) + break; + synth_devs[dev]->chn_info[chn].pgm_num = p1; if ((int) dev >= num_synths) synth_devs[dev]->set_instr(dev, chn, p1); @@ -596,6 +599,9 @@ static void seq_chn_common_event(unsigned char *event_rec) case MIDI_PITCH_BEND: if (seq_mode == SEQ_2) { + if (chn > 15) + break; + synth_devs[dev]->chn_info[chn].bender_value = w14; if ((int) dev < num_synths) diff --git a/sound/pci/asihpi/asihpi.c b/sound/pci/asihpi/asihpi.c index 3536b076b529..0aabfedeecba 100644 --- a/sound/pci/asihpi/asihpi.c +++ b/sound/pci/asihpi/asihpi.c @@ -2549,7 +2549,7 @@ static int snd_asihpi_sampleclock_add(struct snd_card_asihpi *asihpi, static int snd_card_asihpi_mixer_new(struct snd_card_asihpi *asihpi) { - struct snd_card *card = asihpi->card; + struct snd_card *card; unsigned int idx = 0; unsigned int subindex = 0; int err; @@ -2557,6 +2557,7 @@ static int snd_card_asihpi_mixer_new(struct snd_card_asihpi *asihpi) if (snd_BUG_ON(!asihpi)) return -EINVAL; + card = asihpi->card; strcpy(card->mixername, "Asihpi Mixer"); err = diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c index 97c68dd24ef5..ecdf30eb5879 100644 --- a/sound/pci/hda/hda_codec.c +++ b/sound/pci/hda/hda_codec.c @@ -494,7 +494,7 @@ static unsigned int get_num_conns(struct hda_codec *codec, hda_nid_t nid) int snd_hda_get_num_raw_conns(struct hda_codec *codec, hda_nid_t nid) { - return get_num_conns(codec, nid) & AC_CLIST_LENGTH; + return snd_hda_get_raw_connections(codec, nid, NULL, 0); } /** @@ -517,9 +517,6 @@ int snd_hda_get_raw_connections(struct hda_codec *codec, hda_nid_t nid, hda_nid_t prev_nid; int null_count = 0; - if (snd_BUG_ON(!conn_list || max_conns <= 0)) - return -EINVAL; - parm = get_num_conns(codec, nid); if (!parm) return 0; @@ -545,7 +542,8 @@ int snd_hda_get_raw_connections(struct hda_codec *codec, hda_nid_t nid, AC_VERB_GET_CONNECT_LIST, 0); if (parm == -1 && codec->bus->rirb_error) return -EIO; - conn_list[0] = parm & mask; + if (conn_list) + conn_list[0] = parm & mask; return 1; } @@ -580,14 +578,20 @@ int snd_hda_get_raw_connections(struct hda_codec *codec, hda_nid_t nid, continue; } for (n = prev_nid + 1; n <= val; n++) { + if (conn_list) { + if (conns >= max_conns) + return -ENOSPC; + conn_list[conns] = n; + } + conns++; + } + } else { + if (conn_list) { if (conns >= max_conns) return -ENOSPC; - conn_list[conns++] = n; + conn_list[conns] = val; } - } else { - if (conns >= max_conns) - return -ENOSPC; - conn_list[conns++] = val; + conns++; } prev_nid = val; } @@ -3140,7 +3144,7 @@ static unsigned int convert_to_spdif_status(unsigned short val) if (val & AC_DIG1_PROFESSIONAL) sbits |= IEC958_AES0_PROFESSIONAL; if (sbits & IEC958_AES0_PROFESSIONAL) { - if (sbits & AC_DIG1_EMPHASIS) + if (val & AC_DIG1_EMPHASIS) sbits |= IEC958_AES0_PRO_EMPHASIS_5015; } else { if (val & AC_DIG1_EMPHASIS) diff --git a/sound/pci/hda/hda_generic.c b/sound/pci/hda/hda_generic.c index 78897d05d80f..43c2ea539561 100644 --- a/sound/pci/hda/hda_generic.c +++ b/sound/pci/hda/hda_generic.c @@ -995,6 +995,8 @@ enum { BAD_NO_EXTRA_SURR_DAC = 0x101, /* Primary DAC shared with main surrounds */ BAD_SHARED_SURROUND = 0x100, + /* No independent HP possible */ + BAD_NO_INDEP_HP = 0x40, /* Primary DAC shared with main CLFE */ BAD_SHARED_CLFE = 0x10, /* Primary DAC shared with extra surrounds */ @@ -1392,6 +1394,43 @@ static int check_aamix_out_path(struct hda_codec *codec, int path_idx) return snd_hda_get_path_idx(codec, path); } +/* check whether the independent HP is available with the current config */ +static bool indep_hp_possible(struct hda_codec *codec) +{ + struct hda_gen_spec *spec = codec->spec; + struct auto_pin_cfg *cfg = &spec->autocfg; + struct nid_path *path; + int i, idx; + + if (cfg->line_out_type == AUTO_PIN_HP_OUT) + idx = spec->out_paths[0]; + else + idx = spec->hp_paths[0]; + path = snd_hda_get_path_from_idx(codec, idx); + if (!path) + return false; + + /* assume no path conflicts unless aamix is involved */ + if (!spec->mixer_nid || !is_nid_contained(path, spec->mixer_nid)) + return true; + + /* check whether output paths contain aamix */ + for (i = 0; i < cfg->line_outs; i++) { + if (spec->out_paths[i] == idx) + break; + path = snd_hda_get_path_from_idx(codec, spec->out_paths[i]); + if (path && is_nid_contained(path, spec->mixer_nid)) + return false; + } + for (i = 0; i < cfg->speaker_outs; i++) { + path = snd_hda_get_path_from_idx(codec, spec->speaker_paths[i]); + if (path && is_nid_contained(path, spec->mixer_nid)) + return false; + } + + return true; +} + /* fill the empty entries in the dac array for speaker/hp with the * shared dac pointed by the paths */ @@ -1545,6 +1584,9 @@ static int fill_and_eval_dacs(struct hda_codec *codec, badness += BAD_MULTI_IO; } + if (spec->indep_hp && !indep_hp_possible(codec)) + badness += BAD_NO_INDEP_HP; + /* re-fill the shared DAC for speaker / headphone */ if (cfg->line_out_type != AUTO_PIN_HP_OUT) refill_shared_dacs(codec, cfg->hp_outs, @@ -1758,6 +1800,10 @@ static int parse_output_paths(struct hda_codec *codec) cfg->speaker_pins, val); } + /* clear indep_hp flag if not available */ + if (spec->indep_hp && !indep_hp_possible(codec)) + spec->indep_hp = 0; + kfree(best_cfg); return 0; } diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 4cea6bb6fade..418bfc0eb0a3 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -415,6 +415,8 @@ struct azx_dev { unsigned int opened :1; unsigned int running :1; unsigned int irq_pending :1; + unsigned int prepared:1; + unsigned int locked:1; /* * For VIA: * A flag to ensure DMA position is 0 @@ -426,8 +428,25 @@ struct azx_dev { struct timecounter azx_tc; struct cyclecounter azx_cc; + +#ifdef CONFIG_SND_HDA_DSP_LOADER + struct mutex dsp_mutex; +#endif }; +/* DSP lock helpers */ +#ifdef CONFIG_SND_HDA_DSP_LOADER +#define dsp_lock_init(dev) mutex_init(&(dev)->dsp_mutex) +#define dsp_lock(dev) mutex_lock(&(dev)->dsp_mutex) +#define dsp_unlock(dev) mutex_unlock(&(dev)->dsp_mutex) +#define dsp_is_locked(dev) ((dev)->locked) +#else +#define dsp_lock_init(dev) do {} while (0) +#define dsp_lock(dev) do {} while (0) +#define dsp_unlock(dev) do {} while (0) +#define dsp_is_locked(dev) 0 +#endif + /* CORB/RIRB */ struct azx_rb { u32 *buf; /* CORB/RIRB buffer @@ -527,6 +546,10 @@ struct azx { /* card list (for power_save trigger) */ struct list_head list; + +#ifdef CONFIG_SND_HDA_DSP_LOADER + struct azx_dev saved_azx_dev; +#endif }; #define CREATE_TRACE_POINTS @@ -1793,15 +1816,25 @@ azx_assign_device(struct azx *chip, struct snd_pcm_substream *substream) dev = chip->capture_index_offset; nums = chip->capture_streams; } - for (i = 0; i < nums; i++, dev++) - if (!chip->azx_dev[dev].opened) { - res = &chip->azx_dev[dev]; - if (res->assigned_key == key) - break; + for (i = 0; i < nums; i++, dev++) { + struct azx_dev *azx_dev = &chip->azx_dev[dev]; + dsp_lock(azx_dev); + if (!azx_dev->opened && !dsp_is_locked(azx_dev)) { + res = azx_dev; + if (res->assigned_key == key) { + res->opened = 1; + res->assigned_key = key; + dsp_unlock(azx_dev); + return azx_dev; + } } + dsp_unlock(azx_dev); + } if (res) { + dsp_lock(res); res->opened = 1; res->assigned_key = key; + dsp_unlock(res); } return res; } @@ -2009,6 +2042,12 @@ static int azx_pcm_hw_params(struct snd_pcm_substream *substream, struct azx_dev *azx_dev = get_azx_dev(substream); int ret; + dsp_lock(azx_dev); + if (dsp_is_locked(azx_dev)) { + ret = -EBUSY; + goto unlock; + } + mark_runtime_wc(chip, azx_dev, substream, false); azx_dev->bufsize = 0; azx_dev->period_bytes = 0; @@ -2016,8 +2055,10 @@ static int azx_pcm_hw_params(struct snd_pcm_substream *substream, ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); if (ret < 0) - return ret; + goto unlock; mark_runtime_wc(chip, azx_dev, substream, true); + unlock: + dsp_unlock(azx_dev); return ret; } @@ -2029,16 +2070,21 @@ static int azx_pcm_hw_free(struct snd_pcm_substream *substream) struct hda_pcm_stream *hinfo = apcm->hinfo[substream->stream]; /* reset BDL address */ - azx_sd_writel(azx_dev, SD_BDLPL, 0); - azx_sd_writel(azx_dev, SD_BDLPU, 0); - azx_sd_writel(azx_dev, SD_CTL, 0); - azx_dev->bufsize = 0; - azx_dev->period_bytes = 0; - azx_dev->format_val = 0; + dsp_lock(azx_dev); + if (!dsp_is_locked(azx_dev)) { + azx_sd_writel(azx_dev, SD_BDLPL, 0); + azx_sd_writel(azx_dev, SD_BDLPU, 0); + azx_sd_writel(azx_dev, SD_CTL, 0); + azx_dev->bufsize = 0; + azx_dev->period_bytes = 0; + azx_dev->format_val = 0; + } snd_hda_codec_cleanup(apcm->codec, hinfo, substream); mark_runtime_wc(chip, azx_dev, substream, false); + azx_dev->prepared = 0; + dsp_unlock(azx_dev); return snd_pcm_lib_free_pages(substream); } @@ -2055,6 +2101,12 @@ static int azx_pcm_prepare(struct snd_pcm_substream *substream) snd_hda_spdif_out_of_nid(apcm->codec, hinfo->nid); unsigned short ctls = spdif ? spdif->ctls : 0; + dsp_lock(azx_dev); + if (dsp_is_locked(azx_dev)) { + err = -EBUSY; + goto unlock; + } + azx_stream_reset(chip, azx_dev); format_val = snd_hda_calc_stream_format(runtime->rate, runtime->channels, @@ -2065,7 +2117,8 @@ static int azx_pcm_prepare(struct snd_pcm_substream *substream) snd_printk(KERN_ERR SFX "%s: invalid format_val, rate=%d, ch=%d, format=%d\n", pci_name(chip->pci), runtime->rate, runtime->channels, runtime->format); - return -EINVAL; + err = -EINVAL; + goto unlock; } bufsize = snd_pcm_lib_buffer_bytes(substream); @@ -2084,7 +2137,7 @@ static int azx_pcm_prepare(struct snd_pcm_substream *substream) azx_dev->no_period_wakeup = runtime->no_period_wakeup; err = azx_setup_periods(chip, substream, azx_dev); if (err < 0) - return err; + goto unlock; } /* wallclk has 24Mhz clock source */ @@ -2101,8 +2154,14 @@ static int azx_pcm_prepare(struct snd_pcm_substream *substream) if ((chip->driver_caps & AZX_DCAPS_CTX_WORKAROUND) && stream_tag > chip->capture_streams) stream_tag -= chip->capture_streams; - return snd_hda_codec_prepare(apcm->codec, hinfo, stream_tag, + err = snd_hda_codec_prepare(apcm->codec, hinfo, stream_tag, azx_dev->format_val, substream); + + unlock: + if (!err) + azx_dev->prepared = 1; + dsp_unlock(azx_dev); + return err; } static int azx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) @@ -2117,6 +2176,9 @@ static int azx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) azx_dev = get_azx_dev(substream); trace_azx_pcm_trigger(chip, azx_dev, cmd); + if (dsp_is_locked(azx_dev) || !azx_dev->prepared) + return -EPIPE; + switch (cmd) { case SNDRV_PCM_TRIGGER_START: rstart = 1; @@ -2621,17 +2683,27 @@ static int azx_load_dsp_prepare(struct hda_bus *bus, unsigned int format, struct azx_dev *azx_dev; int err; - if (snd_hda_lock_devices(bus)) - return -EBUSY; + azx_dev = azx_get_dsp_loader_dev(chip); + + dsp_lock(azx_dev); + spin_lock_irq(&chip->reg_lock); + if (azx_dev->running || azx_dev->locked) { + spin_unlock_irq(&chip->reg_lock); + err = -EBUSY; + goto unlock; + } + azx_dev->prepared = 0; + chip->saved_azx_dev = *azx_dev; + azx_dev->locked = 1; + spin_unlock_irq(&chip->reg_lock); err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV_SG, snd_dma_pci_data(chip->pci), byte_size, bufp); if (err < 0) - goto unlock; + goto err_alloc; mark_pages_wc(chip, bufp, true); - azx_dev = azx_get_dsp_loader_dev(chip); azx_dev->bufsize = byte_size; azx_dev->period_bytes = byte_size; azx_dev->format_val = format; @@ -2649,13 +2721,20 @@ static int azx_load_dsp_prepare(struct hda_bus *bus, unsigned int format, goto error; azx_setup_controller(chip, azx_dev); + dsp_unlock(azx_dev); return azx_dev->stream_tag; error: mark_pages_wc(chip, bufp, false); snd_dma_free_pages(bufp); -unlock: - snd_hda_unlock_devices(bus); + err_alloc: + spin_lock_irq(&chip->reg_lock); + if (azx_dev->opened) + *azx_dev = chip->saved_azx_dev; + azx_dev->locked = 0; + spin_unlock_irq(&chip->reg_lock); + unlock: + dsp_unlock(azx_dev); return err; } @@ -2677,9 +2756,10 @@ static void azx_load_dsp_cleanup(struct hda_bus *bus, struct azx *chip = bus->private_data; struct azx_dev *azx_dev = azx_get_dsp_loader_dev(chip); - if (!dmab->area) + if (!dmab->area || !azx_dev->locked) return; + dsp_lock(azx_dev); /* reset BDL address */ azx_sd_writel(azx_dev, SD_BDLPL, 0); azx_sd_writel(azx_dev, SD_BDLPU, 0); @@ -2692,7 +2772,12 @@ static void azx_load_dsp_cleanup(struct hda_bus *bus, snd_dma_free_pages(dmab); dmab->area = NULL; - snd_hda_unlock_devices(bus); + spin_lock_irq(&chip->reg_lock); + if (azx_dev->opened) + *azx_dev = chip->saved_azx_dev; + azx_dev->locked = 0; + spin_unlock_irq(&chip->reg_lock); + dsp_unlock(azx_dev); } #endif /* CONFIG_SND_HDA_DSP_LOADER */ @@ -3481,6 +3566,7 @@ static int azx_first_init(struct azx *chip) } for (i = 0; i < chip->num_streams; i++) { + dsp_lock_init(&chip->azx_dev[i]); /* allocate memory for the BDL for each stream */ err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci), diff --git a/sound/pci/hda/patch_ca0132.c b/sound/pci/hda/patch_ca0132.c index eefc4563b2f9..0792b5725f9c 100644 --- a/sound/pci/hda/patch_ca0132.c +++ b/sound/pci/hda/patch_ca0132.c @@ -3239,7 +3239,7 @@ static int ca0132_set_vipsource(struct hda_codec *codec, int val) struct ca0132_spec *spec = codec->spec; unsigned int tmp; - if (!dspload_is_loaded(codec)) + if (spec->dsp_state != DSP_DOWNLOADED) return 0; /* if CrystalVoice if off, vipsource should be 0 */ @@ -4267,11 +4267,12 @@ static void ca0132_refresh_widget_caps(struct hda_codec *codec) */ static void ca0132_setup_defaults(struct hda_codec *codec) { + struct ca0132_spec *spec = codec->spec; unsigned int tmp; int num_fx; int idx, i; - if (!dspload_is_loaded(codec)) + if (spec->dsp_state != DSP_DOWNLOADED) return; /* out, in effects + voicefx */ @@ -4351,12 +4352,16 @@ static bool ca0132_download_dsp_images(struct hda_codec *codec) return false; dsp_os_image = (struct dsp_image_seg *)(fw_entry->data); - dspload_image(codec, dsp_os_image, 0, 0, true, 0); + if (dspload_image(codec, dsp_os_image, 0, 0, true, 0)) { + pr_err("ca0132 dspload_image failed.\n"); + goto exit_download; + } + dsp_loaded = dspload_wait_loaded(codec); +exit_download: release_firmware(fw_entry); - return dsp_loaded; } @@ -4367,16 +4372,13 @@ static void ca0132_download_dsp(struct hda_codec *codec) #ifndef CONFIG_SND_HDA_CODEC_CA0132_DSP return; /* NOP */ #endif - spec->dsp_state = DSP_DOWNLOAD_INIT; - if (spec->dsp_state == DSP_DOWNLOAD_INIT) { - chipio_enable_clocks(codec); - spec->dsp_state = DSP_DOWNLOADING; - if (!ca0132_download_dsp_images(codec)) - spec->dsp_state = DSP_DOWNLOAD_FAILED; - else - spec->dsp_state = DSP_DOWNLOADED; - } + chipio_enable_clocks(codec); + spec->dsp_state = DSP_DOWNLOADING; + if (!ca0132_download_dsp_images(codec)) + spec->dsp_state = DSP_DOWNLOAD_FAILED; + else + spec->dsp_state = DSP_DOWNLOADED; if (spec->dsp_state == DSP_DOWNLOADED) ca0132_set_dsp_msr(codec, true); diff --git a/sound/pci/hda/patch_cirrus.c b/sound/pci/hda/patch_cirrus.c index 72ebb8a36b13..0d9c58f13560 100644 --- a/sound/pci/hda/patch_cirrus.c +++ b/sound/pci/hda/patch_cirrus.c @@ -168,10 +168,10 @@ static void cs_automute(struct hda_codec *codec) snd_hda_gen_update_outputs(codec); if (spec->gpio_eapd_hp) { - unsigned int gpio = spec->gen.hp_jack_present ? + spec->gpio_data = spec->gen.hp_jack_present ? spec->gpio_eapd_hp : spec->gpio_eapd_speaker; snd_hda_codec_write(codec, 0x01, 0, - AC_VERB_SET_GPIO_DATA, gpio); + AC_VERB_SET_GPIO_DATA, spec->gpio_data); } } @@ -506,6 +506,8 @@ static int patch_cs420x(struct hda_codec *codec) if (!spec) return -ENOMEM; + spec->gen.automute_hook = cs_automute; + snd_hda_pick_fixup(codec, cs420x_models, cs420x_fixup_tbl, cs420x_fixups); snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); @@ -893,6 +895,8 @@ static int patch_cs4210(struct hda_codec *codec) if (!spec) return -ENOMEM; + spec->gen.automute_hook = cs_automute; + snd_hda_pick_fixup(codec, cs421x_models, cs421x_fixup_tbl, cs421x_fixups); snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c index 941bf6c766ec..2a89d1eefeb6 100644 --- a/sound/pci/hda/patch_conexant.c +++ b/sound/pci/hda/patch_conexant.c @@ -1142,7 +1142,7 @@ static int patch_cxt5045(struct hda_codec *codec) } if (spec->beep_amp) - snd_hda_attach_beep_device(codec, spec->beep_amp); + snd_hda_attach_beep_device(codec, get_amp_nid_(spec->beep_amp)); return 0; } @@ -1921,7 +1921,7 @@ static int patch_cxt5051(struct hda_codec *codec) } if (spec->beep_amp) - snd_hda_attach_beep_device(codec, spec->beep_amp); + snd_hda_attach_beep_device(codec, get_amp_nid_(spec->beep_amp)); return 0; } @@ -3099,7 +3099,7 @@ static int patch_cxt5066(struct hda_codec *codec) } if (spec->beep_amp) - snd_hda_attach_beep_device(codec, spec->beep_amp); + snd_hda_attach_beep_device(codec, get_amp_nid_(spec->beep_amp)); return 0; } @@ -3191,11 +3191,17 @@ static int cx_auto_build_controls(struct hda_codec *codec) return 0; } +static void cx_auto_free(struct hda_codec *codec) +{ + snd_hda_detach_beep_device(codec); + snd_hda_gen_free(codec); +} + static const struct hda_codec_ops cx_auto_patch_ops = { .build_controls = cx_auto_build_controls, .build_pcms = snd_hda_gen_build_pcms, .init = snd_hda_gen_init, - .free = snd_hda_gen_free, + .free = cx_auto_free, .unsol_event = snd_hda_jack_unsol_event, #ifdef CONFIG_PM .check_power_status = snd_hda_gen_check_power_status, @@ -3391,7 +3397,7 @@ static int patch_conexant_auto(struct hda_codec *codec) codec->patch_ops = cx_auto_patch_ops; if (spec->beep_amp) - snd_hda_attach_beep_device(codec, spec->beep_amp); + snd_hda_attach_beep_device(codec, get_amp_nid_(spec->beep_amp)); /* Some laptops with Conexant chips show stalls in S3 resume, * which falls into the single-cmd mode. diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c index 83d5335ac348..dafe04ae8c72 100644 --- a/sound/pci/hda/patch_sigmatel.c +++ b/sound/pci/hda/patch_sigmatel.c @@ -815,6 +815,29 @@ static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity) return 0; } +/* check whether a built-in speaker is included in parsed pins */ +static bool has_builtin_speaker(struct hda_codec *codec) +{ + struct sigmatel_spec *spec = codec->spec; + hda_nid_t *nid_pin; + int nids, i; + + if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) { + nid_pin = spec->gen.autocfg.line_out_pins; + nids = spec->gen.autocfg.line_outs; + } else { + nid_pin = spec->gen.autocfg.speaker_pins; + nids = spec->gen.autocfg.speaker_outs; + } + + for (i = 0; i < nids; i++) { + unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]); + if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT) + return true; + } + return false; +} + /* * PC beep controls */ @@ -3890,6 +3913,12 @@ static int patch_stac92hd73xx(struct hda_codec *codec) return err; } + /* Don't GPIO-mute speakers if there are no internal speakers, because + * the GPIO might be necessary for Headphone + */ + if (spec->eapd_switch && !has_builtin_speaker(codec)) + spec->eapd_switch = 0; + codec->proc_widget_hook = stac92hd7x_proc_hook; snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); diff --git a/sound/usb/card.c b/sound/usb/card.c index 803953a9bff3..2da8ad75fd96 100644 --- a/sound/usb/card.c +++ b/sound/usb/card.c @@ -244,6 +244,21 @@ static int snd_usb_create_streams(struct snd_usb_audio *chip, int ctrlif) usb_ifnum_to_if(dev, ctrlif)->intf_assoc; if (!assoc) { + /* + * Firmware writers cannot count to three. So to find + * the IAD on the NuForce UDH-100, also check the next + * interface. + */ + struct usb_interface *iface = + usb_ifnum_to_if(dev, ctrlif + 1); + if (iface && + iface->intf_assoc && + iface->intf_assoc->bFunctionClass == USB_CLASS_AUDIO && + iface->intf_assoc->bFunctionProtocol == UAC_VERSION_2) + assoc = iface->intf_assoc; + } + + if (!assoc) { snd_printk(KERN_ERR "Audio class v2 interfaces need an interface association\n"); return -EINVAL; } diff --git a/sound/usb/mixer.c b/sound/usb/mixer.c index 638e7f738018..ca4739c3f650 100644 --- a/sound/usb/mixer.c +++ b/sound/usb/mixer.c @@ -715,8 +715,9 @@ static int check_input_term(struct mixer_build *state, int id, struct usb_audio_ case UAC2_CLOCK_SELECTOR: { struct uac_selector_unit_descriptor *d = p1; /* call recursively to retrieve the channel info */ - if (check_input_term(state, d->baSourceID[0], term) < 0) - return -ENODEV; + err = check_input_term(state, d->baSourceID[0], term); + if (err < 0) + return err; term->type = d->bDescriptorSubtype << 16; /* virtual type */ term->id = id; term->name = uac_selector_unit_iSelector(d); @@ -725,7 +726,8 @@ static int check_input_term(struct mixer_build *state, int id, struct usb_audio_ case UAC1_PROCESSING_UNIT: case UAC1_EXTENSION_UNIT: /* UAC2_PROCESSING_UNIT_V2 */ - /* UAC2_EFFECT_UNIT */ { + /* UAC2_EFFECT_UNIT */ + case UAC2_EXTENSION_UNIT_V2: { struct uac_processing_unit_descriptor *d = p1; if (state->mixer->protocol == UAC_VERSION_2 && @@ -1356,8 +1358,9 @@ static int parse_audio_feature_unit(struct mixer_build *state, int unitid, void return err; /* determine the input source type and name */ - if (check_input_term(state, hdr->bSourceID, &iterm) < 0) - return -EINVAL; + err = check_input_term(state, hdr->bSourceID, &iterm); + if (err < 0) + return err; master_bits = snd_usb_combine_bytes(bmaControls, csize); /* master configuration quirks */ @@ -2052,6 +2055,8 @@ static int parse_audio_unit(struct mixer_build *state, int unitid) return parse_audio_extension_unit(state, unitid, p1); else /* UAC_VERSION_2 */ return parse_audio_processing_unit(state, unitid, p1); + case UAC2_EXTENSION_UNIT_V2: + return parse_audio_extension_unit(state, unitid, p1); default: snd_printk(KERN_ERR "usbaudio: unit %u: unexpected type 0x%02x\n", unitid, p1[2]); return -EINVAL; @@ -2118,7 +2123,7 @@ static int snd_usb_mixer_controls(struct usb_mixer_interface *mixer) state.oterm.type = le16_to_cpu(desc->wTerminalType); state.oterm.name = desc->iTerminal; err = parse_audio_unit(&state, desc->bSourceID); - if (err < 0) + if (err < 0 && err != -EINVAL) return err; } else { /* UAC_VERSION_2 */ struct uac2_output_terminal_descriptor *desc = p; @@ -2130,12 +2135,12 @@ static int snd_usb_mixer_controls(struct usb_mixer_interface *mixer) state.oterm.type = le16_to_cpu(desc->wTerminalType); state.oterm.name = desc->iTerminal; err = parse_audio_unit(&state, desc->bSourceID); - if (err < 0) + if (err < 0 && err != -EINVAL) return err; /* for UAC2, use the same approach to also add the clock selectors */ err = parse_audio_unit(&state, desc->bCSourceID); - if (err < 0) + if (err < 0 && err != -EINVAL) return err; } } diff --git a/tools/lib/traceevent/Makefile b/tools/lib/traceevent/Makefile index a20e32033431..0b0a90787db6 100644 --- a/tools/lib/traceevent/Makefile +++ b/tools/lib/traceevent/Makefile @@ -122,7 +122,7 @@ export Q VERBOSE EVENT_PARSE_VERSION = $(EP_VERSION).$(EP_PATCHLEVEL).$(EP_EXTRAVERSION) -INCLUDES = -I. -I/usr/local/include $(CONFIG_INCLUDES) +INCLUDES = -I. $(CONFIG_INCLUDES) # Set compile option CFLAGS if not set elsewhere CFLAGS ?= -g -Wall diff --git a/tools/perf/Makefile b/tools/perf/Makefile index a2108ca1cc17..bb74c79cd16e 100644 --- a/tools/perf/Makefile +++ b/tools/perf/Makefile @@ -95,7 +95,7 @@ ifeq ("$(origin DEBUG)", "command line") PERF_DEBUG = $(DEBUG) endif ifndef PERF_DEBUG - CFLAGS_OPTIMIZE = -O6 -D_FORTIFY_SOURCE=2 + CFLAGS_OPTIMIZE = -O6 endif ifdef PARSER_DEBUG @@ -180,6 +180,12 @@ ifeq ($(call try-cc,$(SOURCE_HELLO),$(CFLAGS) -Werror -Wvolatile-register-var,-W CFLAGS := $(CFLAGS) -Wvolatile-register-var endif +ifndef PERF_DEBUG + ifeq ($(call try-cc,$(SOURCE_HELLO),$(CFLAGS) -D_FORTIFY_SOURCE=2,-D_FORTIFY_SOURCE=2),y) + CFLAGS := $(CFLAGS) -D_FORTIFY_SOURCE=2 + endif +endif + ### --- END CONFIGURATION SECTION --- ifeq ($(srctree),) diff --git a/tools/perf/bench/bench.h b/tools/perf/bench/bench.h index a5223e6a7b43..0fdc85269c4d 100644 --- a/tools/perf/bench/bench.h +++ b/tools/perf/bench/bench.h @@ -1,6 +1,30 @@ #ifndef BENCH_H #define BENCH_H +/* + * The madvise transparent hugepage constants were added in glibc + * 2.13. For compatibility with older versions of glibc, define these + * tokens if they are not already defined. + * + * PA-RISC uses different madvise values from other architectures and + * needs to be special-cased. + */ +#ifdef __hppa__ +# ifndef MADV_HUGEPAGE +# define MADV_HUGEPAGE 67 +# endif +# ifndef MADV_NOHUGEPAGE +# define MADV_NOHUGEPAGE 68 +# endif +#else +# ifndef MADV_HUGEPAGE +# define MADV_HUGEPAGE 14 +# endif +# ifndef MADV_NOHUGEPAGE +# define MADV_NOHUGEPAGE 15 +# endif +#endif + extern int bench_numa(int argc, const char **argv, const char *prefix); extern int bench_sched_messaging(int argc, const char **argv, const char *prefix); extern int bench_sched_pipe(int argc, const char **argv, const char *prefix); diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c index 774c90713a53..f1a939ebc19c 100644 --- a/tools/perf/builtin-record.c +++ b/tools/perf/builtin-record.c @@ -573,13 +573,15 @@ static int __cmd_record(struct perf_record *rec, int argc, const char **argv) perf_event__synthesize_guest_os, tool); } - if (!opts->target.system_wide) + if (perf_target__has_task(&opts->target)) err = perf_event__synthesize_thread_map(tool, evsel_list->threads, process_synthesized_event, machine); - else + else if (perf_target__has_cpu(&opts->target)) err = perf_event__synthesize_threads(tool, process_synthesized_event, machine); + else /* command specified */ + err = 0; if (err != 0) goto out_delete_session; diff --git a/tools/perf/util/hist.h b/tools/perf/util/hist.h index 38624686ee9a..226a4ae2f936 100644 --- a/tools/perf/util/hist.h +++ b/tools/perf/util/hist.h @@ -208,8 +208,9 @@ static inline int script_browse(const char *script_opt __maybe_unused) return 0; } -#define K_LEFT -1 -#define K_RIGHT -2 +#define K_LEFT -1000 +#define K_RIGHT -2000 +#define K_SWITCH_INPUT_DATA -3000 #endif #ifdef GTK2_SUPPORT diff --git a/tools/perf/util/strlist.c b/tools/perf/util/strlist.c index 55433aa42c8f..eabdce0a2daa 100644 --- a/tools/perf/util/strlist.c +++ b/tools/perf/util/strlist.c @@ -143,7 +143,7 @@ struct strlist *strlist__new(bool dupstr, const char *list) slist->rblist.node_delete = strlist__node_delete; slist->dupstr = dupstr; - if (slist && strlist__parse_list(slist, list) != 0) + if (list && strlist__parse_list(slist, list) != 0) goto out_error; } diff --git a/tools/usb/ffs-test.c b/tools/usb/ffs-test.c index 8674b9ec14f6..fe1e66b6ef40 100644 --- a/tools/usb/ffs-test.c +++ b/tools/usb/ffs-test.c @@ -38,7 +38,7 @@ #include <unistd.h> #include <tools/le_byteshift.h> -#include "../../include/linux/usb/functionfs.h" +#include "../../include/uapi/linux/usb/functionfs.h" /******************** Little Endian Handling ********************************/ diff --git a/virt/kvm/ioapic.c b/virt/kvm/ioapic.c index ce82b9401958..5ba005c00e2f 100644 --- a/virt/kvm/ioapic.c +++ b/virt/kvm/ioapic.c @@ -74,9 +74,12 @@ static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic, u32 redir_index = (ioapic->ioregsel - 0x10) >> 1; u64 redir_content; - ASSERT(redir_index < IOAPIC_NUM_PINS); + if (redir_index < IOAPIC_NUM_PINS) + redir_content = + ioapic->redirtbl[redir_index].bits; + else + redir_content = ~0ULL; - redir_content = ioapic->redirtbl[redir_index].bits; result = (ioapic->ioregsel & 0x1) ? (redir_content >> 32) & 0xffffffff : redir_content & 0xffffffff; |
