diff options
725 files changed, 39890 insertions, 8917 deletions
diff --git a/Documentation/00-INDEX b/Documentation/00-INDEX index 438277800103..7286ad090db7 100644 --- a/Documentation/00-INDEX +++ b/Documentation/00-INDEX @@ -21,6 +21,9 @@ Changes - list of changes that break older software packages. CodingStyle - how the boss likes the C code in the kernel to look. +development-process/ + - An extended tutorial on how to work with the kernel development + process. DMA-API.txt - DMA API, pci_ API & extensions for non-consistent memory machines. DMA-ISA-LPC.txt diff --git a/Documentation/ABI/testing/sysfs-profiling b/Documentation/ABI/testing/sysfs-profiling new file mode 100644 index 000000000000..b02d8b8c173a --- /dev/null +++ b/Documentation/ABI/testing/sysfs-profiling @@ -0,0 +1,13 @@ +What: /sys/kernel/profile +Date: September 2008 +Contact: Dave Hansen <dave@linux.vnet.ibm.com> +Description: + /sys/kernel/profile is the runtime equivalent + of the boot-time profile= option. + + You can get the same effect running: + + echo 2 > /sys/kernel/profile + + as you would by issuing profile=2 on the boot + command line. diff --git a/Documentation/DocBook/Makefile b/Documentation/DocBook/Makefile index 1615350b7b53..fabc06466b93 100644 --- a/Documentation/DocBook/Makefile +++ b/Documentation/DocBook/Makefile @@ -6,7 +6,7 @@ # To add a new book the only step required is to add the book to the # list of DOCBOOKS. -DOCBOOKS := wanbook.xml z8530book.xml mcabook.xml videobook.xml \ +DOCBOOKS := wanbook.xml z8530book.xml mcabook.xml \ kernel-hacking.xml kernel-locking.xml deviceiobook.xml \ procfs-guide.xml writing_usb_driver.xml networking.xml \ kernel-api.xml filesystems.xml lsm.xml usb.xml kgdb.xml \ diff --git a/Documentation/DocBook/procfs-guide.tmpl b/Documentation/DocBook/procfs-guide.tmpl index 8a5dc6e021ff..9eba4b7af73d 100644 --- a/Documentation/DocBook/procfs-guide.tmpl +++ b/Documentation/DocBook/procfs-guide.tmpl @@ -14,17 +14,20 @@ <othername>(J.A.K.)</othername> <surname>Mouw</surname> <affiliation> - <orgname>Delft University of Technology</orgname> - <orgdiv>Faculty of Information Technology and Systems</orgdiv> <address> - <email>J.A.K.Mouw@its.tudelft.nl</email> - <pob>PO BOX 5031</pob> - <postcode>2600 GA</postcode> - <city>Delft</city> - <country>The Netherlands</country> + <email>mouw@nl.linux.org</email> </address> </affiliation> </author> + <othercredit> + <contrib> + This software and documentation were written while working on the + LART computing board + (<ulink url="http://www.lartmaker.nl/">http://www.lartmaker.nl/</ulink>), + which was sponsored by the Delt University of Technology projects + Mobile Multi-media Communications and Ubiquitous Communications. + </contrib> + </othercredit> </authorgroup> <revhistory> @@ -109,18 +112,6 @@ </para> <para> - This documentation was written while working on the LART - computing board (<ulink - url="http://www.lart.tudelft.nl/">http://www.lart.tudelft.nl/</ulink>), - which is sponsored by the Mobile Multi-media Communications - (<ulink - url="http://www.mmc.tudelft.nl/">http://www.mmc.tudelft.nl/</ulink>) - and Ubiquitous Communications (<ulink - url="http://www.ubicom.tudelft.nl/">http://www.ubicom.tudelft.nl/</ulink>) - projects. - </para> - - <para> Erik </para> </preface> diff --git a/Documentation/DocBook/procfs_example.c b/Documentation/DocBook/procfs_example.c index 2f3de0fb8365..8c6396e4bf31 100644 --- a/Documentation/DocBook/procfs_example.c +++ b/Documentation/DocBook/procfs_example.c @@ -1,28 +1,16 @@ /* * procfs_example.c: an example proc interface * - * Copyright (C) 2001, Erik Mouw (J.A.K.Mouw@its.tudelft.nl) + * Copyright (C) 2001, Erik Mouw (mouw@nl.linux.org) * * This file accompanies the procfs-guide in the Linux kernel * source. Its main use is to demonstrate the concepts and * functions described in the guide. * * This software has been developed while working on the LART - * computing board (http://www.lart.tudelft.nl/), which is - * sponsored by the Mobile Multi-media Communications - * (http://www.mmc.tudelft.nl/) and Ubiquitous Communications - * (http://www.ubicom.tudelft.nl/) projects. - * - * The author can be reached at: - * - * Erik Mouw - * Information and Communication Theory Group - * Faculty of Information Technology and Systems - * Delft University of Technology - * P.O. Box 5031 - * 2600 GA Delft - * The Netherlands - * + * computing board (http://www.lartmaker.nl), which was sponsored + * by the Delt University of Technology projects Mobile Multi-media + * Communications and Ubiquitous Communications. * * This program is free software; you can redistribute * it and/or modify it under the terms of the GNU General diff --git a/Documentation/DocBook/videobook.tmpl b/Documentation/DocBook/videobook.tmpl deleted file mode 100644 index 0bc25949b668..000000000000 --- a/Documentation/DocBook/videobook.tmpl +++ /dev/null @@ -1,1654 +0,0 @@ -<?xml version="1.0" encoding="UTF-8"?> -<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN" - "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []> - -<book id="V4LGuide"> - <bookinfo> - <title>Video4Linux Programming</title> - - <authorgroup> - <author> - <firstname>Alan</firstname> - <surname>Cox</surname> - <affiliation> - <address> - <email>alan@redhat.com</email> - </address> - </affiliation> - </author> - </authorgroup> - - <copyright> - <year>2000</year> - <holder>Alan Cox</holder> - </copyright> - - <legalnotice> - <para> - This documentation is free software; you can redistribute - it and/or modify it under the terms of the GNU General Public - License as published by the Free Software Foundation; either - version 2 of the License, or (at your option) any later - version. - </para> - - <para> - This program is distributed in the hope that it will be - useful, but WITHOUT ANY WARRANTY; without even the implied - warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - See the GNU General Public License for more details. - </para> - - <para> - You should have received a copy of the GNU General Public - License along with this program; if not, write to the Free - Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, - MA 02111-1307 USA - </para> - - <para> - For more details see the file COPYING in the source - distribution of Linux. - </para> - </legalnotice> - </bookinfo> - -<toc></toc> - - <chapter id="intro"> - <title>Introduction</title> - <para> - Parts of this document first appeared in Linux Magazine under a - ninety day exclusivity. - </para> - <para> - Video4Linux is intended to provide a common programming interface - for the many TV and capture cards now on the market, as well as - parallel port and USB video cameras. Radio, teletext decoders and - vertical blanking data interfaces are also provided. - </para> - </chapter> - <chapter id="radio"> - <title>Radio Devices</title> - <para> - There are a wide variety of radio interfaces available for PC's, and these - are generally very simple to program. The biggest problem with supporting - such devices is normally extracting documentation from the vendor. - </para> - <para> - The radio interface supports a simple set of control ioctls standardised - across all radio and tv interfaces. It does not support read or write, which - are used for video streams. The reason radio cards do not allow you to read - the audio stream into an application is that without exception they provide - a connection on to a soundcard. Soundcards can be used to read the radio - data just fine. - </para> - <sect1 id="registerradio"> - <title>Registering Radio Devices</title> - <para> - The Video4linux core provides an interface for registering devices. The - first step in writing our radio card driver is to register it. - </para> - <programlisting> - - -static struct video_device my_radio -{ - "My radio", - VID_TYPE_TUNER, - radio_open. - radio_close, - NULL, /* no read */ - NULL, /* no write */ - NULL, /* no poll */ - radio_ioctl, - NULL, /* no special init function */ - NULL /* no private data */ -}; - - - </programlisting> - <para> - This declares our video4linux device driver interface. The VID_TYPE_ value - defines what kind of an interface we are, and defines basic capabilities. - </para> - <para> - The only defined value relevant for a radio card is VID_TYPE_TUNER which - indicates that the device can be tuned. Clearly our radio is going to have some - way to change channel so it is tuneable. - </para> - <para> - We declare an open and close routine, but we do not need read or write, - which are used to read and write video data to or from the card itself. As - we have no read or write there is no poll function. - </para> - <para> - The private initialise function is run when the device is registered. In - this driver we've already done all the work needed. The final pointer is a - private data pointer that can be used by the device driver to attach and - retrieve private data structures. We set this field "priv" to NULL for - the moment. - </para> - <para> - Having the structure defined is all very well but we now need to register it - with the kernel. - </para> - <programlisting> - - -static int io = 0x320; - -int __init myradio_init(struct video_init *v) -{ - if(!request_region(io, MY_IO_SIZE, "myradio")) - { - printk(KERN_ERR - "myradio: port 0x%03X is in use.\n", io); - return -EBUSY; - } - - if(video_device_register(&my_radio, VFL_TYPE_RADIO)==-1) { - release_region(io, MY_IO_SIZE); - return -EINVAL; - } - return 0; -} - - </programlisting> - <para> - The first stage of the initialisation, as is normally the case, is to check - that the I/O space we are about to fiddle with doesn't belong to some other - driver. If it is we leave well alone. If the user gives the address of the - wrong device then we will spot this. These policies will generally avoid - crashing the machine. - </para> - <para> - Now we ask the Video4Linux layer to register the device for us. We hand it - our carefully designed video_device structure and also tell it which group - of devices we want it registered with. In this case VFL_TYPE_RADIO. - </para> - <para> - The types available are - </para> - <table frame="all" id="Device_Types"><title>Device Types</title> - <tgroup cols="3" align="left"> - <tbody> - <row> - <entry>VFL_TYPE_RADIO</entry><entry>/dev/radio{n}</entry><entry> - - Radio devices are assigned in this block. As with all of these - selections the actual number assignment is done by the video layer - accordijng to what is free.</entry> - </row><row> - <entry>VFL_TYPE_GRABBER</entry><entry>/dev/video{n}</entry><entry> - Video capture devices and also -- counter-intuitively for the name -- - hardware video playback devices such as MPEG2 cards.</entry> - </row><row> - <entry>VFL_TYPE_VBI</entry><entry>/dev/vbi{n}</entry><entry> - The VBI devices capture the hidden lines on a television picture - that carry further information like closed caption data, teletext - (primarily in Europe) and now Intercast and the ATVEC internet - television encodings.</entry> - </row><row> - <entry>VFL_TYPE_VTX</entry><entry>/dev/vtx[n}</entry><entry> - VTX is 'Videotext' also known as 'Teletext'. This is a system for - sending numbered, 40x25, mostly textual page images over the hidden - lines. Unlike the /dev/vbi interfaces, this is for 'smart' decoder - chips. (The use of the word smart here has to be taken in context, - the smartest teletext chips are fairly dumb pieces of technology). - </entry> - </row> - </tbody> - </tgroup> - </table> - <para> - We are most definitely a radio. - </para> - <para> - Finally we allocate our I/O space so that nobody treads on us and return 0 - to signify general happiness with the state of the universe. - </para> - </sect1> - <sect1 id="openradio"> - <title>Opening And Closing The Radio</title> - - <para> - The functions we declared in our video_device are mostly very simple. - Firstly we can drop in what is basically standard code for open and close. - </para> - <programlisting> - - -static int users = 0; - -static int radio_open(struct video_device *dev, int flags) -{ - if(users) - return -EBUSY; - users++; - return 0; -} - - </programlisting> - <para> - At open time we need to do nothing but check if someone else is also using - the radio card. If nobody is using it we make a note that we are using it, - then we ensure that nobody unloads our driver on us. - </para> - <programlisting> - - -static int radio_close(struct video_device *dev) -{ - users--; -} - - </programlisting> - <para> - At close time we simply need to reduce the user count and allow the module - to become unloadable. - </para> - <para> - If you are sharp you will have noticed neither the open nor the close - routines attempt to reset or change the radio settings. This is intentional. - It allows an application to set up the radio and exit. It avoids a user - having to leave an application running all the time just to listen to the - radio. - </para> - </sect1> - <sect1 id="ioctlradio"> - <title>The Ioctl Interface</title> - <para> - This leaves the ioctl routine, without which the driver will not be - terribly useful to anyone. - </para> - <programlisting> - - -static int radio_ioctl(struct video_device *dev, unsigned int cmd, void *arg) -{ - switch(cmd) - { - case VIDIOCGCAP: - { - struct video_capability v; - v.type = VID_TYPE_TUNER; - v.channels = 1; - v.audios = 1; - v.maxwidth = 0; - v.minwidth = 0; - v.maxheight = 0; - v.minheight = 0; - strcpy(v.name, "My Radio"); - if(copy_to_user(arg, &v, sizeof(v))) - return -EFAULT; - return 0; - } - - </programlisting> - <para> - VIDIOCGCAP is the first ioctl all video4linux devices must support. It - allows the applications to find out what sort of a card they have found and - to figure out what they want to do about it. The fields in the structure are - </para> - <table frame="all" id="video_capability_fields"><title>struct video_capability fields</title> - <tgroup cols="2" align="left"> - <tbody> - <row> - <entry>name</entry><entry>The device text name. This is intended for the user.</entry> - </row><row> - <entry>channels</entry><entry>The number of different channels you can tune on - this card. It could even by zero for a card that has - no tuning capability. For our simple FM radio it is 1. - An AM/FM radio would report 2.</entry> - </row><row> - <entry>audios</entry><entry>The number of audio inputs on this device. For our - radio there is only one audio input.</entry> - </row><row> - <entry>minwidth,minheight</entry><entry>The smallest size the card is capable of capturing - images in. We set these to zero. Radios do not - capture pictures</entry> - </row><row> - <entry>maxwidth,maxheight</entry><entry>The largest image size the card is capable of - capturing. For our radio we report 0. - </entry> - </row><row> - <entry>type</entry><entry>This reports the capabilities of the device, and - matches the field we filled in in the struct - video_device when registering.</entry> - </row> - </tbody> - </tgroup> - </table> - <para> - Having filled in the fields, we use copy_to_user to copy the structure into - the users buffer. If the copy fails we return an EFAULT to the application - so that it knows it tried to feed us garbage. - </para> - <para> - The next pair of ioctl operations select which tuner is to be used and let - the application find the tuner properties. We have only a single FM band - tuner in our example device. - </para> - <programlisting> - - - case VIDIOCGTUNER: - { - struct video_tuner v; - if(copy_from_user(&v, arg, sizeof(v))!=0) - return -EFAULT; - if(v.tuner) - return -EINVAL; - v.rangelow=(87*16000); - v.rangehigh=(108*16000); - v.flags = VIDEO_TUNER_LOW; - v.mode = VIDEO_MODE_AUTO; - v.signal = 0xFFFF; - strcpy(v.name, "FM"); - if(copy_to_user(&v, arg, sizeof(v))!=0) - return -EFAULT; - return 0; - } - - </programlisting> - <para> - The VIDIOCGTUNER ioctl allows applications to query a tuner. The application - sets the tuner field to the tuner number it wishes to query. The query does - not change the tuner that is being used, it merely enquires about the tuner - in question. - </para> - <para> - We have exactly one tuner so after copying the user buffer to our temporary - structure we complain if they asked for a tuner other than tuner 0. - </para> - <para> - The video_tuner structure has the following fields - </para> - <table frame="all" id="video_tuner_fields"><title>struct video_tuner fields</title> - <tgroup cols="2" align="left"> - <tbody> - <row> - <entry>int tuner</entry><entry>The number of the tuner in question</entry> - </row><row> - <entry>char name[32]</entry><entry>A text description of this tuner. "FM" will do fine. - This is intended for the application.</entry> - </row><row> - <entry>u32 flags</entry> - <entry>Tuner capability flags</entry> - </row> - <row> - <entry>u16 mode</entry><entry>The current reception mode</entry> - - </row><row> - <entry>u16 signal</entry><entry>The signal strength scaled between 0 and 65535. If - a device cannot tell the signal strength it should - report 65535. Many simple cards contain only a - signal/no signal bit. Such cards will report either - 0 or 65535.</entry> - - </row><row> - <entry>u32 rangelow, rangehigh</entry><entry> - The range of frequencies supported by the radio - or TV. It is scaled according to the VIDEO_TUNER_LOW - flag.</entry> - - </row> - </tbody> - </tgroup> - </table> - - <table frame="all" id="video_tuner_flags"><title>struct video_tuner flags</title> - <tgroup cols="2" align="left"> - <tbody> - <row> - <entry>VIDEO_TUNER_PAL</entry><entry>A PAL TV tuner</entry> - </row><row> - <entry>VIDEO_TUNER_NTSC</entry><entry>An NTSC (US) TV tuner</entry> - </row><row> - <entry>VIDEO_TUNER_SECAM</entry><entry>A SECAM (French) TV tuner</entry> - </row><row> - <entry>VIDEO_TUNER_LOW</entry><entry> - The tuner frequency is scaled in 1/16th of a KHz - steps. If not it is in 1/16th of a MHz steps - </entry> - </row><row> - <entry>VIDEO_TUNER_NORM</entry><entry>The tuner can set its format</entry> - </row><row> - <entry>VIDEO_TUNER_STEREO_ON</entry><entry>The tuner is currently receiving a stereo signal</entry> - </row> - </tbody> - </tgroup> - </table> - - <table frame="all" id="video_tuner_modes"><title>struct video_tuner modes</title> - <tgroup cols="2" align="left"> - <tbody> - <row> - <entry>VIDEO_MODE_PAL</entry><entry>PAL Format</entry> - </row><row> - <entry>VIDEO_MODE_NTSC</entry><entry>NTSC Format (USA)</entry> - </row><row> - <entry>VIDEO_MODE_SECAM</entry><entry>French Format</entry> - </row><row> - <entry>VIDEO_MODE_AUTO</entry><entry>A device that does not need to do - TV format switching</entry> - </row> - </tbody> - </tgroup> - </table> - <para> - The settings for the radio card are thus fairly simple. We report that we - are a tuner called "FM" for FM radio. In order to get the best tuning - resolution we report VIDEO_TUNER_LOW and select tuning to 1/16th of KHz. Its - unlikely our card can do that resolution but it is a fair bet the card can - do better than 1/16th of a MHz. VIDEO_TUNER_LOW is appropriate to almost all - radio usage. - </para> - <para> - We report that the tuner automatically handles deciding what format it is - receiving - true enough as it only handles FM radio. Our example card is - also incapable of detecting stereo or signal strengths so it reports a - strength of 0xFFFF (maximum) and no stereo detected. - </para> - <para> - To finish off we set the range that can be tuned to be 87-108Mhz, the normal - FM broadcast radio range. It is important to find out what the card is - actually capable of tuning. It is easy enough to simply use the FM broadcast - range. Unfortunately if you do this you will discover the FM broadcast - ranges in the USA, Europe and Japan are all subtly different and some users - cannot receive all the stations they wish. - </para> - <para> - The application also needs to be able to set the tuner it wishes to use. In - our case, with a single tuner this is rather simple to arrange. - </para> - <programlisting> - - case VIDIOCSTUNER: - { - struct video_tuner v; - if(copy_from_user(&v, arg, sizeof(v))) - return -EFAULT; - if(v.tuner != 0) - return -EINVAL; - return 0; - } - - </programlisting> - <para> - We copy the user supplied structure into kernel memory so we can examine it. - If the user has selected a tuner other than zero we reject the request. If - they wanted tuner 0 then, surprisingly enough, that is the current tuner already. - </para> - <para> - The next two ioctls we need to provide are to get and set the frequency of - the radio. These both use an unsigned long argument which is the frequency. - The scale of the frequency depends on the VIDEO_TUNER_LOW flag as I - mentioned earlier on. Since we have VIDEO_TUNER_LOW set this will be in - 1/16ths of a KHz. - </para> - <programlisting> - -static unsigned long current_freq; - - - - case VIDIOCGFREQ: - if(copy_to_user(arg, &current_freq, - sizeof(unsigned long)) - return -EFAULT; - return 0; - - </programlisting> - <para> - Querying the frequency in our case is relatively simple. Our radio card is - too dumb to let us query the signal strength so we remember our setting if - we know it. All we have to do is copy it to the user. - </para> - <programlisting> - - - case VIDIOCSFREQ: - { - u32 freq; - if(copy_from_user(arg, &freq, - sizeof(unsigned long))!=0) - return -EFAULT; - if(hardware_set_freq(freq)<0) - return -EINVAL; - current_freq = freq; - return 0; - } - - </programlisting> - <para> - Setting the frequency is a little more complex. We begin by copying the - desired frequency into kernel space. Next we call a hardware specific routine - to set the radio up. This might be as simple as some scaling and a few - writes to an I/O port. For most radio cards it turns out a good deal more - complicated and may involve programming things like a phase locked loop on - the card. This is what documentation is for. - </para> - <para> - The final set of operations we need to provide for our radio are the - volume controls. Not all radio cards can even do volume control. After all - there is a perfectly good volume control on the sound card. We will assume - our radio card has a simple 4 step volume control. - </para> - <para> - There are two ioctls with audio we need to support - </para> - <programlisting> - -static int current_volume=0; - - case VIDIOCGAUDIO: - { - struct video_audio v; - if(copy_from_user(&v, arg, sizeof(v))) - return -EFAULT; - if(v.audio != 0) - return -EINVAL; - v.volume = 16384*current_volume; - v.step = 16384; - strcpy(v.name, "Radio"); - v.mode = VIDEO_SOUND_MONO; - v.balance = 0; - v.base = 0; - v.treble = 0; - - if(copy_to_user(arg. &v, sizeof(v))) - return -EFAULT; - return 0; - } - - </programlisting> - <para> - Much like the tuner we start by copying the user structure into kernel - space. Again we check if the user has asked for a valid audio input. We have - only input 0 and we punt if they ask for another input. - </para> - <para> - Then we fill in the video_audio structure. This has the following format - </para> - <table frame="all" id="video_audio_fields"><title>struct video_audio fields</title> - <tgroup cols="2" align="left"> - <tbody> - <row> - <entry>audio</entry><entry>The input the user wishes to query</entry> - </row><row> - <entry>volume</entry><entry>The volume setting on a scale of 0-65535</entry> - </row><row> - <entry>base</entry><entry>The base level on a scale of 0-65535</entry> - </row><row> - <entry>treble</entry><entry>The treble level on a scale of 0-65535</entry> - </row><row> - <entry>flags</entry><entry>The features this audio device supports - </entry> - </row><row> - <entry>name</entry><entry>A text name to display to the user. We picked - "Radio" as it explains things quite nicely.</entry> - </row><row> - <entry>mode</entry><entry>The current reception mode for the audio - - We report MONO because our card is too stupid to know if it is in - mono or stereo. - </entry> - </row><row> - <entry>balance</entry><entry>The stereo balance on a scale of 0-65535, 32768 is - middle.</entry> - </row><row> - <entry>step</entry><entry>The step by which the volume control jumps. This is - used to help make it easy for applications to set - slider behaviour.</entry> - </row> - </tbody> - </tgroup> - </table> - - <table frame="all" id="video_audio_flags"><title>struct video_audio flags</title> - <tgroup cols="2" align="left"> - <tbody> - <row> - <entry>VIDEO_AUDIO_MUTE</entry><entry>The audio is currently muted. We - could fake this in our driver but we - choose not to bother.</entry> - </row><row> - <entry>VIDEO_AUDIO_MUTABLE</entry><entry>The input has a mute option</entry> - </row><row> - <entry>VIDEO_AUDIO_TREBLE</entry><entry>The input has a treble control</entry> - </row><row> - <entry>VIDEO_AUDIO_BASS</entry><entry>The input has a base control</entry> - </row> - </tbody> - </tgroup> - </table> - - <table frame="all" id="video_audio_modes"><title>struct video_audio modes</title> - <tgroup cols="2" align="left"> - <tbody> - <row> - <entry>VIDEO_SOUND_MONO</entry><entry>Mono sound</entry> - </row><row> - <entry>VIDEO_SOUND_STEREO</entry><entry>Stereo sound</entry> - </row><row> - <entry>VIDEO_SOUND_LANG1</entry><entry>Alternative language 1 (TV specific)</entry> - </row><row> - <entry>VIDEO_SOUND_LANG2</entry><entry>Alternative language 2 (TV specific)</entry> - </row> - </tbody> - </tgroup> - </table> - <para> - Having filled in the structure we copy it back to user space. - </para> - <para> - The VIDIOCSAUDIO ioctl allows the user to set the audio parameters in the - video_audio structure. The driver does its best to honour the request. - </para> - <programlisting> - - case VIDIOCSAUDIO: - { - struct video_audio v; - if(copy_from_user(&v, arg, sizeof(v))) - return -EFAULT; - if(v.audio) - return -EINVAL; - current_volume = v/16384; - hardware_set_volume(current_volume); - return 0; - } - - </programlisting> - <para> - In our case there is very little that the user can set. The volume is - basically the limit. Note that we could pretend to have a mute feature - by rewriting this to - </para> - <programlisting> - - case VIDIOCSAUDIO: - { - struct video_audio v; - if(copy_from_user(&v, arg, sizeof(v))) - return -EFAULT; - if(v.audio) - return -EINVAL; - current_volume = v/16384; - if(v.flags&VIDEO_AUDIO_MUTE) - hardware_set_volume(0); - else - hardware_set_volume(current_volume); - current_muted = v.flags & - VIDEO_AUDIO_MUTE; - return 0; - } - - </programlisting> - <para> - This with the corresponding changes to the VIDIOCGAUDIO code to report the - state of the mute flag we save and to report the card has a mute function, - will allow applications to use a mute facility with this card. It is - questionable whether this is a good idea however. User applications can already - fake this themselves and kernel space is precious. - </para> - <para> - We now have a working radio ioctl handler. So we just wrap up the function - </para> - <programlisting> - - - } - return -ENOIOCTLCMD; -} - - </programlisting> - <para> - and pass the Video4Linux layer back an error so that it knows we did not - understand the request we got passed. - </para> - </sect1> - <sect1 id="modradio"> - <title>Module Wrapper</title> - <para> - Finally we add in the usual module wrapping and the driver is done. - </para> - <programlisting> - -#ifndef MODULE - -static int io = 0x300; - -#else - -static int io = -1; - -#endif - -MODULE_AUTHOR("Alan Cox"); -MODULE_DESCRIPTION("A driver for an imaginary radio card."); -module_param(io, int, 0444); -MODULE_PARM_DESC(io, "I/O address of the card."); - -static int __init init(void) -{ - if(io==-1) - { - printk(KERN_ERR - "You must set an I/O address with io=0x???\n"); - return -EINVAL; - } - return myradio_init(NULL); -} - -static void __exit cleanup(void) -{ - video_unregister_device(&my_radio); - release_region(io, MY_IO_SIZE); -} - -module_init(init); -module_exit(cleanup); - - </programlisting> - <para> - In this example we set the IO base by default if the driver is compiled into - the kernel: you can still set it using "my_radio.irq" if this file is called <filename>my_radio.c</filename>. For the module we require the - user sets the parameter. We set io to a nonsense port (-1) so that we can - tell if the user supplied an io parameter or not. - </para> - <para> - We use MODULE_ defines to give an author for the card driver and a - description. We also use them to declare that io is an integer and it is the - address of the card, and can be read by anyone from sysfs. - </para> - <para> - The clean-up routine unregisters the video_device we registered, and frees - up the I/O space. Note that the unregister takes the actual video_device - structure as its argument. Unlike the file operations structure which can be - shared by all instances of a device a video_device structure as an actual - instance of the device. If you are registering multiple radio devices you - need to fill in one structure per device (most likely by setting up a - template and copying it to each of the actual device structures). - </para> - </sect1> - </chapter> - <chapter id="Video_Capture_Devices"> - <title>Video Capture Devices</title> - <sect1 id="introvid"> - <title>Video Capture Device Types</title> - <para> - The video capture devices share the same interfaces as radio devices. In - order to explain the video capture interface I will use the example of a - camera that has no tuners or audio input. This keeps the example relatively - clean. To get both combine the two driver examples. - </para> - <para> - Video capture devices divide into four categories. A little technology - backgrounder. Full motion video even at television resolution (which is - actually fairly low) is pretty resource-intensive. You are continually - passing megabytes of data every second from the capture card to the display. - several alternative approaches have emerged because copying this through the - processor and the user program is a particularly bad idea . - </para> - <para> - The first is to add the television image onto the video output directly. - This is also how some 3D cards work. These basic cards can generally drop the - video into any chosen rectangle of the display. Cards like this, which - include most mpeg1 cards that used the feature connector, aren't very - friendly in a windowing environment. They don't understand windows or - clipping. The video window is always on the top of the display. - </para> - <para> - Chroma keying is a technique used by cards to get around this. It is an old - television mixing trick where you mark all the areas you wish to replace - with a single clear colour that isn't used in the image - TV people use an - incredibly bright blue while computing people often use a particularly - virulent purple. Bright blue occurs on the desktop. Anyone with virulent - purple windows has another problem besides their TV overlay. - </para> - <para> - The third approach is to copy the data from the capture card to the video - card, but to do it directly across the PCI bus. This relieves the processor - from doing the work but does require some smartness on the part of the video - capture chip, as well as a suitable video card. Programming this kind of - card and more so debugging it can be extremely tricky. There are some quite - complicated interactions with the display and you may also have to cope with - various chipset bugs that show up when PCI cards start talking to each - other. - </para> - <para> - To keep our example fairly simple we will assume a card that supports - overlaying a flat rectangular image onto the frame buffer output, and which - can also capture stuff into processor memory. - </para> - </sect1> - <sect1 id="regvid"> - <title>Registering Video Capture Devices</title> - <para> - This time we need to add more functions for our camera device. - </para> - <programlisting> -static struct video_device my_camera -{ - "My Camera", - VID_TYPE_OVERLAY|VID_TYPE_SCALES|\ - VID_TYPE_CAPTURE|VID_TYPE_CHROMAKEY, - camera_open. - camera_close, - camera_read, /* no read */ - NULL, /* no write */ - camera_poll, /* no poll */ - camera_ioctl, - NULL, /* no special init function */ - NULL /* no private data */ -}; - </programlisting> - <para> - We need a read() function which is used for capturing data from - the card, and we need a poll function so that a driver can wait for the next - frame to be captured. - </para> - <para> - We use the extra video capability flags that did not apply to the - radio interface. The video related flags are - </para> - <table frame="all" id="Capture_Capabilities"><title>Capture Capabilities</title> - <tgroup cols="2" align="left"> - <tbody> - <row> -<entry>VID_TYPE_CAPTURE</entry><entry>We support image capture</entry> -</row><row> -<entry>VID_TYPE_TELETEXT</entry><entry>A teletext capture device (vbi{n])</entry> -</row><row> -<entry>VID_TYPE_OVERLAY</entry><entry>The image can be directly overlaid onto the - frame buffer</entry> -</row><row> -<entry>VID_TYPE_CHROMAKEY</entry><entry>Chromakey can be used to select which parts - of the image to display</entry> -</row><row> -<entry>VID_TYPE_CLIPPING</entry><entry>It is possible to give the board a list of - rectangles to draw around. </entry> -</row><row> -<entry>VID_TYPE_FRAMERAM</entry><entry>The video capture goes into the video memory - and actually changes it. Applications need - to know this so they can clean up after the - card</entry> -</row><row> -<entry>VID_TYPE_SCALES</entry><entry>The image can be scaled to various sizes, - rather than being a single fixed size.</entry> -</row><row> -<entry>VID_TYPE_MONOCHROME</entry><entry>The capture will be monochrome. This isn't a - complete answer to the question since a mono - camera on a colour capture card will still - produce mono output.</entry> -</row><row> -<entry>VID_TYPE_SUBCAPTURE</entry><entry>The card allows only part of its field of - view to be captured. This enables - applications to avoid copying all of a large - image into memory when only some section is - relevant.</entry> - </row> - </tbody> - </tgroup> - </table> - <para> - We set VID_TYPE_CAPTURE so that we are seen as a capture card, - VID_TYPE_CHROMAKEY so the application knows it is time to draw in virulent - purple, and VID_TYPE_SCALES because we can be resized. - </para> - <para> - Our setup is fairly similar. This time we also want an interrupt line - for the 'frame captured' signal. Not all cards have this so some of them - cannot handle poll(). - </para> - <programlisting> - - -static int io = 0x320; -static int irq = 11; - -int __init mycamera_init(struct video_init *v) -{ - if(!request_region(io, MY_IO_SIZE, "mycamera")) - { - printk(KERN_ERR - "mycamera: port 0x%03X is in use.\n", io); - return -EBUSY; - } - - if(video_device_register(&my_camera, - VFL_TYPE_GRABBER)==-1) { - release_region(io, MY_IO_SIZE); - return -EINVAL; - } - return 0; -} - - </programlisting> - <para> - This is little changed from the needs of the radio card. We specify - VFL_TYPE_GRABBER this time as we want to be allocated a /dev/video name. - </para> - </sect1> - <sect1 id="opvid"> - <title>Opening And Closing The Capture Device</title> - <programlisting> - - -static int users = 0; - -static int camera_open(struct video_device *dev, int flags) -{ - if(users) - return -EBUSY; - if(request_irq(irq, camera_irq, 0, "camera", dev)<0) - return -EBUSY; - users++; - return 0; -} - - -static int camera_close(struct video_device *dev) -{ - users--; - free_irq(irq, dev); -} - </programlisting> - <para> - The open and close routines are also quite similar. The only real change is - that we now request an interrupt for the camera device interrupt line. If we - cannot get the interrupt we report EBUSY to the application and give up. - </para> - </sect1> - <sect1 id="irqvid"> - <title>Interrupt Handling</title> - <para> - Our example handler is for an ISA bus device. If it was PCI you would be - able to share the interrupt and would have set IRQF_SHARED to indicate a - shared IRQ. We pass the device pointer as the interrupt routine argument. We - don't need to since we only support one card but doing this will make it - easier to upgrade the driver for multiple devices in the future. - </para> - <para> - Our interrupt routine needs to do little if we assume the card can simply - queue one frame to be read after it captures it. - </para> - <programlisting> - - -static struct wait_queue *capture_wait; -static int capture_ready = 0; - -static void camera_irq(int irq, void *dev_id, - struct pt_regs *regs) -{ - capture_ready=1; - wake_up_interruptible(&capture_wait); -} - </programlisting> - <para> - The interrupt handler is nice and simple for this card as we are assuming - the card is buffering the frame for us. This means we have little to do but - wake up anybody interested. We also set a capture_ready flag, as we may - capture a frame before an application needs it. In this case we need to know - that a frame is ready. If we had to collect the frame on the interrupt life - would be more complex. - </para> - <para> - The two new routines we need to supply are camera_read which returns a - frame, and camera_poll which waits for a frame to become ready. - </para> - <programlisting> - - -static int camera_poll(struct video_device *dev, - struct file *file, struct poll_table *wait) -{ - poll_wait(file, &capture_wait, wait); - if(capture_read) - return POLLIN|POLLRDNORM; - return 0; -} - - </programlisting> - <para> - Our wait queue for polling is the capture_wait queue. This will cause the - task to be woken up by our camera_irq routine. We check capture_read to see - if there is an image present and if so report that it is readable. - </para> - </sect1> - <sect1 id="rdvid"> - <title>Reading The Video Image</title> - <programlisting> - - -static long camera_read(struct video_device *dev, char *buf, - unsigned long count) -{ - struct wait_queue wait = { current, NULL }; - u8 *ptr; - int len; - int i; - - add_wait_queue(&capture_wait, &wait); - - while(!capture_ready) - { - if(file->flags&O_NDELAY) - { - remove_wait_queue(&capture_wait, &wait); - current->state = TASK_RUNNING; - return -EWOULDBLOCK; - } - if(signal_pending(current)) - { - remove_wait_queue(&capture_wait, &wait); - current->state = TASK_RUNNING; - return -ERESTARTSYS; - } - schedule(); - current->state = TASK_INTERRUPTIBLE; - } - remove_wait_queue(&capture_wait, &wait); - current->state = TASK_RUNNING; - - </programlisting> - <para> - The first thing we have to do is to ensure that the application waits until - the next frame is ready. The code here is almost identical to the mouse code - we used earlier in this chapter. It is one of the common building blocks of - Linux device driver code and probably one which you will find occurs in any - drivers you write. - </para> - <para> - We wait for a frame to be ready, or for a signal to interrupt our waiting. If a - signal occurs we need to return from the system call so that the signal can - be sent to the application itself. We also check to see if the user actually - wanted to avoid waiting - ie if they are using non-blocking I/O and have other things - to get on with. - </para> - <para> - Next we copy the data from the card to the user application. This is rarely - as easy as our example makes out. We will add capture_w, and capture_h here - to hold the width and height of the captured image. We assume the card only - supports 24bit RGB for now. - </para> - <programlisting> - - - - capture_ready = 0; - - ptr=(u8 *)buf; - len = capture_w * 3 * capture_h; /* 24bit RGB */ - - if(len>count) - len=count; /* Doesn't all fit */ - - for(i=0; i<len; i++) - { - put_user(inb(io+IMAGE_DATA), ptr); - ptr++; - } - - hardware_restart_capture(); - - return i; -} - - </programlisting> - <para> - For a real hardware device you would try to avoid the loop with put_user(). - Each call to put_user() has a time overhead checking whether the accesses to user - space are allowed. It would be better to read a line into a temporary buffer - then copy this to user space in one go. - </para> - <para> - Having captured the image and put it into user space we can kick the card to - get the next frame acquired. - </para> - </sect1> - <sect1 id="iocvid"> - <title>Video Ioctl Handling</title> - <para> - As with the radio driver the major control interface is via the ioctl() - function. Video capture devices support the same tuner calls as a radio - device and also support additional calls to control how the video functions - are handled. In this simple example the card has no tuners to avoid making - the code complex. - </para> - <programlisting> - - - -static int camera_ioctl(struct video_device *dev, unsigned int cmd, void *arg) -{ - switch(cmd) - { - case VIDIOCGCAP: - { - struct video_capability v; - v.type = VID_TYPE_CAPTURE|\ - VID_TYPE_CHROMAKEY|\ - VID_TYPE_SCALES|\ - VID_TYPE_OVERLAY; - v.channels = 1; - v.audios = 0; - v.maxwidth = 640; - v.minwidth = 16; - v.maxheight = 480; - v.minheight = 16; - strcpy(v.name, "My Camera"); - if(copy_to_user(arg, &v, sizeof(v))) - return -EFAULT; - return 0; - } - - - </programlisting> - <para> - The first ioctl we must support and which all video capture and radio - devices are required to support is VIDIOCGCAP. This behaves exactly the same - as with a radio device. This time, however, we report the extra capabilities - we outlined earlier on when defining our video_dev structure. - </para> - <para> - We now set the video flags saying that we support overlay, capture, - scaling and chromakey. We also report size limits - our smallest image is - 16x16 pixels, our largest is 640x480. - </para> - <para> - To keep things simple we report no audio and no tuning capabilities at all. - </para> - <programlisting> - - case VIDIOCGCHAN: - { - struct video_channel v; - if(copy_from_user(&v, arg, sizeof(v))) - return -EFAULT; - if(v.channel != 0) - return -EINVAL; - v.flags = 0; - v.tuners = 0; - v.type = VIDEO_TYPE_CAMERA; - v.norm = VIDEO_MODE_AUTO; - strcpy(v.name, "Camera Input");break; - if(copy_to_user(&v, arg, sizeof(v))) - return -EFAULT; - return 0; - } - - - </programlisting> - <para> - This follows what is very much the standard way an ioctl handler looks - in Linux. We copy the data into a kernel space variable and we check that the - request is valid (in this case that the input is 0). Finally we copy the - camera info back to the user. - </para> - <para> - The VIDIOCGCHAN ioctl allows a user to ask about video channels (that is - inputs to the video card). Our example card has a single camera input. The - fields in the structure are - </para> - <table frame="all" id="video_channel_fields"><title>struct video_channel fields</title> - <tgroup cols="2" align="left"> - <tbody> - <row> - - <entry>channel</entry><entry>The channel number we are selecting</entry> - </row><row> - <entry>name</entry><entry>The name for this channel. This is intended - to describe the port to the user. - Appropriate names are therefore things like - "Camera" "SCART input"</entry> - </row><row> - <entry>flags</entry><entry>Channel properties</entry> - </row><row> - <entry>type</entry><entry>Input type</entry> - </row><row> - <entry>norm</entry><entry>The current television encoding being used - if relevant for this channel. - </entry> - </row> - </tbody> - </tgroup> - </table> - <table frame="all" id="video_channel_flags"><title>struct video_channel flags</title> - <tgroup cols="2" align="left"> - <tbody> - <row> - <entry>VIDEO_VC_TUNER</entry><entry>Channel has a tuner.</entry> - </row><row> - <entry>VIDEO_VC_AUDIO</entry><entry>Channel has audio.</entry> - </row> - </tbody> - </tgroup> - </table> - <table frame="all" id="video_channel_types"><title>struct video_channel types</title> - <tgroup cols="2" align="left"> - <tbody> - <row> - <entry>VIDEO_TYPE_TV</entry><entry>Television input.</entry> - </row><row> - <entry>VIDEO_TYPE_CAMERA</entry><entry>Fixed camera input.</entry> - </row><row> - <entry>0</entry><entry>Type is unknown.</entry> - </row> - </tbody> - </tgroup> - </table> - <table frame="all" id="video_channel_norms"><title>struct video_channel norms</title> - <tgroup cols="2" align="left"> - <tbody> - <row> - <entry>VIDEO_MODE_PAL</entry><entry>PAL encoded Television</entry> - </row><row> - <entry>VIDEO_MODE_NTSC</entry><entry>NTSC (US) encoded Television</entry> - </row><row> - <entry>VIDEO_MODE_SECAM</entry><entry>SECAM (French) Television </entry> - </row><row> - <entry>VIDEO_MODE_AUTO</entry><entry>Automatic switching, or format does not - matter</entry> - </row> - </tbody> - </tgroup> - </table> - <para> - The corresponding VIDIOCSCHAN ioctl allows a user to change channel and to - request the norm is changed - for example to switch between a PAL or an NTSC - format camera. - </para> - <programlisting> - - - case VIDIOCSCHAN: - { - struct video_channel v; - if(copy_from_user(&v, arg, sizeof(v))) - return -EFAULT; - if(v.channel != 0) - return -EINVAL; - if(v.norm != VIDEO_MODE_AUTO) - return -EINVAL; - return 0; - } - - - </programlisting> - <para> - The implementation of this call in our driver is remarkably easy. Because we - are assuming fixed format hardware we need only check that the user has not - tried to change anything. - </para> - <para> - The user also needs to be able to configure and adjust the picture they are - seeing. This is much like adjusting a television set. A user application - also needs to know the palette being used so that it knows how to display - the image that has been captured. The VIDIOCGPICT and VIDIOCSPICT ioctl - calls provide this information. - </para> - <programlisting> - - - case VIDIOCGPICT - { - struct video_picture v; - v.brightness = hardware_brightness(); - v.hue = hardware_hue(); - v.colour = hardware_saturation(); - v.contrast = hardware_brightness(); - /* Not settable */ - v.whiteness = 32768; - v.depth = 24; /* 24bit */ - v.palette = VIDEO_PALETTE_RGB24; - if(copy_to_user(&v, arg, - sizeof(v))) - return -EFAULT; - return 0; - } - - - </programlisting> - <para> - The brightness, hue, color, and contrast provide the picture controls that - are akin to a conventional television. Whiteness provides additional - control for greyscale images. All of these values are scaled between 0-65535 - and have 32768 as the mid point setting. The scaling means that applications - do not have to worry about the capability range of the hardware but can let - it make a best effort attempt. - </para> - <para> - Our depth is 24, as this is in bits. We will be returning RGB24 format. This - has one byte of red, then one of green, then one of blue. This then repeats - for every other pixel in the image. The other common formats the interface - defines are - </para> - <table frame="all" id="Framebuffer_Encodings"><title>Framebuffer Encodings</title> - <tgroup cols="2" align="left"> - <tbody> - <row> - <entry>GREY</entry><entry>Linear greyscale. This is for simple cameras and the - like</entry> - </row><row> - <entry>RGB565</entry><entry>The top 5 bits hold 32 red levels, the next six bits - hold green and the low 5 bits hold blue. </entry> - </row><row> - <entry>RGB555</entry><entry>The top bit is clear. The red green and blue levels - each occupy five bits.</entry> - </row> - </tbody> - </tgroup> - </table> - <para> - Additional modes are support for YUV capture formats. These are common for - TV and video conferencing applications. - </para> - <para> - The VIDIOCSPICT ioctl allows a user to set some of the picture parameters. - Exactly which ones are supported depends heavily on the card itself. It is - possible to support many modes and effects in software. In general doing - this in the kernel is a bad idea. Video capture is a performance-sensitive - application and the programs can often do better if they aren't being - 'helped' by an overkeen driver writer. Thus for our device we will report - RGB24 only and refuse to allow a change. - </para> - <programlisting> - - - case VIDIOCSPICT: - { - struct video_picture v; - if(copy_from_user(&v, arg, sizeof(v))) - return -EFAULT; - if(v.depth!=24 || - v.palette != VIDEO_PALETTE_RGB24) - return -EINVAL; - set_hardware_brightness(v.brightness); - set_hardware_hue(v.hue); - set_hardware_saturation(v.colour); - set_hardware_brightness(v.contrast); - return 0; - } - - - </programlisting> - <para> - We check the user has not tried to change the palette or the depth. We do - not want to carry out some of the changes and then return an error. This may - confuse the application which will be assuming no change occurred. - </para> - <para> - In much the same way as you need to be able to set the picture controls to - get the right capture images, many cards need to know what they are - displaying onto when generating overlay output. In some cases getting this - wrong even makes a nasty mess or may crash the computer. For that reason - the VIDIOCSBUF ioctl used to set up the frame buffer information may well - only be usable by root. - </para> - <para> - We will assume our card is one of the old ISA devices with feature connector - and only supports a couple of standard video modes. Very common for older - cards although the PCI devices are way smarter than this. - </para> - <programlisting> - - -static struct video_buffer capture_fb; - - case VIDIOCGFBUF: - { - if(copy_to_user(arg, &capture_fb, - sizeof(capture_fb))) - return -EFAULT; - return 0; - - } - - - </programlisting> - <para> - We keep the frame buffer information in the format the ioctl uses. This - makes it nice and easy to work with in the ioctl calls. - </para> - <programlisting> - - case VIDIOCSFBUF: - { - struct video_buffer v; - - if(!capable(CAP_SYS_ADMIN)) - return -EPERM; - - if(copy_from_user(&v, arg, sizeof(v))) - return -EFAULT; - if(v.width!=320 && v.width!=640) - return -EINVAL; - if(v.height!=200 && v.height!=240 - && v.height!=400 - && v.height !=480) - return -EINVAL; - memcpy(&capture_fb, &v, sizeof(v)); - hardware_set_fb(&v); - return 0; - } - - - - </programlisting> - <para> - The capable() function checks a user has the required capability. The Linux - operating system has a set of about 30 capabilities indicating privileged - access to services. The default set up gives the superuser (uid 0) all of - them and nobody else has any. - </para> - <para> - We check that the user has the SYS_ADMIN capability, that is they are - allowed to operate as the machine administrator. We don't want anyone but - the administrator making a mess of the display. - </para> - <para> - Next we check for standard PC video modes (320 or 640 wide with either - EGA or VGA depths). If the mode is not a standard video mode we reject it as - not supported by our card. If the mode is acceptable we save it so that - VIDIOCFBUF will give the right answer next time it is called. The - hardware_set_fb() function is some undescribed card specific function to - program the card for the desired mode. - </para> - <para> - Before the driver can display an overlay window it needs to know where the - window should be placed, and also how large it should be. If the card - supports clipping it needs to know which rectangles to omit from the - display. The video_window structure is used to describe the way the image - should be displayed. - </para> - <table frame="all" id="video_window_fields"><title>struct video_window fields</title> - <tgroup cols="2" align="left"> - <tbody> - <row> - <entry>width</entry><entry>The width in pixels of the desired image. The card - may use a smaller size if this size is not available</entry> - </row><row> - <entry>height</entry><entry>The height of the image. The card may use a smaller - size if this size is not available.</entry> - </row><row> - <entry>x</entry><entry> The X position of the top left of the window. This - is in pixels relative to the left hand edge of the - picture. Not all cards can display images aligned on - any pixel boundary. If the position is unsuitable - the card adjusts the image right and reduces the - width.</entry> - </row><row> - <entry>y</entry><entry> The Y position of the top left of the window. This - is counted in pixels relative to the top edge of the - picture. As with the width if the card cannot - display starting on this line it will adjust the - values.</entry> - </row><row> - <entry>chromakey</entry><entry>The colour (expressed in RGB32 format) for the - chromakey colour if chroma keying is being used. </entry> - </row><row> - <entry>clips</entry><entry>An array of rectangles that must not be drawn - over.</entry> - </row><row> - <entry>clipcount</entry><entry>The number of clips in this array.</entry> - </row> - </tbody> - </tgroup> - </table> - <para> - Each clip is a struct video_clip which has the following fields - </para> - <table frame="all" id="video_clip_fields"><title>video_clip fields</title> - <tgroup cols="2" align="left"> - <tbody> - <row> - <entry>x, y</entry><entry>Co-ordinates relative to the display</entry> - </row><row> - <entry>width, height</entry><entry>Width and height in pixels</entry> - </row><row> - <entry>next</entry><entry>A spare field for the application to use</entry> - </row> - </tbody> - </tgroup> - </table> - <para> - The driver is required to ensure it always draws in the area requested or a smaller area, and that it never draws in any of the areas that are clipped. - This may well mean it has to leave alone. small areas the application wished to be - drawn. - </para> - <para> - Our example card uses chromakey so does not have to address most of the - clipping. We will add a video_window structure to our global variables to - remember our parameters, as we did with the frame buffer. - </para> - <programlisting> - - - case VIDIOCGWIN: - { - if(copy_to_user(arg, &capture_win, - sizeof(capture_win))) - return -EFAULT; - return 0; - } - - - case VIDIOCSWIN: - { - struct video_window v; - if(copy_from_user(&v, arg, sizeof(v))) - return -EFAULT; - if(v.width > 640 || v.height > 480) - return -EINVAL; - if(v.width < 16 || v.height < 16) - return -EINVAL; - hardware_set_key(v.chromakey); - hardware_set_window(v); - memcpy(&capture_win, &v, sizeof(v)); - capture_w = v.width; - capture_h = v.height; - return 0; - } - - - </programlisting> - <para> - Because we are using Chromakey our setup is fairly simple. Mostly we have to - check the values are sane and load them into the capture card. - </para> - <para> - With all the setup done we can now turn on the actual capture/overlay. This - is done with the VIDIOCCAPTURE ioctl. This takes a single integer argument - where 0 is on and 1 is off. - </para> - <programlisting> - - - case VIDIOCCAPTURE: - { - int v; - if(get_user(v, (int *)arg)) - return -EFAULT; - if(v==0) - hardware_capture_off(); - else - { - if(capture_fb.width == 0 - || capture_w == 0) - return -EINVAL; - hardware_capture_on(); - } - return 0; - } - - - </programlisting> - <para> - We grab the flag from user space and either enable or disable according to - its value. There is one small corner case we have to consider here. Suppose - that the capture was requested before the video window or the frame buffer - had been set up. In those cases there will be unconfigured fields in our - card data, as well as unconfigured hardware settings. We check for this case and - return an error if the frame buffer or the capture window width is zero. - </para> - <programlisting> - - - default: - return -ENOIOCTLCMD; - } -} - </programlisting> - <para> - - We don't need to support any other ioctls, so if we get this far, it is time - to tell the video layer that we don't now what the user is talking about. - </para> - </sect1> - <sect1 id="endvid"> - <title>Other Functionality</title> - <para> - The Video4Linux layer supports additional features, including a high - performance mmap() based capture mode and capturing part of the image. - These features are out of the scope of the book. You should however have enough - example code to implement most simple video4linux devices for radio and TV - cards. - </para> - </sect1> - </chapter> - <chapter id="bugs"> - <title>Known Bugs And Assumptions</title> - <para> - <variablelist> - <varlistentry><term>Multiple Opens</term> - <listitem> - <para> - The driver assumes multiple opens should not be allowed. A driver - can work around this but not cleanly. - </para> - </listitem></varlistentry> - - <varlistentry><term>API Deficiencies</term> - <listitem> - <para> - The existing API poorly reflects compression capable devices. There - are plans afoot to merge V4L, V4L2 and some other ideas into a - better interface. - </para> - </listitem></varlistentry> - </variablelist> - - </para> - </chapter> - - <chapter id="pubfunctions"> - <title>Public Functions Provided</title> -!Edrivers/media/video/v4l2-dev.c - </chapter> - -</book> diff --git a/Documentation/HOWTO b/Documentation/HOWTO index 48a3955f05fc..8495fc970391 100644 --- a/Documentation/HOWTO +++ b/Documentation/HOWTO @@ -112,7 +112,7 @@ required reading: Other excellent descriptions of how to create patches properly are: "The Perfect Patch" - http://www.zip.com.au/~akpm/linux/patches/stuff/tpp.txt + http://userweb.kernel.org/~akpm/stuff/tpp.txt "Linux kernel patch submission format" http://linux.yyz.us/patch-format.html @@ -620,7 +620,7 @@ all time. It should describe the patch completely, containing: For more details on what this should all look like, please see the ChangeLog section of the document: "The Perfect Patch" - http://www.zip.com.au/~akpm/linux/patches/stuff/tpp.txt + http://userweb.kernel.org/~akpm/stuff/tpp.txt diff --git a/Documentation/SAK.txt b/Documentation/SAK.txt index b9019ca872ea..74be14679ed8 100644 --- a/Documentation/SAK.txt +++ b/Documentation/SAK.txt @@ -1,5 +1,5 @@ Linux 2.4.2 Secure Attention Key (SAK) handling -18 March 2001, Andrew Morton <akpm@osdl.org> +18 March 2001, Andrew Morton An operating system's Secure Attention Key is a security tool which is provided as protection against trojan password capturing programs. It diff --git a/Documentation/SubmitChecklist b/Documentation/SubmitChecklist index 21f0795af20f..ac5e0b2f1097 100644 --- a/Documentation/SubmitChecklist +++ b/Documentation/SubmitChecklist @@ -85,3 +85,6 @@ kernel patches. 23: Tested after it has been merged into the -mm patchset to make sure that it still works with all of the other queued patches and various changes in the VM, VFS, and other subsystems. + +24: All memory barriers {e.g., barrier(), rmb(), wmb()} need a comment in the + source code that explains the logic of what they are doing and why. diff --git a/Documentation/SubmittingDrivers b/Documentation/SubmittingDrivers index 24f2eb40cae5..99e72a81fa2f 100644 --- a/Documentation/SubmittingDrivers +++ b/Documentation/SubmittingDrivers @@ -41,7 +41,7 @@ Linux 2.4: Linux 2.6: The same rules apply as 2.4 except that you should follow linux-kernel to track changes in API's. The final contact point for Linux 2.6 - submissions is Andrew Morton <akpm@osdl.org>. + submissions is Andrew Morton. What Criteria Determine Acceptance ---------------------------------- diff --git a/Documentation/SubmittingPatches b/Documentation/SubmittingPatches index f79ad9ff6031..f309d3c6221c 100644 --- a/Documentation/SubmittingPatches +++ b/Documentation/SubmittingPatches @@ -77,7 +77,7 @@ Quilt: http://savannah.nongnu.org/projects/quilt Andrew Morton's patch scripts: -http://www.zip.com.au/~akpm/linux/patches/ +http://userweb.kernel.org/~akpm/stuff/patch-scripts.tar.gz Instead of these scripts, quilt is the recommended patch management tool (see above). @@ -405,7 +405,7 @@ person it names. This tag documents that potentially interested parties have been included in the discussion -14) Using Test-by: and Reviewed-by: +14) Using Tested-by: and Reviewed-by: A Tested-by: tag indicates that the patch has been successfully tested (in some environment) by the person named. This tag informs maintainers that @@ -653,7 +653,7 @@ SECTION 3 - REFERENCES ---------------------- Andrew Morton, "The perfect patch" (tpp). - <http://www.zip.com.au/~akpm/linux/patches/stuff/tpp.txt> + <http://userweb.kernel.org/~akpm/stuff/tpp.txt> Jeff Garzik, "Linux kernel patch submission format". <http://linux.yyz.us/patch-format.html> @@ -672,4 +672,9 @@ Kernel Documentation/CodingStyle: Linus Torvalds's mail on the canonical patch format: <http://lkml.org/lkml/2005/4/7/183> + +Andi Kleen, "On submitting kernel patches" + Some strategies to get difficult or controversal changes in. + http://halobates.de/on-submitting-patches.pdf + -- diff --git a/Documentation/block/data-integrity.txt b/Documentation/block/data-integrity.txt index e9dc8d86adc7..e8ca040ba2cf 100644 --- a/Documentation/block/data-integrity.txt +++ b/Documentation/block/data-integrity.txt @@ -246,7 +246,7 @@ will require extra work due to the application tag. retrieve the tag buffer using bio_integrity_get_tag(). -6.3 PASSING EXISTING INTEGRITY METADATA +5.3 PASSING EXISTING INTEGRITY METADATA Filesystems that either generate their own integrity metadata or are capable of transferring IMD from user space can use the @@ -283,7 +283,7 @@ will require extra work due to the application tag. integrity upon completion. -6.4 REGISTERING A BLOCK DEVICE AS CAPABLE OF EXCHANGING INTEGRITY +5.4 REGISTERING A BLOCK DEVICE AS CAPABLE OF EXCHANGING INTEGRITY METADATA To enable integrity exchange on a block device the gendisk must be diff --git a/Documentation/cris/README b/Documentation/cris/README index 795a1dabe6c7..d9b086869a60 100644 --- a/Documentation/cris/README +++ b/Documentation/cris/README @@ -27,7 +27,7 @@ operating system. The ETRAX 100LX chip -------------------- -For reference, plase see the press-release: +For reference, please see the press-release: http://www.axis.com/news/us/001101_etrax.htm diff --git a/Documentation/development-process/1.Intro b/Documentation/development-process/1.Intro new file mode 100644 index 000000000000..8cc2cba2b10d --- /dev/null +++ b/Documentation/development-process/1.Intro @@ -0,0 +1,274 @@ +1: A GUIDE TO THE KERNEL DEVELOPMENT PROCESS + +The purpose of this document is to help developers (and their managers) +work with the development community with a minimum of frustration. It is +an attempt to document how this community works in a way which is +accessible to those who are not intimately familiar with Linux kernel +development (or, indeed, free software development in general). While +there is some technical material here, this is very much a process-oriented +discussion which does not require a deep knowledge of kernel programming to +understand. + + +1.1: EXECUTIVE SUMMARY + +The rest of this section covers the scope of the kernel development process +and the kinds of frustrations that developers and their employers can +encounter there. There are a great many reasons why kernel code should be +merged into the official ("mainline") kernel, including automatic +availability to users, community support in many forms, and the ability to +influence the direction of kernel development. Code contributed to the +Linux kernel must be made available under a GPL-compatible license. + +Section 2 introduces the development process, the kernel release cycle, and +the mechanics of the merge window. The various phases in the patch +development, review, and merging cycle are covered. There is some +discussion of tools and mailing lists. Developers wanting to get started +with kernel development are encouraged to track down and fix bugs as an +initial exercise. + +Section 3 covers early-stage project planning, with an emphasis on +involving the development community as soon as possible. + +Section 4 is about the coding process; several pitfalls which have been +encountered by other developers are discussed. Some requirements for +patches are covered, and there is an introduction to some of the tools +which can help to ensure that kernel patches are correct. + +Section 5 talks about the process of posting patches for review. To be +taken seriously by the development community, patches must be properly +formatted and described, and they must be sent to the right place. +Following the advice in this section should help to ensure the best +possible reception for your work. + +Section 6 covers what happens after posting patches; the job is far from +done at that point. Working with reviewers is a crucial part of the +development process; this section offers a number of tips on how to avoid +problems at this important stage. Developers are cautioned against +assuming that the job is done when a patch is merged into the mainline. + +Section 7 introduces a couple of "advanced" topics: managing patches with +git and reviewing patches posted by others. + +Section 8 concludes the document with pointers to sources for more +information on kernel development. + + +1.2: WHAT THIS DOCUMENT IS ABOUT + +The Linux kernel, at over 6 million lines of code and well over 1000 active +contributors, is one of the largest and most active free software projects +in existence. Since its humble beginning in 1991, this kernel has evolved +into a best-of-breed operating system component which runs on pocket-sized +digital music players, desktop PCs, the largest supercomputers in +existence, and all types of systems in between. It is a robust, efficient, +and scalable solution for almost any situation. + +With the growth of Linux has come an increase in the number of developers +(and companies) wishing to participate in its development. Hardware +vendors want to ensure that Linux supports their products well, making +those products attractive to Linux users. Embedded systems vendors, who +use Linux as a component in an integrated product, want Linux to be as +capable and well-suited to the task at hand as possible. Distributors and +other software vendors who base their products on Linux have a clear +interest in the capabilities, performance, and reliability of the Linux +kernel. And end users, too, will often wish to change Linux to make it +better suit their needs. + +One of the most compelling features of Linux is that it is accessible to +these developers; anybody with the requisite skills can improve Linux and +influence the direction of its development. Proprietary products cannot +offer this kind of openness, which is a characteristic of the free software +process. But, if anything, the kernel is even more open than most other +free software projects. A typical three-month kernel development cycle can +involve over 1000 developers working for more than 100 different companies +(or for no company at all). + +Working with the kernel development community is not especially hard. But, +that notwithstanding, many potential contributors have experienced +difficulties when trying to do kernel work. The kernel community has +evolved its own distinct ways of operating which allow it to function +smoothly (and produce a high-quality product) in an environment where +thousands of lines of code are being changed every day. So it is not +surprising that Linux kernel development process differs greatly from +proprietary development methods. + +The kernel's development process may come across as strange and +intimidating to new developers, but there are good reasons and solid +experience behind it. A developer who does not understand the kernel +community's ways (or, worse, who tries to flout or circumvent them) will +have a frustrating experience in store. The development community, while +being helpful to those who are trying to learn, has little time for those +who will not listen or who do not care about the development process. + +It is hoped that those who read this document will be able to avoid that +frustrating experience. There is a lot of material here, but the effort +involved in reading it will be repaid in short order. The development +community is always in need of developers who will help to make the kernel +better; the following text should help you - or those who work for you - +join our community. + + +1.3: CREDITS + +This document was written by Jonathan Corbet, corbet@lwn.net. It has been +improved by comments from Johannes Berg, James Berry, Alex Chiang, Roland +Dreier, Randy Dunlap, Jake Edge, Jiri Kosina, Matt Mackall, Arthur Marsh, +Amanda McPherson, Andrew Morton, Andrew Price, Tsugikazu Shibata, and +Jochen Voß. + +This work was supported by the Linux Foundation; thanks especially to +Amanda McPherson, who saw the value of this effort and made it all happen. + + +1.4: THE IMPORTANCE OF GETTING CODE INTO THE MAINLINE + +Some companies and developers occasionally wonder why they should bother +learning how to work with the kernel community and get their code into the +mainline kernel (the "mainline" being the kernel maintained by Linus +Torvalds and used as a base by Linux distributors). In the short term, +contributing code can look like an avoidable expense; it seems easier to +just keep the code separate and support users directly. The truth of the +matter is that keeping code separate ("out of tree") is a false economy. + +As a way of illustrating the costs of out-of-tree code, here are a few +relevant aspects of the kernel development process; most of these will be +discussed in greater detail later in this document. Consider: + +- Code which has been merged into the mainline kernel is available to all + Linux users. It will automatically be present on all distributions which + enable it. There is no need for driver disks, downloads, or the hassles + of supporting multiple versions of multiple distributions; it all just + works, for the developer and for the user. Incorporation into the + mainline solves a large number of distribution and support problems. + +- While kernel developers strive to maintain a stable interface to user + space, the internal kernel API is in constant flux. The lack of a stable + internal interface is a deliberate design decision; it allows fundamental + improvements to be made at any time and results in higher-quality code. + But one result of that policy is that any out-of-tree code requires + constant upkeep if it is to work with new kernels. Maintaining + out-of-tree code requires significant amounts of work just to keep that + code working. + + Code which is in the mainline, instead, does not require this work as the + result of a simple rule requiring any developer who makes an API change + to also fix any code that breaks as the result of that change. So code + which has been merged into the mainline has significantly lower + maintenance costs. + +- Beyond that, code which is in the kernel will often be improved by other + developers. Surprising results can come from empowering your user + community and customers to improve your product. + +- Kernel code is subjected to review, both before and after merging into + the mainline. No matter how strong the original developer's skills are, + this review process invariably finds ways in which the code can be + improved. Often review finds severe bugs and security problems. This is + especially true for code which has been developed in a closed + environment; such code benefits strongly from review by outside + developers. Out-of-tree code is lower-quality code. + +- Participation in the development process is your way to influence the + direction of kernel development. Users who complain from the sidelines + are heard, but active developers have a stronger voice - and the ability + to implement changes which make the kernel work better for their needs. + +- When code is maintained separately, the possibility that a third party + will contribute a different implementation of a similar feature always + exists. Should that happen, getting your code merged will become much + harder - to the point of impossibility. Then you will be faced with the + unpleasant alternatives of either (1) maintaining a nonstandard feature + out of tree indefinitely, or (2) abandoning your code and migrating your + users over to the in-tree version. + +- Contribution of code is the fundamental action which makes the whole + process work. By contributing your code you can add new functionality to + the kernel and provide capabilities and examples which are of use to + other kernel developers. If you have developed code for Linux (or are + thinking about doing so), you clearly have an interest in the continued + success of this platform; contributing code is one of the best ways to + help ensure that success. + +All of the reasoning above applies to any out-of-tree kernel code, +including code which is distributed in proprietary, binary-only form. +There are, however, additional factors which should be taken into account +before considering any sort of binary-only kernel code distribution. These +include: + +- The legal issues around the distribution of proprietary kernel modules + are cloudy at best; quite a few kernel copyright holders believe that + most binary-only modules are derived products of the kernel and that, as + a result, their distribution is a violation of the GNU General Public + license (about which more will be said below). Your author is not a + lawyer, and nothing in this document can possibly be considered to be + legal advice. The true legal status of closed-source modules can only be + determined by the courts. But the uncertainty which haunts those modules + is there regardless. + +- Binary modules greatly increase the difficulty of debugging kernel + problems, to the point that most kernel developers will not even try. So + the distribution of binary-only modules will make it harder for your + users to get support from the community. + +- Support is also harder for distributors of binary-only modules, who must + provide a version of the module for every distribution and every kernel + version they wish to support. Dozens of builds of a single module can + be required to provide reasonably comprehensive coverage, and your users + will have to upgrade your module separately every time they upgrade their + kernel. + +- Everything that was said above about code review applies doubly to + closed-source code. Since this code is not available at all, it cannot + have been reviewed by the community and will, beyond doubt, have serious + problems. + +Makers of embedded systems, in particular, may be tempted to disregard much +of what has been said in this section in the belief that they are shipping +a self-contained product which uses a frozen kernel version and requires no +more development after its release. This argument misses the value of +widespread code review and the value of allowing your users to add +capabilities to your product. But these products, too, have a limited +commercial life, after which a new version must be released. At that +point, vendors whose code is in the mainline and well maintained will be +much better positioned to get the new product ready for market quickly. + + +1.5: LICENSING + +Code is contributed to the Linux kernel under a number of licenses, but all +code must be compatible with version 2 of the GNU General Public License +(GPLv2), which is the license covering the kernel distribution as a whole. +In practice, that means that all code contributions are covered either by +GPLv2 (with, optionally, language allowing distribution under later +versions of the GPL) or the three-clause BSD license. Any contributions +which are not covered by a compatible license will not be accepted into the +kernel. + +Copyright assignments are not required (or requested) for code contributed +to the kernel. All code merged into the mainline kernel retains its +original ownership; as a result, the kernel now has thousands of owners. + +One implication of this ownership structure is that any attempt to change +the licensing of the kernel is doomed to almost certain failure. There are +few practical scenarios where the agreement of all copyright holders could +be obtained (or their code removed from the kernel). So, in particular, +there is no prospect of a migration to version 3 of the GPL in the +foreseeable future. + +It is imperative that all code contributed to the kernel be legitimately +free software. For that reason, code from anonymous (or pseudonymous) +contributors will not be accepted. All contributors are required to "sign +off" on their code, stating that the code can be distributed with the +kernel under the GPL. Code which has not been licensed as free software by +its owner, or which risks creating copyright-related problems for the +kernel (such as code which derives from reverse-engineering efforts lacking +proper safeguards) cannot be contributed. + +Questions about copyright-related issues are common on Linux development +mailing lists. Such questions will normally receive no shortage of +answers, but one should bear in mind that the people answering those +questions are not lawyers and cannot provide legal advice. If you have +legal questions relating to Linux source code, there is no substitute for +talking with a lawyer who understands this field. Relying on answers +obtained on technical mailing lists is a risky affair. diff --git a/Documentation/development-process/2.Process b/Documentation/development-process/2.Process new file mode 100644 index 000000000000..d750321acd5a --- /dev/null +++ b/Documentation/development-process/2.Process @@ -0,0 +1,459 @@ +2: HOW THE DEVELOPMENT PROCESS WORKS + +Linux kernel development in the early 1990's was a pretty loose affair, +with relatively small numbers of users and developers involved. With a +user base in the millions and with some 2,000 developers involved over the +course of one year, the kernel has since had to evolve a number of +processes to keep development happening smoothly. A solid understanding of +how the process works is required in order to be an effective part of it. + + +2.1: THE BIG PICTURE + +The kernel developers use a loosely time-based release process, with a new +major kernel release happening every two or three months. The recent +release history looks like this: + + 2.6.26 July 13, 2008 + 2.6.25 April 16, 2008 + 2.6.24 January 24, 2008 + 2.6.23 October 9, 2007 + 2.6.22 July 8, 2007 + 2.6.21 April 25, 2007 + 2.6.20 February 4, 2007 + +Every 2.6.x release is a major kernel release with new features, internal +API changes, and more. A typical 2.6 release can contain over 10,000 +changesets with changes to several hundred thousand lines of code. 2.6 is +thus the leading edge of Linux kernel development; the kernel uses a +rolling development model which is continually integrating major changes. + +A relatively straightforward discipline is followed with regard to the +merging of patches for each release. At the beginning of each development +cycle, the "merge window" is said to be open. At that time, code which is +deemed to be sufficiently stable (and which is accepted by the development +community) is merged into the mainline kernel. The bulk of changes for a +new development cycle (and all of the major changes) will be merged during +this time, at a rate approaching 1,000 changes ("patches," or "changesets") +per day. + +(As an aside, it is worth noting that the changes integrated during the +merge window do not come out of thin air; they have been collected, tested, +and staged ahead of time. How that process works will be described in +detail later on). + +The merge window lasts for two weeks. At the end of this time, Linus +Torvalds will declare that the window is closed and release the first of +the "rc" kernels. For the kernel which is destined to be 2.6.26, for +example, the release which happens at the end of the merge window will be +called 2.6.26-rc1. The -rc1 release is the signal that the time to merge +new features has passed, and that the time to stabilize the next kernel has +begun. + +Over the next six to ten weeks, only patches which fix problems should be +submitted to the mainline. On occasion a more significant change will be +allowed, but such occasions are rare; developers who try to merge new +features outside of the merge window tend to get an unfriendly reception. +As a general rule, if you miss the merge window for a given feature, the +best thing to do is to wait for the next development cycle. (An occasional +exception is made for drivers for previously-unsupported hardware; if they +touch no in-tree code, they cannot cause regressions and should be safe to +add at any time). + +As fixes make their way into the mainline, the patch rate will slow over +time. Linus releases new -rc kernels about once a week; a normal series +will get up to somewhere between -rc6 and -rc9 before the kernel is +considered to be sufficiently stable and the final 2.6.x release is made. +At that point the whole process starts over again. + +As an example, here is how the 2.6.25 development cycle went (all dates in +2008): + + January 24 2.6.24 stable release + February 10 2.6.25-rc1, merge window closes + February 15 2.6.25-rc2 + February 24 2.6.25-rc3 + March 4 2.6.25-rc4 + March 9 2.6.25-rc5 + March 16 2.6.25-rc6 + March 25 2.6.25-rc7 + April 1 2.6.25-rc8 + April 11 2.6.25-rc9 + April 16 2.6.25 stable release + +How do the developers decide when to close the development cycle and create +the stable release? The most significant metric used is the list of +regressions from previous releases. No bugs are welcome, but those which +break systems which worked in the past are considered to be especially +serious. For this reason, patches which cause regressions are looked upon +unfavorably and are quite likely to be reverted during the stabilization +period. + +The developers' goal is to fix all known regressions before the stable +release is made. In the real world, this kind of perfection is hard to +achieve; there are just too many variables in a project of this size. +There comes a point where delaying the final release just makes the problem +worse; the pile of changes waiting for the next merge window will grow +larger, creating even more regressions the next time around. So most 2.6.x +kernels go out with a handful of known regressions though, hopefully, none +of them are serious. + +Once a stable release is made, its ongoing maintenance is passed off to the +"stable team," currently comprised of Greg Kroah-Hartman and Chris Wright. +The stable team will release occasional updates to the stable release using +the 2.6.x.y numbering scheme. To be considered for an update release, a +patch must (1) fix a significant bug, and (2) already be merged into the +mainline for the next development kernel. Continuing our 2.6.25 example, +the history (as of this writing) is: + + May 1 2.6.25.1 + May 6 2.6.25.2 + May 9 2.6.25.3 + May 15 2.6.25.4 + June 7 2.6.25.5 + June 9 2.6.25.6 + June 16 2.6.25.7 + June 21 2.6.25.8 + June 24 2.6.25.9 + +Stable updates for a given kernel are made for approximately six months; +after that, the maintenance of stable releases is solely the responsibility +of the distributors which have shipped that particular kernel. + + +2.2: THE LIFECYCLE OF A PATCH + +Patches do not go directly from the developer's keyboard into the mainline +kernel. There is, instead, a somewhat involved (if somewhat informal) +process designed to ensure that each patch is reviewed for quality and that +each patch implements a change which is desirable to have in the mainline. +This process can happen quickly for minor fixes, or, in the case of large +and controversial changes, go on for years. Much developer frustration +comes from a lack of understanding of this process or from attempts to +circumvent it. + +In the hopes of reducing that frustration, this document will describe how +a patch gets into the kernel. What follows below is an introduction which +describes the process in a somewhat idealized way. A much more detailed +treatment will come in later sections. + +The stages that a patch goes through are, generally: + + - Design. This is where the real requirements for the patch - and the way + those requirements will be met - are laid out. Design work is often + done without involving the community, but it is better to do this work + in the open if at all possible; it can save a lot of time redesigning + things later. + + - Early review. Patches are posted to the relevant mailing list, and + developers on that list reply with any comments they may have. This + process should turn up any major problems with a patch if all goes + well. + + - Wider review. When the patch is getting close to ready for mainline + inclusion, it will be accepted by a relevant subsystem maintainer - + though this acceptance is not a guarantee that the patch will make it + all the way to the mainline. The patch will show up in the maintainer's + subsystem tree and into the staging trees (described below). When the + process works, this step leads to more extensive review of the patch and + the discovery of any problems resulting from the integration of this + patch with work being done by others. + + - Merging into the mainline. Eventually, a successful patch will be + merged into the mainline repository managed by Linus Torvalds. More + comments and/or problems may surface at this time; it is important that + the developer be responsive to these and fix any issues which arise. + + - Stable release. The number of users potentially affected by the patch + is now large, so, once again, new problems may arise. + + - Long-term maintenance. While it is certainly possible for a developer + to forget about code after merging it, that sort of behavior tends to + leave a poor impression in the development community. Merging code + eliminates some of the maintenance burden, in that others will fix + problems caused by API changes. But the original developer should + continue to take responsibility for the code if it is to remain useful + in the longer term. + +One of the largest mistakes made by kernel developers (or their employers) +is to try to cut the process down to a single "merging into the mainline" +step. This approach invariably leads to frustration for everybody +involved. + + +2.3: HOW PATCHES GET INTO THE KERNEL + +There is exactly one person who can merge patches into the mainline kernel +repository: Linus Torvalds. But, of the over 12,000 patches which went +into the 2.6.25 kernel, only 250 (around 2%) were directly chosen by Linus +himself. The kernel project has long since grown to a size where no single +developer could possibly inspect and select every patch unassisted. The +way the kernel developers have addressed this growth is through the use of +a lieutenant system built around a chain of trust. + +The kernel code base is logically broken down into a set of subsystems: +networking, specific architecture support, memory management, video +devices, etc. Most subsystems have a designated maintainer, a developer +who has overall responsibility for the code within that subsystem. These +subsystem maintainers are the gatekeepers (in a loose way) for the portion +of the kernel they manage; they are the ones who will (usually) accept a +patch for inclusion into the mainline kernel. + +Subsystem maintainers each manage their own version of the kernel source +tree, usually (but certainly not always) using the git source management +tool. Tools like git (and related tools like quilt or mercurial) allow +maintainers to track a list of patches, including authorship information +and other metadata. At any given time, the maintainer can identify which +patches in his or her repository are not found in the mainline. + +When the merge window opens, top-level maintainers will ask Linus to "pull" +the patches they have selected for merging from their repositories. If +Linus agrees, the stream of patches will flow up into his repository, +becoming part of the mainline kernel. The amount of attention that Linus +pays to specific patches received in a pull operation varies. It is clear +that, sometimes, he looks quite closely. But, as a general rule, Linus +trusts the subsystem maintainers to not send bad patches upstream. + +Subsystem maintainers, in turn, can pull patches from other maintainers. +For example, the networking tree is built from patches which accumulated +first in trees dedicated to network device drivers, wireless networking, +etc. This chain of repositories can be arbitrarily long, though it rarely +exceeds two or three links. Since each maintainer in the chain trusts +those managing lower-level trees, this process is known as the "chain of +trust." + +Clearly, in a system like this, getting patches into the kernel depends on +finding the right maintainer. Sending patches directly to Linus is not +normally the right way to go. + + +2.4: STAGING TREES + +The chain of subsystem trees guides the flow of patches into the kernel, +but it also raises an interesting question: what if somebody wants to look +at all of the patches which are being prepared for the next merge window? +Developers will be interested in what other changes are pending to see +whether there are any conflicts to worry about; a patch which changes a +core kernel function prototype, for example, will conflict with any other +patches which use the older form of that function. Reviewers and testers +want access to the changes in their integrated form before all of those +changes land in the mainline kernel. One could pull changes from all of +the interesting subsystem trees, but that would be a big and error-prone +job. + +The answer comes in the form of staging trees, where subsystem trees are +collected for testing and review. The older of these trees, maintained by +Andrew Morton, is called "-mm" (for memory management, which is how it got +started). The -mm tree integrates patches from a long list of subsystem +trees; it also has some patches aimed at helping with debugging. + +Beyond that, -mm contains a significant collection of patches which have +been selected by Andrew directly. These patches may have been posted on a +mailing list, or they may apply to a part of the kernel for which there is +no designated subsystem tree. As a result, -mm operates as a sort of +subsystem tree of last resort; if there is no other obvious path for a +patch into the mainline, it is likely to end up in -mm. Miscellaneous +patches which accumulate in -mm will eventually either be forwarded on to +an appropriate subsystem tree or be sent directly to Linus. In a typical +development cycle, approximately 10% of the patches going into the mainline +get there via -mm. + +The current -mm patch can always be found from the front page of + + http://kernel.org/ + +Those who want to see the current state of -mm can get the "-mm of the +moment" tree, found at: + + http://userweb.kernel.org/~akpm/mmotm/ + +Use of the MMOTM tree is likely to be a frustrating experience, though; +there is a definite chance that it will not even compile. + +The other staging tree, started more recently, is linux-next, maintained by +Stephen Rothwell. The linux-next tree is, by design, a snapshot of what +the mainline is expected to look like after the next merge window closes. +Linux-next trees are announced on the linux-kernel and linux-next mailing +lists when they are assembled; they can be downloaded from: + + http://www.kernel.org/pub/linux/kernel/people/sfr/linux-next/ + +Some information about linux-next has been gathered at: + + http://linux.f-seidel.de/linux-next/pmwiki/ + +How the linux-next tree will fit into the development process is still +changing. As of this writing, the first full development cycle involving +linux-next (2.6.26) is coming to an end; thus far, it has proved to be a +valuable resource for finding and fixing integration problems before the +beginning of the merge window. See http://lwn.net/Articles/287155/ for +more information on how linux-next has worked to set up the 2.6.27 merge +window. + +Some developers have begun to suggest that linux-next should be used as the +target for future development as well. The linux-next tree does tend to be +far ahead of the mainline and is more representative of the tree into which +any new work will be merged. The downside to this idea is that the +volatility of linux-next tends to make it a difficult development target. +See http://lwn.net/Articles/289013/ for more information on this topic, and +stay tuned; much is still in flux where linux-next is involved. + + +2.5: TOOLS + +As can be seen from the above text, the kernel development process depends +heavily on the ability to herd collections of patches in various +directions. The whole thing would not work anywhere near as well as it +does without suitably powerful tools. Tutorials on how to use these tools +are well beyond the scope of this document, but there is space for a few +pointers. + +By far the dominant source code management system used by the kernel +community is git. Git is one of a number of distributed version control +systems being developed in the free software community. It is well tuned +for kernel development, in that it performs quite well when dealing with +large repositories and large numbers of patches. It also has a reputation +for being difficult to learn and use, though it has gotten better over +time. Some sort of familiarity with git is almost a requirement for kernel +developers; even if they do not use it for their own work, they'll need git +to keep up with what other developers (and the mainline) are doing. + +Git is now packaged by almost all Linux distributions. There is a home +page at + + http://git.or.cz/ + +That page has pointers to documentation and tutorials. One should be +aware, in particular, of the Kernel Hacker's Guide to git, which has +information specific to kernel development: + + http://linux.yyz.us/git-howto.html + +Among the kernel developers who do not use git, the most popular choice is +almost certainly Mercurial: + + http://www.selenic.com/mercurial/ + +Mercurial shares many features with git, but it provides an interface which +many find easier to use. + +The other tool worth knowing about is Quilt: + + http://savannah.nongnu.org/projects/quilt/ + +Quilt is a patch management system, rather than a source code management +system. It does not track history over time; it is, instead, oriented +toward tracking a specific set of changes against an evolving code base. +Some major subsystem maintainers use quilt to manage patches intended to go +upstream. For the management of certain kinds of trees (-mm, for example), +quilt is the best tool for the job. + + +2.6: MAILING LISTS + +A great deal of Linux kernel development work is done by way of mailing +lists. It is hard to be a fully-functioning member of the community +without joining at least one list somewhere. But Linux mailing lists also +represent a potential hazard to developers, who risk getting buried under a +load of electronic mail, running afoul of the conventions used on the Linux +lists, or both. + +Most kernel mailing lists are run on vger.kernel.org; the master list can +be found at: + + http://vger.kernel.org/vger-lists.html + +There are lists hosted elsewhere, though; a number of them are at +lists.redhat.com. + +The core mailing list for kernel development is, of course, linux-kernel. +This list is an intimidating place to be; volume can reach 500 messages per +day, the amount of noise is high, the conversation can be severely +technical, and participants are not always concerned with showing a high +degree of politeness. But there is no other place where the kernel +development community comes together as a whole; developers who avoid this +list will miss important information. + +There are a few hints which can help with linux-kernel survival: + +- Have the list delivered to a separate folder, rather than your main + mailbox. One must be able to ignore the stream for sustained periods of + time. + +- Do not try to follow every conversation - nobody else does. It is + important to filter on both the topic of interest (though note that + long-running conversations can drift away from the original subject + without changing the email subject line) and the people who are + participating. + +- Do not feed the trolls. If somebody is trying to stir up an angry + response, ignore them. + +- When responding to linux-kernel email (or that on other lists) preserve + the Cc: header for all involved. In the absence of a strong reason (such + as an explicit request), you should never remove recipients. Always make + sure that the person you are responding to is in the Cc: list. This + convention also makes it unnecessary to explicitly ask to be copied on + replies to your postings. + +- Search the list archives (and the net as a whole) before asking + questions. Some developers can get impatient with people who clearly + have not done their homework. + +- Avoid top-posting (the practice of putting your answer above the quoted + text you are responding to). It makes your response harder to read and + makes a poor impression. + +- Ask on the correct mailing list. Linux-kernel may be the general meeting + point, but it is not the best place to find developers from all + subsystems. + +The last point - finding the correct mailing list - is a common place for +beginning developers to go wrong. Somebody who asks a networking-related +question on linux-kernel will almost certainly receive a polite suggestion +to ask on the netdev list instead, as that is the list frequented by most +networking developers. Other lists exist for the SCSI, video4linux, IDE, +filesystem, etc. subsystems. The best place to look for mailing lists is +in the MAINTAINERS file packaged with the kernel source. + + +2.7: GETTING STARTED WITH KERNEL DEVELOPMENT + +Questions about how to get started with the kernel development process are +common - from both individuals and companies. Equally common are missteps +which make the beginning of the relationship harder than it has to be. + +Companies often look to hire well-known developers to get a development +group started. This can, in fact, be an effective technique. But it also +tends to be expensive and does not do much to grow the pool of experienced +kernel developers. It is possible to bring in-house developers up to speed +on Linux kernel development, given the investment of a bit of time. Taking +this time can endow an employer with a group of developers who understand +the kernel and the company both, and who can help to train others as well. +Over the medium term, this is often the more profitable approach. + +Individual developers are often, understandably, at a loss for a place to +start. Beginning with a large project can be intimidating; one often wants +to test the waters with something smaller first. This is the point where +some developers jump into the creation of patches fixing spelling errors or +minor coding style issues. Unfortunately, such patches create a level of +noise which is distracting for the development community as a whole, so, +increasingly, they are looked down upon. New developers wishing to +introduce themselves to the community will not get the sort of reception +they wish for by these means. + +Andrew Morton gives this advice for aspiring kernel developers + + The #1 project for all kernel beginners should surely be "make sure + that the kernel runs perfectly at all times on all machines which + you can lay your hands on". Usually the way to do this is to work + with others on getting things fixed up (this can require + persistence!) but that's fine - it's a part of kernel development. + +(http://lwn.net/Articles/283982/). + +In the absence of obvious problems to fix, developers are advised to look +at the current lists of regressions and open bugs in general. There is +never any shortage of issues in need of fixing; by addressing these issues, +developers will gain experience with the process while, at the same time, +building respect with the rest of the development community. diff --git a/Documentation/development-process/3.Early-stage b/Documentation/development-process/3.Early-stage new file mode 100644 index 000000000000..307a159a70ca --- /dev/null +++ b/Documentation/development-process/3.Early-stage @@ -0,0 +1,195 @@ +3: EARLY-STAGE PLANNING + +When contemplating a Linux kernel development project, it can be tempting +to jump right in and start coding. As with any significant project, +though, much of the groundwork for success is best laid before the first +line of code is written. Some time spent in early planning and +communication can save far more time later on. + + +3.1: SPECIFYING THE PROBLEM + +Like any engineering project, a successful kernel enhancement starts with a +clear description of the problem to be solved. In some cases, this step is +easy: when a driver is needed for a specific piece of hardware, for +example. In others, though, it is tempting to confuse the real problem +with the proposed solution, and that can lead to difficulties. + +Consider an example: some years ago, developers working with Linux audio +sought a way to run applications without dropouts or other artifacts caused +by excessive latency in the system. The solution they arrived at was a +kernel module intended to hook into the Linux Security Module (LSM) +framework; this module could be configured to give specific applications +access to the realtime scheduler. This module was implemented and sent to +the linux-kernel mailing list, where it immediately ran into problems. + +To the audio developers, this security module was sufficient to solve their +immediate problem. To the wider kernel community, though, it was seen as a +misuse of the LSM framework (which is not intended to confer privileges +onto processes which they would not otherwise have) and a risk to system +stability. Their preferred solutions involved realtime scheduling access +via the rlimit mechanism for the short term, and ongoing latency reduction +work in the long term. + +The audio community, however, could not see past the particular solution +they had implemented; they were unwilling to accept alternatives. The +resulting disagreement left those developers feeling disillusioned with the +entire kernel development process; one of them went back to an audio list +and posted this: + + There are a number of very good Linux kernel developers, but they + tend to get outshouted by a large crowd of arrogant fools. Trying + to communicate user requirements to these people is a waste of + time. They are much too "intelligent" to listen to lesser mortals. + +(http://lwn.net/Articles/131776/). + +The reality of the situation was different; the kernel developers were far +more concerned about system stability, long-term maintenance, and finding +the right solution to the problem than they were with a specific module. +The moral of the story is to focus on the problem - not a specific solution +- and to discuss it with the development community before investing in the +creation of a body of code. + +So, when contemplating a kernel development project, one should obtain +answers to a short set of questions: + + - What, exactly, is the problem which needs to be solved? + + - Who are the users affected by this problem? Which use cases should the + solution address? + + - How does the kernel fall short in addressing that problem now? + +Only then does it make sense to start considering possible solutions. + + +3.2: EARLY DISCUSSION + +When planning a kernel development project, it makes great sense to hold +discussions with the community before launching into implementation. Early +communication can save time and trouble in a number of ways: + + - It may well be that the problem is addressed by the kernel in ways which + you have not understood. The Linux kernel is large and has a number of + features and capabilities which are not immediately obvious. Not all + kernel capabilities are documented as well as one might like, and it is + easy to miss things. Your author has seen the posting of a complete + driver which duplicated an existing driver that the new author had been + unaware of. Code which reinvents existing wheels is not only wasteful; + it will also not be accepted into the mainline kernel. + + - There may be elements of the proposed solution which will not be + acceptable for mainline merging. It is better to find out about + problems like this before writing the code. + + - It's entirely possible that other developers have thought about the + problem; they may have ideas for a better solution, and may be willing + to help in the creation of that solution. + +Years of experience with the kernel development community have taught a +clear lesson: kernel code which is designed and developed behind closed +doors invariably has problems which are only revealed when the code is +released into the community. Sometimes these problems are severe, +requiring months or years of effort before the code can be brought up to +the kernel community's standards. Some examples include: + + - The Devicescape network stack was designed and implemented for + single-processor systems. It could not be merged into the mainline + until it was made suitable for multiprocessor systems. Retrofitting + locking and such into code is a difficult task; as a result, the merging + of this code (now called mac80211) was delayed for over a year. + + - The Reiser4 filesystem included a number of capabilities which, in the + core kernel developers' opinion, should have been implemented in the + virtual filesystem layer instead. It also included features which could + not easily be implemented without exposing the system to user-caused + deadlocks. The late revelation of these problems - and refusal to + address some of them - has caused Reiser4 to stay out of the mainline + kernel. + + - The AppArmor security module made use of internal virtual filesystem + data structures in ways which were considered to be unsafe and + unreliable. This code has since been significantly reworked, but + remains outside of the mainline. + +In each of these cases, a great deal of pain and extra work could have been +avoided with some early discussion with the kernel developers. + + +3.3: WHO DO YOU TALK TO? + +When developers decide to take their plans public, the next question will +be: where do we start? The answer is to find the right mailing list(s) and +the right maintainer. For mailing lists, the best approach is to look in +the MAINTAINERS file for a relevant place to post. If there is a suitable +subsystem list, posting there is often preferable to posting on +linux-kernel; you are more likely to reach developers with expertise in the +relevant subsystem and the environment may be more supportive. + +Finding maintainers can be a bit harder. Again, the MAINTAINERS file is +the place to start. That file tends to not always be up to date, though, +and not all subsystems are represented there. The person listed in the +MAINTAINERS file may, in fact, not be the person who is actually acting in +that role currently. So, when there is doubt about who to contact, a +useful trick is to use git (and "git log" in particular) to see who is +currently active within the subsystem of interest. Look at who is writing +patches, and who, if anybody, is attaching Signed-off-by lines to those +patches. Those are the people who will be best placed to help with a new +development project. + +If all else fails, talking to Andrew Morton can be an effective way to +track down a maintainer for a specific piece of code. + + +3.4: WHEN TO POST? + +If possible, posting your plans during the early stages can only be +helpful. Describe the problem being solved and any plans that have been +made on how the implementation will be done. Any information you can +provide can help the development community provide useful input on the +project. + +One discouraging thing which can happen at this stage is not a hostile +reaction, but, instead, little or no reaction at all. The sad truth of the +matter is (1) kernel developers tend to be busy, (2) there is no shortage +of people with grand plans and little code (or even prospect of code) to +back them up, and (3) nobody is obligated to review or comment on ideas +posted by others. If a request-for-comments posting yields little in the +way of comments, do not assume that it means there is no interest in the +project. Unfortunately, you also cannot assume that there are no problems +with your idea. The best thing to do in this situation is to proceed, +keeping the community informed as you go. + + +3.5: GETTING OFFICIAL BUY-IN + +If your work is being done in a corporate environment - as most Linux +kernel work is - you must, obviously, have permission from suitably +empowered managers before you can post your company's plans or code to a +public mailing list. The posting of code which has not been cleared for +release under a GPL-compatible license can be especially problematic; the +sooner that a company's management and legal staff can agree on the posting +of a kernel development project, the better off everybody involved will be. + +Some readers may be thinking at this point that their kernel work is +intended to support a product which does not yet have an officially +acknowledged existence. Revealing their employer's plans on a public +mailing list may not be a viable option. In cases like this, it is worth +considering whether the secrecy is really necessary; there is often no real +need to keep development plans behind closed doors. + +That said, there are also cases where a company legitimately cannot +disclose its plans early in the development process. Companies with +experienced kernel developers may choose to proceed in an open-loop manner +on the assumption that they will be able to avoid serious integration +problems later. For companies without that sort of in-house expertise, the +best option is often to hire an outside developer to review the plans under +a non-disclosure agreement. The Linux Foundation operates an NDA program +designed to help with this sort of situation; more information can be found +at: + + http://www.linuxfoundation.org/en/NDA_program + +This kind of review is often enough to avoid serious problems later on +without requiring public disclosure of the project. diff --git a/Documentation/development-process/4.Coding b/Documentation/development-process/4.Coding new file mode 100644 index 000000000000..014aca8f14e2 --- /dev/null +++ b/Documentation/development-process/4.Coding @@ -0,0 +1,384 @@ +4: GETTING THE CODE RIGHT + +While there is much to be said for a solid and community-oriented design +process, the proof of any kernel development project is in the resulting +code. It is the code which will be examined by other developers and merged +(or not) into the mainline tree. So it is the quality of this code which +will determine the ultimate success of the project. + +This section will examine the coding process. We'll start with a look at a +number of ways in which kernel developers can go wrong. Then the focus +will shift toward doing things right and the tools which can help in that +quest. + + +4.1: PITFALLS + +* Coding style + +The kernel has long had a standard coding style, described in +Documentation/CodingStyle. For much of that time, the policies described +in that file were taken as being, at most, advisory. As a result, there is +a substantial amount of code in the kernel which does not meet the coding +style guidelines. The presence of that code leads to two independent +hazards for kernel developers. + +The first of these is to believe that the kernel coding standards do not +matter and are not enforced. The truth of the matter is that adding new +code to the kernel is very difficult if that code is not coded according to +the standard; many developers will request that the code be reformatted +before they will even review it. A code base as large as the kernel +requires some uniformity of code to make it possible for developers to +quickly understand any part of it. So there is no longer room for +strangely-formatted code. + +Occasionally, the kernel's coding style will run into conflict with an +employer's mandated style. In such cases, the kernel's style will have to +win before the code can be merged. Putting code into the kernel means +giving up a degree of control in a number of ways - including control over +how the code is formatted. + +The other trap is to assume that code which is already in the kernel is +urgently in need of coding style fixes. Developers may start to generate +reformatting patches as a way of gaining familiarity with the process, or +as a way of getting their name into the kernel changelogs - or both. But +pure coding style fixes are seen as noise by the development community; +they tend to get a chilly reception. So this type of patch is best +avoided. It is natural to fix the style of a piece of code while working +on it for other reasons, but coding style changes should not be made for +their own sake. + +The coding style document also should not be read as an absolute law which +can never be transgressed. If there is a good reason to go against the +style (a line which becomes far less readable if split to fit within the +80-column limit, for example), just do it. + + +* Abstraction layers + +Computer Science professors teach students to make extensive use of +abstraction layers in the name of flexibility and information hiding. +Certainly the kernel makes extensive use of abstraction; no project +involving several million lines of code could do otherwise and survive. +But experience has shown that excessive or premature abstraction can be +just as harmful as premature optimization. Abstraction should be used to +the level required and no further. + +At a simple level, consider a function which has an argument which is +always passed as zero by all callers. One could retain that argument just +in case somebody eventually needs to use the extra flexibility that it +provides. By that time, though, chances are good that the code which +implements this extra argument has been broken in some subtle way which was +never noticed - because it has never been used. Or, when the need for +extra flexibility arises, it does not do so in a way which matches the +programmer's early expectation. Kernel developers will routinely submit +patches to remove unused arguments; they should, in general, not be added +in the first place. + +Abstraction layers which hide access to hardware - often to allow the bulk +of a driver to be used with multiple operating systems - are especially +frowned upon. Such layers obscure the code and may impose a performance +penalty; they do not belong in the Linux kernel. + +On the other hand, if you find yourself copying significant amounts of code +from another kernel subsystem, it is time to ask whether it would, in fact, +make sense to pull out some of that code into a separate library or to +implement that functionality at a higher level. There is no value in +replicating the same code throughout the kernel. + + +* #ifdef and preprocessor use in general + +The C preprocessor seems to present a powerful temptation to some C +programmers, who see it as a way to efficiently encode a great deal of +flexibility into a source file. But the preprocessor is not C, and heavy +use of it results in code which is much harder for others to read and +harder for the compiler to check for correctness. Heavy preprocessor use +is almost always a sign of code which needs some cleanup work. + +Conditional compilation with #ifdef is, indeed, a powerful feature, and it +is used within the kernel. But there is little desire to see code which is +sprinkled liberally with #ifdef blocks. As a general rule, #ifdef use +should be confined to header files whenever possible. +Conditionally-compiled code can be confined to functions which, if the code +is not to be present, simply become empty. The compiler will then quietly +optimize out the call to the empty function. The result is far cleaner +code which is easier to follow. + +C preprocessor macros present a number of hazards, including possible +multiple evaluation of expressions with side effects and no type safety. +If you are tempted to define a macro, consider creating an inline function +instead. The code which results will be the same, but inline functions are +easier to read, do not evaluate their arguments multiple times, and allow +the compiler to perform type checking on the arguments and return value. + + +* Inline functions + +Inline functions present a hazard of their own, though. Programmers can +become enamored of the perceived efficiency inherent in avoiding a function +call and fill a source file with inline functions. Those functions, +however, can actually reduce performance. Since their code is replicated +at each call site, they end up bloating the size of the compiled kernel. +That, in turn, creates pressure on the processor's memory caches, which can +slow execution dramatically. Inline functions, as a rule, should be quite +small and relatively rare. The cost of a function call, after all, is not +that high; the creation of large numbers of inline functions is a classic +example of premature optimization. + +In general, kernel programmers ignore cache effects at their peril. The +classic time/space tradeoff taught in beginning data structures classes +often does not apply to contemporary hardware. Space *is* time, in that a +larger program will run slower than one which is more compact. + + +* Locking + +In May, 2006, the "Devicescape" networking stack was, with great +fanfare, released under the GPL and made available for inclusion in the +mainline kernel. This donation was welcome news; support for wireless +networking in Linux was considered substandard at best, and the Devicescape +stack offered the promise of fixing that situation. Yet, this code did not +actually make it into the mainline until June, 2007 (2.6.22). What +happened? + +This code showed a number of signs of having been developed behind +corporate doors. But one large problem in particular was that it was not +designed to work on multiprocessor systems. Before this networking stack +(now called mac80211) could be merged, a locking scheme needed to be +retrofitted onto it. + +Once upon a time, Linux kernel code could be developed without thinking +about the concurrency issues presented by multiprocessor systems. Now, +however, this document is being written on a dual-core laptop. Even on +single-processor systems, work being done to improve responsiveness will +raise the level of concurrency within the kernel. The days when kernel +code could be written without thinking about locking are long past. + +Any resource (data structures, hardware registers, etc.) which could be +accessed concurrently by more than one thread must be protected by a lock. +New code should be written with this requirement in mind; retrofitting +locking after the fact is a rather more difficult task. Kernel developers +should take the time to understand the available locking primitives well +enough to pick the right tool for the job. Code which shows a lack of +attention to concurrency will have a difficult path into the mainline. + + +* Regressions + +One final hazard worth mentioning is this: it can be tempting to make a +change (which may bring big improvements) which causes something to break +for existing users. This kind of change is called a "regression," and +regressions have become most unwelcome in the mainline kernel. With few +exceptions, changes which cause regressions will be backed out if the +regression cannot be fixed in a timely manner. Far better to avoid the +regression in the first place. + +It is often argued that a regression can be justified if it causes things +to work for more people than it creates problems for. Why not make a +change if it brings new functionality to ten systems for each one it +breaks? The best answer to this question was expressed by Linus in July, +2007: + + So we don't fix bugs by introducing new problems. That way lies + madness, and nobody ever knows if you actually make any real + progress at all. Is it two steps forwards, one step back, or one + step forward and two steps back? + +(http://lwn.net/Articles/243460/). + +An especially unwelcome type of regression is any sort of change to the +user-space ABI. Once an interface has been exported to user space, it must +be supported indefinitely. This fact makes the creation of user-space +interfaces particularly challenging: since they cannot be changed in +incompatible ways, they must be done right the first time. For this +reason, a great deal of thought, clear documentation, and wide review for +user-space interfaces is always required. + + + +4.2: CODE CHECKING TOOLS + +For now, at least, the writing of error-free code remains an ideal that few +of us can reach. What we can hope to do, though, is to catch and fix as +many of those errors as possible before our code goes into the mainline +kernel. To that end, the kernel developers have put together an impressive +array of tools which can catch a wide variety of obscure problems in an +automated way. Any problem caught by the computer is a problem which will +not afflict a user later on, so it stands to reason that the automated +tools should be used whenever possible. + +The first step is simply to heed the warnings produced by the compiler. +Contemporary versions of gcc can detect (and warn about) a large number of +potential errors. Quite often, these warnings point to real problems. +Code submitted for review should, as a rule, not produce any compiler +warnings. When silencing warnings, take care to understand the real cause +and try to avoid "fixes" which make the warning go away without addressing +its cause. + +Note that not all compiler warnings are enabled by default. Build the +kernel with "make EXTRA_CFLAGS=-W" to get the full set. + +The kernel provides several configuration options which turn on debugging +features; most of these are found in the "kernel hacking" submenu. Several +of these options should be turned on for any kernel used for development or +testing purposes. In particular, you should turn on: + + - ENABLE_WARN_DEPRECATED, ENABLE_MUST_CHECK, and FRAME_WARN to get an + extra set of warnings for problems like the use of deprecated interfaces + or ignoring an important return value from a function. The output + generated by these warnings can be verbose, but one need not worry about + warnings from other parts of the kernel. + + - DEBUG_OBJECTS will add code to track the lifetime of various objects + created by the kernel and warn when things are done out of order. If + you are adding a subsystem which creates (and exports) complex objects + of its own, consider adding support for the object debugging + infrastructure. + + - DEBUG_SLAB can find a variety of memory allocation and use errors; it + should be used on most development kernels. + + - DEBUG_SPINLOCK, DEBUG_SPINLOCK_SLEEP, and DEBUG_MUTEXES will find a + number of common locking errors. + +There are quite a few other debugging options, some of which will be +discussed below. Some of them have a significant performance impact and +should not be used all of the time. But some time spent learning the +available options will likely be paid back many times over in short order. + +One of the heavier debugging tools is the locking checker, or "lockdep." +This tool will track the acquisition and release of every lock (spinlock or +mutex) in the system, the order in which locks are acquired relative to +each other, the current interrupt environment, and more. It can then +ensure that locks are always acquired in the same order, that the same +interrupt assumptions apply in all situations, and so on. In other words, +lockdep can find a number of scenarios in which the system could, on rare +occasion, deadlock. This kind of problem can be painful (for both +developers and users) in a deployed system; lockdep allows them to be found +in an automated manner ahead of time. Code with any sort of non-trivial +locking should be run with lockdep enabled before being submitted for +inclusion. + +As a diligent kernel programmer, you will, beyond doubt, check the return +status of any operation (such as a memory allocation) which can fail. The +fact of the matter, though, is that the resulting failure recovery paths +are, probably, completely untested. Untested code tends to be broken code; +you could be much more confident of your code if all those error-handling +paths had been exercised a few times. + +The kernel provides a fault injection framework which can do exactly that, +especially where memory allocations are involved. With fault injection +enabled, a configurable percentage of memory allocations will be made to +fail; these failures can be restricted to a specific range of code. +Running with fault injection enabled allows the programmer to see how the +code responds when things go badly. See +Documentation/fault-injection/fault-injection.text for more information on +how to use this facility. + +Other kinds of errors can be found with the "sparse" static analysis tool. +With sparse, the programmer can be warned about confusion between +user-space and kernel-space addresses, mixture of big-endian and +small-endian quantities, the passing of integer values where a set of bit +flags is expected, and so on. Sparse must be installed separately (it can +be found at http://www.kernel.org/pub/software/devel/sparse/ if your +distributor does not package it); it can then be run on the code by adding +"C=1" to your make command. + +Other kinds of portability errors are best found by compiling your code for +other architectures. If you do not happen to have an S/390 system or a +Blackfin development board handy, you can still perform the compilation +step. A large set of cross compilers for x86 systems can be found at + + http://www.kernel.org/pub/tools/crosstool/ + +Some time spent installing and using these compilers will help avoid +embarrassment later. + + +4.3: DOCUMENTATION + +Documentation has often been more the exception than the rule with kernel +development. Even so, adequate documentation will help to ease the merging +of new code into the kernel, make life easier for other developers, and +will be helpful for your users. In many cases, the addition of +documentation has become essentially mandatory. + +The first piece of documentation for any patch is its associated +changelog. Log entries should describe the problem being solved, the form +of the solution, the people who worked on the patch, any relevant +effects on performance, and anything else that might be needed to +understand the patch. + +Any code which adds a new user-space interface - including new sysfs or +/proc files - should include documentation of that interface which enables +user-space developers to know what they are working with. See +Documentation/ABI/README for a description of how this documentation should +be formatted and what information needs to be provided. + +The file Documentation/kernel-parameters.txt describes all of the kernel's +boot-time parameters. Any patch which adds new parameters should add the +appropriate entries to this file. + +Any new configuration options must be accompanied by help text which +clearly explains the options and when the user might want to select them. + +Internal API information for many subsystems is documented by way of +specially-formatted comments; these comments can be extracted and formatted +in a number of ways by the "kernel-doc" script. If you are working within +a subsystem which has kerneldoc comments, you should maintain them and add +them, as appropriate, for externally-available functions. Even in areas +which have not been so documented, there is no harm in adding kerneldoc +comments for the future; indeed, this can be a useful activity for +beginning kernel developers. The format of these comments, along with some +information on how to create kerneldoc templates can be found in the file +Documentation/kernel-doc-nano-HOWTO.txt. + +Anybody who reads through a significant amount of existing kernel code will +note that, often, comments are most notable by their absence. Once again, +the expectations for new code are higher than they were in the past; +merging uncommented code will be harder. That said, there is little desire +for verbosely-commented code. The code should, itself, be readable, with +comments explaining the more subtle aspects. + +Certain things should always be commented. Uses of memory barriers should +be accompanied by a line explaining why the barrier is necessary. The +locking rules for data structures generally need to be explained somewhere. +Major data structures need comprehensive documentation in general. +Non-obvious dependencies between separate bits of code should be pointed +out. Anything which might tempt a code janitor to make an incorrect +"cleanup" needs a comment saying why it is done the way it is. And so on. + + +4.4: INTERNAL API CHANGES + +The binary interface provided by the kernel to user space cannot be broken +except under the most severe circumstances. The kernel's internal +programming interfaces, instead, are highly fluid and can be changed when +the need arises. If you find yourself having to work around a kernel API, +or simply not using a specific functionality because it does not meet your +needs, that may be a sign that the API needs to change. As a kernel +developer, you are empowered to make such changes. + +There are, of course, some catches. API changes can be made, but they need +to be well justified. So any patch making an internal API change should be +accompanied by a description of what the change is and why it is +necessary. This kind of change should also be broken out into a separate +patch, rather than buried within a larger patch. + +The other catch is that a developer who changes an internal API is +generally charged with the task of fixing any code within the kernel tree +which is broken by the change. For a widely-used function, this duty can +lead to literally hundreds or thousands of changes - many of which are +likely to conflict with work being done by other developers. Needless to +say, this can be a large job, so it is best to be sure that the +justification is solid. + +When making an incompatible API change, one should, whenever possible, +ensure that code which has not been updated is caught by the compiler. +This will help you to be sure that you have found all in-tree uses of that +interface. It will also alert developers of out-of-tree code that there is +a change that they need to respond to. Supporting out-of-tree code is not +something that kernel developers need to be worried about, but we also do +not have to make life harder for out-of-tree developers than it it needs to +be. diff --git a/Documentation/development-process/5.Posting b/Documentation/development-process/5.Posting new file mode 100644 index 000000000000..dd48132a74dd --- /dev/null +++ b/Documentation/development-process/5.Posting @@ -0,0 +1,278 @@ +5: POSTING PATCHES + +Sooner or later, the time comes when your work is ready to be presented to +the community for review and, eventually, inclusion into the mainline +kernel. Unsurprisingly, the kernel development community has evolved a set +of conventions and procedures which are used in the posting of patches; +following them will make life much easier for everybody involved. This +document will attempt to cover these expectations in reasonable detail; +more information can also be found in the files SubmittingPatches, +SubmittingDrivers, and SubmitChecklist in the kernel documentation +directory. + + +5.1: WHEN TO POST + +There is a constant temptation to avoid posting patches before they are +completely "ready." For simple patches, that is not a problem. If the +work being done is complex, though, there is a lot to be gained by getting +feedback from the community before the work is complete. So you should +consider posting in-progress work, or even making a git tree available so +that interested developers can catch up with your work at any time. + +When posting code which is not yet considered ready for inclusion, it is a +good idea to say so in the posting itself. Also mention any major work +which remains to be done and any known problems. Fewer people will look at +patches which are known to be half-baked, but those who do will come in +with the idea that they can help you drive the work in the right direction. + + +5.2: BEFORE CREATING PATCHES + +There are a number of things which should be done before you consider +sending patches to the development community. These include: + + - Test the code to the extent that you can. Make use of the kernel's + debugging tools, ensure that the kernel will build with all reasonable + combinations of configuration options, use cross-compilers to build for + different architectures, etc. + + - Make sure your code is compliant with the kernel coding style + guidelines. + + - Does your change have performance implications? If so, you should run + benchmarks showing what the impact (or benefit) of your change is; a + summary of the results should be included with the patch. + + - Be sure that you have the right to post the code. If this work was done + for an employer, the employer likely has a right to the work and must be + agreeable with its release under the GPL. + +As a general rule, putting in some extra thought before posting code almost +always pays back the effort in short order. + + +5.3: PATCH PREPARATION + +The preparation of patches for posting can be a surprising amount of work, +but, once again, attempting to save time here is not generally advisable +even in the short term. + +Patches must be prepared against a specific version of the kernel. As a +general rule, a patch should be based on the current mainline as found in +Linus's git tree. It may become necessary to make versions against -mm, +linux-next, or a subsystem tree, though, to facilitate wider testing and +review. Depending on the area of your patch and what is going on +elsewhere, basing a patch against these other trees can require a +significant amount of work resolving conflicts and dealing with API +changes. + +Only the most simple changes should be formatted as a single patch; +everything else should be made as a logical series of changes. Splitting +up patches is a bit of an art; some developers spend a long time figuring +out how to do it in the way that the community expects. There are a few +rules of thumb, however, which can help considerably: + + - The patch series you post will almost certainly not be the series of + changes found in your working revision control system. Instead, the + changes you have made need to be considered in their final form, then + split apart in ways which make sense. The developers are interested in + discrete, self-contained changes, not the path you took to get to those + changes. + + - Each logically independent change should be formatted as a separate + patch. These changes can be small ("add a field to this structure") or + large (adding a significant new driver, for example), but they should be + conceptually small and amenable to a one-line description. Each patch + should make a specific change which can be reviewed on its own and + verified to do what it says it does. + + - As a way of restating the guideline above: do not mix different types of + changes in the same patch. If a single patch fixes a critical security + bug, rearranges a few structures, and reformats the code, there is a + good chance that it will be passed over and the important fix will be + lost. + + - Each patch should yield a kernel which builds and runs properly; if your + patch series is interrupted in the middle, the result should still be a + working kernel. Partial application of a patch series is a common + scenario when the "git bisect" tool is used to find regressions; if the + result is a broken kernel, you will make life harder for developers and + users who are engaging in the noble work of tracking down problems. + + - Do not overdo it, though. One developer recently posted a set of edits + to a single file as 500 separate patches - an act which did not make him + the most popular person on the kernel mailing list. A single patch can + be reasonably large as long as it still contains a single *logical* + change. + + - It can be tempting to add a whole new infrastructure with a series of + patches, but to leave that infrastructure unused until the final patch + in the series enables the whole thing. This temptation should be + avoided if possible; if that series adds regressions, bisection will + finger the last patch as the one which caused the problem, even though + the real bug is elsewhere. Whenever possible, a patch which adds new + code should make that code active immediately. + +Working to create the perfect patch series can be a frustrating process +which takes quite a bit of time and thought after the "real work" has been +done. When done properly, though, it is time well spent. + + +5.4: PATCH FORMATTING + +So now you have a perfect series of patches for posting, but the work is +not done quite yet. Each patch needs to be formatted into a message which +quickly and clearly communicates its purpose to the rest of the world. To +that end, each patch will be composed of the following: + + - An optional "From" line naming the author of the patch. This line is + only necessary if you are passing on somebody else's patch via email, + but it never hurts to add it when in doubt. + + - A one-line description of what the patch does. This message should be + enough for a reader who sees it with no other context to figure out the + scope of the patch; it is the line that will show up in the "short form" + changelogs. This message is usually formatted with the relevant + subsystem name first, followed by the purpose of the patch. For + example: + + gpio: fix build on CONFIG_GPIO_SYSFS=n + + - A blank line followed by a detailed description of the contents of the + patch. This description can be as long as is required; it should say + what the patch does and why it should be applied to the kernel. + + - One or more tag lines, with, at a minimum, one Signed-off-by: line from + the author of the patch. Tags will be described in more detail below. + +The above three items should, normally, be the text used when committing +the change to a revision control system. They are followed by: + + - The patch itself, in the unified ("-u") patch format. Using the "-p" + option to diff will associate function names with changes, making the + resulting patch easier for others to read. + +You should avoid including changes to irrelevant files (those generated by +the build process, for example, or editor backup files) in the patch. The +file "dontdiff" in the Documentation directory can help in this regard; +pass it to diff with the "-X" option. + +The tags mentioned above are used to describe how various developers have +been associated with the development of this patch. They are described in +detail in the SubmittingPatches document; what follows here is a brief +summary. Each of these lines has the format: + + tag: Full Name <email address> optional-other-stuff + +The tags in common use are: + + - Signed-off-by: this is a developer's certification that he or she has + the right to submit the patch for inclusion into the kernel. It is an + agreement to the Developer's Certificate of Origin, the full text of + which can be found in Documentation/SubmittingPatches. Code without a + proper signoff cannot be merged into the mainline. + + - Acked-by: indicates an agreement by another developer (often a + maintainer of the relevant code) that the patch is appropriate for + inclusion into the kernel. + + - Tested-by: states that the named person has tested the patch and found + it to work. + + - Reviewed-by: the named developer has reviewed the patch for correctness; + see the reviewer's statement in Documentation/SubmittingPatches for more + detail. + + - Reported-by: names a user who reported a problem which is fixed by this + patch; this tag is used to give credit to the (often underappreciated) + people who test our code and let us know when things do not work + correctly. + + - Cc: the named person received a copy of the patch and had the + opportunity to comment on it. + +Be careful in the addition of tags to your patches: only Cc: is appropriate +for addition without the explicit permission of the person named. + + +5.5: SENDING THE PATCH + +Before you mail your patches, there are a couple of other things you should +take care of: + + - Are you sure that your mailer will not corrupt the patches? Patches + which have had gratuitous white-space changes or line wrapping performed + by the mail client will not apply at the other end, and often will not + be examined in any detail. If there is any doubt at all, mail the patch + to yourself and convince yourself that it shows up intact. + + Documentation/email-clients.txt has some helpful hints on making + specific mail clients work for sending patches. + + - Are you sure your patch is free of silly mistakes? You should always + run patches through scripts/checkpatch.pl and address the complaints it + comes up with. Please bear in mind that checkpatch.pl, while being the + embodiment of a fair amount of thought about what kernel patches should + look like, is not smarter than you. If fixing a checkpatch.pl complaint + would make the code worse, don't do it. + +Patches should always be sent as plain text. Please do not send them as +attachments; that makes it much harder for reviewers to quote sections of +the patch in their replies. Instead, just put the patch directly into your +message. + +When mailing patches, it is important to send copies to anybody who might +be interested in it. Unlike some other projects, the kernel encourages +people to err on the side of sending too many copies; don't assume that the +relevant people will see your posting on the mailing lists. In particular, +copies should go to: + + - The maintainer(s) of the affected subsystem(s). As described earlier, + the MAINTAINERS file is the first place to look for these people. + + - Other developers who have been working in the same area - especially + those who might be working there now. Using git to see who else has + modified the files you are working on can be helpful. + + - If you are responding to a bug report or a feature request, copy the + original poster as well. + + - Send a copy to the relevant mailing list, or, if nothing else applies, + the linux-kernel list. + + - If you are fixing a bug, think about whether the fix should go into the + next stable update. If so, stable@kernel.org should get a copy of the + patch. Also add a "Cc: stable@kernel.org" to the tags within the patch + itself; that will cause the stable team to get a notification when your + fix goes into the mainline. + +When selecting recipients for a patch, it is good to have an idea of who +you think will eventually accept the patch and get it merged. While it +is possible to send patches directly to Linus Torvalds and have him merge +them, things are not normally done that way. Linus is busy, and there are +subsystem maintainers who watch over specific parts of the kernel. Usually +you will be wanting that maintainer to merge your patches. If there is no +obvious maintainer, Andrew Morton is often the patch target of last resort. + +Patches need good subject lines. The canonical format for a patch line is +something like: + + [PATCH nn/mm] subsys: one-line description of the patch + +where "nn" is the ordinal number of the patch, "mm" is the total number of +patches in the series, and "subsys" is the name of the affected subsystem. +Clearly, nn/mm can be omitted for a single, standalone patch. + +If you have a significant series of patches, it is customary to send an +introductory description as part zero. This convention is not universally +followed though; if you use it, remember that information in the +introduction does not make it into the kernel changelogs. So please ensure +that the patches, themselves, have complete changelog information. + +In general, the second and following parts of a multi-part patch should be +sent as a reply to the first part so that they all thread together at the +receiving end. Tools like git and quilt have commands to mail out a set of +patches with the proper threading. If you have a long series, though, and +are using git, please provide the --no-chain-reply-to option to avoid +creating exceptionally deep nesting. diff --git a/Documentation/development-process/6.Followthrough b/Documentation/development-process/6.Followthrough new file mode 100644 index 000000000000..a8fba3d83a85 --- /dev/null +++ b/Documentation/development-process/6.Followthrough @@ -0,0 +1,202 @@ +6: FOLLOWTHROUGH + +At this point, you have followed the guidelines given so far and, with the +addition of your own engineering skills, have posted a perfect series of +patches. One of the biggest mistakes that even experienced kernel +developers can make is to conclude that their work is now done. In truth, +posting patches indicates a transition into the next stage of the process, +with, possibly, quite a bit of work yet to be done. + +It is a rare patch which is so good at its first posting that there is no +room for improvement. The kernel development process recognizes this fact, +and, as a result, is heavily oriented toward the improvement of posted +code. You, as the author of that code, will be expected to work with the +kernel community to ensure that your code is up to the kernel's quality +standards. A failure to participate in this process is quite likely to +prevent the inclusion of your patches into the mainline. + + +6.1: WORKING WITH REVIEWERS + +A patch of any significance will result in a number of comments from other +developers as they review the code. Working with reviewers can be, for +many developers, the most intimidating part of the kernel development +process. Life can be made much easier, though, if you keep a few things in +mind: + + - If you have explained your patch well, reviewers will understand its + value and why you went to the trouble of writing it. But that value + will not keep them from asking a fundamental question: what will it be + like to maintain a kernel with this code in it five or ten years later? + Many of the changes you may be asked to make - from coding style tweaks + to substantial rewrites - come from the understanding that Linux will + still be around and under development a decade from now. + + - Code review is hard work, and it is a relatively thankless occupation; + people remember who wrote kernel code, but there is little lasting fame + for those who reviewed it. So reviewers can get grumpy, especially when + they see the same mistakes being made over and over again. If you get a + review which seems angry, insulting, or outright offensive, resist the + impulse to respond in kind. Code review is about the code, not about + the people, and code reviewers are not attacking you personally. + + - Similarly, code reviewers are not trying to promote their employers' + agendas at the expense of your own. Kernel developers often expect to + be working on the kernel years from now, but they understand that their + employer could change. They truly are, almost without exception, + working toward the creation of the best kernel they can; they are not + trying to create discomfort for their employers' competitors. + +What all of this comes down to is that, when reviewers send you comments, +you need to pay attention to the technical observations that they are +making. Do not let their form of expression or your own pride keep that +from happening. When you get review comments on a patch, take the time to +understand what the reviewer is trying to say. If possible, fix the things +that the reviewer is asking you to fix. And respond back to the reviewer: +thank them, and describe how you will answer their questions. + +Note that you do not have to agree with every change suggested by +reviewers. If you believe that the reviewer has misunderstood your code, +explain what is really going on. If you have a technical objection to a +suggested change, describe it and justify your solution to the problem. If +your explanations make sense, the reviewer will accept them. Should your +explanation not prove persuasive, though, especially if others start to +agree with the reviewer, take some time to think things over again. It can +be easy to become blinded by your own solution to a problem to the point +that you don't realize that something is fundamentally wrong or, perhaps, +you're not even solving the right problem. + +One fatal mistake is to ignore review comments in the hope that they will +go away. They will not go away. If you repost code without having +responded to the comments you got the time before, you're likely to find +that your patches go nowhere. + +Speaking of reposting code: please bear in mind that reviewers are not +going to remember all the details of the code you posted the last time +around. So it is always a good idea to remind reviewers of previously +raised issues and how you dealt with them; the patch changelog is a good +place for this kind of information. Reviewers should not have to search +through list archives to familiarize themselves with what was said last +time; if you help them get a running start, they will be in a better mood +when they revisit your code. + +What if you've tried to do everything right and things still aren't going +anywhere? Most technical disagreements can be resolved through discussion, +but there are times when somebody simply has to make a decision. If you +honestly believe that this decision is going against you wrongly, you can +always try appealing to a higher power. As of this writing, that higher +power tends to be Andrew Morton. Andrew has a great deal of respect in the +kernel development community; he can often unjam a situation which seems to +be hopelessly blocked. Appealing to Andrew should not be done lightly, +though, and not before all other alternatives have been explored. And bear +in mind, of course, that he may not agree with you either. + + +6.2: WHAT HAPPENS NEXT + +If a patch is considered to be a good thing to add to the kernel, and once +most of the review issues have been resolved, the next step is usually +entry into a subsystem maintainer's tree. How that works varies from one +subsystem to the next; each maintainer has his or her own way of doing +things. In particular, there may be more than one tree - one, perhaps, +dedicated to patches planned for the next merge window, and another for +longer-term work. + +For patches applying to areas for which there is no obvious subsystem tree +(memory management patches, for example), the default tree often ends up +being -mm. Patches which affect multiple subsystems can also end up going +through the -mm tree. + +Inclusion into a subsystem tree can bring a higher level of visibility to a +patch. Now other developers working with that tree will get the patch by +default. Subsystem trees typically feed into -mm and linux-next as well, +making their contents visible to the development community as a whole. At +this point, there's a good chance that you will get more comments from a +new set of reviewers; these comments need to be answered as in the previous +round. + +What may also happen at this point, depending on the nature of your patch, +is that conflicts with work being done by others turn up. In the worst +case, heavy patch conflicts can result in some work being put on the back +burner so that the remaining patches can be worked into shape and merged. +Other times, conflict resolution will involve working with the other +developers and, possibly, moving some patches between trees to ensure that +everything applies cleanly. This work can be a pain, but count your +blessings: before the advent of the linux-next tree, these conflicts often +only turned up during the merge window and had to be addressed in a hurry. +Now they can be resolved at leisure, before the merge window opens. + +Some day, if all goes well, you'll log on and see that your patch has been +merged into the mainline kernel. Congratulations! Once the celebration is +complete (and you have added yourself to the MAINTAINERS file), though, it +is worth remembering an important little fact: the job still is not done. +Merging into the mainline brings its own challenges. + +To begin with, the visibility of your patch has increased yet again. There +may be a new round of comments from developers who had not been aware of +the patch before. It may be tempting to ignore them, since there is no +longer any question of your code being merged. Resist that temptation, +though; you still need to be responsive to developers who have questions or +suggestions. + +More importantly, though: inclusion into the mainline puts your code into +the hands of a much larger group of testers. Even if you have contributed +a driver for hardware which is not yet available, you will be surprised by +how many people will build your code into their kernels. And, of course, +where there are testers, there will be bug reports. + +The worst sort of bug reports are regressions. If your patch causes a +regression, you'll find an uncomfortable number of eyes upon you; +regressions need to be fixed as soon as possible. If you are unwilling or +unable to fix the regression (and nobody else does it for you), your patch +will almost certainly be removed during the stabilization period. Beyond +negating all of the work you have done to get your patch into the mainline, +having a patch pulled as the result of a failure to fix a regression could +well make it harder for you to get work merged in the future. + +After any regressions have been dealt with, there may be other, ordinary +bugs to deal with. The stabilization period is your best opportunity to +fix these bugs and ensure that your code's debut in a mainline kernel +release is as solid as possible. So, please, answer bug reports, and fix +the problems if at all possible. That's what the stabilization period is +for; you can start creating cool new patches once any problems with the old +ones have been taken care of. + +And don't forget that there are other milestones which may also create bug +reports: the next mainline stable release, when prominent distributors pick +up a version of the kernel containing your patch, etc. Continuing to +respond to these reports is a matter of basic pride in your work. If that +is insufficient motivation, though, it's also worth considering that the +development community remembers developers who lose interest in their code +after it's merged. The next time you post a patch, they will be evaluating +it with the assumption that you will not be around to maintain it +afterward. + + +6.3: OTHER THINGS THAT CAN HAPPEN + +One day, you may open your mail client and see that somebody has mailed you +a patch to your code. That is one of the advantages of having your code +out there in the open, after all. If you agree with the patch, you can +either forward it on to the subsystem maintainer (be sure to include a +proper From: line so that the attribution is correct, and add a signoff of +your own), or send an Acked-by: response back and let the original poster +send it upward. + +If you disagree with the patch, send a polite response explaining why. If +possible, tell the author what changes need to be made to make the patch +acceptable to you. There is a certain resistance to merging patches which +are opposed by the author and maintainer of the code, but it only goes so +far. If you are seen as needlessly blocking good work, those patches will +eventually flow around you and get into the mainline anyway. In the Linux +kernel, nobody has absolute veto power over any code. Except maybe Linus. + +On very rare occasion, you may see something completely different: another +developer posts a different solution to your problem. At that point, +chances are that one of the two patches will not be merged, and "mine was +here first" is not considered to be a compelling technical argument. If +somebody else's patch displaces yours and gets into the mainline, there is +really only one way to respond: be pleased that your problem got solved and +get on with your work. Having one's work shoved aside in this manner can +be hurtful and discouraging, but the community will remember your reaction +long after they have forgotten whose patch actually got merged. diff --git a/Documentation/development-process/7.AdvancedTopics b/Documentation/development-process/7.AdvancedTopics new file mode 100644 index 000000000000..a2cf74093aa1 --- /dev/null +++ b/Documentation/development-process/7.AdvancedTopics @@ -0,0 +1,173 @@ +7: ADVANCED TOPICS + +At this point, hopefully, you have a handle on how the development process +works. There is still more to learn, however! This section will cover a +number of topics which can be helpful for developers wanting to become a +regular part of the Linux kernel development process. + +7.1: MANAGING PATCHES WITH GIT + +The use of distributed version control for the kernel began in early 2002, +when Linus first started playing with the proprietary BitKeeper +application. While BitKeeper was controversial, the approach to software +version management it embodied most certainly was not. Distributed version +control enabled an immediate acceleration of the kernel development +project. In current times, there are several free alternatives to +BitKeeper. For better or for worse, the kernel project has settled on git +as its tool of choice. + +Managing patches with git can make life much easier for the developer, +especially as the volume of those patches grows. Git also has its rough +edges and poses certain hazards; it is a young and powerful tool which is +still being civilized by its developers. This document will not attempt to +teach the reader how to use git; that would be sufficient material for a +long document in its own right. Instead, the focus here will be on how git +fits into the kernel development process in particular. Developers who +wish to come up to speed with git will find more information at: + + http://git.or.cz/ + + http://www.kernel.org/pub/software/scm/git/docs/user-manual.html + +and on various tutorials found on the web. + +The first order of business is to read the above sites and get a solid +understanding of how git works before trying to use it to make patches +available to others. A git-using developer should be able to obtain a copy +of the mainline repository, explore the revision history, commit changes to +the tree, use branches, etc. An understanding of git's tools for the +rewriting of history (such as rebase) is also useful. Git comes with its +own terminology and concepts; a new user of git should know about refs, +remote branches, the index, fast-forward merges, pushes and pulls, detached +heads, etc. It can all be a little intimidating at the outset, but the +concepts are not that hard to grasp with a bit of study. + +Using git to generate patches for submission by email can be a good +exercise while coming up to speed. + +When you are ready to start putting up git trees for others to look at, you +will, of course, need a server that can be pulled from. Setting up such a +server with git-daemon is relatively straightforward if you have a system +which is accessible to the Internet. Otherwise, free, public hosting sites +(Github, for example) are starting to appear on the net. Established +developers can get an account on kernel.org, but those are not easy to come +by; see http://kernel.org/faq/ for more information. + +The normal git workflow involves the use of a lot of branches. Each line +of development can be separated into a separate "topic branch" and +maintained independently. Branches in git are cheap, there is no reason to +not make free use of them. And, in any case, you should not do your +development in any branch which you intend to ask others to pull from. +Publicly-available branches should be created with care; merge in patches +from development branches when they are in complete form and ready to go - +not before. + +Git provides some powerful tools which can allow you to rewrite your +development history. An inconvenient patch (one which breaks bisection, +say, or which has some other sort of obvious bug) can be fixed in place or +made to disappear from the history entirely. A patch series can be +rewritten as if it had been written on top of today's mainline, even though +you have been working on it for months. Changes can be transparently +shifted from one branch to another. And so on. Judicious use of git's +ability to revise history can help in the creation of clean patch sets with +fewer problems. + +Excessive use of this capability can lead to other problems, though, beyond +a simple obsession for the creation of the perfect project history. +Rewriting history will rewrite the changes contained in that history, +turning a tested (hopefully) kernel tree into an untested one. But, beyond +that, developers cannot easily collaborate if they do not have a shared +view of the project history; if you rewrite history which other developers +have pulled into their repositories, you will make life much more difficult +for those developers. So a simple rule of thumb applies here: history +which has been exported to others should generally be seen as immutable +thereafter. + +So, once you push a set of changes to your publicly-available server, those +changes should not be rewritten. Git will attempt to enforce this rule if +you try to push changes which do not result in a fast-forward merge +(i.e. changes which do not share the same history). It is possible to +override this check, and there may be times when it is necessary to rewrite +an exported tree. Moving changesets between trees to avoid conflicts in +linux-next is one example. But such actions should be rare. This is one +of the reasons why development should be done in private branches (which +can be rewritten if necessary) and only moved into public branches when +it's in a reasonably advanced state. + +As the mainline (or other tree upon which a set of changes is based) +advances, it is tempting to merge with that tree to stay on the leading +edge. For a private branch, rebasing can be an easy way to keep up with +another tree, but rebasing is not an option once a tree is exported to the +world. Once that happens, a full merge must be done. Merging occasionally +makes good sense, but overly frequent merges can clutter the history +needlessly. Suggested technique in this case is to merge infrequently, and +generally only at specific release points (such as a mainline -rc +release). If you are nervous about specific changes, you can always +perform test merges in a private branch. The git "rerere" tool can be +useful in such situations; it remembers how merge conflicts were resolved +so that you don't have to do the same work twice. + +One of the biggest recurring complaints about tools like git is this: the +mass movement of patches from one repository to another makes it easy to +slip in ill-advised changes which go into the mainline below the review +radar. Kernel developers tend to get unhappy when they see that kind of +thing happening; putting up a git tree with unreviewed or off-topic patches +can affect your ability to get trees pulled in the future. Quoting Linus: + + You can send me patches, but for me to pull a git patch from you, I + need to know that you know what you're doing, and I need to be able + to trust things *without* then having to go and check every + individual change by hand. + +(http://lwn.net/Articles/224135/). + +To avoid this kind of situation, ensure that all patches within a given +branch stick closely to the associated topic; a "driver fixes" branch +should not be making changes to the core memory management code. And, most +importantly, do not use a git tree to bypass the review process. Post an +occasional summary of the tree to the relevant list, and, when the time is +right, request that the tree be included in linux-next. + +If and when others start to send patches for inclusion into your tree, +don't forget to review them. Also ensure that you maintain the correct +authorship information; the git "am" tool does its best in this regard, but +you may have to add a "From:" line to the patch if it has been relayed to +you via a third party. + +When requesting a pull, be sure to give all the relevant information: where +your tree is, what branch to pull, and what changes will result from the +pull. The git request-pull command can be helpful in this regard; it will +format the request as other developers expect, and will also check to be +sure that you have remembered to push those changes to the public server. + + +7.2: REVIEWING PATCHES + +Some readers will certainly object to putting this section with "advanced +topics" on the grounds that even beginning kernel developers should be +reviewing patches. It is certainly true that there is no better way to +learn how to program in the kernel environment than by looking at code +posted by others. In addition, reviewers are forever in short supply; by +looking at code you can make a significant contribution to the process as a +whole. + +Reviewing code can be an intimidating prospect, especially for a new kernel +developer who may well feel nervous about questioning code - in public - +which has been posted by those with more experience. Even code written by +the most experienced developers can be improved, though. Perhaps the best +piece of advice for reviewers (all reviewers) is this: phrase review +comments as questions rather than criticisms. Asking "how does the lock +get released in this path?" will always work better than stating "the +locking here is wrong." + +Different developers will review code from different points of view. Some +are mostly concerned with coding style and whether code lines have trailing +white space. Others will focus primarily on whether the change implemented +by the patch as a whole is a good thing for the kernel or not. Yet others +will check for problematic locking, excessive stack usage, possible +security issues, duplication of code found elsewhere, adequate +documentation, adverse effects on performance, user-space ABI changes, etc. +All types of review, if they lead to better code going into the kernel, are +welcome and worthwhile. + + diff --git a/Documentation/development-process/8.Conclusion b/Documentation/development-process/8.Conclusion new file mode 100644 index 000000000000..1990ab4b4949 --- /dev/null +++ b/Documentation/development-process/8.Conclusion @@ -0,0 +1,74 @@ +8: FOR MORE INFORMATION + +There are numerous sources of information on Linux kernel development and +related topics. First among those will always be the Documentation +directory found in the kernel source distribution. The top-level HOWTO +file is an important starting point; SubmittingPatches and +SubmittingDrivers are also something which all kernel developers should +read. Many internal kernel APIs are documented using the kerneldoc +mechanism; "make htmldocs" or "make pdfdocs" can be used to generate those +documents in HTML or PDF format (though the version of TeX shipped by some +distributions runs into internal limits and fails to process the documents +properly). + +Various web sites discuss kernel development at all levels of detail. Your +author would like to humbly suggest http://lwn.net/ as a source; +information on many specific kernel topics can be found via the LWN kernel +index at: + + http://lwn.net/Kernel/Index/ + +Beyond that, a valuable resource for kernel developers is: + + http://kernelnewbies.org/ + +Information about the linux-next tree gathers at: + + http://linux.f-seidel.de/linux-next/pmwiki/ + +And, of course, one should not forget http://kernel.org/, the definitive +location for kernel release information. + +There are a number of books on kernel development: + + Linux Device Drivers, 3rd Edition (Jonathan Corbet, Alessandro + Rubini, and Greg Kroah-Hartman). Online at + http://lwn.net/Kernel/LDD3/. + + Linux Kernel Development (Robert Love). + + Understanding the Linux Kernel (Daniel Bovet and Marco Cesati). + +All of these books suffer from a common fault, though: they tend to be +somewhat obsolete by the time they hit the shelves, and they have been on +the shelves for a while now. Still, there is quite a bit of good +information to be found there. + +Documentation for git can be found at: + + http://www.kernel.org/pub/software/scm/git/docs/ + + http://www.kernel.org/pub/software/scm/git/docs/user-manual.html + + +9: CONCLUSION + +Congratulations to anybody who has made it through this long-winded +document. Hopefully it has provided a helpful understanding of how the +Linux kernel is developed and how you can participate in that process. + +In the end, it's the participation that matters. Any open source software +project is no more than the sum of what its contributors put into it. The +Linux kernel has progressed as quickly and as well as it has because it has +been helped by an impressively large group of developers, all of whom are +working to make it better. The kernel is a premier example of what can be +done when thousands of people work together toward a common goal. + +The kernel can always benefit from a larger developer base, though. There +is always more work to do. But, just as importantly, most other +participants in the Linux ecosystem can benefit through contributing to the +kernel. Getting code into the mainline is the key to higher code quality, +lower maintenance and distribution costs, a higher level of influence over +the direction of kernel development, and more. It is a situation where +everybody involved wins. Fire up your editor and come join us; you will be +more than welcome. diff --git a/Documentation/dontdiff b/Documentation/dontdiff index 27809357da58..1e89a51ea49b 100644 --- a/Documentation/dontdiff +++ b/Documentation/dontdiff @@ -2,11 +2,13 @@ *.aux *.bin *.cpio -*.css +*.csp +*.dsp *.dvi +*.elf *.eps -*.fw.gen.S *.fw +*.gen.S *.gif *.grep *.grp @@ -30,6 +32,7 @@ *.s *.sgml *.so +*.so.dbg *.symtypes *.tab.c *.tab.h @@ -38,24 +41,17 @@ *.xml *_MODULES *_vga16.c -*cscope* *~ *.9 *.9.gz .* -.cscope -.gitignore -.mailmap .mm 53c700_d.h -53c8xx_d.h* -COPYING -CREDITS CVS ChangeSet Image Kerntypes -MODS.txt +Module.markers Module.symvers PENDING SCCS @@ -73,7 +69,9 @@ autoconf.h* bbootsect bin2c binkernel.spec +binoffset bootsect +bounds.h bsetup btfixupprep build @@ -89,39 +87,36 @@ config_data.h* config_data.gz* conmakehash consolemap_deftbl.c* +cpustr.h crc32table.h* cscope.* -defkeymap.c* +defkeymap.c devlist.h* docproc -dummy_sym.c* elf2ecoff elfconfig.h* -filelist fixdep fore200e_mkfirm fore200e_pca_fw.c* gconf gen-devlist -gen-kdb_cmds.c* gen_crc32table gen_init_cpio genksyms -gentbl *_gray256.c +ihex2fw ikconfig.h* initramfs_data.cpio initramfs_data.cpio.gz initramfs_list kallsyms kconfig -kconfig.tk -keywords.c* +keywords.c ksym.c* ksym.h* kxgettext lkc_defs.h -lex.c* +lex.c lex.*.c logo_*.c logo_*_clut224.c @@ -130,7 +125,6 @@ lxdialog mach-types mach-types.h machtypes.h -make_times_h map maui_boot.h mconf @@ -138,6 +132,7 @@ miboot* mk_elfconfig mkboot mkbugboot +mkcpustr mkdep mkprep mktables @@ -145,11 +140,12 @@ mktree modpost modules.order modversions.h* +ncscope.* offset.h offsets.h oui.c* -parse.c* -parse.h* +parse.c +parse.h patches* pca200e.bin pca200e_ecd.bin2 @@ -157,7 +153,7 @@ piggy.gz piggyback pnmtologo ppc_defs.h* -promcon_tbl.c* +promcon_tbl.c pss_boot.h qconf raid6altivec*.c @@ -168,27 +164,38 @@ series setup setup.bin setup.elf -sim710_d.h* sImage sm_tbl* split-include +syscalltab.h tags tftpboot.img timeconst.h times.h* -tkparse trix_boot.h utsrelease.h* +vdso-syms.lds vdso.lds +vdso32-int80-syms.lds +vdso32-syms.lds +vdso32-syscall-syms.lds +vdso32-sysenter-syms.lds +vdso32.lds +vdso32.so.dbg +vdso64.lds +vdso64.so.dbg version.h* vmlinux vmlinux-* vmlinux.aout -vmlinux*.lds* -vmlinux*.scr +vmlinux.lds vsyscall.lds +vsyscall_32.lds wanxlfw.inc uImage unifdef +wakeup.bin +wakeup.elf +wakeup.lds zImage* zconf.hash.c diff --git a/Documentation/fb/intelfb.txt b/Documentation/fb/intelfb.txt index 27a3160650a4..dd9e944ea628 100644 --- a/Documentation/fb/intelfb.txt +++ b/Documentation/fb/intelfb.txt @@ -14,6 +14,7 @@ graphics devices. These would include: Intel 915GM Intel 945G Intel 945GM + Intel 945GME Intel 965G Intel 965GM diff --git a/Documentation/fb/uvesafb.txt b/Documentation/fb/uvesafb.txt index bcfc233a0080..7ac3c4078ff9 100644 --- a/Documentation/fb/uvesafb.txt +++ b/Documentation/fb/uvesafb.txt @@ -52,7 +52,7 @@ are either given on the kernel command line or as module parameters, e.g.: video=uvesafb:1024x768-32,mtrr:3,ywrap (compiled into the kernel) - # modprobe uvesafb mode=1024x768-32 mtrr=3 scroll=ywrap (module) + # modprobe uvesafb mode_option=1024x768-32 mtrr=3 scroll=ywrap (module) Accepted options: @@ -105,7 +105,7 @@ vtotal:n <mode> The mode you want to set, in the standard modedb format. Refer to modedb.txt for a detailed description. When uvesafb is compiled as a module, the mode string should be provided as a value of the - 'mode' option. + 'mode_option' option. vbemode:x Force the use of VBE mode x. The mode will only be set if it's diff --git a/Documentation/fb/viafb.modes b/Documentation/fb/viafb.modes new file mode 100644 index 000000000000..02e5b487f00e --- /dev/null +++ b/Documentation/fb/viafb.modes @@ -0,0 +1,870 @@ +# +# +# These data are based on the CRTC parameters in +# +# VIA Integration Graphics Chip +# (C) 2004 VIA Technologies Inc. +# + +# +# 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) +# +# Horizontal Vertical +# Resolution 640 480 +# Scan Frequency 31.469 kHz 59.94 Hz +# Sync Width 3.813 us 0.064 ms +# 12 chars 2 lines +# Front Porch 0.636 us 0.318 ms +# 2 chars 10 lines +# Back Porch 1.907 us 1.048 ms +# 6 chars 33 lines +# Active Time 25.422 us 15.253 ms +# 80 chars 480 lines +# Blank Time 6.356 us 1.430 ms +# 20 chars 45 lines +# Polarity negative negative +# + +mode "640x480-60" +# D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz + geometry 640 480 640 480 32 + timings 39722 48 16 33 10 96 2 endmode mode "480x640-60" +# D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz + geometry 480 640 480 640 32 timings 39722 72 24 19 1 48 3 endmode +# +# 640x480, 75 Hz, Non-Interlaced (31.50 MHz dotclock) +# +# Horizontal Vertical +# Resolution 640 480 +# Scan Frequency 37.500 kHz 75.00 Hz +# Sync Width 2.032 us 0.080 ms +# 8 chars 3 lines +# Front Porch 0.508 us 0.027 ms +# 2 chars 1 lines +# Back Porch 3.810 us 0.427 ms +# 15 chars 16 lines +# Active Time 20.317 us 12.800 ms +# 80 chars 480 lines +# Blank Time 6.349 us 0.533 ms +# 25 chars 20 lines +# Polarity negative negative +# + mode "640x480-75" +# D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz + geometry 640 480 640 480 32 timings 31747 120 16 16 1 64 3 endmode +# +# 640x480, 85 Hz, Non-Interlaced (36.000 MHz dotclock) +# +# Horizontal Vertical +# Resolution 640 480 +# Scan Frequency 43.269 kHz 85.00 Hz +# Sync Width 1.556 us 0.069 ms +# 7 chars 3 lines +# Front Porch 1.556 us 0.023 ms +# 7 chars 1 lines +# Back Porch 2.222 us 0.578 ms +# 10 chars 25 lines +# Active Time 17.778 us 11.093 ms +# 80 chars 480 lines +# Blank Time 5.333 us 0.670 ms +# 24 chars 29 lines +# Polarity negative negative +# + mode "640x480-85" +# D: 36.000 MHz, H: 43.269 kHz, V: 85.00 Hz + geometry 640 480 640 480 32 timings 27777 80 56 25 1 56 3 endmode +# +# 640x480, 100 Hz, Non-Interlaced (43.163 MHz dotclock) +# +# Horizontal Vertical +# Resolution 640 480 +# Scan Frequency 50.900 kHz 100.00 Hz +# Sync Width 1.483 us 0.058 ms +# 8 chars 3 lines +# Front Porch 0.927 us 0.019 ms +# 5 chars 1 lines +# Back Porch 2.409 us 0.475 ms +# 13 chars 25 lines +# Active Time 14.827 us 9.430 ms +# 80 chars 480 lines +# Blank Time 4.819 us 0.570 ms +# 26 chars 29 lines +# Polarity positive positive +# + mode "640x480-100" +# D: 43.163 MHz, H: 50.900 kHz, V: 100.00 Hz + geometry 640 480 640 480 32 timings 23168 104 40 25 1 64 3 endmode +# +# 640x480, 120 Hz, Non-Interlaced (52.406 MHz dotclock) +# +# Horizontal Vertical +# Resolution 640 480 +# Scan Frequency 61.800 kHz 120.00 Hz +# Sync Width 1.221 us 0.048 ms +# 8 chars 3 lines +# Front Porch 0.763 us 0.016 ms +# 5 chars 1 lines +# Back Porch 1.984 us 0.496 ms +# 13 chars 31 lines +# Active Time 12.212 us 7.767 ms +# 80 chars 480 lines +# Blank Time 3.969 us 0.566 ms +# 26 chars 35 lines +# Polarity positive positive +# + mode "640x480-120" +# D: 52.406 MHz, H: 61.800 kHz, V: 120.00 Hz + geometry 640 480 640 480 32 timings 19081 104 40 31 1 64 3 endmode +# +# 720x480, 60 Hz, Non-Interlaced (26.880 MHz dotclock) +# +# Horizontal Vertical +# Resolution 720 480 +# Scan Frequency 30.000 kHz 60.241 Hz +# Sync Width 2.679 us 0.099 ms +# 9 chars 3 lines +# Front Porch 0.595 us 0.033 ms +# 2 chars 1 lines +# Back Porch 3.274 us 0.462 ms +# 11 chars 14 lines +# Active Time 26.786 us 16.000 ms +# 90 chars 480 lines +# Blank Time 6.548 us 0.600 ms +# 22 chars 18 lines +# Polarity positive positive +# + mode "720x480-60" +# D: 26.880 MHz, H: 30.000 kHz, V: 60.24 Hz + geometry 720 480 720 480 32 timings 37202 88 16 14 1 72 3 endmode +# +# 800x480, 60 Hz, Non-Interlaced (29.581 MHz dotclock) +# +# Horizontal Vertical +# Resolution 800 480 +# Scan Frequency 29.892 kHz 60.00 Hz +# Sync Width 2.704 us 100.604 us +# 10 chars 3 lines +# Front Porch 0.541 us 33.535 us +# 2 chars 1 lines +# Back Porch 3.245 us 435.949 us +# 12 chars 13 lines +# Active Time 27.044 us 16.097 ms +# 100 chars 480 lines +# Blank Time 6.491 us 0.570 ms +# 24 chars 17 lines +# Polarity positive positive +# + mode "800x480-60" +# D: 29.500 MHz, H: 29.738 kHz, V: 60.00 Hz + geometry 800 480 800 480 32 timings 33805 96 24 10 3 72 7 endmode +# +# 720x576, 60 Hz, Non-Interlaced (32.668 MHz dotclock) +# +# Horizontal Vertical +# Resolution 720 576 +# Scan Frequency 35.820 kHz 60.00 Hz +# Sync Width 2.204 us 0.083 ms +# 9 chars 3 lines +# Front Porch 0.735 us 0.027 ms +# 3 chars 1 lines +# Back Porch 2.939 us 0.459 ms +# 12 chars 17 lines +# Active Time 22.040 us 16.080 ms +# 90 chars 476 lines +# Blank Time 5.877 us 0.586 ms +# 24 chars 21 lines +# Polarity positive positive +# + mode "720x576-60" +# D: 32.668 MHz, H: 35.820 kHz, V: 60.00 Hz + geometry 720 576 720 576 32 timings 30611 96 24 17 1 72 3 endmode +# +# 800x600, 60 Hz, Non-Interlaced (40.00 MHz dotclock) +# +# Horizontal Vertical +# Resolution 800 600 +# Scan Frequency 37.879 kHz 60.32 Hz +# Sync Width 3.200 us 0.106 ms +# 16 chars 4 lines +# Front Porch 1.000 us 0.026 ms +# 5 chars 1 lines +# Back Porch 2.200 us 0.607 ms +# 11 chars 23 lines +# Active Time 20.000 us 15.840 ms +# 100 chars 600 lines +# Blank Time 6.400 us 0.739 ms +# 32 chars 28 lines +# Polarity positive positive +# + mode "800x600-60" +# D: 40.00 MHz, H: 37.879 kHz, V: 60.32 Hz + geometry 800 600 800 600 32 + timings 25000 88 40 23 1 128 4 hsync high vsync high endmode +# +# 800x600, 75 Hz, Non-Interlaced (49.50 MHz dotclock) +# +# Horizontal Vertical +# Resolution 800 600 +# Scan Frequency 46.875 kHz 75.00 Hz +# Sync Width 1.616 us 0.064 ms +# 10 chars 3 lines +# Front Porch 0.323 us 0.021 ms +# 2 chars 1 lines +# Back Porch 3.232 us 0.448 ms +# 20 chars 21 lines +# Active Time 16.162 us 12.800 ms +# 100 chars 600 lines +# Blank Time 5.172 us 0.533 ms +# 32 chars 25 lines +# Polarity positive positive +# + mode "800x600-75" +# D: 49.50 MHz, H: 46.875 kHz, V: 75.00 Hz + geometry 800 600 800 600 32 + timings 20203 160 16 21 1 80 3 hsync high vsync high endmode +# +# 800x600, 85 Hz, Non-Interlaced (56.25 MHz dotclock) +# +# Horizontal Vertical +# Resolution 800 600 +# Scan Frequency 53.674 kHz 85.061 Hz +# Sync Width 1.138 us 0.056 ms +# 8 chars 3 lines +# Front Porch 0.569 us 0.019 ms +# 4 chars 1 lines +# Back Porch 2.702 us 0.503 ms +# 19 chars 27 lines +# Active Time 14.222 us 11.179 ms +# 100 chars 600 lines +# Blank Time 4.409 us 0.578 ms +# 31 chars 31 lines +# Polarity positive positive +# + mode "800x600-85" +# D: 56.25 MHz, H: 53.674 kHz, V: 85.061 Hz + geometry 800 600 800 600 32 + timings 17777 152 32 27 1 64 3 hsync high vsync high endmode +# +# 800x600, 100 Hz, Non-Interlaced (67.50 MHz dotclock) +# +# Horizontal Vertical +# Resolution 800 600 +# Scan Frequency 62.500 kHz 100.00 Hz +# Sync Width 0.948 us 0.064 ms +# 8 chars 4 lines +# Front Porch 0.000 us 0.112 ms +# 0 chars 7 lines +# Back Porch 3.200 us 0.224 ms +# 27 chars 14 lines +# Active Time 11.852 us 9.600 ms +# 100 chars 600 lines +# Blank Time 4.148 us 0.400 ms +# 35 chars 25 lines +# Polarity positive positive +# + mode "800x600-100" +# D: 67.50 MHz, H: 62.500 kHz, V: 100.00 Hz + geometry 800 600 800 600 32 + timings 14667 216 0 14 7 64 4 hsync high vsync high endmode +# +# 800x600, 120 Hz, Non-Interlaced (83.950 MHz dotclock) +# +# Horizontal Vertical +# Resolution 800 600 +# Scan Frequency 77.160 kHz 120.00 Hz +# Sync Width 1.048 us 0.039 ms +# 11 chars 3 lines +# Front Porch 0.667 us 0.013 ms +# 7 chars 1 lines +# Back Porch 1.715 us 0.507 ms +# 18 chars 39 lines +# Active Time 9.529 us 7.776 ms +# 100 chars 600 lines +# Blank Time 3.431 us 0.557 ms +# 36 chars 43 lines +# Polarity positive positive +# + mode "800x600-120" +# D: 83.950 MHz, H: 77.160 kHz, V: 120.00 Hz + geometry 800 600 800 600 32 + timings 11912 144 56 39 1 88 3 hsync high vsync high endmode +# +# 848x480, 60 Hz, Non-Interlaced (31.490 MHz dotclock) +# +# Horizontal Vertical +# Resolution 848 480 +# Scan Frequency 29.820 kHz 60.00 Hz +# Sync Width 2.795 us 0.099 ms +# 11 chars 3 lines +# Front Porch 0.508 us 0.033 ms +# 2 chars 1 lines +# Back Porch 3.303 us 0.429 ms +# 13 chars 13 lines +# Active Time 26.929 us 16.097 ms +# 106 chars 480 lines +# Blank Time 6.605 us 0.570 ms +# 26 chars 17 lines +# Polarity positive positive +# + mode "848x480-60" +# D: 31.500 MHz, H: 29.830 kHz, V: 60.00 Hz + geometry 848 480 848 480 32 + timings 31746 104 24 12 3 80 5 hsync high vsync high endmode +# +# 856x480, 60 Hz, Non-Interlaced (31.728 MHz dotclock) +# +# Horizontal Vertical +# Resolution 856 480 +# Scan Frequency 29.820 kHz 60.00 Hz +# Sync Width 2.774 us 0.099 ms +# 11 chars 3 lines +# Front Porch 0.504 us 0.033 ms +# 2 chars 1 lines +# Back Porch 3.728 us 0.429 ms +# 13 chars 13 lines +# Active Time 26.979 us 16.097 ms +# 107 chars 480 lines +# Blank Time 6.556 us 0.570 ms +# 26 chars 17 lines +# Polarity positive positive +# + mode "856x480-60" +# D: 31.728 MHz, H: 29.820 kHz, V: 60.00 Hz + geometry 856 480 856 480 32 + timings 31518 104 16 13 1 88 3 + hsync high vsync high endmode mode "960x600-60" +# D: 45.250 MHz, H: 37.212 kHz, V: 60.00 Hz + geometry 960 600 960 600 32 timings 22099 128 32 15 3 96 6 endmode +# +# 1000x600, 60 Hz, Non-Interlaced (48.068 MHz dotclock) +# +# Horizontal Vertical +# Resolution 1000 600 +# Scan Frequency 37.320 kHz 60.00 Hz +# Sync Width 2.164 us 0.080 ms +# 13 chars 3 lines +# Front Porch 0.832 us 0.027 ms +# 5 chars 1 lines +# Back Porch 2.996 us 0.483 ms +# 18 chars 18 lines +# Active Time 20.804 us 16.077 ms +# 125 chars 600 lines +# Blank Time 5.991 us 0.589 ms +# 36 chars 22 lines +# Polarity negative positive +# + mode "1000x600-60" +# D: 48.068 MHz, H: 37.320 kHz, V: 60.00 Hz + geometry 1000 600 1000 600 32 + timings 20834 144 40 18 1 104 3 endmode mode "1024x576-60" +# D: 46.996 MHz, H: 35.820 kHz, V: 60.00 Hz + geometry 1024 576 1024 576 32 + timings 21278 144 40 17 1 104 3 endmode mode "1024x600-60" +# D: 48.964 MHz, H: 37.320 kHz, V: 60.00 Hz + geometry 1024 600 1024 600 32 + timings 20461 144 40 18 1 104 3 endmode mode "1088x612-60" +# D: 52.952 MHz, H: 38.040 kHz, V: 60.00 Hz + geometry 1088 612 1088 612 32 timings 18877 152 48 16 3 104 5 endmode +# +# 1024x512, 60 Hz, Non-Interlaced (41.291 MHz dotclock) +# +# Horizontal Vertical +# Resolution 1024 512 +# Scan Frequency 31.860 kHz 60.00 Hz +# Sync Width 2.519 us 0.094 ms +# 13 chars 3 lines +# Front Porch 0.775 us 0.031 ms +# 4 chars 1 lines +# Back Porch 3.294 us 0.465 ms +# 17 chars 15 lines +# Active Time 24.800 us 16.070 ms +# 128 chars 512 lines +# Blank Time 6.587 us 0.596 ms +# 34 chars 19 lines +# Polarity positive positive +# + mode "1024x512-60" +# D: 41.291 MHz, H: 31.860 kHz, V: 60.00 Hz + geometry 1024 512 1024 512 32 + timings 24218 126 32 15 1 104 3 hsync high vsync high endmode +# +# 1024x600, 60 Hz, Non-Interlaced (48.875 MHz dotclock) +# +# Horizontal Vertical +# Resolution 1024 768 +# Scan Frequency 37.252 kHz 60.00 Hz +# Sync Width 2.128 us 80.532us +# 13 chars 3 lines +# Front Porch 0.818 us 26.844 us +# 5 chars 1 lines +# Back Porch 2.946 us 483.192 us +# 18 chars 18 lines +# Active Time 20.951 us 16.697 ms +# 128 chars 622 lines +# Blank Time 5.893 us 0.591 ms +# 36 chars 22 lines +# Polarity negative positive +# +#mode "1024x600-60" +# # D: 48.875 MHz, H: 37.252 kHz, V: 60.00 Hz +# geometry 1024 600 1024 600 32 +# timings 20460 144 40 18 1 104 3 +# endmode +# +# 1024x768, 60 Hz, Non-Interlaced (65.00 MHz dotclock) +# +# Horizontal Vertical +# Resolution 1024 768 +# Scan Frequency 48.363 kHz 60.00 Hz +# Sync Width 2.092 us 0.124 ms +# 17 chars 6 lines +# Front Porch 0.369 us 0.062 ms +# 3 chars 3 lines +# Back Porch 2.462 us 0.601 ms +# 20 chars 29 lines +# Active Time 15.754 us 15.880 ms +# 128 chars 768 lines +# Blank Time 4.923 us 0.786 ms +# 40 chars 38 lines +# Polarity negative negative +# + mode "1024x768-60" +# D: 65.00 MHz, H: 48.363 kHz, V: 60.00 Hz + geometry 1024 768 1024 768 32 timings 15385 160 24 29 3 136 6 endmode +# +# 1024x768, 75 Hz, Non-Interlaced (78.75 MHz dotclock) +# +# Horizontal Vertical +# Resolution 1024 768 +# Scan Frequency 60.023 kHz 75.03 Hz +# Sync Width 1.219 us 0.050 ms +# 12 chars 3 lines +# Front Porch 0.203 us 0.017 ms +# 2 chars 1 lines +# Back Porch 2.235 us 0.466 ms +# 22 chars 28 lines +# Active Time 13.003 us 12.795 ms +# 128 chars 768 lines +# Blank Time 3.657 us 0.533 ms +# 36 chars 32 lines +# Polarity positive positive +# + mode "1024x768-75" +# D: 78.75 MHz, H: 60.023 kHz, V: 75.03 Hz + geometry 1024 768 1024 768 32 + timings 12699 176 16 28 1 96 3 hsync high vsync high endmode +# +# 1024x768, 85 Hz, Non-Interlaced (94.50 MHz dotclock) +# +# Horizontal Vertical +# Resolution 1024 768 +# Scan Frequency 68.677 kHz 85.00 Hz +# Sync Width 1.016 us 0.044 ms +# 12 chars 3 lines +# Front Porch 0.508 us 0.015 ms +# 6 chars 1 lines +# Back Porch 2.201 us 0.524 ms +# 26 chars 36 lines +# Active Time 10.836 us 11.183 ms +# 128 chars 768 lines +# Blank Time 3.725 us 0.582 ms +# 44 chars 40 lines +# Polarity positive positive +# + mode "1024x768-85" +# D: 94.50 MHz, H: 68.677 kHz, V: 85.00 Hz + geometry 1024 768 1024 768 32 + timings 10582 208 48 36 1 96 3 hsync high vsync high endmode +# +# 1024x768, 100 Hz, Non-Interlaced (110.0 MHz dotclock) +# +# Horizontal Vertical +# Resolution 1024 768 +# Scan Frequency 79.023 kHz 99.78 Hz +# Sync Width 0.800 us 0.101 ms +# 11 chars 8 lines +# Front Porch 0.000 us 0.000 ms +# 0 chars 0 lines +# Back Porch 2.545 us 0.202 ms +# 35 chars 16 lines +# Active Time 9.309 us 9.719 ms +# 128 chars 768 lines +# Blank Time 3.345 us 0.304 ms +# 46 chars 24 lines +# Polarity negative negative +# + mode "1024x768-100" +# D: 113.3 MHz, H: 79.023 kHz, V: 99.78 Hz + geometry 1024 768 1024 768 32 + timings 8825 280 0 16 0 88 8 endmode mode "1152x720-60" +# D: 66.750 MHz, H: 44.859 kHz, V: 60.00 Hz + geometry 1152 720 1152 720 32 timings 14981 168 56 19 3 112 6 endmode +# +# 1152x864, 75 Hz, Non-Interlaced (110.0 MHz dotclock) +# +# Horizontal Vertical +# Resolution 1152 864 +# Scan Frequency 75.137 kHz 74.99 Hz +# Sync Width 1.309 us 0.106 ms +# 18 chars 8 lines +# Front Porch 0.245 us 0.599 ms +# 3 chars 45 lines +# Back Porch 1.282 us 1.132 ms +# 18 chars 85 lines +# Active Time 10.473 us 11.499 ms +# 144 chars 864 lines +# Blank Time 2.836 us 1.837 ms +# 39 chars 138 lines +# Polarity positive positive +# + mode "1152x864-75" +# D: 110.0 MHz, H: 75.137 kHz, V: 74.99 Hz + geometry 1152 864 1152 864 32 + timings 9259 144 24 85 45 144 8 + hsync high vsync high endmode mode "1200x720-60" +# D: 70.184 MHz, H: 44.760 kHz, V: 60.00 Hz + geometry 1200 720 1200 720 32 + timings 14253 184 28 22 1 128 3 endmode mode "1280x600-60" +# D: 61.503 MHz, H: 37.320 kHz, V: 60.00 Hz + geometry 1280 600 1280 600 32 + timings 16260 184 28 18 1 128 3 endmode mode "1280x720-50" +# D: 60.466 MHz, H: 37.050 kHz, V: 50.00 Hz + geometry 1280 720 1280 720 32 + timings 16538 176 48 17 1 128 3 endmode mode "1280x768-50" +# D: 65.178 MHz, H: 39.550 kHz, V: 50.00 Hz + geometry 1280 768 1280 768 32 timings 15342 184 28 19 1 128 3 endmode +# +# 1280x768, 60 Hz, Non-Interlaced (80.136 MHz dotclock) +# +# Horizontal Vertical +# Resolution 1280 768 +# Scan Frequency 47.700 kHz 60.00 Hz +# Sync Width 1.697 us 0.063 ms +# 17 chars 3 lines +# Front Porch 0.799 us 0.021 ms +# 8 chars 1 lines +# Back Porch 2.496 us 0.483 ms +# 25 chars 23 lines +# Active Time 15.973 us 16.101 ms +# 160 chars 768 lines +# Blank Time 4.992 us 0.566 ms +# 50 chars 27 lines +# Polarity positive positive +# + mode "1280x768-60" +# D: 80.13 MHz, H: 47.700 kHz, V: 60.00 Hz + geometry 1280 768 1280 768 32 + timings 12480 200 48 23 1 126 3 hsync high vsync high endmode +# +# 1280x800, 60 Hz, Non-Interlaced (83.375 MHz dotclock) +# +# Horizontal Vertical +# Resolution 1280 800 +# Scan Frequency 49.628 kHz 60.00 Hz +# Sync Width 1.631 us 60.450 us +# 17 chars 3 lines +# Front Porch 0.768 us 20.15 us +# 8 chars 1 lines +# Back Porch 2.399 us 0.483 ms +# 25 chars 24 lines +# Active Time 15.352 us 16.120 ms +# 160 chars 800 lines +# Blank Time 4.798 us 0.564 ms +# 50 chars 28 lines +# Polarity negtive positive +# + mode "1280x800-60" +# D: 83.500 MHz, H: 49.702 kHz, V: 60.00 Hz + geometry 1280 800 1280 800 32 timings 11994 200 72 22 3 128 6 endmode +# +# 1280x960, 60 Hz, Non-Interlaced (108.00 MHz dotclock) +# +# Horizontal Vertical +# Resolution 1280 960 +# Scan Frequency 60.000 kHz 60.00 Hz +# Sync Width 1.037 us 0.050 ms +# 14 chars 3 lines +# Front Porch 0.889 us 0.017 ms +# 12 chars 1 lines +# Back Porch 2.889 us 0.600 ms +# 39 chars 36 lines +# Active Time 11.852 us 16.000 ms +# 160 chars 960 lines +# Blank Time 4.815 us 0.667 ms +# 65 chars 40 lines +# Polarity positive positive +# + mode "1280x960-60" +# D: 108.00 MHz, H: 60.000 kHz, V: 60.00 Hz + geometry 1280 960 1280 960 32 + timings 9259 312 96 36 1 112 3 hsync high vsync high endmode +# +# 1280x1024, 60 Hz, Non-Interlaced (108.00 MHz dotclock) +# +# Horizontal Vertical +# Resolution 1280 1024 +# Scan Frequency 63.981 kHz 60.02 Hz +# Sync Width 1.037 us 0.047 ms +# 14 chars 3 lines +# Front Porch 0.444 us 0.015 ms +# 6 chars 1 lines +# Back Porch 2.297 us 0.594 ms +# 31 chars 38 lines +# Active Time 11.852 us 16.005 ms +# 160 chars 1024 lines +# Blank Time 3.778 us 0.656 ms +# 51 chars 42 lines +# Polarity positive positive +# + mode "1280x1024-60" +# D: 108.00 MHz, H: 63.981 kHz, V: 60.02 Hz + geometry 1280 1024 1280 1024 32 + timings 9260 248 48 38 1 112 3 hsync high vsync high endmode +# +# 1280x1024, 75 Hz, Non-Interlaced (135.00 MHz dotclock) +# +# Horizontal Vertical +# Resolution 1280 1024 +# Scan Frequency 79.976 kHz 75.02 Hz +# Sync Width 1.067 us 0.038 ms +# 18 chars 3 lines +# Front Porch 0.119 us 0.012 ms +# 2 chars 1 lines +# Back Porch 1.837 us 0.475 ms +# 31 chars 38 lines +# Active Time 9.481 us 12.804 ms +# 160 chars 1024 lines +# Blank Time 3.022 us 0.525 ms +# 51 chars 42 lines +# Polarity positive positive +# + mode "1280x1024-75" +# D: 135.00 MHz, H: 79.976 kHz, V: 75.02 Hz + geometry 1280 1024 1280 1024 32 + timings 7408 248 16 38 1 144 3 hsync high vsync high endmode +# +# 1280x1024, 85 Hz, Non-Interlaced (157.50 MHz dotclock) +# +# Horizontal Vertical +# Resolution 1280 1024 +# Scan Frequency 91.146 kHz 85.02 Hz +# Sync Width 1.016 us 0.033 ms +# 20 chars 3 lines +# Front Porch 0.406 us 0.011 ms +# 8 chars 1 lines +# Back Porch 1.422 us 0.483 ms +# 28 chars 44 lines +# Active Time 8.127 us 11.235 ms +# 160 chars 1024 lines +# Blank Time 2.844 us 0.527 ms +# 56 chars 48 lines +# Polarity positive positive +# + mode "1280x1024-85" +# D: 157.50 MHz, H: 91.146 kHz, V: 85.02 Hz + geometry 1280 1024 1280 1024 32 + timings 6349 224 64 44 1 160 3 + hsync high vsync high endmode mode "1440x900-60" +# D: 106.500 MHz, H: 55.935 kHz, V: 60.00 Hz + geometry 1440 900 1440 900 32 + timings 9390 232 80 25 3 152 6 + hsync high vsync high endmode mode "1440x900-75" +# D: 136.750 MHz, H: 70.635 kHz, V: 75.00 Hz + geometry 1440 900 1440 900 32 + timings 7315 248 96 33 3 152 6 hsync high vsync high endmode +# +# 1440x1050, 60 Hz, Non-Interlaced (125.10 MHz dotclock) +# +# Horizontal Vertical +# Resolution 1440 1050 +# Scan Frequency 65.220 kHz 60.00 Hz +# Sync Width 1.204 us 0.046 ms +# 19 chars 3 lines +# Front Porch 0.760 us 0.015 ms +# 12 chars 1 lines +# Back Porch 1.964 us 0.495 ms +# 31 chars 33 lines +# Active Time 11.405 us 16.099 ms +# 180 chars 1050 lines +# Blank Time 3.928 us 0.567 ms +# 62 chars 37 lines +# Polarity positive positive +# + mode "1440x1050-60" +# D: 125.10 MHz, H: 65.220 kHz, V: 60.00 Hz + geometry 1440 1050 1440 1050 32 + timings 7993 248 96 33 1 152 3 + hsync high vsync high endmode mode "1600x900-60" +# D: 118.250 MHz, H: 55.990 kHz, V: 60.00 Hz + geometry 1600 900 1600 900 32 + timings 8415 256 88 26 3 168 5 endmode mode "1600x1024-60" +# D: 136.358 MHz, H: 63.600 kHz, V: 60.00 Hz + geometry 1600 1024 1600 1024 32 timings 7315 272 104 32 1 168 3 endmode +# +# 1600x1200, 60 Hz, Non-Interlaced (156.00 MHz dotclock) +# +# Horizontal Vertical +# Resolution 1600 1200 +# Scan Frequency 76.200 kHz 60.00 Hz +# Sync Width 1.026 us 0.105 ms +# 20 chars 8 lines +# Front Porch 0.205 us 0.131 ms +# 4 chars 10 lines +# Back Porch 1.636 us 0.682 ms +# 32 chars 52 lines +# Active Time 10.256 us 15.748 ms +# 200 chars 1200 lines +# Blank Time 2.872 us 0.866 ms +# 56 chars 66 lines +# Polarity negative negative +# + mode "1600x1200-60" +# D: 156.00 MHz, H: 76.200 kHz, V: 60.00 Hz + geometry 1600 1200 1600 1200 32 timings 6172 256 32 52 10 160 8 endmode +# +# 1600x1200, 75 Hz, Non-Interlaced (202.50 MHz dotclock) +# +# Horizontal Vertical +# Resolution 1600 1200 +# Scan Frequency 93.750 kHz 75.00 Hz +# Sync Width 0.948 us 0.032 ms +# 24 chars 3 lines +# Front Porch 0.316 us 0.011 ms +# 8 chars 1 lines +# Back Porch 1.501 us 0.491 ms +# 38 chars 46 lines +# Active Time 7.901 us 12.800 ms +# 200 chars 1200 lines +# Blank Time 2.765 us 0.533 ms +# 70 chars 50 lines +# Polarity positive positive +# + mode "1600x1200-75" +# D: 202.50 MHz, H: 93.750 kHz, V: 75.00 Hz + geometry 1600 1200 1600 1200 32 + timings 4938 304 64 46 1 192 3 + hsync high vsync high endmode mode "1680x1050-60" +# D: 146.250 MHz, H: 65.290 kHz, V: 59.954 Hz + geometry 1680 1050 1680 1050 32 + timings 6814 280 104 30 3 176 6 + hsync high vsync high endmode mode "1680x1050-75" +# D: 187.000 MHz, H: 82.306 kHz, V: 74.892 Hz + geometry 1680 1050 1680 1050 32 + timings 5348 296 120 40 3 176 6 + hsync high vsync high endmode mode "1792x1344-60" +# D: 202.975 MHz, H: 83.460 kHz, V: 60.00 Hz + geometry 1792 1344 1792 1344 32 + timings 4902 320 128 43 1 192 3 + hsync high vsync high endmode mode "1856x1392-60" +# D: 218.571 MHz, H: 86.460 kHz, V: 60.00 Hz + geometry 1856 1392 1856 1392 32 + timings 4577 336 136 45 1 200 3 + hsync high vsync high endmode mode "1920x1200-60" +# D: 193.250 MHz, H: 74.556 kHz, V: 60.00 Hz + geometry 1920 1200 1920 1200 32 + timings 5173 336 136 36 3 200 6 + hsync high vsync high endmode mode "1920x1440-60" +# D: 234.000 MHz, H:90.000 kHz, V: 60.00 Hz + geometry 1920 1440 1920 1440 32 + timings 4274 344 128 56 1 208 3 + hsync high vsync high endmode mode "1920x1440-75" +# D: 297.000 MHz, H:112.500 kHz, V: 75.00 Hz + geometry 1920 1440 1920 1440 32 + timings 3367 352 144 56 1 224 3 + hsync high vsync high endmode mode "2048x1536-60" +# D: 267.250 MHz, H: 95.446 kHz, V: 60.00 Hz + geometry 2048 1536 2048 1536 32 + timings 3742 376 152 49 3 224 4 hsync high vsync high endmode +# +# 1280x720, 60 Hz, Non-Interlaced (74.481 MHz dotclock) +# +# Horizontal Vertical +# Resolution 1280 720 +# Scan Frequency 44.760 kHz 60.00 Hz +# Sync Width 1.826 us 67.024 ms +# 17 chars 3 lines +# Front Porch 0.752 us 22.341 ms +# 7 chars 1 lines +# Back Porch 2.578 us 491.510 ms +# 24 chars 22 lines +# Active Time 17.186 us 16.086 ms +# 160 chars 720 lines +# Blank Time 5.156 us 0.581 ms +# 48 chars 26 lines +# Polarity negative negative +# + mode "1280x720-60" +# D: 74.481 MHz, H: 44.760 kHz, V: 60.00 Hz + geometry 1280 720 1280 720 32 timings 13426 192 64 22 1 136 3 endmode +# +# 1920x1080, 60 Hz, Non-Interlaced (172.798 MHz dotclock) +# +# Horizontal Vertical +# Resolution 1920 1080 +# Scan Frequency 67.080 kHz 60.00 Hz +# Sync Width 1.204 us 44.723 ms +# 26 chars 3 lines +# Front Porch 0.694 us 14.908 ms +# 15 chars 1 lines +# Back Porch 1.898 us 506.857 ms +# 41 chars 34 lines +# Active Time 11.111 us 16.100 ms +# 240 chars 1080 lines +# Blank Time 3.796 us 0.566 ms +# 82 chars 38 lines +# Polarity negative negative +# + mode "1920x1080-60" +# D: 74.481 MHz, H: 67.080 kHz, V: 60.00 Hz + geometry 1920 1080 1920 1080 32 timings 5787 328 120 34 1 208 3 endmode +# +# 1400x1050, 60 Hz, Non-Interlaced (122.61 MHz dotclock) +# +# Horizontal Vertical +# Resolution 1400 1050 +# Scan Frequency 65.218 kHz 59.99 Hz +# Sync Width 1.037 us 0.047 ms +# 19 chars 3 lines +# Front Porch 0.444 us 0.015 ms +# 11 chars 1 lines +# Back Porch 1.185 us 0.188 ms +# 30 chars 33 lines +# Active Time 12.963 us 16.411 ms +# 175 chars 1050 lines +# Blank Time 2.667 us 0.250 ms +# 60 chars 37 lines +# Polarity negative positive +# + mode "1400x1050-60" +# D: 122.750 MHz, H: 65.317 kHz, V: 59.99 Hz + geometry 1400 1050 1408 1050 32 + timings 8214 232 88 32 3 144 4 endmode mode "1400x1050-75" +# D: 156.000 MHz, H: 82.278 kHz, V: 74.867 Hz + geometry 1400 1050 1408 1050 32 timings 6410 248 104 42 3 144 4 endmode +# +# 1366x768, 60 Hz, Non-Interlaced (85.86 MHz dotclock) +# +# Horizontal Vertical +# Resolution 1366 768 +# Scan Frequency 47.700 kHz 60.00 Hz +# Sync Width 1.677 us 0.063 ms +# 18 chars 3 lines +# Front Porch 0.839 us 0.021 ms +# 9 chars 1 lines +# Back Porch 2.516 us 0.482 ms +# 27 chars 23 lines +# Active Time 15.933 us 16.101 ms +# 171 chars 768 lines +# Blank Time 5.031 us 0.566 ms +# 54 chars 27 lines +# Polarity negative positive +# + mode "1360x768-60" +# D: 84.750 MHz, H: 47.720 kHz, V: 60.00 Hz + geometry 1360 768 1360 768 32 + timings 11799 208 72 22 3 136 5 endmode mode "1366x768-60" +# D: 85.86 MHz, H: 47.700 kHz, V: 60.00 Hz + geometry 1366 768 1366 768 32 + timings 11647 216 72 23 1 144 3 endmode mode "1366x768-50" +# D: 69,924 MHz, H: 39.550 kHz, V: 50.00 Hz + geometry 1366 768 1366 768 32 timings 14301 200 56 19 1 144 3 endmode diff --git a/Documentation/fb/viafb.txt b/Documentation/fb/viafb.txt new file mode 100644 index 000000000000..67dbf442b0b6 --- /dev/null +++ b/Documentation/fb/viafb.txt @@ -0,0 +1,214 @@ + + VIA Integration Graphic Chip Console Framebuffer Driver + +[Platform] +----------------------- + The console framebuffer driver is for graphics chips of + VIA UniChrome Family(CLE266, PM800 / CN400 / CN300, + P4M800CE / P4M800Pro / CN700 / VN800, + CX700 / VX700, K8M890, P4M890, + CN896 / P4M900, VX800) + +[Driver features] +------------------------ + Device: CRT, LCD, DVI + + Support viafb_mode: + CRT: + 640x480(60, 75, 85, 100, 120 Hz), 720x480(60 Hz), + 720x576(60 Hz), 800x600(60, 75, 85, 100, 120 Hz), + 848x480(60 Hz), 856x480(60 Hz), 1024x512(60 Hz), + 1024x768(60, 75, 85, 100 Hz), 1152x864(75 Hz), + 1280x768(60 Hz), 1280x960(60 Hz), 1280x1024(60, 75, 85 Hz), + 1440x1050(60 Hz), 1600x1200(60, 75 Hz), 1280x720(60 Hz), + 1920x1080(60 Hz), 1400x1050(60 Hz), 800x480(60 Hz) + + color depth: 8 bpp, 16 bpp, 32 bpp supports. + + Support 2D hardware accelerator. + +[Using the viafb module] +-- -- -------------------- + Start viafb with default settings: + #modprobe viafb + + Start viafb with with user options: + #modprobe viafb viafb_mode=800x600 viafb_bpp=16 viafb_refresh=60 + viafb_active_dev=CRT+DVI viafb_dvi_port=DVP1 + viafb_mode1=1024x768 viafb_bpp=16 viafb_refresh1=60 + viafb_SAMM_ON=1 + + viafb_mode: + 640x480 (default) + 720x480 + 800x600 + 1024x768 + ...... + + viafb_bpp: + 8, 16, 32 (default:32) + + viafb_refresh: + 60, 75, 85, 100, 120 (default:60) + + viafb_lcd_dsp_method: + 0 : expansion (default) + 1 : centering + + viafb_lcd_mode: + 0 : LCD panel with LSB data format input (default) + 1 : LCD panel with MSB data format input + + viafb_lcd_panel_id: + 0 : Resolution: 640x480, Channel: single, Dithering: Enable + 1 : Resolution: 800x600, Channel: single, Dithering: Enable + 2 : Resolution: 1024x768, Channel: single, Dithering: Enable (default) + 3 : Resolution: 1280x768, Channel: single, Dithering: Enable + 4 : Resolution: 1280x1024, Channel: dual, Dithering: Enable + 5 : Resolution: 1400x1050, Channel: dual, Dithering: Enable + 6 : Resolution: 1600x1200, Channel: dual, Dithering: Enable + + 8 : Resolution: 800x480, Channel: single, Dithering: Enable + 9 : Resolution: 1024x768, Channel: dual, Dithering: Enable + 10: Resolution: 1024x768, Channel: single, Dithering: Disable + 11: Resolution: 1024x768, Channel: dual, Dithering: Disable + 12: Resolution: 1280x768, Channel: single, Dithering: Disable + 13: Resolution: 1280x1024, Channel: dual, Dithering: Disable + 14: Resolution: 1400x1050, Channel: dual, Dithering: Disable + 15: Resolution: 1600x1200, Channel: dual, Dithering: Disable + 16: Resolution: 1366x768, Channel: single, Dithering: Disable + 17: Resolution: 1024x600, Channel: single, Dithering: Enable + 18: Resolution: 1280x768, Channel: dual, Dithering: Enable + 19: Resolution: 1280x800, Channel: single, Dithering: Enable + + viafb_accel: + 0 : No 2D Hardware Acceleration + 1 : 2D Hardware Acceleration (default) + + viafb_SAMM_ON: + 0 : viafb_SAMM_ON disable (default) + 1 : viafb_SAMM_ON enable + + viafb_mode1: (secondary display device) + 640x480 (default) + 720x480 + 800x600 + 1024x768 + ... ... + + viafb_bpp1: (secondary display device) + 8, 16, 32 (default:32) + + viafb_refresh1: (secondary display device) + 60, 75, 85, 100, 120 (default:60) + + viafb_active_dev: + This option is used to specify active devices.(CRT, DVI, CRT+LCD...) + DVI stands for DVI or HDMI, E.g., If you want to enable HDMI, + set viafb_active_dev=DVI. In SAMM case, the previous of + viafb_active_dev is primary device, and the following is + secondary device. + + For example: + To enable one device, such as DVI only, we can use: + modprobe viafb viafb_active_dev=DVI + To enable two devices, such as CRT+DVI: + modprobe viafb viafb_active_dev=CRT+DVI; + + For DuoView case, we can use: + modprobe viafb viafb_active_dev=CRT+DVI + OR + modprobe viafb viafb_active_dev=DVI+CRT... + + For SAMM case: + If CRT is primary and DVI is secondary, we should use: + modprobe viafb viafb_active_dev=CRT+DVI viafb_SAMM_ON=1... + If DVI is primary and CRT is secondary, we should use: + modprobe viafb viafb_active_dev=DVI+CRT viafb_SAMM_ON=1... + + viafb_display_hardware_layout: + This option is used to specify display hardware layout for CX700 chip. + 1 : LCD only + 2 : DVI only + 3 : LCD+DVI (default) + 4 : LCD1+LCD2 (internal + internal) + 16: LCD1+ExternalLCD2 (internal + external) + + viafb_second_size: + This option is used to set second device memory size(MB) in SAMM case. + The minimal size is 16. + + viafb_platform_epia_dvi: + This option is used to enable DVI on EPIA - M + 0 : No DVI on EPIA - M (default) + 1 : DVI on EPIA - M + + viafb_bus_width: + When using 24 - Bit Bus Width Digital Interface, + this option should be set. + 12: 12-Bit LVDS or 12-Bit TMDS (default) + 24: 24-Bit LVDS or 24-Bit TMDS + + viafb_device_lcd_dualedge: + When using Dual Edge Panel, this option should be set. + 0 : No Dual Edge Panel (default) + 1 : Dual Edge Panel + + viafb_video_dev: + This option is used to specify video output devices(CRT, DVI, LCD) for + duoview case. + For example: + To output video on DVI, we should use: + modprobe viafb viafb_video_dev=DVI... + + viafb_lcd_port: + This option is used to specify LCD output port, + available values are "DVP0" "DVP1" "DFP_HIGHLOW" "DFP_HIGH" "DFP_LOW". + for external LCD + external DVI on CX700(External LCD is on DVP0), + we should use: + modprobe viafb viafb_lcd_port=DVP0... + +Notes: + 1. CRT may not display properly for DuoView CRT & DVI display at + the "640x480" PAL mode with DVI overscan enabled. + 2. SAMM stands for single adapter multi monitors. It is different from + multi-head since SAMM support multi monitor at driver layers, thus fbcon + layer doesn't even know about it; SAMM's second screen doesn't have a + device node file, thus a user mode application can't access it directly. + When SAMM is enabled, viafb_mode and viafb_mode1, viafb_bpp and + viafb_bpp1, viafb_refresh and viafb_refresh1 can be different. + 3. When console is depending on viafbinfo1, dynamically change resolution + and bpp, need to call VIAFB specified ioctl interface VIAFB_SET_DEVICE + instead of calling common ioctl function FBIOPUT_VSCREENINFO since + viafb doesn't support multi-head well, or it will cause screen crush. + 4. VX800 2D accelerator hasn't been supported in this driver yet. When + using driver on VX800, the driver will disable the acceleration + function as default. + + +[Configure viafb with "fbset" tool] +----------------------------------- + "fbset" is an inbox utility of Linux. + 1. Inquire current viafb information, type, + # fbset -i + + 2. Set various resolutions and viafb_refresh rates, + # fbset <resolution-vertical_sync> + + example, + # fbset "1024x768-75" + or + # fbset -g 1024 768 1024 768 32 + Check the file "/etc/fb.modes" to find display modes available. + + 3. Set the color depth, + # fbset -depth <value> + + example, + # fbset -depth 16 + +[Bootup with viafb]: +-------------------- + Add the following line to your grub.conf: + append = "video=viafb:viafb_mode=1024x768,viafb_bpp=32,viafb_refresh=85" + diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-removal-schedule.txt index 4d2566a7d168..f5f812daf9f4 100644 --- a/Documentation/feature-removal-schedule.txt +++ b/Documentation/feature-removal-schedule.txt @@ -294,6 +294,15 @@ Who: Jiri Slaby <jirislaby@gmail.com> --------------------------- +What: print_fn_descriptor_symbol() +When: October 2009 +Why: The %pF vsprintf format provides the same functionality in a + simpler way. print_fn_descriptor_symbol() is deprecated but + still present to give out-of-tree modules time to change. +Who: Bjorn Helgaas <bjorn.helgaas@hp.com> + +--------------------------- + What: /sys/o2cb symlink When: January 2010 Why: /sys/fs/o2cb is the proper location for this information - /sys/o2cb diff --git a/Documentation/filesystems/autofs4-mount-control.txt b/Documentation/filesystems/autofs4-mount-control.txt new file mode 100644 index 000000000000..c6341745df37 --- /dev/null +++ b/Documentation/filesystems/autofs4-mount-control.txt @@ -0,0 +1,393 @@ + +Miscellaneous Device control operations for the autofs4 kernel module +==================================================================== + +The problem +=========== + +There is a problem with active restarts in autofs (that is to say +restarting autofs when there are busy mounts). + +During normal operation autofs uses a file descriptor opened on the +directory that is being managed in order to be able to issue control +operations. Using a file descriptor gives ioctl operations access to +autofs specific information stored in the super block. The operations +are things such as setting an autofs mount catatonic, setting the +expire timeout and requesting expire checks. As is explained below, +certain types of autofs triggered mounts can end up covering an autofs +mount itself which prevents us being able to use open(2) to obtain a +file descriptor for these operations if we don't already have one open. + +Currently autofs uses "umount -l" (lazy umount) to clear active mounts +at restart. While using lazy umount works for most cases, anything that +needs to walk back up the mount tree to construct a path, such as +getcwd(2) and the proc file system /proc/<pid>/cwd, no longer works +because the point from which the path is constructed has been detached +from the mount tree. + +The actual problem with autofs is that it can't reconnect to existing +mounts. Immediately one thinks of just adding the ability to remount +autofs file systems would solve it, but alas, that can't work. This is +because autofs direct mounts and the implementation of "on demand mount +and expire" of nested mount trees have the file system mounted directly +on top of the mount trigger directory dentry. + +For example, there are two types of automount maps, direct (in the kernel +module source you will see a third type called an offset, which is just +a direct mount in disguise) and indirect. + +Here is a master map with direct and indirect map entries: + +/- /etc/auto.direct +/test /etc/auto.indirect + +and the corresponding map files: + +/etc/auto.direct: + +/automount/dparse/g6 budgie:/autofs/export1 +/automount/dparse/g1 shark:/autofs/export1 +and so on. + +/etc/auto.indirect: + +g1 shark:/autofs/export1 +g6 budgie:/autofs/export1 +and so on. + +For the above indirect map an autofs file system is mounted on /test and +mounts are triggered for each sub-directory key by the inode lookup +operation. So we see a mount of shark:/autofs/export1 on /test/g1, for +example. + +The way that direct mounts are handled is by making an autofs mount on +each full path, such as /automount/dparse/g1, and using it as a mount +trigger. So when we walk on the path we mount shark:/autofs/export1 "on +top of this mount point". Since these are always directories we can +use the follow_link inode operation to trigger the mount. + +But, each entry in direct and indirect maps can have offsets (making +them multi-mount map entries). + +For example, an indirect mount map entry could also be: + +g1 \ + / shark:/autofs/export5/testing/test \ + /s1 shark:/autofs/export/testing/test/s1 \ + /s2 shark:/autofs/export5/testing/test/s2 \ + /s1/ss1 shark:/autofs/export1 \ + /s2/ss2 shark:/autofs/export2 + +and a similarly a direct mount map entry could also be: + +/automount/dparse/g1 \ + / shark:/autofs/export5/testing/test \ + /s1 shark:/autofs/export/testing/test/s1 \ + /s2 shark:/autofs/export5/testing/test/s2 \ + /s1/ss1 shark:/autofs/export2 \ + /s2/ss2 shark:/autofs/export2 + +One of the issues with version 4 of autofs was that, when mounting an +entry with a large number of offsets, possibly with nesting, we needed +to mount and umount all of the offsets as a single unit. Not really a +problem, except for people with a large number of offsets in map entries. +This mechanism is used for the well known "hosts" map and we have seen +cases (in 2.4) where the available number of mounts are exhausted or +where the number of privileged ports available is exhausted. + +In version 5 we mount only as we go down the tree of offsets and +similarly for expiring them which resolves the above problem. There is +somewhat more detail to the implementation but it isn't needed for the +sake of the problem explanation. The one important detail is that these +offsets are implemented using the same mechanism as the direct mounts +above and so the mount points can be covered by a mount. + +The current autofs implementation uses an ioctl file descriptor opened +on the mount point for control operations. The references held by the +descriptor are accounted for in checks made to determine if a mount is +in use and is also used to access autofs file system information held +in the mount super block. So the use of a file handle needs to be +retained. + + +The Solution +============ + +To be able to restart autofs leaving existing direct, indirect and +offset mounts in place we need to be able to obtain a file handle +for these potentially covered autofs mount points. Rather than just +implement an isolated operation it was decided to re-implement the +existing ioctl interface and add new operations to provide this +functionality. + +In addition, to be able to reconstruct a mount tree that has busy mounts, +the uid and gid of the last user that triggered the mount needs to be +available because these can be used as macro substitution variables in +autofs maps. They are recorded at mount request time and an operation +has been added to retrieve them. + +Since we're re-implementing the control interface, a couple of other +problems with the existing interface have been addressed. First, when +a mount or expire operation completes a status is returned to the +kernel by either a "send ready" or a "send fail" operation. The +"send fail" operation of the ioctl interface could only ever send +ENOENT so the re-implementation allows user space to send an actual +status. Another expensive operation in user space, for those using +very large maps, is discovering if a mount is present. Usually this +involves scanning /proc/mounts and since it needs to be done quite +often it can introduce significant overhead when there are many entries +in the mount table. An operation to lookup the mount status of a mount +point dentry (covered or not) has also been added. + +Current kernel development policy recommends avoiding the use of the +ioctl mechanism in favor of systems such as Netlink. An implementation +using this system was attempted to evaluate its suitability and it was +found to be inadequate, in this case. The Generic Netlink system was +used for this as raw Netlink would lead to a significant increase in +complexity. There's no question that the Generic Netlink system is an +elegant solution for common case ioctl functions but it's not a complete +replacement probably because it's primary purpose in life is to be a +message bus implementation rather than specifically an ioctl replacement. +While it would be possible to work around this there is one concern +that lead to the decision to not use it. This is that the autofs +expire in the daemon has become far to complex because umount +candidates are enumerated, almost for no other reason than to "count" +the number of times to call the expire ioctl. This involves scanning +the mount table which has proved to be a big overhead for users with +large maps. The best way to improve this is try and get back to the +way the expire was done long ago. That is, when an expire request is +issued for a mount (file handle) we should continually call back to +the daemon until we can't umount any more mounts, then return the +appropriate status to the daemon. At the moment we just expire one +mount at a time. A Generic Netlink implementation would exclude this +possibility for future development due to the requirements of the +message bus architecture. + + +autofs4 Miscellaneous Device mount control interface +==================================================== + +The control interface is opening a device node, typically /dev/autofs. + +All the ioctls use a common structure to pass the needed parameter +information and return operation results: + +struct autofs_dev_ioctl { + __u32 ver_major; + __u32 ver_minor; + __u32 size; /* total size of data passed in + * including this struct */ + __s32 ioctlfd; /* automount command fd */ + + __u32 arg1; /* Command parameters */ + __u32 arg2; + + char path[0]; +}; + +The ioctlfd field is a mount point file descriptor of an autofs mount +point. It is returned by the open call and is used by all calls except +the check for whether a given path is a mount point, where it may +optionally be used to check a specific mount corresponding to a given +mount point file descriptor, and when requesting the uid and gid of the +last successful mount on a directory within the autofs file system. + +The fields arg1 and arg2 are used to communicate parameters and results of +calls made as described below. + +The path field is used to pass a path where it is needed and the size field +is used account for the increased structure length when translating the +structure sent from user space. + +This structure can be initialized before setting specific fields by using +the void function call init_autofs_dev_ioctl(struct autofs_dev_ioctl *). + +All of the ioctls perform a copy of this structure from user space to +kernel space and return -EINVAL if the size parameter is smaller than +the structure size itself, -ENOMEM if the kernel memory allocation fails +or -EFAULT if the copy itself fails. Other checks include a version check +of the compiled in user space version against the module version and a +mismatch results in a -EINVAL return. If the size field is greater than +the structure size then a path is assumed to be present and is checked to +ensure it begins with a "/" and is NULL terminated, otherwise -EINVAL is +returned. Following these checks, for all ioctl commands except +AUTOFS_DEV_IOCTL_VERSION_CMD, AUTOFS_DEV_IOCTL_OPENMOUNT_CMD and +AUTOFS_DEV_IOCTL_CLOSEMOUNT_CMD the ioctlfd is validated and if it is +not a valid descriptor or doesn't correspond to an autofs mount point +an error of -EBADF, -ENOTTY or -EINVAL (not an autofs descriptor) is +returned. + + +The ioctls +========== + +An example of an implementation which uses this interface can be seen +in autofs version 5.0.4 and later in file lib/dev-ioctl-lib.c of the +distribution tar available for download from kernel.org in directory +/pub/linux/daemons/autofs/v5. + +The device node ioctl operations implemented by this interface are: + + +AUTOFS_DEV_IOCTL_VERSION +------------------------ + +Get the major and minor version of the autofs4 device ioctl kernel module +implementation. It requires an initialized struct autofs_dev_ioctl as an +input parameter and sets the version information in the passed in structure. +It returns 0 on success or the error -EINVAL if a version mismatch is +detected. + + +AUTOFS_DEV_IOCTL_PROTOVER_CMD and AUTOFS_DEV_IOCTL_PROTOSUBVER_CMD +------------------------------------------------------------------ + +Get the major and minor version of the autofs4 protocol version understood +by loaded module. This call requires an initialized struct autofs_dev_ioctl +with the ioctlfd field set to a valid autofs mount point descriptor +and sets the requested version number in structure field arg1. These +commands return 0 on success or one of the negative error codes if +validation fails. + + +AUTOFS_DEV_IOCTL_OPENMOUNT and AUTOFS_DEV_IOCTL_CLOSEMOUNT +---------------------------------------------------------- + +Obtain and release a file descriptor for an autofs managed mount point +path. The open call requires an initialized struct autofs_dev_ioctl with +the the path field set and the size field adjusted appropriately as well +as the arg1 field set to the device number of the autofs mount. The +device number can be obtained from the mount options shown in +/proc/mounts. The close call requires an initialized struct +autofs_dev_ioct with the ioctlfd field set to the descriptor obtained +from the open call. The release of the file descriptor can also be done +with close(2) so any open descriptors will also be closed at process exit. +The close call is included in the implemented operations largely for +completeness and to provide for a consistent user space implementation. + + +AUTOFS_DEV_IOCTL_READY_CMD and AUTOFS_DEV_IOCTL_FAIL_CMD +-------------------------------------------------------- + +Return mount and expire result status from user space to the kernel. +Both of these calls require an initialized struct autofs_dev_ioctl +with the ioctlfd field set to the descriptor obtained from the open +call and the arg1 field set to the wait queue token number, received +by user space in the foregoing mount or expire request. The arg2 field +is set to the status to be returned. For the ready call this is always +0 and for the fail call it is set to the errno of the operation. + + +AUTOFS_DEV_IOCTL_SETPIPEFD_CMD +------------------------------ + +Set the pipe file descriptor used for kernel communication to the daemon. +Normally this is set at mount time using an option but when reconnecting +to a existing mount we need to use this to tell the autofs mount about +the new kernel pipe descriptor. In order to protect mounts against +incorrectly setting the pipe descriptor we also require that the autofs +mount be catatonic (see next call). + +The call requires an initialized struct autofs_dev_ioctl with the +ioctlfd field set to the descriptor obtained from the open call and +the arg1 field set to descriptor of the pipe. On success the call +also sets the process group id used to identify the controlling process +(eg. the owning automount(8) daemon) to the process group of the caller. + + +AUTOFS_DEV_IOCTL_CATATONIC_CMD +------------------------------ + +Make the autofs mount point catatonic. The autofs mount will no longer +issue mount requests, the kernel communication pipe descriptor is released +and any remaining waits in the queue released. + +The call requires an initialized struct autofs_dev_ioctl with the +ioctlfd field set to the descriptor obtained from the open call. + + +AUTOFS_DEV_IOCTL_TIMEOUT_CMD +---------------------------- + +Set the expire timeout for mounts withing an autofs mount point. + +The call requires an initialized struct autofs_dev_ioctl with the +ioctlfd field set to the descriptor obtained from the open call. + + +AUTOFS_DEV_IOCTL_REQUESTER_CMD +------------------------------ + +Return the uid and gid of the last process to successfully trigger a the +mount on the given path dentry. + +The call requires an initialized struct autofs_dev_ioctl with the path +field set to the mount point in question and the size field adjusted +appropriately as well as the arg1 field set to the device number of the +containing autofs mount. Upon return the struct field arg1 contains the +uid and arg2 the gid. + +When reconstructing an autofs mount tree with active mounts we need to +re-connect to mounts that may have used the original process uid and +gid (or string variations of them) for mount lookups within the map entry. +This call provides the ability to obtain this uid and gid so they may be +used by user space for the mount map lookups. + + +AUTOFS_DEV_IOCTL_EXPIRE_CMD +--------------------------- + +Issue an expire request to the kernel for an autofs mount. Typically +this ioctl is called until no further expire candidates are found. + +The call requires an initialized struct autofs_dev_ioctl with the +ioctlfd field set to the descriptor obtained from the open call. In +addition an immediate expire, independent of the mount timeout, can be +requested by setting the arg1 field to 1. If no expire candidates can +be found the ioctl returns -1 with errno set to EAGAIN. + +This call causes the kernel module to check the mount corresponding +to the given ioctlfd for mounts that can be expired, issues an expire +request back to the daemon and waits for completion. + +AUTOFS_DEV_IOCTL_ASKUMOUNT_CMD +------------------------------ + +Checks if an autofs mount point is in use. + +The call requires an initialized struct autofs_dev_ioctl with the +ioctlfd field set to the descriptor obtained from the open call and +it returns the result in the arg1 field, 1 for busy and 0 otherwise. + + +AUTOFS_DEV_IOCTL_ISMOUNTPOINT_CMD +--------------------------------- + +Check if the given path is a mountpoint. + +The call requires an initialized struct autofs_dev_ioctl. There are two +possible variations. Both use the path field set to the path of the mount +point to check and the size field adjusted appropriately. One uses the +ioctlfd field to identify a specific mount point to check while the other +variation uses the path and optionaly arg1 set to an autofs mount type. +The call returns 1 if this is a mount point and sets arg1 to the device +number of the mount and field arg2 to the relevant super block magic +number (described below) or 0 if it isn't a mountpoint. In both cases +the the device number (as returned by new_encode_dev()) is returned +in field arg1. + +If supplied with a file descriptor we're looking for a specific mount, +not necessarily at the top of the mounted stack. In this case the path +the descriptor corresponds to is considered a mountpoint if it is itself +a mountpoint or contains a mount, such as a multi-mount without a root +mount. In this case we return 1 if the descriptor corresponds to a mount +point and and also returns the super magic of the covering mount if there +is one or 0 if it isn't a mountpoint. + +If a path is supplied (and the ioctlfd field is set to -1) then the path +is looked up and is checked to see if it is the root of a mount. If a +type is also given we are looking for a particular autofs mount and if +a match isn't found a fail is returned. If the the located path is the +root of a mount 1 is returned along with the super magic of the mount +or 0 otherwise. + diff --git a/Documentation/filesystems/ext3.txt b/Documentation/filesystems/ext3.txt index b45f3c1b8b43..295f26cd895a 100644 --- a/Documentation/filesystems/ext3.txt +++ b/Documentation/filesystems/ext3.txt @@ -193,6 +193,5 @@ kernel source: <file:fs/ext3/> programs: http://e2fsprogs.sourceforge.net/ http://ext2resize.sourceforge.net -useful links: http://www.zip.com.au/~akpm/linux/ext3/ext3-usage.html - http://www-106.ibm.com/developerworks/linux/library/l-fs7/ +useful links: http://www-106.ibm.com/developerworks/linux/library/l-fs7/ http://www-106.ibm.com/developerworks/linux/library/l-fs8/ diff --git a/Documentation/filesystems/nfsroot.txt b/Documentation/filesystems/nfsroot.txt index 31b329172343..68baddf3c3e0 100644 --- a/Documentation/filesystems/nfsroot.txt +++ b/Documentation/filesystems/nfsroot.txt @@ -169,7 +169,7 @@ They depend on various facilities being available: 3.1) Booting from a floppy using syslinux When building kernels, an easy way to create a boot floppy that uses - syslinux is to use the zdisk or bzdisk make targets which use + syslinux is to use the zdisk or bzdisk make targets which use zimage and bzimage images respectively. Both targets accept the FDARGS parameter which can be used to set the kernel command line. diff --git a/Documentation/filesystems/proc.txt b/Documentation/filesystems/proc.txt index b488edad743c..c032bf39e8b9 100644 --- a/Documentation/filesystems/proc.txt +++ b/Documentation/filesystems/proc.txt @@ -1321,6 +1321,18 @@ debugging information is displayed on console. NMI switch that most IA32 servers have fires unknown NMI up, for example. If a system hangs up, try pressing the NMI switch. +panic_on_unrecovered_nmi +------------------------ + +The default Linux behaviour on an NMI of either memory or unknown is to continue +operation. For many environments such as scientific computing it is preferable +that the box is taken out and the error dealt with than an uncorrected +parity/ECC error get propogated. + +A small number of systems do generate NMI's for bizarre random reasons such as +power management so the default is off. That sysctl works like the existing +panic controls already in that directory. + nmi_watchdog ------------ diff --git a/Documentation/filesystems/ramfs-rootfs-initramfs.txt b/Documentation/filesystems/ramfs-rootfs-initramfs.txt index 7be232b44ee4..62fe9b1e0890 100644 --- a/Documentation/filesystems/ramfs-rootfs-initramfs.txt +++ b/Documentation/filesystems/ramfs-rootfs-initramfs.txt @@ -263,7 +263,7 @@ User Mode Linux, like so: sleep(999999999); } EOF - gcc -static hello2.c -o init + gcc -static hello.c -o init echo init | cpio -o -H newc | gzip > test.cpio.gz # Testing external initramfs using the initrd loading mechanism. qemu -kernel /boot/vmlinuz -initrd test.cpio.gz /dev/zero diff --git a/Documentation/gpio.txt b/Documentation/gpio.txt index 18022e249c53..b1b988701247 100644 --- a/Documentation/gpio.txt +++ b/Documentation/gpio.txt @@ -240,6 +240,10 @@ signal, or (b) something wrongly believes it's safe to remove drivers needed to manage a signal that's in active use. That is, requesting a GPIO can serve as a kind of lock. +Some platforms may also use knowledge about what GPIOs are active for +power management, such as by powering down unused chip sectors and, more +easily, gating off unused clocks. + These two calls are optional because not not all current Linux platforms offer such functionality in their GPIO support; a valid implementation could return success for all gpio_request() calls. Unlike the other calls, @@ -264,7 +268,7 @@ map between them using calls like: /* map GPIO numbers to IRQ numbers */ int gpio_to_irq(unsigned gpio); - /* map IRQ numbers to GPIO numbers */ + /* map IRQ numbers to GPIO numbers (avoid using this) */ int irq_to_gpio(unsigned irq); Those return either the corresponding number in the other namespace, or @@ -284,7 +288,8 @@ system wakeup capabilities. Non-error values returned from irq_to_gpio() would most commonly be used with gpio_get_value(), for example to initialize or update driver state -when the IRQ is edge-triggered. +when the IRQ is edge-triggered. Note that some platforms don't support +this reverse mapping, so you should avoid using it. Emulating Open Drain Signals diff --git a/Documentation/ia64/kvm.txt b/Documentation/ia64/kvm.txt index 914d07f49268..84f7cb3d5bec 100644 --- a/Documentation/ia64/kvm.txt +++ b/Documentation/ia64/kvm.txt @@ -1,7 +1,8 @@ -Currently, kvm module in EXPERIMENTAL stage on IA64. This means that -interfaces are not stable enough to use. So, plase had better don't run -critical applications in virtual machine. We will try our best to make it -strong in future versions! +Currently, kvm module is in EXPERIMENTAL stage on IA64. This means that +interfaces are not stable enough to use. So, please don't run critical +applications in virtual machine. +We will try our best to improve it in future versions! + Guide: How to boot up guests on kvm/ia64 This guide is to describe how to enable kvm support for IA-64 systems. diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index 2443f5bb4364..82c561f3abbd 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -796,6 +796,7 @@ and is between 256 and 4096 characters. It is defined in the file Defaults to the default architecture's huge page size if not specified. + i8042.debug [HW] Toggle i8042 debug mode i8042.direct [HW] Put keyboard port into non-translated mode i8042.dumbkbd [HW] Pretend that controller can only read data from keyboard and cannot control its state diff --git a/Documentation/networking/cs89x0.txt b/Documentation/networking/cs89x0.txt index 6387d3decf85..c725d33b316f 100644 --- a/Documentation/networking/cs89x0.txt +++ b/Documentation/networking/cs89x0.txt @@ -3,7 +3,7 @@ NOTE ---- This document was contributed by Cirrus Logic for kernel 2.2.5. This version -has been updated for 2.3.48 by Andrew Morton <andrewm@uow.edu.au> +has been updated for 2.3.48 by Andrew Morton. Cirrus make a copy of this driver available at their website, as described below. In general, you should use the driver version which @@ -690,7 +690,7 @@ latest drivers and technical publications. 6.4 Current maintainer In February 2000 the maintenance of this driver was assumed by Andrew -Morton <akpm@zip.com.au> +Morton. 6.5 Kernel module parameters diff --git a/Documentation/networking/phonet.txt b/Documentation/networking/phonet.txt index 0e6e592f4f55..6a07e45d4a93 100644 --- a/Documentation/networking/phonet.txt +++ b/Documentation/networking/phonet.txt @@ -146,8 +146,8 @@ WARNING: When polling a connected pipe socket for writability, there is an intrinsic race condition whereby writability might be lost between the polling and the writing system calls. In this case, the socket will -block until write because possible again, unless non-blocking mode -becomes enabled. +block until write becomes possible again, unless non-blocking mode +is enabled. The pipe protocol provides two socket options at the SOL_PNPIPE level: diff --git a/Documentation/networking/vortex.txt b/Documentation/networking/vortex.txt index 6356d3faed36..bd70976b8160 100644 --- a/Documentation/networking/vortex.txt +++ b/Documentation/networking/vortex.txt @@ -1,5 +1,5 @@ Documentation/networking/vortex.txt -Andrew Morton <andrewm@uow.edu.au> +Andrew Morton 30 April 2000 @@ -11,7 +11,7 @@ The driver was written by Donald Becker <becker@scyld.com> Don is no longer the prime maintainer of this version of the driver. Please report problems to one or more of: - Andrew Morton <akpm@osdl.org> + Andrew Morton Netdev mailing list <netdev@vger.kernel.org> Linux kernel mailing list <linux-kernel@vger.kernel.org> @@ -305,11 +305,6 @@ Donald's wake-on-LAN page: ftp://ftp.3com.com/pub/nic/3c90x/3c90xx2.exe -Driver updates and a detailed changelog for the modifications which -were made for the 2.3/2,4 series kernel is available at - - http://www.zip.com.au/~akpm/linux/#3c59x-bc - Autonegotiation notes --------------------- diff --git a/Documentation/power/s2ram.txt b/Documentation/power/s2ram.txt index b05f512130ea..2ebdc6091ce1 100644 --- a/Documentation/power/s2ram.txt +++ b/Documentation/power/s2ram.txt @@ -54,3 +54,21 @@ used to run with "radeonfb" (it's an ATI Radeon mobility). It turns out that "radeonfb" simply cannot resume that device - it tries to set the PLL's, and it just _hangs_. Using the regular VGA console and letting X resume it instead works fine. + +NOTE +==== +pm_trace uses the system's Real Time Clock (RTC) to save the magic number. +Reason for this is that the RTC is the only reliably available piece of +hardware during resume operations where a value can be set that will +survive a reboot. + +Consequence is that after a resume (even if it is successful) your system +clock will have a value corresponding to the magic mumber instead of the +correct date/time! It is therefore advisable to use a program like ntp-date +or rdate to reset the correct date/time from an external time source when +using this trace option. + +As the clock keeps ticking it is also essential that the reboot is done +quickly after the resume failure. The trace option does not use the seconds +or the low order bits of the minutes of the RTC, but a too long delay will +corrupt the magic value. diff --git a/Documentation/scsi/ChangeLog.megaraid b/Documentation/scsi/ChangeLog.megaraid index 37796fe45bd0..eaa4801f2ce6 100644 --- a/Documentation/scsi/ChangeLog.megaraid +++ b/Documentation/scsi/ChangeLog.megaraid @@ -409,7 +409,7 @@ i. Function reordering so that inline functions are defined before they megaraid_mbox_prepare_pthru, megaraid_mbox_prepare_epthru, megaraid_busywait_mbox - - Andrew Morton <akpm@osdl.org>, 08.19.2004 + - Andrew Morton, 08.19.2004 linux-scsi mailing list "Something else to clean up after inclusion: every instance of an @@ -471,13 +471,13 @@ vi. Add support for 64-bit applications. Current drivers assume only vii. Move the function declarations for the management module from megaraid_mm.h to megaraid_mm.c - - Andrew Morton <akpm@osdl.org>, 08.19.2004 + - Andrew Morton, 08.19.2004 linux-scsi mailing list viii. Change default values for MEGARAID_NEWGEN, MEGARAID_MM, and MEGARAID_MAILBOX to 'n' in Kconfig.megaraid - - Andrew Morton <akpm@osdl.org>, 08.19.2004 + - Andrew Morton, 08.19.2004 linux-scsi mailing list ix. replace udelay with msleep diff --git a/Documentation/spi/pxa2xx b/Documentation/spi/pxa2xx index bbe8dee681a5..6bb916d57c95 100644 --- a/Documentation/spi/pxa2xx +++ b/Documentation/spi/pxa2xx @@ -96,7 +96,7 @@ Each slave device attached to the PXA must provide slave specific configuration information via the structure "pxa2xx_spi_chip" found in "arch/arm/mach-pxa/include/mach/pxa2xx_spi.h". The pxa2xx_spi master controller driver will uses the configuration whenever the driver communicates with the slave -device. +device. All fields are optional. struct pxa2xx_spi_chip { u8 tx_threshold; @@ -112,14 +112,17 @@ used to configure the SSP hardware fifo. These fields are critical to the performance of pxa2xx_spi driver and misconfiguration will result in rx fifo overruns (especially in PIO mode transfers). Good default values are - .tx_threshold = 12, - .rx_threshold = 4, + .tx_threshold = 8, + .rx_threshold = 8, + +The range is 1 to 16 where zero indicates "use default". The "pxa2xx_spi_chip.dma_burst_size" field is used to configure PXA2xx DMA engine and is related the "spi_device.bits_per_word" field. Read and understand the PXA2xx "Developer Manual" sections on the DMA controller and SSP Controllers to determine the correct value. An SSP configured for byte-wide transfers would -use a value of 8. +use a value of 8. The driver will determine a reasonable default if +dma_burst_size == 0. The "pxa2xx_spi_chip.timeout" fields is used to efficiently handle trailing bytes in the SSP receiver fifo. The correct value for this field is @@ -137,7 +140,13 @@ function for asserting/deasserting a slave device chip select. If the field is NULL, the pxa2xx_spi master controller driver assumes that the SSP port is configured to use SSPFRM instead. -NSSP SALVE SAMPLE +NOTE: the SPI driver cannot control the chip select if SSPFRM is used, so the +chipselect is dropped after each spi_transfer. Most devices need chip select +asserted around the complete message. Use SSPFRM as a GPIO (through cs_control) +to accomodate these chips. + + +NSSP SLAVE SAMPLE ----------------- The pxa2xx_spi_chip structure is passed to the pxa2xx_spi driver in the "spi_board_info.controller_data" field. Below is a sample configuration using @@ -206,18 +215,21 @@ static void __init streetracer_init(void) DMA and PIO I/O Support ----------------------- -The pxa2xx_spi driver support both DMA and interrupt driven PIO message -transfers. The driver defaults to PIO mode and DMA transfers must enabled by -setting the "enable_dma" flag in the "pxa2xx_spi_master" structure and -ensuring that the "pxa2xx_spi_chip.dma_burst_size" field is non-zero. The DMA -mode support both coherent and stream based DMA mappings. +The pxa2xx_spi driver supports both DMA and interrupt driven PIO message +transfers. The driver defaults to PIO mode and DMA transfers must be enabled +by setting the "enable_dma" flag in the "pxa2xx_spi_master" structure. The DMA +mode supports both coherent and stream based DMA mappings. The following logic is used to determine the type of I/O to be used on a per "spi_transfer" basis: -if !enable_dma or dma_burst_size == 0 then +if !enable_dma then always use PIO transfers +if spi_message.len > 8191 then + print "rate limited" warning + use PIO transfers + if spi_message.is_dma_mapped and rx_dma_buf != 0 and tx_dma_buf != 0 then use coherent DMA mode diff --git a/Documentation/w1/00-INDEX b/Documentation/w1/00-INDEX index 5270cf4cb109..cb49802745dc 100644 --- a/Documentation/w1/00-INDEX +++ b/Documentation/w1/00-INDEX @@ -1,5 +1,7 @@ 00-INDEX - This file +slaves/ + - Drivers that provide support for specific family codes. masters/ - Individual chips providing 1-wire busses. w1.generic diff --git a/Documentation/w1/masters/ds2490 b/Documentation/w1/masters/ds2490 index 239f9ae01843..28176def3d6f 100644 --- a/Documentation/w1/masters/ds2490 +++ b/Documentation/w1/masters/ds2490 @@ -16,3 +16,55 @@ which allows to build USB <-> W1 bridges. DS9490(R) is a USB <-> W1 bus master device which has 0x81 family ID integrated chip and DS2490 low-level operational chip. + +Notes and limitations. +- The weak pullup current is a minimum of 0.9mA and maximum of 6.0mA. +- The 5V strong pullup is supported with a minimum of 5.9mA and a + maximum of 30.4 mA. (From DS2490.pdf) +- While the ds2490 supports a hardware search the code doesn't take + advantage of it (in tested case it only returned first device). +- The hardware will detect when devices are attached to the bus on the + next bus (reset?) operation, however only a message is printed as + the core w1 code doesn't make use of the information. Connecting + one device tends to give multiple new device notifications. +- The number of USB bus transactions could be reduced if w1_reset_send + was added to the API. The name is just a suggestion. It would take + a write buffer and a read buffer (along with sizes) as arguments. + The ds2490 block I/O command supports reset, write buffer, read + buffer, and strong pullup all in one command, instead of the current + 1 reset bus, 2 write the match rom command and slave rom id, 3 block + write and read data. The write buffer needs to have the match rom + command and slave rom id prepended to the front of the requested + write buffer, both of which are known to the driver. +- The hardware supports normal, flexible, and overdrive bus + communication speeds, but only the normal is supported. +- The registered w1_bus_master functions don't define error + conditions. If a bus search is in progress and the ds2490 is + removed it can produce a good amount of error output before the bus + search finishes. +- The hardware supports detecting some error conditions, such as + short, alarming presence on reset, and no presence on reset, but the + driver doesn't query those values. +- The ds2490 specification doesn't cover short bulk in reads in + detail, but my observation is if fewer bytes are requested than are + available, the bulk read will return an error and the hardware will + clear the entire bulk in buffer. It would be possible to read the + maximum buffer size to not run into this error condition, only extra + bytes in the buffer is a logic error in the driver. The code should + should match reads and writes as well as data sizes. Reads and + writes are serialized and the status verifies that the chip is idle + (and data is available) before the read is executed, so it should + not happen. +- Running x86_64 2.6.24 UHCI under qemu 0.9.0 under x86_64 2.6.22-rc6 + with a OHCI controller, ds2490 running in the guest would operate + normally the first time the module was loaded after qemu attached + the ds2490 hardware, but if the module was unloaded, then reloaded + most of the time one of the bulk out or in, and usually the bulk in + would fail. qemu sets a 50ms timeout and the bulk in would timeout + even when the status shows data available. A bulk out write would + show a successful completion, but the ds2490 status register would + show 0 bytes written. Detaching qemu from the ds2490 hardware and + reattaching would clear the problem. usbmon output in the guest and + host did not explain the problem. My guess is a bug in either qemu + or the host OS and more likely the host OS. +-- 03-06-2008 David Fries <David@Fries.net> diff --git a/Documentation/w1/slaves/00-INDEX b/Documentation/w1/slaves/00-INDEX new file mode 100644 index 000000000000..f8101d6b07b7 --- /dev/null +++ b/Documentation/w1/slaves/00-INDEX @@ -0,0 +1,4 @@ +00-INDEX + - This file +w1_therm + - The Maxim/Dallas Semiconductor ds18*20 temperature sensor. diff --git a/Documentation/w1/slaves/w1_therm b/Documentation/w1/slaves/w1_therm new file mode 100644 index 000000000000..0403aaaba878 --- /dev/null +++ b/Documentation/w1/slaves/w1_therm @@ -0,0 +1,41 @@ +Kernel driver w1_therm +==================== + +Supported chips: + * Maxim ds18*20 based temperature sensors. + +Author: Evgeniy Polyakov <johnpol@2ka.mipt.ru> + + +Description +----------- + +w1_therm provides basic temperature conversion for ds18*20 devices. +supported family codes: +W1_THERM_DS18S20 0x10 +W1_THERM_DS1822 0x22 +W1_THERM_DS18B20 0x28 + +Support is provided through the sysfs w1_slave file. Each open and +read sequence will initiate a temperature conversion then provide two +lines of ASCII output. The first line contains the nine hex bytes +read along with a calculated crc value and YES or NO if it matched. +If the crc matched the returned values are retained. The second line +displays the retained values along with a temperature in millidegrees +Centigrade after t=. + +Parasite powered devices are limited to one slave performing a +temperature conversion at a time. If none of the devices are parasite +powered it would be possible to convert all the devices at the same +time and then go back to read individual sensors. That isn't +currently supported. The driver also doesn't support reduced +precision (which would also reduce the conversion time). + +The module parameter strong_pullup can be set to 0 to disable the +strong pullup or 1 to enable. If enabled the 5V strong pullup will be +enabled when the conversion is taking place provided the master driver +must support the strong pullup (or it falls back to a pullup +resistor). The DS18b20 temperature sensor specification lists a +maximum current draw of 1.5mA and that a 5k pullup resistor is not +sufficient. The strong pullup is designed to provide the additional +current required. diff --git a/Documentation/w1/w1.generic b/Documentation/w1/w1.generic index 4c6509dd4789..e3333eec4320 100644 --- a/Documentation/w1/w1.generic +++ b/Documentation/w1/w1.generic @@ -79,10 +79,13 @@ w1 master sysfs interface <xx-xxxxxxxxxxxxx> - a directory for a found device. The format is family-serial bus - (standard) symlink to the w1 bus driver - (standard) symlink to the w1 driver +w1_master_add - Manually register a slave device w1_master_attempts - the number of times a search was attempted w1_master_max_slave_count - the maximum slaves that may be attached to a master w1_master_name - the name of the device (w1_bus_masterX) +w1_master_pullup - 5V strong pullup 0 enabled, 1 disabled +w1_master_remove - Manually remove a slave device w1_master_search - the number of searches left to do, -1=continual (default) w1_master_slave_count - the number of slaves found @@ -90,7 +93,13 @@ w1_master_slaves - the names of the slaves, one per line w1_master_timeout - the delay in seconds between searches If you have a w1 bus that never changes (you don't add or remove devices), -you can set w1_master_search to a positive value to disable searches. +you can set the module parameter search_count to a small positive number +for an initially small number of bus searches. Alternatively it could be +set to zero, then manually add the slave device serial numbers by +w1_master_add device file. The w1_master_add and w1_master_remove files +generally only make sense when searching is disabled, as a search will +redetect manually removed devices that are present and timeout manually +added devices that aren't on the bus. w1 slave sysfs interface diff --git a/MAINTAINERS b/MAINTAINERS index 5d0b8a23d639..57975bda9201 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1629,6 +1629,11 @@ P: Christopher Hoover M: ch@murgatroid.com, ch@hpl.hp.com S: Maintained +EPSON S1D13XXX FRAMEBUFFER DRIVER +P: Kristoffer Ericson +M: kristoffer.ericson@gmail.com +S: Maintained + ETHEREXPRESS-16 NETWORK DRIVER P: Philip Blundell M: philb@gnu.org @@ -4089,7 +4094,7 @@ W: http://tpmdd.sourceforge.net P: Marcel Selhorst M: tpm@selhorst.net W: http://www.prosec.rub.de/tpm/ -L: tpmdd-devel@lists.sourceforge.net +L: tpmdd-devel@lists.sourceforge.net (moderated for non-subscribers) S: Maintained TRIVIAL PATCHES @@ -4480,6 +4485,13 @@ W: http://kernel.org/~kzak/util-linux-ng/ T: git://git.kernel.org/pub/scm/utils/util-linux-ng/util-linux-ng.git S: Maintained +UVESAFB DRIVER +P: Michal Januszewski +M: spock@gentoo.org +L: linux-fbdev-devel@lists.sourceforge.net (moderated for non-subscribers) +W: http://dev.gentoo.org/~spock/projects/uvesafb/ +S: Maintained + VFAT/FAT/MSDOS FILESYSTEM P: OGAWA Hirofumi M: hirofumi@mail.parknet.co.jp @@ -4497,6 +4509,14 @@ M: khali@linux-fr.org L: i2c@lm-sensors.org S: Maintained +VIA UNICHROME(PRO)/CHROME9 FRAMEBUFFER DRIVER +P: Joseph Chan +M: JosephChan@via.com.tw +P: Scott Fang +M: ScottFang@viatech.com.cn +L: linux-fbdev-devel@lists.sourceforge.net (moderated for non-subscribers) +S: Maintained + VIA VELOCITY NETWORK DRIVER P: Francois Romieu M: romieu@fr.zoreil.com @@ -4598,7 +4618,7 @@ WM97XX TOUCHSCREEN DRIVERS P: Mark Brown M: broonie@opensource.wolfsonmicro.com P: Liam Girdwood -M: liam.girdwood@wolfsonmicro.com +M: lrg@slimlogic.co.uk L: linux-input@vger.kernel.org T: git git://opensource.wolfsonmicro.com/linux-2.6-touch W: http://opensource.wolfsonmicro.com/node/7 diff --git a/arch/Kconfig b/arch/Kconfig index 0267babe5eb9..e6ab550bceb3 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -28,7 +28,7 @@ config OPROFILE_IBS If unsure, say N. config HAVE_OPROFILE - def_bool n + bool config KPROBES bool "Kprobes" @@ -42,7 +42,7 @@ config KPROBES If in doubt, say "N". config HAVE_EFFICIENT_UNALIGNED_ACCESS - def_bool n + bool help Some architectures are unable to perform unaligned accesses without the use of get_unaligned/put_unaligned. Others are @@ -65,13 +65,13 @@ config KRETPROBES depends on KPROBES && HAVE_KRETPROBES config HAVE_IOREMAP_PROT - def_bool n + bool config HAVE_KPROBES - def_bool n + bool config HAVE_KRETPROBES - def_bool n + bool # # An arch should select this if it provides all these things: @@ -89,16 +89,16 @@ config HAVE_KRETPROBES # signal delivery calls tracehook_signal_handler() # config HAVE_ARCH_TRACEHOOK - def_bool n + bool config HAVE_DMA_ATTRS - def_bool n + bool config USE_GENERIC_SMP_HELPERS - def_bool n + bool config HAVE_CLK - def_bool n + bool help The <linux/clk.h> calls support software clock gating and thus are a key power management tool on many systems. diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig index ee35226c44e9..a0f642b6a4b9 100644 --- a/arch/alpha/Kconfig +++ b/arch/alpha/Kconfig @@ -222,8 +222,7 @@ config ALPHA_MIATA bool "Miata" help The Digital PersonalWorkStation (PWS 433a, 433au, 500a, 500au, 600a, - or 600au). There is an Installation HOWTO for this hardware at - <http://eijk.homelinux.org/~stefan/miata.html>. + or 600au). config ALPHA_MIKASA bool "Mikasa" diff --git a/arch/alpha/include/asm/a.out.h b/arch/alpha/include/asm/a.out.h index 02ce8473870a..acdc681231cb 100644 --- a/arch/alpha/include/asm/a.out.h +++ b/arch/alpha/include/asm/a.out.h @@ -95,7 +95,7 @@ struct exec Worse, we have to notice the start address before swapping to use /sbin/loader, which of course is _not_ a TASO application. */ #define SET_AOUT_PERSONALITY(BFPM, EX) \ - set_personality (((BFPM->sh_bang || EX.ah.entry < 0x100000000L \ + set_personality (((BFPM->taso || EX.ah.entry < 0x100000000L \ ? ADDR_LIMIT_32BIT : 0) | PER_OSF4)) #endif /* __KERNEL__ */ diff --git a/arch/alpha/kernel/pci_iommu.c b/arch/alpha/kernel/pci_iommu.c index 2179c602032a..b9094da05d7a 100644 --- a/arch/alpha/kernel/pci_iommu.c +++ b/arch/alpha/kernel/pci_iommu.c @@ -41,13 +41,6 @@ mk_iommu_pte(unsigned long paddr) return (paddr >> (PAGE_SHIFT-1)) | 1; } -static inline long -calc_npages(long bytes) -{ - return (bytes + PAGE_SIZE - 1) >> PAGE_SHIFT; -} - - /* Return the minimum of MAX or the first power of two larger than main memory. */ @@ -287,7 +280,7 @@ pci_map_single_1(struct pci_dev *pdev, void *cpu_addr, size_t size, if (!arena || arena->dma_base + arena->size - 1 > max_dma) arena = hose->sg_isa; - npages = calc_npages((paddr & ~PAGE_MASK) + size); + npages = iommu_num_pages(paddr, size, PAGE_SIZE); /* Force allocation to 64KB boundary for ISA bridges. */ if (pdev && pdev == isa_bridge) @@ -387,7 +380,7 @@ pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr, size_t size, BUG(); } - npages = calc_npages((dma_addr & ~PAGE_MASK) + size); + npages = iommu_num_pages(dma_addr, size, PAGE_SIZE); spin_lock_irqsave(&arena->lock, flags); @@ -580,7 +573,7 @@ sg_fill(struct device *dev, struct scatterlist *leader, struct scatterlist *end, contiguous. */ paddr &= ~PAGE_MASK; - npages = calc_npages(paddr + size); + npages = iommu_num_pages(paddr, size, PAGE_SIZE); dma_ofs = iommu_arena_alloc(dev, arena, npages, 0); if (dma_ofs < 0) { /* If we attempted a direct map above but failed, die. */ @@ -616,7 +609,7 @@ sg_fill(struct device *dev, struct scatterlist *leader, struct scatterlist *end, sg++; } - npages = calc_npages((paddr & ~PAGE_MASK) + size); + npages = iommu_num_pages(paddr, size, PAGE_SIZE); paddr &= PAGE_MASK; for (i = 0; i < npages; ++i, paddr += PAGE_SIZE) @@ -775,7 +768,7 @@ pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg, int nents, DBGA(" (%ld) sg [%lx,%lx]\n", sg - end + nents, addr, size); - npages = calc_npages((addr & ~PAGE_MASK) + size); + npages = iommu_num_pages(addr, size, PAGE_SIZE); ofs = (addr - arena->dma_base) >> PAGE_SHIFT; iommu_arena_free(arena, ofs, npages); diff --git a/arch/alpha/kernel/smp.c b/arch/alpha/kernel/smp.c index 06b6fdab639f..e657c45d91d2 100644 --- a/arch/alpha/kernel/smp.c +++ b/arch/alpha/kernel/smp.c @@ -27,6 +27,7 @@ #include <linux/cache.h> #include <linux/profile.h> #include <linux/bitops.h> +#include <linux/cpu.h> #include <asm/hwrpb.h> #include <asm/ptrace.h> diff --git a/arch/arm/Makefile b/arch/arm/Makefile index e2274bc0b544..7d5121260fda 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -118,9 +118,10 @@ endif machine-$(CONFIG_ARCH_IXP23XX) := ixp23xx machine-$(CONFIG_ARCH_OMAP1) := omap1 machine-$(CONFIG_ARCH_OMAP2) := omap2 + machine-$(CONFIG_ARCH_OMAP3) := omap2 plat-$(CONFIG_ARCH_OMAP) := omap machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2440 s3c2442 s3c2443 - plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx + plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx s3c machine-$(CONFIG_ARCH_LH7A40X) := lh7a40x machine-$(CONFIG_ARCH_VERSATILE) := versatile machine-$(CONFIG_ARCH_IMX) := imx diff --git a/arch/arm/configs/omap3_beagle_defconfig b/arch/arm/configs/omap3_beagle_defconfig new file mode 100644 index 000000000000..e042d27eae16 --- /dev/null +++ b/arch/arm/configs/omap3_beagle_defconfig @@ -0,0 +1,1321 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.27-rc8 +# Wed Oct 1 17:14:22 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +CONFIG_KALLSYMS_EXTRA_PASS=y +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set +# CONFIG_HAVE_IOREMAP_PROT is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_ARCH_TRACEHOOK is not set +# CONFIG_HAVE_DMA_ATTRS is not set +# CONFIG_USE_GENERIC_SMP_HELPERS is not set +CONFIG_HAVE_CLK=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +CONFIG_ARCH_OMAP=y +# CONFIG_ARCH_MSM7X00A is not set + +# +# TI OMAP Implementations +# +CONFIG_ARCH_OMAP_OTG=y +# CONFIG_ARCH_OMAP1 is not set +# CONFIG_ARCH_OMAP2 is not set +CONFIG_ARCH_OMAP3=y + +# +# OMAP Feature Selections +# +# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set +# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set +# CONFIG_OMAP_RESET_CLOCKS is not set +# CONFIG_OMAP_MUX is not set +# CONFIG_OMAP_MCBSP is not set +# CONFIG_OMAP_MPU_TIMER is not set +CONFIG_OMAP_32K_TIMER=y +CONFIG_OMAP_32K_TIMER_HZ=128 +CONFIG_OMAP_DM_TIMER=y +# CONFIG_OMAP_LL_DEBUG_UART1 is not set +# CONFIG_OMAP_LL_DEBUG_UART2 is not set +CONFIG_OMAP_LL_DEBUG_UART3=y +CONFIG_ARCH_OMAP34XX=y +CONFIG_ARCH_OMAP3430=y + +# +# OMAP Board Type +# +CONFIG_MACH_OMAP3_BEAGLE=y + +# +# Boot options +# + +# +# Power management +# + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_V7=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_PABRT_IFAR=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_ARM_THUMBEE is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_HAS_TLS_REG=y +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +# CONFIG_PREEMPT is not set +CONFIG_HZ=128 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +CONFIG_ARCH_FLATMEM_HAS_HOLES=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Power Management +# +# CONFIG_CPU_FREQ is not set +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set +CONFIG_VFP=y +CONFIG_VFPv3=y +# CONFIG_NEON is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +CONFIG_BINFMT_MISC=y + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_NET_KEY=y +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=16384 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_NET_ETHERNET is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=32 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_8250_DETECT_IRQ=y +CONFIG_SERIAL_8250_RSA=y + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_OCORES is not set +CONFIG_I2C_OMAP=y +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_AT24 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_ISP1301_OMAP is not set +# CONFIG_TPS65010 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_SPI is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_UCB1400_CORE is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +CONFIG_DAB=y +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +CONFIG_USB_MON=y + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +CONFIG_USB_MUSB_HDRC=y +CONFIG_USB_MUSB_SOC=y + +# +# OMAP 343x high speed USB support +# +CONFIG_USB_MUSB_HOST=y +# CONFIG_USB_MUSB_PERIPHERAL is not set +# CONFIG_USB_MUSB_OTG is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set +CONFIG_USB_MUSB_HDRC_HCD=y +# CONFIG_MUSB_PIO_ONLY is not set +CONFIG_USB_INVENTRA_DMA=y +# CONFIG_USB_TI_CPPI_DMA is not set +# CONFIG_USB_MUSB_DEBUG is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +# CONFIG_USB_STORAGE is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA25X is not set +CONFIG_USB_GADGET_M66592=y +CONFIG_USB_M66592=y +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_ZERO is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_OMAP is not set +# CONFIG_MEMSTICK is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_DMADEVICES is not set + +# +# Voltage and Current regulators +# +# CONFIG_REGULATOR is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QFMT_V1 is not set +CONFIG_QFMT_V2=y +CONFIG_QUOTACTL=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +# CONFIG_FTRACE is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_DEBUG_USER is not set +# CONFIG_DEBUG_ERRORS is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_LL is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +CONFIG_CRC_CCITT=y +# CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +CONFIG_LIBCRC32C=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/omap_ldp_defconfig b/arch/arm/configs/omap_ldp_defconfig new file mode 100644 index 000000000000..948a212fb1cc --- /dev/null +++ b/arch/arm/configs/omap_ldp_defconfig @@ -0,0 +1,1044 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.27-rc5 +# Fri Oct 10 11:49:41 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +CONFIG_KALLSYMS_EXTRA_PASS=y +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set +# CONFIG_HAVE_IOREMAP_PROT is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_ARCH_TRACEHOOK is not set +# CONFIG_HAVE_DMA_ATTRS is not set +# CONFIG_USE_GENERIC_SMP_HELPERS is not set +CONFIG_HAVE_CLK=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +CONFIG_ARCH_OMAP=y +# CONFIG_ARCH_MSM7X00A is not set + +# +# TI OMAP Implementations +# +CONFIG_ARCH_OMAP_OTG=y +# CONFIG_ARCH_OMAP1 is not set +# CONFIG_ARCH_OMAP2 is not set +CONFIG_ARCH_OMAP3=y + +# +# OMAP Feature Selections +# +# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set +# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set +# CONFIG_OMAP_RESET_CLOCKS is not set +CONFIG_OMAP_MUX=y +CONFIG_OMAP_MUX_DEBUG=y +CONFIG_OMAP_MUX_WARNINGS=y +CONFIG_OMAP_MCBSP=y +# CONFIG_OMAP_MPU_TIMER is not set +CONFIG_OMAP_32K_TIMER=y +CONFIG_OMAP_32K_TIMER_HZ=128 +CONFIG_OMAP_DM_TIMER=y +# CONFIG_OMAP_LL_DEBUG_UART1 is not set +# CONFIG_OMAP_LL_DEBUG_UART2 is not set +CONFIG_OMAP_LL_DEBUG_UART3=y +CONFIG_OMAP_SERIAL_WAKE=y +CONFIG_ARCH_OMAP34XX=y +CONFIG_ARCH_OMAP3430=y + +# +# OMAP Board Type +# +# CONFIG_MACH_OMAP3_BEAGLE is not set +CONFIG_MACH_OMAP_LDP=y +# CONFIG_MACH_OVERO is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_V7=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_PABRT_IFAR=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_ARM_THUMBEE is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_HAS_TLS_REG=y +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_PREEMPT is not set +CONFIG_HZ=128 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +CONFIG_ARCH_FLATMEM_HAS_HOLES=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set +CONFIG_VFP=y +CONFIG_VFPv3=y +# CONFIG_NEON is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +CONFIG_BINFMT_MISC=y + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# CONFIG_NET is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_MTD is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=16384 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +CONFIG_MISC_DEVICES=y +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ADS7846=y +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=32 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_8250_DETECT_IRQ=y +CONFIG_SERIAL_8250_RSA=y + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_OCORES is not set +CONFIG_I2C_OMAP=y +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_AT24 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_ISP1301_OMAP is not set +# CONFIG_TPS65010 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_BITBANG is not set +CONFIG_SPI_OMAP24XX=y + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +CONFIG_W1=y + +# +# 1-wire Bus Masters +# +# CONFIG_W1_MASTER_DS2482 is not set +# CONFIG_W1_MASTER_DS1WM is not set +# CONFIG_W1_MASTER_GPIO is not set + +# +# 1-wire Slaves +# +# CONFIG_W1_SLAVE_THERM is not set +# CONFIG_W1_SLAVE_SMEM is not set +# CONFIG_W1_SLAVE_DS2433 is not set +# CONFIG_W1_SLAVE_DS2760 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_BATTERY_DS2760 is not set +# CONFIG_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +CONFIG_DAB=y + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +CONFIG_VIDEO_OUTPUT_CONTROL=m +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_SOUND=y +CONFIG_SND=y +# CONFIG_SND_SEQUENCER is not set +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_ARM=y +CONFIG_SND_SPI=y +# CONFIG_SND_SOC is not set +# CONFIG_SOUND_PRIME is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set +# CONFIG_USB_SUPPORT is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_OMAP is not set +# CONFIG_MMC_SPI is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_DMADEVICES is not set + +# +# Voltage and Current regulators +# +# CONFIG_REGULATOR is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_QUOTA=y +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QFMT_V1 is not set +CONFIG_QFMT_V2=y +CONFIG_QUOTACTL=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +# CONFIG_FTRACE is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_DEBUG_USER is not set +# CONFIG_DEBUG_ERRORS is not set +# CONFIG_DEBUG_STACK_USAGE is not set +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +CONFIG_CRC_CCITT=y +# CONFIG_CRC16 is not set +CONFIG_CRC_T10DIF=y +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +CONFIG_LIBCRC32C=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/overo_defconfig b/arch/arm/configs/overo_defconfig new file mode 100644 index 000000000000..49200967a153 --- /dev/null +++ b/arch/arm/configs/overo_defconfig @@ -0,0 +1,1885 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.27-rc8 +# Fri Oct 3 11:50:34 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_OPROFILE_ARMV7=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +# CONFIG_ELF_CORE is not set +# CONFIG_COMPAT_BRK is not set +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +# CONFIG_MARKERS is not set +CONFIG_OPROFILE=y +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set +# CONFIG_HAVE_IOREMAP_PROT is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_ARCH_TRACEHOOK is not set +# CONFIG_HAVE_DMA_ATTRS is not set +# CONFIG_USE_GENERIC_SMP_HELPERS is not set +CONFIG_HAVE_CLK=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_KMOD=y +CONFIG_BLOCK=y +CONFIG_LBD=y +# CONFIG_BLK_DEV_IO_TRACE is not set +CONFIG_LSF=y +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +CONFIG_ARCH_OMAP=y +# CONFIG_ARCH_MSM7X00A is not set + +# +# TI OMAP Implementations +# +CONFIG_ARCH_OMAP_OTG=y +# CONFIG_ARCH_OMAP1 is not set +# CONFIG_ARCH_OMAP2 is not set +CONFIG_ARCH_OMAP3=y + +# +# OMAP Feature Selections +# +# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set +# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set +# CONFIG_OMAP_RESET_CLOCKS is not set +# CONFIG_OMAP_MUX is not set +CONFIG_OMAP_MCBSP=y +# CONFIG_OMAP_MPU_TIMER is not set +CONFIG_OMAP_32K_TIMER=y +CONFIG_OMAP_32K_TIMER_HZ=128 +CONFIG_OMAP_DM_TIMER=y +# CONFIG_OMAP_LL_DEBUG_UART1 is not set +# CONFIG_OMAP_LL_DEBUG_UART2 is not set +CONFIG_OMAP_LL_DEBUG_UART3=y +CONFIG_ARCH_OMAP34XX=y +CONFIG_ARCH_OMAP3430=y + +# +# OMAP Board Type +# +# CONFIG_MACH_OMAP3_BEAGLE is not set +CONFIG_MACH_OVERO=y + +# +# Boot options +# + +# +# Power management +# + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_V7=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_PABRT_IFAR=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +CONFIG_ARM_THUMBEE=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_HAS_TLS_REG=y +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +# CONFIG_PREEMPT is not set +CONFIG_HZ=128 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +CONFIG_ARCH_FLATMEM_HAS_HOLES=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_LEDS=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE=" debug " +# CONFIG_XIP_KERNEL is not set +CONFIG_KEXEC=y +CONFIG_ATAGS_PROC=y + +# +# CPU Power Management +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +# CONFIG_CPU_FREQ_DEBUG is not set +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_STAT_DETAILS=y +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_NEON=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +CONFIG_BINFMT_AOUT=m +CONFIG_BINFMT_MISC=y + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_NET_KEY=y +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=m +# CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=m +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +CONFIG_BT=y +CONFIG_BT_L2CAP=y +CONFIG_BT_SCO=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y + +# +# Bluetooth device drivers +# +CONFIG_BT_HCIUSB=m +CONFIG_BT_HCIUSB_SCO=y +# CONFIG_BT_HCIBTUSB is not set +# CONFIG_BT_HCIBTSDIO is not set +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_BCSP=y +# CONFIG_BT_HCIUART_LL is not set +CONFIG_BT_HCIBCM203X=y +CONFIG_BT_HCIBPA10X=y +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +CONFIG_CFG80211=y +CONFIG_NL80211=y +CONFIG_WIRELESS_EXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +CONFIG_MAC80211=y + +# +# Rate control algorithm selection +# +CONFIG_MAC80211_RC_PID=y +CONFIG_MAC80211_RC_DEFAULT_PID=y +CONFIG_MAC80211_RC_DEFAULT="pid" +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_IEEE80211=y +# CONFIG_IEEE80211_DEBUG is not set +CONFIG_IEEE80211_CRYPT_WEP=y +CONFIG_IEEE80211_CRYPT_CCMP=y +CONFIG_IEEE80211_CRYPT_TKIP=y +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_CRYPTOLOOP=m +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=16384 +# CONFIG_BLK_DEV_XIP is not set +CONFIG_CDROM_PKTCDVD=m +CONFIG_CDROM_PKTCDVD_BUFFERS=8 +# CONFIG_CDROM_PKTCDVD_WCACHE is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +CONFIG_EEPROM_93CX6=m +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +CONFIG_RAID_ATTRS=m +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +CONFIG_CHR_DEV_SG=m +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_DH is not set +# CONFIG_ATA is not set +CONFIG_MD=y +CONFIG_BLK_DEV_MD=m +CONFIG_MD_LINEAR=m +CONFIG_MD_RAID0=m +CONFIG_MD_RAID1=m +CONFIG_MD_RAID10=m +CONFIG_MD_RAID456=m +CONFIG_MD_RAID5_RESHAPE=y +CONFIG_MD_MULTIPATH=m +CONFIG_MD_FAULTY=m +CONFIG_BLK_DEV_DM=m +# CONFIG_DM_DEBUG is not set +CONFIG_DM_CRYPT=m +CONFIG_DM_SNAPSHOT=m +CONFIG_DM_MIRROR=m +CONFIG_DM_ZERO=m +CONFIG_DM_MULTIPATH=m +CONFIG_DM_DELAY=m +# CONFIG_DM_UEVENT is not set +CONFIG_NETDEVICES=y +CONFIG_DUMMY=m +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +CONFIG_TUN=m +# CONFIG_VETH is not set +# CONFIG_NET_ETHERNET is not set +CONFIG_MII=y +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +CONFIG_WLAN_80211=y +CONFIG_LIBERTAS=y +CONFIG_LIBERTAS_USB=y +CONFIG_LIBERTAS_SDIO=y +CONFIG_LIBERTAS_DEBUG=y +CONFIG_USB_ZD1201=m +# CONFIG_USB_NET_RNDIS_WLAN is not set +CONFIG_RTL8187=m +# CONFIG_MAC80211_HWSIM is not set +CONFIG_P54_COMMON=m +CONFIG_P54_USB=m +# CONFIG_IWLWIFI_LEDS is not set +CONFIG_HOSTAP=m +CONFIG_HOSTAP_FIRMWARE=y +CONFIG_HOSTAP_FIRMWARE_NVRAM=y +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +# CONFIG_ZD1211RW is not set +# CONFIG_RT2X00 is not set + +# +# USB Network Adapters +# +CONFIG_USB_CATC=m +CONFIG_USB_KAWETH=m +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=y +CONFIG_USB_NET_CDCETHER=y +CONFIG_USB_NET_DM9601=m +CONFIG_USB_NET_GL620A=m +CONFIG_USB_NET_NET1080=m +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_MCS7830=m +CONFIG_USB_NET_RNDIS_HOST=m +CONFIG_USB_NET_CDC_SUBSET=m +CONFIG_USB_ALI_M5632=y +CONFIG_USB_AN2720=y +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +CONFIG_USB_EPSON2888=y +CONFIG_USB_KC2190=y +CONFIG_USB_NET_ZAURUS=m +# CONFIG_WAN is not set +CONFIG_PPP=m +# CONFIG_PPP_MULTILINK is not set +# CONFIG_PPP_FILTER is not set +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_MPPE=m +CONFIG_PPPOE=m +# CONFIG_PPPOL2TP is not set +# CONFIG_SLIP is not set +CONFIG_SLHC=m +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_GPIO is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_LIFEBOOK=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=32 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_8250_DETECT_IRQ=y +CONFIG_SERIAL_8250_RSA=y + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_OCORES is not set +CONFIG_I2C_OMAP=y +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_AT24 is not set +CONFIG_SENSORS_EEPROM=y +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_ISP1301_OMAP is not set +# CONFIG_TPS65010 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_BITBANG is not set +CONFIG_SPI_OMAP24XX=y + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +CONFIG_DEBUG_GPIO=y +CONFIG_GPIO_SYSFS=y + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_W1 is not set +CONFIG_POWER_SUPPLY=m +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_BATTERY_DS2760 is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_AD7414 is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7473 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM70 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_HWMON_DEBUG_CHIP is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_UCB1400_CORE is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +CONFIG_VIDEO_DEV=m +CONFIG_VIDEO_V4L2_COMMON=m +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y +CONFIG_DVB_CORE=m +CONFIG_VIDEO_MEDIA=m + +# +# Multimedia drivers +# +CONFIG_MEDIA_ATTACH=y +CONFIG_MEDIA_TUNER=m +# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA827X=m +CONFIG_MEDIA_TUNER_TDA18271=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_MT2060=m +CONFIG_MEDIA_TUNER_MT2266=m +CONFIG_MEDIA_TUNER_QT1010=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_MEDIA_TUNER_MXL5005S=m +CONFIG_VIDEO_V4L2=m +CONFIG_VIDEO_V4L1=m +CONFIG_VIDEO_TVEEPROM=m +CONFIG_VIDEO_TUNER=m +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y +CONFIG_VIDEO_MSP3400=m +CONFIG_VIDEO_CS53L32A=m +CONFIG_VIDEO_WM8775=m +CONFIG_VIDEO_SAA711X=m +CONFIG_VIDEO_CX25840=m +CONFIG_VIDEO_CX2341X=m +# CONFIG_VIDEO_VIVI is not set +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_VIDEO_SAA5246A is not set +# CONFIG_VIDEO_SAA5249 is not set +# CONFIG_TUNER_3036 is not set +# CONFIG_VIDEO_AU0828 is not set +CONFIG_V4L_USB_DRIVERS=y +CONFIG_USB_VIDEO_CLASS=m +CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y +# CONFIG_USB_GSPCA is not set +CONFIG_VIDEO_PVRUSB2=m +CONFIG_VIDEO_PVRUSB2_SYSFS=y +CONFIG_VIDEO_PVRUSB2_DVB=y +# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set +# CONFIG_VIDEO_EM28XX is not set +CONFIG_VIDEO_USBVISION=m +CONFIG_VIDEO_USBVIDEO=m +CONFIG_USB_VICAM=m +CONFIG_USB_IBMCAM=m +CONFIG_USB_KONICAWC=m +CONFIG_USB_QUICKCAM_MESSENGER=m +# CONFIG_USB_ET61X251 is not set +CONFIG_VIDEO_OVCAMCHIP=m +CONFIG_USB_W9968CF=m +CONFIG_USB_OV511=m +CONFIG_USB_SE401=m +CONFIG_USB_SN9C102=m +CONFIG_USB_STV680=m +# CONFIG_USB_ZC0301 is not set +CONFIG_USB_PWC=m +# CONFIG_USB_PWC_DEBUG is not set +CONFIG_USB_ZR364XX=m +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_USB_S2255 is not set +# CONFIG_SOC_CAMERA is not set +# CONFIG_VIDEO_SH_MOBILE_CEU is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_USB_DSBR is not set +# CONFIG_USB_SI470X is not set +CONFIG_DVB_CAPTURE_DRIVERS=y +# CONFIG_TTPCI_EEPROM is not set + +# +# Supported USB Adapters +# +CONFIG_DVB_USB=m +# CONFIG_DVB_USB_DEBUG is not set +CONFIG_DVB_USB_A800=m +CONFIG_DVB_USB_DIBUSB_MB=m +# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set +CONFIG_DVB_USB_DIBUSB_MC=m +CONFIG_DVB_USB_DIB0700=m +CONFIG_DVB_USB_UMT_010=m +CONFIG_DVB_USB_CXUSB=m +CONFIG_DVB_USB_M920X=m +CONFIG_DVB_USB_GL861=m +CONFIG_DVB_USB_AU6610=m +CONFIG_DVB_USB_DIGITV=m +CONFIG_DVB_USB_VP7045=m +CONFIG_DVB_USB_VP702X=m +CONFIG_DVB_USB_GP8PSK=m +CONFIG_DVB_USB_NOVA_T_USB2=m +CONFIG_DVB_USB_TTUSB2=m +CONFIG_DVB_USB_DTT200U=m +CONFIG_DVB_USB_OPERA1=m +CONFIG_DVB_USB_AF9005=m +CONFIG_DVB_USB_AF9005_REMOTE=m +# CONFIG_DVB_USB_DW2102 is not set +# CONFIG_DVB_USB_ANYSEE is not set +CONFIG_DVB_TTUSB_BUDGET=m +CONFIG_DVB_TTUSB_DEC=m +CONFIG_DVB_CINERGYT2=m +# CONFIG_DVB_CINERGYT2_TUNING is not set +# CONFIG_DVB_SIANO_SMS1XXX is not set + +# +# Supported FlexCopII (B2C2) Adapters +# +# CONFIG_DVB_B2C2_FLEXCOP is not set + +# +# Supported DVB Frontends +# + +# +# Customise DVB Frontends +# +# CONFIG_DVB_FE_CUSTOMISE is not set + +# +# DVB-S (satellite) frontends +# +CONFIG_DVB_CX24110=m +CONFIG_DVB_CX24123=m +CONFIG_DVB_MT312=m +CONFIG_DVB_S5H1420=m +CONFIG_DVB_STV0299=m +CONFIG_DVB_TDA8083=m +CONFIG_DVB_TDA10086=m +CONFIG_DVB_VES1X93=m +CONFIG_DVB_TUNER_ITD1000=m +CONFIG_DVB_TDA826X=m +CONFIG_DVB_TUA6100=m + +# +# DVB-T (terrestrial) frontends +# +CONFIG_DVB_SP8870=m +CONFIG_DVB_SP887X=m +CONFIG_DVB_CX22700=m +CONFIG_DVB_CX22702=m +# CONFIG_DVB_DRX397XD is not set +CONFIG_DVB_L64781=m +CONFIG_DVB_TDA1004X=m +CONFIG_DVB_NXT6000=m +CONFIG_DVB_MT352=m +CONFIG_DVB_ZL10353=m +CONFIG_DVB_DIB3000MB=m +CONFIG_DVB_DIB3000MC=m +CONFIG_DVB_DIB7000M=m +CONFIG_DVB_DIB7000P=m +CONFIG_DVB_TDA10048=m + +# +# DVB-C (cable) frontends +# +CONFIG_DVB_VES1820=m +CONFIG_DVB_TDA10021=m +CONFIG_DVB_TDA10023=m +CONFIG_DVB_STV0297=m + +# +# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# +CONFIG_DVB_NXT200X=m +# CONFIG_DVB_OR51211 is not set +# CONFIG_DVB_OR51132 is not set +CONFIG_DVB_BCM3510=m +CONFIG_DVB_LGDT330X=m +CONFIG_DVB_S5H1409=m +CONFIG_DVB_AU8522=m +CONFIG_DVB_S5H1411=m + +# +# Digital terrestrial only tuners/PLL +# +CONFIG_DVB_PLL=m +CONFIG_DVB_TUNER_DIB0070=m + +# +# SEC control devices for DVB-S +# +CONFIG_DVB_LNBP21=m +# CONFIG_DVB_ISL6405 is not set +CONFIG_DVB_ISL6421=m +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +CONFIG_DISPLAY_SUPPORT=y + +# +# Display hardware drivers +# + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_HWDEP=y +CONFIG_SND_RAWMIDI=y +CONFIG_SND_SEQUENCER=m +# CONFIG_SND_SEQ_DUMMY is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +CONFIG_SND_SEQUENCER_OSS=y +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +CONFIG_SND_VERBOSE_PRINTK=y +CONFIG_SND_DEBUG=y +# CONFIG_SND_DEBUG_VERBOSE is not set +# CONFIG_SND_PCM_XRUN_DEBUG is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_VIRMIDI is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +CONFIG_SND_ARM=y +CONFIG_SND_SPI=y +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=y +CONFIG_SND_USB_CAIAQ=m +CONFIG_SND_USB_CAIAQ_INPUT=y +CONFIG_SND_SOC=y +CONFIG_SND_OMAP_SOC=y +# CONFIG_SOUND_PRIME is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +CONFIG_HID_DEBUG=y +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +CONFIG_USB_DEBUG=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +CONFIG_USB_MON=y + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +CONFIG_USB_MUSB_HDRC=y +CONFIG_USB_MUSB_SOC=y + +# +# OMAP 343x high speed USB support +# +CONFIG_USB_MUSB_HOST=y +# CONFIG_USB_MUSB_PERIPHERAL is not set +# CONFIG_USB_MUSB_OTG is not set +CONFIG_USB_MUSB_HDRC_HCD=y +CONFIG_MUSB_PIO_ONLY=y +# CONFIG_USB_MUSB_DEBUG is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=m +CONFIG_USB_PRINTER=m +CONFIG_USB_WDM=y + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB port drivers +# +CONFIG_USB_SERIAL=m +# CONFIG_USB_EZUSB is not set +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP2101 is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +# CONFIG_USB_SERIAL_FTDI_SIO is not set +# CONFIG_USB_SERIAL_FUNSOFT is not set +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MOTOROLA is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +# CONFIG_USB_SERIAL_PL2303 is not set +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_HP4X is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +# CONFIG_USB_SERIAL_OPTION is not set +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +CONFIG_USB_EMI62=m +CONFIG_USB_EMI26=m +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_RIO500 is not set +CONFIG_USB_LEGOTOWER=m +CONFIG_USB_LCD=m +# CONFIG_USB_BERRY_CHARGE is not set +CONFIG_USB_LED=m +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_GADGET is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_UNSAFE_RESUME=y + +# +# MMC/SD Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +CONFIG_SDIO_UART=y +# CONFIG_MMC_TEST is not set + +# +# MMC/SD Host Controller Drivers +# +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_OMAP is not set +# CONFIG_MMC_SPI is not set +# CONFIG_MEMSTICK is not set +# CONFIG_ACCESSIBILITY is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +# CONFIG_LEDS_PCA9532 is not set +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_PCA955X is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_DMADEVICES is not set + +# +# Voltage and Current regulators +# +# CONFIG_REGULATOR is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_XFS_FS=m +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_POSIX_ACL is not set +# CONFIG_XFS_RT is not set +# CONFIG_XFS_DEBUG is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QFMT_V1 is not set +CONFIG_QFMT_V2=y +CONFIG_QUOTACTL=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +CONFIG_FUSE_FS=m + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +CONFIG_JFFS2_SUMMARY=y +CONFIG_JFFS2_FS_XATTR=y +CONFIG_JFFS2_FS_POSIX_ACL=y +CONFIG_JFFS2_FS_SECURITY=y +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_RTIME=y +CONFIG_JFFS2_RUBIN=y +# CONFIG_JFFS2_CMODE_NONE is not set +CONFIG_JFFS2_CMODE_PRIORITY=y +# CONFIG_JFFS2_CMODE_SIZE is not set +# CONFIG_JFFS2_CMODE_FAVOURLZO is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_SCHED_DEBUG=y +CONFIG_SCHEDSTATS=y +CONFIG_TIMER_STATS=y +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +# CONFIG_FTRACE is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +# CONFIG_DEBUG_USER is not set +# CONFIG_DEBUG_ERRORS is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_LL is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_XOR_BLOCKS=m +CONFIG_ASYNC_CORE=m +CONFIG_ASYNC_MEMCPY=m +CONFIG_ASYNC_XOR=m +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_AEAD=m +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_HASH=m +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_GF128MUL=m +CONFIG_CRYPTO_NULL=m +CONFIG_CRYPTO_CRYPTD=m +# CONFIG_CRYPTO_AUTHENC is not set +CONFIG_CRYPTO_TEST=m + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +CONFIG_CRYPTO_HMAC=m +CONFIG_CRYPTO_XCBC=m + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=m +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=y +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=m +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_TGR192=m +CONFIG_CRYPTO_WP512=m + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_ARC4=y +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_CAMELLIA=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_FCRYPT=m +CONFIG_CRYPTO_KHAZAD=m +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=m +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +CONFIG_CRC_CCITT=y +CONFIG_CRC16=m +CONFIG_CRC_T10DIF=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +CONFIG_CRC7=y +CONFIG_LIBCRC32C=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/mach-integrator/cpu.c b/arch/arm/mach-integrator/cpu.c index e4f72d202cc0..44d4c2e8207b 100644 --- a/arch/arm/mach-integrator/cpu.c +++ b/arch/arm/mach-integrator/cpu.c @@ -184,7 +184,6 @@ static int integrator_cpufreq_init(struct cpufreq_policy *policy) { /* set default policy and cpuinfo */ - policy->governor = CPUFREQ_DEFAULT_GOVERNOR; policy->cpuinfo.max_freq = 160000; policy->cpuinfo.min_freq = 12000; policy->cpuinfo.transition_latency = 1000000; /* 1 ms, assumed */ diff --git a/arch/arm/mach-omap1/clock.c b/arch/arm/mach-omap1/clock.c index 478c2c9a22cb..5fba20731710 100644 --- a/arch/arm/mach-omap1/clock.c +++ b/arch/arm/mach-omap1/clock.c @@ -201,7 +201,7 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate) return -EINVAL; parent = clk->parent; - if (unlikely(parent == 0)) + if (unlikely(parent == NULL)) return -EIO; realrate = parent->rate; @@ -499,7 +499,7 @@ static int omap1_clk_enable_generic(struct clk *clk) if (clk->flags & ALWAYS_ENABLED) return 0; - if (unlikely(clk->enable_reg == 0)) { + if (unlikely(clk->enable_reg == NULL)) { printk(KERN_ERR "clock.c: Enable for %s without enable code\n", clk->name); return -EINVAL; @@ -535,7 +535,7 @@ static void omap1_clk_disable_generic(struct clk *clk) __u16 regval16; __u32 regval32; - if (clk->enable_reg == 0) + if (clk->enable_reg == NULL) return; if (clk->flags & ENABLE_REG_32BIT) { @@ -577,7 +577,7 @@ static long omap1_clk_round_rate(struct clk *clk, unsigned long rate) return clk->parent->rate / (1 << dsor_exp); } - if(clk->round_rate != 0) + if (clk->round_rate != NULL) return clk->round_rate(clk, rate); return clk->rate; @@ -625,7 +625,7 @@ static void __init omap1_clk_disable_unused(struct clk *clk) /* Clocks in the DSP domain need api_ck. Just assume bootloader * has not enabled any DSP clocks */ - if ((u32)clk->enable_reg == DSP_IDLECT2) { + if (clk->enable_reg == DSP_IDLECT2) { printk(KERN_INFO "Skipping reset check for DSP domain " "clock \"%s\"\n", clk->name); return; diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h index 6eadf72828d8..5635b511ab6f 100644 --- a/arch/arm/mach-omap1/clock.h +++ b/arch/arm/mach-omap1/clock.h @@ -324,7 +324,7 @@ static struct clk dspper_ck = { .parent = &ck_dpll1, .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | RATE_CKCTL | VIRTUAL_IO_ADDRESS, - .enable_reg = (void __iomem *)DSP_IDLECT2, + .enable_reg = DSP_IDLECT2, .enable_bit = EN_PERCK, .rate_offset = CKCTL_PERDIV_OFFSET, .recalc = &omap1_ckctl_recalc_dsp_domain, @@ -338,7 +338,7 @@ static struct clk dspxor_ck = { .parent = &ck_ref, .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | VIRTUAL_IO_ADDRESS, - .enable_reg = (void __iomem *)DSP_IDLECT2, + .enable_reg = DSP_IDLECT2, .enable_bit = EN_XORPCK, .recalc = &followparent_recalc, .enable = &omap1_clk_enable_dsp_domain, @@ -350,7 +350,7 @@ static struct clk dsptim_ck = { .parent = &ck_ref, .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | VIRTUAL_IO_ADDRESS, - .enable_reg = (void __iomem *)DSP_IDLECT2, + .enable_reg = DSP_IDLECT2, .enable_bit = EN_DSPTIMCK, .recalc = &followparent_recalc, .enable = &omap1_clk_enable_dsp_domain, diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c index 99982d3380c9..e382b438c64e 100644 --- a/arch/arm/mach-omap1/devices.c +++ b/arch/arm/mach-omap1/devices.c @@ -101,7 +101,7 @@ static inline void omap_init_mbox(void) { } #if defined(CONFIG_OMAP_STI) -#define OMAP1_STI_BASE IO_ADDRESS(0xfffea000) +#define OMAP1_STI_BASE 0xfffea000 #define OMAP1_STI_CHANNEL_BASE (OMAP1_STI_BASE + 0x400) static struct resource sti_resources[] = { diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index 2baeaeb0c900..7de7c6915584 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c @@ -103,30 +103,6 @@ static inline void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk) { } #endif -static int omap1_mcbsp_check(unsigned int id) -{ - /* REVISIT: Check correctly for number of registered McBSPs */ - if (cpu_is_omap730()) { - if (id > OMAP_MAX_MCBSP_COUNT - 2) { - printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", - id + 1); - return -ENODEV; - } - return 0; - } - - if (cpu_is_omap15xx() || cpu_is_omap16xx()) { - if (id > OMAP_MAX_MCBSP_COUNT - 1) { - printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", - id + 1); - return -ENODEV; - } - return 0; - } - - return -ENODEV; -} - static void omap1_mcbsp_request(unsigned int id) { /* @@ -151,7 +127,6 @@ static void omap1_mcbsp_free(unsigned int id) } static struct omap_mcbsp_ops omap1_mcbsp_ops = { - .check = omap1_mcbsp_check, .request = omap1_mcbsp_request, .free = omap1_mcbsp_free, }; @@ -160,7 +135,6 @@ static struct omap_mcbsp_ops omap1_mcbsp_ops = { static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { { .phys_base = OMAP730_MCBSP1_BASE, - .virt_base = io_p2v(OMAP730_MCBSP1_BASE), .dma_rx_sync = OMAP_DMA_MCBSP1_RX, .dma_tx_sync = OMAP_DMA_MCBSP1_TX, .rx_irq = INT_730_McBSP1RX, @@ -169,7 +143,6 @@ static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { }, { .phys_base = OMAP730_MCBSP2_BASE, - .virt_base = io_p2v(OMAP730_MCBSP2_BASE), .dma_rx_sync = OMAP_DMA_MCBSP3_RX, .dma_tx_sync = OMAP_DMA_MCBSP3_TX, .rx_irq = INT_730_McBSP2RX, @@ -187,7 +160,6 @@ static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = { static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { { .phys_base = OMAP1510_MCBSP1_BASE, - .virt_base = OMAP1510_MCBSP1_BASE, .dma_rx_sync = OMAP_DMA_MCBSP1_RX, .dma_tx_sync = OMAP_DMA_MCBSP1_TX, .rx_irq = INT_McBSP1RX, @@ -197,7 +169,6 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { }, { .phys_base = OMAP1510_MCBSP2_BASE, - .virt_base = io_p2v(OMAP1510_MCBSP2_BASE), .dma_rx_sync = OMAP_DMA_MCBSP2_RX, .dma_tx_sync = OMAP_DMA_MCBSP2_TX, .rx_irq = INT_1510_SPI_RX, @@ -206,7 +177,6 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { }, { .phys_base = OMAP1510_MCBSP3_BASE, - .virt_base = OMAP1510_MCBSP3_BASE, .dma_rx_sync = OMAP_DMA_MCBSP3_RX, .dma_tx_sync = OMAP_DMA_MCBSP3_TX, .rx_irq = INT_McBSP3RX, @@ -225,7 +195,6 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { { .phys_base = OMAP1610_MCBSP1_BASE, - .virt_base = OMAP1610_MCBSP1_BASE, .dma_rx_sync = OMAP_DMA_MCBSP1_RX, .dma_tx_sync = OMAP_DMA_MCBSP1_TX, .rx_irq = INT_McBSP1RX, @@ -235,7 +204,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { }, { .phys_base = OMAP1610_MCBSP2_BASE, - .virt_base = io_p2v(OMAP1610_MCBSP2_BASE), .dma_rx_sync = OMAP_DMA_MCBSP2_RX, .dma_tx_sync = OMAP_DMA_MCBSP2_TX, .rx_irq = INT_1610_McBSP2_RX, @@ -244,7 +212,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { }, { .phys_base = OMAP1610_MCBSP3_BASE, - .virt_base = OMAP1610_MCBSP3_BASE, .dma_rx_sync = OMAP_DMA_MCBSP3_RX, .dma_tx_sync = OMAP_DMA_MCBSP3_TX, .rx_irq = INT_McBSP3RX, @@ -271,6 +238,18 @@ int __init omap1_mcbsp_init(void) } if (cpu_is_omap730()) + omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ; + if (cpu_is_omap15xx()) + omap_mcbsp_count = OMAP15XX_MCBSP_PDATA_SZ; + if (cpu_is_omap16xx()) + omap_mcbsp_count = OMAP16XX_MCBSP_PDATA_SZ; + + mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), + GFP_KERNEL); + if (!mcbsp_ptr) + return -ENOMEM; + + if (cpu_is_omap730()) omap_mcbsp_register_board_cfg(omap730_mcbsp_pdata, OMAP730_MCBSP_PDATA_SZ); diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index aefc967fc003..528691d5cb51 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c @@ -67,8 +67,8 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p) static struct plat_serial8250_port serial_platform_data[] = { { - .membase = (char*)IO_ADDRESS(OMAP_UART1_BASE), - .mapbase = (unsigned long)OMAP_UART1_BASE, + .membase = IO_ADDRESS(OMAP_UART1_BASE), + .mapbase = OMAP_UART1_BASE, .irq = INT_UART1, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, @@ -76,8 +76,8 @@ static struct plat_serial8250_port serial_platform_data[] = { .uartclk = OMAP16XX_BASE_BAUD * 16, }, { - .membase = (char*)IO_ADDRESS(OMAP_UART2_BASE), - .mapbase = (unsigned long)OMAP_UART2_BASE, + .membase = IO_ADDRESS(OMAP_UART2_BASE), + .mapbase = OMAP_UART2_BASE, .irq = INT_UART2, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, @@ -85,8 +85,8 @@ static struct plat_serial8250_port serial_platform_data[] = { .uartclk = OMAP16XX_BASE_BAUD * 16, }, { - .membase = (char*)IO_ADDRESS(OMAP_UART3_BASE), - .mapbase = (unsigned long)OMAP_UART3_BASE, + .membase = IO_ADDRESS(OMAP_UART3_BASE), + .mapbase = OMAP_UART3_BASE, .irq = INT_UART3, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 7069c9d536f1..4832fcc7d04a 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -15,8 +15,17 @@ config ARCH_OMAP2430 bool "OMAP2430 support" depends on ARCH_OMAP24XX +config ARCH_OMAP34XX + bool "OMAP34xx Based System" + depends on ARCH_OMAP3 + +config ARCH_OMAP3430 + bool "OMAP3430 support" + depends on ARCH_OMAP3 && ARCH_OMAP34XX + select ARCH_OMAP_OTG + comment "OMAP Board Type" - depends on ARCH_OMAP2 + depends on ARCH_OMAP2 || ARCH_OMAP3 config MACH_OMAP_GENERIC bool "Generic OMAP board" @@ -35,3 +44,14 @@ config MACH_OMAP_2430SDP bool "OMAP 2430 SDP board" depends on ARCH_OMAP2 && ARCH_OMAP24XX +config MACH_OMAP3_BEAGLE + bool "OMAP3 BEAGLE board" + depends on ARCH_OMAP3 && ARCH_OMAP34XX + +config MACH_OMAP_LDP + bool "OMAP3 LDP board" + depends on ARCH_OMAP3 && ARCH_OMAP34XX + +config MACH_OVERO + bool "Gumstix Overo board" + depends on ARCH_OMAP3 && ARCH_OMAP34XX diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 93ee990618ef..c69392372c99 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -4,16 +4,21 @@ # Common support obj-y := irq.o id.o io.o memory.o control.o prcm.o clock.o mux.o \ - devices.o serial.o gpmc.o timer-gp.o + devices.o serial.o gpmc.o timer-gp.o powerdomain.o \ + clockdomain.o obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o # Functions loaded to SRAM obj-$(CONFIG_ARCH_OMAP2420) += sram242x.o obj-$(CONFIG_ARCH_OMAP2430) += sram243x.o +obj-$(CONFIG_ARCH_OMAP3) += sram34xx.o # Power Management -obj-$(CONFIG_PM) += pm.o sleep.o +ifeq ($(CONFIG_PM),y) +obj-y += pm.o +obj-$(CONFIG_ARCH_OMAP24XX) += sleep24xx.o +endif # Clock framework obj-$(CONFIG_ARCH_OMAP2) += clock24xx.o @@ -24,4 +29,7 @@ obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o obj-$(CONFIG_MACH_OMAP_2430SDP) += board-2430sdp.o obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o +obj-$(CONFIG_MACH_OMAP3_BEAGLE) += board-omap3beagle.o +obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o +obj-$(CONFIG_MACH_OVERO) += board-overo.o diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c new file mode 100644 index 000000000000..1ea59986aa7a --- /dev/null +++ b/arch/arm/mach-omap2/board-ldp.c @@ -0,0 +1,86 @@ +/* + * linux/arch/arm/mach-omap2/board-ldp.c + * + * Copyright (C) 2008 Texas Instruments Inc. + * Nishant Kamat <nskamat@ti.com> + * + * Modified from mach-omap2/board-3430sdp.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/delay.h> +#include <linux/input.h> +#include <linux/workqueue.h> +#include <linux/err.h> +#include <linux/clk.h> +#include <linux/spi/spi.h> +#include <linux/spi/ads7846.h> + +#include <mach/hardware.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> + +#include <mach/board-ldp.h> +#include <mach/mcspi.h> +#include <mach/gpio.h> +#include <mach/board.h> +#include <mach/common.h> +#include <mach/gpmc.h> + +#include <asm/io.h> +#include <asm/delay.h> +#include <mach/control.h> + +static void __init omap_ldp_init_irq(void) +{ + omap2_init_common_hw(); + omap_init_irq(); + omap_gpio_init(); +} + +static struct omap_uart_config ldp_uart_config __initdata = { + .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), +}; + +static struct omap_board_config_kernel ldp_config[] __initdata = { + { OMAP_TAG_UART, &ldp_uart_config }, +}; + +static int __init omap_i2c_init(void) +{ + omap_register_i2c_bus(1, 2600, NULL, 0); + omap_register_i2c_bus(2, 400, NULL, 0); + omap_register_i2c_bus(3, 400, NULL, 0); + return 0; +} + +static void __init omap_ldp_init(void) +{ + omap_i2c_init(); + omap_board_config = ldp_config; + omap_board_config_size = ARRAY_SIZE(ldp_config); + omap_serial_init(); +} + +static void __init omap_ldp_map_io(void) +{ + omap2_set_globals_343x(); + omap2_map_common_io(); +} + +MACHINE_START(OMAP_LDP, "OMAP LDP board") + .phys_io = 0x48000000, + .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, + .boot_params = 0x80000100, + .map_io = omap_ldp_map_io, + .init_irq = omap_ldp_init_irq, + .init_machine = omap_ldp_init, + .timer = &omap_timer, +MACHINE_END diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c new file mode 100644 index 000000000000..baa79674e9d5 --- /dev/null +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -0,0 +1,244 @@ +/* + * linux/arch/arm/mach-omap2/board-omap3beagle.c + * + * Copyright (C) 2008 Texas Instruments + * + * Modified from mach-omap2/board-3430sdp.c + * + * Initial code: Syed Mohammed Khasim + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/delay.h> +#include <linux/err.h> +#include <linux/clk.h> +#include <linux/io.h> +#include <linux/leds.h> +#include <linux/gpio.h> +#include <linux/input.h> +#include <linux/gpio_keys.h> + +#include <linux/mtd/mtd.h> +#include <linux/mtd/partitions.h> +#include <linux/mtd/nand.h> + +#include <mach/hardware.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <asm/mach/flash.h> + +#include <mach/board.h> +#include <mach/common.h> +#include <mach/gpmc.h> +#include <mach/nand.h> + + +#define GPMC_CS0_BASE 0x60 +#define GPMC_CS_SIZE 0x30 + +#define NAND_BLOCK_SIZE SZ_128K + +static struct mtd_partition omap3beagle_nand_partitions[] = { + /* All the partition sizes are listed in terms of NAND block size */ + { + .name = "X-Loader", + .offset = 0, + .size = 4 * NAND_BLOCK_SIZE, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + { + .name = "U-Boot", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ + .size = 15 * NAND_BLOCK_SIZE, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + { + .name = "U-Boot Env", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */ + .size = 1 * NAND_BLOCK_SIZE, + }, + { + .name = "Kernel", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ + .size = 32 * NAND_BLOCK_SIZE, + }, + { + .name = "File System", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */ + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct omap_nand_platform_data omap3beagle_nand_data = { + .options = NAND_BUSWIDTH_16, + .parts = omap3beagle_nand_partitions, + .nr_parts = ARRAY_SIZE(omap3beagle_nand_partitions), + .dma_channel = -1, /* disable DMA in OMAP NAND driver */ + .nand_setup = NULL, + .dev_ready = NULL, +}; + +static struct resource omap3beagle_nand_resource = { + .flags = IORESOURCE_MEM, +}; + +static struct platform_device omap3beagle_nand_device = { + .name = "omap2-nand", + .id = -1, + .dev = { + .platform_data = &omap3beagle_nand_data, + }, + .num_resources = 1, + .resource = &omap3beagle_nand_resource, +}; + +static struct omap_uart_config omap3_beagle_uart_config __initdata = { + .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), +}; + +static void __init omap3_beagle_init_irq(void) +{ + omap2_init_common_hw(); + omap_init_irq(); + omap_gpio_init(); +} + +static struct platform_device omap3_beagle_lcd_device = { + .name = "omap3beagle_lcd", + .id = -1, +}; + +static struct omap_lcd_config omap3_beagle_lcd_config __initdata = { + .ctrl_name = "internal", +}; + +static struct gpio_led gpio_leds[] = { + { + .name = "beagleboard::usr0", + .default_trigger = "heartbeat", + .gpio = 150, + }, + { + .name = "beagleboard::usr1", + .default_trigger = "mmc0", + .gpio = 149, + }, +}; + +static struct gpio_led_platform_data gpio_led_info = { + .leds = gpio_leds, + .num_leds = ARRAY_SIZE(gpio_leds), +}; + +static struct platform_device leds_gpio = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &gpio_led_info, + }, +}; + +static struct gpio_keys_button gpio_buttons[] = { + { + .code = BTN_EXTRA, + .gpio = 7, + .desc = "user", + .wakeup = 1, + }, +}; + +static struct gpio_keys_platform_data gpio_key_info = { + .buttons = gpio_buttons, + .nbuttons = ARRAY_SIZE(gpio_buttons), +}; + +static struct platform_device keys_gpio = { + .name = "gpio-keys", + .id = -1, + .dev = { + .platform_data = &gpio_key_info, + }, +}; + +static struct omap_board_config_kernel omap3_beagle_config[] __initdata = { + { OMAP_TAG_UART, &omap3_beagle_uart_config }, + { OMAP_TAG_LCD, &omap3_beagle_lcd_config }, +}; + +static struct platform_device *omap3_beagle_devices[] __initdata = { + &omap3_beagle_lcd_device, + &leds_gpio, + &keys_gpio, +}; + +static void __init omap3beagle_flash_init(void) +{ + u8 cs = 0; + u8 nandcs = GPMC_CS_NUM + 1; + + u32 gpmc_base_add = OMAP34XX_GPMC_VIRT; + + /* find out the chip-select on which NAND exists */ + while (cs < GPMC_CS_NUM) { + u32 ret = 0; + ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); + + if ((ret & 0xC00) == 0x800) { + printk(KERN_INFO "Found NAND on CS%d\n", cs); + if (nandcs > GPMC_CS_NUM) + nandcs = cs; + } + cs++; + } + + if (nandcs > GPMC_CS_NUM) { + printk(KERN_INFO "NAND: Unable to find configuration " + "in GPMC\n "); + return; + } + + if (nandcs < GPMC_CS_NUM) { + omap3beagle_nand_data.cs = nandcs; + omap3beagle_nand_data.gpmc_cs_baseaddr = (void *) + (gpmc_base_add + GPMC_CS0_BASE + nandcs * GPMC_CS_SIZE); + omap3beagle_nand_data.gpmc_baseaddr = (void *) (gpmc_base_add); + + printk(KERN_INFO "Registering NAND on CS%d\n", nandcs); + if (platform_device_register(&omap3beagle_nand_device) < 0) + printk(KERN_ERR "Unable to register NAND device\n"); + } +} + +static void __init omap3_beagle_init(void) +{ + platform_add_devices(omap3_beagle_devices, + ARRAY_SIZE(omap3_beagle_devices)); + omap_board_config = omap3_beagle_config; + omap_board_config_size = ARRAY_SIZE(omap3_beagle_config); + omap_serial_init(); + omap3beagle_flash_init(); +} + +static void __init omap3_beagle_map_io(void) +{ + omap2_set_globals_343x(); + omap2_map_common_io(); +} + +MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") + /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ + .phys_io = 0x48000000, + .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, + .boot_params = 0x80000100, + .map_io = omap3_beagle_map_io, + .init_irq = omap3_beagle_init_irq, + .init_machine = omap3_beagle_init, + .timer = &omap_timer, +MACHINE_END diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c new file mode 100644 index 000000000000..e09aa59a399c --- /dev/null +++ b/arch/arm/mach-omap2/board-overo.c @@ -0,0 +1,242 @@ +/* + * board-overo.c (Gumstix Overo) + * + * Initial code: Steve Sakoman <steve@sakoman.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#include <linux/clk.h> +#include <linux/delay.h> +#include <linux/err.h> +#include <linux/init.h> +#include <linux/io.h> +#include <linux/kernel.h> +#include <linux/platform_device.h> + +#include <linux/mtd/mtd.h> +#include <linux/mtd/nand.h> +#include <linux/mtd/partitions.h> + +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/flash.h> +#include <asm/mach/map.h> + +#include <mach/board-overo.h> +#include <mach/board.h> +#include <mach/common.h> +#include <mach/gpio.h> +#include <mach/gpmc.h> +#include <mach/hardware.h> +#include <mach/nand.h> + +#define NAND_BLOCK_SIZE SZ_128K +#define GPMC_CS0_BASE 0x60 +#define GPMC_CS_SIZE 0x30 + +static struct mtd_partition overo_nand_partitions[] = { + { + .name = "xloader", + .offset = 0, /* Offset = 0x00000 */ + .size = 4 * NAND_BLOCK_SIZE, + .mask_flags = MTD_WRITEABLE + }, + { + .name = "uboot", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ + .size = 14 * NAND_BLOCK_SIZE, + }, + { + .name = "uboot environment", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x240000 */ + .size = 2 * NAND_BLOCK_SIZE, + }, + { + .name = "linux", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */ + .size = 32 * NAND_BLOCK_SIZE, + }, + { + .name = "rootfs", + .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */ + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct omap_nand_platform_data overo_nand_data = { + .parts = overo_nand_partitions, + .nr_parts = ARRAY_SIZE(overo_nand_partitions), + .dma_channel = -1, /* disable DMA in OMAP NAND driver */ +}; + +static struct resource overo_nand_resource = { + .flags = IORESOURCE_MEM, +}; + +static struct platform_device overo_nand_device = { + .name = "omap2-nand", + .id = -1, + .dev = { + .platform_data = &overo_nand_data, + }, + .num_resources = 1, + .resource = &overo_nand_resource, +}; + + +static void __init overo_flash_init(void) +{ + u8 cs = 0; + u8 nandcs = GPMC_CS_NUM + 1; + + u32 gpmc_base_add = OMAP34XX_GPMC_VIRT; + + /* find out the chip-select on which NAND exists */ + while (cs < GPMC_CS_NUM) { + u32 ret = 0; + ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); + + if ((ret & 0xC00) == 0x800) { + printk(KERN_INFO "Found NAND on CS%d\n", cs); + if (nandcs > GPMC_CS_NUM) + nandcs = cs; + } + cs++; + } + + if (nandcs > GPMC_CS_NUM) { + printk(KERN_INFO "NAND: Unable to find configuration " + "in GPMC\n "); + return; + } + + if (nandcs < GPMC_CS_NUM) { + overo_nand_data.cs = nandcs; + overo_nand_data.gpmc_cs_baseaddr = (void *) + (gpmc_base_add + GPMC_CS0_BASE + nandcs * GPMC_CS_SIZE); + overo_nand_data.gpmc_baseaddr = (void *) (gpmc_base_add); + + printk(KERN_INFO "Registering NAND on CS%d\n", nandcs); + if (platform_device_register(&overo_nand_device) < 0) + printk(KERN_ERR "Unable to register NAND device\n"); + } +} +static struct omap_uart_config overo_uart_config __initdata = { + .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), +}; + +static int __init overo_i2c_init(void) +{ + /* i2c2 pins are used for gpio */ + omap_register_i2c_bus(3, 400, NULL, 0); + return 0; +} + +static void __init overo_init_irq(void) +{ + omap2_init_common_hw(); + omap_init_irq(); + omap_gpio_init(); +} + +static struct platform_device overo_lcd_device = { + .name = "overo_lcd", + .id = -1, +}; + +static struct omap_lcd_config overo_lcd_config __initdata = { + .ctrl_name = "internal", +}; + +static struct omap_board_config_kernel overo_config[] __initdata = { + { OMAP_TAG_UART, &overo_uart_config }, + { OMAP_TAG_LCD, &overo_lcd_config }, +}; + +static struct platform_device *overo_devices[] __initdata = { + &overo_lcd_device, +}; + +static void __init overo_init(void) +{ + overo_i2c_init(); + platform_add_devices(overo_devices, ARRAY_SIZE(overo_devices)); + omap_board_config = overo_config; + omap_board_config_size = ARRAY_SIZE(overo_config); + omap_serial_init(); + overo_flash_init(); + + if ((gpio_request(OVERO_GPIO_W2W_NRESET, + "OVERO_GPIO_W2W_NRESET") == 0) && + (gpio_direction_output(OVERO_GPIO_W2W_NRESET, 1) == 0)) { + gpio_export(OVERO_GPIO_W2W_NRESET, 0); + gpio_set_value(OVERO_GPIO_W2W_NRESET, 0); + udelay(10); + gpio_set_value(OVERO_GPIO_W2W_NRESET, 1); + } else { + printk(KERN_ERR "could not obtain gpio for " + "OVERO_GPIO_W2W_NRESET\n"); + } + + if ((gpio_request(OVERO_GPIO_BT_XGATE, "OVERO_GPIO_BT_XGATE") == 0) && + (gpio_direction_output(OVERO_GPIO_BT_XGATE, 0) == 0)) + gpio_export(OVERO_GPIO_BT_XGATE, 0); + else + printk(KERN_ERR "could not obtain gpio for OVERO_GPIO_BT_XGATE\n"); + + if ((gpio_request(OVERO_GPIO_BT_NRESET, "OVERO_GPIO_BT_NRESET") == 0) && + (gpio_direction_output(OVERO_GPIO_BT_NRESET, 1) == 0)) { + gpio_export(OVERO_GPIO_BT_NRESET, 0); + gpio_set_value(OVERO_GPIO_BT_NRESET, 0); + mdelay(6); + gpio_set_value(OVERO_GPIO_BT_NRESET, 1); + } else { + printk(KERN_ERR "could not obtain gpio for " + "OVERO_GPIO_BT_NRESET\n"); + } + + if ((gpio_request(OVERO_GPIO_USBH_CPEN, "OVERO_GPIO_USBH_CPEN") == 0) && + (gpio_direction_output(OVERO_GPIO_USBH_CPEN, 1) == 0)) + gpio_export(OVERO_GPIO_USBH_CPEN, 0); + else + printk(KERN_ERR "could not obtain gpio for " + "OVERO_GPIO_USBH_CPEN\n"); + + if ((gpio_request(OVERO_GPIO_USBH_NRESET, + "OVERO_GPIO_USBH_NRESET") == 0) && + (gpio_direction_output(OVERO_GPIO_USBH_NRESET, 1) == 0)) + gpio_export(OVERO_GPIO_USBH_NRESET, 0); + else + printk(KERN_ERR "could not obtain gpio for " + "OVERO_GPIO_USBH_NRESET\n"); +} + +static void __init overo_map_io(void) +{ + omap2_set_globals_343x(); + omap2_map_common_io(); +} + +MACHINE_START(OVERO, "Gumstix Overo") + .phys_io = 0x48000000, + .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, + .boot_params = 0x80000100, + .map_io = overo_map_io, + .init_irq = overo_init_irq, + .init_machine = overo_init, + .timer = &omap_timer, +MACHINE_END diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 97cde3d3611d..ad721e0cbf7a 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -25,6 +25,7 @@ #include <linux/bitops.h> #include <mach/clock.h> +#include <mach/clockdomain.h> #include <mach/sram.h> #include <mach/cpu.h> #include <asm/div64.h> @@ -61,10 +62,36 @@ u8 cpu_mask; /*------------------------------------------------------------------------- - * Omap2 specific clock functions + * OMAP2/3 specific clock functions *-------------------------------------------------------------------------*/ /** + * omap2_init_clk_clkdm - look up a clockdomain name, store pointer in clk + * @clk: OMAP clock struct ptr to use + * + * Convert a clockdomain name stored in a struct clk 'clk' into a + * clockdomain pointer, and save it into the struct clk. Intended to be + * called during clk_register(). No return value. + */ +void omap2_init_clk_clkdm(struct clk *clk) +{ + struct clockdomain *clkdm; + + if (!clk->clkdm_name) + return; + + clkdm = clkdm_lookup(clk->clkdm_name); + if (clkdm) { + pr_debug("clock: associated clk %s to clkdm %s\n", + clk->name, clk->clkdm_name); + clk->clkdm = clkdm; + } else { + pr_debug("clock: could not associate clk %s to " + "clkdm %s\n", clk->name, clk->clkdm_name); + } +} + +/** * omap2_init_clksel_parent - set a clksel clk's parent field from the hardware * @clk: OMAP clock struct ptr to use * @@ -250,7 +277,7 @@ int _omap2_clk_enable(struct clk *clk) if (clk->enable) return clk->enable(clk); - if (unlikely(clk->enable_reg == 0)) { + if (unlikely(clk->enable_reg == NULL)) { printk(KERN_ERR "clock.c: Enable for %s without enable code\n", clk->name); return 0; /* REVISIT: -EINVAL */ @@ -282,7 +309,7 @@ void _omap2_clk_disable(struct clk *clk) return; } - if (clk->enable_reg == 0) { + if (clk->enable_reg == NULL) { /* * 'Independent' here refers to a clock which is not * controlled by its parent. @@ -307,6 +334,9 @@ void omap2_clk_disable(struct clk *clk) _omap2_clk_disable(clk); if (likely((u32)clk->parent)) omap2_clk_disable(clk->parent); + if (clk->clkdm) + omap2_clkdm_clk_disable(clk->clkdm, clk); + } } @@ -323,11 +353,19 @@ int omap2_clk_enable(struct clk *clk) return ret; } + if (clk->clkdm) + omap2_clkdm_clk_enable(clk->clkdm, clk); + ret = _omap2_clk_enable(clk); - if (unlikely(ret != 0) && clk->parent) { - omap2_clk_disable(clk->parent); - clk->usecount--; + if (unlikely(ret != 0)) { + if (clk->clkdm) + omap2_clkdm_clk_disable(clk->clkdm, clk); + + if (clk->parent) { + omap2_clk_disable(clk->parent); + clk->usecount--; + } } } @@ -476,7 +514,7 @@ long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate) /* Given a clock and a rate apply a clock specific rounding function */ long omap2_clk_round_rate(struct clk *clk, unsigned long rate) { - if (clk->round_rate != 0) + if (clk->round_rate != NULL) return clk->round_rate(clk, rate); if (clk->flags & RATE_FIXED) @@ -565,7 +603,7 @@ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div) */ void __iomem *omap2_get_clksel(struct clk *clk, u32 *field_mask) { - if (unlikely((clk->clksel_reg == 0) || (clk->clksel_mask == 0))) + if (unlikely((clk->clksel_reg == NULL) || (clk->clksel_mask == NULL))) return NULL; *field_mask = clk->clksel_mask; @@ -585,7 +623,7 @@ u32 omap2_clksel_get_divisor(struct clk *clk) void __iomem *div_addr; div_addr = omap2_get_clksel(clk, &field_mask); - if (div_addr == 0) + if (div_addr == NULL) return 0; field_val = __raw_readl(div_addr) & field_mask; @@ -604,7 +642,7 @@ int omap2_clksel_set_rate(struct clk *clk, unsigned long rate) return -EINVAL; div_addr = omap2_get_clksel(clk, &field_mask); - if (div_addr == 0) + if (div_addr == NULL) return -EINVAL; field_val = omap2_divisor_to_clksel(clk, new_div); @@ -642,7 +680,7 @@ int omap2_clk_set_rate(struct clk *clk, unsigned long rate) return -EINVAL; /* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */ - if (clk->set_rate != 0) + if (clk->set_rate != NULL) ret = clk->set_rate(clk, rate); if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES))) @@ -663,7 +701,7 @@ static u32 omap2_clksel_get_src_field(void __iomem **src_addr, const struct clksel_rate *clkr; *parent_div = 0; - *src_addr = 0; + *src_addr = NULL; clks = omap2_get_clksel_by_parent(clk, src_clk); if (clks == NULL) @@ -704,7 +742,7 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent) field_val = omap2_clksel_get_src_field(&src_addr, new_parent, &field_mask, clk, &parent_div); - if (src_addr == 0) + if (src_addr == NULL) return -EINVAL; if (clk->usecount > 0) diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index 626e5fa93b6a..1fb330e0847d 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h @@ -21,6 +21,7 @@ /* The maximum error between a target DPLL rate and the rounded rate in Hz */ #define DEFAULT_DPLL_RATE_TOLERANCE 50000 +int omap2_clk_init(void); int omap2_clk_enable(struct clk *clk); void omap2_clk_disable(struct clk *clk); long omap2_clk_round_rate(struct clk *clk, unsigned long rate); @@ -36,6 +37,7 @@ void omap2_clk_disable_unused(struct clk *clk); #endif void omap2_clksel_recalc(struct clk *clk); +void omap2_init_clk_clkdm(struct clk *clk); void omap2_init_clksel_parent(struct clk *clk); u32 omap2_clksel_get_divisor(struct clk *clk); u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate, diff --git a/arch/arm/mach-omap2/clock24xx.h b/arch/arm/mach-omap2/clock24xx.h index be4e25554e05..242a19d86ccd 100644 --- a/arch/arm/mach-omap2/clock24xx.h +++ b/arch/arm/mach-omap2/clock24xx.h @@ -626,6 +626,7 @@ static struct clk func_32k_ck = { .rate = 32000, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES, + .clkdm_name = "wkup_clkdm", .recalc = &propagate_rate, }; @@ -634,17 +635,19 @@ static struct clk osc_ck = { /* (*12, *13, 19.2, *26, 38.4)MHz */ .name = "osc_ck", .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_PROPAGATES, + .clkdm_name = "wkup_clkdm", .enable = &omap2_enable_osc_ck, .disable = &omap2_disable_osc_ck, .recalc = &omap2_osc_clk_recalc, }; -/* With out modem likely 12MHz, with modem likely 13MHz */ +/* Without modem likely 12MHz, with modem likely 13MHz */ static struct clk sys_ck = { /* (*12, *13, 19.2, 26, 38.4)MHz */ .name = "sys_ck", /* ~ ref_clk also */ .parent = &osc_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED | RATE_PROPAGATES, + .clkdm_name = "wkup_clkdm", .recalc = &omap2_sys_clk_recalc, }; @@ -653,6 +656,7 @@ static struct clk alt_ck = { /* Typical 54M or 48M, may not exist */ .rate = 54000000, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES, + .clkdm_name = "wkup_clkdm", .recalc = &propagate_rate, }; @@ -684,6 +688,7 @@ static struct clk dpll_ck = { .dpll_data = &dpll_dd, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_PROPAGATES | ALWAYS_ENABLED, + .clkdm_name = "wkup_clkdm", .recalc = &omap2_dpllcore_recalc, .set_rate = &omap2_reprogram_dpllcore, }; @@ -694,6 +699,7 @@ static struct clk apll96_ck = { .rate = 96000000, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT, + .clkdm_name = "wkup_clkdm", .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), .enable_bit = OMAP24XX_EN_96M_PLL_SHIFT, .enable = &omap2_clk_fixed_enable, @@ -707,6 +713,7 @@ static struct clk apll54_ck = { .rate = 54000000, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT, + .clkdm_name = "wkup_clkdm", .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), .enable_bit = OMAP24XX_EN_54M_PLL_SHIFT, .enable = &omap2_clk_fixed_enable, @@ -741,6 +748,7 @@ static struct clk func_54m_ck = { .parent = &apll54_ck, /* can also be alt_clk */ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "wkup_clkdm", .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), .clksel_mask = OMAP24XX_54M_SOURCE, @@ -753,6 +761,7 @@ static struct clk core_ck = { .parent = &dpll_ck, /* can also be 32k */ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED | RATE_PROPAGATES, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -779,6 +788,7 @@ static struct clk func_96m_ck = { .parent = &apll96_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "wkup_clkdm", .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), .clksel_mask = OMAP2430_96M_SOURCE, @@ -811,6 +821,7 @@ static struct clk func_48m_ck = { .parent = &apll96_ck, /* 96M or Alt */ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "wkup_clkdm", .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), .clksel_mask = OMAP24XX_48M_SOURCE, @@ -826,6 +837,7 @@ static struct clk func_12m_ck = { .fixed_div = 4, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "wkup_clkdm", .recalc = &omap2_fixed_divisor_recalc, }; @@ -878,6 +890,7 @@ static struct clk sys_clkout_src = { .parent = &func_54m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | RATE_PROPAGATES, + .clkdm_name = "wkup_clkdm", .enable_reg = OMAP24XX_PRCM_CLKOUT_CTRL, .enable_bit = OMAP24XX_CLKOUT_EN_SHIFT, .init = &omap2_init_clksel_parent, @@ -908,6 +921,7 @@ static struct clk sys_clkout = { .parent = &sys_clkout_src, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | PARENT_CONTROLS_CLOCK, + .clkdm_name = "wkup_clkdm", .clksel_reg = OMAP24XX_PRCM_CLKOUT_CTRL, .clksel_mask = OMAP24XX_CLKOUT_DIV_MASK, .clksel = sys_clkout_clksel, @@ -921,6 +935,7 @@ static struct clk sys_clkout2_src = { .name = "sys_clkout2_src", .parent = &func_54m_ck, .flags = CLOCK_IN_OMAP242X | RATE_PROPAGATES, + .clkdm_name = "wkup_clkdm", .enable_reg = OMAP24XX_PRCM_CLKOUT_CTRL, .enable_bit = OMAP2420_CLKOUT2_EN_SHIFT, .init = &omap2_init_clksel_parent, @@ -942,6 +957,7 @@ static struct clk sys_clkout2 = { .name = "sys_clkout2", .parent = &sys_clkout2_src, .flags = CLOCK_IN_OMAP242X | PARENT_CONTROLS_CLOCK, + .clkdm_name = "wkup_clkdm", .clksel_reg = OMAP24XX_PRCM_CLKOUT_CTRL, .clksel_mask = OMAP2420_CLKOUT2_DIV_MASK, .clksel = sys_clkout2_clksel, @@ -954,6 +970,7 @@ static struct clk emul_ck = { .name = "emul_ck", .parent = &func_54m_ck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "wkup_clkdm", .enable_reg = OMAP24XX_PRCM_CLKEMUL_CTRL, .enable_bit = OMAP24XX_EMULATION_EN_SHIFT, .recalc = &followparent_recalc, @@ -990,12 +1007,13 @@ static struct clk mpu_ck = { /* Control cpu */ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED | DELAYED_APP | CONFIG_PARTICIPANT | RATE_PROPAGATES, + .clkdm_name = "mpu_clkdm", .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(MPU_MOD, CM_CLKSEL), .clksel_mask = OMAP24XX_CLKSEL_MPU_MASK, .clksel = mpu_clksel, .recalc = &omap2_clksel_recalc, - .round_rate = &omap2_clksel_round_rate, + .round_rate = &omap2_clksel_round_rate, .set_rate = &omap2_clksel_set_rate }; @@ -1031,6 +1049,7 @@ static struct clk dsp_fck = { .parent = &core_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | DELAYED_APP | CONFIG_PARTICIPANT | RATE_PROPAGATES, + .clkdm_name = "dsp_clkdm", .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), .enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT, .clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL), @@ -1054,10 +1073,7 @@ static const struct clksel dsp_irate_ick_clksel[] = { { .parent = NULL } }; -/* - * This clock does not exist as such in the TRM, but is added to - * separate source selection from XXX - */ +/* This clock does not exist as such in the TRM. */ static struct clk dsp_irate_ick = { .name = "dsp_irate_ick", .parent = &dsp_fck, @@ -1089,11 +1105,17 @@ static struct clk iva2_1_ick = { .enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT, }; +/* + * The IVA1 is an ARM7 core on the 2420 that has nothing to do with + * the C54x, but which is contained in the DSP powerdomain. Does not + * exist on later OMAPs. + */ static struct clk iva1_ifck = { .name = "iva1_ifck", .parent = &core_ck, .flags = CLOCK_IN_OMAP242X | CONFIG_PARTICIPANT | RATE_PROPAGATES | DELAYED_APP, + .clkdm_name = "iva1_clkdm", .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), .enable_bit = OMAP2420_EN_IVA_COP_SHIFT, .clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL), @@ -1109,6 +1131,7 @@ static struct clk iva1_mpu_int_ifck = { .name = "iva1_mpu_int_ifck", .parent = &iva1_ifck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "iva1_clkdm", .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), .enable_bit = OMAP2420_EN_IVA_MPU_SHIFT, .fixed_div = 2, @@ -1156,6 +1179,7 @@ static struct clk core_l3_ck = { /* Used for ick and fck, interconnect */ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED | DELAYED_APP | CONFIG_PARTICIPANT | RATE_PROPAGATES, + .clkdm_name = "core_l3_clkdm", .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1), .clksel_mask = OMAP24XX_CLKSEL_L3_MASK, .clksel = core_l3_clksel, @@ -1177,11 +1201,13 @@ static const struct clksel usb_l4_ick_clksel[] = { { .parent = NULL }, }; +/* It is unclear from TRM whether usb_l4_ick is really in L3 or L4 clkdm */ static struct clk usb_l4_ick = { /* FS-USB interface clock */ .name = "usb_l4_ick", .parent = &core_l3_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | DELAYED_APP | CONFIG_PARTICIPANT, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP24XX_EN_USB_SHIFT, .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1), @@ -1193,10 +1219,42 @@ static struct clk usb_l4_ick = { /* FS-USB interface clock */ }; /* + * L4 clock management domain + * + * This domain contains lots of interface clocks from the L4 interface, some + * functional clocks. Fixed APLL functional source clocks are managed in + * this domain. + */ +static const struct clksel_rate l4_core_l3_rates[] = { + { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE }, + { .div = 2, .val = 2, .flags = RATE_IN_24XX }, + { .div = 0 } +}; + +static const struct clksel l4_clksel[] = { + { .parent = &core_l3_ck, .rates = l4_core_l3_rates }, + { .parent = NULL } +}; + +static struct clk l4_ck = { /* used both as an ick and fck */ + .name = "l4_ck", + .parent = &core_l3_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + ALWAYS_ENABLED | DELAYED_APP | RATE_PROPAGATES, + .clkdm_name = "core_l4_clkdm", + .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1), + .clksel_mask = OMAP24XX_CLKSEL_L4_MASK, + .clksel = l4_clksel, + .recalc = &omap2_clksel_recalc, + .round_rate = &omap2_clksel_round_rate, + .set_rate = &omap2_clksel_set_rate +}; + +/* * SSI is in L3 management domain, its direct parent is core not l3, * many core power domain entities are grouped into the L3 clock * domain. - * SSI_SSR_FCLK, SSI_SST_FCLK, SSI_L4_CLIK + * SSI_SSR_FCLK, SSI_SST_FCLK, SSI_L4_ICLK * * ssr = core/1/2/3/4/5, sst = 1/2 ssr. */ @@ -1221,6 +1279,7 @@ static struct clk ssi_ssr_sst_fck = { .parent = &core_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | DELAYED_APP, + .clkdm_name = "core_l3_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP24XX_EN_SSI_SHIFT, .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1), @@ -1231,6 +1290,7 @@ static struct clk ssi_ssr_sst_fck = { .set_rate = &omap2_clksel_set_rate }; + /* * GFX clock domain * Clocks: @@ -1254,6 +1314,7 @@ static struct clk gfx_3d_fck = { .name = "gfx_3d_fck", .parent = &core_l3_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "gfx_clkdm", .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), .enable_bit = OMAP24XX_EN_3D_SHIFT, .clksel_reg = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL), @@ -1268,6 +1329,7 @@ static struct clk gfx_2d_fck = { .name = "gfx_2d_fck", .parent = &core_l3_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "gfx_clkdm", .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), .enable_bit = OMAP24XX_EN_2D_SHIFT, .clksel_reg = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL), @@ -1282,6 +1344,7 @@ static struct clk gfx_ick = { .name = "gfx_ick", /* From l3 */ .parent = &core_l3_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "gfx_clkdm", .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN), .enable_bit = OMAP_EN_GFX_SHIFT, .recalc = &followparent_recalc, @@ -1311,6 +1374,7 @@ static struct clk mdm_ick = { /* used both as a ick and fck */ .name = "mdm_ick", .parent = &core_ck, .flags = CLOCK_IN_OMAP243X | DELAYED_APP | CONFIG_PARTICIPANT, + .clkdm_name = "mdm_clkdm", .enable_reg = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_ICLKEN), .enable_bit = OMAP2430_CM_ICLKEN_MDM_EN_MDM_SHIFT, .clksel_reg = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_CLKSEL), @@ -1325,52 +1389,13 @@ static struct clk mdm_osc_ck = { .name = "mdm_osc_ck", .parent = &osc_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "mdm_clkdm", .enable_reg = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_FCLKEN), .enable_bit = OMAP2430_EN_OSC_SHIFT, .recalc = &followparent_recalc, }; /* - * L4 clock management domain - * - * This domain contains lots of interface clocks from the L4 interface, some - * functional clocks. Fixed APLL functional source clocks are managed in - * this domain. - */ -static const struct clksel_rate l4_core_l3_rates[] = { - { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE }, - { .div = 2, .val = 2, .flags = RATE_IN_24XX }, - { .div = 0 } -}; - -static const struct clksel l4_clksel[] = { - { .parent = &core_l3_ck, .rates = l4_core_l3_rates }, - { .parent = NULL } -}; - -static struct clk l4_ck = { /* used both as an ick and fck */ - .name = "l4_ck", - .parent = &core_l3_ck, - .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | - ALWAYS_ENABLED | DELAYED_APP | RATE_PROPAGATES, - .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1), - .clksel_mask = OMAP24XX_CLKSEL_L4_MASK, - .clksel = l4_clksel, - .recalc = &omap2_clksel_recalc, - .round_rate = &omap2_clksel_round_rate, - .set_rate = &omap2_clksel_set_rate -}; - -static struct clk ssi_l4_ick = { - .name = "ssi_l4_ick", - .parent = &l4_ck, - .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, - .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), - .enable_bit = OMAP24XX_EN_SSI_SHIFT, - .recalc = &followparent_recalc, -}; - -/* * DSS clock domain * CLOCKs: * DSS_L4_ICLK, DSS_L3_ICLK, @@ -1409,6 +1434,7 @@ static struct clk dss_ick = { /* Enables both L3,L4 ICLK's */ .name = "dss_ick", .parent = &l4_ck, /* really both l3 and l4 */ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "dss_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_DSS1_SHIFT, .recalc = &followparent_recalc, @@ -1419,6 +1445,7 @@ static struct clk dss1_fck = { .parent = &core_ck, /* Core or sys */ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | DELAYED_APP, + .clkdm_name = "dss_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_DSS1_SHIFT, .init = &omap2_init_clksel_parent, @@ -1451,6 +1478,7 @@ static struct clk dss2_fck = { /* Alt clk used in power management */ .parent = &sys_ck, /* fixed at sys_ck or 48MHz */ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | DELAYED_APP, + .clkdm_name = "dss_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_DSS2_SHIFT, .init = &omap2_init_clksel_parent, @@ -1464,6 +1492,7 @@ static struct clk dss_54m_fck = { /* Alt clk used in power management */ .name = "dss_54m_fck", /* 54m tv clk */ .parent = &func_54m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "dss_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_TV_SHIFT, .recalc = &followparent_recalc, @@ -1491,6 +1520,7 @@ static struct clk gpt1_ick = { .name = "gpt1_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP24XX_EN_GPT1_SHIFT, .recalc = &followparent_recalc, @@ -1500,6 +1530,7 @@ static struct clk gpt1_fck = { .name = "gpt1_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_bit = OMAP24XX_EN_GPT1_SHIFT, .init = &omap2_init_clksel_parent, @@ -1515,6 +1546,7 @@ static struct clk gpt2_ick = { .name = "gpt2_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT2_SHIFT, .recalc = &followparent_recalc, @@ -1524,6 +1556,7 @@ static struct clk gpt2_fck = { .name = "gpt2_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT2_SHIFT, .init = &omap2_init_clksel_parent, @@ -1537,6 +1570,7 @@ static struct clk gpt3_ick = { .name = "gpt3_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT3_SHIFT, .recalc = &followparent_recalc, @@ -1546,6 +1580,7 @@ static struct clk gpt3_fck = { .name = "gpt3_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT3_SHIFT, .init = &omap2_init_clksel_parent, @@ -1559,6 +1594,7 @@ static struct clk gpt4_ick = { .name = "gpt4_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT4_SHIFT, .recalc = &followparent_recalc, @@ -1568,6 +1604,7 @@ static struct clk gpt4_fck = { .name = "gpt4_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT4_SHIFT, .init = &omap2_init_clksel_parent, @@ -1581,6 +1618,7 @@ static struct clk gpt5_ick = { .name = "gpt5_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT5_SHIFT, .recalc = &followparent_recalc, @@ -1590,6 +1628,7 @@ static struct clk gpt5_fck = { .name = "gpt5_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT5_SHIFT, .init = &omap2_init_clksel_parent, @@ -1603,6 +1642,7 @@ static struct clk gpt6_ick = { .name = "gpt6_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT6_SHIFT, .recalc = &followparent_recalc, @@ -1612,6 +1652,7 @@ static struct clk gpt6_fck = { .name = "gpt6_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT6_SHIFT, .init = &omap2_init_clksel_parent, @@ -1634,6 +1675,7 @@ static struct clk gpt7_fck = { .name = "gpt7_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT7_SHIFT, .init = &omap2_init_clksel_parent, @@ -1647,6 +1689,7 @@ static struct clk gpt8_ick = { .name = "gpt8_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT8_SHIFT, .recalc = &followparent_recalc, @@ -1656,6 +1699,7 @@ static struct clk gpt8_fck = { .name = "gpt8_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT8_SHIFT, .init = &omap2_init_clksel_parent, @@ -1669,6 +1713,7 @@ static struct clk gpt9_ick = { .name = "gpt9_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT9_SHIFT, .recalc = &followparent_recalc, @@ -1678,6 +1723,7 @@ static struct clk gpt9_fck = { .name = "gpt9_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT9_SHIFT, .init = &omap2_init_clksel_parent, @@ -1691,6 +1737,7 @@ static struct clk gpt10_ick = { .name = "gpt10_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT10_SHIFT, .recalc = &followparent_recalc, @@ -1700,6 +1747,7 @@ static struct clk gpt10_fck = { .name = "gpt10_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT10_SHIFT, .init = &omap2_init_clksel_parent, @@ -1713,6 +1761,7 @@ static struct clk gpt11_ick = { .name = "gpt11_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT11_SHIFT, .recalc = &followparent_recalc, @@ -1722,6 +1771,7 @@ static struct clk gpt11_fck = { .name = "gpt11_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT11_SHIFT, .init = &omap2_init_clksel_parent, @@ -1735,6 +1785,7 @@ static struct clk gpt12_ick = { .name = "gpt12_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT12_SHIFT, .recalc = &followparent_recalc, @@ -1744,6 +1795,7 @@ static struct clk gpt12_fck = { .name = "gpt12_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT12_SHIFT, .init = &omap2_init_clksel_parent, @@ -1758,6 +1810,7 @@ static struct clk mcbsp1_ick = { .id = 1, .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_MCBSP1_SHIFT, .recalc = &followparent_recalc, @@ -1768,6 +1821,7 @@ static struct clk mcbsp1_fck = { .id = 1, .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_MCBSP1_SHIFT, .recalc = &followparent_recalc, @@ -1778,6 +1832,7 @@ static struct clk mcbsp2_ick = { .id = 2, .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_MCBSP2_SHIFT, .recalc = &followparent_recalc, @@ -1788,6 +1843,7 @@ static struct clk mcbsp2_fck = { .id = 2, .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_MCBSP2_SHIFT, .recalc = &followparent_recalc, @@ -1798,6 +1854,7 @@ static struct clk mcbsp3_ick = { .id = 3, .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_MCBSP3_SHIFT, .recalc = &followparent_recalc, @@ -1808,6 +1865,7 @@ static struct clk mcbsp3_fck = { .id = 3, .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MCBSP3_SHIFT, .recalc = &followparent_recalc, @@ -1818,6 +1876,7 @@ static struct clk mcbsp4_ick = { .id = 4, .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_MCBSP4_SHIFT, .recalc = &followparent_recalc, @@ -1828,6 +1887,7 @@ static struct clk mcbsp4_fck = { .id = 4, .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MCBSP4_SHIFT, .recalc = &followparent_recalc, @@ -1838,6 +1898,7 @@ static struct clk mcbsp5_ick = { .id = 5, .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_MCBSP5_SHIFT, .recalc = &followparent_recalc, @@ -1848,6 +1909,7 @@ static struct clk mcbsp5_fck = { .id = 5, .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MCBSP5_SHIFT, .recalc = &followparent_recalc, @@ -1857,6 +1919,7 @@ static struct clk mcspi1_ick = { .name = "mcspi_ick", .id = 1, .parent = &l4_ck, + .clkdm_name = "core_l4_clkdm", .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_MCSPI1_SHIFT, @@ -1868,6 +1931,7 @@ static struct clk mcspi1_fck = { .id = 1, .parent = &func_48m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_MCSPI1_SHIFT, .recalc = &followparent_recalc, @@ -1878,6 +1942,7 @@ static struct clk mcspi2_ick = { .id = 2, .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_MCSPI2_SHIFT, .recalc = &followparent_recalc, @@ -1888,6 +1953,7 @@ static struct clk mcspi2_fck = { .id = 2, .parent = &func_48m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_MCSPI2_SHIFT, .recalc = &followparent_recalc, @@ -1898,6 +1964,7 @@ static struct clk mcspi3_ick = { .id = 3, .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_MCSPI3_SHIFT, .recalc = &followparent_recalc, @@ -1908,6 +1975,7 @@ static struct clk mcspi3_fck = { .id = 3, .parent = &func_48m_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MCSPI3_SHIFT, .recalc = &followparent_recalc, @@ -1917,6 +1985,7 @@ static struct clk uart1_ick = { .name = "uart1_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_UART1_SHIFT, .recalc = &followparent_recalc, @@ -1926,6 +1995,7 @@ static struct clk uart1_fck = { .name = "uart1_fck", .parent = &func_48m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_UART1_SHIFT, .recalc = &followparent_recalc, @@ -1935,6 +2005,7 @@ static struct clk uart2_ick = { .name = "uart2_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_UART2_SHIFT, .recalc = &followparent_recalc, @@ -1944,6 +2015,7 @@ static struct clk uart2_fck = { .name = "uart2_fck", .parent = &func_48m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_UART2_SHIFT, .recalc = &followparent_recalc, @@ -1953,6 +2025,7 @@ static struct clk uart3_ick = { .name = "uart3_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP24XX_EN_UART3_SHIFT, .recalc = &followparent_recalc, @@ -1962,6 +2035,7 @@ static struct clk uart3_fck = { .name = "uart3_fck", .parent = &func_48m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP24XX_EN_UART3_SHIFT, .recalc = &followparent_recalc, @@ -1971,6 +2045,7 @@ static struct clk gpios_ick = { .name = "gpios_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP24XX_EN_GPIOS_SHIFT, .recalc = &followparent_recalc, @@ -1980,6 +2055,7 @@ static struct clk gpios_fck = { .name = "gpios_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "wkup_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_bit = OMAP24XX_EN_GPIOS_SHIFT, .recalc = &followparent_recalc, @@ -1989,6 +2065,7 @@ static struct clk mpu_wdt_ick = { .name = "mpu_wdt_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP24XX_EN_MPU_WDT_SHIFT, .recalc = &followparent_recalc, @@ -1998,6 +2075,7 @@ static struct clk mpu_wdt_fck = { .name = "mpu_wdt_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "wkup_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_bit = OMAP24XX_EN_MPU_WDT_SHIFT, .recalc = &followparent_recalc, @@ -2006,31 +2084,40 @@ static struct clk mpu_wdt_fck = { static struct clk sync_32k_ick = { .name = "sync_32k_ick", .parent = &l4_ck, - .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ENABLE_ON_INIT, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + ENABLE_ON_INIT, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP24XX_EN_32KSYNC_SHIFT, .recalc = &followparent_recalc, }; + static struct clk wdt1_ick = { .name = "wdt1_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP24XX_EN_WDT1_SHIFT, .recalc = &followparent_recalc, }; + static struct clk omapctrl_ick = { .name = "omapctrl_ick", .parent = &l4_ck, - .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ENABLE_ON_INIT, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + ENABLE_ON_INIT, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP24XX_EN_OMAPCTRL_SHIFT, .recalc = &followparent_recalc, }; + static struct clk icr_ick = { .name = "icr_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP2430_EN_ICR_SHIFT, .recalc = &followparent_recalc, @@ -2040,15 +2127,22 @@ static struct clk cam_ick = { .name = "cam_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_CAM_SHIFT, .recalc = &followparent_recalc, }; +/* + * cam_fck controls both CAM_MCLK and CAM_FCLK. It should probably be + * split into two separate clocks, since the parent clocks are different + * and the clockdomains are also different. + */ static struct clk cam_fck = { .name = "cam_fck", .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l3_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_CAM_SHIFT, .recalc = &followparent_recalc, @@ -2058,6 +2152,7 @@ static struct clk mailboxes_ick = { .name = "mailboxes_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_MAILBOXES_SHIFT, .recalc = &followparent_recalc, @@ -2067,6 +2162,7 @@ static struct clk wdt4_ick = { .name = "wdt4_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_WDT4_SHIFT, .recalc = &followparent_recalc, @@ -2076,6 +2172,7 @@ static struct clk wdt4_fck = { .name = "wdt4_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_WDT4_SHIFT, .recalc = &followparent_recalc, @@ -2085,6 +2182,7 @@ static struct clk wdt3_ick = { .name = "wdt3_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP2420_EN_WDT3_SHIFT, .recalc = &followparent_recalc, @@ -2094,6 +2192,7 @@ static struct clk wdt3_fck = { .name = "wdt3_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP2420_EN_WDT3_SHIFT, .recalc = &followparent_recalc, @@ -2103,6 +2202,7 @@ static struct clk mspro_ick = { .name = "mspro_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_MSPRO_SHIFT, .recalc = &followparent_recalc, @@ -2112,6 +2212,7 @@ static struct clk mspro_fck = { .name = "mspro_fck", .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_MSPRO_SHIFT, .recalc = &followparent_recalc, @@ -2121,6 +2222,7 @@ static struct clk mmc_ick = { .name = "mmc_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP2420_EN_MMC_SHIFT, .recalc = &followparent_recalc, @@ -2130,6 +2232,7 @@ static struct clk mmc_fck = { .name = "mmc_fck", .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP2420_EN_MMC_SHIFT, .recalc = &followparent_recalc, @@ -2139,6 +2242,7 @@ static struct clk fac_ick = { .name = "fac_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_FAC_SHIFT, .recalc = &followparent_recalc, @@ -2148,6 +2252,7 @@ static struct clk fac_fck = { .name = "fac_fck", .parent = &func_12m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_FAC_SHIFT, .recalc = &followparent_recalc, @@ -2157,6 +2262,7 @@ static struct clk eac_ick = { .name = "eac_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP2420_EN_EAC_SHIFT, .recalc = &followparent_recalc, @@ -2166,6 +2272,7 @@ static struct clk eac_fck = { .name = "eac_fck", .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP2420_EN_EAC_SHIFT, .recalc = &followparent_recalc, @@ -2175,6 +2282,7 @@ static struct clk hdq_ick = { .name = "hdq_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_HDQ_SHIFT, .recalc = &followparent_recalc, @@ -2184,6 +2292,7 @@ static struct clk hdq_fck = { .name = "hdq_fck", .parent = &func_12m_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_HDQ_SHIFT, .recalc = &followparent_recalc, @@ -2194,6 +2303,7 @@ static struct clk i2c2_ick = { .id = 2, .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP2420_EN_I2C2_SHIFT, .recalc = &followparent_recalc, @@ -2204,6 +2314,7 @@ static struct clk i2c2_fck = { .id = 2, .parent = &func_12m_ck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP2420_EN_I2C2_SHIFT, .recalc = &followparent_recalc, @@ -2214,6 +2325,7 @@ static struct clk i2chs2_fck = { .id = 2, .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_I2CHS2_SHIFT, .recalc = &followparent_recalc, @@ -2224,6 +2336,7 @@ static struct clk i2c1_ick = { .id = 1, .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP2420_EN_I2C1_SHIFT, .recalc = &followparent_recalc, @@ -2234,6 +2347,7 @@ static struct clk i2c1_fck = { .id = 1, .parent = &func_12m_ck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP2420_EN_I2C1_SHIFT, .recalc = &followparent_recalc, @@ -2244,6 +2358,7 @@ static struct clk i2chs1_fck = { .id = 1, .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_I2CHS1_SHIFT, .recalc = &followparent_recalc, @@ -2252,7 +2367,9 @@ static struct clk i2chs1_fck = { static struct clk gpmc_fck = { .name = "gpmc_fck", .parent = &core_l3_ck, - .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ENABLE_ON_INIT, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + ENABLE_ON_INIT, + .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; @@ -2260,6 +2377,7 @@ static struct clk sdma_fck = { .name = "sdma_fck", .parent = &core_l3_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; @@ -2267,6 +2385,7 @@ static struct clk sdma_ick = { .name = "sdma_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, + .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; @@ -2274,6 +2393,7 @@ static struct clk vlynq_ick = { .name = "vlynq_ick", .parent = &core_l3_ck, .flags = CLOCK_IN_OMAP242X, + .clkdm_name = "core_l3_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP2420_EN_VLYNQ_SHIFT, .recalc = &followparent_recalc, @@ -2308,6 +2428,7 @@ static struct clk vlynq_fck = { .name = "vlynq_fck", .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP242X | DELAYED_APP, + .clkdm_name = "core_l3_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP2420_EN_VLYNQ_SHIFT, .init = &omap2_init_clksel_parent, @@ -2323,6 +2444,7 @@ static struct clk sdrc_ick = { .name = "sdrc_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X | ENABLE_ON_INIT, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN3), .enable_bit = OMAP2430_EN_SDRC_SHIFT, .recalc = &followparent_recalc, @@ -2332,6 +2454,7 @@ static struct clk des_ick = { .name = "des_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4), .enable_bit = OMAP24XX_EN_DES_SHIFT, .recalc = &followparent_recalc, @@ -2341,6 +2464,7 @@ static struct clk sha_ick = { .name = "sha_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4), .enable_bit = OMAP24XX_EN_SHA_SHIFT, .recalc = &followparent_recalc, @@ -2350,6 +2474,7 @@ static struct clk rng_ick = { .name = "rng_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4), .enable_bit = OMAP24XX_EN_RNG_SHIFT, .recalc = &followparent_recalc, @@ -2359,6 +2484,7 @@ static struct clk aes_ick = { .name = "aes_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4), .enable_bit = OMAP24XX_EN_AES_SHIFT, .recalc = &followparent_recalc, @@ -2368,6 +2494,7 @@ static struct clk pka_ick = { .name = "pka_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4), .enable_bit = OMAP24XX_EN_PKA_SHIFT, .recalc = &followparent_recalc, @@ -2377,6 +2504,7 @@ static struct clk usb_fck = { .name = "usb_fck", .parent = &func_48m_ck, .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, + .clkdm_name = "core_l3_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP24XX_EN_USB_SHIFT, .recalc = &followparent_recalc, @@ -2386,6 +2514,7 @@ static struct clk usbhs_ick = { .name = "usbhs_ick", .parent = &core_l3_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l3_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_USBHS_SHIFT, .recalc = &followparent_recalc, @@ -2396,6 +2525,7 @@ static struct clk mmchs1_ick = { .id = 1, .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_MMCHS1_SHIFT, .recalc = &followparent_recalc, @@ -2406,6 +2536,7 @@ static struct clk mmchs1_fck = { .id = 1, .parent = &func_96m_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l3_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MMCHS1_SHIFT, .recalc = &followparent_recalc, @@ -2416,6 +2547,7 @@ static struct clk mmchs2_ick = { .id = 2, .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_MMCHS2_SHIFT, .recalc = &followparent_recalc, @@ -2435,6 +2567,7 @@ static struct clk gpio5_ick = { .name = "gpio5_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_GPIO5_SHIFT, .recalc = &followparent_recalc, @@ -2444,6 +2577,7 @@ static struct clk gpio5_fck = { .name = "gpio5_fck", .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_GPIO5_SHIFT, .recalc = &followparent_recalc, @@ -2453,6 +2587,7 @@ static struct clk mdm_intc_ick = { .name = "mdm_intc_ick", .parent = &l4_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_MDM_INTC_SHIFT, .recalc = &followparent_recalc, @@ -2463,6 +2598,7 @@ static struct clk mmchsdb1_fck = { .id = 1, .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MMCHSDB1_SHIFT, .recalc = &followparent_recalc, @@ -2473,6 +2609,7 @@ static struct clk mmchsdb2_fck = { .id = 2, .parent = &func_32k_ck, .flags = CLOCK_IN_OMAP243X, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MMCHSDB2_SHIFT, .recalc = &followparent_recalc, @@ -2551,7 +2688,6 @@ static struct clk *onchip_24xx_clks[] __initdata = { &usb_l4_ick, /* L4 domain clocks */ &l4_ck, /* used as both core_l4 and wu_l4 */ - &ssi_l4_ick, /* virtual meta-group clock */ &virt_prcm_set, /* general l4 interface ck, multi-parent functional clk */ diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index e5b475f21081..084e11082f80 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -62,11 +62,14 @@ static void omap3_dpll_recalc(struct clk *clk) static void _omap3_dpll_write_clken(struct clk *clk, u8 clken_bits) { const struct dpll_data *dd; + u32 v; dd = clk->dpll_data; - cm_rmw_reg_bits(dd->enable_mask, clken_bits << __ffs(dd->enable_mask), - dd->control_reg); + v = __raw_readl(dd->control_reg); + v &= ~dd->enable_mask; + v |= clken_bits << __ffs(dd->enable_mask); + __raw_writel(v, dd->control_reg); } /* _omap3_wait_dpll_status: wait for a DPLL to enter a specific state */ @@ -82,7 +85,7 @@ static int _omap3_wait_dpll_status(struct clk *clk, u8 state) state <<= dd->idlest_bit; idlest_mask = 1 << dd->idlest_bit; - while (((cm_read_reg(dd->idlest_reg) & idlest_mask) != state) && + while (((__raw_readl(dd->idlest_reg) & idlest_mask) != state) && i < MAX_DPLL_WAIT_TRIES) { i++; udelay(1); @@ -285,7 +288,7 @@ static u32 omap3_dpll_autoidle_read(struct clk *clk) dd = clk->dpll_data; - v = cm_read_reg(dd->autoidle_reg); + v = __raw_readl(dd->autoidle_reg); v &= dd->autoidle_mask; v >>= __ffs(dd->autoidle_mask); @@ -304,6 +307,7 @@ static u32 omap3_dpll_autoidle_read(struct clk *clk) static void omap3_dpll_allow_idle(struct clk *clk) { const struct dpll_data *dd; + u32 v; if (!clk || !clk->dpll_data) return; @@ -315,9 +319,10 @@ static void omap3_dpll_allow_idle(struct clk *clk) * by writing 0x5 instead of 0x1. Add some mechanism to * optionally enter this mode. */ - cm_rmw_reg_bits(dd->autoidle_mask, - DPLL_AUTOIDLE_LOW_POWER_STOP << __ffs(dd->autoidle_mask), - dd->autoidle_reg); + v = __raw_readl(dd->autoidle_reg); + v &= ~dd->autoidle_mask; + v |= DPLL_AUTOIDLE_LOW_POWER_STOP << __ffs(dd->autoidle_mask); + __raw_writel(v, dd->autoidle_reg); } /** @@ -329,15 +334,17 @@ static void omap3_dpll_allow_idle(struct clk *clk) static void omap3_dpll_deny_idle(struct clk *clk) { const struct dpll_data *dd; + u32 v; if (!clk || !clk->dpll_data) return; dd = clk->dpll_data; - cm_rmw_reg_bits(dd->autoidle_mask, - DPLL_AUTOIDLE_DISABLE << __ffs(dd->autoidle_mask), - dd->autoidle_reg); + v = __raw_readl(dd->autoidle_reg); + v &= ~dd->autoidle_mask; + v |= DPLL_AUTOIDLE_DISABLE << __ffs(dd->autoidle_mask); + __raw_writel(v, dd->autoidle_reg); } /* Clock control for DPLL outputs */ @@ -482,8 +489,10 @@ int __init omap2_clk_init(void) for (clkp = onchip_34xx_clks; clkp < onchip_34xx_clks + ARRAY_SIZE(onchip_34xx_clks); clkp++) { - if ((*clkp)->flags & cpu_clkflg) + if ((*clkp)->flags & cpu_clkflg) { clk_register(*clkp); + omap2_init_clk_clkdm(*clkp); + } } /* REVISIT: Not yet ready for OMAP3 */ diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index ec664457a11a..c38a8a09692f 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h @@ -478,7 +478,7 @@ static struct clk dpll3_m2_ck = { }; static const struct clksel core_ck_clksel[] = { - { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &sys_ck, .rates = dpll_bypass_rates }, { .parent = &dpll3_m2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -495,7 +495,7 @@ static struct clk core_ck = { }; static const struct clksel dpll3_m2x2_ck_clksel[] = { - { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &sys_ck, .rates = dpll_bypass_rates }, { .parent = &dpll3_x2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -541,7 +541,7 @@ static struct clk dpll3_m3x2_ck = { }; static const struct clksel emu_core_alwon_ck_clksel[] = { - { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &sys_ck, .rates = dpll_bypass_rates }, { .parent = &dpll3_m3x2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -633,7 +633,7 @@ static struct clk dpll4_m2x2_ck = { }; static const struct clksel omap_96m_alwon_fck_clksel[] = { - { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &sys_ck, .rates = dpll_bypass_rates }, { .parent = &dpll4_m2x2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -659,7 +659,7 @@ static struct clk omap_96m_fck = { }; static const struct clksel cm_96m_fck_clksel[] = { - { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &sys_ck, .rates = dpll_bypass_rates }, { .parent = &dpll4_m2x2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -701,7 +701,7 @@ static struct clk dpll4_m3x2_ck = { }; static const struct clksel virt_omap_54m_fck_clksel[] = { - { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &sys_ck, .rates = dpll_bypass_rates }, { .parent = &dpll4_m3x2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -911,7 +911,7 @@ static struct clk dpll5_m2_ck = { }; static const struct clksel omap_120m_fck_clksel[] = { - { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &sys_ck, .rates = dpll_bypass_rates }, { .parent = &dpll5_m2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -919,13 +919,13 @@ static const struct clksel omap_120m_fck_clksel[] = { static struct clk omap_120m_fck = { .name = "omap_120m_fck", .parent = &dpll5_m2_ck, - .init = &omap2_init_clksel_parent, - .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST2), - .clksel_mask = OMAP3430ES2_ST_PERIPH2_CLK_MASK, - .clksel = omap_120m_fck_clksel, + .init = &omap2_init_clksel_parent, + .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST2), + .clksel_mask = OMAP3430ES2_ST_PERIPH2_CLK_MASK, + .clksel = omap_120m_fck_clksel, .flags = CLOCK_IN_OMAP3430ES2 | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, - .recalc = &omap2_clksel_recalc, + .recalc = &omap2_clksel_recalc, }; /* CM EXTERNAL CLOCK OUTPUTS */ @@ -1034,7 +1034,7 @@ static struct clk dpll1_fck = { * called 'dpll1_fck' */ static const struct clksel mpu_clksel[] = { - { .parent = &dpll1_fck, .rates = dpll_bypass_rates }, + { .parent = &dpll1_fck, .rates = dpll_bypass_rates }, { .parent = &dpll1_x2m2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -1048,6 +1048,7 @@ static struct clk mpu_ck = { .clksel = mpu_clksel, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "mpu_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -1075,6 +1076,8 @@ static struct clk arm_fck = { .recalc = &omap2_clksel_recalc, }; +/* XXX What about neon_clkdm ? */ + /* * REVISIT: This clock is never specifically defined in the 3430 TRM, * although it is referenced - so this is a guess @@ -1107,7 +1110,7 @@ static struct clk dpll2_fck = { */ static const struct clksel iva2_clksel[] = { - { .parent = &dpll2_fck, .rates = dpll_bypass_rates }, + { .parent = &dpll2_fck, .rates = dpll_bypass_rates }, { .parent = &dpll2_m2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -1123,6 +1126,7 @@ static struct clk iva2_ck = { .clksel_mask = OMAP3430_ST_IVA2_CLK_MASK, .clksel = iva2_clksel, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, + .clkdm_name = "iva2_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -1137,6 +1141,7 @@ static struct clk l3_ick = { .clksel = div2_core_clksel, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "core_l3_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -1154,6 +1159,7 @@ static struct clk l4_ick = { .clksel = div2_l3_clksel, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "core_l4_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -1183,43 +1189,57 @@ static const struct clksel gfx_l3_clksel[] = { { .parent = NULL } }; -static struct clk gfx_l3_fck = { - .name = "gfx_l3_fck", +/* Virtual parent clock for gfx_l3_ick and gfx_l3_fck */ +static struct clk gfx_l3_ck = { + .name = "gfx_l3_ck", .parent = &l3_ick, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN), .enable_bit = OMAP_EN_GFX_SHIFT, + .flags = CLOCK_IN_OMAP3430ES1, + .recalc = &followparent_recalc, +}; + +static struct clk gfx_l3_fck = { + .name = "gfx_l3_fck", + .parent = &gfx_l3_ck, + .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL), .clksel_mask = OMAP_CLKSEL_GFX_MASK, .clksel = gfx_l3_clksel, - .flags = CLOCK_IN_OMAP3430ES1 | RATE_PROPAGATES, + .flags = CLOCK_IN_OMAP3430ES1 | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, + .clkdm_name = "gfx_3430es1_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk gfx_l3_ick = { .name = "gfx_l3_ick", - .parent = &l3_ick, - .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN), - .enable_bit = OMAP_EN_GFX_SHIFT, - .flags = CLOCK_IN_OMAP3430ES1, + .parent = &gfx_l3_ck, + .flags = CLOCK_IN_OMAP3430ES1 | PARENT_CONTROLS_CLOCK, + .clkdm_name = "gfx_3430es1_clkdm", .recalc = &followparent_recalc, }; static struct clk gfx_cg1_ck = { .name = "gfx_cg1_ck", .parent = &gfx_l3_fck, /* REVISIT: correct? */ + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), .enable_bit = OMAP3430ES1_EN_2D_SHIFT, .flags = CLOCK_IN_OMAP3430ES1, + .clkdm_name = "gfx_3430es1_clkdm", .recalc = &followparent_recalc, }; static struct clk gfx_cg2_ck = { .name = "gfx_cg2_ck", .parent = &gfx_l3_fck, /* REVISIT: correct? */ + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), .enable_bit = OMAP3430ES1_EN_3D_SHIFT, .flags = CLOCK_IN_OMAP3430ES1, + .clkdm_name = "gfx_3430es1_clkdm", .recalc = &followparent_recalc, }; @@ -1252,15 +1272,18 @@ static struct clk sgx_fck = { .clksel_mask = OMAP3430ES2_CLKSEL_SGX_MASK, .clksel = sgx_clksel, .flags = CLOCK_IN_OMAP3430ES2, + .clkdm_name = "sgx_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk sgx_ick = { .name = "sgx_ick", .parent = &l3_ick, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_ICLKEN), .enable_bit = OMAP3430ES2_EN_SGX_SHIFT, .flags = CLOCK_IN_OMAP3430ES2, + .clkdm_name = "sgx_clkdm", .recalc = &followparent_recalc, }; @@ -1269,9 +1292,11 @@ static struct clk sgx_ick = { static struct clk d2d_26m_fck = { .name = "d2d_26m_fck", .parent = &sys_ck, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430ES1_EN_D2D_SHIFT, .flags = CLOCK_IN_OMAP3430ES1, + .clkdm_name = "d2d_clkdm", .recalc = &followparent_recalc, }; @@ -1291,6 +1316,7 @@ static struct clk gpt10_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT10_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -1304,6 +1330,7 @@ static struct clk gpt11_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT11_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -1341,6 +1368,7 @@ static struct clk core_96m_fck = { .parent = &omap_96m_fck, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1351,6 +1379,7 @@ static struct clk mmchs3_fck = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430ES2_EN_MMC3_SHIFT, .flags = CLOCK_IN_OMAP3430ES2, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1361,6 +1390,7 @@ static struct clk mmchs2_fck = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_MMC2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1370,6 +1400,7 @@ static struct clk mspro_fck = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_MSPRO_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1380,6 +1411,7 @@ static struct clk mmchs1_fck = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_MMC1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1390,16 +1422,18 @@ static struct clk i2c3_fck = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_I2C3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk i2c2_fck = { .name = "i2c_fck", - .id = 2, + .id = 2, .parent = &core_96m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_I2C2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1410,6 +1444,7 @@ static struct clk i2c1_fck = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_I2C1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1443,6 +1478,7 @@ static struct clk mcbsp5_fck = { .clksel_mask = OMAP2_MCBSP5_CLKS_MASK, .clksel = mcbsp_15_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -1456,6 +1492,7 @@ static struct clk mcbsp1_fck = { .clksel_mask = OMAP2_MCBSP1_CLKS_MASK, .clksel = mcbsp_15_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -1466,6 +1503,7 @@ static struct clk core_48m_fck = { .parent = &omap_48m_fck, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1543,6 +1581,7 @@ static struct clk core_12m_fck = { .parent = &omap_12m_fck, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1581,6 +1620,7 @@ static struct clk ssi_ssr_fck = { .clksel_mask = OMAP3430_CLKSEL_SSI_MASK, .clksel = ssi_ssr_clksel, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, + .clkdm_name = "core_l4_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -1596,11 +1636,17 @@ static struct clk ssi_sst_fck = { /* CORE_L3_ICK based clocks */ +/* + * XXX must add clk_enable/clk_disable for these if standard code won't + * handle it + */ static struct clk core_l3_ick = { .name = "core_l3_ick", .parent = &l3_ick, + .init = &omap2_init_clk_clkdm, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; @@ -1610,6 +1656,7 @@ static struct clk hsotgusb_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_HSOTGUSB_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; @@ -1619,6 +1666,7 @@ static struct clk sdrc_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_SDRC_SHIFT, .flags = CLOCK_IN_OMAP343X | ENABLE_ON_INIT, + .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; @@ -1627,6 +1675,7 @@ static struct clk gpmc_fck = { .parent = &core_l3_ick, .flags = CLOCK_IN_OMAP343X | PARENT_CONTROLS_CLOCK | ENABLE_ON_INIT, + .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; @@ -1654,8 +1703,10 @@ static struct clk pka_ick = { static struct clk core_l4_ick = { .name = "core_l4_ick", .parent = &l4_ick, + .init = &omap2_init_clk_clkdm, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1665,6 +1716,7 @@ static struct clk usbtll_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN3), .enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT, .flags = CLOCK_IN_OMAP3430ES2, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1675,6 +1727,7 @@ static struct clk mmchs3_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430ES2_EN_MMC3_SHIFT, .flags = CLOCK_IN_OMAP3430ES2, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1685,6 +1738,7 @@ static struct clk icr_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_ICR_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1694,6 +1748,7 @@ static struct clk aes2_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_AES2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1703,6 +1758,7 @@ static struct clk sha12_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_SHA12_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1712,6 +1768,7 @@ static struct clk des2_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_DES2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1722,6 +1779,7 @@ static struct clk mmchs2_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MMC2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1732,6 +1790,7 @@ static struct clk mmchs1_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MMC1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1741,6 +1800,7 @@ static struct clk mspro_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MSPRO_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1750,6 +1810,7 @@ static struct clk hdq_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_HDQ_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1760,6 +1821,7 @@ static struct clk mcspi4_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MCSPI4_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1770,6 +1832,7 @@ static struct clk mcspi3_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MCSPI3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1780,6 +1843,7 @@ static struct clk mcspi2_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MCSPI2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1790,6 +1854,7 @@ static struct clk mcspi1_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MCSPI1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1800,6 +1865,7 @@ static struct clk i2c3_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_I2C3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1810,6 +1876,7 @@ static struct clk i2c2_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_I2C2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1820,6 +1887,7 @@ static struct clk i2c1_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_I2C1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1829,6 +1897,7 @@ static struct clk uart2_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_UART2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1838,6 +1907,7 @@ static struct clk uart1_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_UART1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1847,6 +1917,7 @@ static struct clk gpt11_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_GPT11_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1856,6 +1927,7 @@ static struct clk gpt10_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_GPT10_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1866,6 +1938,7 @@ static struct clk mcbsp5_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MCBSP5_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1876,6 +1949,7 @@ static struct clk mcbsp1_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MCBSP1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1885,6 +1959,7 @@ static struct clk fac_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430ES1_EN_FAC_SHIFT, .flags = CLOCK_IN_OMAP3430ES1, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1894,6 +1969,7 @@ static struct clk mailboxes_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MAILBOXES_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1913,6 +1989,7 @@ static struct clk ssi_l4_ick = { .parent = &l4_ick, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1922,6 +1999,7 @@ static struct clk ssi_ick = { .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_SSI_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1996,7 +2074,7 @@ static struct clk des1_ick = { /* DSS */ static const struct clksel dss1_alwon_fck_clksel[] = { - { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &sys_ck, .rates = dpll_bypass_rates }, { .parent = &dpll4_m4x2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -2011,33 +2089,40 @@ static struct clk dss1_alwon_fck = { .clksel_mask = OMAP3430_ST_PERIPH_CLK_MASK, .clksel = dss1_alwon_fck_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "dss_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk dss_tv_fck = { .name = "dss_tv_fck", .parent = &omap_54m_fck, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_TV_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "dss_clkdm", .recalc = &followparent_recalc, }; static struct clk dss_96m_fck = { .name = "dss_96m_fck", .parent = &omap_96m_fck, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_TV_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "dss_clkdm", .recalc = &followparent_recalc, }; static struct clk dss2_alwon_fck = { .name = "dss2_alwon_fck", .parent = &sys_ck, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_DSS2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "dss_clkdm", .recalc = &followparent_recalc, }; @@ -2045,16 +2130,18 @@ static struct clk dss_ick = { /* Handles both L3 and L4 clocks */ .name = "dss_ick", .parent = &l4_ick, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN), .enable_bit = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "dss_clkdm", .recalc = &followparent_recalc, }; /* CAM */ static const struct clksel cam_mclk_clksel[] = { - { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &sys_ck, .rates = dpll_bypass_rates }, { .parent = &dpll4_m5x2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; @@ -2069,24 +2156,19 @@ static struct clk cam_mclk = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_CAM_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "cam_clkdm", .recalc = &omap2_clksel_recalc, }; -static struct clk cam_l3_ick = { - .name = "cam_l3_ick", - .parent = &l3_ick, - .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN), - .enable_bit = OMAP3430_EN_CAM_SHIFT, - .flags = CLOCK_IN_OMAP343X, - .recalc = &followparent_recalc, -}; - -static struct clk cam_l4_ick = { - .name = "cam_l4_ick", +static struct clk cam_ick = { + /* Handles both L3 and L4 clocks */ + .name = "cam_ick", .parent = &l4_ick, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_CAM_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "cam_clkdm", .recalc = &followparent_recalc, }; @@ -2095,45 +2177,45 @@ static struct clk cam_l4_ick = { static struct clk usbhost_120m_fck = { .name = "usbhost_120m_fck", .parent = &omap_120m_fck, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN), .enable_bit = OMAP3430ES2_EN_USBHOST2_SHIFT, .flags = CLOCK_IN_OMAP3430ES2, + .clkdm_name = "usbhost_clkdm", .recalc = &followparent_recalc, }; static struct clk usbhost_48m_fck = { .name = "usbhost_48m_fck", .parent = &omap_48m_fck, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN), .enable_bit = OMAP3430ES2_EN_USBHOST1_SHIFT, .flags = CLOCK_IN_OMAP3430ES2, + .clkdm_name = "usbhost_clkdm", .recalc = &followparent_recalc, }; -static struct clk usbhost_l3_ick = { - .name = "usbhost_l3_ick", - .parent = &l3_ick, - .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN), - .enable_bit = OMAP3430ES2_EN_USBHOST_SHIFT, - .flags = CLOCK_IN_OMAP3430ES2, - .recalc = &followparent_recalc, -}; - -static struct clk usbhost_l4_ick = { - .name = "usbhost_l4_ick", +static struct clk usbhost_ick = { + /* Handles both L3 and L4 clocks */ + .name = "usbhost_ick", .parent = &l4_ick, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN), .enable_bit = OMAP3430ES2_EN_USBHOST_SHIFT, .flags = CLOCK_IN_OMAP3430ES2, + .clkdm_name = "usbhost_clkdm", .recalc = &followparent_recalc, }; static struct clk usbhost_sar_fck = { .name = "usbhost_sar_fck", .parent = &osc_sys_ck, + .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_PRM_REGADDR(OMAP3430ES2_USBHOST_MOD, PM_PWSTCTRL), .enable_bit = OMAP3430ES2_SAVEANDRESTORE_SHIFT, .flags = CLOCK_IN_OMAP3430ES2, + .clkdm_name = "usbhost_clkdm", .recalc = &followparent_recalc, }; @@ -2175,6 +2257,7 @@ static struct clk usim_fck = { .recalc = &omap2_clksel_recalc, }; +/* XXX should gpt1's clksel have wkup_32k_fck as the 32k opt? */ static struct clk gpt1_fck = { .name = "gpt1_fck", .init = &omap2_init_clksel_parent, @@ -2184,13 +2267,16 @@ static struct clk gpt1_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT1_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "wkup_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk wkup_32k_fck = { .name = "wkup_32k_fck", + .init = &omap2_init_clk_clkdm, .parent = &omap_32k_fck, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2200,6 +2286,7 @@ static struct clk gpio1_fck = { .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2209,6 +2296,7 @@ static struct clk wdt2_fck = { .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_WDT2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2216,6 +2304,7 @@ static struct clk wkup_l4_ick = { .name = "wkup_l4_ick", .parent = &sys_ck, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2227,6 +2316,7 @@ static struct clk usim_ick = { .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP3430ES2_EN_USIMOCP_SHIFT, .flags = CLOCK_IN_OMAP3430ES2, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2236,6 +2326,7 @@ static struct clk wdt2_ick = { .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_WDT2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2245,6 +2336,7 @@ static struct clk wdt1_ick = { .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_WDT1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2254,6 +2346,7 @@ static struct clk gpio1_ick = { .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPIO1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2263,15 +2356,18 @@ static struct clk omap_32ksync_ick = { .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_32KSYNC_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; +/* XXX This clock no longer exists in 3430 TRM rev F */ static struct clk gpt12_ick = { .name = "gpt12_ick", .parent = &wkup_l4_ick, .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT12_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2281,6 +2377,7 @@ static struct clk gpt1_ick = { .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT1_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2291,16 +2388,20 @@ static struct clk gpt1_ick = { static struct clk per_96m_fck = { .name = "per_96m_fck", .parent = &omap_96m_alwon_fck, + .init = &omap2_init_clk_clkdm, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk per_48m_fck = { .name = "per_48m_fck", .parent = &omap_48m_fck, + .init = &omap2_init_clk_clkdm, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2310,6 +2411,7 @@ static struct clk uart3_fck = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_UART3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2322,6 +2424,7 @@ static struct clk gpt2_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT2_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2334,6 +2437,7 @@ static struct clk gpt3_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT3_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2346,6 +2450,7 @@ static struct clk gpt4_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT4_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2358,6 +2463,7 @@ static struct clk gpt5_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT5_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2370,6 +2476,7 @@ static struct clk gpt6_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT6_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2382,6 +2489,7 @@ static struct clk gpt7_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT7_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2394,6 +2502,7 @@ static struct clk gpt8_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT8_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2406,12 +2515,14 @@ static struct clk gpt9_fck = { .clksel_mask = OMAP3430_CLKSEL_GPT9_MASK, .clksel = omap343x_gpt_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk per_32k_alwon_fck = { .name = "per_32k_alwon_fck", .parent = &omap_32k_fck, + .clkdm_name = "per_clkdm", .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, .recalc = &followparent_recalc, }; @@ -2422,6 +2533,7 @@ static struct clk gpio6_fck = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO6_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2431,6 +2543,7 @@ static struct clk gpio5_fck = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO5_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2440,6 +2553,7 @@ static struct clk gpio4_fck = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO4_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2449,6 +2563,7 @@ static struct clk gpio3_fck = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2458,6 +2573,7 @@ static struct clk gpio2_fck = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2467,6 +2583,7 @@ static struct clk wdt3_fck = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_WDT3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2475,6 +2592,7 @@ static struct clk per_l4_ick = { .parent = &l4_ick, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2484,6 +2602,7 @@ static struct clk gpio6_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPIO6_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2493,6 +2612,7 @@ static struct clk gpio5_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPIO5_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2502,6 +2622,7 @@ static struct clk gpio4_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPIO4_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2511,6 +2632,7 @@ static struct clk gpio3_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPIO3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2520,6 +2642,7 @@ static struct clk gpio2_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPIO2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2529,6 +2652,7 @@ static struct clk wdt3_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_WDT3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2538,6 +2662,7 @@ static struct clk uart3_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_UART3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2547,6 +2672,7 @@ static struct clk gpt9_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT9_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2556,6 +2682,7 @@ static struct clk gpt8_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT8_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2565,6 +2692,7 @@ static struct clk gpt7_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT7_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2574,6 +2702,7 @@ static struct clk gpt6_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT6_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2583,6 +2712,7 @@ static struct clk gpt5_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT5_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2592,6 +2722,7 @@ static struct clk gpt4_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT4_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2601,6 +2732,7 @@ static struct clk gpt3_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2610,6 +2742,7 @@ static struct clk gpt2_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2620,6 +2753,7 @@ static struct clk mcbsp2_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_MCBSP2_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2630,6 +2764,7 @@ static struct clk mcbsp3_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_MCBSP3_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; @@ -2640,12 +2775,13 @@ static struct clk mcbsp4_ick = { .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_MCBSP4_SHIFT, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static const struct clksel mcbsp_234_clksel[] = { { .parent = &per_96m_fck, .rates = common_mcbsp_96m_rates }, - { .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates }, + { .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates }, { .parent = NULL } }; @@ -2659,6 +2795,7 @@ static struct clk mcbsp2_fck = { .clksel_mask = OMAP2_MCBSP2_CLKS_MASK, .clksel = mcbsp_234_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2672,6 +2809,7 @@ static struct clk mcbsp3_fck = { .clksel_mask = OMAP2_MCBSP3_CLKS_MASK, .clksel = mcbsp_234_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2685,6 +2823,7 @@ static struct clk mcbsp4_fck = { .clksel_mask = OMAP2_MCBSP4_CLKS_MASK, .clksel = mcbsp_234_clksel, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2732,6 +2871,7 @@ static struct clk emu_src_ck = { .clksel_mask = OMAP3430_MUX_CTRL_MASK, .clksel = emu_src_clksel, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, + .clkdm_name = "emu_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2755,6 +2895,7 @@ static struct clk pclk_fck = { .clksel_mask = OMAP3430_CLKSEL_PCLK_MASK, .clksel = pclk_emu_clksel, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, + .clkdm_name = "emu_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2777,6 +2918,7 @@ static struct clk pclkx2_fck = { .clksel_mask = OMAP3430_CLKSEL_PCLKX2_MASK, .clksel = pclkx2_emu_clksel, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, + .clkdm_name = "emu_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2792,6 +2934,7 @@ static struct clk atclk_fck = { .clksel_mask = OMAP3430_CLKSEL_ATCLK_MASK, .clksel = atclk_emu_clksel, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, + .clkdm_name = "emu_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2802,6 +2945,7 @@ static struct clk traceclk_src_fck = { .clksel_mask = OMAP3430_TRACE_MUX_CTRL_MASK, .clksel = emu_src_clksel, .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, + .clkdm_name = "emu_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2824,6 +2968,7 @@ static struct clk traceclk_fck = { .clksel_mask = OMAP3430_CLKSEL_TRACECLK_MASK, .clksel = traceclk_clksel, .flags = CLOCK_IN_OMAP343X | ALWAYS_ENABLED, + .clkdm_name = "emu_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2853,11 +2998,13 @@ static struct clk sr_l4_ick = { .name = "sr_l4_ick", .parent = &l4_ick, .flags = CLOCK_IN_OMAP343X, + .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; /* SECURE_32K_FCK clocks */ +/* XXX This clock no longer exists in 3430 TRM rev F */ static struct clk gpt12_fck = { .name = "gpt12_fck", .parent = &secure_32k_fck, @@ -2933,6 +3080,7 @@ static struct clk *onchip_34xx_clks[] __initdata = { &l3_ick, &l4_ick, &rm_ick, + &gfx_l3_ck, &gfx_l3_fck, &gfx_l3_ick, &gfx_cg1_ck, @@ -3014,12 +3162,10 @@ static struct clk *onchip_34xx_clks[] __initdata = { &dss2_alwon_fck, &dss_ick, &cam_mclk, - &cam_l3_ick, - &cam_l4_ick, + &cam_ick, &usbhost_120m_fck, &usbhost_48m_fck, - &usbhost_l3_ick, - &usbhost_l4_ick, + &usbhost_ick, &usbhost_sar_fck, &usim_fck, &gpt1_fck, diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c new file mode 100644 index 000000000000..4c3ce9cfd948 --- /dev/null +++ b/arch/arm/mach-omap2/clockdomain.c @@ -0,0 +1,623 @@ +/* + * OMAP2/3 clockdomain framework functions + * + * Copyright (C) 2008 Texas Instruments, Inc. + * Copyright (C) 2008 Nokia Corporation + * + * Written by Paul Walmsley and Jouni Högander + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifdef CONFIG_OMAP_DEBUG_CLOCKDOMAIN +# define DEBUG +#endif + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/device.h> +#include <linux/list.h> +#include <linux/errno.h> +#include <linux/delay.h> +#include <linux/clk.h> +#include <linux/limits.h> + +#include <linux/io.h> + +#include <linux/bitops.h> + +#include <mach/clock.h> + +#include "prm.h" +#include "prm-regbits-24xx.h" +#include "cm.h" + +#include <mach/powerdomain.h> +#include <mach/clockdomain.h> + +/* clkdm_list contains all registered struct clockdomains */ +static LIST_HEAD(clkdm_list); + +/* clkdm_mutex protects clkdm_list add and del ops */ +static DEFINE_MUTEX(clkdm_mutex); + +/* array of powerdomain deps to be added/removed when clkdm in hwsup mode */ +static struct clkdm_pwrdm_autodep *autodeps; + + +/* Private functions */ + +/* + * _autodep_lookup - resolve autodep pwrdm names to pwrdm pointers; store + * @autodep: struct clkdm_pwrdm_autodep * to resolve + * + * Resolve autodep powerdomain names to powerdomain pointers via + * pwrdm_lookup() and store the pointers in the autodep structure. An + * "autodep" is a powerdomain sleep/wakeup dependency that is + * automatically added and removed whenever clocks in the associated + * clockdomain are enabled or disabled (respectively) when the + * clockdomain is in hardware-supervised mode. Meant to be called + * once at clockdomain layer initialization, since these should remain + * fixed for a particular architecture. No return value. + */ +static void _autodep_lookup(struct clkdm_pwrdm_autodep *autodep) +{ + struct powerdomain *pwrdm; + + if (!autodep) + return; + + if (!omap_chip_is(autodep->omap_chip)) + return; + + pwrdm = pwrdm_lookup(autodep->pwrdm_name); + if (!pwrdm) { + pr_debug("clockdomain: _autodep_lookup: powerdomain %s " + "does not exist\n", autodep->pwrdm_name); + WARN_ON(1); + return; + } + autodep->pwrdm = pwrdm; + + return; +} + +/* + * _clkdm_add_autodeps - add auto sleepdeps/wkdeps to clkdm upon clock enable + * @clkdm: struct clockdomain * + * + * Add the "autodep" sleep & wakeup dependencies to clockdomain 'clkdm' + * in hardware-supervised mode. Meant to be called from clock framework + * when a clock inside clockdomain 'clkdm' is enabled. No return value. + */ +static void _clkdm_add_autodeps(struct clockdomain *clkdm) +{ + struct clkdm_pwrdm_autodep *autodep; + + for (autodep = autodeps; autodep->pwrdm_name; autodep++) { + if (!autodep->pwrdm) + continue; + + pr_debug("clockdomain: adding %s sleepdep/wkdep for " + "pwrdm %s\n", autodep->pwrdm_name, + clkdm->pwrdm->name); + + pwrdm_add_sleepdep(clkdm->pwrdm, autodep->pwrdm); + pwrdm_add_wkdep(clkdm->pwrdm, autodep->pwrdm); + } +} + +/* + * _clkdm_add_autodeps - remove auto sleepdeps/wkdeps from clkdm + * @clkdm: struct clockdomain * + * + * Remove the "autodep" sleep & wakeup dependencies from clockdomain 'clkdm' + * in hardware-supervised mode. Meant to be called from clock framework + * when a clock inside clockdomain 'clkdm' is disabled. No return value. + */ +static void _clkdm_del_autodeps(struct clockdomain *clkdm) +{ + struct clkdm_pwrdm_autodep *autodep; + + for (autodep = autodeps; autodep->pwrdm_name; autodep++) { + if (!autodep->pwrdm) + continue; + + pr_debug("clockdomain: removing %s sleepdep/wkdep for " + "pwrdm %s\n", autodep->pwrdm_name, + clkdm->pwrdm->name); + + pwrdm_del_sleepdep(clkdm->pwrdm, autodep->pwrdm); + pwrdm_del_wkdep(clkdm->pwrdm, autodep->pwrdm); + } +} + + +static struct clockdomain *_clkdm_lookup(const char *name) +{ + struct clockdomain *clkdm, *temp_clkdm; + + if (!name) + return NULL; + + clkdm = NULL; + + list_for_each_entry(temp_clkdm, &clkdm_list, node) { + if (!strcmp(name, temp_clkdm->name)) { + clkdm = temp_clkdm; + break; + } + } + + return clkdm; +} + + +/* Public functions */ + +/** + * clkdm_init - set up the clockdomain layer + * @clkdms: optional pointer to an array of clockdomains to register + * @init_autodeps: optional pointer to an array of autodeps to register + * + * Set up internal state. If a pointer to an array of clockdomains + * was supplied, loop through the list of clockdomains, register all + * that are available on the current platform. Similarly, if a + * pointer to an array of clockdomain-powerdomain autodependencies was + * provided, register those. No return value. + */ +void clkdm_init(struct clockdomain **clkdms, + struct clkdm_pwrdm_autodep *init_autodeps) +{ + struct clockdomain **c = NULL; + struct clkdm_pwrdm_autodep *autodep = NULL; + + if (clkdms) + for (c = clkdms; *c; c++) + clkdm_register(*c); + + autodeps = init_autodeps; + if (autodeps) + for (autodep = autodeps; autodep->pwrdm_name; autodep++) + _autodep_lookup(autodep); +} + +/** + * clkdm_register - register a clockdomain + * @clkdm: struct clockdomain * to register + * + * Adds a clockdomain to the internal clockdomain list. + * Returns -EINVAL if given a null pointer, -EEXIST if a clockdomain is + * already registered by the provided name, or 0 upon success. + */ +int clkdm_register(struct clockdomain *clkdm) +{ + int ret = -EINVAL; + struct powerdomain *pwrdm; + + if (!clkdm || !clkdm->name) + return -EINVAL; + + if (!omap_chip_is(clkdm->omap_chip)) + return -EINVAL; + + pwrdm = pwrdm_lookup(clkdm->pwrdm_name); + if (!pwrdm) { + pr_debug("clockdomain: clkdm_register %s: powerdomain %s " + "does not exist\n", clkdm->name, clkdm->pwrdm_name); + return -EINVAL; + } + clkdm->pwrdm = pwrdm; + + mutex_lock(&clkdm_mutex); + /* Verify that the clockdomain is not already registered */ + if (_clkdm_lookup(clkdm->name)) { + ret = -EEXIST; + goto cr_unlock; + }; + + list_add(&clkdm->node, &clkdm_list); + + pwrdm_add_clkdm(pwrdm, clkdm); + + pr_debug("clockdomain: registered %s\n", clkdm->name); + ret = 0; + +cr_unlock: + mutex_unlock(&clkdm_mutex); + + return ret; +} + +/** + * clkdm_unregister - unregister a clockdomain + * @clkdm: struct clockdomain * to unregister + * + * Removes a clockdomain from the internal clockdomain list. Returns + * -EINVAL if clkdm argument is NULL. + */ +int clkdm_unregister(struct clockdomain *clkdm) +{ + if (!clkdm) + return -EINVAL; + + pwrdm_del_clkdm(clkdm->pwrdm, clkdm); + + mutex_lock(&clkdm_mutex); + list_del(&clkdm->node); + mutex_unlock(&clkdm_mutex); + + pr_debug("clockdomain: unregistered %s\n", clkdm->name); + + return 0; +} + +/** + * clkdm_lookup - look up a clockdomain by name, return a pointer + * @name: name of clockdomain + * + * Find a registered clockdomain by its name. Returns a pointer to the + * struct clockdomain if found, or NULL otherwise. + */ +struct clockdomain *clkdm_lookup(const char *name) +{ + struct clockdomain *clkdm, *temp_clkdm; + + if (!name) + return NULL; + + clkdm = NULL; + + mutex_lock(&clkdm_mutex); + list_for_each_entry(temp_clkdm, &clkdm_list, node) { + if (!strcmp(name, temp_clkdm->name)) { + clkdm = temp_clkdm; + break; + } + } + mutex_unlock(&clkdm_mutex); + + return clkdm; +} + +/** + * clkdm_for_each - call function on each registered clockdomain + * @fn: callback function * + * + * Call the supplied function for each registered clockdomain. + * The callback function can return anything but 0 to bail + * out early from the iterator. The callback function is called with + * the clkdm_mutex held, so no clockdomain structure manipulation + * functions should be called from the callback, although hardware + * clockdomain control functions are fine. Returns the last return + * value of the callback function, which should be 0 for success or + * anything else to indicate failure; or -EINVAL if the function pointer + * is null. + */ +int clkdm_for_each(int (*fn)(struct clockdomain *clkdm)) +{ + struct clockdomain *clkdm; + int ret = 0; + + if (!fn) + return -EINVAL; + + mutex_lock(&clkdm_mutex); + list_for_each_entry(clkdm, &clkdm_list, node) { + ret = (*fn)(clkdm); + if (ret) + break; + } + mutex_unlock(&clkdm_mutex); + + return ret; +} + + +/** + * clkdm_get_pwrdm - return a ptr to the pwrdm that this clkdm resides in + * @clkdm: struct clockdomain * + * + * Return a pointer to the struct powerdomain that the specified clockdomain + * 'clkdm' exists in, or returns NULL if clkdm argument is NULL. + */ +struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm) +{ + if (!clkdm) + return NULL; + + return clkdm->pwrdm; +} + + +/* Hardware clockdomain control */ + +/** + * omap2_clkdm_clktrctrl_read - read the clkdm's current state transition mode + * @clk: struct clk * of a clockdomain + * + * Return the clockdomain's current state transition mode from the + * corresponding domain CM_CLKSTCTRL register. Returns -EINVAL if clk + * is NULL or the current mode upon success. + */ +static int omap2_clkdm_clktrctrl_read(struct clockdomain *clkdm) +{ + u32 v; + + if (!clkdm) + return -EINVAL; + + v = cm_read_mod_reg(clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL); + v &= clkdm->clktrctrl_mask; + v >>= __ffs(clkdm->clktrctrl_mask); + + return v; +} + +/** + * omap2_clkdm_sleep - force clockdomain sleep transition + * @clkdm: struct clockdomain * + * + * Instruct the CM to force a sleep transition on the specified + * clockdomain 'clkdm'. Returns -EINVAL if clk is NULL or if + * clockdomain does not support software-initiated sleep; 0 upon + * success. + */ +int omap2_clkdm_sleep(struct clockdomain *clkdm) +{ + if (!clkdm) + return -EINVAL; + + if (!(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) { + pr_debug("clockdomain: %s does not support forcing " + "sleep via software\n", clkdm->name); + return -EINVAL; + } + + pr_debug("clockdomain: forcing sleep on %s\n", clkdm->name); + + if (cpu_is_omap24xx()) { + + cm_set_mod_reg_bits(OMAP24XX_FORCESTATE, + clkdm->pwrdm->prcm_offs, PM_PWSTCTRL); + + } else if (cpu_is_omap34xx()) { + + u32 v = (OMAP34XX_CLKSTCTRL_FORCE_SLEEP << + __ffs(clkdm->clktrctrl_mask)); + + cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v, + clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL); + + } else { + BUG(); + }; + + return 0; +} + +/** + * omap2_clkdm_wakeup - force clockdomain wakeup transition + * @clkdm: struct clockdomain * + * + * Instruct the CM to force a wakeup transition on the specified + * clockdomain 'clkdm'. Returns -EINVAL if clkdm is NULL or if the + * clockdomain does not support software-controlled wakeup; 0 upon + * success. + */ +int omap2_clkdm_wakeup(struct clockdomain *clkdm) +{ + if (!clkdm) + return -EINVAL; + + if (!(clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) { + pr_debug("clockdomain: %s does not support forcing " + "wakeup via software\n", clkdm->name); + return -EINVAL; + } + + pr_debug("clockdomain: forcing wakeup on %s\n", clkdm->name); + + if (cpu_is_omap24xx()) { + + cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE, + clkdm->pwrdm->prcm_offs, PM_PWSTCTRL); + + } else if (cpu_is_omap34xx()) { + + u32 v = (OMAP34XX_CLKSTCTRL_FORCE_WAKEUP << + __ffs(clkdm->clktrctrl_mask)); + + cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v, + clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL); + + } else { + BUG(); + }; + + return 0; +} + +/** + * omap2_clkdm_allow_idle - enable hwsup idle transitions for clkdm + * @clkdm: struct clockdomain * + * + * Allow the hardware to automatically switch the clockdomain into + * active or idle states, as needed by downstream clocks. If the + * clockdomain has any downstream clocks enabled in the clock + * framework, wkdep/sleepdep autodependencies are added; this is so + * device drivers can read and write to the device. No return value. + */ +void omap2_clkdm_allow_idle(struct clockdomain *clkdm) +{ + u32 v; + + if (!clkdm) + return; + + if (!(clkdm->flags & CLKDM_CAN_ENABLE_AUTO)) { + pr_debug("clock: automatic idle transitions cannot be enabled " + "on clockdomain %s\n", clkdm->name); + return; + } + + pr_debug("clockdomain: enabling automatic idle transitions for %s\n", + clkdm->name); + + if (atomic_read(&clkdm->usecount) > 0) + _clkdm_add_autodeps(clkdm); + + if (cpu_is_omap24xx()) + v = OMAP24XX_CLKSTCTRL_ENABLE_AUTO; + else if (cpu_is_omap34xx()) + v = OMAP34XX_CLKSTCTRL_ENABLE_AUTO; + else + BUG(); + + + cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, + v << __ffs(clkdm->clktrctrl_mask), + clkdm->pwrdm->prcm_offs, + CM_CLKSTCTRL); +} + +/** + * omap2_clkdm_deny_idle - disable hwsup idle transitions for clkdm + * @clkdm: struct clockdomain * + * + * Prevent the hardware from automatically switching the clockdomain + * into inactive or idle states. If the clockdomain has downstream + * clocks enabled in the clock framework, wkdep/sleepdep + * autodependencies are removed. No return value. + */ +void omap2_clkdm_deny_idle(struct clockdomain *clkdm) +{ + u32 v; + + if (!clkdm) + return; + + if (!(clkdm->flags & CLKDM_CAN_DISABLE_AUTO)) { + pr_debug("clockdomain: automatic idle transitions cannot be " + "disabled on %s\n", clkdm->name); + return; + } + + pr_debug("clockdomain: disabling automatic idle transitions for %s\n", + clkdm->name); + + if (cpu_is_omap24xx()) + v = OMAP24XX_CLKSTCTRL_DISABLE_AUTO; + else if (cpu_is_omap34xx()) + v = OMAP34XX_CLKSTCTRL_DISABLE_AUTO; + else + BUG(); + + cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, + v << __ffs(clkdm->clktrctrl_mask), + clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL); + + if (atomic_read(&clkdm->usecount) > 0) + _clkdm_del_autodeps(clkdm); +} + + +/* Clockdomain-to-clock framework interface code */ + +/** + * omap2_clkdm_clk_enable - add an enabled downstream clock to this clkdm + * @clkdm: struct clockdomain * + * @clk: struct clk * of the enabled downstream clock + * + * Increment the usecount of this clockdomain 'clkdm' and ensure that + * it is awake. Intended to be called by clk_enable() code. If the + * clockdomain is in software-supervised idle mode, force the + * clockdomain to wake. If the clockdomain is in hardware-supervised + * idle mode, add clkdm-pwrdm autodependencies, to ensure that devices + * in the clockdomain can be read from/written to by on-chip processors. + * Returns -EINVAL if passed null pointers; returns 0 upon success or + * if the clockdomain is in hwsup idle mode. + */ +int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) +{ + int v; + + /* + * XXX Rewrite this code to maintain a list of enabled + * downstream clocks for debugging purposes? + */ + + if (!clkdm || !clk) + return -EINVAL; + + if (atomic_inc_return(&clkdm->usecount) > 1) + return 0; + + /* Clockdomain now has one enabled downstream clock */ + + pr_debug("clockdomain: clkdm %s: clk %s now enabled\n", clkdm->name, + clk->name); + + v = omap2_clkdm_clktrctrl_read(clkdm); + + if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || + (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) + _clkdm_add_autodeps(clkdm); + else + omap2_clkdm_wakeup(clkdm); + + return 0; +} + +/** + * omap2_clkdm_clk_disable - remove an enabled downstream clock from this clkdm + * @clkdm: struct clockdomain * + * @clk: struct clk * of the disabled downstream clock + * + * Decrement the usecount of this clockdomain 'clkdm'. Intended to be + * called by clk_disable() code. If the usecount goes to 0, put the + * clockdomain to sleep (software-supervised mode) or remove the + * clkdm-pwrdm autodependencies (hardware-supervised mode). Returns + * -EINVAL if passed null pointers; -ERANGE if the clkdm usecount + * underflows and debugging is enabled; or returns 0 upon success or + * if the clockdomain is in hwsup idle mode. + */ +int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) +{ + int v; + + /* + * XXX Rewrite this code to maintain a list of enabled + * downstream clocks for debugging purposes? + */ + + if (!clkdm || !clk) + return -EINVAL; + +#ifdef DEBUG + if (atomic_read(&clkdm->usecount) == 0) { + WARN_ON(1); /* underflow */ + return -ERANGE; + } +#endif + + if (atomic_dec_return(&clkdm->usecount) > 0) + return 0; + + /* All downstream clocks of this clockdomain are now disabled */ + + pr_debug("clockdomain: clkdm %s: clk %s now disabled\n", clkdm->name, + clk->name); + + v = omap2_clkdm_clktrctrl_read(clkdm); + + if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || + (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) + _clkdm_del_autodeps(clkdm); + else + omap2_clkdm_sleep(clkdm); + + return 0; +} + diff --git a/arch/arm/mach-omap2/clockdomains.h b/arch/arm/mach-omap2/clockdomains.h new file mode 100644 index 000000000000..cd86dcc7b424 --- /dev/null +++ b/arch/arm/mach-omap2/clockdomains.h @@ -0,0 +1,305 @@ +/* + * OMAP2/3 clockdomains + * + * Copyright (C) 2008 Texas Instruments, Inc. + * Copyright (C) 2008 Nokia Corporation + * + * Written by Paul Walmsley + */ + +#ifndef __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_H +#define __ARCH_ARM_MACH_OMAP2_CLOCKDOMAINS_H + +#include <mach/clockdomain.h> + +/* + * OMAP2/3-common clockdomains + */ + +/* This is an implicit clockdomain - it is never defined as such in TRM */ +static struct clockdomain wkup_clkdm = { + .name = "wkup_clkdm", + .pwrdm_name = "wkup_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), +}; + +/* + * 2420-only clockdomains + */ + +#if defined(CONFIG_ARCH_OMAP2420) + +static struct clockdomain mpu_2420_clkdm = { + .name = "mpu_clkdm", + .pwrdm_name = "mpu_pwrdm", + .flags = CLKDM_CAN_HWSUP, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), +}; + +static struct clockdomain iva1_2420_clkdm = { + .name = "iva1_clkdm", + .pwrdm_name = "dsp_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP2420_AUTOSTATE_IVA_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), +}; + +#endif /* CONFIG_ARCH_OMAP2420 */ + + +/* + * 2430-only clockdomains + */ + +#if defined(CONFIG_ARCH_OMAP2430) + +static struct clockdomain mpu_2430_clkdm = { + .name = "mpu_clkdm", + .pwrdm_name = "mpu_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), +}; + +static struct clockdomain mdm_clkdm = { + .name = "mdm_clkdm", + .pwrdm_name = "mdm_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP2430_AUTOSTATE_MDM_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), +}; + +#endif /* CONFIG_ARCH_OMAP2430 */ + + +/* + * 24XX-only clockdomains + */ + +#if defined(CONFIG_ARCH_OMAP24XX) + +static struct clockdomain dsp_clkdm = { + .name = "dsp_clkdm", + .pwrdm_name = "dsp_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), +}; + +static struct clockdomain gfx_24xx_clkdm = { + .name = "gfx_clkdm", + .pwrdm_name = "gfx_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), +}; + +static struct clockdomain core_l3_24xx_clkdm = { + .name = "core_l3_clkdm", + .pwrdm_name = "core_pwrdm", + .flags = CLKDM_CAN_HWSUP, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), +}; + +static struct clockdomain core_l4_24xx_clkdm = { + .name = "core_l4_clkdm", + .pwrdm_name = "core_pwrdm", + .flags = CLKDM_CAN_HWSUP, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), +}; + +static struct clockdomain dss_24xx_clkdm = { + .name = "dss_clkdm", + .pwrdm_name = "core_pwrdm", + .flags = CLKDM_CAN_HWSUP, + .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), +}; + +#endif /* CONFIG_ARCH_OMAP24XX */ + + +/* + * 34xx clockdomains + */ + +#if defined(CONFIG_ARCH_OMAP34XX) + +static struct clockdomain mpu_34xx_clkdm = { + .name = "mpu_clkdm", + .pwrdm_name = "mpu_pwrdm", + .flags = CLKDM_CAN_HWSUP | CLKDM_CAN_FORCE_WAKEUP, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_MPU_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain neon_clkdm = { + .name = "neon_clkdm", + .pwrdm_name = "neon_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_NEON_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain iva2_clkdm = { + .name = "iva2_clkdm", + .pwrdm_name = "iva2_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain gfx_3430es1_clkdm = { + .name = "gfx_clkdm", + .pwrdm_name = "gfx_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_GFX_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1), +}; + +static struct clockdomain sgx_clkdm = { + .name = "sgx_clkdm", + .pwrdm_name = "sgx_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_SGX_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2), +}; + +/* + * The die-to-die clockdomain was documented in the 34xx ES1 TRM, but + * then that information was removed from the 34xx ES2+ TRM. It is + * unclear whether the core is still there, but the clockdomain logic + * is there, and must be programmed to an appropriate state if the + * CORE clockdomain is to become inactive. + */ +static struct clockdomain d2d_clkdm = { + .name = "d2d_clkdm", + .pwrdm_name = "core_pwrdm", + .flags = CLKDM_CAN_HWSUP, + .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_D2D_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain core_l3_34xx_clkdm = { + .name = "core_l3_clkdm", + .pwrdm_name = "core_pwrdm", + .flags = CLKDM_CAN_HWSUP, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_L3_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain core_l4_34xx_clkdm = { + .name = "core_l4_clkdm", + .pwrdm_name = "core_pwrdm", + .flags = CLKDM_CAN_HWSUP, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_L4_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain dss_34xx_clkdm = { + .name = "dss_clkdm", + .pwrdm_name = "dss_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_DSS_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain cam_clkdm = { + .name = "cam_clkdm", + .pwrdm_name = "cam_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_CAM_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain usbhost_clkdm = { + .name = "usbhost_clkdm", + .pwrdm_name = "usbhost_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_USBHOST_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2), +}; + +static struct clockdomain per_clkdm = { + .name = "per_clkdm", + .pwrdm_name = "per_pwrdm", + .flags = CLKDM_CAN_HWSUP_SWSUP, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_PER_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain emu_clkdm = { + .name = "emu_clkdm", + .pwrdm_name = "emu_pwrdm", + .flags = CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_SWSUP, + .clktrctrl_mask = OMAP3430_CLKTRCTRL_EMU_MASK, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +#endif /* CONFIG_ARCH_OMAP34XX */ + +/* + * Clockdomain-powerdomain hwsup dependencies (34XX only) + */ + +static struct clkdm_pwrdm_autodep clkdm_pwrdm_autodeps[] = { + { + .pwrdm_name = "mpu_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "iva2_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { NULL } +}; + +/* + * + */ + +static struct clockdomain *clockdomains_omap[] = { + + &wkup_clkdm, + +#ifdef CONFIG_ARCH_OMAP2420 + &mpu_2420_clkdm, + &iva1_2420_clkdm, +#endif + +#ifdef CONFIG_ARCH_OMAP2430 + &mpu_2430_clkdm, + &mdm_clkdm, +#endif + +#ifdef CONFIG_ARCH_OMAP24XX + &dsp_clkdm, + &gfx_24xx_clkdm, + &core_l3_24xx_clkdm, + &core_l4_24xx_clkdm, + &dss_24xx_clkdm, +#endif + +#ifdef CONFIG_ARCH_OMAP34XX + &mpu_34xx_clkdm, + &neon_clkdm, + &iva2_clkdm, + &gfx_3430es1_clkdm, + &sgx_clkdm, + &d2d_clkdm, + &core_l3_34xx_clkdm, + &core_l4_34xx_clkdm, + &dss_34xx_clkdm, + &cam_clkdm, + &usbhost_clkdm, + &per_clkdm, + &emu_clkdm, +#endif + + NULL, +}; + +#endif diff --git a/arch/arm/mach-omap2/cm-regbits-24xx.h b/arch/arm/mach-omap2/cm-regbits-24xx.h index 20ac38100678..1098ecfab861 100644 --- a/arch/arm/mach-omap2/cm-regbits-24xx.h +++ b/arch/arm/mach-omap2/cm-regbits-24xx.h @@ -63,7 +63,8 @@ #define OMAP24XX_CLKSEL_MPU_MASK (0x1f << 0) /* CM_CLKSTCTRL_MPU */ -#define OMAP24XX_AUTOSTATE_MPU (1 << 0) +#define OMAP24XX_AUTOSTATE_MPU_SHIFT 0 +#define OMAP24XX_AUTOSTATE_MPU_MASK (1 << 0) /* CM_FCLKEN1_CORE specific bits*/ #define OMAP24XX_EN_TV_SHIFT 2 @@ -238,9 +239,12 @@ #define OMAP24XX_CLKSEL_GPT2_MASK (0x3 << 2) /* CM_CLKSTCTRL_CORE */ -#define OMAP24XX_AUTOSTATE_DSS (1 << 2) -#define OMAP24XX_AUTOSTATE_L4 (1 << 1) -#define OMAP24XX_AUTOSTATE_L3 (1 << 0) +#define OMAP24XX_AUTOSTATE_DSS_SHIFT 2 +#define OMAP24XX_AUTOSTATE_DSS_MASK (1 << 2) +#define OMAP24XX_AUTOSTATE_L4_SHIFT 1 +#define OMAP24XX_AUTOSTATE_L4_MASK (1 << 1) +#define OMAP24XX_AUTOSTATE_L3_SHIFT 0 +#define OMAP24XX_AUTOSTATE_L3_MASK (1 << 0) /* CM_FCLKEN_GFX */ #define OMAP24XX_EN_3D_SHIFT 2 @@ -255,7 +259,8 @@ /* CM_CLKSEL_GFX specific bits */ /* CM_CLKSTCTRL_GFX */ -#define OMAP24XX_AUTOSTATE_GFX (1 << 0) +#define OMAP24XX_AUTOSTATE_GFX_SHIFT 0 +#define OMAP24XX_AUTOSTATE_GFX_MASK (1 << 0) /* CM_FCLKEN_WKUP specific bits */ @@ -367,8 +372,10 @@ #define OMAP24XX_CLKSEL_DSP_MASK (0x1f << 0) /* CM_CLKSTCTRL_DSP */ -#define OMAP2420_AUTOSTATE_IVA (1 << 8) -#define OMAP24XX_AUTOSTATE_DSP (1 << 0) +#define OMAP2420_AUTOSTATE_IVA_SHIFT 8 +#define OMAP2420_AUTOSTATE_IVA_MASK (1 << 8) +#define OMAP24XX_AUTOSTATE_DSP_SHIFT 0 +#define OMAP24XX_AUTOSTATE_DSP_MASK (1 << 0) /* CM_FCLKEN_MDM */ /* 2430 only */ @@ -396,6 +403,7 @@ /* CM_CLKSTCTRL_MDM */ /* 2430 only */ -#define OMAP2430_AUTOSTATE_MDM (1 << 0) +#define OMAP2430_AUTOSTATE_MDM_SHIFT 0 +#define OMAP2430_AUTOSTATE_MDM_MASK (1 << 0) #endif diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h index ee4c0ca1a708..219f5c8d9659 100644 --- a/arch/arm/mach-omap2/cm-regbits-34xx.h +++ b/arch/arm/mach-omap2/cm-regbits-34xx.h @@ -96,7 +96,8 @@ #define OMAP3430_CLKTRCTRL_IVA2_MASK (0x3 << 0) /* CM_CLKSTST_IVA2 */ -#define OMAP3430_CLKACTIVITY_IVA2 (1 << 0) +#define OMAP3430_CLKACTIVITY_IVA2_SHIFT 0 +#define OMAP3430_CLKACTIVITY_IVA2_MASK (1 << 0) /* CM_REVISION specific bits */ @@ -140,7 +141,8 @@ #define OMAP3430_CLKTRCTRL_MPU_MASK (0x3 << 0) /* CM_CLKSTST_MPU */ -#define OMAP3430_CLKACTIVITY_MPU (1 << 0) +#define OMAP3430_CLKACTIVITY_MPU_SHIFT 0 +#define OMAP3430_CLKACTIVITY_MPU_MASK (1 << 0) /* CM_FCLKEN1_CORE specific bits */ @@ -300,9 +302,12 @@ #define OMAP3430_CLKTRCTRL_L3_MASK (0x3 << 0) /* CM_CLKSTST_CORE */ -#define OMAP3430ES1_CLKACTIVITY_D2D (1 << 2) -#define OMAP3430_CLKACTIVITY_L4 (1 << 1) -#define OMAP3430_CLKACTIVITY_L3 (1 << 0) +#define OMAP3430ES1_CLKACTIVITY_D2D_SHIFT 2 +#define OMAP3430ES1_CLKACTIVITY_D2D_MASK (1 << 2) +#define OMAP3430_CLKACTIVITY_L4_SHIFT 1 +#define OMAP3430_CLKACTIVITY_L4_MASK (1 << 1) +#define OMAP3430_CLKACTIVITY_L3_SHIFT 0 +#define OMAP3430_CLKACTIVITY_L3_MASK (1 << 0) /* CM_FCLKEN_GFX */ #define OMAP3430ES1_EN_3D (1 << 2) @@ -323,7 +328,8 @@ #define OMAP3430ES1_CLKTRCTRL_GFX_MASK (0x3 << 0) /* CM_CLKSTST_GFX */ -#define OMAP3430ES1_CLKACTIVITY_GFX (1 << 0) +#define OMAP3430ES1_CLKACTIVITY_GFX_SHIFT 0 +#define OMAP3430ES1_CLKACTIVITY_GFX_MASK (1 << 0) /* CM_FCLKEN_SGX */ #define OMAP3430ES2_EN_SGX_SHIFT 1 @@ -333,6 +339,14 @@ #define OMAP3430ES2_CLKSEL_SGX_SHIFT 0 #define OMAP3430ES2_CLKSEL_SGX_MASK (0x7 << 0) +/* CM_CLKSTCTRL_SGX */ +#define OMAP3430ES2_CLKTRCTRL_SGX_SHIFT 0 +#define OMAP3430ES2_CLKTRCTRL_SGX_MASK (0x3 << 0) + +/* CM_CLKSTST_SGX */ +#define OMAP3430ES2_CLKACTIVITY_SGX_SHIFT 0 +#define OMAP3430ES2_CLKACTIVITY_SGX_MASK (1 << 0) + /* CM_FCLKEN_WKUP specific bits */ #define OMAP3430ES2_EN_USIMOCP_SHIFT 9 @@ -498,7 +512,8 @@ #define OMAP3430_CLKTRCTRL_DSS_MASK (0x3 << 0) /* CM_CLKSTST_DSS */ -#define OMAP3430_CLKACTIVITY_DSS (1 << 0) +#define OMAP3430_CLKACTIVITY_DSS_SHIFT 0 +#define OMAP3430_CLKACTIVITY_DSS_MASK (1 << 0) /* CM_FCLKEN_CAM specific bits */ @@ -522,7 +537,8 @@ #define OMAP3430_CLKTRCTRL_CAM_MASK (0x3 << 0) /* CM_CLKSTST_CAM */ -#define OMAP3430_CLKACTIVITY_CAM (1 << 0) +#define OMAP3430_CLKACTIVITY_CAM_SHIFT 0 +#define OMAP3430_CLKACTIVITY_CAM_MASK (1 << 0) /* CM_FCLKEN_PER specific bits */ @@ -598,7 +614,8 @@ #define OMAP3430_CLKTRCTRL_PER_MASK (0x3 << 0) /* CM_CLKSTST_PER */ -#define OMAP3430_CLKACTIVITY_PER (1 << 0) +#define OMAP3430_CLKACTIVITY_PER_SHIFT 0 +#define OMAP3430_CLKACTIVITY_PER_MASK (1 << 0) /* CM_CLKSEL1_EMU */ #define OMAP3430_DIV_DPLL4_SHIFT 24 @@ -623,7 +640,8 @@ #define OMAP3430_CLKTRCTRL_EMU_MASK (0x3 << 0) /* CM_CLKSTST_EMU */ -#define OMAP3430_CLKACTIVITY_EMU (1 << 0) +#define OMAP3430_CLKACTIVITY_EMU_SHIFT 0 +#define OMAP3430_CLKACTIVITY_EMU_MASK (1 << 0) /* CM_CLKSEL2_EMU specific bits */ #define OMAP3430_CORE_DPLL_EMU_MULT_SHIFT 8 @@ -673,6 +691,8 @@ #define OMAP3430ES2_CLKTRCTRL_USBHOST_SHIFT 0 #define OMAP3430ES2_CLKTRCTRL_USBHOST_MASK (3 << 0) - +/* CM_CLKSTST_USBHOST */ +#define OMAP3430ES2_CLKACTIVITY_USBHOST_SHIFT 0 +#define OMAP3430ES2_CLKACTIVITY_USBHOST_MASK (1 << 0) #endif diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h index 87a44c715aa4..65fdf78c91e1 100644 --- a/arch/arm/mach-omap2/cm.h +++ b/arch/arm/mach-omap2/cm.h @@ -18,7 +18,7 @@ #ifndef __ASSEMBLER__ #define OMAP_CM_REGADDR(module, reg) \ - (void __iomem *)IO_ADDRESS(OMAP2_CM_BASE + (module) + (reg)) + IO_ADDRESS(OMAP2_CM_BASE + (module) + (reg)) #else #define OMAP2420_CM_REGADDR(module, reg) \ IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg)) diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 2ee954a0bc7c..90af2ac469aa 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -23,50 +23,7 @@ #include <mach/board.h> #include <mach/mux.h> #include <mach/gpio.h> - -#if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE) - -#define OMAP2_I2C_BASE2 0x48072000 -#define OMAP2_I2C_INT2 57 - -static struct resource i2c_resources2[] = { - { - .start = OMAP2_I2C_BASE2, - .end = OMAP2_I2C_BASE2 + 0x3f, - .flags = IORESOURCE_MEM, - }, - { - .start = OMAP2_I2C_INT2, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device omap_i2c_device2 = { - .name = "i2c_omap", - .id = 2, - .num_resources = ARRAY_SIZE(i2c_resources2), - .resource = i2c_resources2, -}; - -/* See also arch/arm/plat-omap/devices.c for first I2C on 24xx */ -static void omap_init_i2c(void) -{ - /* REVISIT: Second I2C not in use on H4? */ - if (machine_is_omap_h4()) - return; - - if (!cpu_is_omap2430()) { - omap_cfg_reg(J15_24XX_I2C2_SCL); - omap_cfg_reg(H19_24XX_I2C2_SDA); - } - (void) platform_device_register(&omap_i2c_device2); -} - -#else - -static void omap_init_i2c(void) {} - -#endif +#include <mach/eac.h> #if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE) #define OMAP2_MBOX_BASE IO_ADDRESS(OMAP24XX_MAILBOX_BASE) @@ -104,7 +61,9 @@ static inline void omap_init_mbox(void) { } #if defined(CONFIG_OMAP_STI) -#define OMAP2_STI_BASE IO_ADDRESS(0x48068000) +#if defined(CONFIG_ARCH_OMAP2) + +#define OMAP2_STI_BASE 0x48068000 #define OMAP2_STI_CHANNEL_BASE 0x54000000 #define OMAP2_STI_IRQ 4 @@ -124,6 +83,25 @@ static struct resource sti_resources[] = { .flags = IORESOURCE_IRQ, } }; +#elif defined(CONFIG_ARCH_OMAP3) + +#define OMAP3_SDTI_BASE 0x54500000 +#define OMAP3_SDTI_CHANNEL_BASE 0x54600000 + +static struct resource sti_resources[] = { + { + .start = OMAP3_SDTI_BASE, + .end = OMAP3_SDTI_BASE + 0xFFF, + .flags = IORESOURCE_MEM, + }, + { + .start = OMAP3_SDTI_CHANNEL_BASE, + .end = OMAP3_SDTI_CHANNEL_BASE + SZ_1M - 1, + .flags = IORESOURCE_MEM, + } +}; + +#endif static struct platform_device sti_device = { .name = "sti", @@ -140,12 +118,14 @@ static inline void omap_init_sti(void) static inline void omap_init_sti(void) {} #endif -#if defined(CONFIG_SPI_OMAP24XX) +#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) #include <mach/mcspi.h> #define OMAP2_MCSPI1_BASE 0x48098000 #define OMAP2_MCSPI2_BASE 0x4809a000 +#define OMAP2_MCSPI3_BASE 0x480b8000 +#define OMAP2_MCSPI4_BASE 0x480ba000 static struct omap2_mcspi_platform_config omap2_mcspi1_config = { .num_cs = 4, @@ -159,7 +139,7 @@ static struct resource omap2_mcspi1_resources[] = { }, }; -struct platform_device omap2_mcspi1 = { +static struct platform_device omap2_mcspi1 = { .name = "omap2_mcspi", .id = 1, .num_resources = ARRAY_SIZE(omap2_mcspi1_resources), @@ -181,7 +161,7 @@ static struct resource omap2_mcspi2_resources[] = { }, }; -struct platform_device omap2_mcspi2 = { +static struct platform_device omap2_mcspi2 = { .name = "omap2_mcspi", .id = 2, .num_resources = ARRAY_SIZE(omap2_mcspi2_resources), @@ -191,16 +171,162 @@ struct platform_device omap2_mcspi2 = { }, }; +#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) +static struct omap2_mcspi_platform_config omap2_mcspi3_config = { + .num_cs = 2, +}; + +static struct resource omap2_mcspi3_resources[] = { + { + .start = OMAP2_MCSPI3_BASE, + .end = OMAP2_MCSPI3_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device omap2_mcspi3 = { + .name = "omap2_mcspi", + .id = 3, + .num_resources = ARRAY_SIZE(omap2_mcspi3_resources), + .resource = omap2_mcspi3_resources, + .dev = { + .platform_data = &omap2_mcspi3_config, + }, +}; +#endif + +#ifdef CONFIG_ARCH_OMAP3 +static struct omap2_mcspi_platform_config omap2_mcspi4_config = { + .num_cs = 1, +}; + +static struct resource omap2_mcspi4_resources[] = { + { + .start = OMAP2_MCSPI4_BASE, + .end = OMAP2_MCSPI4_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device omap2_mcspi4 = { + .name = "omap2_mcspi", + .id = 4, + .num_resources = ARRAY_SIZE(omap2_mcspi4_resources), + .resource = omap2_mcspi4_resources, + .dev = { + .platform_data = &omap2_mcspi4_config, + }, +}; +#endif + static void omap_init_mcspi(void) { platform_device_register(&omap2_mcspi1); platform_device_register(&omap2_mcspi2); +#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) + platform_device_register(&omap2_mcspi3); +#endif +#ifdef CONFIG_ARCH_OMAP3 + platform_device_register(&omap2_mcspi4); +#endif } #else static inline void omap_init_mcspi(void) {} #endif +#ifdef CONFIG_SND_OMAP24XX_EAC + +#define OMAP2_EAC_BASE 0x48090000 + +static struct resource omap2_eac_resources[] = { + { + .start = OMAP2_EAC_BASE, + .end = OMAP2_EAC_BASE + 0x109, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device omap2_eac_device = { + .name = "omap24xx-eac", + .id = -1, + .num_resources = ARRAY_SIZE(omap2_eac_resources), + .resource = omap2_eac_resources, + .dev = { + .platform_data = NULL, + }, +}; + +void omap_init_eac(struct eac_platform_data *pdata) +{ + omap2_eac_device.dev.platform_data = pdata; + platform_device_register(&omap2_eac_device); +} + +#else +void omap_init_eac(struct eac_platform_data *pdata) {} +#endif + +#ifdef CONFIG_OMAP_SHA1_MD5 +static struct resource sha1_md5_resources[] = { + { + .start = OMAP24XX_SEC_SHA1MD5_BASE, + .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_24XX_SHA1MD5, + .flags = IORESOURCE_IRQ, + } +}; + +static struct platform_device sha1_md5_device = { + .name = "OMAP SHA1/MD5", + .id = -1, + .num_resources = ARRAY_SIZE(sha1_md5_resources), + .resource = sha1_md5_resources, +}; + +static void omap_init_sha1_md5(void) +{ + platform_device_register(&sha1_md5_device); +} +#else +static inline void omap_init_sha1_md5(void) { } +#endif + +#if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE) +#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430) +#define OMAP_HDQ_BASE 0x480B2000 +#endif +static struct resource omap_hdq_resources[] = { + { + .start = OMAP_HDQ_BASE, + .end = OMAP_HDQ_BASE + 0x1C, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_24XX_HDQ_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; +static struct platform_device omap_hdq_dev = { + .name = "omap_hdq", + .id = 0, + .dev = { + .platform_data = NULL, + }, + .num_resources = ARRAY_SIZE(omap_hdq_resources), + .resource = omap_hdq_resources, +}; +static inline void omap_hdq_init(void) +{ + (void) platform_device_register(&omap_hdq_dev); +} +#else +static inline void omap_hdq_init(void) {} +#endif + /*-------------------------------------------------------------------------*/ static int __init omap2_init_devices(void) @@ -208,10 +334,11 @@ static int __init omap2_init_devices(void) /* please keep these calls, and their implementations above, * in alphabetical order so they're easier to sort through. */ - omap_init_i2c(); omap_init_mbox(); omap_init_mcspi(); + omap_hdq_init(); omap_init_sti(); + omap_init_sha1_md5(); return 0; } diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index af1081a0b27c..763bdbeaf681 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -9,6 +9,8 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ +#undef DEBUG + #include <linux/kernel.h> #include <linux/init.h> #include <linux/err.h> @@ -16,20 +18,14 @@ #include <linux/ioport.h> #include <linux/spinlock.h> #include <linux/io.h> +#include <linux/module.h> #include <asm/mach-types.h> #include <mach/gpmc.h> -#undef DEBUG - -#ifdef CONFIG_ARCH_OMAP2420 -#define GPMC_BASE 0x6800a000 -#endif - -#ifdef CONFIG_ARCH_OMAP2430 -#define GPMC_BASE 0x6E000000 -#endif +#include <mach/sdrc.h> +/* GPMC register offsets */ #define GPMC_REVISION 0x00 #define GPMC_SYSCONFIG 0x10 #define GPMC_SYSSTATUS 0x14 @@ -51,7 +47,6 @@ #define GPMC_CS0 0x60 #define GPMC_CS_SIZE 0x30 -#define GPMC_CS_NUM 8 #define GPMC_MEM_START 0x00000000 #define GPMC_MEM_END 0x3FFFFFFF #define BOOT_ROM_SPACE 0x100000 /* 1MB */ @@ -64,12 +59,9 @@ static struct resource gpmc_cs_mem[GPMC_CS_NUM]; static DEFINE_SPINLOCK(gpmc_mem_lock); static unsigned gpmc_cs_map; -static void __iomem *gpmc_base = - (void __iomem *) IO_ADDRESS(GPMC_BASE); -static void __iomem *gpmc_cs_base = - (void __iomem *) IO_ADDRESS(GPMC_BASE) + GPMC_CS0; +static void __iomem *gpmc_base; -static struct clk *gpmc_fck; +static struct clk *gpmc_l3_clk; static void gpmc_write_reg(int idx, u32 val) { @@ -85,19 +77,32 @@ void gpmc_cs_write_reg(int cs, int idx, u32 val) { void __iomem *reg_addr; - reg_addr = gpmc_cs_base + (cs * GPMC_CS_SIZE) + idx; + reg_addr = gpmc_base + GPMC_CS0 + (cs * GPMC_CS_SIZE) + idx; __raw_writel(val, reg_addr); } u32 gpmc_cs_read_reg(int cs, int idx) { - return __raw_readl(gpmc_cs_base + (cs * GPMC_CS_SIZE) + idx); + void __iomem *reg_addr; + + reg_addr = gpmc_base + GPMC_CS0 + (cs * GPMC_CS_SIZE) + idx; + return __raw_readl(reg_addr); } +/* TODO: Add support for gpmc_fck to clock framework and use it */ unsigned long gpmc_get_fclk_period(void) { - /* In picoseconds */ - return 1000000000 / ((clk_get_rate(gpmc_fck)) / 1000); + unsigned long rate = clk_get_rate(gpmc_l3_clk); + + if (rate == 0) { + printk(KERN_WARNING "gpmc_l3_clk not enabled\n"); + return 0; + } + + rate /= 1000; + rate = 1000000000 / rate; /* In picoseconds */ + + return rate; } unsigned int gpmc_ns_to_ticks(unsigned int time_ns) @@ -110,6 +115,11 @@ unsigned int gpmc_ns_to_ticks(unsigned int time_ns) return (time_ns * 1000 + tick_ps - 1) / tick_ps; } +unsigned int gpmc_ticks_to_ns(unsigned int ticks) +{ + return ticks * gpmc_get_fclk_period() / 1000; +} + unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns) { unsigned long ticks = gpmc_ns_to_ticks(time_ns); @@ -210,6 +220,11 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t) GPMC_SET_ONE(GPMC_CS_CONFIG5, 24, 27, page_burst_access); + if (cpu_is_omap34xx()) { + GPMC_SET_ONE(GPMC_CS_CONFIG6, 16, 19, wr_data_mux_bus); + GPMC_SET_ONE(GPMC_CS_CONFIG6, 24, 28, wr_access); + } + /* caller is expected to have initialized CONFIG1 to cover * at least sync vs async */ @@ -350,6 +365,7 @@ out: spin_unlock(&gpmc_mem_lock); return r; } +EXPORT_SYMBOL(gpmc_cs_request); void gpmc_cs_free(int cs) { @@ -365,8 +381,9 @@ void gpmc_cs_free(int cs) gpmc_cs_set_reserved(cs, 0); spin_unlock(&gpmc_mem_lock); } +EXPORT_SYMBOL(gpmc_cs_free); -void __init gpmc_mem_init(void) +static void __init gpmc_mem_init(void) { int cs; unsigned long boot_rom_space = 0; @@ -396,12 +413,33 @@ void __init gpmc_mem_init(void) void __init gpmc_init(void) { u32 l; + char *ck; + + if (cpu_is_omap24xx()) { + ck = "core_l3_ck"; + if (cpu_is_omap2420()) + l = OMAP2420_GPMC_BASE; + else + l = OMAP34XX_GPMC_BASE; + } else if (cpu_is_omap34xx()) { + ck = "gpmc_fck"; + l = OMAP34XX_GPMC_BASE; + } - gpmc_fck = clk_get(NULL, "gpmc_fck"); /* Always on ENABLE_ON_INIT */ - if (IS_ERR(gpmc_fck)) - WARN_ON(1); - else - clk_enable(gpmc_fck); + gpmc_l3_clk = clk_get(NULL, ck); + if (IS_ERR(gpmc_l3_clk)) { + printk(KERN_ERR "Could not get GPMC clock %s\n", ck); + return -ENODEV; + } + + gpmc_base = ioremap(l, SZ_4K); + if (!gpmc_base) { + clk_put(gpmc_l3_clk); + printk(KERN_ERR "Could not get GPMC register memory\n"); + return -ENOMEM; + } + + BUG_ON(IS_ERR(gpmc_l3_clk)); l = gpmc_read_reg(GPMC_REVISION); printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f); diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 209177c7f22f..bf45ff39a7b5 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -18,24 +18,15 @@ #include <asm/cputype.h> +#include <mach/common.h> #include <mach/control.h> #include <mach/cpu.h> -#if defined(CONFIG_ARCH_OMAP2420) -#define TAP_BASE io_p2v(0x48014000) -#elif defined(CONFIG_ARCH_OMAP2430) -#define TAP_BASE io_p2v(0x4900A000) -#elif defined(CONFIG_ARCH_OMAP34XX) -#define TAP_BASE io_p2v(0x4830A000) -#endif +static u32 class; +static void __iomem *tap_base; +static u16 tap_prod_id; #define OMAP_TAP_IDCODE 0x0204 -#if defined(CONFIG_ARCH_OMAP34XX) -#define OMAP_TAP_PROD_ID 0x0210 -#else -#define OMAP_TAP_PROD_ID 0x0208 -#endif - #define OMAP_TAP_DIE_ID_0 0x0218 #define OMAP_TAP_DIE_ID_1 0x021C #define OMAP_TAP_DIE_ID_2 0x0220 @@ -94,18 +85,24 @@ static u32 __init read_tap_reg(int reg) * it means its Cortex r0p0 which is 3430 ES1 */ if ((((cpuid >> 4) & 0xFFF) == 0xC08) && ((cpuid & 0xF) == 0x0)) { + + if (reg == tap_prod_id) { + regval = 0x000F00F0; + goto out; + } + switch (reg) { case OMAP_TAP_IDCODE : regval = 0x0B7AE02F; break; /* Making DevType as 0xF in ES1 to differ from ES2 */ - case OMAP_TAP_PROD_ID : regval = 0x000F00F0; break; case OMAP_TAP_DIE_ID_0: regval = 0x01000000; break; case OMAP_TAP_DIE_ID_1: regval = 0x1012d687; break; case OMAP_TAP_DIE_ID_2: regval = 0x00000000; break; case OMAP_TAP_DIE_ID_3: regval = 0x2d2c0000; break; } } else - regval = __raw_readl(TAP_BASE + reg); + regval = __raw_readl(tap_base + reg); +out: return regval; } @@ -204,7 +201,7 @@ void __init omap2_check_revision(void) u8 rev; idcode = read_tap_reg(OMAP_TAP_IDCODE); - prod_id = read_tap_reg(OMAP_TAP_PROD_ID); + prod_id = read_tap_reg(tap_prod_id); hawkeye = (idcode >> 12) & 0xffff; rev = (idcode >> 28) & 0x0f; dev_type = (prod_id >> 16) & 0x0f; @@ -269,3 +266,13 @@ void __init omap2_check_revision(void) } +void __init omap2_set_globals_tap(struct omap_globals *omap2_globals) +{ + class = omap2_globals->class; + tap_base = omap2_globals->tap; + + if (class == 0x3430) + tap_prod_id = 0x0210; + else + tap_prod_id = 0x0208; +} diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 7c3d6289c05f..5ea64f926ed5 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -4,8 +4,11 @@ * OMAP2 I/O mapping code * * Copyright (C) 2005 Nokia Corporation - * Author: Juha Yrjölä <juha.yrjola@nokia.com> - * Updated map desc to add 2430 support : <x0khasim@ti.com> + * Copyright (C) 2007 Texas Instruments + * + * Author: + * Juha Yrjola <juha.yrjola@nokia.com> + * Syed Khasim <x0khasim@ti.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -23,19 +26,26 @@ #include <mach/mux.h> #include <mach/omapfb.h> +#include <mach/sram.h> + +#include "memory.h" + +#include "clock.h" + +#include <mach/powerdomain.h> + +#include "powerdomains.h" -extern void omap_sram_init(void); -extern int omap2_clk_init(void); -extern void omap2_check_revision(void); -extern void omap2_init_memory(void); -extern void gpmc_init(void); -extern void omapfb_reserve_sdram(void); +#include <mach/clockdomain.h> +#include "clockdomains.h" /* * The machine specific code may provide the extra mapping besides the * default mapping provided here. */ -static struct map_desc omap2_io_desc[] __initdata = { + +#ifdef CONFIG_ARCH_OMAP24XX +static struct map_desc omap24xx_io_desc[] __initdata = { { .virtual = L3_24XX_VIRT, .pfn = __phys_to_pfn(L3_24XX_PHYS), @@ -43,12 +53,39 @@ static struct map_desc omap2_io_desc[] __initdata = { .type = MT_DEVICE }, { - .virtual = L4_24XX_VIRT, - .pfn = __phys_to_pfn(L4_24XX_PHYS), - .length = L4_24XX_SIZE, - .type = MT_DEVICE + .virtual = L4_24XX_VIRT, + .pfn = __phys_to_pfn(L4_24XX_PHYS), + .length = L4_24XX_SIZE, + .type = MT_DEVICE }, +}; + +#ifdef CONFIG_ARCH_OMAP2420 +static struct map_desc omap242x_io_desc[] __initdata = { + { + .virtual = DSP_MEM_24XX_VIRT, + .pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS), + .length = DSP_MEM_24XX_SIZE, + .type = MT_DEVICE + }, + { + .virtual = DSP_IPI_24XX_VIRT, + .pfn = __phys_to_pfn(DSP_IPI_24XX_PHYS), + .length = DSP_IPI_24XX_SIZE, + .type = MT_DEVICE + }, + { + .virtual = DSP_MMU_24XX_VIRT, + .pfn = __phys_to_pfn(DSP_MMU_24XX_PHYS), + .length = DSP_MMU_24XX_SIZE, + .type = MT_DEVICE + }, +}; + +#endif + #ifdef CONFIG_ARCH_OMAP2430 +static struct map_desc omap243x_io_desc[] __initdata = { { .virtual = L4_WK_243X_VIRT, .pfn = __phys_to_pfn(L4_WK_243X_PHYS), @@ -61,30 +98,90 @@ static struct map_desc omap2_io_desc[] __initdata = { .length = OMAP243X_GPMC_SIZE, .type = MT_DEVICE }, + { + .virtual = OMAP243X_SDRC_VIRT, + .pfn = __phys_to_pfn(OMAP243X_SDRC_PHYS), + .length = OMAP243X_SDRC_SIZE, + .type = MT_DEVICE + }, + { + .virtual = OMAP243X_SMS_VIRT, + .pfn = __phys_to_pfn(OMAP243X_SMS_PHYS), + .length = OMAP243X_SMS_SIZE, + .type = MT_DEVICE + }, +}; +#endif #endif + +#ifdef CONFIG_ARCH_OMAP34XX +static struct map_desc omap34xx_io_desc[] __initdata = { { - .virtual = DSP_MEM_24XX_VIRT, - .pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS), - .length = DSP_MEM_24XX_SIZE, + .virtual = L3_34XX_VIRT, + .pfn = __phys_to_pfn(L3_34XX_PHYS), + .length = L3_34XX_SIZE, .type = MT_DEVICE }, { - .virtual = DSP_IPI_24XX_VIRT, - .pfn = __phys_to_pfn(DSP_IPI_24XX_PHYS), - .length = DSP_IPI_24XX_SIZE, + .virtual = L4_34XX_VIRT, + .pfn = __phys_to_pfn(L4_34XX_PHYS), + .length = L4_34XX_SIZE, .type = MT_DEVICE }, { - .virtual = DSP_MMU_24XX_VIRT, - .pfn = __phys_to_pfn(DSP_MMU_24XX_PHYS), - .length = DSP_MMU_24XX_SIZE, + .virtual = L4_WK_34XX_VIRT, + .pfn = __phys_to_pfn(L4_WK_34XX_PHYS), + .length = L4_WK_34XX_SIZE, + .type = MT_DEVICE + }, + { + .virtual = OMAP34XX_GPMC_VIRT, + .pfn = __phys_to_pfn(OMAP34XX_GPMC_PHYS), + .length = OMAP34XX_GPMC_SIZE, .type = MT_DEVICE - } + }, + { + .virtual = OMAP343X_SMS_VIRT, + .pfn = __phys_to_pfn(OMAP343X_SMS_PHYS), + .length = OMAP343X_SMS_SIZE, + .type = MT_DEVICE + }, + { + .virtual = OMAP343X_SDRC_VIRT, + .pfn = __phys_to_pfn(OMAP343X_SDRC_PHYS), + .length = OMAP343X_SDRC_SIZE, + .type = MT_DEVICE + }, + { + .virtual = L4_PER_34XX_VIRT, + .pfn = __phys_to_pfn(L4_PER_34XX_PHYS), + .length = L4_PER_34XX_SIZE, + .type = MT_DEVICE + }, + { + .virtual = L4_EMU_34XX_VIRT, + .pfn = __phys_to_pfn(L4_EMU_34XX_PHYS), + .length = L4_EMU_34XX_SIZE, + .type = MT_DEVICE + }, }; +#endif void __init omap2_map_common_io(void) { - iotable_init(omap2_io_desc, ARRAY_SIZE(omap2_io_desc)); +#if defined(CONFIG_ARCH_OMAP2420) + iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); + iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc)); +#endif + +#if defined(CONFIG_ARCH_OMAP2430) + iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); + iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc)); +#endif + +#if defined(CONFIG_ARCH_OMAP34XX) + iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc)); +#endif /* Normally devicemaps_init() would flush caches and tlb after * mdesc->map_io(), but we must also do it here because of the CPU @@ -101,12 +198,9 @@ void __init omap2_map_common_io(void) void __init omap2_init_common_hw(void) { omap2_mux_init(); + pwrdm_init(powerdomains_omap); + clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps); omap2_clk_init(); -/* - * Need to Fix this for 2430 - */ -#ifndef CONFIG_ARCH_OMAP2430 omap2_init_memory(); -#endif gpmc_init(); } diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 196a9565a8dc..d354e0fe4477 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -16,14 +16,20 @@ #include <linux/io.h> #include <mach/hardware.h> #include <asm/mach/irq.h> -#include <asm/irq.h> -#define INTC_REVISION 0x0000 -#define INTC_SYSCONFIG 0x0010 -#define INTC_SYSSTATUS 0x0014 -#define INTC_CONTROL 0x0048 -#define INTC_MIR_CLEAR0 0x0088 -#define INTC_MIR_SET0 0x008c + +/* selected INTC register offsets */ + +#define INTC_REVISION 0x0000 +#define INTC_SYSCONFIG 0x0010 +#define INTC_SYSSTATUS 0x0014 +#define INTC_CONTROL 0x0048 +#define INTC_MIR_CLEAR0 0x0088 +#define INTC_MIR_SET0 0x008c +#define INTC_PENDING_IRQ0 0x0098 + +/* Number of IRQ state bits in each MIR register */ +#define IRQ_BITS_PER_REG 32 /* * OMAP2 has a number of different interrupt controllers, each interrupt @@ -32,48 +38,50 @@ * for each bank.. when in doubt, consult the TRM. */ static struct omap_irq_bank { - unsigned long base_reg; + void __iomem *base_reg; unsigned int nr_irqs; } __attribute__ ((aligned(4))) irq_banks[] = { { /* MPU INTC */ - .base_reg = IO_ADDRESS(OMAP24XX_IC_BASE), + .base_reg = 0, .nr_irqs = 96, - }, { - /* XXX: DSP INTC */ - } + }, }; +/* INTC bank register get/set */ + +static void intc_bank_write_reg(u32 val, struct omap_irq_bank *bank, u16 reg) +{ + __raw_writel(val, bank->base_reg + reg); +} + +static u32 intc_bank_read_reg(struct omap_irq_bank *bank, u16 reg) +{ + return __raw_readl(bank->base_reg + reg); +} + /* XXX: FIQ and additional INTC support (only MPU at the moment) */ static void omap_ack_irq(unsigned int irq) { - __raw_writel(0x1, irq_banks[0].base_reg + INTC_CONTROL); + intc_bank_write_reg(0x1, &irq_banks[0], INTC_CONTROL); } static void omap_mask_irq(unsigned int irq) { - int offset = (irq >> 5) << 5; + int offset = irq & (~(IRQ_BITS_PER_REG - 1)); - if (irq >= 64) { - irq %= 64; - } else if (irq >= 32) { - irq %= 32; - } + irq &= (IRQ_BITS_PER_REG - 1); - __raw_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_SET0 + offset); + intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_SET0 + offset); } static void omap_unmask_irq(unsigned int irq) { - int offset = (irq >> 5) << 5; + int offset = irq & (~(IRQ_BITS_PER_REG - 1)); - if (irq >= 64) { - irq %= 64; - } else if (irq >= 32) { - irq %= 32; - } + irq &= (IRQ_BITS_PER_REG - 1); - __raw_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_CLEAR0 + offset); + intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 + offset); } static void omap_mask_ack_irq(unsigned int irq) @@ -93,20 +101,20 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank) { unsigned long tmp; - tmp = __raw_readl(bank->base_reg + INTC_REVISION) & 0xff; - printk(KERN_INFO "IRQ: Found an INTC at 0x%08lx " + tmp = intc_bank_read_reg(bank, INTC_REVISION) & 0xff; + printk(KERN_INFO "IRQ: Found an INTC at 0x%p " "(revision %ld.%ld) with %d interrupts\n", bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs); - tmp = __raw_readl(bank->base_reg + INTC_SYSCONFIG); + tmp = intc_bank_read_reg(bank, INTC_SYSCONFIG); tmp |= 1 << 1; /* soft reset */ - __raw_writel(tmp, bank->base_reg + INTC_SYSCONFIG); + intc_bank_write_reg(tmp, bank, INTC_SYSCONFIG); - while (!(__raw_readl(bank->base_reg + INTC_SYSSTATUS) & 0x1)) + while (!(intc_bank_read_reg(bank, INTC_SYSSTATUS) & 0x1)) /* Wait for reset to complete */; /* Enable autoidle */ - __raw_writel(1 << 0, bank->base_reg + INTC_SYSCONFIG); + intc_bank_write_reg(1 << 0, bank, INTC_SYSCONFIG); } void __init omap_init_irq(void) @@ -118,9 +126,10 @@ void __init omap_init_irq(void) for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { struct omap_irq_bank *bank = irq_banks + i; - /* XXX */ - if (!bank->base_reg) - continue; + if (cpu_is_omap24xx()) + bank->base_reg = OMAP2_IO_ADDRESS(OMAP24XX_IC_BASE); + else if (cpu_is_omap34xx()) + bank->base_reg = OMAP2_IO_ADDRESS(OMAP34XX_IC_BASE); omap_irq_bank_init_one(bank); diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index b261f1f80b5e..cae3ebe249b3 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -89,6 +89,30 @@ static struct mcbsp_internal_clk omap_mcbsp_clks[] = { .disable = omap_mcbsp_clk_disable, }, }, + { + .clk = { + .name = "mcbsp_clk", + .id = 3, + .enable = omap_mcbsp_clk_enable, + .disable = omap_mcbsp_clk_disable, + }, + }, + { + .clk = { + .name = "mcbsp_clk", + .id = 4, + .enable = omap_mcbsp_clk_enable, + .disable = omap_mcbsp_clk_disable, + }, + }, + { + .clk = { + .name = "mcbsp_clk", + .id = 5, + .enable = omap_mcbsp_clk_enable, + .disable = omap_mcbsp_clk_disable, + }, + }, }; #define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks) @@ -117,25 +141,14 @@ static void omap2_mcbsp_request(unsigned int id) omap2_mcbsp2_mux_setup(); } -static int omap2_mcbsp_check(unsigned int id) -{ - if (id > OMAP_MAX_MCBSP_COUNT - 1) { - printk(KERN_ERR "OMAP-McBSP: McBSP%d doesn't exist\n", id + 1); - return -ENODEV; - } - return 0; -} - static struct omap_mcbsp_ops omap2_mcbsp_ops = { .request = omap2_mcbsp_request, - .check = omap2_mcbsp_check, }; -#ifdef CONFIG_ARCH_OMAP24XX -static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = { +#ifdef CONFIG_ARCH_OMAP2420 +static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = { { .phys_base = OMAP24XX_MCBSP1_BASE, - .virt_base = IO_ADDRESS(OMAP24XX_MCBSP1_BASE), .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, .rx_irq = INT_24XX_MCBSP1_IRQ_RX, @@ -145,7 +158,6 @@ static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = { }, { .phys_base = OMAP24XX_MCBSP2_BASE, - .virt_base = IO_ADDRESS(OMAP24XX_MCBSP2_BASE), .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, .rx_irq = INT_24XX_MCBSP2_IRQ_RX, @@ -154,17 +166,70 @@ static struct omap_mcbsp_platform_data omap24xx_mcbsp_pdata[] = { .clk_name = "mcbsp_clk", }, }; -#define OMAP24XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap24xx_mcbsp_pdata) +#define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata) #else -#define omap24xx_mcbsp_pdata NULL -#define OMAP24XX_MCBSP_PDATA_SZ 0 +#define omap2420_mcbsp_pdata NULL +#define OMAP2420_MCBSP_PDATA_SZ 0 +#endif + +#ifdef CONFIG_ARCH_OMAP2430 +static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { + { + .phys_base = OMAP24XX_MCBSP1_BASE, + .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, + .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, + .rx_irq = INT_24XX_MCBSP1_IRQ_RX, + .tx_irq = INT_24XX_MCBSP1_IRQ_TX, + .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", + }, + { + .phys_base = OMAP24XX_MCBSP2_BASE, + .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, + .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, + .rx_irq = INT_24XX_MCBSP2_IRQ_RX, + .tx_irq = INT_24XX_MCBSP2_IRQ_TX, + .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", + }, + { + .phys_base = OMAP2430_MCBSP3_BASE, + .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX, + .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX, + .rx_irq = INT_24XX_MCBSP3_IRQ_RX, + .tx_irq = INT_24XX_MCBSP3_IRQ_TX, + .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", + }, + { + .phys_base = OMAP2430_MCBSP4_BASE, + .dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX, + .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX, + .rx_irq = INT_24XX_MCBSP4_IRQ_RX, + .tx_irq = INT_24XX_MCBSP4_IRQ_TX, + .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", + }, + { + .phys_base = OMAP2430_MCBSP5_BASE, + .dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX, + .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX, + .rx_irq = INT_24XX_MCBSP5_IRQ_RX, + .tx_irq = INT_24XX_MCBSP5_IRQ_TX, + .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", + }, +}; +#define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata) +#else +#define omap2430_mcbsp_pdata NULL +#define OMAP2430_MCBSP_PDATA_SZ 0 #endif #ifdef CONFIG_ARCH_OMAP34XX static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { { .phys_base = OMAP34XX_MCBSP1_BASE, - .virt_base = IO_ADDRESS(OMAP34XX_MCBSP1_BASE), .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, .rx_irq = INT_24XX_MCBSP1_IRQ_RX, @@ -174,7 +239,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { }, { .phys_base = OMAP34XX_MCBSP2_BASE, - .virt_base = IO_ADDRESS(OMAP34XX_MCBSP2_BASE), .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, .rx_irq = INT_24XX_MCBSP2_IRQ_RX, @@ -182,6 +246,33 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .ops = &omap2_mcbsp_ops, .clk_name = "mcbsp_clk", }, + { + .phys_base = OMAP34XX_MCBSP3_BASE, + .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX, + .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX, + .rx_irq = INT_24XX_MCBSP3_IRQ_RX, + .tx_irq = INT_24XX_MCBSP3_IRQ_TX, + .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", + }, + { + .phys_base = OMAP34XX_MCBSP4_BASE, + .dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX, + .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX, + .rx_irq = INT_24XX_MCBSP4_IRQ_RX, + .tx_irq = INT_24XX_MCBSP4_IRQ_TX, + .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", + }, + { + .phys_base = OMAP34XX_MCBSP5_BASE, + .dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX, + .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX, + .rx_irq = INT_24XX_MCBSP5_IRQ_RX, + .tx_irq = INT_24XX_MCBSP5_IRQ_TX, + .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", + }, }; #define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) #else @@ -189,7 +280,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { #define OMAP34XX_MCBSP_PDATA_SZ 0 #endif -int __init omap2_mcbsp_init(void) +static int __init omap2_mcbsp_init(void) { int i; @@ -199,10 +290,24 @@ int __init omap2_mcbsp_init(void) clk_register(&omap_mcbsp_clks[i].clk); } - if (cpu_is_omap24xx()) - omap_mcbsp_register_board_cfg(omap24xx_mcbsp_pdata, - OMAP24XX_MCBSP_PDATA_SZ); + if (cpu_is_omap2420()) + omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ; + if (cpu_is_omap2430()) + omap_mcbsp_count = OMAP2430_MCBSP_PDATA_SZ; + if (cpu_is_omap34xx()) + omap_mcbsp_count = OMAP34XX_MCBSP_PDATA_SZ; + + mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), + GFP_KERNEL); + if (!mcbsp_ptr) + return -ENOMEM; + if (cpu_is_omap2420()) + omap_mcbsp_register_board_cfg(omap2420_mcbsp_pdata, + OMAP2420_MCBSP_PDATA_SZ); + if (cpu_is_omap2430()) + omap_mcbsp_register_board_cfg(omap2430_mcbsp_pdata, + OMAP2430_MCBSP_PDATA_SZ); if (cpu_is_omap34xx()) omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata, OMAP34XX_MCBSP_PDATA_SZ); diff --git a/arch/arm/mach-omap2/memory.c b/arch/arm/mach-omap2/memory.c index ab1462b02e6e..882c70224292 100644 --- a/arch/arm/mach-omap2/memory.c +++ b/arch/arm/mach-omap2/memory.c @@ -101,6 +101,17 @@ u32 omap2_reprogram_sdrc(u32 level, u32 force) return prev; } +#if !defined(CONFIG_ARCH_OMAP2) +void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, + u32 base_cs, u32 force_unlock) +{ +} +void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, + u32 mem_type) +{ +} +#endif + void omap2_init_memory_params(u32 force_lock_to_unlock_mode) { unsigned long dll_cnt; @@ -165,6 +176,9 @@ void __init omap2_init_memory(void) { u32 l; + if (!cpu_is_omap2420()) + return; + l = sms_read_reg(SMS_SYSCONFIG); l &= ~(0x3 << 3); l |= (0x2 << 3); diff --git a/arch/arm/mach-omap2/memory.h b/arch/arm/mach-omap2/memory.h index 9a280b50a893..bb3db80a7c46 100644 --- a/arch/arm/mach-omap2/memory.h +++ b/arch/arm/mach-omap2/memory.h @@ -14,6 +14,9 @@ * published by the Free Software Foundation. */ +#ifndef ARCH_ARM_MACH_OMAP2_MEMORY_H +#define ARCH_ARM_MACH_OMAP2_MEMORY_H + /* Memory timings */ #define M_DDR 1 #define M_LOCK_CTRL (1 << 2) @@ -34,3 +37,7 @@ extern u32 omap2_memory_get_fast_dll_ctrl(void); extern u32 omap2_memory_get_type(void); u32 omap2_dll_force_needed(void); u32 omap2_reprogram_sdrc(u32 level, u32 force); +void __init omap2_init_memory(void); +void __init gpmc_init(void); + +#endif diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 6b7d672058b9..b1393673d95d 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -1,7 +1,7 @@ /* * linux/arch/arm/mach-omap2/mux.c * - * OMAP2 pin multiplexing configurations + * OMAP2 and OMAP3 pin multiplexing configurations * * Copyright (C) 2004 - 2008 Texas Instruments Inc. * Copyright (C) 2003 - 2008 Nokia Corporation @@ -220,16 +220,222 @@ MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0, 0, 0, 1) #define OMAP24XX_PINS_SZ 0 #endif /* CONFIG_ARCH_OMAP24XX */ -#define OMAP24XX_PULL_ENA (1 << 3) -#define OMAP24XX_PULL_UP (1 << 4) +#ifdef CONFIG_ARCH_OMAP34XX +static struct pin_config __initdata_or_module omap34xx_pins[] = { +/* + * Name, reg-offset, + * mux-mode | [active-mode | off-mode] + */ + +/* 34xx I2C */ +MUX_CFG_34XX("K21_34XX_I2C1_SCL", 0x1ba, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("J21_34XX_I2C1_SDA", 0x1bc, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AF15_34XX_I2C2_SCL", 0x1be, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AE15_34XX_I2C2_SDA", 0x1c0, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AF14_34XX_I2C3_SCL", 0x1c2, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AG14_34XX_I2C3_SDA", 0x1c4, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AD26_34XX_I2C4_SCL", 0xa00, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AE26_34XX_I2C4_SDA", 0xa02, + OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP) + +/* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/ +MUX_CFG_34XX("Y8_3430_USB1HS_PHY_CLK", 0x5da, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT) +MUX_CFG_34XX("Y9_3430_USB1HS_PHY_STP", 0x5d8, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT) +MUX_CFG_34XX("AA14_3430_USB1HS_PHY_DIR", 0x5ec, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AA11_3430_USB1HS_PHY_NXT", 0x5ee, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W13_3430_USB1HS_PHY_D0", 0x5dc, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W12_3430_USB1HS_PHY_D1", 0x5de, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W11_3430_USB1HS_PHY_D2", 0x5e0, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y11_3430_USB1HS_PHY_D3", 0x5ea, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W9_3430_USB1HS_PHY_D4", 0x5e4, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y12_3430_USB1HS_PHY_D5", 0x5e6, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W8_3430_USB1HS_PHY_D6", 0x5e8, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y13_3430_USB1HS_PHY_D7", 0x5e2, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) + +/* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/ +MUX_CFG_34XX("AA8_3430_USB2HS_PHY_CLK", 0x5f0, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT) +MUX_CFG_34XX("AA10_3430_USB2HS_PHY_STP", 0x5f2, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT) +MUX_CFG_34XX("AA9_3430_USB2HS_PHY_DIR", 0x5f4, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB11_3430_USB2HS_PHY_NXT", 0x5f6, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB10_3430_USB2HS_PHY_D0", 0x5f8, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB9_3430_USB2HS_PHY_D1", 0x5fa, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W3_3430_USB2HS_PHY_D2", 0x1d4, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("T4_3430_USB2HS_PHY_D3", 0x1de, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("T3_3430_USB2HS_PHY_D4", 0x1d8, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("R3_3430_USB2HS_PHY_D5", 0x1da, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("R4_3430_USB2HS_PHY_D6", 0x1dc, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("T2_3430_USB2HS_PHY_D7", 0x1d6, + OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN) + +/* TLL - HSUSB: 12-pin TLL Port 1*/ +MUX_CFG_34XX("Y8_3430_USB1HS_TLL_CLK", 0x5da, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y9_3430_USB1HS_TLL_STP", 0x5d8, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AA14_3430_USB1HS_TLL_DIR", 0x5ec, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AA11_3430_USB1HS_TLL_NXT", 0x5ee, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W13_3430_USB1HS_TLL_D0", 0x5dc, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W12_3430_USB1HS_TLL_D1", 0x5de, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W11_3430_USB1HS_TLL_D2", 0x5e0, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y11_3430_USB1HS_TLL_D3", 0x5ea, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W9_3430_USB1HS_TLL_D4", 0x5e4, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y12_3430_USB1HS_TLL_D5", 0x5e6, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W8_3430_USB1HS_TLL_D6", 0x5e8, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y13_3430_USB1HS_TLL_D7", 0x5e2, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) + +/* TLL - HSUSB: 12-pin TLL Port 2*/ +MUX_CFG_34XX("AA8_3430_USB2HS_TLL_CLK", 0x5f0, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AA10_3430_USB2HS_TLL_STP", 0x5f2, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AA9_3430_USB2HS_TLL_DIR", 0x5f4, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB11_3430_USB2HS_TLL_NXT", 0x5f6, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB10_3430_USB2HS_TLL_D0", 0x5f8, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB9_3430_USB2HS_TLL_D1", 0x5fa, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W3_3430_USB2HS_TLL_D2", 0x1d4, + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("T4_3430_USB2HS_TLL_D3", 0x1de, + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("T3_3430_USB2HS_TLL_D4", 0x1d8, + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("R3_3430_USB2HS_TLL_D5", 0x1da, + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("R4_3430_USB2HS_TLL_D6", 0x1dc, + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("T2_3430_USB2HS_TLL_D7", 0x1d6, + OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN) + +/* TLL - HSUSB: 12-pin TLL Port 3*/ +MUX_CFG_34XX("AA6_3430_USB3HS_TLL_CLK", 0x180, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB3_3430_USB3HS_TLL_STP", 0x166, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLUP) +MUX_CFG_34XX("AA3_3430_USB3HS_TLL_DIR", 0x168, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y3_3430_USB3HS_TLL_NXT", 0x16a, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AA5_3430_USB3HS_TLL_D0", 0x186, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y4_3430_USB3HS_TLL_D1", 0x184, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y5_3430_USB3HS_TLL_D2", 0x188, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W5_3430_USB3HS_TLL_D3", 0x18a, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB12_3430_USB3HS_TLL_D4", 0x16c, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB13_3430_USB3HS_TLL_D5", 0x16e, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AA13_3430_USB3HS_TLL_D6", 0x170, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AA12_3430_USB3HS_TLL_D7", 0x172, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) + +/* PHY FSUSB: FS Serial for Port 1 (multiple PHY modes supported) */ +MUX_CFG_34XX("AF10_3430_USB1FS_PHY_MM1_RXDP", 0x5d8, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AG9_3430_USB1FS_PHY_MM1_RXDM", 0x5ee, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W13_3430_USB1FS_PHY_MM1_RXRCV", 0x5dc, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W12_3430_USB1FS_PHY_MM1_TXSE0", 0x5de, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W11_3430_USB1FS_PHY_MM1_TXDAT", 0x5e0, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("Y11_3430_USB1FS_PHY_MM1_TXEN_N", 0x5ea, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_OUTPUT) + +/* PHY FSUSB: FS Serial for Port 2 (multiple PHY modes supported) */ +MUX_CFG_34XX("AF7_3430_USB2FS_PHY_MM2_RXDP", 0x5f2, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AH7_3430_USB2FS_PHY_MM2_RXDM", 0x5f6, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB10_3430_USB2FS_PHY_MM2_RXRCV", 0x5f8, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AB9_3430_USB2FS_PHY_MM2_TXSE0", 0x5fa, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("W3_3430_USB2FS_PHY_MM2_TXDAT", 0x1d4, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("T4_3430_USB2FS_PHY_MM2_TXEN_N", 0x1de, + OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_OUTPUT) + +/* PHY FSUSB: FS Serial for Port 3 (multiple PHY modes supported) */ +MUX_CFG_34XX("AH3_3430_USB3FS_PHY_MM3_RXDP", 0x166, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AE3_3430_USB3FS_PHY_MM3_RXDM", 0x16a, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AD1_3430_USB3FS_PHY_MM3_RXRCV", 0x186, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AE1_3430_USB3FS_PHY_MM3_TXSE0", 0x184, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AD2_3430_USB3FS_PHY_MM3_TXDAT", 0x188, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN) +MUX_CFG_34XX("AC1_3430_USB3FS_PHY_MM3_TXEN_N", 0x18a, + OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_OUTPUT) + +}; + +#define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins) + +#else +#define omap34xx_pins NULL +#define OMAP34XX_PINS_SZ 0 +#endif /* CONFIG_ARCH_OMAP34XX */ #if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS) -void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u8 reg) +static void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u16 reg) { u16 orig; u8 warn = 0, debug = 0; - orig = omap_ctrl_readb(cfg->mux_reg); + if (cpu_is_omap24xx()) + orig = omap_ctrl_readb(cfg->mux_reg); + else + orig = omap_ctrl_readw(cfg->mux_reg); #ifdef CONFIG_OMAP_MUX_DEBUG debug = cfg->debug; @@ -255,9 +461,9 @@ int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg) spin_lock_irqsave(&mux_spin_lock, flags); reg |= cfg->mask & 0x7; if (cfg->pull_val) - reg |= OMAP24XX_PULL_ENA; + reg |= OMAP2_PULL_ENA; if (cfg->pu_pd_val) - reg |= OMAP24XX_PULL_UP; + reg |= OMAP2_PULL_UP; omap2_cfg_debug(cfg, reg); omap_ctrl_writeb(reg, cfg->mux_reg); spin_unlock_irqrestore(&mux_spin_lock, flags); @@ -265,7 +471,26 @@ int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg) return 0; } #else -#define omap24xx_cfg_reg 0 +#define omap24xx_cfg_reg NULL +#endif + +#ifdef CONFIG_ARCH_OMAP34XX +static int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg) +{ + static DEFINE_SPINLOCK(mux_spin_lock); + unsigned long flags; + u16 reg = 0; + + spin_lock_irqsave(&mux_spin_lock, flags); + reg |= cfg->mux_val; + omap2_cfg_debug(cfg, reg); + omap_ctrl_writew(reg, cfg->mux_reg); + spin_unlock_irqrestore(&mux_spin_lock, flags); + + return 0; +} +#else +#define omap34xx_cfg_reg NULL #endif int __init omap2_mux_init(void) @@ -274,6 +499,10 @@ int __init omap2_mux_init(void) arch_mux_cfg.pins = omap24xx_pins; arch_mux_cfg.size = OMAP24XX_PINS_SZ; arch_mux_cfg.cfg_reg = omap24xx_cfg_reg; + } else if (cpu_is_omap34xx()) { + arch_mux_cfg.pins = omap34xx_pins; + arch_mux_cfg.size = OMAP34XX_PINS_SZ; + arch_mux_cfg.cfg_reg = omap34xx_cfg_reg; } return omap_mux_register(&arch_mux_cfg); diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c new file mode 100644 index 000000000000..73e2971b1757 --- /dev/null +++ b/arch/arm/mach-omap2/powerdomain.c @@ -0,0 +1,1113 @@ +/* + * OMAP powerdomain control + * + * Copyright (C) 2007-2008 Texas Instruments, Inc. + * Copyright (C) 2007-2008 Nokia Corporation + * + * Written by Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifdef CONFIG_OMAP_DEBUG_POWERDOMAIN +# define DEBUG +#endif + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/types.h> +#include <linux/delay.h> +#include <linux/spinlock.h> +#include <linux/list.h> +#include <linux/errno.h> +#include <linux/err.h> +#include <linux/io.h> + +#include <asm/atomic.h> + +#include "cm.h" +#include "cm-regbits-34xx.h" +#include "prm.h" +#include "prm-regbits-34xx.h" + +#include <mach/cpu.h> +#include <mach/powerdomain.h> +#include <mach/clockdomain.h> + +/* pwrdm_list contains all registered struct powerdomains */ +static LIST_HEAD(pwrdm_list); + +/* + * pwrdm_rwlock protects pwrdm_list add and del ops - also reused to + * protect pwrdm_clkdms[] during clkdm add/del ops + */ +static DEFINE_RWLOCK(pwrdm_rwlock); + + +/* Private functions */ + +static u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) +{ + u32 v; + + v = prm_read_mod_reg(domain, idx); + v &= mask; + v >>= __ffs(mask); + + return v; +} + +static struct powerdomain *_pwrdm_lookup(const char *name) +{ + struct powerdomain *pwrdm, *temp_pwrdm; + + pwrdm = NULL; + + list_for_each_entry(temp_pwrdm, &pwrdm_list, node) { + if (!strcmp(name, temp_pwrdm->name)) { + pwrdm = temp_pwrdm; + break; + } + } + + return pwrdm; +} + +/* _pwrdm_deps_lookup - look up the specified powerdomain in a pwrdm list */ +static struct powerdomain *_pwrdm_deps_lookup(struct powerdomain *pwrdm, + struct pwrdm_dep *deps) +{ + struct pwrdm_dep *pd; + + if (!pwrdm || !deps || !omap_chip_is(pwrdm->omap_chip)) + return ERR_PTR(-EINVAL); + + for (pd = deps; pd; pd++) { + + if (!omap_chip_is(pd->omap_chip)) + continue; + + if (!pd->pwrdm && pd->pwrdm_name) + pd->pwrdm = pwrdm_lookup(pd->pwrdm_name); + + if (pd->pwrdm == pwrdm) + break; + + } + + if (!pd) + return ERR_PTR(-ENOENT); + + return pd->pwrdm; +} + + +/* Public functions */ + +/** + * pwrdm_init - set up the powerdomain layer + * + * Loop through the list of powerdomains, registering all that are + * available on the current CPU. If pwrdm_list is supplied and not + * null, all of the referenced powerdomains will be registered. No + * return value. + */ +void pwrdm_init(struct powerdomain **pwrdm_list) +{ + struct powerdomain **p = NULL; + + if (pwrdm_list) + for (p = pwrdm_list; *p; p++) + pwrdm_register(*p); +} + +/** + * pwrdm_register - register a powerdomain + * @pwrdm: struct powerdomain * to register + * + * Adds a powerdomain to the internal powerdomain list. Returns + * -EINVAL if given a null pointer, -EEXIST if a powerdomain is + * already registered by the provided name, or 0 upon success. + */ +int pwrdm_register(struct powerdomain *pwrdm) +{ + unsigned long flags; + int ret = -EINVAL; + + if (!pwrdm) + return -EINVAL; + + if (!omap_chip_is(pwrdm->omap_chip)) + return -EINVAL; + + write_lock_irqsave(&pwrdm_rwlock, flags); + if (_pwrdm_lookup(pwrdm->name)) { + ret = -EEXIST; + goto pr_unlock; + } + + list_add(&pwrdm->node, &pwrdm_list); + + pr_debug("powerdomain: registered %s\n", pwrdm->name); + ret = 0; + +pr_unlock: + write_unlock_irqrestore(&pwrdm_rwlock, flags); + + return ret; +} + +/** + * pwrdm_unregister - unregister a powerdomain + * @pwrdm: struct powerdomain * to unregister + * + * Removes a powerdomain from the internal powerdomain list. Returns + * -EINVAL if pwrdm argument is NULL. + */ +int pwrdm_unregister(struct powerdomain *pwrdm) +{ + unsigned long flags; + + if (!pwrdm) + return -EINVAL; + + write_lock_irqsave(&pwrdm_rwlock, flags); + list_del(&pwrdm->node); + write_unlock_irqrestore(&pwrdm_rwlock, flags); + + pr_debug("powerdomain: unregistered %s\n", pwrdm->name); + + return 0; +} + +/** + * pwrdm_lookup - look up a powerdomain by name, return a pointer + * @name: name of powerdomain + * + * Find a registered powerdomain by its name. Returns a pointer to the + * struct powerdomain if found, or NULL otherwise. + */ +struct powerdomain *pwrdm_lookup(const char *name) +{ + struct powerdomain *pwrdm; + unsigned long flags; + + if (!name) + return NULL; + + read_lock_irqsave(&pwrdm_rwlock, flags); + pwrdm = _pwrdm_lookup(name); + read_unlock_irqrestore(&pwrdm_rwlock, flags); + + return pwrdm; +} + +/** + * pwrdm_for_each - call function on each registered clockdomain + * @fn: callback function * + * + * Call the supplied function for each registered powerdomain. The + * callback function can return anything but 0 to bail out early from + * the iterator. The callback function is called with the pwrdm_rwlock + * held for reading, so no powerdomain structure manipulation + * functions should be called from the callback, although hardware + * powerdomain control functions are fine. Returns the last return + * value of the callback function, which should be 0 for success or + * anything else to indicate failure; or -EINVAL if the function + * pointer is null. + */ +int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm)) +{ + struct powerdomain *temp_pwrdm; + unsigned long flags; + int ret = 0; + + if (!fn) + return -EINVAL; + + read_lock_irqsave(&pwrdm_rwlock, flags); + list_for_each_entry(temp_pwrdm, &pwrdm_list, node) { + ret = (*fn)(temp_pwrdm); + if (ret) + break; + } + read_unlock_irqrestore(&pwrdm_rwlock, flags); + + return ret; +} + +/** + * pwrdm_add_clkdm - add a clockdomain to a powerdomain + * @pwrdm: struct powerdomain * to add the clockdomain to + * @clkdm: struct clockdomain * to associate with a powerdomain + * + * Associate the clockdomain 'clkdm' with a powerdomain 'pwrdm'. This + * enables the use of pwrdm_for_each_clkdm(). Returns -EINVAL if + * presented with invalid pointers; -ENOMEM if memory could not be allocated; + * or 0 upon success. + */ +int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm) +{ + unsigned long flags; + int i; + int ret = -EINVAL; + + if (!pwrdm || !clkdm) + return -EINVAL; + + pr_debug("powerdomain: associating clockdomain %s with powerdomain " + "%s\n", clkdm->name, pwrdm->name); + + write_lock_irqsave(&pwrdm_rwlock, flags); + + for (i = 0; i < PWRDM_MAX_CLKDMS; i++) { + if (!pwrdm->pwrdm_clkdms[i]) + break; +#ifdef DEBUG + if (pwrdm->pwrdm_clkdms[i] == clkdm) { + ret = -EINVAL; + goto pac_exit; + } +#endif + } + + if (i == PWRDM_MAX_CLKDMS) { + pr_debug("powerdomain: increase PWRDM_MAX_CLKDMS for " + "pwrdm %s clkdm %s\n", pwrdm->name, clkdm->name); + WARN_ON(1); + ret = -ENOMEM; + goto pac_exit; + } + + pwrdm->pwrdm_clkdms[i] = clkdm; + + ret = 0; + +pac_exit: + write_unlock_irqrestore(&pwrdm_rwlock, flags); + + return ret; +} + +/** + * pwrdm_del_clkdm - remove a clockdomain from a powerdomain + * @pwrdm: struct powerdomain * to add the clockdomain to + * @clkdm: struct clockdomain * to associate with a powerdomain + * + * Dissociate the clockdomain 'clkdm' from the powerdomain + * 'pwrdm'. Returns -EINVAL if presented with invalid pointers; + * -ENOENT if the clkdm was not associated with the powerdomain, or 0 + * upon success. + */ +int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm) +{ + unsigned long flags; + int ret = -EINVAL; + int i; + + if (!pwrdm || !clkdm) + return -EINVAL; + + pr_debug("powerdomain: dissociating clockdomain %s from powerdomain " + "%s\n", clkdm->name, pwrdm->name); + + write_lock_irqsave(&pwrdm_rwlock, flags); + + for (i = 0; i < PWRDM_MAX_CLKDMS; i++) + if (pwrdm->pwrdm_clkdms[i] == clkdm) + break; + + if (i == PWRDM_MAX_CLKDMS) { + pr_debug("powerdomain: clkdm %s not associated with pwrdm " + "%s ?!\n", clkdm->name, pwrdm->name); + ret = -ENOENT; + goto pdc_exit; + } + + pwrdm->pwrdm_clkdms[i] = NULL; + + ret = 0; + +pdc_exit: + write_unlock_irqrestore(&pwrdm_rwlock, flags); + + return ret; +} + +/** + * pwrdm_for_each_clkdm - call function on each clkdm in a pwrdm + * @pwrdm: struct powerdomain * to iterate over + * @fn: callback function * + * + * Call the supplied function for each clockdomain in the powerdomain + * 'pwrdm'. The callback function can return anything but 0 to bail + * out early from the iterator. The callback function is called with + * the pwrdm_rwlock held for reading, so no powerdomain structure + * manipulation functions should be called from the callback, although + * hardware powerdomain control functions are fine. Returns -EINVAL + * if presented with invalid pointers; or passes along the last return + * value of the callback function, which should be 0 for success or + * anything else to indicate failure. + */ +int pwrdm_for_each_clkdm(struct powerdomain *pwrdm, + int (*fn)(struct powerdomain *pwrdm, + struct clockdomain *clkdm)) +{ + unsigned long flags; + int ret = 0; + int i; + + if (!fn) + return -EINVAL; + + read_lock_irqsave(&pwrdm_rwlock, flags); + + for (i = 0; i < PWRDM_MAX_CLKDMS && !ret; i++) + ret = (*fn)(pwrdm, pwrdm->pwrdm_clkdms[i]); + + read_unlock_irqrestore(&pwrdm_rwlock, flags); + + return ret; +} + + +/** + * pwrdm_add_wkdep - add a wakeup dependency from pwrdm2 to pwrdm1 + * @pwrdm1: wake this struct powerdomain * up (dependent) + * @pwrdm2: when this struct powerdomain * wakes up (source) + * + * When the powerdomain represented by pwrdm2 wakes up (due to an + * interrupt), wake up pwrdm1. Implemented in hardware on the OMAP, + * this feature is designed to reduce wakeup latency of the dependent + * powerdomain. Returns -EINVAL if presented with invalid powerdomain + * pointers, -ENOENT if pwrdm2 cannot wake up pwrdm1 in hardware, or + * 0 upon success. + */ +int pwrdm_add_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2) +{ + struct powerdomain *p; + + if (!pwrdm1) + return -EINVAL; + + p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->wkdep_srcs); + if (IS_ERR(p)) { + pr_debug("powerdomain: hardware cannot set/clear wake up of " + "%s when %s wakes up\n", pwrdm1->name, pwrdm2->name); + return IS_ERR(p); + } + + pr_debug("powerdomain: hardware will wake up %s when %s wakes up\n", + pwrdm1->name, pwrdm2->name); + + prm_set_mod_reg_bits((1 << pwrdm2->dep_bit), + pwrdm1->prcm_offs, PM_WKDEP); + + return 0; +} + +/** + * pwrdm_del_wkdep - remove a wakeup dependency from pwrdm2 to pwrdm1 + * @pwrdm1: wake this struct powerdomain * up (dependent) + * @pwrdm2: when this struct powerdomain * wakes up (source) + * + * Remove a wakeup dependency that causes pwrdm1 to wake up when pwrdm2 + * wakes up. Returns -EINVAL if presented with invalid powerdomain + * pointers, -ENOENT if pwrdm2 cannot wake up pwrdm1 in hardware, or + * 0 upon success. + */ +int pwrdm_del_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2) +{ + struct powerdomain *p; + + if (!pwrdm1) + return -EINVAL; + + p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->wkdep_srcs); + if (IS_ERR(p)) { + pr_debug("powerdomain: hardware cannot set/clear wake up of " + "%s when %s wakes up\n", pwrdm1->name, pwrdm2->name); + return IS_ERR(p); + } + + pr_debug("powerdomain: hardware will no longer wake up %s after %s " + "wakes up\n", pwrdm1->name, pwrdm2->name); + + prm_clear_mod_reg_bits((1 << pwrdm2->dep_bit), + pwrdm1->prcm_offs, PM_WKDEP); + + return 0; +} + +/** + * pwrdm_read_wkdep - read wakeup dependency state from pwrdm2 to pwrdm1 + * @pwrdm1: wake this struct powerdomain * up (dependent) + * @pwrdm2: when this struct powerdomain * wakes up (source) + * + * Return 1 if a hardware wakeup dependency exists wherein pwrdm1 will be + * awoken when pwrdm2 wakes up; 0 if dependency is not set; -EINVAL + * if either powerdomain pointer is invalid; or -ENOENT if the hardware + * is incapable. + * + * REVISIT: Currently this function only represents software-controllable + * wakeup dependencies. Wakeup dependencies fixed in hardware are not + * yet handled here. + */ +int pwrdm_read_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2) +{ + struct powerdomain *p; + + if (!pwrdm1) + return -EINVAL; + + p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->wkdep_srcs); + if (IS_ERR(p)) { + pr_debug("powerdomain: hardware cannot set/clear wake up of " + "%s when %s wakes up\n", pwrdm1->name, pwrdm2->name); + return IS_ERR(p); + } + + return prm_read_mod_bits_shift(pwrdm1->prcm_offs, PM_WKDEP, + (1 << pwrdm2->dep_bit)); +} + +/** + * pwrdm_add_sleepdep - add a sleep dependency from pwrdm2 to pwrdm1 + * @pwrdm1: prevent this struct powerdomain * from sleeping (dependent) + * @pwrdm2: when this struct powerdomain * is active (source) + * + * Prevent pwrdm1 from automatically going inactive (and then to + * retention or off) if pwrdm2 is still active. Returns -EINVAL if + * presented with invalid powerdomain pointers or called on a machine + * that does not support software-configurable hardware sleep dependencies, + * -ENOENT if the specified dependency cannot be set in hardware, or + * 0 upon success. + */ +int pwrdm_add_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2) +{ + struct powerdomain *p; + + if (!pwrdm1) + return -EINVAL; + + if (!cpu_is_omap34xx()) + return -EINVAL; + + p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->sleepdep_srcs); + if (IS_ERR(p)) { + pr_debug("powerdomain: hardware cannot set/clear sleep " + "dependency affecting %s from %s\n", pwrdm1->name, + pwrdm2->name); + return IS_ERR(p); + } + + pr_debug("powerdomain: will prevent %s from sleeping if %s is active\n", + pwrdm1->name, pwrdm2->name); + + cm_set_mod_reg_bits((1 << pwrdm2->dep_bit), + pwrdm1->prcm_offs, OMAP3430_CM_SLEEPDEP); + + return 0; +} + +/** + * pwrdm_del_sleepdep - remove a sleep dependency from pwrdm2 to pwrdm1 + * @pwrdm1: prevent this struct powerdomain * from sleeping (dependent) + * @pwrdm2: when this struct powerdomain * is active (source) + * + * Allow pwrdm1 to automatically go inactive (and then to retention or + * off), independent of the activity state of pwrdm2. Returns -EINVAL + * if presented with invalid powerdomain pointers or called on a machine + * that does not support software-configurable hardware sleep dependencies, + * -ENOENT if the specified dependency cannot be cleared in hardware, or + * 0 upon success. + */ +int pwrdm_del_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2) +{ + struct powerdomain *p; + + if (!pwrdm1) + return -EINVAL; + + if (!cpu_is_omap34xx()) + return -EINVAL; + + p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->sleepdep_srcs); + if (IS_ERR(p)) { + pr_debug("powerdomain: hardware cannot set/clear sleep " + "dependency affecting %s from %s\n", pwrdm1->name, + pwrdm2->name); + return IS_ERR(p); + } + + pr_debug("powerdomain: will no longer prevent %s from sleeping if " + "%s is active\n", pwrdm1->name, pwrdm2->name); + + cm_clear_mod_reg_bits((1 << pwrdm2->dep_bit), + pwrdm1->prcm_offs, OMAP3430_CM_SLEEPDEP); + + return 0; +} + +/** + * pwrdm_read_sleepdep - read sleep dependency state from pwrdm2 to pwrdm1 + * @pwrdm1: prevent this struct powerdomain * from sleeping (dependent) + * @pwrdm2: when this struct powerdomain * is active (source) + * + * Return 1 if a hardware sleep dependency exists wherein pwrdm1 will + * not be allowed to automatically go inactive if pwrdm2 is active; + * 0 if pwrdm1's automatic power state inactivity transition is independent + * of pwrdm2's; -EINVAL if either powerdomain pointer is invalid or called + * on a machine that does not support software-configurable hardware sleep + * dependencies; or -ENOENT if the hardware is incapable. + * + * REVISIT: Currently this function only represents software-controllable + * sleep dependencies. Sleep dependencies fixed in hardware are not + * yet handled here. + */ +int pwrdm_read_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2) +{ + struct powerdomain *p; + + if (!pwrdm1) + return -EINVAL; + + if (!cpu_is_omap34xx()) + return -EINVAL; + + p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->sleepdep_srcs); + if (IS_ERR(p)) { + pr_debug("powerdomain: hardware cannot set/clear sleep " + "dependency affecting %s from %s\n", pwrdm1->name, + pwrdm2->name); + return IS_ERR(p); + } + + return prm_read_mod_bits_shift(pwrdm1->prcm_offs, OMAP3430_CM_SLEEPDEP, + (1 << pwrdm2->dep_bit)); +} + +/** + * pwrdm_get_mem_bank_count - get number of memory banks in this powerdomain + * @pwrdm: struct powerdomain * + * + * Return the number of controllable memory banks in powerdomain pwrdm, + * starting with 1. Returns -EINVAL if the powerdomain pointer is null. + */ +int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm) +{ + if (!pwrdm) + return -EINVAL; + + return pwrdm->banks; +} + +/** + * pwrdm_set_next_pwrst - set next powerdomain power state + * @pwrdm: struct powerdomain * to set + * @pwrst: one of the PWRDM_POWER_* macros + * + * Set the powerdomain pwrdm's next power state to pwrst. The powerdomain + * may not enter this state immediately if the preconditions for this state + * have not been satisfied. Returns -EINVAL if the powerdomain pointer is + * null or if the power state is invalid for the powerdomin, or returns 0 + * upon success. + */ +int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) +{ + if (!pwrdm) + return -EINVAL; + + if (!(pwrdm->pwrsts & (1 << pwrst))) + return -EINVAL; + + pr_debug("powerdomain: setting next powerstate for %s to %0x\n", + pwrdm->name, pwrst); + + prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, + (pwrst << OMAP_POWERSTATE_SHIFT), + pwrdm->prcm_offs, PM_PWSTCTRL); + + return 0; +} + +/** + * pwrdm_read_next_pwrst - get next powerdomain power state + * @pwrdm: struct powerdomain * to get power state + * + * Return the powerdomain pwrdm's next power state. Returns -EINVAL + * if the powerdomain pointer is null or returns the next power state + * upon success. + */ +int pwrdm_read_next_pwrst(struct powerdomain *pwrdm) +{ + if (!pwrdm) + return -EINVAL; + + return prm_read_mod_bits_shift(pwrdm->prcm_offs, PM_PWSTCTRL, + OMAP_POWERSTATE_MASK); +} + +/** + * pwrdm_read_pwrst - get current powerdomain power state + * @pwrdm: struct powerdomain * to get power state + * + * Return the powerdomain pwrdm's current power state. Returns -EINVAL + * if the powerdomain pointer is null or returns the current power state + * upon success. + */ +int pwrdm_read_pwrst(struct powerdomain *pwrdm) +{ + if (!pwrdm) + return -EINVAL; + + return prm_read_mod_bits_shift(pwrdm->prcm_offs, PM_PWSTST, + OMAP_POWERSTATEST_MASK); +} + +/** + * pwrdm_read_prev_pwrst - get previous powerdomain power state + * @pwrdm: struct powerdomain * to get previous power state + * + * Return the powerdomain pwrdm's previous power state. Returns -EINVAL + * if the powerdomain pointer is null or returns the previous power state + * upon success. + */ +int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) +{ + if (!pwrdm) + return -EINVAL; + + return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST, + OMAP3430_LASTPOWERSTATEENTERED_MASK); +} + +/** + * pwrdm_set_logic_retst - set powerdomain logic power state upon retention + * @pwrdm: struct powerdomain * to set + * @pwrst: one of the PWRDM_POWER_* macros + * + * Set the next power state that the logic portion of the powerdomain + * pwrdm will enter when the powerdomain enters retention. This will + * be either RETENTION or OFF, if supported. Returns -EINVAL if the + * powerdomain pointer is null or the target power state is not not + * supported, or returns 0 upon success. + */ +int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst) +{ + if (!pwrdm) + return -EINVAL; + + if (!(pwrdm->pwrsts_logic_ret & (1 << pwrst))) + return -EINVAL; + + pr_debug("powerdomain: setting next logic powerstate for %s to %0x\n", + pwrdm->name, pwrst); + + /* + * The register bit names below may not correspond to the + * actual names of the bits in each powerdomain's register, + * but the type of value returned is the same for each + * powerdomain. + */ + prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE, + (pwrst << __ffs(OMAP3430_LOGICL1CACHERETSTATE)), + pwrdm->prcm_offs, PM_PWSTCTRL); + + return 0; +} + +/** + * pwrdm_set_mem_onst - set memory power state while powerdomain ON + * @pwrdm: struct powerdomain * to set + * @bank: memory bank number to set (0-3) + * @pwrst: one of the PWRDM_POWER_* macros + * + * Set the next power state that memory bank x of the powerdomain + * pwrdm will enter when the powerdomain enters the ON state. Bank + * will be a number from 0 to 3, and represents different types of + * memory, depending on the powerdomain. Returns -EINVAL if the + * powerdomain pointer is null or the target power state is not not + * supported for this memory bank, -EEXIST if the target memory bank + * does not exist or is not controllable, or returns 0 upon success. + */ +int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst) +{ + u32 m; + + if (!pwrdm) + return -EINVAL; + + if (pwrdm->banks < (bank + 1)) + return -EEXIST; + + if (!(pwrdm->pwrsts_mem_on[bank] & (1 << pwrst))) + return -EINVAL; + + pr_debug("powerdomain: setting next memory powerstate for domain %s " + "bank %0x while pwrdm-ON to %0x\n", pwrdm->name, bank, pwrst); + + /* + * The register bit names below may not correspond to the + * actual names of the bits in each powerdomain's register, + * but the type of value returned is the same for each + * powerdomain. + */ + switch (bank) { + case 0: + m = OMAP3430_SHAREDL1CACHEFLATONSTATE_MASK; + break; + case 1: + m = OMAP3430_L1FLATMEMONSTATE_MASK; + break; + case 2: + m = OMAP3430_SHAREDL2CACHEFLATONSTATE_MASK; + break; + case 3: + m = OMAP3430_L2FLATMEMONSTATE_MASK; + break; + default: + WARN_ON(1); /* should never happen */ + return -EEXIST; + } + + prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), + pwrdm->prcm_offs, PM_PWSTCTRL); + + return 0; +} + +/** + * pwrdm_set_mem_retst - set memory power state while powerdomain in RET + * @pwrdm: struct powerdomain * to set + * @bank: memory bank number to set (0-3) + * @pwrst: one of the PWRDM_POWER_* macros + * + * Set the next power state that memory bank x of the powerdomain + * pwrdm will enter when the powerdomain enters the RETENTION state. + * Bank will be a number from 0 to 3, and represents different types + * of memory, depending on the powerdomain. pwrst will be either + * RETENTION or OFF, if supported. Returns -EINVAL if the powerdomain + * pointer is null or the target power state is not not supported for + * this memory bank, -EEXIST if the target memory bank does not exist + * or is not controllable, or returns 0 upon success. + */ +int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst) +{ + u32 m; + + if (!pwrdm) + return -EINVAL; + + if (pwrdm->banks < (bank + 1)) + return -EEXIST; + + if (!(pwrdm->pwrsts_mem_ret[bank] & (1 << pwrst))) + return -EINVAL; + + pr_debug("powerdomain: setting next memory powerstate for domain %s " + "bank %0x while pwrdm-RET to %0x\n", pwrdm->name, bank, pwrst); + + /* + * The register bit names below may not correspond to the + * actual names of the bits in each powerdomain's register, + * but the type of value returned is the same for each + * powerdomain. + */ + switch (bank) { + case 0: + m = OMAP3430_SHAREDL1CACHEFLATRETSTATE; + break; + case 1: + m = OMAP3430_L1FLATMEMRETSTATE; + break; + case 2: + m = OMAP3430_SHAREDL2CACHEFLATRETSTATE; + break; + case 3: + m = OMAP3430_L2FLATMEMRETSTATE; + break; + default: + WARN_ON(1); /* should never happen */ + return -EEXIST; + } + + prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs, + PM_PWSTCTRL); + + return 0; +} + +/** + * pwrdm_read_logic_pwrst - get current powerdomain logic retention power state + * @pwrdm: struct powerdomain * to get current logic retention power state + * + * Return the current power state that the logic portion of + * powerdomain pwrdm will enter + * Returns -EINVAL if the powerdomain pointer is null or returns the + * current logic retention power state upon success. + */ +int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm) +{ + if (!pwrdm) + return -EINVAL; + + return prm_read_mod_bits_shift(pwrdm->prcm_offs, PM_PWSTST, + OMAP3430_LOGICSTATEST); +} + +/** + * pwrdm_read_prev_logic_pwrst - get previous powerdomain logic power state + * @pwrdm: struct powerdomain * to get previous logic power state + * + * Return the powerdomain pwrdm's logic power state. Returns -EINVAL + * if the powerdomain pointer is null or returns the previous logic + * power state upon success. + */ +int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm) +{ + if (!pwrdm) + return -EINVAL; + + /* + * The register bit names below may not correspond to the + * actual names of the bits in each powerdomain's register, + * but the type of value returned is the same for each + * powerdomain. + */ + return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST, + OMAP3430_LASTLOGICSTATEENTERED); +} + +/** + * pwrdm_read_mem_pwrst - get current memory bank power state + * @pwrdm: struct powerdomain * to get current memory bank power state + * @bank: memory bank number (0-3) + * + * Return the powerdomain pwrdm's current memory power state for bank + * x. Returns -EINVAL if the powerdomain pointer is null, -EEXIST if + * the target memory bank does not exist or is not controllable, or + * returns the current memory power state upon success. + */ +int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank) +{ + u32 m; + + if (!pwrdm) + return -EINVAL; + + if (pwrdm->banks < (bank + 1)) + return -EEXIST; + + /* + * The register bit names below may not correspond to the + * actual names of the bits in each powerdomain's register, + * but the type of value returned is the same for each + * powerdomain. + */ + switch (bank) { + case 0: + m = OMAP3430_SHAREDL1CACHEFLATSTATEST_MASK; + break; + case 1: + m = OMAP3430_L1FLATMEMSTATEST_MASK; + break; + case 2: + m = OMAP3430_SHAREDL2CACHEFLATSTATEST_MASK; + break; + case 3: + m = OMAP3430_L2FLATMEMSTATEST_MASK; + break; + default: + WARN_ON(1); /* should never happen */ + return -EEXIST; + } + + return prm_read_mod_bits_shift(pwrdm->prcm_offs, PM_PWSTST, m); +} + +/** + * pwrdm_read_prev_mem_pwrst - get previous memory bank power state + * @pwrdm: struct powerdomain * to get previous memory bank power state + * @bank: memory bank number (0-3) + * + * Return the powerdomain pwrdm's previous memory power state for bank + * x. Returns -EINVAL if the powerdomain pointer is null, -EEXIST if + * the target memory bank does not exist or is not controllable, or + * returns the previous memory power state upon success. + */ +int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) +{ + u32 m; + + if (!pwrdm) + return -EINVAL; + + if (pwrdm->banks < (bank + 1)) + return -EEXIST; + + /* + * The register bit names below may not correspond to the + * actual names of the bits in each powerdomain's register, + * but the type of value returned is the same for each + * powerdomain. + */ + switch (bank) { + case 0: + m = OMAP3430_LASTMEM1STATEENTERED_MASK; + break; + case 1: + m = OMAP3430_LASTMEM2STATEENTERED_MASK; + break; + case 2: + m = OMAP3430_LASTSHAREDL2CACHEFLATSTATEENTERED_MASK; + break; + case 3: + m = OMAP3430_LASTL2FLATMEMSTATEENTERED_MASK; + break; + default: + WARN_ON(1); /* should never happen */ + return -EEXIST; + } + + return prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP3430_PM_PREPWSTST, m); +} + +/** + * pwrdm_clear_all_prev_pwrst - clear previous powerstate register for a pwrdm + * @pwrdm: struct powerdomain * to clear + * + * Clear the powerdomain's previous power state register. Clears the + * entire register, including logic and memory bank previous power states. + * Returns -EINVAL if the powerdomain pointer is null, or returns 0 upon + * success. + */ +int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm) +{ + if (!pwrdm) + return -EINVAL; + + /* + * XXX should get the powerdomain's current state here; + * warn & fail if it is not ON. + */ + + pr_debug("powerdomain: clearing previous power state reg for %s\n", + pwrdm->name); + + prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST); + + return 0; +} + +/** + * pwrdm_enable_hdwr_sar - enable automatic hardware SAR for a pwrdm + * @pwrdm: struct powerdomain * + * + * Enable automatic context save-and-restore upon power state change + * for some devices in a powerdomain. Warning: this only affects a + * subset of devices in a powerdomain; check the TRM closely. Returns + * -EINVAL if the powerdomain pointer is null or if the powerdomain + * does not support automatic save-and-restore, or returns 0 upon + * success. + */ +int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm) +{ + if (!pwrdm) + return -EINVAL; + + if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR)) + return -EINVAL; + + pr_debug("powerdomain: %s: setting SAVEANDRESTORE bit\n", + pwrdm->name); + + prm_rmw_mod_reg_bits(0, 1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, + pwrdm->prcm_offs, PM_PWSTCTRL); + + return 0; +} + +/** + * pwrdm_disable_hdwr_sar - disable automatic hardware SAR for a pwrdm + * @pwrdm: struct powerdomain * + * + * Disable automatic context save-and-restore upon power state change + * for some devices in a powerdomain. Warning: this only affects a + * subset of devices in a powerdomain; check the TRM closely. Returns + * -EINVAL if the powerdomain pointer is null or if the powerdomain + * does not support automatic save-and-restore, or returns 0 upon + * success. + */ +int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm) +{ + if (!pwrdm) + return -EINVAL; + + if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR)) + return -EINVAL; + + pr_debug("powerdomain: %s: clearing SAVEANDRESTORE bit\n", + pwrdm->name); + + prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, 0, + pwrdm->prcm_offs, PM_PWSTCTRL); + + return 0; +} + +/** + * pwrdm_has_hdwr_sar - test whether powerdomain supports hardware SAR + * @pwrdm: struct powerdomain * + * + * Returns 1 if powerdomain 'pwrdm' supports hardware save-and-restore + * for some devices, or 0 if it does not. + */ +bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm) +{ + return (pwrdm && pwrdm->flags & PWRDM_HAS_HDWR_SAR) ? 1 : 0; +} + +/** + * pwrdm_wait_transition - wait for powerdomain power transition to finish + * @pwrdm: struct powerdomain * to wait for + * + * If the powerdomain pwrdm is in the process of a state transition, + * spin until it completes the power transition, or until an iteration + * bailout value is reached. Returns -EINVAL if the powerdomain + * pointer is null, -EAGAIN if the bailout value was reached, or + * returns 0 upon success. + */ +int pwrdm_wait_transition(struct powerdomain *pwrdm) +{ + u32 c = 0; + + if (!pwrdm) + return -EINVAL; + + /* + * REVISIT: pwrdm_wait_transition() may be better implemented + * via a callback and a periodic timer check -- how long do we expect + * powerdomain transitions to take? + */ + + /* XXX Is this udelay() value meaningful? */ + while ((prm_read_mod_reg(pwrdm->prcm_offs, PM_PWSTST) & + OMAP_INTRANSITION) && + (c++ < PWRDM_TRANSITION_BAILOUT)) + udelay(1); + + if (c >= PWRDM_TRANSITION_BAILOUT) { + printk(KERN_ERR "powerdomain: waited too long for " + "powerdomain %s to complete transition\n", pwrdm->name); + return -EAGAIN; + } + + pr_debug("powerdomain: completed transition in %d loops\n", c); + + return 0; +} + + diff --git a/arch/arm/mach-omap2/powerdomains.h b/arch/arm/mach-omap2/powerdomains.h new file mode 100644 index 000000000000..1e151faebbd3 --- /dev/null +++ b/arch/arm/mach-omap2/powerdomains.h @@ -0,0 +1,187 @@ +/* + * OMAP2/3 common powerdomain definitions + * + * Copyright (C) 2007-8 Texas Instruments, Inc. + * Copyright (C) 2007-8 Nokia Corporation + * + * Written by Paul Walmsley + * Debugging and integration fixes by Jouni Högander + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef ARCH_ARM_MACH_OMAP2_POWERDOMAINS +#define ARCH_ARM_MACH_OMAP2_POWERDOMAINS + +/* + * This file contains all of the powerdomains that have some element + * of software control for the OMAP24xx and OMAP34XX chips. + * + * A few notes: + * + * This is not an exhaustive listing of powerdomains on the chips; only + * powerdomains that can be controlled in software. + * + * A useful validation rule for struct powerdomain: + * Any powerdomain referenced by a wkdep_srcs or sleepdep_srcs array + * must have a dep_bit assigned. So wkdep_srcs/sleepdep_srcs are really + * just software-controllable dependencies. Non-software-controllable + * dependencies do exist, but they are not encoded below (yet). + * + * 24xx does not support programmable sleep dependencies (SLEEPDEP) + * + */ + +/* + * The names for the DSP/IVA2 powerdomains are confusing. + * + * Most OMAP chips have an on-board DSP. + * + * On the 2420, this is a 'C55 DSP called, simply, the DSP. Its + * powerdomain is called the "DSP power domain." On the 2430, the + * on-board DSP is a 'C64 DSP, now called the IVA2 or IVA2.1. Its + * powerdomain is still called the "DSP power domain." On the 3430, + * the DSP is a 'C64 DSP like the 2430, also known as the IVA2; but + * its powerdomain is now called the "IVA2 power domain." + * + * The 2420 also has something called the IVA, which is a separate ARM + * core, and has nothing to do with the DSP/IVA2. + * + * Ideally the DSP/IVA2 could just be the same powerdomain, but the PRCM + * address offset is different between the C55 and C64 DSPs. + * + * The overly-specific dep_bit names are due to a bit name collision + * with CM_FCLKEN_{DSP,IVA2}. The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift + * value are the same for all powerdomains: 2 + */ + +/* + * XXX should dep_bit be a mask, so we can test to see if it is 0 as a + * sanity check? + * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE + */ + +#include <mach/powerdomain.h> + +#include "prcm-common.h" +#include "prm.h" +#include "cm.h" + +/* OMAP2/3-common powerdomains and wakeup dependencies */ + +/* + * 2420/2430 PM_WKDEP_GFX: CORE, MPU, WKUP + * 3430ES1 PM_WKDEP_GFX: adds IVA2, removes CORE + * 3430ES2 PM_WKDEP_SGX: adds IVA2, removes CORE + */ +static struct pwrdm_dep gfx_sgx_wkdeps[] = { + { + .pwrdm_name = "core_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { + .pwrdm_name = "iva2_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "mpu_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | + CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "wkup_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | + CHIP_IS_OMAP3430) + }, + { NULL }, +}; + +/* + * 3430: CM_SLEEPDEP_CAM: MPU + * 3430ES1: CM_SLEEPDEP_GFX: MPU + * 3430ES2: CM_SLEEPDEP_SGX: MPU + */ +static struct pwrdm_dep cam_gfx_sleepdeps[] = { + { + .pwrdm_name = "mpu_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { NULL }, +}; + + +#include "powerdomains24xx.h" +#include "powerdomains34xx.h" + + +/* + * OMAP2/3 common powerdomains + */ + +/* + * The GFX powerdomain is not present on 3430ES2, but currently we do not + * have a macro to filter it out at compile-time. + */ +static struct powerdomain gfx_pwrdm = { + .name = "gfx_pwrdm", + .prcm_offs = GFX_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | + CHIP_IS_OMAP3430ES1), + .wkdep_srcs = gfx_sgx_wkdeps, + .sleepdep_srcs = cam_gfx_sleepdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRDM_POWER_RET, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ + }, + .pwrsts_mem_on = { + [0] = PWRDM_POWER_ON, /* MEMONSTATE */ + }, +}; + +static struct powerdomain wkup_pwrdm = { + .name = "wkup_pwrdm", + .prcm_offs = WKUP_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), + .dep_bit = OMAP_EN_WKUP_SHIFT, +}; + + + +/* As powerdomains are added or removed above, this list must also be changed */ +static struct powerdomain *powerdomains_omap[] __initdata = { + + &gfx_pwrdm, + &wkup_pwrdm, + +#ifdef CONFIG_ARCH_OMAP24XX + &dsp_pwrdm, + &mpu_24xx_pwrdm, + &core_24xx_pwrdm, +#endif + +#ifdef CONFIG_ARCH_OMAP2430 + &mdm_pwrdm, +#endif + +#ifdef CONFIG_ARCH_OMAP34XX + &iva2_pwrdm, + &mpu_34xx_pwrdm, + &neon_pwrdm, + &core_34xx_pwrdm, + &cam_pwrdm, + &dss_pwrdm, + &per_pwrdm, + &emu_pwrdm, + &sgx_pwrdm, + &usbhost_pwrdm, +#endif + + NULL +}; + + +#endif diff --git a/arch/arm/mach-omap2/powerdomains24xx.h b/arch/arm/mach-omap2/powerdomains24xx.h new file mode 100644 index 000000000000..9f08dc3f7fd2 --- /dev/null +++ b/arch/arm/mach-omap2/powerdomains24xx.h @@ -0,0 +1,200 @@ +/* + * OMAP24XX powerdomain definitions + * + * Copyright (C) 2007-2008 Texas Instruments, Inc. + * Copyright (C) 2007-2008 Nokia Corporation + * + * Written by Paul Walmsley + * Debugging and integration fixes by Jouni Högander + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef ARCH_ARM_MACH_OMAP2_POWERDOMAINS24XX +#define ARCH_ARM_MACH_OMAP2_POWERDOMAINS24XX + +/* + * N.B. If powerdomains are added or removed from this file, update + * the array in mach-omap2/powerdomains.h. + */ + +#include <mach/powerdomain.h> + +#include "prcm-common.h" +#include "prm.h" +#include "prm-regbits-24xx.h" +#include "cm.h" +#include "cm-regbits-24xx.h" + +/* 24XX powerdomains and dependencies */ + +#ifdef CONFIG_ARCH_OMAP24XX + + +/* Wakeup dependency source arrays */ + +/* + * 2420/2430 PM_WKDEP_DSP: CORE, MPU, WKUP + * 2430 PM_WKDEP_MDM: same as above + */ +static struct pwrdm_dep dsp_mdm_24xx_wkdeps[] = { + { + .pwrdm_name = "core_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { + .pwrdm_name = "mpu_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { + .pwrdm_name = "wkup_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { NULL }, +}; + +/* + * 2420 PM_WKDEP_MPU: CORE, DSP, WKUP + * 2430 adds MDM + */ +static struct pwrdm_dep mpu_24xx_wkdeps[] = { + { + .pwrdm_name = "core_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { + .pwrdm_name = "dsp_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { + .pwrdm_name = "wkup_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { + .pwrdm_name = "mdm_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) + }, + { NULL }, +}; + +/* + * 2420 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP + * 2430 adds MDM + */ +static struct pwrdm_dep core_24xx_wkdeps[] = { + { + .pwrdm_name = "dsp_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { + .pwrdm_name = "gfx_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { + .pwrdm_name = "mpu_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { + .pwrdm_name = "wkup_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) + }, + { + .pwrdm_name = "mdm_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) + }, + { NULL }, +}; + + +/* Powerdomains */ + +static struct powerdomain dsp_pwrdm = { + .name = "dsp_pwrdm", + .prcm_offs = OMAP24XX_DSP_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), + .dep_bit = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT, + .wkdep_srcs = dsp_mdm_24xx_wkdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRDM_POWER_RET, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRDM_POWER_RET, + }, + .pwrsts_mem_on = { + [0] = PWRDM_POWER_ON, + }, +}; + +static struct powerdomain mpu_24xx_pwrdm = { + .name = "mpu_pwrdm", + .prcm_offs = MPU_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), + .dep_bit = OMAP24XX_EN_MPU_SHIFT, + .wkdep_srcs = mpu_24xx_wkdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRSTS_OFF_RET, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRDM_POWER_RET, + }, + .pwrsts_mem_on = { + [0] = PWRDM_POWER_ON, + }, +}; + +static struct powerdomain core_24xx_pwrdm = { + .name = "core_pwrdm", + .prcm_offs = CORE_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), + .wkdep_srcs = core_24xx_wkdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .dep_bit = OMAP24XX_EN_CORE_SHIFT, + .banks = 3, + .pwrsts_mem_ret = { + [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */ + [1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */ + [2] = PWRSTS_OFF_RET, /* MEM3RETSTATE */ + }, + .pwrsts_mem_on = { + [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */ + [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ + [2] = PWRSTS_OFF_RET_ON, /* MEM3ONSTATE */ + }, +}; + +#endif /* CONFIG_ARCH_OMAP24XX */ + + + +/* + * 2430-specific powerdomains + */ + +#ifdef CONFIG_ARCH_OMAP2430 + +/* XXX 2430 KILLDOMAINWKUP bit? No current users apparently */ + +/* Another case of bit name collisions between several registers: EN_MDM */ +static struct powerdomain mdm_pwrdm = { + .name = "mdm_pwrdm", + .prcm_offs = OMAP2430_MDM_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), + .dep_bit = OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT, + .wkdep_srcs = dsp_mdm_24xx_wkdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRDM_POWER_RET, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ + }, + .pwrsts_mem_on = { + [0] = PWRDM_POWER_ON, /* MEMONSTATE */ + }, +}; + +#endif /* CONFIG_ARCH_OMAP2430 */ + + +#endif diff --git a/arch/arm/mach-omap2/powerdomains34xx.h b/arch/arm/mach-omap2/powerdomains34xx.h new file mode 100644 index 000000000000..f573f7108398 --- /dev/null +++ b/arch/arm/mach-omap2/powerdomains34xx.h @@ -0,0 +1,327 @@ +/* + * OMAP34XX powerdomain definitions + * + * Copyright (C) 2007-2008 Texas Instruments, Inc. + * Copyright (C) 2007-2008 Nokia Corporation + * + * Written by Paul Walmsley + * Debugging and integration fixes by Jouni Högander + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef ARCH_ARM_MACH_OMAP2_POWERDOMAINS34XX +#define ARCH_ARM_MACH_OMAP2_POWERDOMAINS34XX + +/* + * N.B. If powerdomains are added or removed from this file, update + * the array in mach-omap2/powerdomains.h. + */ + +#include <mach/powerdomain.h> + +#include "prcm-common.h" +#include "prm.h" +#include "prm-regbits-34xx.h" +#include "cm.h" +#include "cm-regbits-34xx.h" + +/* + * 34XX-specific powerdomains, dependencies + */ + +#ifdef CONFIG_ARCH_OMAP34XX + +/* + * 3430: PM_WKDEP_{PER,USBHOST}: CORE, IVA2, MPU, WKUP + * (USBHOST is ES2 only) + */ +static struct pwrdm_dep per_usbhost_wkdeps[] = { + { + .pwrdm_name = "core_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "iva2_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "mpu_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "wkup_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { NULL }, +}; + +/* + * 3430 PM_WKDEP_MPU: CORE, IVA2, DSS, PER + */ +static struct pwrdm_dep mpu_34xx_wkdeps[] = { + { + .pwrdm_name = "core_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "iva2_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "dss_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "per_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { NULL }, +}; + +/* + * 3430 PM_WKDEP_IVA2: CORE, MPU, WKUP, DSS, PER + */ +static struct pwrdm_dep iva2_wkdeps[] = { + { + .pwrdm_name = "core_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "mpu_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "wkup_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "dss_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "per_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { NULL }, +}; + + +/* 3430 PM_WKDEP_{CAM,DSS}: IVA2, MPU, WKUP */ +static struct pwrdm_dep cam_dss_wkdeps[] = { + { + .pwrdm_name = "iva2_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "mpu_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "wkup_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { NULL }, +}; + +/* 3430: PM_WKDEP_NEON: MPU */ +static struct pwrdm_dep neon_wkdeps[] = { + { + .pwrdm_name = "mpu_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { NULL }, +}; + + +/* Sleep dependency source arrays for 34xx-specific pwrdms - 34XX only */ + +/* + * 3430: CM_SLEEPDEP_{DSS,PER}: MPU, IVA + * 3430ES2: CM_SLEEPDEP_USBHOST: MPU, IVA + */ +static struct pwrdm_dep dss_per_usbhost_sleepdeps[] = { + { + .pwrdm_name = "mpu_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { + .pwrdm_name = "iva2_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) + }, + { NULL }, +}; + + +/* + * Powerdomains + */ + +static struct powerdomain iva2_pwrdm = { + .name = "iva2_pwrdm", + .prcm_offs = OMAP3430_IVA2_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), + .dep_bit = OMAP3430_PM_WKDEP_MPU_EN_IVA2_SHIFT, + .wkdep_srcs = iva2_wkdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRSTS_OFF_RET, + .banks = 4, + .pwrsts_mem_ret = { + [0] = PWRSTS_OFF_RET, + [1] = PWRSTS_OFF_RET, + [2] = PWRSTS_OFF_RET, + [3] = PWRSTS_OFF_RET, + }, + .pwrsts_mem_on = { + [0] = PWRDM_POWER_ON, + [1] = PWRDM_POWER_ON, + [2] = PWRSTS_OFF_ON, + [3] = PWRDM_POWER_ON, + }, +}; + +static struct powerdomain mpu_34xx_pwrdm = { + .name = "mpu_pwrdm", + .prcm_offs = MPU_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), + .dep_bit = OMAP3430_EN_MPU_SHIFT, + .wkdep_srcs = mpu_34xx_wkdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRSTS_OFF_RET, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRSTS_OFF_RET, + }, + .pwrsts_mem_on = { + [0] = PWRSTS_OFF_ON, + }, +}; + +/* No wkdeps or sleepdeps for 34xx core apparently */ +static struct powerdomain core_34xx_pwrdm = { + .name = "core_pwrdm", + .prcm_offs = CORE_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), + .pwrsts = PWRSTS_OFF_RET_ON, + .dep_bit = OMAP3430_EN_CORE_SHIFT, + .banks = 2, + .pwrsts_mem_ret = { + [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */ + [1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */ + }, + .pwrsts_mem_on = { + [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */ + [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ + }, +}; + +/* Another case of bit name collisions between several registers: EN_DSS */ +static struct powerdomain dss_pwrdm = { + .name = "dss_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), + .prcm_offs = OMAP3430_DSS_MOD, + .dep_bit = OMAP3430_PM_WKDEP_MPU_EN_DSS_SHIFT, + .wkdep_srcs = cam_dss_wkdeps, + .sleepdep_srcs = dss_per_usbhost_sleepdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRDM_POWER_RET, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ + }, + .pwrsts_mem_on = { + [0] = PWRDM_POWER_ON, /* MEMONSTATE */ + }, +}; + +static struct powerdomain sgx_pwrdm = { + .name = "sgx_pwrdm", + .prcm_offs = OMAP3430ES2_SGX_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2), + .wkdep_srcs = gfx_sgx_wkdeps, + .sleepdep_srcs = cam_gfx_sleepdeps, + /* XXX This is accurate for 3430 SGX, but what about GFX? */ + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRDM_POWER_RET, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ + }, + .pwrsts_mem_on = { + [0] = PWRDM_POWER_ON, /* MEMONSTATE */ + }, +}; + +static struct powerdomain cam_pwrdm = { + .name = "cam_pwrdm", + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), + .prcm_offs = OMAP3430_CAM_MOD, + .wkdep_srcs = cam_dss_wkdeps, + .sleepdep_srcs = cam_gfx_sleepdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRDM_POWER_RET, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ + }, + .pwrsts_mem_on = { + [0] = PWRDM_POWER_ON, /* MEMONSTATE */ + }, +}; + +static struct powerdomain per_pwrdm = { + .name = "per_pwrdm", + .prcm_offs = OMAP3430_PER_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), + .dep_bit = OMAP3430_EN_PER_SHIFT, + .wkdep_srcs = per_usbhost_wkdeps, + .sleepdep_srcs = dss_per_usbhost_sleepdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRSTS_OFF_RET, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ + }, + .pwrsts_mem_on = { + [0] = PWRDM_POWER_ON, /* MEMONSTATE */ + }, +}; + +static struct powerdomain emu_pwrdm = { + .name = "emu_pwrdm", + .prcm_offs = OMAP3430_EMU_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct powerdomain neon_pwrdm = { + .name = "neon_pwrdm", + .prcm_offs = OMAP3430_NEON_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), + .wkdep_srcs = neon_wkdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRDM_POWER_RET, +}; + +static struct powerdomain usbhost_pwrdm = { + .name = "usbhost_pwrdm", + .prcm_offs = OMAP3430ES2_USBHOST_MOD, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2), + .wkdep_srcs = per_usbhost_wkdeps, + .sleepdep_srcs = dss_per_usbhost_sleepdeps, + .pwrsts = PWRSTS_OFF_RET_ON, + .pwrsts_logic_ret = PWRDM_POWER_RET, + .banks = 1, + .pwrsts_mem_ret = { + [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ + }, + .pwrsts_mem_on = { + [0] = PWRDM_POWER_ON, /* MEMONSTATE */ + }, +}; + +#endif /* CONFIG_ARCH_OMAP34XX */ + + +#endif diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h index 54c32f482131..4a32822ff3fc 100644 --- a/arch/arm/mach-omap2/prcm-common.h +++ b/arch/arm/mach-omap2/prcm-common.h @@ -312,7 +312,8 @@ #define OMAP3430_ST_GPT2 (1 << 3) /* CM_SLEEPDEP_PER, PM_WKDEP_IVA2, PM_WKDEP_MPU, PM_WKDEP_PER shared bits */ -#define OMAP3430_EN_CORE (1 << 0) +#define OMAP3430_EN_CORE_SHIFT 0 +#define OMAP3430_EN_CORE_MASK (1 << 0) #endif diff --git a/arch/arm/mach-omap2/prm-regbits-24xx.h b/arch/arm/mach-omap2/prm-regbits-24xx.h index c6d17a3378ec..4002051c20b9 100644 --- a/arch/arm/mach-omap2/prm-regbits-24xx.h +++ b/arch/arm/mach-omap2/prm-regbits-24xx.h @@ -29,8 +29,10 @@ #define OMAP24XX_WKUP1_EN (1 << 0) /* PM_WKDEP_GFX, PM_WKDEP_MPU, PM_WKDEP_DSP, PM_WKDEP_MDM shared bits */ -#define OMAP24XX_EN_MPU (1 << 1) -#define OMAP24XX_EN_CORE (1 << 0) +#define OMAP24XX_EN_MPU_SHIFT 1 +#define OMAP24XX_EN_MPU_MASK (1 << 1) +#define OMAP24XX_EN_CORE_SHIFT 0 +#define OMAP24XX_EN_CORE_MASK (1 << 0) /* * PM_PWSTCTRL_MPU, PM_PWSTCTRL_GFX, PM_PWSTCTRL_DSP, PM_PWSTCTRL_MDM @@ -140,8 +142,10 @@ /* 2430 calls GLOBALWMPU_RST "GLOBALWARM_RST" instead */ /* PM_WKDEP_MPU specific bits */ -#define OMAP2430_PM_WKDEP_MPU_EN_MDM (1 << 5) -#define OMAP24XX_PM_WKDEP_MPU_EN_DSP (1 << 2) +#define OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT 5 +#define OMAP2430_PM_WKDEP_MPU_EN_MDM_MASK (1 << 5) +#define OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT 2 +#define OMAP24XX_PM_WKDEP_MPU_EN_DSP_MASK (1 << 2) /* PM_EVGENCTRL_MPU specific bits */ diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h index b4686bc345ca..5b5ecfe6c999 100644 --- a/arch/arm/mach-omap2/prm-regbits-34xx.h +++ b/arch/arm/mach-omap2/prm-regbits-34xx.h @@ -68,7 +68,8 @@ #define OMAP3430_VPINIDLE (1 << 0) /* PM_WKDEP_IVA2, PM_WKDEP_MPU shared bits */ -#define OMAP3430_EN_PER (1 << 7) +#define OMAP3430_EN_PER_SHIFT 7 +#define OMAP3430_EN_PER_MASK (1 << 7) /* PM_PWSTCTRL_IVA2, PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE shared bits */ #define OMAP3430_MEMORYCHANGE (1 << 3) @@ -77,7 +78,7 @@ #define OMAP3430_LOGICSTATEST (1 << 2) /* PM_PREPWSTST_IVA2, PM_PREPWSTST_CORE shared bits */ -#define OMAP3430_LASTLOGICSTATEENTERED (1 << 2) +#define OMAP3430_LASTLOGICSTATEENTERED (1 << 2) /* * PM_PREPWSTST_IVA2, PM_PREPWSTST_MPU, PM_PREPWSTST_CORE, @@ -278,8 +279,10 @@ #define OMAP3430_EMULATION_MPU_RST (1 << 11) /* PM_WKDEP_MPU specific bits */ -#define OMAP3430_PM_WKDEP_MPU_EN_DSS (1 << 5) -#define OMAP3430_PM_WKDEP_MPU_EN_IVA2 (1 << 2) +#define OMAP3430_PM_WKDEP_MPU_EN_DSS_SHIFT 5 +#define OMAP3430_PM_WKDEP_MPU_EN_DSS_MASK (1 << 5) +#define OMAP3430_PM_WKDEP_MPU_EN_IVA2_SHIFT 2 +#define OMAP3430_PM_WKDEP_MPU_EN_IVA2_MASK (1 << 2) /* PM_EVGENCTRL_MPU */ #define OMAP3430_OFFLOADMODE_SHIFT 3 diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index bbf41fc8e9a9..e4dc4b17881d 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -18,7 +18,7 @@ #ifndef __ASSEMBLER__ #define OMAP_PRM_REGADDR(module, reg) \ - (void __iomem *)IO_ADDRESS(OMAP2_PRM_BASE + (module) + (reg)) + IO_ADDRESS(OMAP2_PRM_BASE + (module) + (reg)) #else #define OMAP2420_PRM_REGADDR(module, reg) \ IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg)) @@ -305,7 +305,8 @@ static inline u32 prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) * 3430: PM_WKDEP_IVA2, PM_WKDEP_GFX, PM_WKDEP_DSS, PM_WKDEP_CAM, * PM_WKDEP_PER */ -#define OMAP_EN_WKUP (1 << 4) +#define OMAP_EN_WKUP_SHIFT 4 +#define OMAP_EN_WKUP_MASK (1 << 4) /* * 24XX: PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE, PM_PWSTCTRL_GFX, diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 7d9444adc5df..4dcf39c285b9 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -3,7 +3,7 @@ * * OMAP2 serial support. * - * Copyright (C) 2005 Nokia Corporation + * Copyright (C) 2005-2008 Nokia Corporation * Author: Paul Mundt <paul.mundt@nokia.com> * * Based off of arch/arm/mach-omap/omap1/serial.c @@ -22,38 +22,34 @@ #include <mach/common.h> #include <mach/board.h> -static struct clk * uart1_ick = NULL; -static struct clk * uart1_fck = NULL; -static struct clk * uart2_ick = NULL; -static struct clk * uart2_fck = NULL; -static struct clk * uart3_ick = NULL; -static struct clk * uart3_fck = NULL; +static struct clk *uart_ick[OMAP_MAX_NR_PORTS]; +static struct clk *uart_fck[OMAP_MAX_NR_PORTS]; static struct plat_serial8250_port serial_platform_data[] = { { - .membase = (char *)IO_ADDRESS(OMAP_UART1_BASE), - .mapbase = (unsigned long)OMAP_UART1_BASE, + .membase = IO_ADDRESS(OMAP_UART1_BASE), + .mapbase = OMAP_UART1_BASE, .irq = 72, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, .regshift = 2, - .uartclk = OMAP16XX_BASE_BAUD * 16, + .uartclk = OMAP24XX_BASE_BAUD * 16, }, { - .membase = (char *)IO_ADDRESS(OMAP_UART2_BASE), - .mapbase = (unsigned long)OMAP_UART2_BASE, + .membase = IO_ADDRESS(OMAP_UART2_BASE), + .mapbase = OMAP_UART2_BASE, .irq = 73, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, .regshift = 2, - .uartclk = OMAP16XX_BASE_BAUD * 16, + .uartclk = OMAP24XX_BASE_BAUD * 16, }, { - .membase = (char *)IO_ADDRESS(OMAP_UART3_BASE), - .mapbase = (unsigned long)OMAP_UART3_BASE, + .membase = IO_ADDRESS(OMAP_UART3_BASE), + .mapbase = OMAP_UART3_BASE, .irq = 74, .flags = UPF_BOOT_AUTOCONF, .iotype = UPIO_MEM, .regshift = 2, - .uartclk = OMAP16XX_BASE_BAUD * 16, + .uartclk = OMAP24XX_BASE_BAUD * 16, }, { .flags = 0 } @@ -70,7 +66,7 @@ static inline void serial_write_reg(struct plat_serial8250_port *p, int offset, int value) { offset <<= p->regshift; - __raw_writeb(value, (unsigned long)(p->membase + offset)); + __raw_writeb(value, p->membase + offset); } /* @@ -86,10 +82,27 @@ static inline void __init omap_serial_reset(struct plat_serial8250_port *p) serial_write_reg(p, UART_OMAP_SYSC, (0x02 << 3) | (1 << 2) | (1 << 0)); } -void __init omap_serial_init() +void omap_serial_enable_clocks(int enable) +{ + int i; + for (i = 0; i < OMAP_MAX_NR_PORTS; i++) { + if (uart_ick[i] && uart_fck[i]) { + if (enable) { + clk_enable(uart_ick[i]); + clk_enable(uart_fck[i]); + } else { + clk_disable(uart_ick[i]); + clk_disable(uart_fck[i]); + } + } + } +} + +void __init omap_serial_init(void) { int i; const struct omap_uart_config *info; + char name[16]; /* * Make sure the serial ports are muxed on at this point. @@ -97,8 +110,7 @@ void __init omap_serial_init() * if not needed. */ - info = omap_get_config(OMAP_TAG_UART, - struct omap_uart_config); + info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config); if (info == NULL) return; @@ -107,58 +119,26 @@ void __init omap_serial_init() struct plat_serial8250_port *p = serial_platform_data + i; if (!(info->enabled_uarts & (1 << i))) { - p->membase = 0; + p->membase = NULL; p->mapbase = 0; continue; } - switch (i) { - case 0: - uart1_ick = clk_get(NULL, "uart1_ick"); - if (IS_ERR(uart1_ick)) - printk("Could not get uart1_ick\n"); - else { - clk_enable(uart1_ick); - } - - uart1_fck = clk_get(NULL, "uart1_fck"); - if (IS_ERR(uart1_fck)) - printk("Could not get uart1_fck\n"); - else { - clk_enable(uart1_fck); - } - break; - case 1: - uart2_ick = clk_get(NULL, "uart2_ick"); - if (IS_ERR(uart2_ick)) - printk("Could not get uart2_ick\n"); - else { - clk_enable(uart2_ick); - } - - uart2_fck = clk_get(NULL, "uart2_fck"); - if (IS_ERR(uart2_fck)) - printk("Could not get uart2_fck\n"); - else { - clk_enable(uart2_fck); - } - break; - case 2: - uart3_ick = clk_get(NULL, "uart3_ick"); - if (IS_ERR(uart3_ick)) - printk("Could not get uart3_ick\n"); - else { - clk_enable(uart3_ick); - } - - uart3_fck = clk_get(NULL, "uart3_fck"); - if (IS_ERR(uart3_fck)) - printk("Could not get uart3_fck\n"); - else { - clk_enable(uart3_fck); - } - break; - } + sprintf(name, "uart%d_ick", i+1); + uart_ick[i] = clk_get(NULL, name); + if (IS_ERR(uart_ick[i])) { + printk(KERN_ERR "Could not get uart%d_ick\n", i+1); + uart_ick[i] = NULL; + } else + clk_enable(uart_ick[i]); + + sprintf(name, "uart%d_fck", i+1); + uart_fck[i] = clk_get(NULL, name); + if (IS_ERR(uart_fck[i])) { + printk(KERN_ERR "Could not get uart%d_fck\n", i+1); + uart_fck[i] = NULL; + } else + clk_enable(uart_fck[i]); omap_serial_reset(p); } diff --git a/arch/arm/mach-omap2/sleep.S b/arch/arm/mach-omap2/sleep24xx.S index 87a706fd5f82..43336b93b21c 100644 --- a/arch/arm/mach-omap2/sleep.S +++ b/arch/arm/mach-omap2/sleep24xx.S @@ -5,6 +5,10 @@ * Texas Instruments, <www.ti.com> * Richard Woodruff <r-woodruff2@ti.com> * + * (C) Copyright 2006 Nokia Corporation + * Fixed idle loop sleep + * Igor Stoppa <igor.stoppa@nokia.com> + * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of @@ -26,6 +30,8 @@ #include <mach/io.h> #include <mach/pm.h> +#include <mach/omap24xx.h> + #include "sdrc.h" /* First address of reserved address space? apparently valid for OMAP2 & 3 */ @@ -52,15 +58,14 @@ ENTRY(omap24xx_idle_loop_suspend_sz) .word . - omap24xx_idle_loop_suspend /* - * omap242x_cpu_suspend() - Forces OMAP into deep sleep state by completing + * omap24xx_cpu_suspend() - Forces OMAP into deep sleep state by completing * SDRC shutdown then ARM shutdown. Upon wake MPU is back on so just restore * SDRC. * * Input: * R0 : DLL ctrl value pre-Sleep - * R1 : Processor+Revision - * 2420: 0x21 = 242xES1, 0x26 = 242xES2.2 - * 2430: 0x31 = 2430ES1, 0x32 = 2430ES2 + * R1 : SDRC_DLLA_CTRL + * R2 : SDRC_POWER * * The if the DPLL is going to AutoIdle. It seems like the DPLL may be back on * when we get called, but the DLL probably isn't. We will wait a bit more in @@ -80,15 +85,14 @@ ENTRY(omap24xx_idle_loop_suspend_sz) */ ENTRY(omap24xx_cpu_suspend) stmfd sp!, {r0 - r12, lr} @ save registers on stack - mov r3, #0x0 @ clear for mrc call + mov r3, #0x0 @ clear for mcr call mcr p15, 0, r3, c7, c10, 4 @ memory barrier, hope SDR/DDR finished nop nop - ldr r3, A_SDRC_POWER @ addr of sdrc power - ldr r4, [r3] @ value of sdrc power + ldr r4, [r2] @ read SDRC_POWER orr r4, r4, #0x40 @ enable self refresh on idle req mov r5, #0x2000 @ set delay (DPLL relock + DLL relock) - str r4, [r3] @ make it so + str r4, [r2] @ make it so mov r2, #0 nop mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt @@ -97,14 +101,13 @@ loop: subs r5, r5, #0x1 @ awake, wait just a bit bne loop - /* The DPLL has on before we take the DDR out of self refresh */ + /* The DPLL has to be on before we take the DDR out of self refresh */ bic r4, r4, #0x40 @ now clear self refresh bit. - str r4, [r3] @ put vlaue back. + str r4, [r2] @ write to SDRC_POWER ldr r4, A_SDRC0 @ make a clock happen - ldr r4, [r4] + ldr r4, [r4] @ read A_SDRC0 nop @ start auto refresh only after clk ok movs r0, r0 @ see if DDR or SDR - ldrne r1, A_SDRC_DLLA_CTRL_S @ get addr of DLL ctrl strne r0, [r1] @ rewrite DLLA to force DLL reload addne r1, r1, #0x8 @ move to DLLB strne r0, [r1] @ rewrite DLLB to force DLL reload @@ -116,13 +119,8 @@ loop2: /* resume*/ ldmfd sp!, {r0 - r12, pc} @ restore regs and return -A_SDRC_POWER: - .word OMAP242X_SDRC_REGADDR(SDRC_POWER) A_SDRC0: .word A_SDRC0_V -A_SDRC_DLLA_CTRL_S: - .word OMAP242X_SDRC_REGADDR(SDRC_DLLA_CTRL) ENTRY(omap24xx_cpu_suspend_sz) .word . - omap24xx_cpu_suspend - diff --git a/arch/arm/mach-omap2/sram34xx.S b/arch/arm/mach-omap2/sram34xx.S new file mode 100644 index 000000000000..2c7146136342 --- /dev/null +++ b/arch/arm/mach-omap2/sram34xx.S @@ -0,0 +1,179 @@ +/* + * linux/arch/arm/mach-omap3/sram.S + * + * Omap3 specific functions that need to be run in internal SRAM + * + * (C) Copyright 2007 + * Texas Instruments Inc. + * Rajendra Nayak <rnayak@ti.com> + * + * (C) Copyright 2004 + * Texas Instruments, <www.ti.com> + * Richard Woodruff <r-woodruff2@ti.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <linux/linkage.h> +#include <asm/assembler.h> +#include <mach/hardware.h> + +#include <mach/io.h> + +#include "sdrc.h" +#include "cm.h" + + .text + +/* + * Change frequency of core dpll + * r0 = sdrc_rfr_ctrl r1 = sdrc_actim_ctrla r2 = sdrc_actim_ctrlb r3 = M2 + */ +ENTRY(omap3_sram_configure_core_dpll) + stmfd sp!, {r1-r12, lr} @ store regs to stack + cmp r3, #0x2 + blne configure_sdrc + cmp r3, #0x2 + blne lock_dll + cmp r3, #0x1 + blne unlock_dll + bl sdram_in_selfrefresh @ put the SDRAM in self refresh + bl configure_core_dpll + bl enable_sdrc + cmp r3, #0x1 + blne wait_dll_unlock + cmp r3, #0x2 + blne wait_dll_lock + cmp r3, #0x1 + blne configure_sdrc + mov r0, #0 @ return value + ldmfd sp!, {r1-r12, pc} @ restore regs and return +unlock_dll: + ldr r4, omap3_sdrc_dlla_ctrl + ldr r5, [r4] + orr r5, r5, #0x4 + str r5, [r4] + bx lr +lock_dll: + ldr r4, omap3_sdrc_dlla_ctrl + ldr r5, [r4] + bic r5, r5, #0x4 + str r5, [r4] + bx lr +sdram_in_selfrefresh: + mov r5, #0x0 @ Move 0 to R5 + mcr p15, 0, r5, c7, c10, 5 @ memory barrier + ldr r4, omap3_sdrc_power @ read the SDRC_POWER register + ldr r5, [r4] @ read the contents of SDRC_POWER + orr r5, r5, #0x40 @ enable self refresh on idle req + str r5, [r4] @ write back to SDRC_POWER register + ldr r4, omap3_cm_iclken1_core @ read the CM_ICLKEN1_CORE reg + ldr r5, [r4] + bic r5, r5, #0x2 @ disable iclk bit for SRDC + str r5, [r4] +wait_sdrc_idle: + ldr r4, omap3_cm_idlest1_core + ldr r5, [r4] + and r5, r5, #0x2 @ check for SDRC idle + cmp r5, #2 + bne wait_sdrc_idle + bx lr +configure_core_dpll: + ldr r4, omap3_cm_clksel1_pll + ldr r5, [r4] + ldr r6, core_m2_mask_val @ modify m2 for core dpll + and r5, r5, r6 + orr r5, r5, r3, lsl #0x1B @ r3 contains the M2 val + str r5, [r4] + mov r5, #0x800 @ wait for the clock to stabilise + cmp r3, #2 + bne wait_clk_stable + bx lr +wait_clk_stable: + subs r5, r5, #1 + bne wait_clk_stable + nop + nop + nop + nop + nop + nop + nop + nop + nop + nop + bx lr +enable_sdrc: + ldr r4, omap3_cm_iclken1_core + ldr r5, [r4] + orr r5, r5, #0x2 @ enable iclk bit for SDRC + str r5, [r4] +wait_sdrc_idle1: + ldr r4, omap3_cm_idlest1_core + ldr r5, [r4] + and r5, r5, #0x2 + cmp r5, #0 + bne wait_sdrc_idle1 + ldr r4, omap3_sdrc_power + ldr r5, [r4] + bic r5, r5, #0x40 + str r5, [r4] + bx lr +wait_dll_lock: + ldr r4, omap3_sdrc_dlla_status + ldr r5, [r4] + and r5, r5, #0x4 + cmp r5, #0x4 + bne wait_dll_lock + bx lr +wait_dll_unlock: + ldr r4, omap3_sdrc_dlla_status + ldr r5, [r4] + and r5, r5, #0x4 + cmp r5, #0x0 + bne wait_dll_unlock + bx lr +configure_sdrc: + ldr r4, omap3_sdrc_rfr_ctrl + str r0, [r4] + ldr r4, omap3_sdrc_actim_ctrla + str r1, [r4] + ldr r4, omap3_sdrc_actim_ctrlb + str r2, [r4] + bx lr + +omap3_sdrc_power: + .word OMAP34XX_SDRC_REGADDR(SDRC_POWER) +omap3_cm_clksel1_pll: + .word OMAP34XX_CM_REGADDR(PLL_MOD, CM_CLKSEL1) +omap3_cm_idlest1_core: + .word OMAP34XX_CM_REGADDR(CORE_MOD, CM_IDLEST) +omap3_cm_iclken1_core: + .word OMAP34XX_CM_REGADDR(CORE_MOD, CM_ICLKEN1) +omap3_sdrc_rfr_ctrl: + .word OMAP34XX_SDRC_REGADDR(SDRC_RFR_CTRL_0) +omap3_sdrc_actim_ctrla: + .word OMAP34XX_SDRC_REGADDR(SDRC_ACTIM_CTRL_A_0) +omap3_sdrc_actim_ctrlb: + .word OMAP34XX_SDRC_REGADDR(SDRC_ACTIM_CTRL_B_0) +omap3_sdrc_dlla_status: + .word OMAP34XX_SDRC_REGADDR(SDRC_DLLA_STATUS) +omap3_sdrc_dlla_ctrl: + .word OMAP34XX_SDRC_REGADDR(SDRC_DLLA_CTRL) +core_m2_mask_val: + .word 0x07FFFFFF + +ENTRY(omap3_sram_configure_core_dpll_sz) + .word . - omap3_sram_configure_core_dpll diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c index a82dad1a8cc8..df83b97f303f 100644 --- a/arch/arm/mach-pxa/cm-x270.c +++ b/arch/arm/mach-pxa/cm-x270.c @@ -162,7 +162,7 @@ static void __init cmx270_init_rtc(void) platform_device_register(&cmx270_rtc_device); } #else -static inline void cmx2xx_init_rtc(void) {} +static inline void cmx270_init_rtc(void) {} #endif /* 2700G graphics */ diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c index d82528e74bd0..1f272ea83f36 100644 --- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c +++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c @@ -335,9 +335,6 @@ static __init int pxa_cpufreq_init(struct cpufreq_policy *policy) pxa27x_guess_max_freq(); /* set default policy and cpuinfo */ - policy->governor = CPUFREQ_DEFAULT_GOVERNOR; - if (cpu_is_pxa25x()) - policy->policy = CPUFREQ_POLICY_PERFORMANCE; policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */ policy->cur = get_clk_frequency_khz(0); /* current freq */ policy->min = policy->max = policy->cur; diff --git a/arch/arm/mach-pxa/cpufreq-pxa3xx.c b/arch/arm/mach-pxa/cpufreq-pxa3xx.c index 1ea0c9c0adaf..968c8309ec37 100644 --- a/arch/arm/mach-pxa/cpufreq-pxa3xx.c +++ b/arch/arm/mach-pxa/cpufreq-pxa3xx.c @@ -210,7 +210,6 @@ static __init int pxa3xx_cpufreq_init(struct cpufreq_policy *policy) int ret = -EINVAL; /* set default policy and cpuinfo */ - policy->governor = CPUFREQ_DEFAULT_GOVERNOR; policy->cpuinfo.min_freq = 104000; policy->cpuinfo.max_freq = (cpu_is_pxa320()) ? 806000 : 624000; policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */ diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c index d7632f63603c..4b3120dbc049 100644 --- a/arch/arm/mach-pxa/viper.c +++ b/arch/arm/mach-pxa/viper.c @@ -204,25 +204,54 @@ static void viper_set_core_cpu_voltage(unsigned long khz, int force) /* Interrupt handling */ static unsigned long viper_irq_enabled_mask; +static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 }; +static const int viper_isa_irq_map[] = { + 0, /* ISA irq #0, invalid */ + 0, /* ISA irq #1, invalid */ + 0, /* ISA irq #2, invalid */ + 1 << 0, /* ISA irq #3 */ + 1 << 1, /* ISA irq #4 */ + 1 << 2, /* ISA irq #5 */ + 1 << 3, /* ISA irq #6 */ + 1 << 4, /* ISA irq #7 */ + 0, /* ISA irq #8, invalid */ + 1 << 8, /* ISA irq #9 */ + 1 << 5, /* ISA irq #10 */ + 1 << 6, /* ISA irq #11 */ + 1 << 7, /* ISA irq #12 */ + 0, /* ISA irq #13, invalid */ + 1 << 9, /* ISA irq #14 */ + 1 << 10, /* ISA irq #15 */ +}; + +static inline int viper_irq_to_bitmask(unsigned int irq) +{ + return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)]; +} + +static inline int viper_bit_to_irq(int bit) +{ + return viper_isa_irqs[bit] + PXA_ISA_IRQ(0); +} static void viper_ack_irq(unsigned int irq) { - int viper_irq = irq - PXA_ISA_IRQ(0); + int viper_irq = viper_irq_to_bitmask(irq); - if (viper_irq < 8) - VIPER_LO_IRQ_STATUS = 1 << viper_irq; + if (viper_irq & 0xff) + VIPER_LO_IRQ_STATUS = viper_irq; else - VIPER_HI_IRQ_STATUS = 1 << (viper_irq - 8); + VIPER_HI_IRQ_STATUS = (viper_irq >> 8); } static void viper_mask_irq(unsigned int irq) { - viper_irq_enabled_mask &= ~(1 << (irq - PXA_ISA_IRQ(0))); + viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(irq)); } static void viper_unmask_irq(unsigned int irq) { - viper_irq_enabled_mask |= (1 << (irq - PXA_ISA_IRQ(0))); + viper_irq_enabled_mask |= viper_irq_to_bitmask(irq); } static inline unsigned long viper_irq_pending(void) @@ -237,8 +266,12 @@ static void viper_irq_handler(unsigned int irq, struct irq_desc *desc) pending = viper_irq_pending(); do { + /* we're in a chained irq handler, + * so ack the interrupt by hand */ + GEDR(VIPER_CPLD_GPIO) = GPIO_bit(VIPER_CPLD_GPIO); + if (likely(pending)) { - irq = PXA_ISA_IRQ(0) + __ffs(pending); + irq = viper_bit_to_irq(__ffs(pending)); generic_handle_irq(irq); } pending = viper_irq_pending(); @@ -254,15 +287,14 @@ static struct irq_chip viper_irq_chip = { static void __init viper_init_irq(void) { - const int isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 }; - int irq; + int level; int isa_irq; pxa25x_init_irq(); /* setup ISA IRQs */ - for (irq = 0; irq < ARRAY_SIZE(isa_irqs); irq++) { - isa_irq = isa_irqs[irq]; + for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) { + isa_irq = viper_bit_to_irq(level); set_irq_chip(isa_irq, &viper_irq_chip); set_irq_handler(isa_irq, handle_edge_irq); set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE); diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c index 75738000272b..9a37c87152b0 100644 --- a/arch/arm/mach-s3c2410/bast-irq.c +++ b/arch/arm/mach-s3c2410/bast-irq.c @@ -38,7 +38,7 @@ #include <mach/bast-map.h> #include <mach/bast-irq.h> -#include <asm/plat-s3c24xx/irq.h> +#include <plat/irq.h> #if 0 #include <asm/debug-ll.h> diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c index fef646c36b54..4e07943c1e29 100644 --- a/arch/arm/mach-s3c2410/clock.c +++ b/arch/arm/mach-s3c2410/clock.c @@ -37,13 +37,13 @@ #include <mach/hardware.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-clock.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c24xx/s3c2410.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2410.h> +#include <plat/clock.h> +#include <plat/cpu.h> int s3c2410_clkcon_enable(struct clk *clk, int enable) { diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c index 8730797749e3..7d914a470b6c 100644 --- a/arch/arm/mach-s3c2410/dma.c +++ b/arch/arm/mach-s3c2410/dma.c @@ -20,10 +20,10 @@ #include <asm/dma.h> #include <mach/dma.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/dma.h> +#include <plat/cpu.h> +#include <plat/dma.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <asm/plat-s3c/regs-ac97.h> #include <mach/regs-mem.h> diff --git a/arch/arm/mach-s3c2410/include/mach/debug-macro.S b/arch/arm/mach-s3c2410/include/mach/debug-macro.S index 682df23087ab..4c29a89ad077 100644 --- a/arch/arm/mach-s3c2410/include/mach/debug-macro.S +++ b/arch/arm/mach-s3c2410/include/mach/debug-macro.S @@ -14,7 +14,7 @@ #include <mach/map.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #define S3C2410_UART1_OFF (0x4000) #define SHIFT_2440TXF (14-9) @@ -99,4 +99,4 @@ /* include the reset of the code which will do the work */ -#include <asm/plat-s3c/debug-macro.S> +#include <plat/debug-macro.S> diff --git a/arch/arm/mach-s3c2410/include/mach/map.h b/arch/arm/mach-s3c2410/include/mach/map.h index 64bf7e94a5bf..23c470c2e5b1 100644 --- a/arch/arm/mach-s3c2410/include/mach/map.h +++ b/arch/arm/mach-s3c2410/include/mach/map.h @@ -13,7 +13,7 @@ #ifndef __ASM_ARCH_MAP_H #define __ASM_ARCH_MAP_H -#include <asm/plat-s3c/map.h> +#include <plat/map.h> #define S3C2410_ADDR(x) S3C_ADDR(x) diff --git a/arch/arm/mach-s3c2410/include/mach/spi.h b/arch/arm/mach-s3c2410/include/mach/spi.h index 921b13b4f0a0..46d46f5b99f2 100644 --- a/arch/arm/mach-s3c2410/include/mach/spi.h +++ b/arch/arm/mach-s3c2410/include/mach/spi.h @@ -18,6 +18,7 @@ struct s3c2410_spi_info { unsigned int num_cs; /* total chipselects */ int bus_num; /* bus number to use. */ + void (*gpio_setup)(struct s3c2410_spi_info *spi, int enable); void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol); }; diff --git a/arch/arm/mach-s3c2410/include/mach/uncompress.h b/arch/arm/mach-s3c2410/include/mach/uncompress.h index 708e47459ffc..ab39491beee2 100644 --- a/arch/arm/mach-s3c2410/include/mach/uncompress.h +++ b/arch/arm/mach-s3c2410/include/mach/uncompress.h @@ -21,7 +21,7 @@ #undef S3C2410_GPIOREG #define S3C2410_GPIOREG(x) ((S3C24XX_PA_GPIO + (x))) -#include <asm/plat-s3c/uncompress.h> +#include <plat/uncompress.h> static inline int is_arm926(void) { diff --git a/arch/arm/mach-s3c2410/irq.c b/arch/arm/mach-s3c2410/irq.c index f5c5c53e1cc1..92150399563b 100644 --- a/arch/arm/mach-s3c2410/irq.c +++ b/arch/arm/mach-s3c2410/irq.c @@ -25,8 +25,8 @@ #include <linux/ioport.h> #include <linux/sysdev.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/cpu.h> +#include <plat/pm.h> static int s3c2410_irq_add(struct sys_device *sysdev) { diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c index 527f88a288ec..d061fea01900 100644 --- a/arch/arm/mach-s3c2410/mach-amlm5900.c +++ b/arch/arm/mach-s3c2410/mach-amlm5900.c @@ -48,12 +48,12 @@ #include <asm/mach-types.h> #include <mach/fb.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-lcd.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/devs.h> +#include <plat/cpu.h> #ifdef CONFIG_MTD_PARTITIONS diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index e4368e6e7e6c..8db9c700e3c2 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c @@ -39,7 +39,7 @@ #include <asm/mach-types.h> //#include <asm/debug-ll.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/regs-mem.h> #include <mach/regs-lcd.h> @@ -55,9 +55,9 @@ #include <linux/serial_8250.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> #include "usb-simtec.h" #include "nor-simtec.h" diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index 85e710f2863b..98716d0108e9 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c @@ -30,7 +30,7 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-lcd.h> #include <mach/regs-gpio.h> #include <mach/regs-clock.h> @@ -40,10 +40,10 @@ #include <mach/fb.h> #include <asm/plat-s3c24xx/udc.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> +#include <plat/pm.h> static struct map_desc h1940_iodesc[] __initdata = { [0] = { diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c index 3ece2d04934e..82505517846c 100644 --- a/arch/arm/mach-s3c2410/mach-n30.c +++ b/arch/arm/mach-s3c2410/mach-n30.c @@ -41,12 +41,12 @@ #include <asm/mach/map.h> #include <asm/plat-s3c/iic.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/s3c2410.h> +#include <plat/clock.h> +#include <plat/cpu.h> +#include <plat/devs.h> +#include <plat/s3c2410.h> #include <asm/plat-s3c24xx/udc.h> static struct map_desc n30_iodesc[] __initdata = { diff --git a/arch/arm/mach-s3c2410/mach-otom.c b/arch/arm/mach-s3c2410/mach-otom.c index c4dfe3eabe1d..d8255cf87e44 100644 --- a/arch/arm/mach-s3c2410/mach-otom.c +++ b/arch/arm/mach-s3c2410/mach-otom.c @@ -29,13 +29,13 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c24xx/s3c2410.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2410.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> static struct map_desc otom11_iodesc[] __initdata = { /* Device area */ diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c index 97c13192315b..661807e14e8a 100644 --- a/arch/arm/mach-s3c2410/mach-qt2410.c +++ b/arch/arm/mach-s3c2410/mach-qt2410.c @@ -48,17 +48,17 @@ #include <mach/regs-gpio.h> #include <mach/leds-gpio.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/fb.h> #include <asm/plat-s3c/nand.h> #include <asm/plat-s3c24xx/udc.h> #include <mach/spi.h> #include <mach/spi-gpio.h> -#include <asm/plat-s3c24xx/common-smdk.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/common-smdk.h> +#include <plat/devs.h> +#include <plat/cpu.h> +#include <plat/pm.h> static struct map_desc qt2410_iodesc[] __initdata = { { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE } diff --git a/arch/arm/mach-s3c2410/mach-smdk2410.c b/arch/arm/mach-s3c2410/mach-smdk2410.c index d49e58acb03b..152527bb2872 100644 --- a/arch/arm/mach-s3c2410/mach-smdk2410.c +++ b/arch/arm/mach-s3c2410/mach-smdk2410.c @@ -46,12 +46,12 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/devs.h> +#include <plat/cpu.h> -#include <asm/plat-s3c24xx/common-smdk.h> +#include <plat/common-smdk.h> static struct map_desc smdk2410_iodesc[] __initdata = { /* nothing here yet */ diff --git a/arch/arm/mach-s3c2410/mach-tct_hammer.c b/arch/arm/mach-s3c2410/mach-tct_hammer.c index cc2e79fe4f9f..309dcf4c870a 100644 --- a/arch/arm/mach-s3c2410/mach-tct_hammer.c +++ b/arch/arm/mach-s3c2410/mach-tct_hammer.c @@ -44,9 +44,9 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/regs-serial.h> +#include <plat/devs.h> +#include <plat/cpu.h> #ifdef CONFIG_MTD_PARTITIONS diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c index ed3acb05c855..941353af16dc 100644 --- a/arch/arm/mach-s3c2410/mach-vr1000.c +++ b/arch/arm/mach-s3c2410/mach-vr1000.c @@ -40,13 +40,13 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/leds-gpio.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> #include "usb-simtec.h" #include "nor-simtec.h" diff --git a/arch/arm/mach-s3c2410/pm.c b/arch/arm/mach-s3c2410/pm.c index 733f8a227775..a6970f613192 100644 --- a/arch/arm/mach-s3c2410/pm.c +++ b/arch/arm/mach-s3c2410/pm.c @@ -34,8 +34,8 @@ #include <mach/regs-gpio.h> #include <mach/h1940.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/cpu.h> +#include <plat/pm.h> #ifdef CONFIG_S3C2410_PM_DEBUG extern void pm_dbg(const char *fmt, ...); diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c index b1e658c917a0..ac79b536c4c3 100644 --- a/arch/arm/mach-s3c2410/s3c2410.c +++ b/arch/arm/mach-s3c2410/s3c2410.c @@ -29,12 +29,12 @@ #include <asm/irq.h> #include <mach/regs-clock.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> -#include <asm/plat-s3c24xx/s3c2410.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/clock.h> +#include <plat/s3c2410.h> +#include <plat/cpu.h> +#include <plat/devs.h> +#include <plat/clock.h> /* Initial IO mappings */ diff --git a/arch/arm/mach-s3c2410/sleep.S b/arch/arm/mach-s3c2410/sleep.S index be37f221a177..dd5b6388a5a5 100644 --- a/arch/arm/mach-s3c2410/sleep.S +++ b/arch/arm/mach-s3c2410/sleep.S @@ -32,7 +32,7 @@ #include <mach/regs-gpio.h> #include <mach/regs-clock.h> #include <mach/regs-mem.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> /* s3c2410_cpu_suspend * diff --git a/arch/arm/mach-s3c2410/usb-simtec.c b/arch/arm/mach-s3c2410/usb-simtec.c index eb6fc0bfd47e..6078f09b7df5 100644 --- a/arch/arm/mach-s3c2410/usb-simtec.c +++ b/arch/arm/mach-s3c2410/usb-simtec.c @@ -35,7 +35,7 @@ #include <mach/hardware.h> #include <asm/irq.h> -#include <asm/plat-s3c24xx/devs.h> +#include <plat/devs.h> #include "usb-simtec.h" /* control power and monitor over-current events on various Simtec diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c index 5fbaac6054f8..96d9eb15424f 100644 --- a/arch/arm/mach-s3c2412/clock.c +++ b/arch/arm/mach-s3c2412/clock.c @@ -37,13 +37,13 @@ #include <mach/hardware.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-clock.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c24xx/s3c2412.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2412.h> +#include <plat/clock.h> +#include <plat/cpu.h> /* We currently have to assume that the system is running * from the XTPll input, and that all ***REFCLKs are being diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c index dcfff6b8b958..ba0591e71f32 100644 --- a/arch/arm/mach-s3c2412/dma.c +++ b/arch/arm/mach-s3c2412/dma.c @@ -21,10 +21,10 @@ #include <asm/dma.h> #include <mach/dma.h> -#include <asm/plat-s3c24xx/dma.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/dma.h> +#include <plat/cpu.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <asm/plat-s3c/regs-ac97.h> #include <mach/regs-mem.h> diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c index 41720f2c1fea..6000ca9d1815 100644 --- a/arch/arm/mach-s3c2412/irq.c +++ b/arch/arm/mach-s3c2412/irq.c @@ -35,9 +35,9 @@ #include <mach/regs-gpio.h> #include <mach/regs-power.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/irq.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/cpu.h> +#include <plat/irq.h> +#include <plat/pm.h> #define INTMSK(start, end) ((1 << ((end) + 1 - (start))) - 1) #define INTMSK_SUB(start, end) (INTMSK(start, end) << ((start - S3C2410_IRQSUB(0)))) diff --git a/arch/arm/mach-s3c2412/mach-jive.c b/arch/arm/mach-s3c2412/mach-jive.c index ad980a1690c2..b08f18c8c47a 100644 --- a/arch/arm/mach-s3c2412/mach-jive.c +++ b/arch/arm/mach-s3c2412/mach-jive.c @@ -30,7 +30,7 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <asm/plat-s3c/nand.h> #include <asm/plat-s3c/iic.h> @@ -48,10 +48,10 @@ #include <linux/mtd/nand_ecc.h> #include <linux/mtd/partitions.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> +#include <plat/pm.h> #include <asm/plat-s3c24xx/udc.h> static struct map_desc jive_iodesc[] __initdata = { diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c index 8f8d9117b968..c719b5a740a9 100644 --- a/arch/arm/mach-s3c2412/mach-smdk2413.c +++ b/arch/arm/mach-s3c2412/mach-smdk2413.c @@ -32,7 +32,7 @@ #include <asm/mach-types.h> //#include <asm/debug-ll.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/regs-lcd.h> @@ -40,13 +40,13 @@ #include <asm/plat-s3c24xx/udc.h> #include <mach/fb.h> -#include <asm/plat-s3c24xx/s3c2410.h> -#include <asm/plat-s3c24xx/s3c2412.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2410.h> +#include <plat/s3c2412.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> -#include <asm/plat-s3c24xx/common-smdk.h> +#include <plat/common-smdk.h> static struct map_desc smdk2413_iodesc[] __initdata = { }; diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c index bb9bf63b2e02..4cfa19ad9be0 100644 --- a/arch/arm/mach-s3c2412/mach-vstms.c +++ b/arch/arm/mach-s3c2412/mach-vstms.c @@ -32,7 +32,7 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/regs-lcd.h> @@ -41,11 +41,11 @@ #include <asm/plat-s3c/nand.h> -#include <asm/plat-s3c24xx/s3c2410.h> -#include <asm/plat-s3c24xx/s3c2412.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2410.h> +#include <plat/s3c2412.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> static struct map_desc vstms_iodesc[] __initdata = { diff --git a/arch/arm/mach-s3c2412/pm.c b/arch/arm/mach-s3c2412/pm.c index 9540ef752f73..217e9e4ed45f 100644 --- a/arch/arm/mach-s3c2412/pm.c +++ b/arch/arm/mach-s3c2412/pm.c @@ -28,10 +28,10 @@ #include <mach/regs-gpio.h> #include <mach/regs-dsc.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/cpu.h> +#include <plat/pm.h> -#include <asm/plat-s3c24xx/s3c2412.h> +#include <plat/s3c2412.h> extern void s3c2412_sleep_enter(void); diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c index 42440fc55681..313759c3da69 100644 --- a/arch/arm/mach-s3c2412/s3c2412.c +++ b/arch/arm/mach-s3c2412/s3c2412.c @@ -34,7 +34,7 @@ #include <mach/idle.h> #include <mach/regs-clock.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-power.h> #include <mach/regs-gpio.h> #include <mach/regs-gpioj.h> @@ -42,11 +42,11 @@ #include <asm/plat-s3c24xx/regs-spi.h> #include <mach/regs-s3c2412.h> -#include <asm/plat-s3c24xx/s3c2412.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/s3c2412.h> +#include <plat/cpu.h> +#include <plat/devs.h> +#include <plat/clock.h> +#include <plat/pm.h> #ifndef CONFIG_CPU_S3C2412_ONLY void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO; diff --git a/arch/arm/mach-s3c2440/clock.c b/arch/arm/mach-s3c2440/clock.c index 40503a65bacf..d1c29b2537cd 100644 --- a/arch/arm/mach-s3c2440/clock.c +++ b/arch/arm/mach-s3c2440/clock.c @@ -41,8 +41,8 @@ #include <mach/regs-clock.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/cpu.h> /* S3C2440 extended clock support */ diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c index cdd4e6e79ac0..32303f6a8321 100644 --- a/arch/arm/mach-s3c2440/dma.c +++ b/arch/arm/mach-s3c2440/dma.c @@ -20,10 +20,10 @@ #include <asm/dma.h> #include <mach/dma.h> -#include <asm/plat-s3c24xx/dma.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/dma.h> +#include <plat/cpu.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <asm/plat-s3c/regs-ac97.h> #include <mach/regs-mem.h> diff --git a/arch/arm/mach-s3c2440/dsc.c b/arch/arm/mach-s3c2440/dsc.c index 4f7d06baf0d3..554044272771 100644 --- a/arch/arm/mach-s3c2440/dsc.c +++ b/arch/arm/mach-s3c2440/dsc.c @@ -27,8 +27,8 @@ #include <mach/regs-gpio.h> #include <mach/regs-dsc.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/s3c2440.h> +#include <plat/cpu.h> +#include <plat/s3c2440.h> int s3c2440_set_dsc(unsigned int pin, unsigned int value) { diff --git a/arch/arm/mach-s3c2440/irq.c b/arch/arm/mach-s3c2440/irq.c index 33e3ede0a2b3..63c5ab65727f 100644 --- a/arch/arm/mach-s3c2440/irq.c +++ b/arch/arm/mach-s3c2440/irq.c @@ -34,9 +34,9 @@ #include <mach/regs-irq.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> -#include <asm/plat-s3c24xx/irq.h> +#include <plat/cpu.h> +#include <plat/pm.h> +#include <plat/irq.h> /* WDT/AC97 */ diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c index 19eb0e5269ac..e2beca470484 100644 --- a/arch/arm/mach-s3c2440/mach-anubis.c +++ b/arch/arm/mach-s3c2440/mach-anubis.c @@ -35,7 +35,7 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/regs-mem.h> #include <mach/regs-lcd.h> @@ -48,9 +48,9 @@ #include <net/ax88796.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> #define COPYRIGHT ", (c) 2005 Simtec Electronics" diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c index f0f0cc6afcf4..66876c6f2f1c 100644 --- a/arch/arm/mach-s3c2440/mach-at2440evb.c +++ b/arch/arm/mach-s3c2440/mach-at2440evb.c @@ -31,7 +31,7 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/regs-mem.h> #include <mach/regs-lcd.h> @@ -42,9 +42,9 @@ #include <linux/mtd/nand_ecc.h> #include <linux/mtd/partitions.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> static struct map_desc at2440evb_iodesc[] __initdata = { /* Nothing here */ diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c index 49e828d1d4d8..a546307fd53d 100644 --- a/arch/arm/mach-s3c2440/mach-nexcoder.c +++ b/arch/arm/mach-s3c2440/mach-nexcoder.c @@ -36,13 +36,13 @@ //#include <asm/debug-ll.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> -#include <asm/plat-s3c24xx/s3c2410.h> -#include <asm/plat-s3c24xx/s3c2440.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2410.h> +#include <plat/s3c2440.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> static struct map_desc nexcoder_iodesc[] __initdata = { /* nothing here yet */ diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c index 85144aa52c27..2361d606abc5 100644 --- a/arch/arm/mach-s3c2440/mach-osiris.c +++ b/arch/arm/mach-s3c2440/mach-osiris.c @@ -33,7 +33,7 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/regs-mem.h> #include <mach/regs-lcd.h> @@ -44,9 +44,9 @@ #include <linux/mtd/nand_ecc.h> #include <linux/mtd/partitions.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> /* onboard perihperal map */ diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c index a4c690456d19..4d14c7cff892 100644 --- a/arch/arm/mach-s3c2440/mach-rx3715.c +++ b/arch/arm/mach-s3c2440/mach-rx3715.c @@ -37,7 +37,7 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/regs-lcd.h> @@ -45,10 +45,10 @@ #include <asm/plat-s3c/nand.h> #include <mach/fb.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> +#include <plat/pm.h> static struct map_desc rx3715_iodesc[] __initdata = { /* dump ISA space somewhere unused */ diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c index 7ac60b869e7f..fefeaaa4155f 100644 --- a/arch/arm/mach-s3c2440/mach-smdk2440.c +++ b/arch/arm/mach-s3c2440/mach-smdk2440.c @@ -31,20 +31,20 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/regs-lcd.h> #include <mach/idle.h> #include <mach/fb.h> -#include <asm/plat-s3c24xx/s3c2410.h> -#include <asm/plat-s3c24xx/s3c2440.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2410.h> +#include <plat/s3c2440.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> -#include <asm/plat-s3c24xx/common-smdk.h> +#include <plat/common-smdk.h> static struct map_desc smdk2440_iodesc[] __initdata = { /* ISA IO Space map (memory space selected by A24) */ diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c index c81cdb330712..ac1f7ea5f405 100644 --- a/arch/arm/mach-s3c2440/s3c2440.c +++ b/arch/arm/mach-s3c2440/s3c2440.c @@ -29,9 +29,9 @@ #include <mach/hardware.h> #include <asm/irq.h> -#include <asm/plat-s3c24xx/s3c2440.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2440.h> +#include <plat/devs.h> +#include <plat/cpu.h> static struct sys_device s3c2440_sysdev = { .cls = &s3c2440_sysclass, diff --git a/arch/arm/mach-s3c2442/clock.c b/arch/arm/mach-s3c2442/clock.c index 18f2ce4d7b23..ea1aa1f5157a 100644 --- a/arch/arm/mach-s3c2442/clock.c +++ b/arch/arm/mach-s3c2442/clock.c @@ -41,8 +41,8 @@ #include <mach/regs-clock.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/cpu.h> /* S3C2442 extended clock support */ diff --git a/arch/arm/mach-s3c2442/s3c2442.c b/arch/arm/mach-s3c2442/s3c2442.c index fbf8264249da..4663bdc7fff6 100644 --- a/arch/arm/mach-s3c2442/s3c2442.c +++ b/arch/arm/mach-s3c2442/s3c2442.c @@ -19,8 +19,8 @@ #include <linux/serial_core.h> #include <linux/sysdev.h> -#include <asm/plat-s3c24xx/s3c2442.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2442.h> +#include <plat/cpu.h> static struct sys_device s3c2442_sysdev = { .cls = &s3c2442_sysclass, diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c index 603b5ea1deab..2f60bf6b8d43 100644 --- a/arch/arm/mach-s3c2443/clock.c +++ b/arch/arm/mach-s3c2443/clock.c @@ -39,9 +39,9 @@ #include <mach/regs-s3c2443-clock.h> -#include <asm/plat-s3c24xx/s3c2443.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2443.h> +#include <plat/clock.h> +#include <plat/cpu.h> /* We currently have to assume that the system is running * from the XTPll input, and that all ***REFCLKs are being diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c index 5d9ee772659b..f73ccb25ff94 100644 --- a/arch/arm/mach-s3c2443/dma.c +++ b/arch/arm/mach-s3c2443/dma.c @@ -21,10 +21,10 @@ #include <asm/dma.h> #include <mach/dma.h> -#include <asm/plat-s3c24xx/dma.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/dma.h> +#include <plat/cpu.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <asm/plat-s3c/regs-ac97.h> #include <mach/regs-mem.h> diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c index e44341d7dfef..0e0d693f3974 100644 --- a/arch/arm/mach-s3c2443/irq.c +++ b/arch/arm/mach-s3c2443/irq.c @@ -34,9 +34,9 @@ #include <mach/regs-irq.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> -#include <asm/plat-s3c24xx/irq.h> +#include <plat/cpu.h> +#include <plat/pm.h> +#include <plat/irq.h> #define INTMSK(start, end) ((1 << ((end) + 1 - (start))) - 1) diff --git a/arch/arm/mach-s3c2443/mach-smdk2443.c b/arch/arm/mach-s3c2443/mach-smdk2443.c index f0d119dc0409..a7fe65f3dcc1 100644 --- a/arch/arm/mach-s3c2443/mach-smdk2443.c +++ b/arch/arm/mach-s3c2443/mach-smdk2443.c @@ -31,20 +31,20 @@ #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/regs-lcd.h> #include <mach/idle.h> #include <mach/fb.h> -#include <asm/plat-s3c24xx/s3c2410.h> -#include <asm/plat-s3c24xx/s3c2440.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2410.h> +#include <plat/s3c2440.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> -#include <asm/plat-s3c24xx/common-smdk.h> +#include <plat/common-smdk.h> static struct map_desc smdk2443_iodesc[] __initdata = { /* ISA IO Space map (memory space selected by A24) */ diff --git a/arch/arm/mach-s3c2443/s3c2443.c b/arch/arm/mach-s3c2443/s3c2443.c index c973b68cc735..bbeddf9ddcb1 100644 --- a/arch/arm/mach-s3c2443/s3c2443.c +++ b/arch/arm/mach-s3c2443/s3c2443.c @@ -32,9 +32,9 @@ #include <mach/regs-s3c2443-clock.h> #include <mach/reset.h> -#include <asm/plat-s3c24xx/s3c2443.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/s3c2443.h> +#include <plat/devs.h> +#include <plat/cpu.h> static struct map_desc s3c2443_iodesc[] __initdata = { IODESC_ENT(WATCHDOG), diff --git a/arch/arm/mach-sa1100/cpu-sa1100.c b/arch/arm/mach-sa1100/cpu-sa1100.c index f7fa03478efd..244d5956312c 100644 --- a/arch/arm/mach-sa1100/cpu-sa1100.c +++ b/arch/arm/mach-sa1100/cpu-sa1100.c @@ -224,7 +224,6 @@ static int __init sa1100_cpu_init(struct cpufreq_policy *policy) if (policy->cpu != 0) return -EINVAL; policy->cur = policy->min = policy->max = sa11x0_getspeed(0); - policy->governor = CPUFREQ_DEFAULT_GOVERNOR; policy->cpuinfo.min_freq = 59000; policy->cpuinfo.max_freq = 287000; policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 330814d1ee25..d1193884d76d 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -428,7 +428,7 @@ config CPU_32v6K # ARMv7 config CPU_V7 bool "Support ARM V7 processor" - depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB + depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP3 select CPU_32v6K select CPU_32v7 select CPU_ABRT_EV7 diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index b917206ee906..a94f0c44ebc8 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -15,6 +15,9 @@ config ARCH_OMAP1 config ARCH_OMAP2 bool "TI OMAP2" +config ARCH_OMAP3 + bool "TI OMAP3" + endchoice comment "OMAP Feature Selections" @@ -29,6 +32,30 @@ config OMAP_DEBUG_LEDS depends on OMAP_DEBUG_DEVICES default y if LEDS || LEDS_OMAP_DEBUG +config OMAP_DEBUG_POWERDOMAIN + bool "Emit debug messages from powerdomain layer" + depends on ARCH_OMAP2 || ARCH_OMAP3 + default n + help + Say Y here if you want to compile in powerdomain layer + debugging messages for OMAP2/3. These messages can + provide more detail as to why some powerdomain calls + may be failing, and will also emit a descriptive message + for every powerdomain register write. However, the + extra detail costs some memory. + +config OMAP_DEBUG_CLOCKDOMAIN + bool "Emit debug messages from clockdomain layer" + depends on ARCH_OMAP2 || ARCH_OMAP3 + default n + help + Say Y here if you want to compile in clockdomain layer + debugging messages for OMAP2/3. These messages can + provide more detail as to why some clockdomain calls + may be failing, and will also emit a descriptive message + for every clockdomain register write. However, the + extra detail costs some memory. + config OMAP_RESET_CLOCKS bool "Reset unused clocks during boot" depends on ARCH_OMAP @@ -88,13 +115,13 @@ config OMAP_MPU_TIMER config OMAP_32K_TIMER bool "Use 32KHz timer" - depends on ARCH_OMAP16XX || ARCH_OMAP24XX + depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX help Select this option if you want to enable the OMAP 32KHz timer. This timer saves power compared to the OMAP_MPU_TIMER, and has support for no tick during idle. The 32KHz timer provides less intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is - currently only available for OMAP16XX and 24XX. + currently only available for OMAP16XX, 24XX and 34XX. endchoice @@ -109,7 +136,7 @@ config OMAP_32K_TIMER_HZ config OMAP_DM_TIMER bool "Use dual-mode timer" - depends on ARCH_OMAP16XX || ARCH_OMAP24XX + depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX help Select this option if you want to use OMAP Dual-Mode timers. diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index 2c4051cc79a1..deaff58878a2 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile @@ -4,7 +4,7 @@ # Common support obj-y := common.o sram.o clock.o devices.o dma.o mux.o gpio.o \ - usb.o fb.o + usb.o fb.o io.o obj-m := obj-n := obj- := diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c index 8bdf0ead0cf3..0843b8882f93 100644 --- a/arch/arm/plat-omap/common.c +++ b/arch/arm/plat-omap/common.c @@ -248,6 +248,7 @@ static struct omap_globals *omap2_globals; static void __init __omap2_set_globals(void) { + omap2_set_globals_tap(omap2_globals); omap2_set_globals_memory(omap2_globals); omap2_set_globals_control(omap2_globals); omap2_set_globals_prcm(omap2_globals); @@ -258,12 +259,13 @@ static void __init __omap2_set_globals(void) #if defined(CONFIG_ARCH_OMAP2420) static struct omap_globals omap242x_globals = { - .tap = (__force void __iomem *)OMAP2_IO_ADDRESS(0x48014000), - .sdrc = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE), - .sms = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE), - .ctrl = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_CTRL_BASE), - .prm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE), - .cm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_CM_BASE), + .class = OMAP242X_CLASS, + .tap = OMAP2_IO_ADDRESS(0x48014000), + .sdrc = OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE), + .sms = OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE), + .ctrl = OMAP2_IO_ADDRESS(OMAP2420_CTRL_BASE), + .prm = OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE), + .cm = OMAP2_IO_ADDRESS(OMAP2420_CM_BASE), }; void __init omap2_set_globals_242x(void) @@ -276,12 +278,13 @@ void __init omap2_set_globals_242x(void) #if defined(CONFIG_ARCH_OMAP2430) static struct omap_globals omap243x_globals = { - .tap = (__force void __iomem *)OMAP2_IO_ADDRESS(0x4900a000), - .sdrc = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE), - .sms = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE), - .ctrl = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE), - .prm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE), - .cm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2430_CM_BASE), + .class = OMAP243X_CLASS, + .tap = OMAP2_IO_ADDRESS(0x4900a000), + .sdrc = OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE), + .sms = OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE), + .ctrl = OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE), + .prm = OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE), + .cm = OMAP2_IO_ADDRESS(OMAP2430_CM_BASE), }; void __init omap2_set_globals_243x(void) @@ -294,12 +297,13 @@ void __init omap2_set_globals_243x(void) #if defined(CONFIG_ARCH_OMAP3430) static struct omap_globals omap343x_globals = { - .tap = (__force void __iomem *)OMAP2_IO_ADDRESS(0x4830A000), - .sdrc = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE), - .sms = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE), - .ctrl = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE), - .prm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE), - .cm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP3430_CM_BASE), + .class = OMAP343X_CLASS, + .tap = OMAP2_IO_ADDRESS(0x4830A000), + .sdrc = OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE), + .sms = OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE), + .ctrl = OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE), + .prm = OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE), + .cm = OMAP2_IO_ADDRESS(OMAP3430_CM_BASE), }; void __init omap2_set_globals_343x(void) diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c index 97187fa0ae52..0cb2b22388e9 100644 --- a/arch/arm/plat-omap/devices.c +++ b/arch/arm/plat-omap/devices.c @@ -20,17 +20,17 @@ #include <asm/mach/map.h> #include <mach/tc.h> +#include <mach/control.h> #include <mach/board.h> #include <mach/mmc.h> #include <mach/mux.h> #include <mach/gpio.h> #include <mach/menelaus.h> #include <mach/mcbsp.h> +#include <mach/dsp_common.h> #if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE) -#include "../plat-omap/dsp/dsp_common.h" - static struct dsp_platform_data dsp_pdata = { .kdev_list = LIST_HEAD_INIT(dsp_pdata.kdev_list), }; @@ -76,7 +76,7 @@ int dsp_kfunc_device_register(struct dsp_kfunc_device *kdev) { static DEFINE_MUTEX(dsp_pdata_lock); - mutex_init(&kdev->lock); + spin_lock_init(&kdev->lock); mutex_lock(&dsp_pdata_lock); list_add_tail(&kdev->entry, &dsp_pdata.kdev_list); @@ -95,6 +95,10 @@ static inline void omap_init_dsp(void) { } static void omap_init_kp(void) { + /* 2430 and 34xx keypad is on TWL4030 */ + if (cpu_is_omap2430() || cpu_is_omap34xx()) + return; + if (machine_is_omap_h2() || machine_is_omap_h3()) { omap_cfg_reg(F18_1610_KBC0); omap_cfg_reg(D20_1610_KBC1); @@ -156,13 +160,6 @@ void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, { int i; - if (size > OMAP_MAX_MCBSP_COUNT) { - printk(KERN_WARNING "Registered too many McBSPs platform_data." - " Using maximum (%d) available.\n", - OMAP_MAX_MCBSP_COUNT); - size = OMAP_MAX_MCBSP_COUNT; - } - omap_mcbsp_devices = kzalloc(size * sizeof(struct platform_device *), GFP_KERNEL); if (!omap_mcbsp_devices) { @@ -530,10 +527,6 @@ static inline void omap_init_rng(void) {} */ static int __init omap_init_devices(void) { -/* - * Need to enable relevant once for 2430 SDP - */ -#ifndef CONFIG_MACH_OMAP_2430SDP /* please keep these calls, and their implementations above, * in alphabetical order so they're easier to sort through. */ @@ -543,7 +536,6 @@ static int __init omap_init_devices(void) omap_init_uwire(); omap_init_wdt(); omap_init_rng(); -#endif return 0; } arch_initcall(omap_init_devices); diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index a63b644ad305..50f8b4ad9a09 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -1233,7 +1233,7 @@ int omap_request_dma_chain(int dev_id, const char *dev_name, /* request and reserve DMA channels for the chain */ for (i = 0; i < no_of_chans; i++) { err = omap_request_dma(dev_id, dev_name, - callback, 0, &channels[i]); + callback, NULL, &channels[i]); if (err < 0) { int j; for (j = 0; j < i; j++) @@ -2297,13 +2297,13 @@ static int __init omap_init_dma(void) int ch, r; if (cpu_class_is_omap1()) { - omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP1_DMA_BASE); + omap_dma_base = IO_ADDRESS(OMAP1_DMA_BASE); dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT; } else if (cpu_is_omap24xx()) { - omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP24XX_DMA4_BASE); + omap_dma_base = IO_ADDRESS(OMAP24XX_DMA4_BASE); dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; } else if (cpu_is_omap34xx()) { - omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP34XX_DMA4_BASE); + omap_dma_base = IO_ADDRESS(OMAP34XX_DMA4_BASE); dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; } else { pr_err("DMA init failed for unsupported omap\n"); diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 606fcffdcefc..963c31cd1541 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c @@ -693,7 +693,7 @@ int __init omap_dm_timer_init(void) for (i = 0; i < dm_timer_count; i++) { timer = &dm_timers[i]; - timer->io_base = (void __iomem *)io_p2v(timer->phys_base); + timer->io_base = IO_ADDRESS(timer->phys_base); #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) if (cpu_class_is_omap2()) { char clk_name[16]; diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 5935ae4e550b..8679fbca6bbe 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c @@ -28,7 +28,7 @@ /* * OMAP1510 GPIO registers */ -#define OMAP1510_GPIO_BASE (void __iomem *)0xfffce000 +#define OMAP1510_GPIO_BASE IO_ADDRESS(0xfffce000) #define OMAP1510_GPIO_DATA_INPUT 0x00 #define OMAP1510_GPIO_DATA_OUTPUT 0x04 #define OMAP1510_GPIO_DIR_CONTROL 0x08 @@ -42,10 +42,10 @@ /* * OMAP1610 specific GPIO registers */ -#define OMAP1610_GPIO1_BASE (void __iomem *)0xfffbe400 -#define OMAP1610_GPIO2_BASE (void __iomem *)0xfffbec00 -#define OMAP1610_GPIO3_BASE (void __iomem *)0xfffbb400 -#define OMAP1610_GPIO4_BASE (void __iomem *)0xfffbbc00 +#define OMAP1610_GPIO1_BASE IO_ADDRESS(0xfffbe400) +#define OMAP1610_GPIO2_BASE IO_ADDRESS(0xfffbec00) +#define OMAP1610_GPIO3_BASE IO_ADDRESS(0xfffbb400) +#define OMAP1610_GPIO4_BASE IO_ADDRESS(0xfffbbc00) #define OMAP1610_GPIO_REVISION 0x0000 #define OMAP1610_GPIO_SYSCONFIG 0x0010 #define OMAP1610_GPIO_SYSSTATUS 0x0014 @@ -67,12 +67,12 @@ /* * OMAP730 specific GPIO registers */ -#define OMAP730_GPIO1_BASE (void __iomem *)0xfffbc000 -#define OMAP730_GPIO2_BASE (void __iomem *)0xfffbc800 -#define OMAP730_GPIO3_BASE (void __iomem *)0xfffbd000 -#define OMAP730_GPIO4_BASE (void __iomem *)0xfffbd800 -#define OMAP730_GPIO5_BASE (void __iomem *)0xfffbe000 -#define OMAP730_GPIO6_BASE (void __iomem *)0xfffbe800 +#define OMAP730_GPIO1_BASE IO_ADDRESS(0xfffbc000) +#define OMAP730_GPIO2_BASE IO_ADDRESS(0xfffbc800) +#define OMAP730_GPIO3_BASE IO_ADDRESS(0xfffbd000) +#define OMAP730_GPIO4_BASE IO_ADDRESS(0xfffbd800) +#define OMAP730_GPIO5_BASE IO_ADDRESS(0xfffbe000) +#define OMAP730_GPIO6_BASE IO_ADDRESS(0xfffbe800) #define OMAP730_GPIO_DATA_INPUT 0x00 #define OMAP730_GPIO_DATA_OUTPUT 0x04 #define OMAP730_GPIO_DIR_CONTROL 0x08 @@ -83,16 +83,16 @@ /* * omap24xx specific GPIO registers */ -#define OMAP242X_GPIO1_BASE (void __iomem *)0x48018000 -#define OMAP242X_GPIO2_BASE (void __iomem *)0x4801a000 -#define OMAP242X_GPIO3_BASE (void __iomem *)0x4801c000 -#define OMAP242X_GPIO4_BASE (void __iomem *)0x4801e000 +#define OMAP242X_GPIO1_BASE IO_ADDRESS(0x48018000) +#define OMAP242X_GPIO2_BASE IO_ADDRESS(0x4801a000) +#define OMAP242X_GPIO3_BASE IO_ADDRESS(0x4801c000) +#define OMAP242X_GPIO4_BASE IO_ADDRESS(0x4801e000) -#define OMAP243X_GPIO1_BASE (void __iomem *)0x4900C000 -#define OMAP243X_GPIO2_BASE (void __iomem *)0x4900E000 -#define OMAP243X_GPIO3_BASE (void __iomem *)0x49010000 -#define OMAP243X_GPIO4_BASE (void __iomem *)0x49012000 -#define OMAP243X_GPIO5_BASE (void __iomem *)0x480B6000 +#define OMAP243X_GPIO1_BASE IO_ADDRESS(0x4900C000) +#define OMAP243X_GPIO2_BASE IO_ADDRESS(0x4900E000) +#define OMAP243X_GPIO3_BASE IO_ADDRESS(0x49010000) +#define OMAP243X_GPIO4_BASE IO_ADDRESS(0x49012000) +#define OMAP243X_GPIO5_BASE IO_ADDRESS(0x480B6000) #define OMAP24XX_GPIO_REVISION 0x0000 #define OMAP24XX_GPIO_SYSCONFIG 0x0010 @@ -122,13 +122,14 @@ * omap34xx specific GPIO registers */ -#define OMAP34XX_GPIO1_BASE (void __iomem *)0x48310000 -#define OMAP34XX_GPIO2_BASE (void __iomem *)0x49050000 -#define OMAP34XX_GPIO3_BASE (void __iomem *)0x49052000 -#define OMAP34XX_GPIO4_BASE (void __iomem *)0x49054000 -#define OMAP34XX_GPIO5_BASE (void __iomem *)0x49056000 -#define OMAP34XX_GPIO6_BASE (void __iomem *)0x49058000 +#define OMAP34XX_GPIO1_BASE IO_ADDRESS(0x48310000) +#define OMAP34XX_GPIO2_BASE IO_ADDRESS(0x49050000) +#define OMAP34XX_GPIO3_BASE IO_ADDRESS(0x49052000) +#define OMAP34XX_GPIO4_BASE IO_ADDRESS(0x49054000) +#define OMAP34XX_GPIO5_BASE IO_ADDRESS(0x49056000) +#define OMAP34XX_GPIO6_BASE IO_ADDRESS(0x49058000) +#define OMAP_MPUIO_VBASE IO_ADDRESS(OMAP_MPUIO_BASE) struct gpio_bank { void __iomem *base; @@ -160,7 +161,7 @@ struct gpio_bank { #ifdef CONFIG_ARCH_OMAP16XX static struct gpio_bank gpio_bank_1610[5] = { - { OMAP_MPUIO_BASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO}, + { OMAP_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO}, { OMAP1610_GPIO1_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1610 }, { OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 }, { OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 }, @@ -170,14 +171,14 @@ static struct gpio_bank gpio_bank_1610[5] = { #ifdef CONFIG_ARCH_OMAP15XX static struct gpio_bank gpio_bank_1510[2] = { - { OMAP_MPUIO_BASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, + { OMAP_MPUIO_VBASE, INT_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_1510 } }; #endif #ifdef CONFIG_ARCH_OMAP730 static struct gpio_bank gpio_bank_730[7] = { - { OMAP_MPUIO_BASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, + { OMAP_MPUIO_VBASE, INT_730_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO }, { OMAP730_GPIO1_BASE, INT_730_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_730 }, { OMAP730_GPIO2_BASE, INT_730_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_730 }, { OMAP730_GPIO3_BASE, INT_730_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_730 }, @@ -1389,7 +1390,7 @@ static int __init _omap_gpio_init(void) gpio_bank_count = 5; gpio_bank = gpio_bank_1610; - rev = omap_readw(gpio_bank[1].base + OMAP1610_GPIO_REVISION); + rev = __raw_readw(gpio_bank[1].base + OMAP1610_GPIO_REVISION); printk(KERN_INFO "OMAP GPIO hardware version %d.%d\n", (rev >> 4) & 0x0f, rev & 0x0f); } @@ -1408,7 +1409,7 @@ static int __init _omap_gpio_init(void) gpio_bank_count = 4; gpio_bank = gpio_bank_242x; - rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); + rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); printk(KERN_INFO "OMAP242x GPIO hardware version %d.%d\n", (rev >> 4) & 0x0f, rev & 0x0f); } @@ -1417,7 +1418,7 @@ static int __init _omap_gpio_init(void) gpio_bank_count = 5; gpio_bank = gpio_bank_243x; - rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); + rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); printk(KERN_INFO "OMAP243x GPIO hardware version %d.%d\n", (rev >> 4) & 0x0f, rev & 0x0f); } @@ -1428,7 +1429,7 @@ static int __init _omap_gpio_init(void) gpio_bank_count = OMAP34XX_NR_GPIOS; gpio_bank = gpio_bank_34xx; - rev = omap_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); + rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); printk(KERN_INFO "OMAP34xx GPIO hardware version %d.%d\n", (rev >> 4) & 0x0f, rev & 0x0f); } @@ -1437,10 +1438,9 @@ static int __init _omap_gpio_init(void) int j, gpio_count = 16; bank = &gpio_bank[i]; - bank->base = IO_ADDRESS(bank->base); spin_lock_init(&bank->lock); if (bank_is_mpuio(bank)) - omap_writew(0xFFFF, OMAP_MPUIO_BASE + OMAP_MPUIO_GPIO_MASKIT); + __raw_writew(0xffff, bank->base + OMAP_MPUIO_GPIO_MASKIT); if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) { __raw_writew(0xffff, bank->base + OMAP1510_GPIO_INT_MASK); __raw_writew(0x0000, bank->base + OMAP1510_GPIO_INT_STATUS); diff --git a/arch/arm/plat-omap/include/mach/board-2430sdp.h b/arch/arm/plat-omap/include/mach/board-2430sdp.h index cf1dc0223949..10d449ea7ed0 100644 --- a/arch/arm/plat-omap/include/mach/board-2430sdp.h +++ b/arch/arm/plat-omap/include/mach/board-2430sdp.h @@ -30,10 +30,12 @@ #define __ASM_ARCH_OMAP_2430SDP_H /* Placeholder for 2430SDP specific defines */ -#define OMAP24XX_ETHR_START 0x08000300 +#define OMAP24XX_ETHR_START 0x08000300 #define OMAP24XX_ETHR_GPIO_IRQ 149 #define SDP2430_CS0_BASE 0x04000000 -#define TWL4030_IRQNUM INT_24XX_SYS_NIRQ +/* Function prototypes */ +extern void sdp2430_flash_init(void); +extern void sdp2430_usb_init(void); #endif /* __ASM_ARCH_OMAP_2430SDP_H */ diff --git a/arch/arm/plat-omap/include/mach/board-apollon.h b/arch/arm/plat-omap/include/mach/board-apollon.h index d6f2a8e963d5..731c858cf3fe 100644 --- a/arch/arm/plat-omap/include/mach/board-apollon.h +++ b/arch/arm/plat-omap/include/mach/board-apollon.h @@ -31,6 +31,12 @@ extern void apollon_mmc_init(void); +static inline int apollon_plus(void) +{ + /* The apollon plus has IDCODE revision 5 */ + return system_rev & 0xc0; +} + /* Placeholder for APOLLON specific defines */ #define APOLLON_ETHR_GPIO_IRQ 74 diff --git a/arch/arm/plat-omap/include/mach/board-h4.h b/arch/arm/plat-omap/include/mach/board-h4.h index 1470cd3e519b..7c3fa0f0a65e 100644 --- a/arch/arm/plat-omap/include/mach/board-h4.h +++ b/arch/arm/plat-omap/include/mach/board-h4.h @@ -1,7 +1,7 @@ /* * arch/arm/plat-omap/include/mach/board-h4.h * - * Hardware definitions for TI OMAP1610 H4 board. + * Hardware definitions for TI OMAP2420 H4 board. * * Initial creation by Dirk Behme <dirk.behme@de.bosch.com> * @@ -29,6 +29,9 @@ #ifndef __ASM_ARCH_OMAP_H4_H #define __ASM_ARCH_OMAP_H4_H +/* MMC Prototypes */ +extern void h4_mmc_init(void); + /* Placeholder for H4 specific defines */ #define OMAP24XX_ETHR_GPIO_IRQ 92 #endif /* __ASM_ARCH_OMAP_H4_H */ diff --git a/arch/arm/plat-omap/include/mach/board-ldp.h b/arch/arm/plat-omap/include/mach/board-ldp.h new file mode 100644 index 000000000000..66e2746c04ca --- /dev/null +++ b/arch/arm/plat-omap/include/mach/board-ldp.h @@ -0,0 +1,36 @@ +/* + * arch/arm/plat-omap/include/mach/board-ldp.h + * + * Hardware definitions for TI OMAP3 LDP. + * + * Copyright (C) 2008 Texas Instruments Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __ASM_ARCH_OMAP_LDP_H +#define __ASM_ARCH_OMAP_LDP_H + +extern void twl4030_bci_battery_init(void); + +#define TWL4030_IRQNUM INT_34XX_SYS_NIRQ + +#endif /* __ASM_ARCH_OMAP_LDP_H */ diff --git a/arch/arm/plat-omap/include/mach/board-omap3beagle.h b/arch/arm/plat-omap/include/mach/board-omap3beagle.h new file mode 100644 index 000000000000..3080d52d877a --- /dev/null +++ b/arch/arm/plat-omap/include/mach/board-omap3beagle.h @@ -0,0 +1,33 @@ +/* + * arch/arm/plat-omap/include/mach/board-omap3beagle.h + * + * Hardware definitions for TI OMAP3 BEAGLE. + * + * Initial creation by Syed Mohammed Khasim <khasim@ti.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __ASM_ARCH_OMAP3_BEAGLE_H +#define __ASM_ARCH_OMAP3_BEAGLE_H + +#endif /* __ASM_ARCH_OMAP3_BEAGLE_H */ + diff --git a/arch/arm/plat-omap/include/mach/board-overo.h b/arch/arm/plat-omap/include/mach/board-overo.h new file mode 100644 index 000000000000..7ecae66966d1 --- /dev/null +++ b/arch/arm/plat-omap/include/mach/board-overo.h @@ -0,0 +1,26 @@ +/* + * board-overo.h (Gumstix Overo) + * + * Initial code: Steve Sakoman <steve@sakoman.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __ASM_ARCH_OVERO_H +#define __ASM_ARCH_OVERO_H + +#define OVERO_GPIO_BT_XGATE 15 +#define OVERO_GPIO_W2W_NRESET 16 +#define OVERO_GPIO_BT_NRESET 164 +#define OVERO_GPIO_USBH_CPEN 168 +#define OVERO_GPIO_USBH_NRESET 183 + +#endif /* ____ASM_ARCH_OVERO_H */ + diff --git a/arch/arm/plat-omap/include/mach/board.h b/arch/arm/plat-omap/include/mach/board.h index 54445642f35d..c23c12ccb353 100644 --- a/arch/arm/plat-omap/include/mach/board.h +++ b/arch/arm/plat-omap/include/mach/board.h @@ -45,6 +45,8 @@ struct omap_mmc_conf { unsigned cover:1; /* 4 wire signaling is optional, and is only used for SD/SDIO */ unsigned wire4:1; + /* use the internal clock */ + unsigned internal_clock:1; s16 power_pin; s16 switch_pin; s16 wp_pin; diff --git a/arch/arm/plat-omap/include/mach/clock.h b/arch/arm/plat-omap/include/mach/clock.h index 92f7c7238fcd..719298554ed7 100644 --- a/arch/arm/plat-omap/include/mach/clock.h +++ b/arch/arm/plat-omap/include/mach/clock.h @@ -15,6 +15,7 @@ struct module; struct clk; +struct clockdomain; #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) @@ -79,6 +80,8 @@ struct clk { u32 clksel_mask; const struct clksel *clksel; struct dpll_data *dpll_data; + const char *clkdm_name; + struct clockdomain *clkdm; #else __u8 rate_offset; __u8 src_offset; diff --git a/arch/arm/plat-omap/include/mach/clockdomain.h b/arch/arm/plat-omap/include/mach/clockdomain.h new file mode 100644 index 000000000000..1f51f0173784 --- /dev/null +++ b/arch/arm/plat-omap/include/mach/clockdomain.h @@ -0,0 +1,106 @@ +/* + * linux/include/asm-arm/arch-omap/clockdomain.h + * + * OMAP2/3 clockdomain framework functions + * + * Copyright (C) 2008 Texas Instruments, Inc. + * Copyright (C) 2008 Nokia Corporation + * + * Written by Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARM_ARCH_OMAP_CLOCKDOMAIN_H +#define __ASM_ARM_ARCH_OMAP_CLOCKDOMAIN_H + +#include <mach/powerdomain.h> +#include <mach/clock.h> +#include <mach/cpu.h> + +/* Clockdomain capability flags */ +#define CLKDM_CAN_FORCE_SLEEP (1 << 0) +#define CLKDM_CAN_FORCE_WAKEUP (1 << 1) +#define CLKDM_CAN_ENABLE_AUTO (1 << 2) +#define CLKDM_CAN_DISABLE_AUTO (1 << 3) + +#define CLKDM_CAN_HWSUP (CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_DISABLE_AUTO) +#define CLKDM_CAN_SWSUP (CLKDM_CAN_FORCE_SLEEP | CLKDM_CAN_FORCE_WAKEUP) +#define CLKDM_CAN_HWSUP_SWSUP (CLKDM_CAN_SWSUP | CLKDM_CAN_HWSUP) + +/* OMAP24XX CM_CLKSTCTRL_*.AUTOSTATE_* register bit values */ +#define OMAP24XX_CLKSTCTRL_DISABLE_AUTO 0x0 +#define OMAP24XX_CLKSTCTRL_ENABLE_AUTO 0x1 + +/* OMAP3XXX CM_CLKSTCTRL_*.CLKTRCTRL_* register bit values */ +#define OMAP34XX_CLKSTCTRL_DISABLE_AUTO 0x0 +#define OMAP34XX_CLKSTCTRL_FORCE_SLEEP 0x1 +#define OMAP34XX_CLKSTCTRL_FORCE_WAKEUP 0x2 +#define OMAP34XX_CLKSTCTRL_ENABLE_AUTO 0x3 + +/* + * struct clkdm_pwrdm_autodep - a powerdomain that should have wkdeps + * and sleepdeps added when a powerdomain should stay active in hwsup mode; + * and conversely, removed when the powerdomain should be allowed to go + * inactive in hwsup mode. + */ +struct clkdm_pwrdm_autodep { + + /* Name of the powerdomain to add a wkdep/sleepdep on */ + const char *pwrdm_name; + + /* Powerdomain pointer (looked up at clkdm_init() time) */ + struct powerdomain *pwrdm; + + /* OMAP chip types that this clockdomain dep is valid on */ + const struct omap_chip_id omap_chip; + +}; + +struct clockdomain { + + /* Clockdomain name */ + const char *name; + + /* Powerdomain enclosing this clockdomain */ + const char *pwrdm_name; + + /* CLKTRCTRL/AUTOSTATE field mask in CM_CLKSTCTRL reg */ + const u16 clktrctrl_mask; + + /* Clockdomain capability flags */ + const u8 flags; + + /* OMAP chip types that this clockdomain is valid on */ + const struct omap_chip_id omap_chip; + + /* Usecount tracking */ + atomic_t usecount; + + /* Powerdomain pointer assigned at clkdm_register() */ + struct powerdomain *pwrdm; + + struct list_head node; + +}; + +void clkdm_init(struct clockdomain **clkdms, struct clkdm_pwrdm_autodep *autodeps); +int clkdm_register(struct clockdomain *clkdm); +int clkdm_unregister(struct clockdomain *clkdm); +struct clockdomain *clkdm_lookup(const char *name); + +int clkdm_for_each(int (*fn)(struct clockdomain *clkdm)); +struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm); + +void omap2_clkdm_allow_idle(struct clockdomain *clkdm); +void omap2_clkdm_deny_idle(struct clockdomain *clkdm); + +int omap2_clkdm_wakeup(struct clockdomain *clkdm); +int omap2_clkdm_sleep(struct clockdomain *clkdm); + +int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk); +int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk); + +#endif diff --git a/arch/arm/plat-omap/include/mach/common.h b/arch/arm/plat-omap/include/mach/common.h index 06093112b665..ef70e2b0f054 100644 --- a/arch/arm/plat-omap/include/mach/common.h +++ b/arch/arm/plat-omap/include/mach/common.h @@ -34,6 +34,7 @@ struct sys_timer; extern void omap_map_common_io(void); extern struct sys_timer omap_timer; extern void omap_serial_init(void); +extern void omap_serial_enable_clocks(int enable); #ifdef CONFIG_I2C_OMAP extern int omap_register_i2c_bus(int bus_id, u32 clkrate, struct i2c_board_info const *info, @@ -49,6 +50,7 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate, /* IO bases for various OMAP processors */ struct omap_globals { + u32 class; /* OMAP class to detect */ void __iomem *tap; /* Control module ID code */ void __iomem *sdrc; /* SDRAM Controller */ void __iomem *sms; /* SDRAM Memory Scheduler */ @@ -62,6 +64,7 @@ void omap2_set_globals_243x(void); void omap2_set_globals_343x(void); /* These get called from omap2_set_globals_xxxx(), do not call these */ +void omap2_set_globals_tap(struct omap_globals *); void omap2_set_globals_memory(struct omap_globals *); void omap2_set_globals_control(struct omap_globals *); void omap2_set_globals_prcm(struct omap_globals *); diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h index e3fd62d9a995..dc9886760577 100644 --- a/arch/arm/plat-omap/include/mach/control.h +++ b/arch/arm/plat-omap/include/mach/control.h @@ -1,13 +1,10 @@ -#ifndef __ASM_ARCH_CONTROL_H -#define __ASM_ARCH_CONTROL_H - /* * arch/arm/plat-omap/include/mach/control.h * * OMAP2/3 System Control Module definitions * - * Copyright (C) 2007 Texas Instruments, Inc. - * Copyright (C) 2007 Nokia Corporation + * Copyright (C) 2007-2008 Texas Instruments, Inc. + * Copyright (C) 2007-2008 Nokia Corporation * * Written by Paul Walmsley * @@ -16,14 +13,23 @@ * the Free Software Foundation. */ +#ifndef __ASM_ARCH_CONTROL_H +#define __ASM_ARCH_CONTROL_H + #include <mach/io.h> +#ifndef __ASSEMBLY__ #define OMAP242X_CTRL_REGADDR(reg) \ - (void __iomem *)IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) + IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) #define OMAP243X_CTRL_REGADDR(reg) \ - (void __iomem *)IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) + IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) #define OMAP343X_CTRL_REGADDR(reg) \ - (void __iomem *)IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) + IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) +#else +#define OMAP242X_CTRL_REGADDR(reg) IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) +#define OMAP243X_CTRL_REGADDR(reg) IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) +#define OMAP343X_CTRL_REGADDR(reg) IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) +#endif /* __ASSEMBLY__ */ /* * As elsewhere, the "OMAP2_" prefix indicates that the macro is valid for @@ -134,6 +140,7 @@ #define OMAP343X_CONTROL_TEST_KEY_13 (OMAP2_CONTROL_GENERAL + 0x00fc) #define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) #define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) +#define OMAP343X_CONTROL_TEMP_SENSOR (OMAP2_CONTROL_GENERAL + 0x02b4) /* * REVISIT: This list of registers is not comprehensive - there are more diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h index 05aee0eda34f..e0464187209d 100644 --- a/arch/arm/plat-omap/include/mach/cpu.h +++ b/arch/arm/plat-omap/include/mach/cpu.h @@ -346,9 +346,14 @@ IS_OMAP_TYPE(3430, 0x3430) get_sil_revision(system_rev) /* Various silicon macros defined here */ +#define OMAP242X_CLASS 0x24200000 #define OMAP2420_REV_ES1_0 0x24200000 #define OMAP2420_REV_ES2_0 0x24201000 + +#define OMAP243X_CLASS 0x24300000 #define OMAP2430_REV_ES1_0 0x24300000 + +#define OMAP343X_CLASS 0x34300000 #define OMAP3430_REV_ES1_0 0x34300000 #define OMAP3430_REV_ES2_0 0x34301000 #define OMAP3430_REV_ES2_1 0x34302000 diff --git a/arch/arm/plat-omap/include/mach/debug-macro.S b/arch/arm/plat-omap/include/mach/debug-macro.S index 1b0039bdeb4e..1b11f5c6a2d9 100644 --- a/arch/arm/plat-omap/include/mach/debug-macro.S +++ b/arch/arm/plat-omap/include/mach/debug-macro.S @@ -35,6 +35,18 @@ #ifdef CONFIG_OMAP_LL_DEBUG_UART3 add \rx, \rx, #0x00004000 @ UART 3 #endif + +#elif CONFIG_ARCH_OMAP3 + moveq \rx, #0x48000000 @ physical base address + movne \rx, #0xd8000000 @ virtual base + orr \rx, \rx, #0x0006a000 +#ifdef CONFIG_OMAP_LL_DEBUG_UART2 + add \rx, \rx, #0x00002000 @ UART 2 +#endif +#ifdef CONFIG_OMAP_LL_DEBUG_UART3 + add \rx, \rx, #0x00fb0000 @ UART 3 + add \rx, \rx, #0x00006000 +#endif #endif .endm diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S index d4e9043bf201..030118ee204a 100644 --- a/arch/arm/plat-omap/include/mach/entry-macro.S +++ b/arch/arm/plat-omap/include/mach/entry-macro.S @@ -55,9 +55,17 @@ 1510: .endm -#elif defined(CONFIG_ARCH_OMAP24XX) +#endif +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) +#if defined(CONFIG_ARCH_OMAP24XX) #include <mach/omap24xx.h> +#endif +#if defined(CONFIG_ARCH_OMAP34XX) +#include <mach/omap34xx.h> +#endif + +#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt number */ .macro disable_fiq .endm @@ -79,7 +87,7 @@ ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */ cmp \irqnr, #0x0 2222: - ldrne \irqnr, [\base, #IRQ_SIR_IRQ] + ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] .endm diff --git a/arch/arm/plat-omap/include/mach/fpga.h b/arch/arm/plat-omap/include/mach/fpga.h index c92e4b42b289..f1864a652f7a 100644 --- a/arch/arm/plat-omap/include/mach/fpga.h +++ b/arch/arm/plat-omap/include/mach/fpga.h @@ -34,9 +34,9 @@ extern void omap1510_fpga_init_irq(void); * --------------------------------------------------------------------------- */ /* maps in the FPGA registers and the ETHR registers */ -#define H2P2_DBG_FPGA_BASE 0xE8000000 /* VA */ -#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */ -#define H2P2_DBG_FPGA_START 0x04000000 /* PA */ +#define H2P2_DBG_FPGA_BASE IOMEM(0xE8000000) /* VA */ +#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */ +#define H2P2_DBG_FPGA_START 0x04000000 /* PA */ #define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300) #define H2P2_DBG_FPGA_FPGA_REV (H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */ @@ -85,9 +85,9 @@ struct h2p2_dbg_fpga { * OMAP-1510 FPGA * --------------------------------------------------------------------------- */ -#define OMAP1510_FPGA_BASE 0xE8000000 /* Virtual */ -#define OMAP1510_FPGA_SIZE SZ_4K -#define OMAP1510_FPGA_START 0x08000000 /* Physical */ +#define OMAP1510_FPGA_BASE IOMEM(0xE8000000) /* VA */ +#define OMAP1510_FPGA_SIZE SZ_4K +#define OMAP1510_FPGA_START 0x08000000 /* PA */ /* Revision */ #define OMAP1510_FPGA_REV_LOW (OMAP1510_FPGA_BASE + 0x0) diff --git a/arch/arm/plat-omap/include/mach/gpio.h b/arch/arm/plat-omap/include/mach/gpio.h index 8c71e288860f..98e9008b7e9d 100644 --- a/arch/arm/plat-omap/include/mach/gpio.h +++ b/arch/arm/plat-omap/include/mach/gpio.h @@ -29,7 +29,7 @@ #include <linux/io.h> #include <mach/irqs.h> -#define OMAP_MPUIO_BASE (void __iomem *)0xfffb5000 +#define OMAP_MPUIO_BASE 0xfffb5000 #ifdef CONFIG_ARCH_OMAP730 #define OMAP_MPUIO_INPUT_LATCH 0x00 @@ -76,6 +76,8 @@ extern void omap_free_gpio(int gpio); extern void omap_set_gpio_direction(int gpio, int is_input); extern void omap_set_gpio_dataout(int gpio, int enable); extern int omap_get_gpio_datain(int gpio); +extern void omap2_gpio_prepare_for_retention(void); +extern void omap2_gpio_resume_after_retention(void); extern void omap_set_gpio_debounce(int gpio, int enable); extern void omap_set_gpio_debounce_time(int gpio, int enable); diff --git a/arch/arm/plat-omap/include/mach/gpmc.h b/arch/arm/plat-omap/include/mach/gpmc.h index 6a8e07ffc2d0..45b678439bb7 100644 --- a/arch/arm/plat-omap/include/mach/gpmc.h +++ b/arch/arm/plat-omap/include/mach/gpmc.h @@ -11,6 +11,9 @@ #ifndef __OMAP2_GPMC_H #define __OMAP2_GPMC_H +/* Maximum Number of Chip Selects */ +#define GPMC_CS_NUM 8 + #define GPMC_CS_CONFIG1 0x00 #define GPMC_CS_CONFIG2 0x04 #define GPMC_CS_CONFIG3 0x08 @@ -22,6 +25,9 @@ #define GPMC_CS_NAND_ADDRESS 0x20 #define GPMC_CS_NAND_DATA 0x24 +#define GPMC_CONFIG 0x50 +#define GPMC_STATUS 0x54 + #define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31) #define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30) #define GPMC_CONFIG1_READTYPE_ASYNC (0 << 29) @@ -78,9 +84,14 @@ struct gpmc_timings { u16 access; /* Start-cycle to first data valid delay */ u16 rd_cycle; /* Total read cycle time */ u16 wr_cycle; /* Total write cycle time */ + + /* The following are only on OMAP3430 */ + u16 wr_access; /* WRACCESSTIME */ + u16 wr_data_mux_bus; /* WRDATAONADMUXBUS */ }; extern unsigned int gpmc_ns_to_ticks(unsigned int time_ns); +extern unsigned int gpmc_ticks_to_ns(unsigned int ticks); extern unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns); extern unsigned long gpmc_get_fclk_period(void); @@ -92,5 +103,6 @@ extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base); extern void gpmc_cs_free(int cs); extern int gpmc_cs_set_reserved(int cs, int reserved); extern int gpmc_cs_reserved(int cs); +extern void gpmc_init(void); #endif diff --git a/arch/arm/plat-omap/include/mach/hardware.h b/arch/arm/plat-omap/include/mach/hardware.h index 07f5d7f21528..6589ddbb63b2 100644 --- a/arch/arm/plat-omap/include/mach/hardware.h +++ b/arch/arm/plat-omap/include/mach/hardware.h @@ -89,7 +89,7 @@ #define DPLL_CTL (0xfffecf00) /* DSP clock control. Must use __raw_readw() and __raw_writew() with these */ -#define DSP_CONFIG_REG_BASE (0xe1008000) +#define DSP_CONFIG_REG_BASE IOMEM(0xe1008000) #define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0) #define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4) #define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8) @@ -282,8 +282,8 @@ #include "omap730.h" #include "omap1510.h" -#include "omap24xx.h" #include "omap16xx.h" +#include "omap24xx.h" #include "omap34xx.h" #ifndef __ASSEMBLER__ @@ -322,6 +322,14 @@ #include "board-2430sdp.h" #endif +#ifdef CONFIG_MACH_OMAP3_BEAGLE +#include "board-omap3beagle.h" +#endif + +#ifdef CONFIG_MACH_OMAP_LDP +#include "board-ldp.h" +#endif + #ifdef CONFIG_MACH_OMAP_APOLLON #include "board-apollon.h" #endif diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h index 2a30b7d88cde..adc83b7b8205 100644 --- a/arch/arm/plat-omap/include/mach/io.h +++ b/arch/arm/plat-omap/include/mach/io.h @@ -55,14 +55,13 @@ #if defined(CONFIG_ARCH_OMAP1) -#define IO_PHYS 0xFFFB0000 -#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ -#define IO_SIZE 0x40000 -#define IO_VIRT (IO_PHYS - IO_OFFSET) -#define IO_ADDRESS(pa) ((pa) - IO_OFFSET) -#define OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET) -#define io_p2v(pa) ((pa) - IO_OFFSET) -#define io_v2p(va) ((va) + IO_OFFSET) +#define IO_PHYS 0xFFFB0000 +#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ +#define IO_SIZE 0x40000 +#define IO_VIRT (IO_PHYS - IO_OFFSET) +#define __IO_ADDRESS(pa) ((pa) - IO_OFFSET) +#define __OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET) +#define io_v2p(va) ((va) + IO_OFFSET) #elif defined(CONFIG_ARCH_OMAP2) @@ -74,7 +73,6 @@ #define L4_24XX_VIRT 0xd8000000 #define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */ -#ifdef CONFIG_ARCH_OMAP2430 #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 */ #define L4_WK_243X_VIRT 0xd9000000 #define L4_WK_243X_SIZE SZ_1M @@ -88,13 +86,10 @@ #define OMAP243X_SMS_VIRT 0xFC000000 #define OMAP243X_SMS_SIZE SZ_1M -#endif - -#define IO_OFFSET 0x90000000 -#define IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ -#define OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ -#define io_p2v(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ -#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */ +#define IO_OFFSET 0x90000000 +#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ +#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ +#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */ /* DSP */ #define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ @@ -149,9 +144,8 @@ #define IO_OFFSET 0x90000000 -#define IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ -#define OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ -#define io_p2v(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ +#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ +#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ #define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */ /* DSP */ @@ -167,7 +161,14 @@ #endif -#ifndef __ASSEMBLER__ +#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa)) +#define OMAP1_IO_ADDRESS(pa) IOMEM(__OMAP1_IO_ADDRESS(pa)) +#define OMAP2_IO_ADDRESS(pa) IOMEM(__OMAP2_IO_ADDRESS(pa)) + +#ifdef __ASSEMBLER__ +#define IOMEM(x) x +#else +#define IOMEM(x) ((void __force __iomem *)(x)) /* * Functions to access the OMAP IO region @@ -178,13 +179,13 @@ * - DO NOT use hardcoded virtual addresses to allow changing the * IO address space again if needed */ -#define omap_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a)) -#define omap_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a)) -#define omap_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a)) +#define omap_readb(a) __raw_readb(IO_ADDRESS(a)) +#define omap_readw(a) __raw_readw(IO_ADDRESS(a)) +#define omap_readl(a) __raw_readl(IO_ADDRESS(a)) -#define omap_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v)) -#define omap_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v)) -#define omap_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v)) +#define omap_writeb(v,a) __raw_writeb(v, IO_ADDRESS(a)) +#define omap_writew(v,a) __raw_writew(v, IO_ADDRESS(a)) +#define omap_writel(v,a) __raw_writel(v, IO_ADDRESS(a)) extern void omap1_map_common_io(void); extern void omap1_init_common_hw(void); @@ -192,6 +193,12 @@ extern void omap1_init_common_hw(void); extern void omap2_map_common_io(void); extern void omap2_init_common_hw(void); +#define __arch_ioremap(p,s,t) omap_ioremap(p,s,t) +#define __arch_iounmap(v) omap_iounmap(v) + +void __iomem *omap_ioremap(unsigned long phys, size_t size, unsigned int type); +void omap_iounmap(volatile void __iomem *addr); + #endif #endif diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h index 62aa7dfb9464..a2929ac8c687 100644 --- a/arch/arm/plat-omap/include/mach/irqs.h +++ b/arch/arm/plat-omap/include/mach/irqs.h @@ -125,6 +125,7 @@ #define INT_UART2 (15 + IH2_BASE) #define INT_BT_MCSI1TX (16 + IH2_BASE) #define INT_BT_MCSI1RX (17 + IH2_BASE) +#define INT_SOSSI_MATCH (19 + IH2_BASE) #define INT_USB_W2FC (20 + IH2_BASE) #define INT_1WIRE (21 + IH2_BASE) #define INT_OS_TIMER (22 + IH2_BASE) @@ -176,6 +177,7 @@ #define INT_1610_DMA_CH14 (61 + IH2_BASE) #define INT_1610_DMA_CH15 (62 + IH2_BASE) #define INT_1610_NAND (63 + IH2_BASE) +#define INT_1610_SHA1MD5 (91 + IH2_BASE) /* * OMAP-730 specific IRQ numbers for interrupt handler 2 @@ -263,12 +265,18 @@ #define INT_24XX_GPTIMER10 46 #define INT_24XX_GPTIMER11 47 #define INT_24XX_GPTIMER12 48 +#define INT_24XX_SHA1MD5 51 +#define INT_24XX_MCBSP4_IRQ_TX 54 +#define INT_24XX_MCBSP4_IRQ_RX 55 #define INT_24XX_I2C1_IRQ 56 #define INT_24XX_I2C2_IRQ 57 +#define INT_24XX_HDQ_IRQ 58 #define INT_24XX_MCBSP1_IRQ_TX 59 #define INT_24XX_MCBSP1_IRQ_RX 60 #define INT_24XX_MCBSP2_IRQ_TX 62 #define INT_24XX_MCBSP2_IRQ_RX 63 +#define INT_24XX_SPI1_IRQ 65 +#define INT_24XX_SPI2_IRQ 66 #define INT_24XX_UART1_IRQ 72 #define INT_24XX_UART2_IRQ 73 #define INT_24XX_UART3_IRQ 74 @@ -278,7 +286,58 @@ #define INT_24XX_USB_IRQ_HGEN 78 #define INT_24XX_USB_IRQ_HSOF 79 #define INT_24XX_USB_IRQ_OTG 80 +#define INT_24XX_MCBSP5_IRQ_TX 81 +#define INT_24XX_MCBSP5_IRQ_RX 82 #define INT_24XX_MMC_IRQ 83 +#define INT_24XX_MMC2_IRQ 86 +#define INT_24XX_MCBSP3_IRQ_TX 89 +#define INT_24XX_MCBSP3_IRQ_RX 90 +#define INT_24XX_SPI3_IRQ 91 + +#define INT_243X_MCBSP2_IRQ 16 +#define INT_243X_MCBSP3_IRQ 17 +#define INT_243X_MCBSP4_IRQ 18 +#define INT_243X_MCBSP5_IRQ 19 +#define INT_243X_MCBSP1_IRQ 64 +#define INT_243X_HS_USB_MC 92 +#define INT_243X_HS_USB_DMA 93 +#define INT_243X_CARKIT_IRQ 94 + +#define INT_34XX_BENCH_MPU_EMUL 3 +#define INT_34XX_ST_MCBSP2_IRQ 4 +#define INT_34XX_ST_MCBSP3_IRQ 5 +#define INT_34XX_SSM_ABORT_IRQ 6 +#define INT_34XX_SYS_NIRQ 7 +#define INT_34XX_D2D_FW_IRQ 8 +#define INT_34XX_PRCM_MPU_IRQ 11 +#define INT_34XX_MCBSP1_IRQ 16 +#define INT_34XX_MCBSP2_IRQ 17 +#define INT_34XX_MCBSP3_IRQ 22 +#define INT_34XX_MCBSP4_IRQ 23 +#define INT_34XX_CAM_IRQ 24 +#define INT_34XX_MCBSP5_IRQ 27 +#define INT_34XX_GPIO_BANK1 29 +#define INT_34XX_GPIO_BANK2 30 +#define INT_34XX_GPIO_BANK3 31 +#define INT_34XX_GPIO_BANK4 32 +#define INT_34XX_GPIO_BANK5 33 +#define INT_34XX_GPIO_BANK6 34 +#define INT_34XX_USIM_IRQ 35 +#define INT_34XX_WDT3_IRQ 36 +#define INT_34XX_SPI4_IRQ 48 +#define INT_34XX_SHA1MD52_IRQ 49 +#define INT_34XX_FPKA_READY_IRQ 50 +#define INT_34XX_SHA1MD51_IRQ 51 +#define INT_34XX_RNG_IRQ 52 +#define INT_34XX_I2C3_IRQ 61 +#define INT_34XX_FPKA_ERROR_IRQ 64 +#define INT_34XX_PBIAS_IRQ 75 +#define INT_34XX_OHCI_IRQ 76 +#define INT_34XX_EHCI_IRQ 77 +#define INT_34XX_TLL_IRQ 78 +#define INT_34XX_PARTHASH_IRQ 79 +#define INT_34XX_MMC3_IRQ 94 +#define INT_34XX_GPT12_IRQ 95 #define INT_34XX_BENCH_MPU_EMUL 3 diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h index 8fdb95e26fcd..6a0d1a0a24a7 100644 --- a/arch/arm/plat-omap/include/mach/mcbsp.h +++ b/arch/arm/plat-omap/include/mach/mcbsp.h @@ -43,9 +43,15 @@ #define OMAP24XX_MCBSP1_BASE 0x48074000 #define OMAP24XX_MCBSP2_BASE 0x48076000 +#define OMAP2430_MCBSP3_BASE 0x4808c000 +#define OMAP2430_MCBSP4_BASE 0x4808e000 +#define OMAP2430_MCBSP5_BASE 0x48096000 #define OMAP34XX_MCBSP1_BASE 0x48074000 #define OMAP34XX_MCBSP2_BASE 0x49022000 +#define OMAP34XX_MCBSP3_BASE 0x49024000 +#define OMAP34XX_MCBSP4_BASE 0x49026000 +#define OMAP34XX_MCBSP5_BASE 0x48096000 #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730) @@ -81,9 +87,6 @@ #define OMAP_MCBSP_REG_XCERG 0x3A #define OMAP_MCBSP_REG_XCERH 0x3C -#define OMAP_MAX_MCBSP_COUNT 3 -#define MAX_MCBSP_CLOCKS 3 - #define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1) #define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1) @@ -91,12 +94,14 @@ #define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX #define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX -#elif defined(CONFIG_ARCH_OMAP24XX) +#elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) #define OMAP_MCBSP_REG_DRR2 0x00 #define OMAP_MCBSP_REG_DRR1 0x04 #define OMAP_MCBSP_REG_DXR2 0x08 #define OMAP_MCBSP_REG_DXR1 0x0C +#define OMAP_MCBSP_REG_DRR 0x00 +#define OMAP_MCBSP_REG_DXR 0x08 #define OMAP_MCBSP_REG_SPCR2 0x10 #define OMAP_MCBSP_REG_SPCR1 0x14 #define OMAP_MCBSP_REG_RCR2 0x18 @@ -124,9 +129,9 @@ #define OMAP_MCBSP_REG_RCERH 0x70 #define OMAP_MCBSP_REG_XCERG 0x74 #define OMAP_MCBSP_REG_XCERH 0x78 - -#define OMAP_MAX_MCBSP_COUNT 2 -#define MAX_MCBSP_CLOCKS 2 +#define OMAP_MCBSP_REG_SYSCON 0x8C +#define OMAP_MCBSP_REG_XCCR 0xAC +#define OMAP_MCBSP_REG_RCCR 0xB0 #define AUDIO_MCBSP_DATAWRITE (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1) #define AUDIO_MCBSP_DATAREAD (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1) @@ -137,10 +142,6 @@ #endif -#define OMAP_MCBSP_READ(base, reg) __raw_readw((base) + OMAP_MCBSP_REG_##reg) -#define OMAP_MCBSP_WRITE(base, reg, val) __raw_writew((val), (base) + OMAP_MCBSP_REG_##reg) - - /************************** McBSP SPCR1 bit definitions ***********************/ #define RRST 0x0001 #define RRDY 0x0002 @@ -151,6 +152,7 @@ #define DXENA 0x0080 #define CLKSTP(value) ((value)<<11) /* bits 11:12 */ #define RJUST(value) ((value)<<13) /* bits 13:14 */ +#define ALB 0x8000 #define DLB 0x8000 /************************** McBSP SPCR2 bit definitions ***********************/ @@ -228,6 +230,17 @@ #define XPABLK(value) ((value)<<5) /* Bits 5:6 */ #define XPBBLK(value) ((value)<<7) /* Bits 7:8 */ +/*********************** McBSP XCCR bit definitions *************************/ +#define DILB 0x0020 +#define XDMAEN 0x0008 +#define XDISABLE 0x0001 + +/********************** McBSP RCCR bit definitions *************************/ +#define RDMAEN 0x0008 +#define RDISABLE 0x0001 + +/********************** McBSP SYSCONFIG bit definitions ********************/ +#define SOFTRST 0x0002 /* we don't do multichannel for now */ struct omap_mcbsp_reg_cfg { @@ -260,6 +273,8 @@ typedef enum { OMAP_MCBSP1 = 0, OMAP_MCBSP2, OMAP_MCBSP3, + OMAP_MCBSP4, + OMAP_MCBSP5 } omap_mcbsp_id; typedef int __bitwise omap_mcbsp_io_type_t; @@ -311,12 +326,10 @@ struct omap_mcbsp_spi_cfg { struct omap_mcbsp_ops { void (*request)(unsigned int); void (*free)(unsigned int); - int (*check)(unsigned int); }; struct omap_mcbsp_platform_data { unsigned long phys_base; - u32 virt_base; u8 dma_rx_sync, dma_tx_sync; u16 rx_irq, tx_irq; struct omap_mcbsp_ops *ops; @@ -326,7 +339,7 @@ struct omap_mcbsp_platform_data { struct omap_mcbsp { struct device *dev; unsigned long phys_base; - u32 io_base; + void __iomem *io_base; u8 id; u8 free; omap_mcbsp_word_length rx_word_length; @@ -354,6 +367,8 @@ struct omap_mcbsp { struct omap_mcbsp_platform_data *pdata; struct clk *clk; }; +extern struct omap_mcbsp **mcbsp_ptr; +extern int omap_mcbsp_count; int omap_mcbsp_init(void); void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, @@ -378,5 +393,6 @@ void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg * /* Polled read/write functions */ int omap_mcbsp_pollread(unsigned int id, u16 * buf); int omap_mcbsp_pollwrite(unsigned int id, u16 buf); +int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type); #endif diff --git a/arch/arm/plat-omap/include/mach/memory.h b/arch/arm/plat-omap/include/mach/memory.h index a325caf80d04..d40cac60b959 100644 --- a/arch/arm/plat-omap/include/mach/memory.h +++ b/arch/arm/plat-omap/include/mach/memory.h @@ -38,7 +38,7 @@ */ #if defined(CONFIG_ARCH_OMAP1) #define PHYS_OFFSET UL(0x10000000) -#elif defined(CONFIG_ARCH_OMAP2) +#elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) #define PHYS_OFFSET UL(0x80000000) #endif diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h index 614b2c1327c7..6bbf1789bed5 100644 --- a/arch/arm/plat-omap/include/mach/mux.h +++ b/arch/arm/plat-omap/include/mach/mux.h @@ -125,20 +125,64 @@ .pu_pd_val = pull_mode, \ }, - -#define PULL_DISABLED 0 -#define PULL_ENABLED 1 - -#define PULL_DOWN 0 -#define PULL_UP 1 +/* 24xx/34xx mux bit defines */ +#define OMAP2_PULL_ENA (1 << 3) +#define OMAP2_PULL_UP (1 << 4) +#define OMAP2_ALTELECTRICALSEL (1 << 5) + +/* 34xx specific mux bit defines */ +#define OMAP3_INPUT_EN (1 << 8) +#define OMAP3_OFF_EN (1 << 9) +#define OMAP3_OFFOUT_EN (1 << 10) +#define OMAP3_OFFOUT_VAL (1 << 11) +#define OMAP3_OFF_PULL_EN (1 << 12) +#define OMAP3_OFF_PULL_UP (1 << 13) +#define OMAP3_WAKEUP_EN (1 << 14) + +/* 34xx mux mode options for each pin. See TRM for options */ +#define OMAP34XX_MUX_MODE0 0 +#define OMAP34XX_MUX_MODE1 1 +#define OMAP34XX_MUX_MODE2 2 +#define OMAP34XX_MUX_MODE3 3 +#define OMAP34XX_MUX_MODE4 4 +#define OMAP34XX_MUX_MODE5 5 +#define OMAP34XX_MUX_MODE6 6 +#define OMAP34XX_MUX_MODE7 7 + +/* 34xx active pin states */ +#define OMAP34XX_PIN_OUTPUT 0 +#define OMAP34XX_PIN_INPUT OMAP3_INPUT_EN +#define OMAP34XX_PIN_INPUT_PULLUP (OMAP2_PULL_ENA | OMAP3_INPUT_EN \ + | OMAP2_PULL_UP) +#define OMAP34XX_PIN_INPUT_PULLDOWN (OMAP2_PULL_ENA | OMAP3_INPUT_EN) + +/* 34xx off mode states */ +#define OMAP34XX_PIN_OFF_NONE 0 +#define OMAP34XX_PIN_OFF_OUTPUT_HIGH (OMAP3_OFF_EN | OMAP3_OFFOUT_EN \ + | OMAP3_OFFOUT_VAL) +#define OMAP34XX_PIN_OFF_OUTPUT_LOW (OMAP3_OFF_EN | OMAP3_OFFOUT_EN) +#define OMAP34XX_PIN_OFF_INPUT_PULLUP (OMAP3_OFF_EN | OMAP3_OFF_PULL_EN \ + | OMAP3_OFF_PULL_UP) +#define OMAP34XX_PIN_OFF_INPUT_PULLDOWN (OMAP3_OFF_EN | OMAP3_OFF_PULL_EN) +#define OMAP34XX_PIN_OFF_WAKEUPENABLE OMAP3_WAKEUP_EN + +#define MUX_CFG_34XX(desc, reg_offset, mux_value) { \ + .name = desc, \ + .debug = 0, \ + .mux_reg = reg_offset, \ + .mux_val = mux_value \ +}, struct pin_config { - char *name; - unsigned char busy; - unsigned char debug; + char *name; + const unsigned int mux_reg; + unsigned char debug; - const char *mux_reg_name; - const unsigned int mux_reg; +#if defined(CONFIG_ARCH_OMAP34XX) + u16 mux_val; /* Wake-up, off mode, pull, mux mode */ +#endif + +#if defined(CONFIG_ARCH_OMAP1) || defined(CONFIG_ARCH_OMAP24XX) const unsigned char mask_offset; const unsigned char mask; @@ -150,6 +194,12 @@ struct pin_config { const char *pu_pd_name; const unsigned int pu_pd_reg; const unsigned char pu_pd_val; +#endif + +#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS) + const char *mux_reg_name; +#endif + }; enum omap730_index { @@ -593,6 +643,114 @@ enum omap24xx_index { }; +enum omap34xx_index { + /* 34xx I2C */ + K21_34XX_I2C1_SCL, + J21_34XX_I2C1_SDA, + AF15_34XX_I2C2_SCL, + AE15_34XX_I2C2_SDA, + AF14_34XX_I2C3_SCL, + AG14_34XX_I2C3_SDA, + AD26_34XX_I2C4_SCL, + AE26_34XX_I2C4_SDA, + + /* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/ + Y8_3430_USB1HS_PHY_CLK, + Y9_3430_USB1HS_PHY_STP, + AA14_3430_USB1HS_PHY_DIR, + AA11_3430_USB1HS_PHY_NXT, + W13_3430_USB1HS_PHY_DATA0, + W12_3430_USB1HS_PHY_DATA1, + W11_3430_USB1HS_PHY_DATA2, + Y11_3430_USB1HS_PHY_DATA3, + W9_3430_USB1HS_PHY_DATA4, + Y12_3430_USB1HS_PHY_DATA5, + W8_3430_USB1HS_PHY_DATA6, + Y13_3430_USB1HS_PHY_DATA7, + + /* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/ + AA8_3430_USB2HS_PHY_CLK, + AA10_3430_USB2HS_PHY_STP, + AA9_3430_USB2HS_PHY_DIR, + AB11_3430_USB2HS_PHY_NXT, + AB10_3430_USB2HS_PHY_DATA0, + AB9_3430_USB2HS_PHY_DATA1, + W3_3430_USB2HS_PHY_DATA2, + T4_3430_USB2HS_PHY_DATA3, + T3_3430_USB2HS_PHY_DATA4, + R3_3430_USB2HS_PHY_DATA5, + R4_3430_USB2HS_PHY_DATA6, + T2_3430_USB2HS_PHY_DATA7, + + + /* TLL - HSUSB: 12-pin TLL Port 1*/ + Y8_3430_USB1HS_TLL_CLK, + Y9_3430_USB1HS_TLL_STP, + AA14_3430_USB1HS_TLL_DIR, + AA11_3430_USB1HS_TLL_NXT, + W13_3430_USB1HS_TLL_DATA0, + W12_3430_USB1HS_TLL_DATA1, + W11_3430_USB1HS_TLL_DATA2, + Y11_3430_USB1HS_TLL_DATA3, + W9_3430_USB1HS_TLL_DATA4, + Y12_3430_USB1HS_TLL_DATA5, + W8_3430_USB1HS_TLL_DATA6, + Y13_3430_USB1HS_TLL_DATA7, + + /* TLL - HSUSB: 12-pin TLL Port 2*/ + AA8_3430_USB2HS_TLL_CLK, + AA10_3430_USB2HS_TLL_STP, + AA9_3430_USB2HS_TLL_DIR, + AB11_3430_USB2HS_TLL_NXT, + AB10_3430_USB2HS_TLL_DATA0, + AB9_3430_USB2HS_TLL_DATA1, + W3_3430_USB2HS_TLL_DATA2, + T4_3430_USB2HS_TLL_DATA3, + T3_3430_USB2HS_TLL_DATA4, + R3_3430_USB2HS_TLL_DATA5, + R4_3430_USB2HS_TLL_DATA6, + T2_3430_USB2HS_TLL_DATA7, + + /* TLL - HSUSB: 12-pin TLL Port 3*/ + AA6_3430_USB3HS_TLL_CLK, + AB3_3430_USB3HS_TLL_STP, + AA3_3430_USB3HS_TLL_DIR, + Y3_3430_USB3HS_TLL_NXT, + AA5_3430_USB3HS_TLL_DATA0, + Y4_3430_USB3HS_TLL_DATA1, + Y5_3430_USB3HS_TLL_DATA2, + W5_3430_USB3HS_TLL_DATA3, + AB12_3430_USB3HS_TLL_DATA4, + AB13_3430_USB3HS_TLL_DATA5, + AA13_3430_USB3HS_TLL_DATA6, + AA12_3430_USB3HS_TLL_DATA7, + + /* PHY FSUSB: FS Serial for Port 1 (multiple PHY modes supported) */ + AF10_3430_USB1FS_PHY_MM1_RXDP, + AG9_3430_USB1FS_PHY_MM1_RXDM, + W13_3430_USB1FS_PHY_MM1_RXRCV, + W12_3430_USB1FS_PHY_MM1_TXSE0, + W11_3430_USB1FS_PHY_MM1_TXDAT, + Y11_3430_USB1FS_PHY_MM1_TXEN_N, + + /* PHY FSUSB: FS Serial for Port 2 (multiple PHY modes supported) */ + AF7_3430_USB2FS_PHY_MM2_RXDP, + AH7_3430_USB2FS_PHY_MM2_RXDM, + AB10_3430_USB2FS_PHY_MM2_RXRCV, + AB9_3430_USB2FS_PHY_MM2_TXSE0, + W3_3430_USB2FS_PHY_MM2_TXDAT, + T4_3430_USB2FS_PHY_MM2_TXEN_N, + + /* PHY FSUSB: FS Serial for Port 3 (multiple PHY modes supported) */ + AH3_3430_USB3FS_PHY_MM3_RXDP, + AE3_3430_USB3FS_PHY_MM3_RXDM, + AD1_3430_USB3FS_PHY_MM3_RXRCV, + AE1_3430_USB3FS_PHY_MM3_TXSE0, + AD2_3430_USB3FS_PHY_MM3_TXDAT, + AC1_3430_USB3FS_PHY_MM3_TXEN_N, + +}; + struct omap_mux_cfg { struct pin_config *pins; unsigned long size; diff --git a/arch/arm/plat-omap/include/mach/omap1510.h b/arch/arm/plat-omap/include/mach/omap1510.h index 505a38af8b22..d24004668138 100644 --- a/arch/arm/plat-omap/include/mach/omap1510.h +++ b/arch/arm/plat-omap/include/mach/omap1510.h @@ -44,5 +44,7 @@ #define OMAP1510_DSPREG_SIZE SZ_128K #define OMAP1510_DSPREG_START 0xE1000000 +#define OMAP1510_DSP_MMU_BASE (0xfffed200) + #endif /* __ASM_ARCH_OMAP15XX_H */ diff --git a/arch/arm/plat-omap/include/mach/omap16xx.h b/arch/arm/plat-omap/include/mach/omap16xx.h index c6c93afb2788..0e69b504c25f 100644 --- a/arch/arm/plat-omap/include/mach/omap16xx.h +++ b/arch/arm/plat-omap/include/mach/omap16xx.h @@ -44,6 +44,11 @@ #define OMAP16XX_DSPREG_SIZE SZ_128K #define OMAP16XX_DSPREG_START 0xE1000000 +#define OMAP16XX_SEC_BASE 0xFFFE4000 +#define OMAP16XX_SEC_DES (OMAP16XX_SEC_BASE + 0x0000) +#define OMAP16XX_SEC_SHA1MD5 (OMAP16XX_SEC_BASE + 0x0800) +#define OMAP16XX_SEC_RNG (OMAP16XX_SEC_BASE + 0x1000) + /* * --------------------------------------------------------------------------- * Interrupts @@ -190,7 +195,7 @@ #define WSPR_DISABLE_0 (0x0000aaaa) #define WSPR_DISABLE_1 (0x00005555) -/* Mailbox */ +#define OMAP16XX_DSP_MMU_BASE (0xfffed200) #define OMAP16XX_MAILBOX_BASE (0xfffcf000) #endif /* __ASM_ARCH_OMAP16XX_H */ diff --git a/arch/arm/plat-omap/include/mach/omap24xx.h b/arch/arm/plat-omap/include/mach/omap24xx.h index bb8319d66e9f..24335d4932f5 100644 --- a/arch/arm/plat-omap/include/mach/omap24xx.h +++ b/arch/arm/plat-omap/include/mach/omap24xx.h @@ -39,7 +39,6 @@ /* interrupt controller */ #define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000) #define OMAP24XX_IVA_INTC_BASE 0x40000000 -#define IRQ_SIR_IRQ 0x0040 #define OMAP2420_CTRL_BASE L4_24XX_BASE #define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000) @@ -48,6 +47,7 @@ #define OMAP2420_PRM_BASE OMAP2420_CM_BASE #define OMAP2420_SDRC_BASE (L3_24XX_BASE + 0x9000) #define OMAP2420_SMS_BASE 0x68008000 +#define OMAP2420_GPMC_BASE 0x6800a000 #define OMAP2430_32KSYNCT_BASE (L4_WK_243X_BASE + 0x20000) #define OMAP2430_PRCM_BASE (L4_WK_243X_BASE + 0x6000) diff --git a/arch/arm/plat-omap/include/mach/omapfb.h b/arch/arm/plat-omap/include/mach/omapfb.h index cae037d13079..ec67fb428607 100644 --- a/arch/arm/plat-omap/include/mach/omapfb.h +++ b/arch/arm/plat-omap/include/mach/omapfb.h @@ -62,6 +62,7 @@ #define OMAPFB_CAPS_WINDOW_PIXEL_DOUBLE 0x00010000 #define OMAPFB_CAPS_WINDOW_SCALE 0x00020000 #define OMAPFB_CAPS_WINDOW_OVERLAY 0x00040000 +#define OMAPFB_CAPS_WINDOW_ROTATE 0x00080000 #define OMAPFB_CAPS_SET_BACKLIGHT 0x01000000 /* Values from DSP must map to lower 16-bits */ @@ -305,6 +306,7 @@ struct lcd_ctrl { int screen_width, int pos_x, int pos_y, int width, int height, int color_mode); + int (*set_rotate) (int angle); int (*setup_mem) (int plane, size_t size, int mem_type, unsigned long *paddr); int (*mmap) (struct fb_info *info, @@ -374,6 +376,7 @@ extern struct lcd_ctrl omap1_lcd_ctrl; extern struct lcd_ctrl omap2_disp_ctrl; #endif +extern void omapfb_reserve_sdram(void); extern void omapfb_register_panel(struct lcd_panel *panel); extern void omapfb_write_first_pixel(struct omapfb_device *fbdev, u16 pixval); extern void omapfb_notify_clients(struct omapfb_device *fbdev, diff --git a/arch/arm/plat-omap/include/mach/pm.h b/arch/arm/plat-omap/include/mach/pm.h index bfa09325a5ff..768eb6e7abcf 100644 --- a/arch/arm/plat-omap/include/mach/pm.h +++ b/arch/arm/plat-omap/include/mach/pm.h @@ -39,11 +39,11 @@ * Register and offset definitions to be used in PM assembler code * ---------------------------------------------------------------------------- */ -#define CLKGEN_REG_ASM_BASE io_p2v(0xfffece00) +#define CLKGEN_REG_ASM_BASE IO_ADDRESS(0xfffece00) #define ARM_IDLECT1_ASM_OFFSET 0x04 #define ARM_IDLECT2_ASM_OFFSET 0x08 -#define TCMIF_ASM_BASE io_p2v(0xfffecc00) +#define TCMIF_ASM_BASE IO_ADDRESS(0xfffecc00) #define EMIFS_CONFIG_ASM_OFFSET 0x0c #define EMIFF_SDRAM_CONFIG_ASM_OFFSET 0x20 @@ -135,7 +135,8 @@ extern void omap_pm_suspend(void); extern void omap730_cpu_suspend(unsigned short, unsigned short); extern void omap1510_cpu_suspend(unsigned short, unsigned short); extern void omap1610_cpu_suspend(unsigned short, unsigned short); -extern void omap24xx_cpu_suspend(u32 dll_ctrl, u32 cpu_revision); +extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl, + void __iomem *sdrc_power); extern void omap730_idle_loop_suspend(void); extern void omap1510_idle_loop_suspend(void); extern void omap1610_idle_loop_suspend(void); diff --git a/arch/arm/plat-omap/include/mach/powerdomain.h b/arch/arm/plat-omap/include/mach/powerdomain.h new file mode 100644 index 000000000000..2806a9c8e4d7 --- /dev/null +++ b/arch/arm/plat-omap/include/mach/powerdomain.h @@ -0,0 +1,166 @@ +/* + * OMAP2/3 powerdomain control + * + * Copyright (C) 2007-8 Texas Instruments, Inc. + * Copyright (C) 2007-8 Nokia Corporation + * + * Written by Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef ASM_ARM_ARCH_OMAP_POWERDOMAIN +#define ASM_ARM_ARCH_OMAP_POWERDOMAIN + +#include <linux/types.h> +#include <linux/list.h> + +#include <asm/atomic.h> + +#include <mach/cpu.h> + + +/* Powerdomain basic power states */ +#define PWRDM_POWER_OFF 0x0 +#define PWRDM_POWER_RET 0x1 +#define PWRDM_POWER_INACTIVE 0x2 +#define PWRDM_POWER_ON 0x3 + +/* Powerdomain allowable state bitfields */ +#define PWRSTS_OFF_ON ((1 << PWRDM_POWER_OFF) | \ + (1 << PWRDM_POWER_ON)) + +#define PWRSTS_OFF_RET ((1 << PWRDM_POWER_OFF) | \ + (1 << PWRDM_POWER_RET)) + +#define PWRSTS_OFF_RET_ON (PWRSTS_OFF_RET | (1 << PWRDM_POWER_ON)) + + +/* Powerdomain flags */ +#define PWRDM_HAS_HDWR_SAR (1 << 0) /* hardware save-and-restore support */ + + +/* + * Number of memory banks that are power-controllable. On OMAP3430, the + * maximum is 4. + */ +#define PWRDM_MAX_MEM_BANKS 4 + +/* + * Maximum number of clockdomains that can be associated with a powerdomain. + * CORE powerdomain is probably the worst case. + */ +#define PWRDM_MAX_CLKDMS 3 + +/* XXX A completely arbitrary number. What is reasonable here? */ +#define PWRDM_TRANSITION_BAILOUT 100000 + +struct clockdomain; +struct powerdomain; + +/* Encodes dependencies between powerdomains - statically defined */ +struct pwrdm_dep { + + /* Powerdomain name */ + const char *pwrdm_name; + + /* Powerdomain pointer - resolved by the powerdomain code */ + struct powerdomain *pwrdm; + + /* Flags to mark OMAP chip restrictions, etc. */ + const struct omap_chip_id omap_chip; + +}; + +struct powerdomain { + + /* Powerdomain name */ + const char *name; + + /* the address offset from CM_BASE/PRM_BASE */ + const s16 prcm_offs; + + /* Used to represent the OMAP chip types containing this pwrdm */ + const struct omap_chip_id omap_chip; + + /* Bit shift of this powerdomain's PM_WKDEP/CM_SLEEPDEP bit */ + const u8 dep_bit; + + /* Powerdomains that can be told to wake this powerdomain up */ + struct pwrdm_dep *wkdep_srcs; + + /* Powerdomains that can be told to keep this pwrdm from inactivity */ + struct pwrdm_dep *sleepdep_srcs; + + /* Possible powerdomain power states */ + const u8 pwrsts; + + /* Possible logic power states when pwrdm in RETENTION */ + const u8 pwrsts_logic_ret; + + /* Powerdomain flags */ + const u8 flags; + + /* Number of software-controllable memory banks in this powerdomain */ + const u8 banks; + + /* Possible memory bank pwrstates when pwrdm in RETENTION */ + const u8 pwrsts_mem_ret[PWRDM_MAX_MEM_BANKS]; + + /* Possible memory bank pwrstates when pwrdm is ON */ + const u8 pwrsts_mem_on[PWRDM_MAX_MEM_BANKS]; + + /* Clockdomains in this powerdomain */ + struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS]; + + struct list_head node; + +}; + + +void pwrdm_init(struct powerdomain **pwrdm_list); + +int pwrdm_register(struct powerdomain *pwrdm); +int pwrdm_unregister(struct powerdomain *pwrdm); +struct powerdomain *pwrdm_lookup(const char *name); + +int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm)); + +int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); +int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); +int pwrdm_for_each_clkdm(struct powerdomain *pwrdm, + int (*fn)(struct powerdomain *pwrdm, + struct clockdomain *clkdm)); + +int pwrdm_add_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); +int pwrdm_del_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); +int pwrdm_read_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); +int pwrdm_add_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); +int pwrdm_del_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); +int pwrdm_read_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); + +int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm); + +int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst); +int pwrdm_read_next_pwrst(struct powerdomain *pwrdm); +int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm); +int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm); + +int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst); +int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst); +int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst); + +int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm); +int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm); +int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank); +int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank); + +int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm); +int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm); +bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm); + +int pwrdm_wait_transition(struct powerdomain *pwrdm); + +#endif diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h index 787b7acec546..a98c6c3beb2c 100644 --- a/arch/arm/plat-omap/include/mach/sdrc.h +++ b/arch/arm/plat-omap/include/mach/sdrc.h @@ -25,6 +25,8 @@ #define SDRC_DLLB_STATUS 0x06C #define SDRC_POWER 0x070 #define SDRC_MR_0 0x084 +#define SDRC_ACTIM_CTRL_A_0 0x09c +#define SDRC_ACTIM_CTRL_B_0 0x0a0 #define SDRC_RFR_CTRL_0 0x0a4 /* @@ -63,9 +65,9 @@ */ -#define OMAP242X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP2420_SMS_BASE + reg) -#define OMAP243X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP243X_SMS_BASE + reg) -#define OMAP343X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP343X_SMS_BASE + reg) +#define OMAP242X_SMS_REGADDR(reg) IO_ADDRESS(OMAP2420_SMS_BASE + reg) +#define OMAP243X_SMS_REGADDR(reg) IO_ADDRESS(OMAP243X_SMS_BASE + reg) +#define OMAP343X_SMS_REGADDR(reg) IO_ADDRESS(OMAP343X_SMS_BASE + reg) /* SMS register offsets - read/write with sms_{read,write}_reg() */ diff --git a/arch/arm/plat-omap/include/mach/serial.h b/arch/arm/plat-omap/include/mach/serial.h index cc6bfa51ccb5..8a676a04be48 100644 --- a/arch/arm/plat-omap/include/mach/serial.h +++ b/arch/arm/plat-omap/include/mach/serial.h @@ -20,18 +20,24 @@ #define OMAP_UART1_BASE 0x4806a000 #define OMAP_UART2_BASE 0x4806c000 #define OMAP_UART3_BASE 0x4806e000 +#elif defined(CONFIG_ARCH_OMAP3) +/* OMAP3 serial ports */ +#define OMAP_UART1_BASE 0x4806a000 +#define OMAP_UART2_BASE 0x4806c000 +#define OMAP_UART3_BASE 0x49020000 #endif #define OMAP_MAX_NR_PORTS 3 #define OMAP1510_BASE_BAUD (12000000/16) #define OMAP16XX_BASE_BAUD (48000000/16) +#define OMAP24XX_BASE_BAUD (48000000/16) -#define is_omap_port(p) ({int __ret = 0; \ - if (p == IO_ADDRESS(OMAP_UART1_BASE) || \ - p == IO_ADDRESS(OMAP_UART2_BASE) || \ - p == IO_ADDRESS(OMAP_UART3_BASE)) \ - __ret = 1; \ - __ret; \ +#define is_omap_port(pt) ({int __ret = 0; \ + if ((pt)->port.mapbase == OMAP_UART1_BASE || \ + (pt)->port.mapbase == OMAP_UART2_BASE || \ + (pt)->port.mapbase == OMAP_UART3_BASE) \ + __ret = 1; \ + __ret; \ }) #endif diff --git a/arch/arm/plat-omap/include/mach/sram.h b/arch/arm/plat-omap/include/mach/sram.h index e09323449981..ab35d622dcf5 100644 --- a/arch/arm/plat-omap/include/mach/sram.h +++ b/arch/arm/plat-omap/include/mach/sram.h @@ -21,6 +21,10 @@ extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type); extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); +extern u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl, + u32 sdrc_actim_ctrla, + u32 sdrc_actim_ctrlb, u32 m2); + /* Do not use these */ extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); extern unsigned long omap1_sram_reprogram_clock_sz; @@ -53,4 +57,10 @@ extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type); extern unsigned long omap243x_sram_reprogram_sdrc_sz; + +extern u32 omap3_sram_configure_core_dpll(u32 sdrc_rfr_ctrl, + u32 sdrc_actim_ctrla, + u32 sdrc_actim_ctrlb, u32 m2); +extern unsigned long omap3_sram_configure_core_dpll_sz; + #endif diff --git a/arch/arm/plat-omap/include/mach/system.h b/arch/arm/plat-omap/include/mach/system.h index 06a28c7b98de..06923f261545 100644 --- a/arch/arm/plat-omap/include/mach/system.h +++ b/arch/arm/plat-omap/include/mach/system.h @@ -40,7 +40,7 @@ static inline void omap1_arch_reset(char mode) static inline void arch_reset(char mode) { - if (!cpu_is_omap24xx()) + if (!cpu_class_is_omap2()) omap1_arch_reset(mode); else omap_prcm_arch_reset(mode); diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c new file mode 100644 index 000000000000..af326efc1ad3 --- /dev/null +++ b/arch/arm/plat-omap/io.c @@ -0,0 +1,107 @@ +#include <linux/module.h> +#include <linux/io.h> +#include <linux/mm.h> + +#include <mach/omap730.h> +#include <mach/omap1510.h> +#include <mach/omap16xx.h> +#include <mach/omap24xx.h> +#include <mach/omap34xx.h> + +#define BETWEEN(p,st,sz) ((p) >= (st) && (p) < ((st) + (sz))) +#define XLATE(p,pst,vst) ((void __iomem *)((p) - (pst) + (vst))) + +/* + * Intercept ioremap() requests for addresses in our fixed mapping regions. + */ +void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type) +{ +#ifdef CONFIG_ARCH_OMAP1 + if (cpu_class_is_omap1()) { + if (BETWEEN(p, IO_PHYS, IO_SIZE)) + return XLATE(p, IO_PHYS, IO_VIRT); + } + if (cpu_is_omap730()) { + if (BETWEEN(p, OMAP730_DSP_BASE, OMAP730_DSP_SIZE)) + return XLATE(p, OMAP730_DSP_BASE, OMAP730_DSP_START); + + if (BETWEEN(p, OMAP730_DSPREG_BASE, OMAP730_DSPREG_SIZE)) + return XLATE(p, OMAP730_DSPREG_BASE, + OMAP730_DSPREG_START); + } + if (cpu_is_omap15xx()) { + if (BETWEEN(p, OMAP1510_DSP_BASE, OMAP1510_DSP_SIZE)) + return XLATE(p, OMAP1510_DSP_BASE, OMAP1510_DSP_START); + + if (BETWEEN(p, OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_SIZE)) + return XLATE(p, OMAP1510_DSPREG_BASE, + OMAP1510_DSPREG_START); + } + if (cpu_is_omap16xx()) { + if (BETWEEN(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_SIZE)) + return XLATE(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_START); + + if (BETWEEN(p, OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_SIZE)) + return XLATE(p, OMAP16XX_DSPREG_BASE, + OMAP16XX_DSPREG_START); + } +#endif +#ifdef CONFIG_ARCH_OMAP2 + if (cpu_is_omap24xx()) { + if (BETWEEN(p, L3_24XX_PHYS, L3_24XX_SIZE)) + return XLATE(p, L3_24XX_PHYS, L3_24XX_VIRT); + if (BETWEEN(p, L4_24XX_PHYS, L4_24XX_SIZE)) + return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT); + } + if (cpu_is_omap2420()) { + if (BETWEEN(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_SIZE)) + return XLATE(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_VIRT); + if (BETWEEN(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE)) + return XLATE(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE); + if (BETWEEN(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_SIZE)) + return XLATE(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_VIRT); + } + if (cpu_is_omap2430()) { + if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE)) + return XLATE(p, L4_WK_243X_PHYS, L4_WK_243X_VIRT); + if (BETWEEN(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_SIZE)) + return XLATE(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_VIRT); + if (BETWEEN(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_SIZE)) + return XLATE(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_VIRT); + if (BETWEEN(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_SIZE)) + return XLATE(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_VIRT); + } +#endif +#ifdef CONFIG_ARCH_OMAP3 + if (cpu_is_omap34xx()) { + if (BETWEEN(p, L3_34XX_PHYS, L3_34XX_SIZE)) + return XLATE(p, L3_34XX_PHYS, L3_34XX_VIRT); + if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE)) + return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT); + if (BETWEEN(p, L4_WK_34XX_PHYS, L4_WK_34XX_SIZE)) + return XLATE(p, L4_WK_34XX_PHYS, L4_WK_34XX_VIRT); + if (BETWEEN(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_SIZE)) + return XLATE(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_VIRT); + if (BETWEEN(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_SIZE)) + return XLATE(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_VIRT); + if (BETWEEN(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_SIZE)) + return XLATE(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_VIRT); + if (BETWEEN(p, L4_PER_34XX_PHYS, L4_PER_34XX_SIZE)) + return XLATE(p, L4_PER_34XX_PHYS, L4_PER_34XX_VIRT); + if (BETWEEN(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_SIZE)) + return XLATE(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_VIRT); + } +#endif + + return __arm_ioremap(p, size, type); +} +EXPORT_SYMBOL(omap_ioremap); + +void omap_iounmap(volatile void __iomem *addr) +{ + unsigned long virt = (unsigned long)addr; + + if (virt >= VMALLOC_START && virt < VMALLOC_END) + __iounmap(addr); +} +EXPORT_SYMBOL(omap_iounmap); diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 014d26574bb6..af33fc713e1a 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c @@ -27,43 +27,65 @@ #include <mach/dma.h> #include <mach/mcbsp.h> -static struct omap_mcbsp mcbsp[OMAP_MAX_MCBSP_COUNT]; +struct omap_mcbsp **mcbsp_ptr; +int omap_mcbsp_count; -#define omap_mcbsp_check_valid_id(id) (mcbsp[id].pdata && \ - mcbsp[id].pdata->ops && \ - mcbsp[id].pdata->ops->check && \ - (mcbsp[id].pdata->ops->check(id) == 0)) +void omap_mcbsp_write(void __iomem *io_base, u16 reg, u32 val) +{ + if (cpu_class_is_omap1() || cpu_is_omap2420()) + __raw_writew((u16)val, io_base + reg); + else + __raw_writel(val, io_base + reg); +} + +int omap_mcbsp_read(void __iomem *io_base, u16 reg) +{ + if (cpu_class_is_omap1() || cpu_is_omap2420()) + return __raw_readw(io_base + reg); + else + return __raw_readl(io_base + reg); +} + +#define OMAP_MCBSP_READ(base, reg) \ + omap_mcbsp_read(base, OMAP_MCBSP_REG_##reg) +#define OMAP_MCBSP_WRITE(base, reg, val) \ + omap_mcbsp_write(base, OMAP_MCBSP_REG_##reg, val) + +#define omap_mcbsp_check_valid_id(id) (id < omap_mcbsp_count) +#define id_to_mcbsp_ptr(id) mcbsp_ptr[id]; static void omap_mcbsp_dump_reg(u8 id) { - dev_dbg(mcbsp[id].dev, "**** McBSP%d regs ****\n", mcbsp[id].id); - dev_dbg(mcbsp[id].dev, "DRR2: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, DRR2)); - dev_dbg(mcbsp[id].dev, "DRR1: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, DRR1)); - dev_dbg(mcbsp[id].dev, "DXR2: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, DXR2)); - dev_dbg(mcbsp[id].dev, "DXR1: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, DXR1)); - dev_dbg(mcbsp[id].dev, "SPCR2: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, SPCR2)); - dev_dbg(mcbsp[id].dev, "SPCR1: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, SPCR1)); - dev_dbg(mcbsp[id].dev, "RCR2: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, RCR2)); - dev_dbg(mcbsp[id].dev, "RCR1: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, RCR1)); - dev_dbg(mcbsp[id].dev, "XCR2: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, XCR2)); - dev_dbg(mcbsp[id].dev, "XCR1: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, XCR1)); - dev_dbg(mcbsp[id].dev, "SRGR2: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, SRGR2)); - dev_dbg(mcbsp[id].dev, "SRGR1: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, SRGR1)); - dev_dbg(mcbsp[id].dev, "PCR0: 0x%04x\n", - OMAP_MCBSP_READ(mcbsp[id].io_base, PCR0)); - dev_dbg(mcbsp[id].dev, "***********************\n"); + struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id); + + dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id); + dev_dbg(mcbsp->dev, "DRR2: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, DRR2)); + dev_dbg(mcbsp->dev, "DRR1: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, DRR1)); + dev_dbg(mcbsp->dev, "DXR2: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, DXR2)); + dev_dbg(mcbsp->dev, "DXR1: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, DXR1)); + dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, SPCR2)); + dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, SPCR1)); + dev_dbg(mcbsp->dev, "RCR2: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, RCR2)); + dev_dbg(mcbsp->dev, "RCR1: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, RCR1)); + dev_dbg(mcbsp->dev, "XCR2: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, XCR2)); + dev_dbg(mcbsp->dev, "XCR1: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, XCR1)); + dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, SRGR2)); + dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, SRGR1)); + dev_dbg(mcbsp->dev, "PCR0: 0x%04x\n", + OMAP_MCBSP_READ(mcbsp->io_base, PCR0)); + dev_dbg(mcbsp->dev, "***********************\n"); } static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id) @@ -126,16 +148,18 @@ static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data) */ void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config) { - u32 io_base; + struct omap_mcbsp *mcbsp; + void __iomem *io_base; if (!omap_mcbsp_check_valid_id(id)) { printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return; } + mcbsp = id_to_mcbsp_ptr(id); - io_base = mcbsp[id].io_base; - dev_dbg(mcbsp[id].dev, "Configuring McBSP%d io_base: 0x%8x\n", - mcbsp[id].id, io_base); + io_base = mcbsp->io_base; + dev_dbg(mcbsp->dev, "Configuring McBSP%d phys_base: 0x%08lx\n", + mcbsp->id, mcbsp->phys_base); /* We write the given config */ OMAP_MCBSP_WRITE(io_base, SPCR2, config->spcr2); @@ -158,23 +182,26 @@ EXPORT_SYMBOL(omap_mcbsp_config); */ int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type) { + struct omap_mcbsp *mcbsp; + if (!omap_mcbsp_check_valid_id(id)) { printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return -ENODEV; } + mcbsp = id_to_mcbsp_ptr(id); - spin_lock(&mcbsp[id].lock); + spin_lock(&mcbsp->lock); - if (!mcbsp[id].free) { - dev_err(mcbsp[id].dev, "McBSP%d is currently in use\n", - mcbsp[id].id); - spin_unlock(&mcbsp[id].lock); + if (!mcbsp->free) { + dev_err(mcbsp->dev, "McBSP%d is currently in use\n", + mcbsp->id); + spin_unlock(&mcbsp->lock); return -EINVAL; } - mcbsp[id].io_type = io_type; + mcbsp->io_type = io_type; - spin_unlock(&mcbsp[id].lock); + spin_unlock(&mcbsp->lock); return 0; } @@ -182,53 +209,60 @@ EXPORT_SYMBOL(omap_mcbsp_set_io_type); int omap_mcbsp_request(unsigned int id) { + struct omap_mcbsp *mcbsp; int err; if (!omap_mcbsp_check_valid_id(id)) { printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return -ENODEV; } + mcbsp = id_to_mcbsp_ptr(id); - if (mcbsp[id].pdata->ops->request) - mcbsp[id].pdata->ops->request(id); + if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request) + mcbsp->pdata->ops->request(id); - clk_enable(mcbsp[id].clk); + clk_enable(mcbsp->clk); - spin_lock(&mcbsp[id].lock); - if (!mcbsp[id].free) { - dev_err(mcbsp[id].dev, "McBSP%d is currently in use\n", - mcbsp[id].id); - spin_unlock(&mcbsp[id].lock); + spin_lock(&mcbsp->lock); + if (!mcbsp->free) { + dev_err(mcbsp->dev, "McBSP%d is currently in use\n", + mcbsp->id); + spin_unlock(&mcbsp->lock); return -1; } - mcbsp[id].free = 0; - spin_unlock(&mcbsp[id].lock); + mcbsp->free = 0; + spin_unlock(&mcbsp->lock); + + /* + * Make sure that transmitter, receiver and sample-rate generator are + * not running before activating IRQs. + */ + OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR1, 0); + OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR2, 0); - if (mcbsp[id].io_type == OMAP_MCBSP_IRQ_IO) { + if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) { /* We need to get IRQs here */ - err = request_irq(mcbsp[id].tx_irq, omap_mcbsp_tx_irq_handler, - 0, "McBSP", (void *) (&mcbsp[id])); + init_completion(&mcbsp->tx_irq_completion); + err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler, + 0, "McBSP", (void *)mcbsp); if (err != 0) { - dev_err(mcbsp[id].dev, "Unable to request TX IRQ %d " - "for McBSP%d\n", mcbsp[id].tx_irq, - mcbsp[id].id); + dev_err(mcbsp->dev, "Unable to request TX IRQ %d " + "for McBSP%d\n", mcbsp->tx_irq, + mcbsp->id); return err; } - init_completion(&(mcbsp[id].tx_irq_completion)); - - err = request_irq(mcbsp[id].rx_irq, omap_mcbsp_rx_irq_handler, - 0, "McBSP", (void *) (&mcbsp[id])); + init_completion(&mcbsp->rx_irq_completion); + err = request_irq(mcbsp->rx_irq, omap_mcbsp_rx_irq_handler, + 0, "McBSP", (void *)mcbsp); if (err != 0) { - dev_err(mcbsp[id].dev, "Unable to request RX IRQ %d " - "for McBSP%d\n", mcbsp[id].rx_irq, - mcbsp[id].id); - free_irq(mcbsp[id].tx_irq, (void *) (&mcbsp[id])); + dev_err(mcbsp->dev, "Unable to request RX IRQ %d " + "for McBSP%d\n", mcbsp->rx_irq, + mcbsp->id); + free_irq(mcbsp->tx_irq, (void *)mcbsp); return err; } - - init_completion(&(mcbsp[id].rx_irq_completion)); } return 0; @@ -237,31 +271,34 @@ EXPORT_SYMBOL(omap_mcbsp_request); void omap_mcbsp_free(unsigned int id) { + struct omap_mcbsp *mcbsp; + if (!omap_mcbsp_check_valid_id(id)) { printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return; } + mcbsp = id_to_mcbsp_ptr(id); - if (mcbsp[id].pdata->ops->free) - mcbsp[id].pdata->ops->free(id); + if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free) + mcbsp->pdata->ops->free(id); - clk_disable(mcbsp[id].clk); + clk_disable(mcbsp->clk); - spin_lock(&mcbsp[id].lock); - if (mcbsp[id].free) { - dev_err(mcbsp[id].dev, "McBSP%d was not reserved\n", - mcbsp[id].id); - spin_unlock(&mcbsp[id].lock); + spin_lock(&mcbsp->lock); + if (mcbsp->free) { + dev_err(mcbsp->dev, "McBSP%d was not reserved\n", + mcbsp->id); + spin_unlock(&mcbsp->lock); return; } - mcbsp[id].free = 1; - spin_unlock(&mcbsp[id].lock); + mcbsp->free = 1; + spin_unlock(&mcbsp->lock); - if (mcbsp[id].io_type == OMAP_MCBSP_IRQ_IO) { + if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) { /* Free IRQs */ - free_irq(mcbsp[id].rx_irq, (void *) (&mcbsp[id])); - free_irq(mcbsp[id].tx_irq, (void *) (&mcbsp[id])); + free_irq(mcbsp->rx_irq, (void *)mcbsp); + free_irq(mcbsp->tx_irq, (void *)mcbsp); } } EXPORT_SYMBOL(omap_mcbsp_free); @@ -273,18 +310,19 @@ EXPORT_SYMBOL(omap_mcbsp_free); */ void omap_mcbsp_start(unsigned int id) { - u32 io_base; + struct omap_mcbsp *mcbsp; + void __iomem *io_base; u16 w; if (!omap_mcbsp_check_valid_id(id)) { printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return; } + mcbsp = id_to_mcbsp_ptr(id); + io_base = mcbsp->io_base; - io_base = mcbsp[id].io_base; - - mcbsp[id].rx_word_length = (OMAP_MCBSP_READ(io_base, RCR1) >> 5) & 0x7; - mcbsp[id].tx_word_length = (OMAP_MCBSP_READ(io_base, XCR1) >> 5) & 0x7; + mcbsp->rx_word_length = (OMAP_MCBSP_READ(io_base, RCR1) >> 5) & 0x7; + mcbsp->tx_word_length = (OMAP_MCBSP_READ(io_base, XCR1) >> 5) & 0x7; /* Start the sample generator */ w = OMAP_MCBSP_READ(io_base, SPCR2); @@ -310,7 +348,8 @@ EXPORT_SYMBOL(omap_mcbsp_start); void omap_mcbsp_stop(unsigned int id) { - u32 io_base; + struct omap_mcbsp *mcbsp; + void __iomem *io_base; u16 w; if (!omap_mcbsp_check_valid_id(id)) { @@ -318,7 +357,8 @@ void omap_mcbsp_stop(unsigned int id) return; } - io_base = mcbsp[id].io_base; + mcbsp = id_to_mcbsp_ptr(id); + io_base = mcbsp->io_base; /* Reset transmitter */ w = OMAP_MCBSP_READ(io_base, SPCR2); @@ -337,14 +377,17 @@ EXPORT_SYMBOL(omap_mcbsp_stop); /* polled mcbsp i/o operations */ int omap_mcbsp_pollwrite(unsigned int id, u16 buf) { - u32 base; + struct omap_mcbsp *mcbsp; + void __iomem *base; if (!omap_mcbsp_check_valid_id(id)) { printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return -ENODEV; } - base = mcbsp[id].io_base; + mcbsp = id_to_mcbsp_ptr(id); + base = mcbsp->io_base; + writew(buf, base + OMAP_MCBSP_REG_DXR1); /* if frame sync error - clear the error */ if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) { @@ -366,8 +409,8 @@ int omap_mcbsp_pollwrite(unsigned int id, u16 buf) (XRST), base + OMAP_MCBSP_REG_SPCR2); udelay(10); - dev_err(mcbsp[id].dev, "Could not write to" - " McBSP%d Register\n", mcbsp[id].id); + dev_err(mcbsp->dev, "Could not write to" + " McBSP%d Register\n", mcbsp->id); return -2; } } @@ -379,14 +422,16 @@ EXPORT_SYMBOL(omap_mcbsp_pollwrite); int omap_mcbsp_pollread(unsigned int id, u16 *buf) { - u32 base; + struct omap_mcbsp *mcbsp; + void __iomem *base; if (!omap_mcbsp_check_valid_id(id)) { printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return -ENODEV; } + mcbsp = id_to_mcbsp_ptr(id); - base = mcbsp[id].io_base; + base = mcbsp->io_base; /* if frame sync error - clear the error */ if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) { /* clear error */ @@ -407,8 +452,8 @@ int omap_mcbsp_pollread(unsigned int id, u16 *buf) (RRST), base + OMAP_MCBSP_REG_SPCR1); udelay(10); - dev_err(mcbsp[id].dev, "Could not read from" - " McBSP%d Register\n", mcbsp[id].id); + dev_err(mcbsp->dev, "Could not read from" + " McBSP%d Register\n", mcbsp->id); return -2; } } @@ -424,7 +469,8 @@ EXPORT_SYMBOL(omap_mcbsp_pollread); */ void omap_mcbsp_xmit_word(unsigned int id, u32 word) { - u32 io_base; + struct omap_mcbsp *mcbsp; + void __iomem *io_base; omap_mcbsp_word_length word_length; if (!omap_mcbsp_check_valid_id(id)) { @@ -432,10 +478,11 @@ void omap_mcbsp_xmit_word(unsigned int id, u32 word) return; } - io_base = mcbsp[id].io_base; - word_length = mcbsp[id].tx_word_length; + mcbsp = id_to_mcbsp_ptr(id); + io_base = mcbsp->io_base; + word_length = mcbsp->tx_word_length; - wait_for_completion(&(mcbsp[id].tx_irq_completion)); + wait_for_completion(&mcbsp->tx_irq_completion); if (word_length > OMAP_MCBSP_WORD_16) OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16); @@ -445,7 +492,8 @@ EXPORT_SYMBOL(omap_mcbsp_xmit_word); u32 omap_mcbsp_recv_word(unsigned int id) { - u32 io_base; + struct omap_mcbsp *mcbsp; + void __iomem *io_base; u16 word_lsb, word_msb = 0; omap_mcbsp_word_length word_length; @@ -453,11 +501,12 @@ u32 omap_mcbsp_recv_word(unsigned int id) printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return -ENODEV; } + mcbsp = id_to_mcbsp_ptr(id); - word_length = mcbsp[id].rx_word_length; - io_base = mcbsp[id].io_base; + word_length = mcbsp->rx_word_length; + io_base = mcbsp->io_base; - wait_for_completion(&(mcbsp[id].rx_irq_completion)); + wait_for_completion(&mcbsp->rx_irq_completion); if (word_length > OMAP_MCBSP_WORD_16) word_msb = OMAP_MCBSP_READ(io_base, DRR2); @@ -469,7 +518,8 @@ EXPORT_SYMBOL(omap_mcbsp_recv_word); int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word) { - u32 io_base; + struct omap_mcbsp *mcbsp; + void __iomem *io_base; omap_mcbsp_word_length tx_word_length; omap_mcbsp_word_length rx_word_length; u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0; @@ -478,10 +528,10 @@ int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word) printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return -ENODEV; } - - io_base = mcbsp[id].io_base; - tx_word_length = mcbsp[id].tx_word_length; - rx_word_length = mcbsp[id].rx_word_length; + mcbsp = id_to_mcbsp_ptr(id); + io_base = mcbsp->io_base; + tx_word_length = mcbsp->tx_word_length; + rx_word_length = mcbsp->rx_word_length; if (tx_word_length != rx_word_length) return -EINVAL; @@ -496,8 +546,8 @@ int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word) udelay(10); OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST); udelay(10); - dev_err(mcbsp[id].dev, "McBSP%d transmitter not " - "ready\n", mcbsp[id].id); + dev_err(mcbsp->dev, "McBSP%d transmitter not " + "ready\n", mcbsp->id); return -EAGAIN; } } @@ -517,8 +567,8 @@ int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word) udelay(10); OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST); udelay(10); - dev_err(mcbsp[id].dev, "McBSP%d receiver not " - "ready\n", mcbsp[id].id); + dev_err(mcbsp->dev, "McBSP%d receiver not " + "ready\n", mcbsp->id); return -EAGAIN; } } @@ -534,7 +584,9 @@ EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll); int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word) { - u32 io_base, clock_word = 0; + struct omap_mcbsp *mcbsp; + u32 clock_word = 0; + void __iomem *io_base; omap_mcbsp_word_length tx_word_length; omap_mcbsp_word_length rx_word_length; u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0; @@ -544,9 +596,11 @@ int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word) return -ENODEV; } - io_base = mcbsp[id].io_base; - tx_word_length = mcbsp[id].tx_word_length; - rx_word_length = mcbsp[id].rx_word_length; + mcbsp = id_to_mcbsp_ptr(id); + io_base = mcbsp->io_base; + + tx_word_length = mcbsp->tx_word_length; + rx_word_length = mcbsp->rx_word_length; if (tx_word_length != rx_word_length) return -EINVAL; @@ -561,8 +615,8 @@ int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word) udelay(10); OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST); udelay(10); - dev_err(mcbsp[id].dev, "McBSP%d transmitter not " - "ready\n", mcbsp[id].id); + dev_err(mcbsp->dev, "McBSP%d transmitter not " + "ready\n", mcbsp->id); return -EAGAIN; } } @@ -582,8 +636,8 @@ int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word) udelay(10); OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST); udelay(10); - dev_err(mcbsp[id].dev, "McBSP%d receiver not " - "ready\n", mcbsp[id].id); + dev_err(mcbsp->dev, "McBSP%d receiver not " + "ready\n", mcbsp->id); return -EAGAIN; } } @@ -609,6 +663,7 @@ EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll); int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int length) { + struct omap_mcbsp *mcbsp; int dma_tx_ch; int src_port = 0; int dest_port = 0; @@ -618,50 +673,51 @@ int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return -ENODEV; } + mcbsp = id_to_mcbsp_ptr(id); - if (omap_request_dma(mcbsp[id].dma_tx_sync, "McBSP TX", + if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX", omap_mcbsp_tx_dma_callback, - &mcbsp[id], + mcbsp, &dma_tx_ch)) { - dev_err(mcbsp[id].dev, " Unable to request DMA channel for " + dev_err(mcbsp->dev, " Unable to request DMA channel for " "McBSP%d TX. Trying IRQ based TX\n", - mcbsp[id].id); + mcbsp->id); return -EAGAIN; } - mcbsp[id].dma_tx_lch = dma_tx_ch; + mcbsp->dma_tx_lch = dma_tx_ch; - dev_err(mcbsp[id].dev, "McBSP%d TX DMA on channel %d\n", mcbsp[id].id, + dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id, dma_tx_ch); - init_completion(&(mcbsp[id].tx_dma_completion)); + init_completion(&mcbsp->tx_dma_completion); if (cpu_class_is_omap1()) { src_port = OMAP_DMA_PORT_TIPB; dest_port = OMAP_DMA_PORT_EMIFF; } if (cpu_class_is_omap2()) - sync_dev = mcbsp[id].dma_tx_sync; + sync_dev = mcbsp->dma_tx_sync; - omap_set_dma_transfer_params(mcbsp[id].dma_tx_lch, + omap_set_dma_transfer_params(mcbsp->dma_tx_lch, OMAP_DMA_DATA_TYPE_S16, length >> 1, 1, OMAP_DMA_SYNC_ELEMENT, sync_dev, 0); - omap_set_dma_dest_params(mcbsp[id].dma_tx_lch, + omap_set_dma_dest_params(mcbsp->dma_tx_lch, src_port, OMAP_DMA_AMODE_CONSTANT, - mcbsp[id].phys_base + OMAP_MCBSP_REG_DXR1, + mcbsp->phys_base + OMAP_MCBSP_REG_DXR1, 0, 0); - omap_set_dma_src_params(mcbsp[id].dma_tx_lch, + omap_set_dma_src_params(mcbsp->dma_tx_lch, dest_port, OMAP_DMA_AMODE_POST_INC, buffer, 0, 0); - omap_start_dma(mcbsp[id].dma_tx_lch); - wait_for_completion(&(mcbsp[id].tx_dma_completion)); + omap_start_dma(mcbsp->dma_tx_lch); + wait_for_completion(&mcbsp->tx_dma_completion); return 0; } @@ -670,6 +726,7 @@ EXPORT_SYMBOL(omap_mcbsp_xmit_buffer); int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int length) { + struct omap_mcbsp *mcbsp; int dma_rx_ch; int src_port = 0; int dest_port = 0; @@ -679,50 +736,51 @@ int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return -ENODEV; } + mcbsp = id_to_mcbsp_ptr(id); - if (omap_request_dma(mcbsp[id].dma_rx_sync, "McBSP RX", + if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX", omap_mcbsp_rx_dma_callback, - &mcbsp[id], + mcbsp, &dma_rx_ch)) { - dev_err(mcbsp[id].dev, "Unable to request DMA channel for " + dev_err(mcbsp->dev, "Unable to request DMA channel for " "McBSP%d RX. Trying IRQ based RX\n", - mcbsp[id].id); + mcbsp->id); return -EAGAIN; } - mcbsp[id].dma_rx_lch = dma_rx_ch; + mcbsp->dma_rx_lch = dma_rx_ch; - dev_err(mcbsp[id].dev, "McBSP%d RX DMA on channel %d\n", mcbsp[id].id, + dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id, dma_rx_ch); - init_completion(&(mcbsp[id].rx_dma_completion)); + init_completion(&mcbsp->rx_dma_completion); if (cpu_class_is_omap1()) { src_port = OMAP_DMA_PORT_TIPB; dest_port = OMAP_DMA_PORT_EMIFF; } if (cpu_class_is_omap2()) - sync_dev = mcbsp[id].dma_rx_sync; + sync_dev = mcbsp->dma_rx_sync; - omap_set_dma_transfer_params(mcbsp[id].dma_rx_lch, + omap_set_dma_transfer_params(mcbsp->dma_rx_lch, OMAP_DMA_DATA_TYPE_S16, length >> 1, 1, OMAP_DMA_SYNC_ELEMENT, sync_dev, 0); - omap_set_dma_src_params(mcbsp[id].dma_rx_lch, + omap_set_dma_src_params(mcbsp->dma_rx_lch, src_port, OMAP_DMA_AMODE_CONSTANT, - mcbsp[id].phys_base + OMAP_MCBSP_REG_DRR1, + mcbsp->phys_base + OMAP_MCBSP_REG_DRR1, 0, 0); - omap_set_dma_dest_params(mcbsp[id].dma_rx_lch, + omap_set_dma_dest_params(mcbsp->dma_rx_lch, dest_port, OMAP_DMA_AMODE_POST_INC, buffer, 0, 0); - omap_start_dma(mcbsp[id].dma_rx_lch); - wait_for_completion(&(mcbsp[id].rx_dma_completion)); + omap_start_dma(mcbsp->dma_rx_lch); + wait_for_completion(&mcbsp->rx_dma_completion); return 0; } @@ -737,12 +795,14 @@ EXPORT_SYMBOL(omap_mcbsp_recv_buffer); void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg *spi_cfg) { + struct omap_mcbsp *mcbsp; struct omap_mcbsp_reg_cfg mcbsp_cfg; if (!omap_mcbsp_check_valid_id(id)) { printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); return; } + mcbsp = id_to_mcbsp_ptr(id); memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg)); @@ -803,9 +863,10 @@ EXPORT_SYMBOL(omap_mcbsp_set_spi_mode); * McBSP1 and McBSP3 are directly mapped on 1610 and 1510. * 730 has only 2 McBSP, and both of them are MPU peripherals. */ -static int __init omap_mcbsp_probe(struct platform_device *pdev) +static int __devinit omap_mcbsp_probe(struct platform_device *pdev) { struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data; + struct omap_mcbsp *mcbsp; int id = pdev->id - 1; int ret = 0; @@ -818,47 +879,63 @@ static int __init omap_mcbsp_probe(struct platform_device *pdev) dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id); - if (id >= OMAP_MAX_MCBSP_COUNT) { + if (id >= omap_mcbsp_count) { dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id); ret = -EINVAL; goto exit; } - spin_lock_init(&mcbsp[id].lock); - mcbsp[id].id = id + 1; - mcbsp[id].free = 1; - mcbsp[id].dma_tx_lch = -1; - mcbsp[id].dma_rx_lch = -1; + mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL); + if (!mcbsp) { + ret = -ENOMEM; + goto exit; + } + mcbsp_ptr[id] = mcbsp; + + spin_lock_init(&mcbsp->lock); + mcbsp->id = id + 1; + mcbsp->free = 1; + mcbsp->dma_tx_lch = -1; + mcbsp->dma_rx_lch = -1; + + mcbsp->phys_base = pdata->phys_base; + mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K); + if (!mcbsp->io_base) { + ret = -ENOMEM; + goto err_ioremap; + } - mcbsp[id].phys_base = pdata->phys_base; - mcbsp[id].io_base = pdata->virt_base; /* Default I/O is IRQ based */ - mcbsp[id].io_type = OMAP_MCBSP_IRQ_IO; - mcbsp[id].tx_irq = pdata->tx_irq; - mcbsp[id].rx_irq = pdata->rx_irq; - mcbsp[id].dma_rx_sync = pdata->dma_rx_sync; - mcbsp[id].dma_tx_sync = pdata->dma_tx_sync; + mcbsp->io_type = OMAP_MCBSP_IRQ_IO; + mcbsp->tx_irq = pdata->tx_irq; + mcbsp->rx_irq = pdata->rx_irq; + mcbsp->dma_rx_sync = pdata->dma_rx_sync; + mcbsp->dma_tx_sync = pdata->dma_tx_sync; if (pdata->clk_name) - mcbsp[id].clk = clk_get(&pdev->dev, pdata->clk_name); - if (IS_ERR(mcbsp[id].clk)) { - mcbsp[id].free = 0; + mcbsp->clk = clk_get(&pdev->dev, pdata->clk_name); + if (IS_ERR(mcbsp->clk)) { dev_err(&pdev->dev, "Invalid clock configuration for McBSP%d.\n", - mcbsp[id].id); - ret = -EINVAL; - goto exit; + mcbsp->id); + ret = PTR_ERR(mcbsp->clk); + goto err_clk; } - mcbsp[id].pdata = pdata; - mcbsp[id].dev = &pdev->dev; - platform_set_drvdata(pdev, &mcbsp[id]); + mcbsp->pdata = pdata; + mcbsp->dev = &pdev->dev; + platform_set_drvdata(pdev, mcbsp); + return 0; +err_clk: + iounmap(mcbsp->io_base); +err_ioremap: + mcbsp->free = 0; exit: return ret; } -static int omap_mcbsp_remove(struct platform_device *pdev) +static int __devexit omap_mcbsp_remove(struct platform_device *pdev) { struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev); @@ -872,6 +949,8 @@ static int omap_mcbsp_remove(struct platform_device *pdev) clk_disable(mcbsp->clk); clk_put(mcbsp->clk); + iounmap(mcbsp->io_base); + mcbsp->clk = NULL; mcbsp->free = 0; mcbsp->dev = NULL; @@ -882,7 +961,7 @@ static int omap_mcbsp_remove(struct platform_device *pdev) static struct platform_driver omap_mcbsp_driver = { .probe = omap_mcbsp_probe, - .remove = omap_mcbsp_remove, + .remove = __devexit_p(omap_mcbsp_remove), .driver = { .name = "omap-mcbsp", }, diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index e0003e0746e7..9f9a921829c0 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c @@ -271,7 +271,7 @@ int __init omap1_sram_init(void) #define omap1_sram_init() do {} while (0) #endif -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) +#if defined(CONFIG_ARCH_OMAP2) static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, u32 base_cs, u32 force_unlock); @@ -352,23 +352,19 @@ static inline int omap243x_sram_init(void) #ifdef CONFIG_ARCH_OMAP3 -static u32 (*_omap2_sram_reprogram_gpmc)(u32 perf_level); -u32 omap2_sram_reprogram_gpmc(u32 perf_level) -{ - if (!_omap2_sram_reprogram_gpmc) - omap_sram_error(); - - return _omap2_sram_reprogram_gpmc(perf_level); -} - -static u32 (*_omap2_sram_configure_core_dpll)(u32 m, u32 n, - u32 freqsel, u32 m2); -u32 omap2_sram_configure_core_dpll(u32 m, u32 n, u32 freqsel, u32 m2) +static u32 (*_omap3_sram_configure_core_dpll)(u32 sdrc_rfr_ctrl, + u32 sdrc_actim_ctrla, + u32 sdrc_actim_ctrlb, + u32 m2); +u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl, u32 sdrc_actim_ctrla, + u32 sdrc_actim_ctrlb, u32 m2) { - if (!_omap2_sram_configure_core_dpll) + if (!_omap3_sram_configure_core_dpll) omap_sram_error(); - return _omap2_sram_configure_core_dpll(m, n, freqsel, m2); + return _omap3_sram_configure_core_dpll(sdrc_rfr_ctrl, + sdrc_actim_ctrla, + sdrc_actim_ctrlb, m2); } /* REVISIT: Should this be same as omap34xx_sram_init() after off-idle? */ @@ -376,31 +372,16 @@ void restore_sram_functions(void) { omap_sram_ceil = omap_sram_base + omap_sram_size; - _omap2_sram_reprogram_gpmc = omap_sram_push(omap34xx_sram_reprogram_gpmc, - omap34xx_sram_reprogram_gpmc_sz); - - _omap2_sram_configure_core_dpll = - omap_sram_push(omap34xx_sram_configure_core_dpll, - omap34xx_sram_configure_core_dpll_sz); + _omap3_sram_configure_core_dpll = + omap_sram_push(omap3_sram_configure_core_dpll, + omap3_sram_configure_core_dpll_sz); } int __init omap34xx_sram_init(void) { - _omap2_sram_ddr_init = omap_sram_push(omap34xx_sram_ddr_init, - omap34xx_sram_ddr_init_sz); - - _omap2_sram_reprogram_sdrc = omap_sram_push(omap34xx_sram_reprogram_sdrc, - omap34xx_sram_reprogram_sdrc_sz); - - _omap2_set_prcm = omap_sram_push(omap34xx_sram_set_prcm, - omap34xx_sram_set_prcm_sz); - - _omap2_sram_reprogram_gpmc = omap_sram_push(omap34xx_sram_reprogram_gpmc, - omap34xx_sram_reprogram_gpmc_sz); - - _omap2_sram_configure_core_dpll = - omap_sram_push(omap34xx_sram_configure_core_dpll, - omap34xx_sram_configure_core_dpll_sz); + _omap3_sram_configure_core_dpll = + omap_sram_push(omap3_sram_configure_core_dpll, + omap3_sram_configure_core_dpll_sz); return 0; } diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile new file mode 100644 index 000000000000..f03d7b35ba37 --- /dev/null +++ b/arch/arm/plat-s3c/Makefile @@ -0,0 +1,3 @@ +# dummy makefile, currently just including asm/arm/plat-s3c/include/plat + +obj-n := dummy.o diff --git a/include/asm-arm/plat-s3c/debug-macro.S b/arch/arm/plat-s3c/include/plat/debug-macro.S index 84c40b847da8..4aa7e2e6c001 100644 --- a/include/asm-arm/plat-s3c/debug-macro.S +++ b/arch/arm/plat-s3c/include/plat/debug-macro.S @@ -9,7 +9,7 @@ * published by the Free Software Foundation. */ -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> /* The S3C2440 implementations are used by default as they are the * most widely re-used */ diff --git a/include/asm-arm/plat-s3c/map.h b/arch/arm/plat-s3c/include/plat/map.h index b84289d32a54..b84289d32a54 100644 --- a/include/asm-arm/plat-s3c/map.h +++ b/arch/arm/plat-s3c/include/plat/map.h diff --git a/include/asm-arm/plat-s3c/regs-adc.h b/arch/arm/plat-s3c/include/plat/regs-adc.h index 4323cccc86cd..4323cccc86cd 100644 --- a/include/asm-arm/plat-s3c/regs-adc.h +++ b/arch/arm/plat-s3c/include/plat/regs-adc.h diff --git a/include/asm-arm/plat-s3c/regs-serial.h b/arch/arm/plat-s3c/include/plat/regs-serial.h index a0daa647b92c..a0daa647b92c 100644 --- a/include/asm-arm/plat-s3c/regs-serial.h +++ b/arch/arm/plat-s3c/include/plat/regs-serial.h diff --git a/include/asm-arm/plat-s3c/regs-timer.h b/arch/arm/plat-s3c/include/plat/regs-timer.h index cc0eedd53e38..cc0eedd53e38 100644 --- a/include/asm-arm/plat-s3c/regs-timer.h +++ b/arch/arm/plat-s3c/include/plat/regs-timer.h diff --git a/include/asm-arm/plat-s3c/uncompress.h b/arch/arm/plat-s3c/include/plat/uncompress.h index 19b9eda39485..4df006b9cc10 100644 --- a/include/asm-arm/plat-s3c/uncompress.h +++ b/arch/arm/plat-s3c/include/plat/uncompress.h @@ -27,7 +27,7 @@ static void arch_detect_cpu(void); /* defines for UART registers */ -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <asm/plat-s3c/regs-watchdog.h> /* working in physical space... */ diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c index 400541359bfb..a005ddbd9ef3 100644 --- a/arch/arm/plat-s3c24xx/clock.c +++ b/arch/arm/plat-s3c24xx/clock.c @@ -47,8 +47,8 @@ #include <mach/regs-clock.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/cpu.h> /* clock information */ diff --git a/arch/arm/plat-s3c24xx/common-smdk.c b/arch/arm/plat-s3c24xx/common-smdk.c index d528f460f6bc..3098736c65d9 100644 --- a/arch/arm/plat-s3c24xx/common-smdk.c +++ b/arch/arm/plat-s3c24xx/common-smdk.c @@ -40,9 +40,9 @@ #include <asm/plat-s3c/nand.h> -#include <asm/plat-s3c24xx/common-smdk.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/common-smdk.h> +#include <plat/devs.h> +#include <plat/pm.h> /* LED devices */ diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c index 9c607bbc9343..22a329513c0f 100644 --- a/arch/arm/plat-s3c24xx/cpu.c +++ b/arch/arm/plat-s3c24xx/cpu.c @@ -42,18 +42,18 @@ #include <mach/system-reset.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c/regs-serial.h> - -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/s3c2400.h> -#include <asm/plat-s3c24xx/s3c2410.h> -#include <asm/plat-s3c24xx/s3c2412.h> +#include <plat/regs-serial.h> + +#include <plat/cpu.h> +#include <plat/devs.h> +#include <plat/clock.h> +#include <plat/s3c2400.h> +#include <plat/s3c2410.h> +#include <plat/s3c2412.h> #include "s3c244x.h" -#include <asm/plat-s3c24xx/s3c2440.h> -#include <asm/plat-s3c24xx/s3c2442.h> -#include <asm/plat-s3c24xx/s3c2443.h> +#include <plat/s3c2440.h> +#include <plat/s3c2442.h> +#include <plat/s3c2443.h> struct cpu_table { unsigned long idcode; diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c index 6b13b5455dfc..e93f8bf6d338 100644 --- a/arch/arm/plat-s3c24xx/devs.c +++ b/arch/arm/plat-s3c24xx/devs.c @@ -28,11 +28,11 @@ #include <mach/hardware.h> #include <asm/irq.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <asm/plat-s3c24xx/udc.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/devs.h> +#include <plat/cpu.h> #include <asm/plat-s3c24xx/regs-spi.h> /* Serial port registrations */ diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index d6344461a83b..1baf941d1930 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c @@ -36,7 +36,7 @@ #include <asm/mach/dma.h> #include <mach/map.h> -#include <asm/plat-s3c24xx/dma.h> +#include <plat/dma.h> /* io map for dma */ static void __iomem *dma_base; diff --git a/include/asm-arm/plat-s3c24xx/clock.h b/arch/arm/plat-s3c24xx/include/plat/clock.h index 235b753cd877..235b753cd877 100644 --- a/include/asm-arm/plat-s3c24xx/clock.h +++ b/arch/arm/plat-s3c24xx/include/plat/clock.h diff --git a/include/asm-arm/plat-s3c24xx/common-smdk.h b/arch/arm/plat-s3c24xx/include/plat/common-smdk.h index 58d9094c935c..58d9094c935c 100644 --- a/include/asm-arm/plat-s3c24xx/common-smdk.h +++ b/arch/arm/plat-s3c24xx/include/plat/common-smdk.h diff --git a/include/asm-arm/plat-s3c24xx/cpu.h b/arch/arm/plat-s3c24xx/include/plat/cpu.h index 23e420e8bd5b..23e420e8bd5b 100644 --- a/include/asm-arm/plat-s3c24xx/cpu.h +++ b/arch/arm/plat-s3c24xx/include/plat/cpu.h diff --git a/include/asm-arm/plat-s3c24xx/devs.h b/arch/arm/plat-s3c24xx/include/plat/devs.h index badaac9d64a8..badaac9d64a8 100644 --- a/include/asm-arm/plat-s3c24xx/devs.h +++ b/arch/arm/plat-s3c24xx/include/plat/devs.h diff --git a/include/asm-arm/plat-s3c24xx/dma.h b/arch/arm/plat-s3c24xx/include/plat/dma.h index c78efe316fc8..c78efe316fc8 100644 --- a/include/asm-arm/plat-s3c24xx/dma.h +++ b/arch/arm/plat-s3c24xx/include/plat/dma.h diff --git a/include/asm-arm/plat-s3c24xx/irq.h b/arch/arm/plat-s3c24xx/include/plat/irq.h index 45746a995343..45746a995343 100644 --- a/include/asm-arm/plat-s3c24xx/irq.h +++ b/arch/arm/plat-s3c24xx/include/plat/irq.h diff --git a/include/asm-arm/plat-s3c24xx/pm.h b/arch/arm/plat-s3c24xx/include/plat/pm.h index cc623667e48a..cc623667e48a 100644 --- a/include/asm-arm/plat-s3c24xx/pm.h +++ b/arch/arm/plat-s3c24xx/include/plat/pm.h diff --git a/include/asm-arm/plat-s3c24xx/s3c2400.h b/arch/arm/plat-s3c24xx/include/plat/s3c2400.h index 3a5a16821af8..3a5a16821af8 100644 --- a/include/asm-arm/plat-s3c24xx/s3c2400.h +++ b/arch/arm/plat-s3c24xx/include/plat/s3c2400.h diff --git a/include/asm-arm/plat-s3c24xx/s3c2410.h b/arch/arm/plat-s3c24xx/include/plat/s3c2410.h index 3cd1ec677b3f..3cd1ec677b3f 100644 --- a/include/asm-arm/plat-s3c24xx/s3c2410.h +++ b/arch/arm/plat-s3c24xx/include/plat/s3c2410.h diff --git a/include/asm-arm/plat-s3c24xx/s3c2412.h b/arch/arm/plat-s3c24xx/include/plat/s3c2412.h index 3ec97685e781..3ec97685e781 100644 --- a/include/asm-arm/plat-s3c24xx/s3c2412.h +++ b/arch/arm/plat-s3c24xx/include/plat/s3c2412.h diff --git a/include/asm-arm/plat-s3c24xx/s3c2440.h b/arch/arm/plat-s3c24xx/include/plat/s3c2440.h index 107853bf9481..107853bf9481 100644 --- a/include/asm-arm/plat-s3c24xx/s3c2440.h +++ b/arch/arm/plat-s3c24xx/include/plat/s3c2440.h diff --git a/include/asm-arm/plat-s3c24xx/s3c2442.h b/arch/arm/plat-s3c24xx/include/plat/s3c2442.h index 451a23a2092a..451a23a2092a 100644 --- a/include/asm-arm/plat-s3c24xx/s3c2442.h +++ b/arch/arm/plat-s3c24xx/include/plat/s3c2442.h diff --git a/include/asm-arm/plat-s3c24xx/s3c2443.h b/arch/arm/plat-s3c24xx/include/plat/s3c2443.h index 11d83b5c84e6..11d83b5c84e6 100644 --- a/include/asm-arm/plat-s3c24xx/s3c2443.h +++ b/arch/arm/plat-s3c24xx/include/plat/s3c2443.h diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c index 590fc5a3ab06..963f7a4f26f2 100644 --- a/arch/arm/plat-s3c24xx/irq.c +++ b/arch/arm/plat-s3c24xx/irq.c @@ -65,9 +65,9 @@ #include <mach/regs-irq.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> -#include <asm/plat-s3c24xx/irq.h> +#include <plat/cpu.h> +#include <plat/pm.h> +#include <plat/irq.h> /* wakeup irq control */ diff --git a/arch/arm/plat-s3c24xx/pm-simtec.c b/arch/arm/plat-s3c24xx/pm-simtec.c index 0a074d35890a..21dfa74773d1 100644 --- a/arch/arm/plat-s3c24xx/pm-simtec.c +++ b/arch/arm/plat-s3c24xx/pm-simtec.c @@ -33,7 +33,7 @@ #include <asm/mach-types.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/pm.h> #define COPYRIGHT ", (c) 2005 Simtec Electronics" diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c index d3934b1119a9..8efb57ad5019 100644 --- a/arch/arm/plat-s3c24xx/pm.c +++ b/arch/arm/plat-s3c24xx/pm.c @@ -40,7 +40,7 @@ #include <asm/cacheflush.h> #include <mach/hardware.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-clock.h> #include <mach/regs-gpio.h> #include <mach/regs-mem.h> @@ -48,7 +48,7 @@ #include <asm/mach/time.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/pm.h> /* for external use */ diff --git a/arch/arm/plat-s3c24xx/pwm-clock.c b/arch/arm/plat-s3c24xx/pwm-clock.c index 306cc9c6f9ef..b8e854f1b1d5 100644 --- a/arch/arm/plat-s3c24xx/pwm-clock.c +++ b/arch/arm/plat-s3c24xx/pwm-clock.c @@ -24,10 +24,10 @@ #include <mach/regs-clock.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/cpu.h> -#include <asm/plat-s3c/regs-timer.h> +#include <plat/regs-timer.h> /* Each of the timers 0 through 5 go through the following * clock tree, with the inputs depending on the timers. diff --git a/arch/arm/plat-s3c24xx/pwm.c b/arch/arm/plat-s3c24xx/pwm.c index 7a92c938542a..feb770f2e84e 100644 --- a/arch/arm/plat-s3c24xx/pwm.c +++ b/arch/arm/plat-s3c24xx/pwm.c @@ -19,8 +19,8 @@ #include <linux/io.h> #include <linux/pwm.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c/regs-timer.h> +#include <plat/devs.h> +#include <plat/regs-timer.h> struct pwm_device { struct list_head list; diff --git a/arch/arm/plat-s3c24xx/s3c244x-clock.c b/arch/arm/plat-s3c24xx/s3c244x-clock.c index 119647a5eaa6..7c09773ff9fc 100644 --- a/arch/arm/plat-s3c24xx/s3c244x-clock.c +++ b/arch/arm/plat-s3c24xx/s3c244x-clock.c @@ -41,8 +41,8 @@ #include <mach/regs-clock.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/cpu.h> static int s3c2440_setparent_armclk(struct clk *clk, struct clk *parent) { diff --git a/arch/arm/plat-s3c24xx/s3c244x-irq.c b/arch/arm/plat-s3c24xx/s3c244x-irq.c index 0601c5f3230b..0902afd227ca 100644 --- a/arch/arm/plat-s3c24xx/s3c244x-irq.c +++ b/arch/arm/plat-s3c24xx/s3c244x-irq.c @@ -34,9 +34,9 @@ #include <mach/regs-irq.h> #include <mach/regs-gpio.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> -#include <asm/plat-s3c24xx/irq.h> +#include <plat/cpu.h> +#include <plat/pm.h> +#include <plat/irq.h> /* camera irq */ diff --git a/arch/arm/plat-s3c24xx/s3c244x.c b/arch/arm/plat-s3c24xx/s3c244x.c index 146863a69aeb..c0344fac4a94 100644 --- a/arch/arm/plat-s3c24xx/s3c244x.c +++ b/arch/arm/plat-s3c24xx/s3c244x.c @@ -30,18 +30,18 @@ #include <asm/irq.h> #include <mach/regs-clock.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include <mach/regs-gpioj.h> #include <mach/regs-dsc.h> -#include <asm/plat-s3c24xx/s3c2410.h> -#include <asm/plat-s3c24xx/s3c2440.h> +#include <plat/s3c2410.h> +#include <plat/s3c2440.h> #include "s3c244x.h" -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/devs.h> -#include <asm/plat-s3c24xx/cpu.h> -#include <asm/plat-s3c24xx/pm.h> +#include <plat/clock.h> +#include <plat/devs.h> +#include <plat/cpu.h> +#include <plat/pm.h> static struct map_desc s3c244x_iodesc[] __initdata = { IODESC_ENT(CLKPWR), diff --git a/arch/arm/plat-s3c24xx/sleep.S b/arch/arm/plat-s3c24xx/sleep.S index 4981a08b6ebb..76594b212802 100644 --- a/arch/arm/plat-s3c24xx/sleep.S +++ b/arch/arm/plat-s3c24xx/sleep.S @@ -32,7 +32,7 @@ #include <mach/regs-gpio.h> #include <mach/regs-clock.h> #include <mach/regs-mem.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> /* CONFIG_DEBUG_RESUME is dangerous if your bootloader does not * reset the UART configuration, only enable if you really need this! diff --git a/arch/arm/plat-s3c24xx/time.c b/arch/arm/plat-s3c24xx/time.c index 64bfa19ae951..c51916236ac0 100644 --- a/arch/arm/plat-s3c24xx/time.c +++ b/arch/arm/plat-s3c24xx/time.c @@ -33,12 +33,12 @@ #include <asm/irq.h> #include <mach/map.h> -#include <asm/plat-s3c/regs-timer.h> +#include <plat/regs-timer.h> #include <mach/regs-irq.h> #include <asm/mach/time.h> -#include <asm/plat-s3c24xx/clock.h> -#include <asm/plat-s3c24xx/cpu.h> +#include <plat/clock.h> +#include <plat/cpu.h> static unsigned long timer_startval; static unsigned long timer_usec_ticks; diff --git a/arch/avr32/mach-at32ap/cpufreq.c b/arch/avr32/mach-at32ap/cpufreq.c index 5dd8d25428bf..d84efe4984ab 100644 --- a/arch/avr32/mach-at32ap/cpufreq.c +++ b/arch/avr32/mach-at32ap/cpufreq.c @@ -87,7 +87,6 @@ static int __init at32_cpufreq_driver_init(struct cpufreq_policy *policy) policy->cur = at32_get_speed(0); policy->min = policy->cpuinfo.min_freq; policy->max = policy->cpuinfo.max_freq; - policy->governor = CPUFREQ_DEFAULT_GOVERNOR; printk("cpufreq: AT32AP CPU frequency driver\n"); diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c index 75cdad291e88..c22c47b60127 100644 --- a/arch/blackfin/mach-common/cpufreq.c +++ b/arch/blackfin/mach-common/cpufreq.c @@ -158,8 +158,6 @@ static int __init __bfin_cpu_init(struct cpufreq_policy *policy) dpm_state_table[index].tscale); } - policy->governor = CPUFREQ_DEFAULT_GOVERNOR; - policy->cpuinfo.transition_latency = (bfin_read_PLL_LOCKCNT() / (sclk / 1000000)) * 1000; /*Now ,only support one cpu */ policy->cur = cclk; diff --git a/arch/cris/arch-v32/mach-a3/cpufreq.c b/arch/cris/arch-v32/mach-a3/cpufreq.c index 8e5a3cab8ad7..ee391ecb5bc9 100644 --- a/arch/cris/arch-v32/mach-a3/cpufreq.c +++ b/arch/cris/arch-v32/mach-a3/cpufreq.c @@ -85,7 +85,6 @@ static int cris_freq_cpu_init(struct cpufreq_policy *policy) int result; /* cpuinfo and default policy values */ - policy->governor = CPUFREQ_DEFAULT_GOVERNOR; policy->cpuinfo.transition_latency = 1000000; /* 1ms */ policy->cur = cris_freq_get_cpu_frequency(0); diff --git a/arch/cris/arch-v32/mach-fs/cpufreq.c b/arch/cris/arch-v32/mach-fs/cpufreq.c index d57631c0d8d1..58bd71e5bda9 100644 --- a/arch/cris/arch-v32/mach-fs/cpufreq.c +++ b/arch/cris/arch-v32/mach-fs/cpufreq.c @@ -81,7 +81,6 @@ static int cris_freq_cpu_init(struct cpufreq_policy *policy) int result; /* cpuinfo and default policy values */ - policy->governor = CPUFREQ_DEFAULT_GOVERNOR; policy->cpuinfo.transition_latency = 1000000; /* 1ms */ policy->cur = cris_freq_get_cpu_frequency(0); diff --git a/arch/frv/kernel/pm.c b/arch/frv/kernel/pm.c index d1113c5031f5..be722fc1acff 100644 --- a/arch/frv/kernel/pm.c +++ b/arch/frv/kernel/pm.c @@ -211,7 +211,7 @@ static int cmode_procctl(ctl_table *ctl, int write, struct file *filp, return try_set_cmode(new_cmode)?:*lenp; } -static int cmode_sysctl(ctl_table *table, int __user *name, int nlen, +static int cmode_sysctl(ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { @@ -314,7 +314,7 @@ static int p0_procctl(ctl_table *ctl, int write, struct file *filp, return try_set_p0(new_p0)?:*lenp; } -static int p0_sysctl(ctl_table *table, int __user *name, int nlen, +static int p0_sysctl(ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { @@ -358,7 +358,7 @@ static int cm_procctl(ctl_table *ctl, int write, struct file *filp, return try_set_cm(new_cm)?:*lenp; } -static int cm_sysctl(ctl_table *table, int __user *name, int nlen, +static int cm_sysctl(ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { diff --git a/arch/h8300/Kconfig b/arch/h8300/Kconfig index 107cb5bb9f39..c7966746fbfe 100644 --- a/arch/h8300/Kconfig +++ b/arch/h8300/Kconfig @@ -62,6 +62,10 @@ config GENERIC_TIME bool default y +config GENERIC_BUG + bool + depends on BUG + config TIME_LOW_RES bool default y diff --git a/arch/h8300/Kconfig.cpu b/arch/h8300/Kconfig.cpu index 582797db9603..b65dcfe51d9c 100644 --- a/arch/h8300/Kconfig.cpu +++ b/arch/h8300/Kconfig.cpu @@ -1,5 +1,7 @@ menu "Processor type and features" +source "kernel/time/Kconfig" + choice prompt "H8/300 platform" default H8300H_GENERIC @@ -11,6 +13,7 @@ config H8300H_GENERIC config H8300H_AKI3068NET bool "AE-3068/69" + select CONFIG_H83068 help AKI-H8/3068F / AKI-H8/3069F Flashmicom LAN Board Support More Information. (Japanese Only) @@ -21,6 +24,7 @@ config H8300H_AKI3068NET config H8300H_H8MAX bool "H8MAX" + select CONFIG_H83068 help H8MAX Evaluation Board Support More Information. (Japanese Only) @@ -28,6 +32,7 @@ config H8300H_H8MAX config H8300H_SIM bool "H8/300H Simulator" + select CONFIG_H83007 help GDB Simulator Support More Information. @@ -40,6 +45,7 @@ config H8S_GENERIC config H8S_EDOSK2674 bool "EDOSK-2674" + select CONFIG_H8S2768 help Renesas EDOSK-2674 Evaluation Board Support More Information. @@ -55,44 +61,37 @@ config H8S_SIM endchoice -if (H8300H_GENERIC || H8S_GENERIC) -menu "Detail Selection" -if (H8300H_GENERIC) choice prompt "CPU Selection" config H83002 bool "H8/3001,3002,3003" + select CPU_H8300H config H83007 bool "H8/3006,3007" + select CPU_H8300H config H83048 bool "H8/3044,3045,3046,3047,3048,3052" + select CPU_H8300H config H83068 bool "H8/3065,3066,3067,3068,3069" -endchoice -endif - -if (H8S_GENERIC) -choice - prompt "CPU Selection" + select CPU_H8300H config H8S2678 bool "H8S/2670,2673,2674R,2675,2676" + select CPU_H8S + endchoice -endif config CPU_CLOCK int "CPU Clock Frequency (/1KHz)" default "20000" help CPU Clock Frequency divide to 1000 -endmenu -endif -if (H8300H_GENERIC || H8S_GENERIC || H8300H_SIM || H8S_SIM || H8S_EDOSK2674) choice prompt "Kernel executes from" ---help--- @@ -107,75 +106,61 @@ config ROMKERNEL bool "ROM" help The kernel will be resident in FLASH/ROM when running. - endchoice -endif -if (H8300H_AKI3068NET) -config H83068 - bool - default y -config CPU_CLOCK - int - default "20000" - -config RAMKERNEL +config CPU_H8300H bool + depends on (H83002 || H83007 || H83048 || H83068) default y -endif -if (H8300H_H8MAX) -config H83068 +config CPU_H8S bool + depends on H8S2678 default y -config CPU_CLOCK - int - default 25000 +choice + prompt "Timer" +config H8300_TIMER8 + bool "8bit timer (2ch cascade)" + depends on (H83007 || H83068 || H8S2678) -config RAMKERNEL - bool - default y -endif +config H8300_TIMER16 + bool "16bit timer" + depends on (H83007 || H83068) -if (H8300H_SIM) -config H83007 - bool - default y +config H8300_ITU + bool "ITU" + depends on (H83002 || H83048) -config CPU_CLOCK - int - default "16000" -endif +config H8300_TPU + bool "TPU" + depends on H8S2678 +endchoice -if (H8S_EDOSK2674) -config H8S2678 - bool - default y -config CPU_CLOCK - int - default 33000 +if H8300_TIMER8 +choice + prompt "Timer Channel" +config H8300_TIMER8_CH0 + bool "Channel 0" +config H8300_TIMER8_CH2 + bool "Channel 2" + depends on CPU_H8300H +endchoice endif -if (H8S_SIM) -config H8S2678 - bool - default y -config CPU_CLOCK - int - default 33000 -endif +config H8300_TIMER16_CH + int "16bit timer channel (0 - 2)" + depends on H8300_TIMER16 + range 0 2 -config CPU_H8300H - bool - depends on (H83002 || H83007 || H83048 || H83068) - default y +config H8300_ITU_CH + int "ITU channel" + depends on H8300_ITU -config CPU_H8S - bool - depends on H8S2678 - default y +config H8300_TPU_CH + int "TPU channel" + depends on H8300_TPU config PREEMPT bool "Preemptible Kernel" diff --git a/arch/h8300/include/asm/bug.h b/arch/h8300/include/asm/bug.h index edddf5b086e5..887c19773185 100644 --- a/arch/h8300/include/asm/bug.h +++ b/arch/h8300/include/asm/bug.h @@ -1,4 +1,8 @@ #ifndef _H8300_BUG_H #define _H8300_BUG_H + +/* always true */ +#define is_valid_bugaddr(addr) (1) + #include <asm-generic/bug.h> #endif diff --git a/arch/h8300/include/asm/io.h b/arch/h8300/include/asm/io.h index 26dc6ccd9441..33e842f3284b 100644 --- a/arch/h8300/include/asm/io.h +++ b/arch/h8300/include/asm/io.h @@ -295,6 +295,40 @@ static __inline__ void ctrl_outl(unsigned long b, unsigned long addr) *(volatile unsigned long*)addr = b; } +static __inline__ void ctrl_bclr(int b, unsigned long addr) +{ + if (__builtin_constant_p(b)) + switch (b) { + case 0: __asm__("bclr #0,@%0"::"r"(addr)); break; + case 1: __asm__("bclr #1,@%0"::"r"(addr)); break; + case 2: __asm__("bclr #2,@%0"::"r"(addr)); break; + case 3: __asm__("bclr #3,@%0"::"r"(addr)); break; + case 4: __asm__("bclr #4,@%0"::"r"(addr)); break; + case 5: __asm__("bclr #5,@%0"::"r"(addr)); break; + case 6: __asm__("bclr #6,@%0"::"r"(addr)); break; + case 7: __asm__("bclr #7,@%0"::"r"(addr)); break; + } + else + __asm__("bclr %w0,@%1"::"r"(b), "r"(addr)); +} + +static __inline__ void ctrl_bset(int b, unsigned long addr) +{ + if (__builtin_constant_p(b)) + switch (b) { + case 0: __asm__("bset #0,@%0"::"r"(addr)); break; + case 1: __asm__("bset #1,@%0"::"r"(addr)); break; + case 2: __asm__("bset #2,@%0"::"r"(addr)); break; + case 3: __asm__("bset #3,@%0"::"r"(addr)); break; + case 4: __asm__("bset #4,@%0"::"r"(addr)); break; + case 5: __asm__("bset #5,@%0"::"r"(addr)); break; + case 6: __asm__("bset #6,@%0"::"r"(addr)); break; + case 7: __asm__("bset #7,@%0"::"r"(addr)); break; + } + else + __asm__("bset %w0,@%1"::"r"(b), "r"(addr)); +} + /* Pages to physical address... */ #define page_to_phys(page) ((page - mem_map) << PAGE_SHIFT) #define page_to_bus(page) ((page - mem_map) << PAGE_SHIFT) diff --git a/arch/h8300/include/asm/md.h b/arch/h8300/include/asm/md.h index 1a47dc6691fb..1b7300e0a175 100644 --- a/arch/h8300/include/asm/md.h +++ b/arch/h8300/include/asm/md.h @@ -1,4 +1,4 @@ -/* $Id: md.h,v 1.1 2002/11/19 02:09:26 gerg Exp $ +/* * md.h: High speed xor_block operation for RAID4/5 * */ diff --git a/arch/h8300/include/asm/system.h b/arch/h8300/include/asm/system.h index 4b8e475908ae..d98d97685f06 100644 --- a/arch/h8300/include/asm/system.h +++ b/arch/h8300/include/asm/system.h @@ -155,4 +155,6 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz #define arch_align_stack(x) (x) +void die(char *str, struct pt_regs *fp, unsigned long err); + #endif /* _H8300_SYSTEM_H */ diff --git a/arch/h8300/kernel/Makefile b/arch/h8300/kernel/Makefile index 6c248c3c5c3b..8d4d2a54be9e 100644 --- a/arch/h8300/kernel/Makefile +++ b/arch/h8300/kernel/Makefile @@ -7,6 +7,6 @@ extra-y := vmlinux.lds obj-y := process.o traps.o ptrace.o irq.o \ sys_h8300.o time.o signal.o \ setup.o gpio.o init_task.o syscalls.o \ - entry.o + entry.o timer/ obj-$(CONFIG_MODULES) += module.o h8300_ksyms.o diff --git a/arch/h8300/kernel/module.c b/arch/h8300/kernel/module.c index 4fd7138a6e03..cfc9127d2ced 100644 --- a/arch/h8300/kernel/module.c +++ b/arch/h8300/kernel/module.c @@ -114,9 +114,10 @@ int module_finalize(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs, struct module *me) { - return 0; + return module_bug_finalize(hdr, sechdrs, me); } void module_arch_cleanup(struct module *mod) { + module_bug_cleanup(mod); } diff --git a/arch/h8300/kernel/time.c b/arch/h8300/kernel/time.c index e37c835e67cf..7f2d6cfbb4b6 100644 --- a/arch/h8300/kernel/time.c +++ b/arch/h8300/kernel/time.c @@ -27,27 +27,21 @@ #include <linux/profile.h> #include <asm/io.h> -#include <asm/target_time.h> +#include <asm/timer.h> #define TICK_SIZE (tick_nsec / 1000) -/* - * timer_interrupt() needs to keep up the real-time clock, - * as well as call the "do_timer()" routine every clocktick - */ -static void timer_interrupt(int irq, void *dummy, struct pt_regs * regs) +void h8300_timer_tick(void) { - /* may need to kick the hardware timer */ - platform_timer_eoi(); - + if (current->pid) + profile_tick(CPU_PROFILING); + write_seqlock(&xtime_lock); do_timer(1); -#ifndef CONFIG_SMP - update_process_times(user_mode(regs)); -#endif - profile_tick(CPU_PROFILING); + write_sequnlock(&xtime_lock); + update_process_times(user_mode(get_irq_regs())); } -void time_init(void) +void __init time_init(void) { unsigned int year, mon, day, hour, min, sec; @@ -57,12 +51,13 @@ void time_init(void) year = 1980; mon = day = 1; hour = min = sec = 0; - platform_gettod (&year, &mon, &day, &hour, &min, &sec); - +#ifdef CONFIG_H8300_GETTOD + h8300_gettod (&year, &mon, &day, &hour, &min, &sec); +#endif if ((year += 1900) < 1970) year += 100; xtime.tv_sec = mktime(year, mon, day, hour, min, sec); xtime.tv_nsec = 0; - platform_timer_setup(timer_interrupt); + h8300_timer_setup(); } diff --git a/arch/h8300/kernel/timer/Makefile b/arch/h8300/kernel/timer/Makefile new file mode 100644 index 000000000000..bef0510ea6ad --- /dev/null +++ b/arch/h8300/kernel/timer/Makefile @@ -0,0 +1,6 @@ +# h8300 internal timer handler + +obj-$(CONFIG_H8300_TIMER8) := timer8.o +obj-$(CONFIG_H8300_TIMER16) := timer16.o +obj-$(CONFIG_H8300_ITU) := itu.o +obj-$(CONFIG_H8300_TPU) := tpu.o diff --git a/arch/h8300/kernel/timer/itu.c b/arch/h8300/kernel/timer/itu.c new file mode 100644 index 000000000000..d1c926596b08 --- /dev/null +++ b/arch/h8300/kernel/timer/itu.c @@ -0,0 +1,83 @@ +/* + * linux/arch/h8300/kernel/timer/itu.c + * + * Yoshinori Sato <ysato@users.sourcefoge.jp> + * + * ITU Timer Handler + * + */ + +#include <linux/errno.h> +#include <linux/sched.h> +#include <linux/kernel.h> +#include <linux/param.h> +#include <linux/string.h> +#include <linux/mm.h> +#include <linux/interrupt.h> +#include <linux/init.h> +#include <linux/timex.h> + +#include <asm/segment.h> +#include <asm/io.h> +#include <asm/irq.h> +#include <asm/regs306x.h> + +#if CONFIG_H8300_ITU_CH == 0 +#define ITUBASE 0xffff64 +#define ITUIRQ 24 +#elif CONFIG_H8300_ITU_CH == 1 +#define ITUBASE 0xffff6e +#define ITUIRQ 28 +#elif CONFIG_H8300_ITU_CH == 2 +#define ITUBASE 0xffff78 +#define ITUIRQ 32 +#elif CONFIG_H8300_ITU_CH == 3 +#define ITUBASE 0xffff82 +#define ITUIRQ 36 +#elif CONFIG_H8300_ITU_CH == 4 +#define ITUBASE 0xffff92 +#define ITUIRQ 40 +#else +#error Unknown timer channel. +#endif + +#define TCR 0 +#define TIOR 1 +#define TIER 2 +#define TSR 3 +#define TCNT 4 +#define GRA 6 +#define GRB 8 + +static irqreturn_t timer_interrupt(int irq, void *dev_id) +{ + h8300_timer_tick(); + ctrl_bclr(IMFA, ITUBASE + TSR); + return IRQ_HANDLED; +} + +static struct irqaction itu_irq = { + .name = "itu", + .handler = timer_interrupt, + .flags = IRQF_DISABLED | IRQF_TIMER, + .mask = CPU_MASK_NONE, +}; + +static const int __initdata divide_rate[] = {1, 2, 4, 8}; + +void __init h8300_timer_setup(void) +{ + unsigned int div; + unsigned int cnt; + + calc_param(cnt, div, divide_rate, 0x10000); + + setup_irq(ITUIRQ, &itu_irq); + + /* initalize timer */ + ctrl_outb(0, TSTR); + ctrl_outb(CCLR0 | div, ITUBASE + TCR); + ctrl_outb(0x01, ITUBASE + TIER); + ctrl_outw(cnt, ITUBASE + GRA); + ctrl_bset(CONFIG_H8300_ITU_CH, TSTR); +} diff --git a/arch/h8300/kernel/timer/timer16.c b/arch/h8300/kernel/timer/timer16.c new file mode 100644 index 000000000000..e14271b72119 --- /dev/null +++ b/arch/h8300/kernel/timer/timer16.c @@ -0,0 +1,78 @@ +/* + * linux/arch/h8300/kernel/timer/timer16.c + * + * Yoshinori Sato <ysato@users.sourcefoge.jp> + * + * 16bit Timer Handler + * + */ + +#include <linux/errno.h> +#include <linux/sched.h> +#include <linux/kernel.h> +#include <linux/param.h> +#include <linux/string.h> +#include <linux/mm.h> +#include <linux/interrupt.h> +#include <linux/init.h> +#include <linux/timex.h> + +#include <asm/segment.h> +#include <asm/io.h> +#include <asm/irq.h> +#include <asm/regs306x.h> + +/* 16bit timer */ +#if CONFIG_H8300_TIMER16_CH == 0 +#define _16BASE 0xffff78 +#define _16IRQ 24 +#elif CONFIG_H8300_TIMER16_CH == 1 +#define _16BASE 0xffff80 +#define _16IRQ 28 +#elif CONFIG_H8300_TIMER16_CH == 2 +#define _16BASE 0xffff88 +#define _16IRQ 32 +#else +#error Unknown timer channel. +#endif + +#define TCR 0 +#define TIOR 1 +#define TCNT 2 +#define GRA 4 +#define GRB 6 + +#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*10000 /* Timer input freq. */ + +static irqreturn_t timer_interrupt(int irq, void *dev_id) +{ + h8300_timer_tick(); + ctrl_bclr(CONFIG_H8300_TIMER16_CH, TISRA); + return IRQ_HANDLED; +} + +static struct irqaction timer16_irq = { + .name = "timer-16", + .handler = timer_interrupt, + .flags = IRQF_DISABLED | IRQF_TIMER, + .mask = CPU_MASK_NONE, +}; + +static const int __initdata divide_rate[] = {1, 2, 4, 8}; + +void __init h8300_timer_setup(void) +{ + unsigned int div; + unsigned int cnt; + + calc_param(cnt, div, divide_rate, 0x10000); + + setup_irq(_16IRQ, &timer16_irq); + + /* initalize timer */ + ctrl_outb(0, TSTR); + ctrl_outb(CCLR0 | div, _16BASE + TCR); + ctrl_outw(cnt, _16BASE + GRA); + ctrl_bset(4 + CONFIG_H8300_TIMER16_CH, TISRA); + ctrl_bset(CONFIG_H8300_TIMER16_CH, TSTR); +} diff --git a/arch/h8300/kernel/timer/timer8.c b/arch/h8300/kernel/timer/timer8.c new file mode 100644 index 000000000000..0556d7c7bea6 --- /dev/null +++ b/arch/h8300/kernel/timer/timer8.c @@ -0,0 +1,103 @@ +/* + * linux/arch/h8300/kernel/cpu/timer/timer8.c + * + * Yoshinori Sato <ysato@users.sourcefoge.jp> + * + * 8bit Timer Handler + * + */ + +#include <linux/errno.h> +#include <linux/sched.h> +#include <linux/kernel.h> +#include <linux/param.h> +#include <linux/string.h> +#include <linux/mm.h> +#include <linux/interrupt.h> +#include <linux/init.h> +#include <linux/profile.h> + +#include <asm/io.h> +#include <asm/irq.h> +#include <asm/timer.h> +#if defined(CONFIG_CPU_H8300H) +#include <asm/regs306x.h> +#endif +#if defined(CONFIG_CPU_H8S) +#include <asm/regs267x.h> +#endif + +/* 8bit timer x2 */ +#define CMFA 6 + +#if defined(CONFIG_H8300_TIMER8_CH0) +#define _8BASE _8TCR0 +#ifdef CONFIG_CPU_H8300H +#define _8IRQ 36 +#endif +#ifdef CONFIG_CPU_H8S +#define _8IRQ 72 +#endif +#elif defined(CONFIG_H8300_TIMER8_CH2) +#ifdef CONFIG_CPU_H8300H +#define _8BASE _8TCR2 +#define _8IRQ 40 +#endif +#endif + +#ifndef _8BASE +#error Unknown timer channel. +#endif + +#define _8TCR 0 +#define _8TCSR 2 +#define TCORA 4 +#define TCORB 6 +#define _8TCNT 8 + +#define CMIEA 0x40 +#define CCLR_CMA 0x08 +#define CKS2 0x04 + +/* + * timer_interrupt() needs to keep up the real-time clock, + * as well as call the "do_timer()" routine every clocktick + */ + +static irqreturn_t timer_interrupt(int irq, void *dev_id) +{ + h8300_timer_tick(); + ctrl_bclr(CMFA, _8BASE + _8TCSR); + return IRQ_HANDLED; +} + +static struct irqaction timer8_irq = { + .name = "timer-8", + .handler = timer_interrupt, + .flags = IRQF_DISABLED | IRQF_TIMER, + .mask = CPU_MASK_NONE, +}; + +static const int __initdata divide_rate[] = {8, 64, 8192}; + +void __init h8300_timer_setup(void) +{ + unsigned int div; + unsigned int cnt; + + calc_param(cnt, div, divide_rate, 0x10000); + div++; + + setup_irq(_8IRQ, &timer8_irq); + +#if defined(CONFIG_CPU_H8S) + /* Timer module enable */ + ctrl_bclr(0, MSTPCRL) +#endif + + /* initalize timer */ + ctrl_outw(cnt, _8BASE + TCORA); + ctrl_outw(0x0000, _8BASE + _8TCSR); + ctrl_outw((CMIEA|CCLR_CMA|CKS2) << 8 | div, + _8BASE + _8TCR); +} diff --git a/arch/h8300/kernel/timer/tpu.c b/arch/h8300/kernel/timer/tpu.c new file mode 100644 index 000000000000..df7f453a9673 --- /dev/null +++ b/arch/h8300/kernel/timer/tpu.c @@ -0,0 +1,102 @@ +/* + * linux/arch/h8300/kernel/timer/tpu.c + * + * Yoshinori Sato <ysato@users.sourceforge.jp> + * + * TPU Timer Handler + * + */ + +#include <linux/config.h> +#include <linux/errno.h> +#include <linux/sched.h> +#include <linux/kernel.h> +#include <linux/param.h> +#include <linux/string.h> +#include <linux/mm.h> +#include <linux/interrupt.h> +#include <linux/init.h> +#include <linux/timex.h> + +#include <asm/segment.h> +#include <asm/io.h> +#include <asm/irq.h> +#include <asm/regs267x.h> + +/* TPU */ +#if CONFIG_H8300_TPU_CH == 0 +#define TPUBASE 0xffffd0 +#define TPUIRQ 40 +#elif CONFIG_H8300_TPU_CH == 1 +#define TPUBASE 0xffffe0 +#define TPUIRQ 48 +#elif CONFIG_H8300_TPU_CH == 2 +#define TPUBASE 0xfffff0 +#define TPUIRQ 52 +#elif CONFIG_H8300_TPU_CH == 3 +#define TPUBASE 0xfffe80 +#define TPUIRQ 56 +#elif CONFIG_H8300_TPU_CH == 4 +#define TPUBASE 0xfffe90 +#define TPUIRQ 64 +#else +#error Unknown timer channel. +#endif + +#define _TCR 0 +#define _TMDR 1 +#define _TIOR 2 +#define _TIER 4 +#define _TSR 5 +#define _TCNT 6 +#define _GRA 8 +#define _GRB 10 + +#define CCLR0 0x20 + +static irqreturn_t timer_interrupt(int irq, void *dev_id) +{ + h8300_timer_tick(); + ctrl_bclr(0, TPUBASE + _TSR); + return IRQ_HANDLED; +} + +static struct irqaction tpu_irq = { + .name = "tpu", + .handler = timer_interrupt, + .flags = IRQF_DISABLED | IRQF_TIMER, + .mask = CPU_MASK_NONE, +}; + +const static int __initdata divide_rate[] = { +#if CONFIG_H8300_TPU_CH == 0 + 1,4,16,64,0,0,0,0, +#elif (CONFIG_H8300_TPU_CH == 1) || (CONFIG_H8300_TPU_CH == 5) + 1,4,16,64,0,0,256,0, +#elif (CONFIG_H8300_TPU_CH == 2) || (CONFIG_H8300_TPU_CH == 4) + 1,4,16,64,0,0,0,1024, +#elif CONFIG_H8300_TPU_CH == 3 + 1,4,16,64,0,1024,256,4096, +#endif +}; + +void __init h8300_timer_setup(void) +{ + unsigned int cnt; + unsigned int div; + + calc_param(cnt, div, divide_rate, 0x10000); + + setup_irq(TPUIRQ, &tpu_irq); + + /* TPU module enabled */ + ctrl_bclr(3, MSTPCRH); + + ctrl_outb(0, TSTR); + ctrl_outb(CCLR0 | div, TPUBASE + _TCR); + ctrl_outb(0, TPUBASE + _TMDR); + ctrl_outw(0, TPUBASE + _TIOR); + ctrl_outb(0x01, TPUBASE + _TIER); + ctrl_outw(cnt, TPUBASE + _GRA); + ctrl_bset(CONFIG_H8300_TPU_CH, TSTR); +} diff --git a/arch/h8300/kernel/traps.c b/arch/h8300/kernel/traps.c index f8f7d7ea97f1..3c0b66bc669e 100644 --- a/arch/h8300/kernel/traps.c +++ b/arch/h8300/kernel/traps.c @@ -20,12 +20,14 @@ #include <linux/errno.h> #include <linux/init.h> #include <linux/module.h> +#include <linux/bug.h> #include <asm/system.h> #include <asm/irq.h> #include <asm/traps.h> #include <asm/page.h> -#include <asm/gpio.h> + +static DEFINE_SPINLOCK(die_lock); /* * this must be called very early as the kernel might @@ -94,16 +96,19 @@ static void dump(struct pt_regs *fp) printk("\n\n"); } -void die_if_kernel (char *str, struct pt_regs *fp, int nr) +void die(char *str, struct pt_regs *fp, unsigned long err) { - extern int console_loglevel; + static int diecount; - if (!(fp->ccr & PS_S)) - return; + oops_enter(); - console_loglevel = 15; + console_verbose(); + spin_lock_irq(&die_lock); + report_bug(fp->pc, fp); + printk(KERN_EMERG "%s: %04lx [#%d] ", str, err & 0xffff, ++diecount); dump(fp); + spin_unlock_irq(&die_lock); do_exit(SIGSEGV); } diff --git a/arch/h8300/mm/fault.c b/arch/h8300/mm/fault.c index 29e9af9f0e6a..1d092abebf03 100644 --- a/arch/h8300/mm/fault.c +++ b/arch/h8300/mm/fault.c @@ -20,8 +20,6 @@ #include <asm/system.h> #include <asm/pgtable.h> -extern void die_if_kernel(char *, struct pt_regs *, long); - /* * This routine handles page faults. It determines the problem, and * then passes it off to one of the appropriate routines. @@ -50,7 +48,8 @@ asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address, } else printk(KERN_ALERT "Unable to handle kernel access"); printk(" at virtual address %08lx\n",address); - die_if_kernel("Oops", regs, error_code); + if (!user_mode(regs)) + die("Oops", regs, error_code); do_exit(SIGKILL); return 1; diff --git a/arch/h8300/platform/h8300h/aki3068net/Makefile b/arch/h8300/platform/h8300h/aki3068net/Makefile index b03c328f8c70..b7ff78050b7f 100644 --- a/arch/h8300/platform/h8300h/aki3068net/Makefile +++ b/arch/h8300/platform/h8300h/aki3068net/Makefile @@ -3,4 +3,3 @@ # extra-y := crt0_ram.o -obj-y := timer.o diff --git a/arch/h8300/platform/h8300h/aki3068net/timer.c b/arch/h8300/platform/h8300h/aki3068net/timer.c deleted file mode 100644 index 27cd85d56128..000000000000 --- a/arch/h8300/platform/h8300h/aki3068net/timer.c +++ /dev/null @@ -1,51 +0,0 @@ -/* - * linux/arch/h8300/platform/h8300h/aki3068net/timer.c - * - * Yoshinori Sato <ysato@users.sourcefoge.jp> - * - * Platform depend Timer Handler - * - */ - -#include <linux/errno.h> -#include <linux/sched.h> -#include <linux/kernel.h> -#include <linux/param.h> -#include <linux/string.h> -#include <linux/mm.h> -#include <linux/interrupt.h> -#include <linux/init.h> -#include <linux/timex.h> - -#include <asm/segment.h> -#include <asm/io.h> -#include <asm/irq.h> -#include <asm/regs306x.h> - -#define CMFA 6 - -#define CMIEA 0x40 -#define CCLR_CMA 0x08 -#define CLK_DIV8192 0x03 - -#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192 /* Timer input freq. */ - -void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *)) -{ - /* setup 8bit timer ch2 */ - ctrl_outb(H8300_TIMER_FREQ / HZ, TCORA2); /* set interval */ - ctrl_outb(0x00, _8TCSR2); /* no output */ - request_irq(40, timer_int, 0, "timer", 0); - ctrl_outb(CMIEA|CCLR_CMA|CLK_DIV8192, _8TCR2); /* start count */ -} - -void platform_timer_eoi(void) -{ - *(volatile unsigned char *)_8TCSR2 &= ~(1 << CMFA); -} - -void platform_gettod(int *year, int *mon, int *day, int *hour, - int *min, int *sec) -{ - *year = *mon = *day = *hour = *min = *sec = 0; -} diff --git a/arch/h8300/platform/h8300h/generic/Makefile b/arch/h8300/platform/h8300h/generic/Makefile index 32b964a9010e..2b12a170209e 100644 --- a/arch/h8300/platform/h8300h/generic/Makefile +++ b/arch/h8300/platform/h8300h/generic/Makefile @@ -3,4 +3,3 @@ # extra-y := crt0_$(MODEL).o -obj-y := timer.o diff --git a/arch/h8300/platform/h8300h/generic/timer.c b/arch/h8300/platform/h8300h/generic/timer.c deleted file mode 100644 index 6f5cefe0cceb..000000000000 --- a/arch/h8300/platform/h8300h/generic/timer.c +++ /dev/null @@ -1,95 +0,0 @@ -/* - * linux/arch/h8300/platform/h8300h/generic/timer.c - * - * Yoshinori Sato <ysato@users.sourceforge.jp> - * - * Platform depend Timer Handler - * - */ - -#include <linux/errno.h> -#include <linux/sched.h> -#include <linux/kernel.h> -#include <linux/param.h> -#include <linux/string.h> -#include <linux/mm.h> -#include <linux/interrupt.h> - -#include <asm/segment.h> -#include <asm/io.h> -#include <asm/irq.h> - -#include <linux/timex.h> - -#if defined(CONFIG_H83007) || defined(CONFIG_H83068) -#include <asm/regs306x.h> -#define CMFA 6 - -#define CMIEA 0x40 -#define CCLR_CMA 0x08 -#define CLK_DIV8192 0x03 - -#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192 /* Timer input freq. */ - -void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *)) -{ - /* setup 8bit timer ch2 */ - ctrl_outb(H8300_TIMER_FREQ / HZ, TCORA2); /* set interval */ - ctrl_outb(0x00, _8TCSR2); /* no output */ - request_irq(40, timer_int, 0, "timer", 0); - ctrl_outb(CMIEA|CCLR_CMA|CLK_DIV8192, _8TCR2); /* start count */ -} - -void platform_timer_eoi(void) -{ - *(volatile unsigned char *)_8TCSR2 &= ~(1 << CMFA); -} -#endif - -#if defined(CONFIG_H83002) || defined(CONFIG_H83048) -/* FIXME! */ -#define TSTR 0x00ffff60 -#define TSNC 0x00ffff61 -#define TMDR 0x00ffff62 -#define TFCR 0x00ffff63 -#define TOER 0x00ffff90 -#define TOCR 0x00ffff91 -/* ITU0 */ -#define TCR 0x00ffff64 -#define TIOR 0x00ffff65 -#define TIER 0x00ffff66 -#define TSR 0x00ffff67 -#define TCNT 0x00ffff68 -#define GRA 0x00ffff6a -#define GRB 0x00ffff6c - -#define CCLR_CMGRA 0x20 -#define CLK_DIV8 0x03 - -#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8 /* Timer input freq. */ - -void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *)) -{ - *(unsigned short *)GRA= H8300_TIMER_FREQ / HZ; /* set interval */ - *(unsigned short *)TCNT=0; /* clear counter */ - ctrl_outb(0x80|CCLR_CMGRA|CLK_DIV8, TCR); /* set ITU0 clock */ - ctrl_outb(0x88, TIOR); /* no output */ - request_irq(26, timer_int, 0, "timer", 0); - ctrl_outb(0xf9, TIER); /* compare match GRA interrupt */ - ctrl_outb(ctrl_inb(TSNC) & ~0x01, TSNC); /* ITU0 async */ - ctrl_outb(ctrl_inb(TMDR) & ~0x01, TMDR); /* ITU0 normal mode */ - ctrl_outb(ctrl_inb(TSTR) | 0x01, TSTR); /* ITU0 Start */ - return 0; -} - -void platform_timer_eoi(void) -{ - ctrl_outb(ctrl_inb(TSR) & ~0x01,TSR); -} -#endif - -void platform_gettod(int *year, int *mon, int *day, int *hour, - int *min, int *sec) -{ - *year = *mon = *day = *hour = *min = *sec = 0; -} diff --git a/arch/h8300/platform/h8300h/h8max/Makefile b/arch/h8300/platform/h8300h/h8max/Makefile index b03c328f8c70..b7ff78050b7f 100644 --- a/arch/h8300/platform/h8300h/h8max/Makefile +++ b/arch/h8300/platform/h8300h/h8max/Makefile @@ -3,4 +3,3 @@ # extra-y := crt0_ram.o -obj-y := timer.o diff --git a/arch/h8300/platform/h8300h/h8max/timer.c b/arch/h8300/platform/h8300h/h8max/timer.c deleted file mode 100644 index 85a574afe9d0..000000000000 --- a/arch/h8300/platform/h8300h/h8max/timer.c +++ /dev/null @@ -1,52 +0,0 @@ -/* - * linux/arch/h8300/platform/h8300h/h8max/timer.c - * - * Yoshinori Sato <ysato@users.sourcefoge.jp> - * - * Platform depend Timer Handler - * - */ - -#include <linux/errno.h> -#include <linux/sched.h> -#include <linux/kernel.h> -#include <linux/param.h> -#include <linux/string.h> -#include <linux/mm.h> -#include <linux/interrupt.h> -#include <linux/init.h> -#include <linux/timex.h> - -#include <asm/segment.h> -#include <asm/io.h> -#include <asm/irq.h> -#include <asm/regs306x.h> - -#define CMFA 6 - -#define CMIEA 0x40 -#define CCLR_CMA 0x08 -#define CLK_DIV8192 0x03 - -#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192 /* Timer input freq. */ - -void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *)) -{ - /* setup 8bit timer ch2 */ - ctrl_outb(H8300_TIMER_FREQ / HZ, TCORA2); /* set interval */ - ctrl_outb(0x00, _8TCSR2); /* no output */ - request_irq(40, timer_int, 0, "timer", 0); - ctrl_outb(CMIEA|CCLR_CMA|CLK_DIV8192, _8TCR2); /* start count */ -} - -void platform_timer_eoi(void) -{ - *(volatile unsigned char *)_8TCSR2 &= ~(1 << CMFA); -} - -void platform_gettod(int *year, int *mon, int *day, int *hour, - int *min, int *sec) -{ - *year = *mon = *day = *hour = *min = *sec = 0; -} - diff --git a/arch/h8300/platform/h8s/edosk2674/Makefile b/arch/h8300/platform/h8s/edosk2674/Makefile index f763654ac6fe..8e349723bb4f 100644 --- a/arch/h8300/platform/h8s/edosk2674/Makefile +++ b/arch/h8300/platform/h8s/edosk2674/Makefile @@ -3,4 +3,3 @@ # extra-y := crt0_$(MODEL).o -obj-y := timer.o diff --git a/arch/h8300/platform/h8s/edosk2674/timer.c b/arch/h8300/platform/h8s/edosk2674/timer.c deleted file mode 100644 index bfb1424482f4..000000000000 --- a/arch/h8300/platform/h8s/edosk2674/timer.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * linux/arch/h8300/platform/h8s/edosk2674/timer.c - * - * Yoshinori Sato <ysato@users.sourceforge.jp> - * - * Platform depend Timer Handler - * - */ - -#include <linux/errno.h> -#include <linux/sched.h> -#include <linux/kernel.h> -#include <linux/param.h> -#include <linux/string.h> -#include <linux/mm.h> -#include <linux/interrupt.h> -#include <linux/init.h> -#include <linux/timex.h> - -#include <asm/segment.h> -#include <asm/io.h> -#include <asm/irq.h> -#include <asm/regs267x.h> - -#define CMFA 6 - -#define CMIEA 0x40 -#define CCLR_CMA 0x08 -#define CLK_DIV8192 0x03 - -#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192 /* Timer input freq. */ - -void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *)) -{ - /* 8bit timer module enabled */ - ctrl_outb(ctrl_inb(MSTPCRL) & ~0x01, MSTPCRL); - /* setup 8bit timer ch1 */ - ctrl_outb(H8300_TIMER_FREQ / HZ, _8TCORA1); /* set interval */ - ctrl_outb(0x00, _8TCSR1); /* no output */ - request_irq(76, timer_int, 0, "timer" ,0); - ctrl_outb(CMIEA|CCLR_CMA|CLK_DIV8192, _8TCR1); /* start count */ -} - -void platform_timer_eoi(void) -{ - *(volatile unsigned char *)_8TCSR1 &= ~(1 << CMFA); -} - -void platform_gettod(int *year, int *mon, int *day, int *hour, - int *min, int *sec) -{ -/* FIXME! not RTC support */ - *year = *mon = *day = *hour = *min = *sec = 0; -} diff --git a/arch/h8300/platform/h8s/generic/Makefile b/arch/h8300/platform/h8s/generic/Makefile index 055d53a9811b..44b4685c664c 100644 --- a/arch/h8300/platform/h8s/generic/Makefile +++ b/arch/h8300/platform/h8s/generic/Makefile @@ -3,4 +3,3 @@ # extra-y = crt0_$(MODEL).o -obj-y := timer.o diff --git a/arch/h8300/platform/h8s/generic/timer.c b/arch/h8300/platform/h8s/generic/timer.c deleted file mode 100644 index c2211c6e79da..000000000000 --- a/arch/h8300/platform/h8s/generic/timer.c +++ /dev/null @@ -1,53 +0,0 @@ -/* - * linux/arch/h8300/platform/h8s/generic/timer.c - * - * Yoshinori Sato <ysato@users.sourceforge.jp> - * - * Platform depend Timer Handler - * - */ - -#include <linux/errno.h> -#include <linux/sched.h> -#include <linux/kernel.h> -#include <linux/param.h> -#include <linux/string.h> -#include <linux/mm.h> -#include <linux/interrupt.h> -#include <linux/init.h> -#include <linux/timex.h> - -#include <asm/segment.h> -#include <asm/io.h> -#include <asm/irq.h> -#include <asm/regs267x.h> - -#define CMFA 6 - -#define CMIEA 0x40 -#define CCLR_CMA 0x08 -#define CLK_DIV8192 0x03 - -#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192 /* Timer input freq. */ - -void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *)) -{ - /* 8bit timer module enabled */ - ctrl_outb(ctrl_inb(MSTPCRL) & ~0x01, MSTPCRL); - /* setup 8bit timer ch1 */ - ctrl_outb(H8300_TIMER_FREQ / HZ, _8TCORA1); /* set interval */ - ctrl_outb(0x00, _8TCSR1); /* no output */ - request_irq(76, timer_int, 0, "timer" ,0); - ctrl_outb(CMIEA|CCLR_CMA|CLK_DIV8192, _8TCR1); /* start count */ -} - -void platform_timer_eoi(void) -{ - *(volatile unsigned char *)_8TCSR1 &= ~(1 << CMFA); -} - -void platform_gettod(int *year, int *mon, int *day, int *hour, - int *min, int *sec) -{ - *year = *mon = *day = *hour = *min = *sec = 0; -} diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index 48e496fe1e75..3b7aa38254a8 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig @@ -60,14 +60,6 @@ config RWSEM_XCHGADD_ALGORITHM bool default y -config ARCH_HAS_ILOG2_U32 - bool - default n - -config ARCH_HAS_ILOG2_U64 - bool - default n - config HUGETLB_PAGE_SIZE_VARIABLE bool depends on HUGETLB_PAGE diff --git a/arch/ia64/ia32/ia32_entry.S b/arch/ia64/ia32/ia32_entry.S index ff88c48c5d19..53505bb04771 100644 --- a/arch/ia64/ia32/ia32_entry.S +++ b/arch/ia64/ia32/ia32_entry.S @@ -251,8 +251,8 @@ ia32_syscall_table: data8 compat_sys_setrlimit /* 75 */ data8 compat_sys_old_getrlimit data8 compat_sys_getrusage - data8 sys32_gettimeofday - data8 sys32_settimeofday + data8 compat_sys_gettimeofday + data8 compat_sys_settimeofday data8 sys32_getgroups16 /* 80 */ data8 sys32_setgroups16 data8 sys32_old_select diff --git a/arch/ia64/ia32/sys_ia32.c b/arch/ia64/ia32/sys_ia32.c index bf196cbb3796..f4430bb4bbdc 100644 --- a/arch/ia64/ia32/sys_ia32.c +++ b/arch/ia64/ia32/sys_ia32.c @@ -118,41 +118,6 @@ sys32_execve (char __user *name, compat_uptr_t __user *argv, compat_uptr_t __use return error; } -int cp_compat_stat(struct kstat *stat, struct compat_stat __user *ubuf) -{ - compat_ino_t ino; - int err; - - if ((u64) stat->size > MAX_NON_LFS || - !old_valid_dev(stat->dev) || - !old_valid_dev(stat->rdev)) - return -EOVERFLOW; - - ino = stat->ino; - if (sizeof(ino) < sizeof(stat->ino) && ino != stat->ino) - return -EOVERFLOW; - - if (clear_user(ubuf, sizeof(*ubuf))) - return -EFAULT; - - err = __put_user(old_encode_dev(stat->dev), &ubuf->st_dev); - err |= __put_user(ino, &ubuf->st_ino); - err |= __put_user(stat->mode, &ubuf->st_mode); - err |= __put_user(stat->nlink, &ubuf->st_nlink); - err |= __put_user(high2lowuid(stat->uid), &ubuf->st_uid); - err |= __put_user(high2lowgid(stat->gid), &ubuf->st_gid); - err |= __put_user(old_encode_dev(stat->rdev), &ubuf->st_rdev); - err |= __put_user(stat->size, &ubuf->st_size); - err |= __put_user(stat->atime.tv_sec, &ubuf->st_atime); - err |= __put_user(stat->atime.tv_nsec, &ubuf->st_atime_nsec); - err |= __put_user(stat->mtime.tv_sec, &ubuf->st_mtime); - err |= __put_user(stat->mtime.tv_nsec, &ubuf->st_mtime_nsec); - err |= __put_user(stat->ctime.tv_sec, &ubuf->st_ctime); - err |= __put_user(stat->ctime.tv_nsec, &ubuf->st_ctime_nsec); - err |= __put_user(stat->blksize, &ubuf->st_blksize); - err |= __put_user(stat->blocks, &ubuf->st_blocks); - return err; -} #if PAGE_SHIFT > IA32_PAGE_SHIFT @@ -1148,68 +1113,12 @@ sys32_pipe (int __user *fd) return retval; } -static inline long -get_tv32 (struct timeval *o, struct compat_timeval __user *i) -{ - return (!access_ok(VERIFY_READ, i, sizeof(*i)) || - (__get_user(o->tv_sec, &i->tv_sec) | __get_user(o->tv_usec, &i->tv_usec))); -} - -static inline long -put_tv32 (struct compat_timeval __user *o, struct timeval *i) -{ - return (!access_ok(VERIFY_WRITE, o, sizeof(*o)) || - (__put_user(i->tv_sec, &o->tv_sec) | __put_user(i->tv_usec, &o->tv_usec))); -} - asmlinkage unsigned long sys32_alarm (unsigned int seconds) { return alarm_setitimer(seconds); } -/* Translations due to time_t size differences. Which affects all - sorts of things, like timeval and itimerval. */ - -extern struct timezone sys_tz; - -asmlinkage long -sys32_gettimeofday (struct compat_timeval __user *tv, struct timezone __user *tz) -{ - if (tv) { - struct timeval ktv; - do_gettimeofday(&ktv); - if (put_tv32(tv, &ktv)) - return -EFAULT; - } - if (tz) { - if (copy_to_user(tz, &sys_tz, sizeof(sys_tz))) - return -EFAULT; - } - return 0; -} - -asmlinkage long -sys32_settimeofday (struct compat_timeval __user *tv, struct timezone __user *tz) -{ - struct timeval ktv; - struct timespec kts; - struct timezone ktz; - - if (tv) { - if (get_tv32(&ktv, tv)) - return -EFAULT; - kts.tv_sec = ktv.tv_sec; - kts.tv_nsec = ktv.tv_usec * 1000; - } - if (tz) { - if (copy_from_user(&ktz, tz, sizeof(ktz))) - return -EFAULT; - } - - return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL); -} - struct sel_arg_struct { unsigned int n; unsigned int inp; diff --git a/arch/m32r/kernel/process.c b/arch/m32r/kernel/process.c index 5be4faaf5b1c..7103d91e1a2f 100644 --- a/arch/m32r/kernel/process.c +++ b/arch/m32r/kernel/process.c @@ -11,7 +11,7 @@ #undef DEBUG_PROCESS #ifdef DEBUG_PROCESS #define DPRINTK(fmt, args...) printk("%s:%d:%s: " fmt, __FILE__, __LINE__, \ - __FUNCTION__, ##args) + __func__, ##args) #else #define DPRINTK(fmt, args...) #endif diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c index 2fefb14414b7..aa2c55e3b55f 100644 --- a/arch/mips/kernel/linux32.c +++ b/arch/mips/kernel/linux32.c @@ -63,41 +63,6 @@ #define merge_64(r1, r2) ((((r2) & 0xffffffffUL) << 32) + ((r1) & 0xffffffffUL)) #endif -/* - * Revalidate the inode. This is required for proper NFS attribute caching. - */ - -int cp_compat_stat(struct kstat *stat, struct compat_stat __user *statbuf) -{ - struct compat_stat tmp; - - if (!new_valid_dev(stat->dev) || !new_valid_dev(stat->rdev)) - return -EOVERFLOW; - - memset(&tmp, 0, sizeof(tmp)); - tmp.st_dev = new_encode_dev(stat->dev); - tmp.st_ino = stat->ino; - if (sizeof(tmp.st_ino) < sizeof(stat->ino) && tmp.st_ino != stat->ino) - return -EOVERFLOW; - tmp.st_mode = stat->mode; - tmp.st_nlink = stat->nlink; - SET_UID(tmp.st_uid, stat->uid); - SET_GID(tmp.st_gid, stat->gid); - tmp.st_rdev = new_encode_dev(stat->rdev); - tmp.st_size = stat->size; - tmp.st_atime = stat->atime.tv_sec; - tmp.st_mtime = stat->mtime.tv_sec; - tmp.st_ctime = stat->ctime.tv_sec; -#ifdef STAT_HAVE_NSEC - tmp.st_atime_nsec = stat->atime.tv_nsec; - tmp.st_mtime_nsec = stat->mtime.tv_nsec; - tmp.st_ctime_nsec = stat->ctime.tv_nsec; -#endif - tmp.st_blocks = stat->blocks; - tmp.st_blksize = stat->blksize; - return copy_to_user(statbuf, &tmp, sizeof(tmp)) ? -EFAULT : 0; -} - asmlinkage unsigned long sys32_mmap2(unsigned long addr, unsigned long len, unsigned long prot, unsigned long flags, unsigned long fd, unsigned long pgoff) @@ -168,72 +133,6 @@ asmlinkage long sys32_ftruncate64(unsigned int fd, unsigned long __dummy, return sys_ftruncate(fd, merge_64(a2, a3)); } -static inline long -get_tv32(struct timeval *o, struct compat_timeval __user *i) -{ - return (!access_ok(VERIFY_READ, i, sizeof(*i)) || - (__get_user(o->tv_sec, &i->tv_sec) | - __get_user(o->tv_usec, &i->tv_usec))); -} - -static inline long -put_tv32(struct compat_timeval __user *o, struct timeval *i) -{ - return (!access_ok(VERIFY_WRITE, o, sizeof(*o)) || - (__put_user(i->tv_sec, &o->tv_sec) | - __put_user(i->tv_usec, &o->tv_usec))); -} - -extern struct timezone sys_tz; - -asmlinkage int -sys32_gettimeofday(struct compat_timeval __user *tv, struct timezone __user *tz) -{ - if (tv) { - struct timeval ktv; - do_gettimeofday(&ktv); - if (put_tv32(tv, &ktv)) - return -EFAULT; - } - if (tz) { - if (copy_to_user(tz, &sys_tz, sizeof(sys_tz))) - return -EFAULT; - } - return 0; -} - -static inline long get_ts32(struct timespec *o, struct compat_timeval __user *i) -{ - long usec; - - if (!access_ok(VERIFY_READ, i, sizeof(*i))) - return -EFAULT; - if (__get_user(o->tv_sec, &i->tv_sec)) - return -EFAULT; - if (__get_user(usec, &i->tv_usec)) - return -EFAULT; - o->tv_nsec = usec * 1000; - return 0; -} - -asmlinkage int -sys32_settimeofday(struct compat_timeval __user *tv, struct timezone __user *tz) -{ - struct timespec kts; - struct timezone ktz; - - if (tv) { - if (get_ts32(&kts, tv)) - return -EFAULT; - } - if (tz) { - if (copy_from_user(&ktz, tz, sizeof(ktz))) - return -EFAULT; - } - - return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL); -} - asmlinkage int sys32_llseek(unsigned int fd, unsigned int offset_high, unsigned int offset_low, loff_t __user * result, unsigned int origin) diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index 324c5499dec2..e266b3aa6560 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S @@ -214,7 +214,7 @@ EXPORT(sysn32_call_table) PTR sys_fchown PTR sys_lchown PTR sys_umask - PTR sys32_gettimeofday + PTR compat_sys_gettimeofday PTR compat_sys_getrlimit /* 6095 */ PTR compat_sys_getrusage PTR compat_sys_sysinfo @@ -279,7 +279,7 @@ EXPORT(sysn32_call_table) PTR sys_chroot PTR sys_sync PTR sys_acct - PTR sys32_settimeofday + PTR compat_sys_settimeofday PTR compat_sys_mount /* 6160 */ PTR sys_umount PTR sys_swapon diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index 85fedac99a57..6c7ef8313ebd 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S @@ -283,8 +283,8 @@ sys_call_table: PTR compat_sys_setrlimit /* 4075 */ PTR compat_sys_getrlimit PTR compat_sys_getrusage - PTR sys32_gettimeofday - PTR sys32_settimeofday + PTR compat_sys_gettimeofday + PTR compat_sys_settimeofday PTR sys_getgroups /* 4080 */ PTR sys_setgroups PTR sys_ni_syscall /* old_select */ diff --git a/arch/mips/lasat/sysctl.c b/arch/mips/lasat/sysctl.c index 866881ec0cf8..8f88886feb12 100644 --- a/arch/mips/lasat/sysctl.c +++ b/arch/mips/lasat/sysctl.c @@ -38,14 +38,13 @@ #endif /* Strategy function to write EEPROM after changing string entry */ -int sysctl_lasatstring(ctl_table *table, int *name, int nlen, +int sysctl_lasatstring(ctl_table *table, void *oldval, size_t *oldlenp, void *newval, size_t newlen) { int r; - r = sysctl_string(table, name, - nlen, oldval, oldlenp, newval, newlen); + r = sysctl_string(table, oldval, oldlenp, newval, newlen); if (r < 0) return r; @@ -113,13 +112,13 @@ int proc_dolasatrtc(ctl_table *table, int write, struct file *filp, #endif /* Sysctl for setting the IP addresses */ -int sysctl_lasat_intvec(ctl_table *table, int *name, int nlen, +int sysctl_lasat_intvec(ctl_table *table, void *oldval, size_t *oldlenp, void *newval, size_t newlen) { int r; - r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen); + r = sysctl_intvec(table, oldval, oldlenp, newval, newlen); if (r < 0) return r; @@ -131,7 +130,7 @@ int sysctl_lasat_intvec(ctl_table *table, int *name, int nlen, #ifdef CONFIG_DS1603 /* Same for RTC */ -int sysctl_lasat_rtc(ctl_table *table, int *name, int nlen, +int sysctl_lasat_rtc(ctl_table *table, void *oldval, size_t *oldlenp, void *newval, size_t newlen) { @@ -140,7 +139,7 @@ int sysctl_lasat_rtc(ctl_table *table, int *name, int nlen, rtctmp = read_persistent_clock(); if (rtctmp < 0) rtctmp = 0; - r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen); + r = sysctl_intvec(table, oldval, oldlenp, newval, newlen); if (r < 0) return r; if (newval && newlen) @@ -211,13 +210,13 @@ int proc_lasat_ip(ctl_table *table, int write, struct file *filp, } #endif -static int sysctl_lasat_prid(ctl_table *table, int *name, int nlen, +static int sysctl_lasat_prid(ctl_table *table, void *oldval, size_t *oldlenp, void *newval, size_t newlen) { int r; - r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen); + r = sysctl_intvec(table, oldval, oldlenp, newval, newlen); if (r < 0) return r; if (newval && newlen) { diff --git a/arch/parisc/kernel/sys_parisc32.c b/arch/parisc/kernel/sys_parisc32.c index 71efd6a28e2a..0838155b7a88 100644 --- a/arch/parisc/kernel/sys_parisc32.c +++ b/arch/parisc/kernel/sys_parisc32.c @@ -179,111 +179,6 @@ asmlinkage long sys32_sched_rr_get_interval(pid_t pid, return ret; } -static int -put_compat_timeval(struct compat_timeval __user *u, struct timeval *t) -{ - struct compat_timeval t32; - t32.tv_sec = t->tv_sec; - t32.tv_usec = t->tv_usec; - return copy_to_user(u, &t32, sizeof t32); -} - -static inline long get_ts32(struct timespec *o, struct compat_timeval __user *i) -{ - long usec; - - if (__get_user(o->tv_sec, &i->tv_sec)) - return -EFAULT; - if (__get_user(usec, &i->tv_usec)) - return -EFAULT; - o->tv_nsec = usec * 1000; - return 0; -} - -asmlinkage int -sys32_gettimeofday(struct compat_timeval __user *tv, struct timezone __user *tz) -{ - extern void do_gettimeofday(struct timeval *tv); - - if (tv) { - struct timeval ktv; - do_gettimeofday(&ktv); - if (put_compat_timeval(tv, &ktv)) - return -EFAULT; - } - if (tz) { - extern struct timezone sys_tz; - if (copy_to_user(tz, &sys_tz, sizeof(sys_tz))) - return -EFAULT; - } - return 0; -} - -asmlinkage -int sys32_settimeofday(struct compat_timeval __user *tv, struct timezone __user *tz) -{ - struct timespec kts; - struct timezone ktz; - - if (tv) { - if (get_ts32(&kts, tv)) - return -EFAULT; - } - if (tz) { - if (copy_from_user(&ktz, tz, sizeof(ktz))) - return -EFAULT; - } - - return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL); -} - -int cp_compat_stat(struct kstat *stat, struct compat_stat __user *statbuf) -{ - compat_ino_t ino; - int err; - - if (stat->size > MAX_NON_LFS || !new_valid_dev(stat->dev) || - !new_valid_dev(stat->rdev)) - return -EOVERFLOW; - - ino = stat->ino; - if (sizeof(ino) < sizeof(stat->ino) && ino != stat->ino) - return -EOVERFLOW; - - err = put_user(new_encode_dev(stat->dev), &statbuf->st_dev); - err |= put_user(ino, &statbuf->st_ino); - err |= put_user(stat->mode, &statbuf->st_mode); - err |= put_user(stat->nlink, &statbuf->st_nlink); - err |= put_user(0, &statbuf->st_reserved1); - err |= put_user(0, &statbuf->st_reserved2); - err |= put_user(new_encode_dev(stat->rdev), &statbuf->st_rdev); - err |= put_user(stat->size, &statbuf->st_size); - err |= put_user(stat->atime.tv_sec, &statbuf->st_atime); - err |= put_user(stat->atime.tv_nsec, &statbuf->st_atime_nsec); - err |= put_user(stat->mtime.tv_sec, &statbuf->st_mtime); - err |= put_user(stat->mtime.tv_nsec, &statbuf->st_mtime_nsec); - err |= put_user(stat->ctime.tv_sec, &statbuf->st_ctime); - err |= put_user(stat->ctime.tv_nsec, &statbuf->st_ctime_nsec); - err |= put_user(stat->blksize, &statbuf->st_blksize); - err |= put_user(stat->blocks, &statbuf->st_blocks); - err |= put_user(0, &statbuf->__unused1); - err |= put_user(0, &statbuf->__unused2); - err |= put_user(0, &statbuf->__unused3); - err |= put_user(0, &statbuf->__unused4); - err |= put_user(0, &statbuf->__unused5); - err |= put_user(0, &statbuf->st_fstype); /* not avail */ - err |= put_user(0, &statbuf->st_realdev); /* not avail */ - err |= put_user(0, &statbuf->st_basemode); /* not avail */ - err |= put_user(0, &statbuf->st_spareshort); - err |= put_user(stat->uid, &statbuf->st_uid); - err |= put_user(stat->gid, &statbuf->st_gid); - err |= put_user(0, &statbuf->st_spare4[0]); - err |= put_user(0, &statbuf->st_spare4[1]); - err |= put_user(0, &statbuf->st_spare4[2]); - - return err; -} - /*** copied from mips64 ***/ /* * Ooo, nasty. We need here to frob 32-bit unsigned longs to diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S index 6b5ac38f5a99..c7e59f548817 100644 --- a/arch/parisc/kernel/syscall_table.S +++ b/arch/parisc/kernel/syscall_table.S @@ -149,8 +149,8 @@ ENTRY_COMP(getrlimit) ENTRY_COMP(getrusage) /* struct timeval and timezone are maybe?? consistent wide and narrow */ - ENTRY_DIFF(gettimeofday) - ENTRY_DIFF(settimeofday) + ENTRY_COMP(gettimeofday) + ENTRY_COMP(settimeofday) ENTRY_SAME(getgroups) /* 80 */ ENTRY_SAME(setgroups) /* struct socketaddr... */ diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c index 550a19399bfa..ea1ba89f9c90 100644 --- a/arch/powerpc/kernel/iommu.c +++ b/arch/powerpc/kernel/iommu.c @@ -51,17 +51,6 @@ static int protect4gb = 1; static void __iommu_free(struct iommu_table *, dma_addr_t, unsigned int); -static inline unsigned long iommu_num_pages(unsigned long vaddr, - unsigned long slen) -{ - unsigned long npages; - - npages = IOMMU_PAGE_ALIGN(vaddr + slen) - (vaddr & IOMMU_PAGE_MASK); - npages >>= IOMMU_PAGE_SHIFT; - - return npages; -} - static int __init setup_protect4gb(char *str) { if (strcmp(str, "on") == 0) @@ -325,7 +314,7 @@ int iommu_map_sg(struct device *dev, struct iommu_table *tbl, } /* Allocate iommu entries for that segment */ vaddr = (unsigned long) sg_virt(s); - npages = iommu_num_pages(vaddr, slen); + npages = iommu_num_pages(vaddr, slen, IOMMU_PAGE_SIZE); align = 0; if (IOMMU_PAGE_SHIFT < PAGE_SHIFT && slen >= PAGE_SIZE && (vaddr & ~PAGE_MASK) == 0) @@ -418,7 +407,8 @@ int iommu_map_sg(struct device *dev, struct iommu_table *tbl, unsigned long vaddr, npages; vaddr = s->dma_address & IOMMU_PAGE_MASK; - npages = iommu_num_pages(s->dma_address, s->dma_length); + npages = iommu_num_pages(s->dma_address, s->dma_length, + IOMMU_PAGE_SIZE); __iommu_free(tbl, vaddr, npages); s->dma_address = DMA_ERROR_CODE; s->dma_length = 0; @@ -452,7 +442,8 @@ void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist, if (sg->dma_length == 0) break; - npages = iommu_num_pages(dma_handle, sg->dma_length); + npages = iommu_num_pages(dma_handle, sg->dma_length, + IOMMU_PAGE_SIZE); __iommu_free(tbl, dma_handle, npages); sg = sg_next(sg); } @@ -584,7 +575,7 @@ dma_addr_t iommu_map_single(struct device *dev, struct iommu_table *tbl, BUG_ON(direction == DMA_NONE); uaddr = (unsigned long)vaddr; - npages = iommu_num_pages(uaddr, size); + npages = iommu_num_pages(uaddr, size, IOMMU_PAGE_SIZE); if (tbl) { align = 0; @@ -617,7 +608,7 @@ void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle, BUG_ON(direction == DMA_NONE); if (tbl) { - npages = iommu_num_pages(dma_handle, size); + npages = iommu_num_pages(dma_handle, size, IOMMU_PAGE_SIZE); iommu_free(tbl, dma_handle, npages); } } diff --git a/arch/powerpc/kernel/sys_ppc32.c b/arch/powerpc/kernel/sys_ppc32.c index ff7de7b0797e..bb1cfcfdbbbb 100644 --- a/arch/powerpc/kernel/sys_ppc32.c +++ b/arch/powerpc/kernel/sys_ppc32.c @@ -61,42 +61,6 @@ asmlinkage long ppc32_select(u32 n, compat_ulong_t __user *inp, return compat_sys_select((int)n, inp, outp, exp, compat_ptr(tvp_x)); } -int cp_compat_stat(struct kstat *stat, struct compat_stat __user *statbuf) -{ - compat_ino_t ino; - long err; - - if (stat->size > MAX_NON_LFS || !new_valid_dev(stat->dev) || - !new_valid_dev(stat->rdev)) - return -EOVERFLOW; - - ino = stat->ino; - if (sizeof(ino) < sizeof(stat->ino) && ino != stat->ino) - return -EOVERFLOW; - - err = access_ok(VERIFY_WRITE, statbuf, sizeof(*statbuf)) ? 0 : -EFAULT; - err |= __put_user(new_encode_dev(stat->dev), &statbuf->st_dev); - err |= __put_user(ino, &statbuf->st_ino); - err |= __put_user(stat->mode, &statbuf->st_mode); - err |= __put_user(stat->nlink, &statbuf->st_nlink); - err |= __put_user(stat->uid, &statbuf->st_uid); - err |= __put_user(stat->gid, &statbuf->st_gid); - err |= __put_user(new_encode_dev(stat->rdev), &statbuf->st_rdev); - err |= __put_user(stat->size, &statbuf->st_size); - err |= __put_user(stat->atime.tv_sec, &statbuf->st_atime); - err |= __put_user(stat->atime.tv_nsec, &statbuf->st_atime_nsec); - err |= __put_user(stat->mtime.tv_sec, &statbuf->st_mtime); - err |= __put_user(stat->mtime.tv_nsec, &statbuf->st_mtime_nsec); - err |= __put_user(stat->ctime.tv_sec, &statbuf->st_ctime); - err |= __put_user(stat->ctime.tv_nsec, &statbuf->st_ctime_nsec); - err |= __put_user(stat->blksize, &statbuf->st_blksize); - err |= __put_user(stat->blocks, &statbuf->st_blocks); - err |= __put_user(0, &statbuf->__unused4[0]); - err |= __put_user(0, &statbuf->__unused4[1]); - - return err; -} - /* Note: it is necessary to treat option as an unsigned int, * with the corresponding cast to a signed int to insure that the * proper conversion (sign extension) between the register representation of a signed int (msr in 32-bit mode) @@ -107,69 +71,6 @@ asmlinkage long compat_sys_sysfs(u32 option, u32 arg1, u32 arg2) return sys_sysfs((int)option, arg1, arg2); } -static inline long get_ts32(struct timespec *o, struct compat_timeval __user *i) -{ - long usec; - - if (!access_ok(VERIFY_READ, i, sizeof(*i))) - return -EFAULT; - if (__get_user(o->tv_sec, &i->tv_sec)) - return -EFAULT; - if (__get_user(usec, &i->tv_usec)) - return -EFAULT; - o->tv_nsec = usec * 1000; - return 0; -} - -static inline long put_tv32(struct compat_timeval __user *o, struct timeval *i) -{ - return (!access_ok(VERIFY_WRITE, o, sizeof(*o)) || - (__put_user(i->tv_sec, &o->tv_sec) | - __put_user(i->tv_usec, &o->tv_usec))); -} - - - - -/* Translations due to time_t size differences. Which affects all - sorts of things, like timeval and itimerval. */ -extern struct timezone sys_tz; - -asmlinkage long compat_sys_gettimeofday(struct compat_timeval __user *tv, struct timezone __user *tz) -{ - if (tv) { - struct timeval ktv; - do_gettimeofday(&ktv); - if (put_tv32(tv, &ktv)) - return -EFAULT; - } - if (tz) { - if (copy_to_user(tz, &sys_tz, sizeof(sys_tz))) - return -EFAULT; - } - - return 0; -} - - - -asmlinkage long compat_sys_settimeofday(struct compat_timeval __user *tv, struct timezone __user *tz) -{ - struct timespec kts; - struct timezone ktz; - - if (tv) { - if (get_ts32(&kts, tv)) - return -EFAULT; - } - if (tz) { - if (copy_from_user(&ktz, tz, sizeof(ktz))) - return -EFAULT; - } - - return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL); -} - #ifdef CONFIG_SYSVIPC long compat_sys_ipc(u32 call, u32 first, u32 second, u32 third, compat_uptr_t ptr, u32 fifth) diff --git a/arch/s390/kernel/compat_linux.c b/arch/s390/kernel/compat_linux.c index 98e246dc0233..4646382af34f 100644 --- a/arch/s390/kernel/compat_linux.c +++ b/arch/s390/kernel/compat_linux.c @@ -279,22 +279,6 @@ asmlinkage long sys32_getegid16(void) return high2lowgid(current->egid); } -/* 32-bit timeval and related flotsam. */ - -static inline long get_tv32(struct timeval *o, struct compat_timeval __user *i) -{ - return (!access_ok(VERIFY_READ, o, sizeof(*o)) || - (__get_user(o->tv_sec, &i->tv_sec) || - __get_user(o->tv_usec, &i->tv_usec))); -} - -static inline long put_tv32(struct compat_timeval __user *o, struct timeval *i) -{ - return (!access_ok(VERIFY_WRITE, o, sizeof(*o)) || - (__put_user(i->tv_sec, &o->tv_sec) || - __put_user(i->tv_usec, &o->tv_usec))); -} - /* * sys32_ipc() is the de-multiplexer for the SysV IPC calls in 32bit emulation. * @@ -362,41 +346,6 @@ asmlinkage long sys32_ftruncate64(unsigned int fd, unsigned long high, unsigned return sys_ftruncate(fd, (high << 32) | low); } -int cp_compat_stat(struct kstat *stat, struct compat_stat __user *statbuf) -{ - compat_ino_t ino; - int err; - - if (!old_valid_dev(stat->dev) || !old_valid_dev(stat->rdev)) - return -EOVERFLOW; - - ino = stat->ino; - if (sizeof(ino) < sizeof(stat->ino) && ino != stat->ino) - return -EOVERFLOW; - - err = put_user(old_encode_dev(stat->dev), &statbuf->st_dev); - err |= put_user(stat->ino, &statbuf->st_ino); - err |= put_user(stat->mode, &statbuf->st_mode); - err |= put_user(stat->nlink, &statbuf->st_nlink); - err |= put_user(high2lowuid(stat->uid), &statbuf->st_uid); - err |= put_user(high2lowgid(stat->gid), &statbuf->st_gid); - err |= put_user(old_encode_dev(stat->rdev), &statbuf->st_rdev); - err |= put_user(stat->size, &statbuf->st_size); - err |= put_user(stat->atime.tv_sec, &statbuf->st_atime); - err |= put_user(stat->atime.tv_nsec, &statbuf->st_atime_nsec); - err |= put_user(stat->mtime.tv_sec, &statbuf->st_mtime); - err |= put_user(stat->mtime.tv_nsec, &statbuf->st_mtime_nsec); - err |= put_user(stat->ctime.tv_sec, &statbuf->st_ctime); - err |= put_user(stat->ctime.tv_nsec, &statbuf->st_ctime_nsec); - err |= put_user(stat->blksize, &statbuf->st_blksize); - err |= put_user(stat->blocks, &statbuf->st_blocks); -/* fixme - err |= put_user(0, &statbuf->__unused4[0]); - err |= put_user(0, &statbuf->__unused4[1]); -*/ - return err; -} - asmlinkage long sys32_sched_rr_get_interval(compat_pid_t pid, struct compat_timespec __user *interval) { @@ -557,57 +506,6 @@ sys32_delete_module(const char __user *name_user, unsigned int flags) #endif /* CONFIG_MODULES */ -/* Translations due to time_t size differences. Which affects all - sorts of things, like timeval and itimerval. */ - -extern struct timezone sys_tz; - -asmlinkage long sys32_gettimeofday(struct compat_timeval __user *tv, struct timezone __user *tz) -{ - if (tv) { - struct timeval ktv; - do_gettimeofday(&ktv); - if (put_tv32(tv, &ktv)) - return -EFAULT; - } - if (tz) { - if (copy_to_user(tz, &sys_tz, sizeof(sys_tz))) - return -EFAULT; - } - return 0; -} - -static inline long get_ts32(struct timespec *o, struct compat_timeval __user *i) -{ - long usec; - - if (!access_ok(VERIFY_READ, i, sizeof(*i))) - return -EFAULT; - if (__get_user(o->tv_sec, &i->tv_sec)) - return -EFAULT; - if (__get_user(usec, &i->tv_usec)) - return -EFAULT; - o->tv_nsec = usec * 1000; - return 0; -} - -asmlinkage long sys32_settimeofday(struct compat_timeval __user *tv, struct timezone __user *tz) -{ - struct timespec kts; - struct timezone ktz; - - if (tv) { - if (get_ts32(&kts, tv)) - return -EFAULT; - } - if (tz) { - if (copy_from_user(&ktz, tz, sizeof(ktz))) - return -EFAULT; - } - - return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL); -} - asmlinkage long sys32_pread64(unsigned int fd, char __user *ubuf, size_t count, u32 poshi, u32 poslo) { diff --git a/arch/s390/kernel/compat_linux.h b/arch/s390/kernel/compat_linux.h index 05f8516366ab..836a28842900 100644 --- a/arch/s390/kernel/compat_linux.h +++ b/arch/s390/kernel/compat_linux.h @@ -202,10 +202,6 @@ long sys32_execve(void); long sys32_init_module(void __user *umod, unsigned long len, const char __user *uargs); long sys32_delete_module(const char __user *name_user, unsigned int flags); -long sys32_gettimeofday(struct compat_timeval __user *tv, - struct timezone __user *tz); -long sys32_settimeofday(struct compat_timeval __user *tv, - struct timezone __user *tz); long sys32_pread64(unsigned int fd, char __user *ubuf, size_t count, u32 poshi, u32 poslo); long sys32_pwrite64(unsigned int fd, const char __user *ubuf, diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S index ee51ca9e23b5..fc2c97197a53 100644 --- a/arch/s390/kernel/compat_wrapper.S +++ b/arch/s390/kernel/compat_wrapper.S @@ -332,17 +332,17 @@ compat_sys_getrusage_wrapper: llgtr %r3,%r3 # struct rusage_emu31 * jg compat_sys_getrusage # branch to system call - .globl sys32_gettimeofday_wrapper -sys32_gettimeofday_wrapper: + .globl compat_sys_gettimeofday_wrapper +compat_sys_gettimeofday_wrapper: llgtr %r2,%r2 # struct timeval_emu31 * llgtr %r3,%r3 # struct timezone * - jg sys32_gettimeofday # branch to system call + jg compat_sys_gettimeofday # branch to system call - .globl sys32_settimeofday_wrapper -sys32_settimeofday_wrapper: + .globl compat_sys_settimeofday_wrapper +compat_sys_settimeofday_wrapper: llgtr %r2,%r2 # struct timeval_emu31 * llgtr %r3,%r3 # struct timezone * - jg sys32_settimeofday # branch to system call + jg compat_sys_settimeofday # branch to system call .globl sys32_getgroups16_wrapper sys32_getgroups16_wrapper: diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S index 3ae303914b42..2d61787949d5 100644 --- a/arch/s390/kernel/syscalls.S +++ b/arch/s390/kernel/syscalls.S @@ -86,8 +86,8 @@ SYSCALL(sys_sethostname,sys_sethostname,sys32_sethostname_wrapper) SYSCALL(sys_setrlimit,sys_setrlimit,compat_sys_setrlimit_wrapper) /* 75 */ SYSCALL(sys_old_getrlimit,sys_getrlimit,compat_sys_old_getrlimit_wrapper) SYSCALL(sys_getrusage,sys_getrusage,compat_sys_getrusage_wrapper) -SYSCALL(sys_gettimeofday,sys_gettimeofday,sys32_gettimeofday_wrapper) -SYSCALL(sys_settimeofday,sys_settimeofday,sys32_settimeofday_wrapper) +SYSCALL(sys_gettimeofday,sys_gettimeofday,compat_sys_gettimeofday_wrapper) +SYSCALL(sys_settimeofday,sys_settimeofday,compat_sys_settimeofday_wrapper) SYSCALL(sys_getgroups16,sys_ni_syscall,sys32_getgroups16_wrapper) /* 80 old getgroups16 syscall */ SYSCALL(sys_setgroups16,sys_ni_syscall,sys32_setgroups16_wrapper) /* old setgroups16 syscall */ NI_SYSCALL /* old select syscall */ diff --git a/arch/sparc64/kernel/iommu.c b/arch/sparc64/kernel/iommu.c index 2a37a6ca2a16..1cc1995531e2 100644 --- a/arch/sparc64/kernel/iommu.c +++ b/arch/sparc64/kernel/iommu.c @@ -575,7 +575,7 @@ static int dma_4u_map_sg(struct device *dev, struct scatterlist *sglist, } /* Allocate iommu entries for that segment */ paddr = (unsigned long) SG_ENT_PHYS_ADDRESS(s); - npages = iommu_num_pages(paddr, slen); + npages = iommu_num_pages(paddr, slen, IO_PAGE_SIZE); entry = iommu_range_alloc(dev, iommu, npages, &handle); /* Handle failure */ @@ -647,7 +647,8 @@ iommu_map_failed: iopte_t *base; vaddr = s->dma_address & IO_PAGE_MASK; - npages = iommu_num_pages(s->dma_address, s->dma_length); + npages = iommu_num_pages(s->dma_address, s->dma_length, + IO_PAGE_SIZE); iommu_range_free(iommu, vaddr, npages); entry = (vaddr - iommu->page_table_map_base) @@ -715,7 +716,7 @@ static void dma_4u_unmap_sg(struct device *dev, struct scatterlist *sglist, if (!len) break; - npages = iommu_num_pages(dma_handle, len); + npages = iommu_num_pages(dma_handle, len, IO_PAGE_SIZE); iommu_range_free(iommu, dma_handle, npages); entry = ((dma_handle - iommu->page_table_map_base) diff --git a/arch/sparc64/kernel/iommu_common.h b/arch/sparc64/kernel/iommu_common.h index 53b19c8231a9..591f5879039c 100644 --- a/arch/sparc64/kernel/iommu_common.h +++ b/arch/sparc64/kernel/iommu_common.h @@ -35,17 +35,6 @@ #define SG_ENT_PHYS_ADDRESS(SG) (__pa(sg_virt((SG)))) -static inline unsigned long iommu_num_pages(unsigned long vaddr, - unsigned long slen) -{ - unsigned long npages; - - npages = IO_PAGE_ALIGN(vaddr + slen) - (vaddr & IO_PAGE_MASK); - npages >>= IO_PAGE_SHIFT; - - return npages; -} - static inline int is_span_boundary(unsigned long entry, unsigned long shift, unsigned long boundary_size, @@ -53,7 +42,8 @@ static inline int is_span_boundary(unsigned long entry, struct scatterlist *sg) { unsigned long paddr = SG_ENT_PHYS_ADDRESS(outs); - int nr = iommu_num_pages(paddr, outs->dma_length + sg->length); + int nr = iommu_num_pages(paddr, outs->dma_length + sg->length, + IO_PAGE_SIZE); return iommu_is_span_boundary(entry, nr, shift, boundary_size); } diff --git a/arch/sparc64/kernel/pci_sun4v.c b/arch/sparc64/kernel/pci_sun4v.c index e86c73ec167b..34a1fded3941 100644 --- a/arch/sparc64/kernel/pci_sun4v.c +++ b/arch/sparc64/kernel/pci_sun4v.c @@ -384,7 +384,7 @@ static int dma_4v_map_sg(struct device *dev, struct scatterlist *sglist, } /* Allocate iommu entries for that segment */ paddr = (unsigned long) SG_ENT_PHYS_ADDRESS(s); - npages = iommu_num_pages(paddr, slen); + npages = iommu_num_pages(paddr, slen, IO_PAGE_SIZE); entry = iommu_range_alloc(dev, iommu, npages, &handle); /* Handle failure */ @@ -461,7 +461,8 @@ iommu_map_failed: unsigned long vaddr, npages; vaddr = s->dma_address & IO_PAGE_MASK; - npages = iommu_num_pages(s->dma_address, s->dma_length); + npages = iommu_num_pages(s->dma_address, s->dma_length, + IO_PAGE_SIZE); iommu_range_free(iommu, vaddr, npages); /* XXX demap? XXX */ s->dma_address = DMA_ERROR_CODE; @@ -500,7 +501,7 @@ static void dma_4v_unmap_sg(struct device *dev, struct scatterlist *sglist, if (!len) break; - npages = iommu_num_pages(dma_handle, len); + npages = iommu_num_pages(dma_handle, len, IO_PAGE_SIZE); iommu_range_free(iommu, dma_handle, npages); entry = ((dma_handle - iommu->page_table_map_base) >> IO_PAGE_SHIFT); diff --git a/arch/sparc64/kernel/sys_sparc32.c b/arch/sparc64/kernel/sys_sparc32.c index 3320c9d0075f..e800503879e4 100644 --- a/arch/sparc64/kernel/sys_sparc32.c +++ b/arch/sparc64/kernel/sys_sparc32.c @@ -58,15 +58,6 @@ #include <asm/mmu_context.h> #include <asm/compat_signal.h> -/* 32-bit timeval and related flotsam. */ - -static inline long put_tv32(struct compat_timeval __user *o, struct timeval *i) -{ - return (!access_ok(VERIFY_WRITE, o, sizeof(*o)) || - (__put_user(i->tv_sec, &o->tv_sec) | - __put_user(i->tv_usec, &o->tv_usec))); -} - #ifdef CONFIG_SYSVIPC asmlinkage long compat_sys_ipc(u32 call, u32 first, u32 second, u32 third, compat_uptr_t ptr, u32 fifth) { @@ -148,41 +139,6 @@ asmlinkage long sys32_ftruncate64(unsigned int fd, unsigned long high, unsigned return sys_ftruncate(fd, (high << 32) | low); } -int cp_compat_stat(struct kstat *stat, struct compat_stat __user *statbuf) -{ - compat_ino_t ino; - int err; - - if (stat->size > MAX_NON_LFS || !old_valid_dev(stat->dev) || - !old_valid_dev(stat->rdev)) - return -EOVERFLOW; - - ino = stat->ino; - if (sizeof(ino) < sizeof(stat->ino) && ino != stat->ino) - return -EOVERFLOW; - - err = put_user(old_encode_dev(stat->dev), &statbuf->st_dev); - err |= put_user(stat->ino, &statbuf->st_ino); - err |= put_user(stat->mode, &statbuf->st_mode); - err |= put_user(stat->nlink, &statbuf->st_nlink); - err |= put_user(high2lowuid(stat->uid), &statbuf->st_uid); - err |= put_user(high2lowgid(stat->gid), &statbuf->st_gid); - err |= put_user(old_encode_dev(stat->rdev), &statbuf->st_rdev); - err |= put_user(stat->size, &statbuf->st_size); - err |= put_user(stat->atime.tv_sec, &statbuf->st_atime); - err |= put_user(stat->atime.tv_nsec, &statbuf->st_atime_nsec); - err |= put_user(stat->mtime.tv_sec, &statbuf->st_mtime); - err |= put_user(stat->mtime.tv_nsec, &statbuf->st_mtime_nsec); - err |= put_user(stat->ctime.tv_sec, &statbuf->st_ctime); - err |= put_user(stat->ctime.tv_nsec, &statbuf->st_ctime_nsec); - err |= put_user(stat->blksize, &statbuf->st_blksize); - err |= put_user(stat->blocks, &statbuf->st_blocks); - err |= put_user(0, &statbuf->__unused4[0]); - err |= put_user(0, &statbuf->__unused4[1]); - - return err; -} - static int cp_compat_stat64(struct kstat *stat, struct compat_stat64 __user *statbuf) { @@ -522,59 +478,6 @@ asmlinkage long sys32_delete_module(const char __user *name_user) #endif /* CONFIG_MODULES */ -/* Translations due to time_t size differences. Which affects all - sorts of things, like timeval and itimerval. */ - -extern struct timezone sys_tz; - -asmlinkage long sys32_gettimeofday(struct compat_timeval __user *tv, - struct timezone __user *tz) -{ - if (tv) { - struct timeval ktv; - do_gettimeofday(&ktv); - if (put_tv32(tv, &ktv)) - return -EFAULT; - } - if (tz) { - if (copy_to_user(tz, &sys_tz, sizeof(sys_tz))) - return -EFAULT; - } - return 0; -} - -static inline long get_ts32(struct timespec *o, struct compat_timeval __user *i) -{ - long usec; - - if (!access_ok(VERIFY_READ, i, sizeof(*i))) - return -EFAULT; - if (__get_user(o->tv_sec, &i->tv_sec)) - return -EFAULT; - if (__get_user(usec, &i->tv_usec)) - return -EFAULT; - o->tv_nsec = usec * 1000; - return 0; -} - -asmlinkage long sys32_settimeofday(struct compat_timeval __user *tv, - struct timezone __user *tz) -{ - struct timespec kts; - struct timezone ktz; - - if (tv) { - if (get_ts32(&kts, tv)) - return -EFAULT; - } - if (tz) { - if (copy_from_user(&ktz, tz, sizeof(ktz))) - return -EFAULT; - } - - return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL); -} - asmlinkage compat_ssize_t sys32_pread64(unsigned int fd, char __user *ubuf, compat_size_t count, diff --git a/arch/sparc64/kernel/systbls.S b/arch/sparc64/kernel/systbls.S index 5daee4b04dd5..b2fa4c163638 100644 --- a/arch/sparc64/kernel/systbls.S +++ b/arch/sparc64/kernel/systbls.S @@ -41,8 +41,8 @@ sys_call_table32: /*100*/ .word sys32_getpriority, sys32_rt_sigreturn, sys32_rt_sigaction, sys32_rt_sigprocmask, sys32_rt_sigpending .word compat_sys_rt_sigtimedwait, sys32_rt_sigqueueinfo, compat_sys_rt_sigsuspend, sys_setresuid, sys_getresuid /*110*/ .word sys_setresgid, sys_getresgid, sys_setregid, sys_nis_syscall, sys_nis_syscall - .word sys32_getgroups, sys32_gettimeofday, sys32_getrusage, sys_nis_syscall, sys_getcwd -/*120*/ .word compat_sys_readv, compat_sys_writev, sys32_settimeofday, sys_fchown16, sys_fchmod + .word sys32_getgroups, compat_sys_gettimeofday, sys32_getrusage, sys_nis_syscall, sys_getcwd +/*120*/ .word compat_sys_readv, compat_sys_writev, compat_sys_settimeofday, sys_fchown16, sys_fchmod .word sys_nis_syscall, sys_setreuid16, sys_setregid16, sys_rename, sys_truncate /*130*/ .word sys_ftruncate, sys_flock, compat_sys_lstat64, sys_nis_syscall, sys_nis_syscall .word sys_nis_syscall, sys32_mkdir, sys_rmdir, compat_sys_utimes, compat_sys_stat64 diff --git a/arch/sparc64/kernel/us3_cpufreq.c b/arch/sparc64/kernel/us3_cpufreq.c index 47e3acafb5be..365b6464e2ce 100644 --- a/arch/sparc64/kernel/us3_cpufreq.c +++ b/arch/sparc64/kernel/us3_cpufreq.c @@ -183,7 +183,6 @@ static int __init us3_freq_cpu_init(struct cpufreq_policy *policy) table[3].index = 0; table[3].frequency = CPUFREQ_TABLE_END; - policy->governor = CPUFREQ_DEFAULT_GOVERNOR; policy->cpuinfo.transition_latency = 0; policy->cur = clock_tick; diff --git a/arch/um/kernel/exec.c b/arch/um/kernel/exec.c index f5d7f4569ba7..598711c62c82 100644 --- a/arch/um/kernel/exec.c +++ b/arch/um/kernel/exec.c @@ -42,23 +42,11 @@ void start_thread(struct pt_regs *regs, unsigned long eip, unsigned long esp) PT_REGS_SP(regs) = esp; } -#ifdef CONFIG_TTY_LOG -extern void log_exec(char **argv, void *tty); -#endif - static long execve1(char *file, char __user * __user *argv, char __user *__user *env) { long error; -#ifdef CONFIG_TTY_LOG - struct tty_struct *tty; - mutex_lock(&tty_mutex); - tty = get_current_tty(); - if (tty) - log_exec(argv, tty); - mutex_unlock(&tty_mutex); -#endif error = do_execve(file, argv, env, ¤t->thread.regs); if (error == 0) { task_lock(current); diff --git a/arch/um/os-Linux/Makefile b/arch/um/os-Linux/Makefile index 8a48d6a30064..d66f0388f091 100644 --- a/arch/um/os-Linux/Makefile +++ b/arch/um/os-Linux/Makefile @@ -7,9 +7,6 @@ obj-y = aio.o elf_aux.o execvp.o file.o helper.o irq.o main.o mem.o process.o \ registers.o sigio.o signal.o start_up.o time.o tty.o uaccess.o \ umid.o tls.o user_syms.o util.o drivers/ sys-$(SUBARCH)/ skas/ -obj-$(CONFIG_TTY_LOG) += tty_log.o -user-objs-$(CONFIG_TTY_LOG) += tty_log.o - USER_OBJS := $(user-objs-y) aio.o elf_aux.o execvp.o file.o helper.o irq.o \ main.o mem.o process.o registers.o sigio.o signal.o start_up.o time.o \ tty.o tls.o uaccess.o umid.o util.o diff --git a/arch/um/os-Linux/tty_log.c b/arch/um/os-Linux/tty_log.c deleted file mode 100644 index cc648e6fd3a2..000000000000 --- a/arch/um/os-Linux/tty_log.c +++ /dev/null @@ -1,217 +0,0 @@ -/* - * Copyright (C) 2002 Jeff Dike (jdike@karaya.com) and - * geoffrey hing <ghing@net.ohio-state.edu> - * Licensed under the GPL - */ - -#include <errno.h> -#include <string.h> -#include <stdio.h> -#include <stdlib.h> -#include <unistd.h> -#include <sys/time.h> -#include "init.h" -#include "user.h" -#include "os.h" - -#define TTY_LOG_DIR "./" - -/* Set early in boot and then unchanged */ -static char *tty_log_dir = TTY_LOG_DIR; -static int tty_log_fd = -1; - -#define TTY_LOG_OPEN 1 -#define TTY_LOG_CLOSE 2 -#define TTY_LOG_WRITE 3 -#define TTY_LOG_EXEC 4 - -#define TTY_READ 1 -#define TTY_WRITE 2 - -struct tty_log_buf { - int what; - unsigned long tty; - int len; - int direction; - unsigned long sec; - unsigned long usec; -}; - -int open_tty_log(void *tty, void *current_tty) -{ - struct timeval tv; - struct tty_log_buf data; - char buf[strlen(tty_log_dir) + sizeof("01234567890-01234567\0")]; - int fd; - - gettimeofday(&tv, NULL); - if(tty_log_fd != -1){ - data = ((struct tty_log_buf) { .what = TTY_LOG_OPEN, - .tty = (unsigned long) tty, - .len = sizeof(current_tty), - .direction = 0, - .sec = tv.tv_sec, - .usec = tv.tv_usec } ); - write(tty_log_fd, &data, sizeof(data)); - write(tty_log_fd, ¤t_tty, data.len); - return tty_log_fd; - } - - sprintf(buf, "%s/%0u-%0u", tty_log_dir, (unsigned int) tv.tv_sec, - (unsigned int) tv.tv_usec); - - fd = os_open_file(buf, of_append(of_create(of_rdwr(OPENFLAGS()))), - 0644); - if(fd < 0){ - printk("open_tty_log : couldn't open '%s', errno = %d\n", - buf, -fd); - } - return fd; -} - -void close_tty_log(int fd, void *tty) -{ - struct tty_log_buf data; - struct timeval tv; - - if(tty_log_fd != -1){ - gettimeofday(&tv, NULL); - data = ((struct tty_log_buf) { .what = TTY_LOG_CLOSE, - .tty = (unsigned long) tty, - .len = 0, - .direction = 0, - .sec = tv.tv_sec, - .usec = tv.tv_usec } ); - write(tty_log_fd, &data, sizeof(data)); - return; - } - os_close_file(fd); -} - -static int log_chunk(int fd, const char *buf, int len) -{ - int total = 0, try, missed, n; - char chunk[64]; - - while(len > 0){ - try = (len > sizeof(chunk)) ? sizeof(chunk) : len; - missed = copy_from_user_proc(chunk, (char *) buf, try); - try -= missed; - n = write(fd, chunk, try); - if(n != try) { - if(n < 0) - return -errno; - return -EIO; - } - if(missed != 0) - return -EFAULT; - - len -= try; - total += try; - buf += try; - } - - return total; -} - -int write_tty_log(int fd, const char *buf, int len, void *tty, int is_read) -{ - struct timeval tv; - struct tty_log_buf data; - int direction; - - if(fd == tty_log_fd){ - gettimeofday(&tv, NULL); - direction = is_read ? TTY_READ : TTY_WRITE; - data = ((struct tty_log_buf) { .what = TTY_LOG_WRITE, - .tty = (unsigned long) tty, - .len = len, - .direction = direction, - .sec = tv.tv_sec, - .usec = tv.tv_usec } ); - write(tty_log_fd, &data, sizeof(data)); - } - - return log_chunk(fd, buf, len); -} - -void log_exec(char **argv, void *tty) -{ - struct timeval tv; - struct tty_log_buf data; - char **ptr,*arg; - int len; - - if(tty_log_fd == -1) return; - - gettimeofday(&tv, NULL); - - len = 0; - for(ptr = argv; ; ptr++){ - if(copy_from_user_proc(&arg, ptr, sizeof(arg))) - return; - if(arg == NULL) break; - len += strlen_user_proc(arg); - } - - data = ((struct tty_log_buf) { .what = TTY_LOG_EXEC, - .tty = (unsigned long) tty, - .len = len, - .direction = 0, - .sec = tv.tv_sec, - .usec = tv.tv_usec } ); - write(tty_log_fd, &data, sizeof(data)); - - for(ptr = argv; ; ptr++){ - if(copy_from_user_proc(&arg, ptr, sizeof(arg))) - return; - if(arg == NULL) break; - log_chunk(tty_log_fd, arg, strlen_user_proc(arg)); - } -} - -extern void register_tty_logger(int (*opener)(void *, void *), - int (*writer)(int, const char *, int, - void *, int), - void (*closer)(int, void *)); - -static int register_logger(void) -{ - register_tty_logger(open_tty_log, write_tty_log, close_tty_log); - return 0; -} - -__uml_initcall(register_logger); - -static int __init set_tty_log_dir(char *name, int *add) -{ - tty_log_dir = name; - return 0; -} - -__uml_setup("tty_log_dir=", set_tty_log_dir, -"tty_log_dir=<directory>\n" -" This is used to specify the directory where the logs of all pty\n" -" data from this UML machine will be written.\n\n" -); - -static int __init set_tty_log_fd(char *name, int *add) -{ - char *end; - - tty_log_fd = strtoul(name, &end, 0); - if((*end != '\0') || (end == name)){ - printf("set_tty_log_fd - strtoul failed on '%s'\n", name); - tty_log_fd = -1; - } - - *add = 0; - return 0; -} - -__uml_setup("tty_log_fd=", set_tty_log_fd, -"tty_log_fd=<fd>\n" -" This is used to specify a preconfigured file descriptor to which all\n" -" tty data will be written. Preconfigure the descriptor with something\n" -" like '10>tty_log tty_log_fd=10'.\n\n" -); diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index f65c2744d573..7ccb6e60e60c 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -39,10 +39,6 @@ config ARCH_DEFCONFIG default "arch/x86/configs/i386_defconfig" if X86_32 default "arch/x86/configs/x86_64_defconfig" if X86_64 - -config GENERIC_LOCKBREAK - def_bool n - config GENERIC_TIME def_bool y @@ -95,7 +91,7 @@ config GENERIC_HWEIGHT def_bool y config GENERIC_GPIO - def_bool n + bool config ARCH_MAY_HAVE_PC_FDC def_bool y @@ -106,12 +102,6 @@ config RWSEM_GENERIC_SPINLOCK config RWSEM_XCHGADD_ALGORITHM def_bool X86_XADD -config ARCH_HAS_ILOG2_U32 - def_bool n - -config ARCH_HAS_ILOG2_U64 - def_bool n - config ARCH_HAS_CPU_IDLE_WAIT def_bool y @@ -758,9 +748,8 @@ config I8K Say N otherwise. config X86_REBOOTFIXUPS - def_bool n - prompt "Enable X86 board specific fixups for reboot" - depends on X86_32 && X86 + bool "Enable X86 board specific fixups for reboot" + depends on X86_32 ---help--- This enables chipset and/or board specific fixups to be done in order to get reboot to work correctly. This is only needed on @@ -944,8 +933,7 @@ config HIGHMEM depends on X86_32 && (HIGHMEM64G || HIGHMEM4G) config X86_PAE - def_bool n - prompt "PAE (Physical Address Extension) Support" + bool "PAE (Physical Address Extension) Support" depends on X86_32 && !HIGHMEM4G select RESOURCES_64BIT help @@ -1238,8 +1226,7 @@ config X86_PAT If unsure, say Y. config EFI - def_bool n - prompt "EFI runtime service support" + bool "EFI runtime service support" depends on ACPI ---help--- This enables the kernel to use EFI runtime services that are diff --git a/arch/x86/boot/video-vesa.c b/arch/x86/boot/video-vesa.c index 1e6fe0214c85..99b3079dc6ab 100644 --- a/arch/x86/boot/video-vesa.c +++ b/arch/x86/boot/video-vesa.c @@ -88,14 +88,11 @@ static int vesa_probe(void) (vminfo.memory_layout == 4 || vminfo.memory_layout == 6) && vminfo.memory_planes == 1) { -#ifdef CONFIG_FB +#ifdef CONFIG_FB_BOOT_VESA_SUPPORT /* Graphics mode, color, linear frame buffer supported. Only register the mode if if framebuffer is configured, however, - otherwise the user will be left without a screen. - We don't require CONFIG_FB_VESA, however, since - some of the other framebuffer drivers can use - this mode-setting, too. */ + otherwise the user will be left without a screen. */ mi = GET_HEAP(struct mode_info, 1); mi->mode = mode + VIDEO_FIRST_VESA; mi->depth = vminfo.bpp; @@ -133,10 +130,12 @@ static int vesa_set_mode(struct mode_info *mode) if ((vminfo.mode_attr & 0x15) == 0x05) { /* It's a supported text mode */ is_graphic = 0; +#ifdef CONFIG_FB_BOOT_VESA_SUPPORT } else if ((vminfo.mode_attr & 0x99) == 0x99) { /* It's a graphics mode with linear frame buffer */ is_graphic = 1; vesa_mode |= 0x4000; /* Request linear frame buffer */ +#endif } else { return -1; /* Invalid mode */ } diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S index eb4314768bf7..256b00b61892 100644 --- a/arch/x86/ia32/ia32entry.S +++ b/arch/x86/ia32/ia32entry.S @@ -571,8 +571,8 @@ ia32_sys_call_table: .quad compat_sys_setrlimit /* 75 */ .quad compat_sys_old_getrlimit /* old_getrlimit */ .quad compat_sys_getrusage - .quad sys32_gettimeofday - .quad sys32_settimeofday + .quad compat_sys_gettimeofday + .quad compat_sys_settimeofday .quad sys_getgroups16 /* 80 */ .quad sys_setgroups16 .quad sys32_old_select diff --git a/arch/x86/ia32/sys_ia32.c b/arch/x86/ia32/sys_ia32.c index beda4232ce69..2e09dcd3c0a6 100644 --- a/arch/x86/ia32/sys_ia32.c +++ b/arch/x86/ia32/sys_ia32.c @@ -49,41 +49,6 @@ #define AA(__x) ((unsigned long)(__x)) -int cp_compat_stat(struct kstat *kbuf, struct compat_stat __user *ubuf) -{ - compat_ino_t ino; - - typeof(ubuf->st_uid) uid = 0; - typeof(ubuf->st_gid) gid = 0; - SET_UID(uid, kbuf->uid); - SET_GID(gid, kbuf->gid); - if (!old_valid_dev(kbuf->dev) || !old_valid_dev(kbuf->rdev)) - return -EOVERFLOW; - if (kbuf->size >= 0x7fffffff) - return -EOVERFLOW; - ino = kbuf->ino; - if (sizeof(ino) < sizeof(kbuf->ino) && ino != kbuf->ino) - return -EOVERFLOW; - if (!access_ok(VERIFY_WRITE, ubuf, sizeof(struct compat_stat)) || - __put_user(old_encode_dev(kbuf->dev), &ubuf->st_dev) || - __put_user(ino, &ubuf->st_ino) || - __put_user(kbuf->mode, &ubuf->st_mode) || - __put_user(kbuf->nlink, &ubuf->st_nlink) || - __put_user(uid, &ubuf->st_uid) || - __put_user(gid, &ubuf->st_gid) || - __put_user(old_encode_dev(kbuf->rdev), &ubuf->st_rdev) || - __put_user(kbuf->size, &ubuf->st_size) || - __put_user(kbuf->atime.tv_sec, &ubuf->st_atime) || - __put_user(kbuf->atime.tv_nsec, &ubuf->st_atime_nsec) || - __put_user(kbuf->mtime.tv_sec, &ubuf->st_mtime) || - __put_user(kbuf->mtime.tv_nsec, &ubuf->st_mtime_nsec) || - __put_user(kbuf->ctime.tv_sec, &ubuf->st_ctime) || - __put_user(kbuf->ctime.tv_nsec, &ubuf->st_ctime_nsec) || - __put_user(kbuf->blksize, &ubuf->st_blksize) || - __put_user(kbuf->blocks, &ubuf->st_blocks)) - return -EFAULT; - return 0; -} asmlinkage long sys32_truncate64(char __user *filename, unsigned long offset_low, @@ -402,75 +367,11 @@ asmlinkage long sys32_rt_sigprocmask(int how, compat_sigset_t __user *set, return 0; } -static inline long get_tv32(struct timeval *o, struct compat_timeval __user *i) -{ - int err = -EFAULT; - - if (access_ok(VERIFY_READ, i, sizeof(*i))) { - err = __get_user(o->tv_sec, &i->tv_sec); - err |= __get_user(o->tv_usec, &i->tv_usec); - } - return err; -} - -static inline long put_tv32(struct compat_timeval __user *o, struct timeval *i) -{ - int err = -EFAULT; - - if (access_ok(VERIFY_WRITE, o, sizeof(*o))) { - err = __put_user(i->tv_sec, &o->tv_sec); - err |= __put_user(i->tv_usec, &o->tv_usec); - } - return err; -} - asmlinkage long sys32_alarm(unsigned int seconds) { return alarm_setitimer(seconds); } -/* - * Translations due to time_t size differences. Which affects all - * sorts of things, like timeval and itimerval. - */ -asmlinkage long sys32_gettimeofday(struct compat_timeval __user *tv, - struct timezone __user *tz) -{ - if (tv) { - struct timeval ktv; - - do_gettimeofday(&ktv); - if (put_tv32(tv, &ktv)) - return -EFAULT; - } - if (tz) { - if (copy_to_user(tz, &sys_tz, sizeof(sys_tz))) - return -EFAULT; - } - return 0; -} - -asmlinkage long sys32_settimeofday(struct compat_timeval __user *tv, - struct timezone __user *tz) -{ - struct timeval ktv; - struct timespec kts; - struct timezone ktz; - - if (tv) { - if (get_tv32(&ktv, tv)) - return -EFAULT; - kts.tv_sec = ktv.tv_sec; - kts.tv_nsec = ktv.tv_usec * NSEC_PER_USEC; - } - if (tz) { - if (copy_from_user(&ktz, tz, sizeof(ktz))) - return -EFAULT; - } - - return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL); -} - struct sel_arg_struct { unsigned int n; unsigned int inp; diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c index 34e4d112b1ef..a8fd9ebdc8e2 100644 --- a/arch/x86/kernel/amd_iommu.c +++ b/arch/x86/kernel/amd_iommu.c @@ -295,7 +295,7 @@ static int iommu_flush_pages(struct amd_iommu *iommu, u16 domid, u64 address, size_t size) { int s = 0; - unsigned pages = iommu_num_pages(address, size); + unsigned pages = iommu_num_pages(address, size, PAGE_SIZE); address &= PAGE_MASK; @@ -680,7 +680,8 @@ static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu, iommu->exclusion_start < dma_dom->aperture_size) { unsigned long startpage = iommu->exclusion_start >> PAGE_SHIFT; int pages = iommu_num_pages(iommu->exclusion_start, - iommu->exclusion_length); + iommu->exclusion_length, + PAGE_SIZE); dma_ops_reserve_addresses(dma_dom, startpage, pages); } @@ -935,7 +936,7 @@ static dma_addr_t __map_single(struct device *dev, unsigned long align_mask = 0; int i; - pages = iommu_num_pages(paddr, size); + pages = iommu_num_pages(paddr, size, PAGE_SIZE); paddr &= PAGE_MASK; if (align) @@ -980,7 +981,7 @@ static void __unmap_single(struct amd_iommu *iommu, if ((dma_addr == 0) || (dma_addr + size > dma_dom->aperture_size)) return; - pages = iommu_num_pages(dma_addr, size); + pages = iommu_num_pages(dma_addr, size, PAGE_SIZE); dma_addr &= PAGE_MASK; start = dma_addr; diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c index 080d1d27f37a..e1e731d78f38 100644 --- a/arch/x86/kernel/pci-calgary_64.c +++ b/arch/x86/kernel/pci-calgary_64.c @@ -217,16 +217,6 @@ static inline unsigned long verify_bit_range(unsigned long* bitmap, #endif /* CONFIG_IOMMU_DEBUG */ -static inline unsigned int num_dma_pages(unsigned long dma, unsigned int dmalen) -{ - unsigned int npages; - - npages = PAGE_ALIGN(dma + dmalen) - (dma & PAGE_MASK); - npages >>= PAGE_SHIFT; - - return npages; -} - static inline int translation_enabled(struct iommu_table *tbl) { /* only PHBs with translation enabled have an IOMMU table */ @@ -408,7 +398,7 @@ static void calgary_unmap_sg(struct device *dev, if (dmalen == 0) break; - npages = num_dma_pages(dma, dmalen); + npages = iommu_num_pages(dma, dmalen, PAGE_SIZE); iommu_free(tbl, dma, npages); } } @@ -427,7 +417,7 @@ static int calgary_map_sg(struct device *dev, struct scatterlist *sg, BUG_ON(!sg_page(s)); vaddr = (unsigned long) sg_virt(s); - npages = num_dma_pages(vaddr, s->length); + npages = iommu_num_pages(vaddr, s->length, PAGE_SIZE); entry = iommu_range_alloc(dev, tbl, npages); if (entry == bad_dma_address) { @@ -464,7 +454,7 @@ static dma_addr_t calgary_map_single(struct device *dev, phys_addr_t paddr, struct iommu_table *tbl = find_iommu_table(dev); uaddr = (unsigned long)vaddr; - npages = num_dma_pages(uaddr, size); + npages = iommu_num_pages(uaddr, size, PAGE_SIZE); return iommu_alloc(dev, tbl, vaddr, npages, direction); } @@ -475,7 +465,7 @@ static void calgary_unmap_single(struct device *dev, dma_addr_t dma_handle, struct iommu_table *tbl = find_iommu_table(dev); unsigned int npages; - npages = num_dma_pages(dma_handle, size); + npages = iommu_num_pages(dma_handle, size, PAGE_SIZE); iommu_free(tbl, dma_handle, npages); } diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c index 0a3824e837b4..192624820217 100644 --- a/arch/x86/kernel/pci-dma.c +++ b/arch/x86/kernel/pci-dma.c @@ -125,13 +125,13 @@ void __init pci_iommu_alloc(void) pci_swiotlb_init(); } -unsigned long iommu_num_pages(unsigned long addr, unsigned long len) +unsigned long iommu_nr_pages(unsigned long addr, unsigned long len) { unsigned long size = roundup((addr & ~PAGE_MASK) + len, PAGE_SIZE); return size >> PAGE_SHIFT; } -EXPORT_SYMBOL(iommu_num_pages); +EXPORT_SYMBOL(iommu_nr_pages); #endif void *dma_generic_alloc_coherent(struct device *dev, size_t size, diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c index 145f1c83369f..e3f75bbcedea 100644 --- a/arch/x86/kernel/pci-gart_64.c +++ b/arch/x86/kernel/pci-gart_64.c @@ -231,7 +231,7 @@ nonforced_iommu(struct device *dev, unsigned long addr, size_t size) static dma_addr_t dma_map_area(struct device *dev, dma_addr_t phys_mem, size_t size, int dir, unsigned long align_mask) { - unsigned long npages = iommu_num_pages(phys_mem, size); + unsigned long npages = iommu_num_pages(phys_mem, size, PAGE_SIZE); unsigned long iommu_page = alloc_iommu(dev, npages, align_mask); int i; @@ -285,7 +285,7 @@ static void gart_unmap_single(struct device *dev, dma_addr_t dma_addr, return; iommu_page = (dma_addr - iommu_bus_base)>>PAGE_SHIFT; - npages = iommu_num_pages(dma_addr, size); + npages = iommu_num_pages(dma_addr, size, PAGE_SIZE); for (i = 0; i < npages; i++) { iommu_gatt_base[iommu_page + i] = gart_unmapped_entry; CLEAR_LEAK(iommu_page + i); @@ -368,7 +368,7 @@ static int __dma_map_cont(struct device *dev, struct scatterlist *start, } addr = phys_addr; - pages = iommu_num_pages(s->offset, s->length); + pages = iommu_num_pages(s->offset, s->length, PAGE_SIZE); while (pages--) { iommu_gatt_base[iommu_page] = GPTE_ENCODE(addr); SET_LEAK(iommu_page); @@ -451,7 +451,7 @@ gart_map_sg(struct device *dev, struct scatterlist *sg, int nents, int dir) seg_size += s->length; need = nextneed; - pages += iommu_num_pages(s->offset, s->length); + pages += iommu_num_pages(s->offset, s->length, PAGE_SIZE); ps = s; } if (dma_map_cont(dev, start_sg, i - start, sgmap, pages, need) < 0) diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index 8c3aca7cb343..7ed9e070a6e9 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -282,6 +282,8 @@ static void __cpuinit smp_callin(void) cpu_set(cpuid, cpu_callin_map); } +static int __cpuinitdata unsafe_smp; + /* * Activate a secondary processor. */ @@ -397,7 +399,7 @@ static void __cpuinit smp_apply_quirks(struct cpuinfo_x86 *c) goto valid_k7; /* If we get here, not a certified SMP capable AMD system. */ - add_taint(TAINT_UNSAFE_SMP); + unsafe_smp = 1; } valid_k7: @@ -414,12 +416,10 @@ static void __cpuinit smp_checks(void) * Don't taint if we are running SMP kernel on a single non-MP * approved Athlon */ - if (tainted & TAINT_UNSAFE_SMP) { - if (num_online_cpus()) - printk(KERN_INFO "WARNING: This combination of AMD" - "processors is not suitable for SMP.\n"); - else - tainted &= ~TAINT_UNSAFE_SMP; + if (unsafe_smp && num_online_cpus() > 1) { + printk(KERN_INFO "WARNING: This combination of AMD" + "processors is not suitable for SMP.\n"); + add_taint(TAINT_UNSAFE_SMP); } } diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 0d682fc6aeb3..19afbb644c7f 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -564,7 +564,7 @@ static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info * hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32); pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n", - __FUNCTION__, tsc_khz, hv_clock->tsc_shift, + __func__, tsc_khz, hv_clock->tsc_shift, hv_clock->tsc_to_system_mul); } diff --git a/drivers/base/Kconfig b/drivers/base/Kconfig index 6318f6b57360..d8e8c49c0cbd 100644 --- a/drivers/base/Kconfig +++ b/drivers/base/Kconfig @@ -54,7 +54,7 @@ config FIRMWARE_IN_KERNEL such firmware, and do not wish to use an initrd. This single option controls the inclusion of firmware for - every driver which usees request_firmare() and ships its + every driver which uses request_firmare() and ships its firmware in the kernel source tree, to avoid a proliferation of 'Include firmware for xxx device' options. diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index c9c92b00fd55..b7e571031ecd 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c @@ -164,8 +164,7 @@ static ssize_t firmware_loading_store(struct device *dev, } /* fallthrough */ default: - printk(KERN_ERR "%s: unexpected value (%d)\n", __func__, - loading); + dev_err(dev, "%s: unexpected value (%d)\n", __func__, loading); /* fallthrough */ case -1: fw_load_abort(fw_priv); @@ -309,7 +308,7 @@ static int fw_register_device(struct device **dev_p, const char *fw_name, *dev_p = NULL; if (!fw_priv || !f_dev) { - printk(KERN_ERR "%s: kmalloc failed\n", __func__); + dev_err(device, "%s: kmalloc failed\n", __func__); retval = -ENOMEM; goto error_kfree; } @@ -329,8 +328,7 @@ static int fw_register_device(struct device **dev_p, const char *fw_name, f_dev->uevent_suppress = 1; retval = device_register(f_dev); if (retval) { - printk(KERN_ERR "%s: device_register failed\n", - __func__); + dev_err(device, "%s: device_register failed\n", __func__); goto error_kfree; } *dev_p = f_dev; @@ -363,15 +361,13 @@ static int fw_setup_device(struct firmware *fw, struct device **dev_p, fw_priv->fw = fw; retval = sysfs_create_bin_file(&f_dev->kobj, &fw_priv->attr_data); if (retval) { - printk(KERN_ERR "%s: sysfs_create_bin_file failed\n", - __func__); + dev_err(device, "%s: sysfs_create_bin_file failed\n", __func__); goto error_unreg; } retval = device_create_file(f_dev, &dev_attr_loading); if (retval) { - printk(KERN_ERR "%s: device_create_file failed\n", - __func__); + dev_err(device, "%s: device_create_file failed\n", __func__); goto error_unreg; } @@ -401,8 +397,8 @@ _request_firmware(const struct firmware **firmware_p, const char *name, *firmware_p = firmware = kzalloc(sizeof(*firmware), GFP_KERNEL); if (!firmware) { - printk(KERN_ERR "%s: kmalloc(struct firmware) failed\n", - __func__); + dev_err(device, "%s: kmalloc(struct firmware) failed\n", + __func__); retval = -ENOMEM; goto out; } @@ -411,15 +407,15 @@ _request_firmware(const struct firmware **firmware_p, const char *name, builtin++) { if (strcmp(name, builtin->name)) continue; - printk(KERN_INFO "firmware: using built-in firmware %s\n", - name); + dev_info(device, "firmware: using built-in firmware %s\n", + name); firmware->size = builtin->size; firmware->data = builtin->data; return 0; } if (uevent) - printk(KERN_INFO "firmware: requesting %s\n", name); + dev_info(device, "firmware: requesting %s\n", name); retval = fw_setup_device(firmware, &f_dev, name, device, uevent); if (retval) diff --git a/drivers/base/platform.c b/drivers/base/platform.c index 3f940393d6c7..66b710c28812 100644 --- a/drivers/base/platform.c +++ b/drivers/base/platform.c @@ -42,10 +42,8 @@ struct resource *platform_get_resource(struct platform_device *dev, for (i = 0; i < dev->num_resources; i++) { struct resource *r = &dev->resource[i]; - if ((r->flags & (IORESOURCE_IO|IORESOURCE_MEM| - IORESOURCE_IRQ|IORESOURCE_DMA)) == type) - if (num-- == 0) - return r; + if (type == resource_type(r) && num-- == 0) + return r; } return NULL; } @@ -78,10 +76,8 @@ struct resource *platform_get_resource_byname(struct platform_device *dev, for (i = 0; i < dev->num_resources; i++) { struct resource *r = &dev->resource[i]; - if ((r->flags & (IORESOURCE_IO|IORESOURCE_MEM| - IORESOURCE_IRQ|IORESOURCE_DMA)) == type) - if (!strcmp(r->name, name)) - return r; + if (type == resource_type(r) && !strcmp(r->name, name)) + return r; } return NULL; } @@ -259,9 +255,9 @@ int platform_device_add(struct platform_device *pdev) p = r->parent; if (!p) { - if (r->flags & IORESOURCE_MEM) + if (resource_type(r) == IORESOURCE_MEM) p = &iomem_resource; - else if (r->flags & IORESOURCE_IO) + else if (resource_type(r) == IORESOURCE_IO) p = &ioport_resource; } @@ -282,9 +278,14 @@ int platform_device_add(struct platform_device *pdev) return ret; failed: - while (--i >= 0) - if (pdev->resource[i].flags & (IORESOURCE_MEM|IORESOURCE_IO)) - release_resource(&pdev->resource[i]); + while (--i >= 0) { + struct resource *r = &pdev->resource[i]; + unsigned long type = resource_type(r); + + if (type == IORESOURCE_MEM || type == IORESOURCE_IO) + release_resource(r); + } + return ret; } EXPORT_SYMBOL_GPL(platform_device_add); @@ -306,7 +307,9 @@ void platform_device_del(struct platform_device *pdev) for (i = 0; i < pdev->num_resources; i++) { struct resource *r = &pdev->resource[i]; - if (r->flags & (IORESOURCE_MEM|IORESOURCE_IO)) + unsigned long type = resource_type(r); + + if (type == IORESOURCE_MEM || type == IORESOURCE_IO) release_resource(r); } } diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c index 273a944d4040..03bde7524bc3 100644 --- a/drivers/base/power/main.c +++ b/drivers/base/power/main.c @@ -778,10 +778,7 @@ EXPORT_SYMBOL_GPL(device_suspend); void __suspend_report_result(const char *function, void *fn, int ret) { - if (ret) { - printk(KERN_ERR "%s(): ", function); - print_fn_descriptor_symbol("%s returns ", fn); - printk("%d\n", ret); - } + if (ret) + printk(KERN_ERR "%s(): %pF returns %d\n", function, fn, ret); } EXPORT_SYMBOL_GPL(__suspend_report_result); diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig index 700ff9679457..122254155ae1 100644 --- a/drivers/char/Kconfig +++ b/drivers/char/Kconfig @@ -1043,15 +1043,6 @@ config HPET open selects one of the timers supported by the HPET. The timers are non-periodic and/or periodic. -config HPET_RTC_IRQ - bool - default HPET_EMULATE_RTC - depends on RTC && HPET - help - If you say Y here, you will disable RTC_IRQ in drivers/char/rtc.c. It - is assumed the platform called hpet_alloc with the RTC IRQ values for - the HPET timers. - config HPET_MMAP bool "Allow mmap of HPET" default y diff --git a/drivers/char/applicom.c b/drivers/char/applicom.c index b899d9182c7d..05674febb0c6 100644 --- a/drivers/char/applicom.c +++ b/drivers/char/applicom.c @@ -478,7 +478,7 @@ static int do_ac_read(int IndexCard, char __user *buf, struct st_ram_io *st_loc, struct mailbox *mailbox) { void __iomem *from = apbs[IndexCard].RamIO + RAM_TO_PC; - unsigned char *to = (unsigned char *)&mailbox; + unsigned char *to = (unsigned char *)mailbox; #ifdef DEBUG int c; #endif diff --git a/drivers/char/ds1286.c b/drivers/char/ds1286.c index fb584938c9c3..5329d482b582 100644 --- a/drivers/char/ds1286.c +++ b/drivers/char/ds1286.c @@ -443,7 +443,6 @@ static void ds1286_get_time(struct rtc_time *rtc_tm) { unsigned char save_control; unsigned long flags; - unsigned long uip_watchdog = jiffies; /* * read RTC once any update in progress is done. The update @@ -456,8 +455,7 @@ static void ds1286_get_time(struct rtc_time *rtc_tm) */ if (ds1286_is_updating() != 0) - while (time_before(jiffies, uip_watchdog + 2*HZ/100)) - barrier(); + msleep(20); /* * Only the values that we read from the RTC are set. We leave diff --git a/drivers/char/hw_random/omap-rng.c b/drivers/char/hw_random/omap-rng.c index 51738bdd834e..d4e7dca06e4f 100644 --- a/drivers/char/hw_random/omap-rng.c +++ b/drivers/char/hw_random/omap-rng.c @@ -118,18 +118,21 @@ static int __init omap_rng_probe(struct platform_device *pdev) mem = request_mem_region(res->start, res->end - res->start + 1, pdev->name); - if (mem == NULL) - return -EBUSY; + if (mem == NULL) { + ret = -EBUSY; + goto err_region; + } dev_set_drvdata(&pdev->dev, mem); - rng_base = (u32 __force __iomem *)io_p2v(res->start); + rng_base = ioremap(res->start, res->end - res->start + 1); + if (!rng_base) { + ret = -ENOMEM; + goto err_ioremap; + } ret = hwrng_register(&omap_rng_ops); - if (ret) { - release_resource(mem); - rng_base = NULL; - return ret; - } + if (ret) + goto err_register; dev_info(&pdev->dev, "OMAP Random Number Generator ver. %02x\n", omap_rng_read_reg(RNG_REV_REG)); @@ -138,6 +141,18 @@ static int __init omap_rng_probe(struct platform_device *pdev) rng_dev = pdev; return 0; + +err_register: + iounmap(rng_base); + rng_base = NULL; +err_ioremap: + release_resource(mem); +err_region: + if (cpu_is_omap24xx()) { + clk_disable(rng_ick); + clk_put(rng_ick); + } + return ret; } static int __exit omap_rng_remove(struct platform_device *pdev) @@ -148,6 +163,8 @@ static int __exit omap_rng_remove(struct platform_device *pdev) omap_rng_write_reg(RNG_MASK_REG, 0x0); + iounmap(rng_base); + if (cpu_is_omap24xx()) { clk_disable(rng_ick); clk_put(rng_ick); diff --git a/drivers/char/keyboard.c b/drivers/char/keyboard.c index 7b3a212c86b1..de26a978fbdd 100644 --- a/drivers/char/keyboard.c +++ b/drivers/char/keyboard.c @@ -1249,7 +1249,7 @@ static void kbd_keycode(unsigned int keycode, int down, int hw_raw) return; } - if (keycode > NR_KEYS) + if (keycode >= NR_KEYS) if (keycode >= KEY_BRL_DOT1 && keycode <= KEY_BRL_DOT8) keysym = K(KT_BRL, keycode - KEY_BRL_DOT1 + 1); else diff --git a/drivers/char/moxa.c b/drivers/char/moxa.c index 5df4003ad873..12d327a2c9ba 100644 --- a/drivers/char/moxa.c +++ b/drivers/char/moxa.c @@ -513,7 +513,7 @@ static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr, size_t len) { void __iomem *baseAddr = brd->basemem; - const u16 *uptr = ptr; + const __le16 *uptr = ptr; size_t wlen, len2, j; unsigned long key, loadbuf, loadlen, checksum, checksum_ok; unsigned int i, retry; diff --git a/drivers/char/random.c b/drivers/char/random.c index 6af435b89867..c8752eaad483 100644 --- a/drivers/char/random.c +++ b/drivers/char/random.c @@ -1205,7 +1205,7 @@ static int proc_do_uuid(ctl_table *table, int write, struct file *filp, return proc_dostring(&fake_table, write, filp, buffer, lenp, ppos); } -static int uuid_strategy(ctl_table *table, int __user *name, int nlen, +static int uuid_strategy(ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { diff --git a/drivers/char/rtc.c b/drivers/char/rtc.c index b47710c17885..17683de95717 100644 --- a/drivers/char/rtc.c +++ b/drivers/char/rtc.c @@ -96,7 +96,7 @@ static unsigned long rtc_port; static int rtc_irq; #endif -#ifdef CONFIG_HPET_RTC_IRQ +#ifdef CONFIG_HPET_EMULATE_RTC #undef RTC_IRQ #endif diff --git a/drivers/char/sysrq.c b/drivers/char/sysrq.c index 8fdfe9c871e3..dce4cc0e6953 100644 --- a/drivers/char/sysrq.c +++ b/drivers/char/sysrq.c @@ -23,6 +23,7 @@ #include <linux/reboot.h> #include <linux/sysrq.h> #include <linux/kbd_kern.h> +#include <linux/proc_fs.h> #include <linux/quotaops.h> #include <linux/kernel.h> #include <linux/module.h> @@ -326,6 +327,7 @@ static struct sysrq_key_op sysrq_moom_op = { .handler = sysrq_handle_moom, .help_msg = "Full", .action_msg = "Manual OOM execution", + .enable_mask = SYSRQ_ENABLE_SIGNAL, }; static void sysrq_handle_kill(int key, struct tty_struct *tty) @@ -533,3 +535,32 @@ int unregister_sysrq_key(int key, struct sysrq_key_op *op_p) return __sysrq_swap_key_ops(key, NULL, op_p); } EXPORT_SYMBOL(unregister_sysrq_key); + +#ifdef CONFIG_PROC_FS +/* + * writing 'C' to /proc/sysrq-trigger is like sysrq-C + */ +static ssize_t write_sysrq_trigger(struct file *file, const char __user *buf, + size_t count, loff_t *ppos) +{ + if (count) { + char c; + + if (get_user(c, buf)) + return -EFAULT; + __handle_sysrq(c, NULL, 0); + } + return count; +} + +static const struct file_operations proc_sysrq_trigger_operations = { + .write = write_sysrq_trigger, +}; + +static int __init sysrq_init(void) +{ + proc_create("sysrq-trigger", S_IWUSR, NULL, &proc_sysrq_trigger_operations); + return 0; +} +module_init(sysrq_init); +#endif diff --git a/drivers/char/tpm/tpm.c b/drivers/char/tpm/tpm.c index 1fee7034a386..e70d13defde4 100644 --- a/drivers/char/tpm/tpm.c +++ b/drivers/char/tpm/tpm.c @@ -525,19 +525,19 @@ void tpm_get_timeouts(struct tpm_chip *chip) timeout = be32_to_cpu(*((__be32 *) (data + TPM_GET_CAP_RET_UINT32_1_IDX))); if (timeout) - chip->vendor.timeout_a = msecs_to_jiffies(timeout); + chip->vendor.timeout_a = usecs_to_jiffies(timeout); timeout = be32_to_cpu(*((__be32 *) (data + TPM_GET_CAP_RET_UINT32_2_IDX))); if (timeout) - chip->vendor.timeout_b = msecs_to_jiffies(timeout); + chip->vendor.timeout_b = usecs_to_jiffies(timeout); timeout = be32_to_cpu(*((__be32 *) (data + TPM_GET_CAP_RET_UINT32_3_IDX))); if (timeout) - chip->vendor.timeout_c = msecs_to_jiffies(timeout); + chip->vendor.timeout_c = usecs_to_jiffies(timeout); timeout = be32_to_cpu(*((__be32 *) (data + TPM_GET_CAP_RET_UINT32_4_IDX))); if (timeout) - chip->vendor.timeout_d = msecs_to_jiffies(timeout); + chip->vendor.timeout_d = usecs_to_jiffies(timeout); duration: memcpy(data, tpm_cap, sizeof(tpm_cap)); @@ -554,15 +554,22 @@ duration: return; chip->vendor.duration[TPM_SHORT] = - msecs_to_jiffies(be32_to_cpu + usecs_to_jiffies(be32_to_cpu (*((__be32 *) (data + TPM_GET_CAP_RET_UINT32_1_IDX)))); + /* The Broadcom BCM0102 chipset in a Dell Latitude D820 gets the above + * value wrong and apparently reports msecs rather than usecs. So we + * fix up the resulting too-small TPM_SHORT value to make things work. + */ + if (chip->vendor.duration[TPM_SHORT] < (HZ/100)) + chip->vendor.duration[TPM_SHORT] = HZ; + chip->vendor.duration[TPM_MEDIUM] = - msecs_to_jiffies(be32_to_cpu + usecs_to_jiffies(be32_to_cpu (*((__be32 *) (data + TPM_GET_CAP_RET_UINT32_2_IDX)))); chip->vendor.duration[TPM_LONG] = - msecs_to_jiffies(be32_to_cpu + usecs_to_jiffies(be32_to_cpu (*((__be32 *) (data + TPM_GET_CAP_RET_UINT32_3_IDX)))); } @@ -1180,11 +1187,8 @@ struct tpm_chip *tpm_register_hardware(struct device *dev, chip = kzalloc(sizeof(*chip), GFP_KERNEL); devname = kmalloc(DEVNAME_SIZE, GFP_KERNEL); - if (chip == NULL || devname == NULL) { - kfree(chip); - kfree(devname); - return NULL; - } + if (chip == NULL || devname == NULL) + goto out_free; mutex_init(&chip->buffer_mutex); mutex_init(&chip->tpm_mutex); @@ -1201,8 +1205,7 @@ struct tpm_chip *tpm_register_hardware(struct device *dev, if (chip->dev_num >= TPM_NUM_DEVICES) { dev_err(dev, "No available tpm device numbers\n"); - kfree(chip); - return NULL; + goto out_free; } else if (chip->dev_num == 0) chip->vendor.miscdev.minor = TPM_MINOR; else @@ -1243,6 +1246,11 @@ struct tpm_chip *tpm_register_hardware(struct device *dev, spin_unlock(&driver_lock); return chip; + +out_free: + kfree(chip); + kfree(devname); + return NULL; } EXPORT_SYMBOL_GPL(tpm_register_hardware); diff --git a/drivers/char/vt.c b/drivers/char/vt.c index a0f7ffb68087..d8f83e26e4a4 100644 --- a/drivers/char/vt.c +++ b/drivers/char/vt.c @@ -59,7 +59,7 @@ * by Martin Mares <mj@atrey.karlin.mff.cuni.cz>, July 1998 * * Removed old-style timers, introduced console_timer, made timer - * deletion SMP-safe. 17Jun00, Andrew Morton <andrewm@uow.edu.au> + * deletion SMP-safe. 17Jun00, Andrew Morton * * Removed console_lock, enabled interrupts across all console operations * 13 March 2001, Andrew Morton diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c index 4a16b5b61cfb..f0d9b415db50 100644 --- a/drivers/edac/i5000_edac.c +++ b/drivers/edac/i5000_edac.c @@ -119,6 +119,7 @@ #define FERR_NF_UNCORRECTABLE (FERR_NF_M12ERR | \ FERR_NF_M11ERR | \ FERR_NF_M10ERR | \ + FERR_NF_M9ERR | \ FERR_NF_M8ERR | \ FERR_NF_M7ERR | \ FERR_NF_M6ERR | \ @@ -301,6 +302,9 @@ static char *numcol_toString[] = { }; #endif +/* enables the report of miscellaneous messages as CE errors - default off */ +static int misc_messages; + /* Enumeration of supported devices */ enum i5000_chips { I5000P = 0, @@ -466,7 +470,8 @@ static void i5000_process_fatal_error_info(struct mem_ctl_info *mci, struct i5000_error_info *info, int handle_errors) { - char msg[EDAC_MC_LABEL_LEN + 1 + 90]; + char msg[EDAC_MC_LABEL_LEN + 1 + 160]; + char *specific = NULL; u32 allErrors; int branch; int channel; @@ -480,11 +485,6 @@ static void i5000_process_fatal_error_info(struct mem_ctl_info *mci, if (!allErrors) return; /* if no error, return now */ - /* ONLY ONE of the possible error bits will be set, as per the docs */ - i5000_mc_printk(mci, KERN_ERR, - "FATAL ERRORS Found!!! 1st FATAL Err Reg= 0x%x\n", - allErrors); - branch = EXTRACT_FBDCHAN_INDX(info->ferr_fat_fbd); channel = branch; @@ -501,28 +501,42 @@ static void i5000_process_fatal_error_info(struct mem_ctl_info *mci, rdwr ? "Write" : "Read", ras, cas); /* Only 1 bit will be on */ - if (allErrors & FERR_FAT_M1ERR) { - i5000_mc_printk(mci, KERN_ERR, - "Alert on non-redundant retry or fast " - "reset timeout\n"); - - } else if (allErrors & FERR_FAT_M2ERR) { - i5000_mc_printk(mci, KERN_ERR, - "Northbound CRC error on non-redundant " - "retry\n"); - - } else if (allErrors & FERR_FAT_M3ERR) { - i5000_mc_printk(mci, KERN_ERR, - ">Tmid Thermal event with intelligent " - "throttling disabled\n"); + switch (allErrors) { + case FERR_FAT_M1ERR: + specific = "Alert on non-redundant retry or fast " + "reset timeout"; + break; + case FERR_FAT_M2ERR: + specific = "Northbound CRC error on non-redundant " + "retry"; + break; + case FERR_FAT_M3ERR: + { + static int done; + + /* + * This error is generated to inform that the intelligent + * throttling is disabled and the temperature passed the + * specified middle point. Since this is something the BIOS + * should take care of, we'll warn only once to avoid + * worthlessly flooding the log. + */ + if (done) + return; + done++; + + specific = ">Tmid Thermal event with intelligent " + "throttling disabled"; + } + break; } /* Form out message */ snprintf(msg, sizeof(msg), "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d CAS=%d " - "FATAL Err=0x%x)", + "FATAL Err=0x%x (%s))", branch >> 1, bank, rdwr ? "Write" : "Read", ras, cas, - allErrors); + allErrors, specific); /* Call the helper to output message */ edac_mc_handle_fbd_ue(mci, rank, channel, channel + 1, msg); @@ -539,7 +553,8 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci, struct i5000_error_info *info, int handle_errors) { - char msg[EDAC_MC_LABEL_LEN + 1 + 90]; + char msg[EDAC_MC_LABEL_LEN + 1 + 170]; + char *specific = NULL; u32 allErrors; u32 ue_errors; u32 ce_errors; @@ -557,10 +572,6 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci, return; /* if no error, return now */ /* ONLY ONE of the possible error bits will be set, as per the docs */ - i5000_mc_printk(mci, KERN_WARNING, - "NON-FATAL ERRORS Found!!! 1st NON-FATAL Err " - "Reg= 0x%x\n", allErrors); - ue_errors = allErrors & FERR_NF_UNCORRECTABLE; if (ue_errors) { debugf0("\tUncorrected bits= 0x%x\n", ue_errors); @@ -579,12 +590,47 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci, rank, channel, channel + 1, branch >> 1, bank, rdwr ? "Write" : "Read", ras, cas); + switch (ue_errors) { + case FERR_NF_M12ERR: + specific = "Non-Aliased Uncorrectable Patrol Data ECC"; + break; + case FERR_NF_M11ERR: + specific = "Non-Aliased Uncorrectable Spare-Copy " + "Data ECC"; + break; + case FERR_NF_M10ERR: + specific = "Non-Aliased Uncorrectable Mirrored Demand " + "Data ECC"; + break; + case FERR_NF_M9ERR: + specific = "Non-Aliased Uncorrectable Non-Mirrored " + "Demand Data ECC"; + break; + case FERR_NF_M8ERR: + specific = "Aliased Uncorrectable Patrol Data ECC"; + break; + case FERR_NF_M7ERR: + specific = "Aliased Uncorrectable Spare-Copy Data ECC"; + break; + case FERR_NF_M6ERR: + specific = "Aliased Uncorrectable Mirrored Demand " + "Data ECC"; + break; + case FERR_NF_M5ERR: + specific = "Aliased Uncorrectable Non-Mirrored Demand " + "Data ECC"; + break; + case FERR_NF_M4ERR: + specific = "Uncorrectable Data ECC on Replay"; + break; + } + /* Form out message */ snprintf(msg, sizeof(msg), "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d " - "CAS=%d, UE Err=0x%x)", + "CAS=%d, UE Err=0x%x (%s))", branch >> 1, bank, rdwr ? "Write" : "Read", ras, cas, - ue_errors); + ue_errors, specific); /* Call the helper to output message */ edac_mc_handle_fbd_ue(mci, rank, channel, channel + 1, msg); @@ -616,51 +662,74 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci, rank, channel, branch >> 1, bank, rdwr ? "Write" : "Read", ras, cas); + switch (ce_errors) { + case FERR_NF_M17ERR: + specific = "Correctable Non-Mirrored Demand Data ECC"; + break; + case FERR_NF_M18ERR: + specific = "Correctable Mirrored Demand Data ECC"; + break; + case FERR_NF_M19ERR: + specific = "Correctable Spare-Copy Data ECC"; + break; + case FERR_NF_M20ERR: + specific = "Correctable Patrol Data ECC"; + break; + } + /* Form out message */ snprintf(msg, sizeof(msg), "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d " - "CAS=%d, CE Err=0x%x)", branch >> 1, bank, - rdwr ? "Write" : "Read", ras, cas, ce_errors); + "CAS=%d, CE Err=0x%x (%s))", branch >> 1, bank, + rdwr ? "Write" : "Read", ras, cas, ce_errors, + specific); /* Call the helper to output message */ edac_mc_handle_fbd_ce(mci, rank, channel, msg); } - /* See if any of the thermal errors have fired */ - misc_errors = allErrors & FERR_NF_THERMAL; - if (misc_errors) { - i5000_printk(KERN_WARNING, "\tTHERMAL Error, bits= 0x%x\n", - misc_errors); - } - - /* See if any of the thermal errors have fired */ - misc_errors = allErrors & FERR_NF_NON_RETRY; - if (misc_errors) { - i5000_printk(KERN_WARNING, "\tNON-Retry Errors, bits= 0x%x\n", - misc_errors); - } + if (!misc_messages) + return; - /* See if any of the thermal errors have fired */ - misc_errors = allErrors & FERR_NF_NORTH_CRC; + misc_errors = allErrors & (FERR_NF_NON_RETRY | FERR_NF_NORTH_CRC | + FERR_NF_SPD_PROTOCOL | FERR_NF_DIMM_SPARE); if (misc_errors) { - i5000_printk(KERN_WARNING, - "\tNORTHBOUND CRC Error, bits= 0x%x\n", - misc_errors); - } + switch (misc_errors) { + case FERR_NF_M13ERR: + specific = "Non-Retry or Redundant Retry FBD Memory " + "Alert or Redundant Fast Reset Timeout"; + break; + case FERR_NF_M14ERR: + specific = "Non-Retry or Redundant Retry FBD " + "Configuration Alert"; + break; + case FERR_NF_M15ERR: + specific = "Non-Retry or Redundant Retry FBD " + "Northbound CRC error on read data"; + break; + case FERR_NF_M21ERR: + specific = "FBD Northbound CRC error on " + "FBD Sync Status"; + break; + case FERR_NF_M22ERR: + specific = "SPD protocol error"; + break; + case FERR_NF_M27ERR: + specific = "DIMM-spare copy started"; + break; + case FERR_NF_M28ERR: + specific = "DIMM-spare copy completed"; + break; + } + branch = EXTRACT_FBDCHAN_INDX(info->ferr_nf_fbd); - /* See if any of the thermal errors have fired */ - misc_errors = allErrors & FERR_NF_SPD_PROTOCOL; - if (misc_errors) { - i5000_printk(KERN_WARNING, - "\tSPD Protocol Error, bits= 0x%x\n", - misc_errors); - } + /* Form out message */ + snprintf(msg, sizeof(msg), + "(Branch=%d Err=%#x (%s))", branch >> 1, + misc_errors, specific); - /* See if any of the thermal errors have fired */ - misc_errors = allErrors & FERR_NF_DIMM_SPARE; - if (misc_errors) { - i5000_printk(KERN_WARNING, "\tDIMM-Spare Error, bits= 0x%x\n", - misc_errors); + /* Call the helper to output message */ + edac_mc_handle_fbd_ce(mci, 0, 0, msg); } } @@ -1497,3 +1566,6 @@ MODULE_DESCRIPTION("MC Driver for Intel I5000 memory controllers - " module_param(edac_op_state, int, 0444); MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI"); +module_param(misc_messages, int, 0444); +MODULE_PARM_DESC(misc_messages, "Log miscellaneous non fatal messages"); + diff --git a/drivers/edac/i82443bxgx_edac.c b/drivers/edac/i82443bxgx_edac.c index c5305e3ee434..577760a82a0f 100644 --- a/drivers/edac/i82443bxgx_edac.c +++ b/drivers/edac/i82443bxgx_edac.c @@ -114,6 +114,12 @@ struct i82443bxgx_edacmc_error_info { static struct edac_pci_ctl_info *i82443bxgx_pci; +static struct pci_dev *mci_pdev; /* init dev: in case that AGP code has + * already registered driver + */ + +static int i82443bxgx_registered = 1; + static void i82443bxgx_edacmc_get_error_info(struct mem_ctl_info *mci, struct i82443bxgx_edacmc_error_info *info) @@ -345,10 +351,17 @@ EXPORT_SYMBOL_GPL(i82443bxgx_edacmc_probe1); static int __devinit i82443bxgx_edacmc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) { + int rc; + debugf0("MC: " __FILE__ ": %s()\n", __func__); /* don't need to call pci_device_enable() */ - return i82443bxgx_edacmc_probe1(pdev, ent->driver_data); + rc = i82443bxgx_edacmc_probe1(pdev, ent->driver_data); + + if (mci_pdev == NULL) + mci_pdev = pci_dev_get(pdev); + + return rc; } static void __devexit i82443bxgx_edacmc_remove_one(struct pci_dev *pdev) @@ -387,15 +400,61 @@ static struct pci_driver i82443bxgx_edacmc_driver = { static int __init i82443bxgx_edacmc_init(void) { + int pci_rc; /* Ensure that the OPSTATE is set correctly for POLL or NMI */ opstate_init(); - return pci_register_driver(&i82443bxgx_edacmc_driver); + pci_rc = pci_register_driver(&i82443bxgx_edacmc_driver); + if (pci_rc < 0) + goto fail0; + + if (mci_pdev == NULL) { + const struct pci_device_id *id = &i82443bxgx_pci_tbl[0]; + int i = 0; + i82443bxgx_registered = 0; + + while (mci_pdev == NULL && id->vendor != 0) { + mci_pdev = pci_get_device(id->vendor, + id->device, NULL); + i++; + id = &i82443bxgx_pci_tbl[i]; + } + if (!mci_pdev) { + debugf0("i82443bxgx pci_get_device fail\n"); + pci_rc = -ENODEV; + goto fail1; + } + + pci_rc = i82443bxgx_edacmc_init_one(mci_pdev, i82443bxgx_pci_tbl); + + if (pci_rc < 0) { + debugf0("i82443bxgx init fail\n"); + pci_rc = -ENODEV; + goto fail1; + } + } + + return 0; + +fail1: + pci_unregister_driver(&i82443bxgx_edacmc_driver); + +fail0: + if (mci_pdev != NULL) + pci_dev_put(mci_pdev); + + return pci_rc; } static void __exit i82443bxgx_edacmc_exit(void) { pci_unregister_driver(&i82443bxgx_edacmc_driver); + + if (!i82443bxgx_registered) + i82443bxgx_edacmc_remove_one(mci_pdev); + + if (mci_pdev) + pci_dev_put(mci_pdev); } module_init(i82443bxgx_edacmc_init); diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c index 2265d9ca1535..0cfcb2d075a0 100644 --- a/drivers/edac/mpc85xx_edac.c +++ b/drivers/edac/mpc85xx_edac.c @@ -17,6 +17,7 @@ #include <linux/io.h> #include <linux/mod_devicetable.h> #include <linux/edac.h> +#include <linux/smp.h> #include <linux/of_platform.h> #include <linux/of_device.h> @@ -40,7 +41,7 @@ static u32 orig_pci_err_en; #endif static u32 orig_l2_err_disable; -static u32 orig_hid1; +static u32 orig_hid1[2]; /************************ MC SYSFS parts ***********************************/ @@ -647,6 +648,9 @@ static struct of_device_id mpc85xx_l2_err_of_match[] = { { .compatible = "fsl,8568-l2-cache-controller", }, + { + .compatible = "fsl,mpc8572-l2-cache-controller", + }, {}, }; @@ -912,7 +916,8 @@ static int __devinit mpc85xx_mc_err_probe(struct of_device *op, /* register interrupts */ pdata->irq = irq_of_parse_and_map(op->node, 0); res = devm_request_irq(&op->dev, pdata->irq, - mpc85xx_mc_isr, IRQF_DISABLED, + mpc85xx_mc_isr, + IRQF_DISABLED | IRQF_SHARED, "[EDAC] MC err", mci); if (res < 0) { printk(KERN_ERR "%s: Unable to request irq %d for " @@ -980,6 +985,9 @@ static struct of_device_id mpc85xx_mc_err_of_match[] = { { .compatible = "fsl,8568-memory-controller", }, + { + .compatible = "fsl,mpc8572-memory-controller", + }, {}, }; @@ -995,6 +1003,14 @@ static struct of_platform_driver mpc85xx_mc_err_driver = { }, }; + +static void __init mpc85xx_mc_clear_rfxe(void *data) +{ + orig_hid1[smp_processor_id()] = mfspr(SPRN_HID1); + mtspr(SPRN_HID1, (orig_hid1[smp_processor_id()] & ~0x20000)); +} + + static int __init mpc85xx_mc_init(void) { int res = 0; @@ -1030,19 +1046,22 @@ static int __init mpc85xx_mc_init(void) * need to clear HID1[RFXE] to disable machine check int * so we can catch it */ - if (edac_op_state == EDAC_OPSTATE_INT) { - orig_hid1 = mfspr(SPRN_HID1); - mtspr(SPRN_HID1, (orig_hid1 & ~0x20000)); - } + if (edac_op_state == EDAC_OPSTATE_INT) + on_each_cpu(mpc85xx_mc_clear_rfxe, NULL, 0); return 0; } module_init(mpc85xx_mc_init); +static void __exit mpc85xx_mc_restore_hid1(void *data) +{ + mtspr(SPRN_HID1, orig_hid1[smp_processor_id()]); +} + static void __exit mpc85xx_mc_exit(void) { - mtspr(SPRN_HID1, orig_hid1); + on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0); #ifdef CONFIG_PCI of_unregister_platform_driver(&mpc85xx_pci_err_driver); #endif diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 8d2940517c99..9112830107a5 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -67,17 +67,28 @@ static inline void desc_set_label(struct gpio_desc *d, const char *label) * when setting direction, and otherwise illegal. Until board setup code * and drivers use explicit requests everywhere (which won't happen when * those calls have no teeth) we can't avoid autorequesting. This nag - * message should motivate switching to explicit requests... + * message should motivate switching to explicit requests... so should + * the weaker cleanup after faults, compared to gpio_request(). */ -static void gpio_ensure_requested(struct gpio_desc *desc) +static int gpio_ensure_requested(struct gpio_desc *desc, unsigned offset) { if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) { - pr_warning("GPIO-%d autorequested\n", (int)(desc - gpio_desc)); + struct gpio_chip *chip = desc->chip; + int gpio = chip->base + offset; + + if (!try_module_get(chip->owner)) { + pr_err("GPIO-%d: module can't be gotten \n", gpio); + clear_bit(FLAG_REQUESTED, &desc->flags); + /* lose */ + return -EIO; + } + pr_warning("GPIO-%d autorequested\n", gpio); desc_set_label(desc, "[auto]"); - if (!try_module_get(desc->chip->owner)) - pr_err("GPIO-%d: module can't be gotten \n", - (int)(desc - gpio_desc)); + /* caller must chip->request() w/o spinlock */ + if (chip->request) + return 1; } + return 0; } /* caller holds gpio_lock *OR* gpio is marked as requested */ @@ -752,6 +763,7 @@ EXPORT_SYMBOL_GPL(gpiochip_remove); int gpio_request(unsigned gpio, const char *label) { struct gpio_desc *desc; + struct gpio_chip *chip; int status = -EINVAL; unsigned long flags; @@ -760,14 +772,15 @@ int gpio_request(unsigned gpio, const char *label) if (!gpio_is_valid(gpio)) goto done; desc = &gpio_desc[gpio]; - if (desc->chip == NULL) + chip = desc->chip; + if (chip == NULL) goto done; - if (!try_module_get(desc->chip->owner)) + if (!try_module_get(chip->owner)) goto done; /* NOTE: gpio_request() can be called in early boot, - * before IRQs are enabled. + * before IRQs are enabled, for non-sleeping (SOC) GPIOs. */ if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) { @@ -775,7 +788,20 @@ int gpio_request(unsigned gpio, const char *label) status = 0; } else { status = -EBUSY; - module_put(desc->chip->owner); + module_put(chip->owner); + } + + if (chip->request) { + /* chip->request may sleep */ + spin_unlock_irqrestore(&gpio_lock, flags); + status = chip->request(chip, gpio - chip->base); + spin_lock_irqsave(&gpio_lock, flags); + + if (status < 0) { + desc_set_label(desc, NULL); + module_put(chip->owner); + clear_bit(FLAG_REQUESTED, &desc->flags); + } } done: @@ -791,6 +817,9 @@ void gpio_free(unsigned gpio) { unsigned long flags; struct gpio_desc *desc; + struct gpio_chip *chip; + + might_sleep(); if (!gpio_is_valid(gpio)) { WARN_ON(extra_checks); @@ -802,9 +831,17 @@ void gpio_free(unsigned gpio) spin_lock_irqsave(&gpio_lock, flags); desc = &gpio_desc[gpio]; - if (desc->chip && test_and_clear_bit(FLAG_REQUESTED, &desc->flags)) { + chip = desc->chip; + if (chip && test_bit(FLAG_REQUESTED, &desc->flags)) { + if (chip->free) { + spin_unlock_irqrestore(&gpio_lock, flags); + might_sleep_if(extra_checks && chip->can_sleep); + chip->free(chip, gpio - chip->base); + spin_lock_irqsave(&gpio_lock, flags); + } desc_set_label(desc, NULL); module_put(desc->chip->owner); + clear_bit(FLAG_REQUESTED, &desc->flags); } else WARN_ON(extra_checks); @@ -869,7 +906,9 @@ int gpio_direction_input(unsigned gpio) gpio -= chip->base; if (gpio >= chip->ngpio) goto fail; - gpio_ensure_requested(desc); + status = gpio_ensure_requested(desc, gpio); + if (status < 0) + goto fail; /* now we know the gpio is valid and chip won't vanish */ @@ -877,9 +916,22 @@ int gpio_direction_input(unsigned gpio) might_sleep_if(extra_checks && chip->can_sleep); + if (status) { + status = chip->request(chip, gpio); + if (status < 0) { + pr_debug("GPIO-%d: chip request fail, %d\n", + chip->base + gpio, status); + /* and it's not available to anyone else ... + * gpio_request() is the fully clean solution. + */ + goto lose; + } + } + status = chip->direction_input(chip, gpio); if (status == 0) clear_bit(FLAG_IS_OUT, &desc->flags); +lose: return status; fail: spin_unlock_irqrestore(&gpio_lock, flags); @@ -907,7 +959,9 @@ int gpio_direction_output(unsigned gpio, int value) gpio -= chip->base; if (gpio >= chip->ngpio) goto fail; - gpio_ensure_requested(desc); + status = gpio_ensure_requested(desc, gpio); + if (status < 0) + goto fail; /* now we know the gpio is valid and chip won't vanish */ @@ -915,9 +969,22 @@ int gpio_direction_output(unsigned gpio, int value) might_sleep_if(extra_checks && chip->can_sleep); + if (status) { + status = chip->request(chip, gpio); + if (status < 0) { + pr_debug("GPIO-%d: chip request fail, %d\n", + chip->base + gpio, status); + /* and it's not available to anyone else ... + * gpio_request() is the fully clean solution. + */ + goto lose; + } + } + status = chip->direction_output(chip, gpio, value); if (status == 0) set_bit(FLAG_IS_OUT, &desc->flags); +lose: return status; fail: spin_unlock_irqrestore(&gpio_lock, flags); @@ -1008,6 +1075,24 @@ int __gpio_cansleep(unsigned gpio) } EXPORT_SYMBOL_GPL(__gpio_cansleep); +/** + * __gpio_to_irq() - return the IRQ corresponding to a GPIO + * @gpio: gpio whose IRQ will be returned (already requested) + * Context: any + * + * This is used directly or indirectly to implement gpio_to_irq(). + * It returns the number of the IRQ signaled by this (input) GPIO, + * or a negative errno. + */ +int __gpio_to_irq(unsigned gpio) +{ + struct gpio_chip *chip; + + chip = gpio_to_chip(gpio); + return chip->to_irq ? chip->to_irq(chip, gpio - chip->base) : -ENXIO; +} +EXPORT_SYMBOL_GPL(__gpio_to_irq); + /* There's no value in making it easy to inline GPIO calls that may sleep. diff --git a/drivers/gpio/max7301.c b/drivers/gpio/max7301.c index 39c795ad8312..8b24d784db93 100644 --- a/drivers/gpio/max7301.c +++ b/drivers/gpio/max7301.c @@ -255,10 +255,6 @@ static int __devinit max7301_probe(struct spi_device *spi) ts->chip.dev = &spi->dev; ts->chip.owner = THIS_MODULE; - ret = gpiochip_add(&ts->chip); - if (ret) - goto exit_destroy; - /* * tristate all pins in hardware and cache the * register values for later use. @@ -269,17 +265,19 @@ static int __devinit max7301_probe(struct spi_device *spi) max7301_write(spi, 0x08 + i, 0xAA); ts->port_config[i] = 0xAA; for (j = 0; j < 4; j++) { - int idx = ts->chip.base + (i - 1) * 4 + j; - ret = gpio_direction_input(idx); + int offset = (i - 1) * 4 + j; + ret = max7301_direction_input(&ts->chip, offset); if (ret) - goto exit_remove; - gpio_free(idx); + goto exit_destroy; } } + + ret = gpiochip_add(&ts->chip); + if (ret) + goto exit_destroy; + return ret; -exit_remove: - gpiochip_remove(&ts->chip); exit_destroy: dev_set_drvdata(&spi->dev, NULL); mutex_destroy(&ts->lock); @@ -325,13 +323,15 @@ static int __init max7301_init(void) { return spi_register_driver(&max7301_driver); } +/* register after spi postcore initcall and before + * subsys initcalls that may rely on these GPIOs + */ +subsys_initcall(max7301_init); static void __exit max7301_exit(void) { spi_unregister_driver(&max7301_driver); } - -module_init(max7301_init); module_exit(max7301_exit); MODULE_AUTHOR("Juergen Beisert"); diff --git a/drivers/gpio/max732x.c b/drivers/gpio/max732x.c index b51c8135ca28..55ae9a41897a 100644 --- a/drivers/gpio/max732x.c +++ b/drivers/gpio/max732x.c @@ -372,7 +372,10 @@ static int __init max732x_init(void) { return i2c_add_driver(&max732x_driver); } -module_init(max732x_init); +/* register after i2c postcore initcall and before + * subsys initcalls that may rely on these GPIOs + */ +subsys_initcall(max732x_init); static void __exit max732x_exit(void) { diff --git a/drivers/gpio/mcp23s08.c b/drivers/gpio/mcp23s08.c index 8a1b405fefda..89c1d222e9d1 100644 --- a/drivers/gpio/mcp23s08.c +++ b/drivers/gpio/mcp23s08.c @@ -419,7 +419,10 @@ static int __init mcp23s08_init(void) { return spi_register_driver(&mcp23s08_driver); } -module_init(mcp23s08_init); +/* register after spi postcore initcall and before + * subsys initcalls that may rely on these GPIOs + */ +subsys_initcall(mcp23s08_init); static void __exit mcp23s08_exit(void) { diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c index cc8468692ae0..9ceeb89f1325 100644 --- a/drivers/gpio/pca953x.c +++ b/drivers/gpio/pca953x.c @@ -289,7 +289,10 @@ static int __init pca953x_init(void) { return i2c_add_driver(&pca953x_driver); } -module_init(pca953x_init); +/* register after i2c postcore initcall and before + * subsys initcalls that may rely on these GPIOs + */ +subsys_initcall(pca953x_init); static void __exit pca953x_exit(void) { diff --git a/drivers/gpio/pcf857x.c b/drivers/gpio/pcf857x.c index fc9c6ae739ee..4bc2070dd4a1 100644 --- a/drivers/gpio/pcf857x.c +++ b/drivers/gpio/pcf857x.c @@ -351,7 +351,10 @@ static int __init pcf857x_init(void) { return i2c_add_driver(&pcf857x_driver); } -module_init(pcf857x_init); +/* register after i2c postcore initcall and before + * subsys initcalls that may rely on these GPIOs + */ +subsys_initcall(pcf857x_init); static void __exit pcf857x_exit(void) { diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 88974342933c..9ac4720e647b 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -517,7 +517,7 @@ static int i915_dispatch_flip(struct drm_device * dev) RING_LOCALS; DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n", - __FUNCTION__, + __func__, dev_priv->current_page, dev_priv->sarea_priv->pf_current_page); @@ -642,7 +642,7 @@ static int i915_cmdbuffer(struct drm_device *dev, void *data, static int i915_flip_bufs(struct drm_device *dev, void *data, struct drm_file *file_priv) { - DRM_DEBUG("%s\n", __FUNCTION__); + DRM_DEBUG("%s\n", __func__); LOCK_TEST_WITH_RETURN(dev, file_priv); diff --git a/drivers/hid/Kconfig b/drivers/hid/Kconfig index da64108de775..f5999a91614e 100644 --- a/drivers/hid/Kconfig +++ b/drivers/hid/Kconfig @@ -17,25 +17,6 @@ config HID tristate "Generic HID support" depends on INPUT default y - select HID_A4TECH if !EMBEDDED - select HID_APPLE if !EMBEDDED - select HID_BELKIN if !EMBEDDED - select HID_BRIGHT if !EMBEDDED - select HID_CHERRY if !EMBEDDED - select HID_CHICONY if !EMBEDDED - select HID_CYPRESS if !EMBEDDED - select HID_DELL if !EMBEDDED - select HID_EZKEY if !EMBEDDED - select HID_GYRATION if !EMBEDDED - select HID_LOGITECH if !EMBEDDED - select HID_MICROSOFT if !EMBEDDED - select HID_MONTEREY if !EMBEDDED - select HID_PANTHERLORD if !EMBEDDED - select HID_PETALYNX if !EMBEDDED - select HID_SAMSUNG if !EMBEDDED - select HID_SONY if !EMBEDDED - select HID_SUNPLUS if !EMBEDDED - ---help--- A human interface device (HID) is a type of computer device that interacts directly with and takes input from humans. The term "HID" @@ -102,89 +83,86 @@ config HID_COMPAT If unsure, say Y. config HID_A4TECH - tristate "A4 tech" - default m + tristate "A4 tech" if EMBEDDED depends on USB_HID + default y ---help--- Support for A4 tech X5 and WOP-35 / Trust 450L mice. config HID_APPLE - tristate "Apple" - default m + tristate "Apple" if EMBEDDED depends on (USB_HID || BT_HIDP) + default y ---help--- Support for some Apple devices which less or more break HID specification. - Say Y here if you want support for the special keys (Fn, Numlock) on - Apple iBooks, PowerBooks, MacBooks, MacBook Pros and aluminum USB - keyboards. - - If unsure, say M. + Say Y here if you want support for keyboards of Apple iBooks, PowerBooks, + MacBooks, MacBook Pros and Apple Aluminum. config HID_BELKIN - tristate "Belkin" - default m + tristate "Belkin" if EMBEDDED depends on USB_HID + default y ---help--- Support for Belkin Flip KVM and Wireless keyboard. config HID_BRIGHT - tristate "Bright" - default m + tristate "Bright" if EMBEDDED depends on USB_HID + default y ---help--- Support for Bright ABNT-2 keyboard. config HID_CHERRY - tristate "Cherry" - default m + tristate "Cherry" if EMBEDDED depends on USB_HID + default y ---help--- - Support for Cherry Cymotion. + Support for Cherry Cymotion keyboard. config HID_CHICONY - tristate "Chicony" - default m + tristate "Chicony" if EMBEDDED depends on USB_HID + default y ---help--- Support for Chicony Tactical pad. config HID_CYPRESS - tristate "Cypress" - default m + tristate "Cypress" if EMBEDDED depends on USB_HID + default y ---help--- - Support for Cypress mouse and barcodes. + Support for cypress mouse and barcode readers. config HID_DELL - tristate "Dell" - default m + tristate "Dell" if EMBEDDED depends on USB_HID + default y ---help--- - Support for Dell W7658. + Support for quirky Dell HID hardware that require + special LED handling (W7658 and SK8115 models) config HID_EZKEY - tristate "Ezkey" - default m + tristate "Ezkey" if EMBEDDED depends on USB_HID + default y ---help--- - Support for Ezkey mouse and barcodes. + Support for Ezkey BTC 8193 keyboard. config HID_GYRATION - tristate "Gyration" - default m + tristate "Gyration" if EMBEDDED depends on USB_HID + default y ---help--- - Support for Gyration remote. + Support for Gyration remote control. config HID_LOGITECH - tristate "Logitech" - default m + tristate "Logitech" if EMBEDDED depends on USB_HID + default y ---help--- - Support for some Logitech devices which breaks less or more - HID specification. + Support for Logitech devices that are not fully compliant with HID standard. config LOGITECH_FF bool "Logitech force feedback" @@ -211,28 +189,26 @@ config LOGIRUMBLEPAD2_FF Rumblepad 2 devices. config HID_MICROSOFT - tristate "Microsoft" - default m + tristate "Microsoft" if EMBEDDED depends on USB_HID + default y ---help--- - Support for some Microsoft devices which breaks less or more - HID specification. + Support for Microsoft devices that are not fully compliant with HID standard. config HID_MONTEREY - tristate "Monterey" - default m + tristate "Monterey" if EMBEDDED depends on USB_HID + default y ---help--- Support for Monterey Genius KB29E. config HID_PANTHERLORD - tristate "Pantherlord devices support" - default m + tristate "Pantherlord devices support" if EMBEDDED depends on USB_HID + default y ---help--- Support for PantherLord/GreenAsia based device support. - config PANTHERLORD_FF bool "Pantherlord force feedback support" depends on HID_PANTHERLORD @@ -242,32 +218,32 @@ config PANTHERLORD_FF or adapter and want to enable force feedback support for it. config HID_PETALYNX - tristate "Petalynx" - default m + tristate "Petalynx" if EMBEDDED depends on USB_HID + default y ---help--- - Support for Petalynx Maxter remote. + Support for Petalynx Maxter remote control. config HID_SAMSUNG - tristate "Samsung" - default m + tristate "Samsung" if EMBEDDED depends on USB_HID + default y ---help--- - Support for Samsung IR remote. + Support for Samsung InfraRed remote control. config HID_SONY - tristate "Sony" - default m + tristate "Sony" if EMBEDDED depends on USB_HID + default y ---help--- Support for Sony PS3 controller. config HID_SUNPLUS - tristate "Sunplus" - default m + tristate "Sunplus" if EMBEDDED depends on USB_HID + default y ---help--- - Support for Sunplus WDesktop input device. + Support for Sunplus wireless desktop. config THRUSTMASTER_FF tristate "ThrustMaster devices support" diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c index 8a7d9dbb4d07..721a36d97582 100644 --- a/drivers/hid/hid-core.c +++ b/drivers/hid/hid-core.c @@ -1518,6 +1518,8 @@ static const struct hid_device_id hid_ignore_list[] = { { HID_USB_DEVICE(USB_VENDOR_ID_PANJIT, 0x0003) }, { HID_USB_DEVICE(USB_VENDOR_ID_PANJIT, 0x0004) }, { HID_USB_DEVICE(USB_VENDOR_ID_SOUNDGRAPH, USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD) }, + { HID_USB_DEVICE(USB_VENDOR_ID_SOUNDGRAPH, USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD2) }, + { HID_USB_DEVICE(USB_VENDOR_ID_SOUNDGRAPH, USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD3) }, { HID_USB_DEVICE(USB_VENDOR_ID_TENX, USB_DEVICE_ID_TENX_IBUDDY1) }, { HID_USB_DEVICE(USB_VENDOR_ID_TENX, USB_DEVICE_ID_TENX_IBUDDY2) }, { HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb300) }, diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h index aad9ed1b406e..d9a1ba920c23 100644 --- a/drivers/hid/hid-ids.h +++ b/drivers/hid/hid-ids.h @@ -354,6 +354,8 @@ #define USB_VENDOR_ID_SOUNDGRAPH 0x15c2 #define USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD 0x0038 +#define USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD2 0x0036 +#define USB_DEVICE_ID_SOUNDGRAPH_IMON_LCD3 0x0034 #define USB_VENDOR_ID_SUN 0x0430 #define USB_DEVICE_ID_RARITAN_KVM_DONGLE 0xcdab diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index e7eb7bf9ddec..608038d64f81 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -589,11 +589,16 @@ omap_i2c_probe(struct platform_device *pdev) dev->dev = &pdev->dev; dev->irq = irq->start; - dev->base = (void __iomem *) IO_ADDRESS(mem->start); + dev->base = ioremap(mem->start, mem->end - mem->start + 1); + if (!dev->base) { + r = -ENOMEM; + goto err_free_mem; + } + platform_set_drvdata(pdev, dev); if ((r = omap_i2c_get_clocks(dev)) != 0) - goto err_free_mem; + goto err_iounmap; omap_i2c_unidle(dev); @@ -640,6 +645,8 @@ err_unuse_clocks: omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); omap_i2c_idle(dev); omap_i2c_put_clocks(dev); +err_iounmap: + iounmap(dev->base); err_free_mem: platform_set_drvdata(pdev, NULL); kfree(dev); @@ -661,6 +668,7 @@ omap_i2c_remove(struct platform_device *pdev) i2c_del_adapter(&dev->adapter); omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); omap_i2c_put_clocks(dev); + iounmap(dev->base); kfree(dev); mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); release_mem_region(mem->start, (mem->end - mem->start) + 1); diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig index 6c6dd2facede..74a369a6116f 100644 --- a/drivers/ide/Kconfig +++ b/drivers/ide/Kconfig @@ -4,7 +4,7 @@ # Select HAVE_IDE if IDE is supported config HAVE_IDE - def_bool n + bool menuconfig IDE tristate "ATA/ATAPI/MFM/RLL support" diff --git a/drivers/input/gameport/gameport.c b/drivers/input/gameport/gameport.c index 078e4eed0894..2880eaae157a 100644 --- a/drivers/input/gameport/gameport.c +++ b/drivers/input/gameport/gameport.c @@ -231,6 +231,7 @@ static void gameport_find_driver(struct gameport *gameport) enum gameport_event_type { GAMEPORT_REGISTER_PORT, GAMEPORT_REGISTER_DRIVER, + GAMEPORT_ATTACH_DRIVER, }; struct gameport_event { @@ -245,11 +246,12 @@ static LIST_HEAD(gameport_event_list); static DECLARE_WAIT_QUEUE_HEAD(gameport_wait); static struct task_struct *gameport_task; -static void gameport_queue_event(void *object, struct module *owner, - enum gameport_event_type event_type) +static int gameport_queue_event(void *object, struct module *owner, + enum gameport_event_type event_type) { unsigned long flags; struct gameport_event *event; + int retval = 0; spin_lock_irqsave(&gameport_event_lock, flags); @@ -268,24 +270,34 @@ static void gameport_queue_event(void *object, struct module *owner, } } - if ((event = kmalloc(sizeof(struct gameport_event), GFP_ATOMIC))) { - if (!try_module_get(owner)) { - printk(KERN_WARNING "gameport: Can't get module reference, dropping event %d\n", event_type); - kfree(event); - goto out; - } - - event->type = event_type; - event->object = object; - event->owner = owner; + event = kmalloc(sizeof(struct gameport_event), GFP_ATOMIC); + if (!event) { + printk(KERN_ERR + "gameport: Not enough memory to queue event %d\n", + event_type); + retval = -ENOMEM; + goto out; + } - list_add_tail(&event->node, &gameport_event_list); - wake_up(&gameport_wait); - } else { - printk(KERN_ERR "gameport: Not enough memory to queue event %d\n", event_type); + if (!try_module_get(owner)) { + printk(KERN_WARNING + "gameport: Can't get module reference, dropping event %d\n", + event_type); + kfree(event); + retval = -EINVAL; + goto out; } + + event->type = event_type; + event->object = object; + event->owner = owner; + + list_add_tail(&event->node, &gameport_event_list); + wake_up(&gameport_wait); + out: spin_unlock_irqrestore(&gameport_event_lock, flags); + return retval; } static void gameport_free_event(struct gameport_event *event) @@ -378,9 +390,10 @@ static void gameport_handle_event(void) } /* - * Remove all events that have been submitted for a given gameport port. + * Remove all events that have been submitted for a given object, + * be it a gameport port or a driver. */ -static void gameport_remove_pending_events(struct gameport *gameport) +static void gameport_remove_pending_events(void *object) { struct list_head *node, *next; struct gameport_event *event; @@ -390,7 +403,7 @@ static void gameport_remove_pending_events(struct gameport *gameport) list_for_each_safe(node, next, &gameport_event_list) { event = list_entry(node, struct gameport_event, node); - if (event->object == gameport) { + if (event->object == object) { list_del_init(node); gameport_free_event(event); } @@ -705,10 +718,40 @@ static void gameport_add_driver(struct gameport_driver *drv) drv->driver.name, error); } -void __gameport_register_driver(struct gameport_driver *drv, struct module *owner) +int __gameport_register_driver(struct gameport_driver *drv, struct module *owner, + const char *mod_name) { + int error; + drv->driver.bus = &gameport_bus; - gameport_queue_event(drv, owner, GAMEPORT_REGISTER_DRIVER); + drv->driver.owner = owner; + drv->driver.mod_name = mod_name; + + /* + * Temporarily disable automatic binding because probing + * takes long time and we are better off doing it in kgameportd + */ + drv->ignore = 1; + + error = driver_register(&drv->driver); + if (error) { + printk(KERN_ERR + "gameport: driver_register() failed for %s, error: %d\n", + drv->driver.name, error); + return error; + } + + /* + * Reset ignore flag and let kgameportd bind the driver to free ports + */ + drv->ignore = 0; + error = gameport_queue_event(drv, NULL, GAMEPORT_ATTACH_DRIVER); + if (error) { + driver_unregister(&drv->driver); + return error; + } + + return 0; } void gameport_unregister_driver(struct gameport_driver *drv) @@ -716,7 +759,9 @@ void gameport_unregister_driver(struct gameport_driver *drv) struct gameport *gameport; mutex_lock(&gameport_mutex); + drv->ignore = 1; /* so gameport_find_driver ignores it */ + gameport_remove_pending_events(drv); start_over: list_for_each_entry(gameport, &gameport_list, node) { @@ -729,6 +774,7 @@ start_over: } driver_unregister(&drv->driver); + mutex_unlock(&gameport_mutex); } diff --git a/drivers/input/joystick/a3d.c b/drivers/input/joystick/a3d.c index 92498d470b1f..6489f4010c4f 100644 --- a/drivers/input/joystick/a3d.c +++ b/drivers/input/joystick/a3d.c @@ -414,8 +414,7 @@ static struct gameport_driver a3d_drv = { static int __init a3d_init(void) { - gameport_register_driver(&a3d_drv); - return 0; + return gameport_register_driver(&a3d_drv); } static void __exit a3d_exit(void) diff --git a/drivers/input/joystick/adi.c b/drivers/input/joystick/adi.c index d1ca8a14950f..89c4c084d4ad 100644 --- a/drivers/input/joystick/adi.c +++ b/drivers/input/joystick/adi.c @@ -572,8 +572,7 @@ static struct gameport_driver adi_drv = { static int __init adi_init(void) { - gameport_register_driver(&adi_drv); - return 0; + return gameport_register_driver(&adi_drv); } static void __exit adi_exit(void) diff --git a/drivers/input/joystick/analog.c b/drivers/input/joystick/analog.c index 708c5ae13b24..356b3a25efa2 100644 --- a/drivers/input/joystick/analog.c +++ b/drivers/input/joystick/analog.c @@ -761,9 +761,7 @@ static struct gameport_driver analog_drv = { static int __init analog_init(void) { analog_parse_options(); - gameport_register_driver(&analog_drv); - - return 0; + return gameport_register_driver(&analog_drv); } static void __exit analog_exit(void) diff --git a/drivers/input/joystick/cobra.c b/drivers/input/joystick/cobra.c index 639b975a8ed7..3497b87c3d05 100644 --- a/drivers/input/joystick/cobra.c +++ b/drivers/input/joystick/cobra.c @@ -263,8 +263,7 @@ static struct gameport_driver cobra_drv = { static int __init cobra_init(void) { - gameport_register_driver(&cobra_drv); - return 0; + return gameport_register_driver(&cobra_drv); } static void __exit cobra_exit(void) diff --git a/drivers/input/joystick/gf2k.c b/drivers/input/joystick/gf2k.c index cb6eef1f2d99..67c207f5b1a1 100644 --- a/drivers/input/joystick/gf2k.c +++ b/drivers/input/joystick/gf2k.c @@ -375,8 +375,7 @@ static struct gameport_driver gf2k_drv = { static int __init gf2k_init(void) { - gameport_register_driver(&gf2k_drv); - return 0; + return gameport_register_driver(&gf2k_drv); } static void __exit gf2k_exit(void) diff --git a/drivers/input/joystick/grip.c b/drivers/input/joystick/grip.c index 684e07cfccc8..fc55899ba6c5 100644 --- a/drivers/input/joystick/grip.c +++ b/drivers/input/joystick/grip.c @@ -426,8 +426,7 @@ static struct gameport_driver grip_drv = { static int __init grip_init(void) { - gameport_register_driver(&grip_drv); - return 0; + return gameport_register_driver(&grip_drv); } static void __exit grip_exit(void) diff --git a/drivers/input/joystick/grip_mp.c b/drivers/input/joystick/grip_mp.c index 8279481b16e7..2d47baf47769 100644 --- a/drivers/input/joystick/grip_mp.c +++ b/drivers/input/joystick/grip_mp.c @@ -689,8 +689,7 @@ static struct gameport_driver grip_drv = { static int __init grip_init(void) { - gameport_register_driver(&grip_drv); - return 0; + return gameport_register_driver(&grip_drv); } static void __exit grip_exit(void) diff --git a/drivers/input/joystick/guillemot.c b/drivers/input/joystick/guillemot.c index 25ec3fad9f27..4058d4b272fe 100644 --- a/drivers/input/joystick/guillemot.c +++ b/drivers/input/joystick/guillemot.c @@ -283,8 +283,7 @@ static struct gameport_driver guillemot_drv = { static int __init guillemot_init(void) { - gameport_register_driver(&guillemot_drv); - return 0; + return gameport_register_driver(&guillemot_drv); } static void __exit guillemot_exit(void) diff --git a/drivers/input/joystick/interact.c b/drivers/input/joystick/interact.c index 8c3290b68205..2478289aeeea 100644 --- a/drivers/input/joystick/interact.c +++ b/drivers/input/joystick/interact.c @@ -317,8 +317,7 @@ static struct gameport_driver interact_drv = { static int __init interact_init(void) { - gameport_register_driver(&interact_drv); - return 0; + return gameport_register_driver(&interact_drv); } static void __exit interact_exit(void) diff --git a/drivers/input/joystick/joydump.c b/drivers/input/joystick/joydump.c index 2a1b82c8b31c..cd894a0564a2 100644 --- a/drivers/input/joystick/joydump.c +++ b/drivers/input/joystick/joydump.c @@ -161,8 +161,7 @@ static struct gameport_driver joydump_drv = { static int __init joydump_init(void) { - gameport_register_driver(&joydump_drv); - return 0; + return gameport_register_driver(&joydump_drv); } static void __exit joydump_exit(void) diff --git a/drivers/input/joystick/sidewinder.c b/drivers/input/joystick/sidewinder.c index 7b4865fdee54..ca13a6bec33e 100644 --- a/drivers/input/joystick/sidewinder.c +++ b/drivers/input/joystick/sidewinder.c @@ -818,8 +818,7 @@ static struct gameport_driver sw_drv = { static int __init sw_init(void) { - gameport_register_driver(&sw_drv); - return 0; + return gameport_register_driver(&sw_drv); } static void __exit sw_exit(void) diff --git a/drivers/input/joystick/tmdc.c b/drivers/input/joystick/tmdc.c index 60c37bcb938d..d6c609807115 100644 --- a/drivers/input/joystick/tmdc.c +++ b/drivers/input/joystick/tmdc.c @@ -438,8 +438,7 @@ static struct gameport_driver tmdc_drv = { static int __init tmdc_init(void) { - gameport_register_driver(&tmdc_drv); - return 0; + return gameport_register_driver(&tmdc_drv); } static void __exit tmdc_exit(void) diff --git a/drivers/input/joystick/xpad.c b/drivers/input/joystick/xpad.c index 6791be81eb29..839d1c9622f6 100644 --- a/drivers/input/joystick/xpad.c +++ b/drivers/input/joystick/xpad.c @@ -455,10 +455,10 @@ static void xpad_bulk_out(struct urb *urb) case -ENOENT: case -ESHUTDOWN: /* this urb is terminated, clean up */ - dbg("%s - urb shutting down with status: %d", __FUNCTION__, urb->status); + dbg("%s - urb shutting down with status: %d", __func__, urb->status); break; default: - dbg("%s - nonzero urb status received: %d", __FUNCTION__, urb->status); + dbg("%s - nonzero urb status received: %d", __func__, urb->status); } } diff --git a/drivers/input/keyboard/atkbd.c b/drivers/input/keyboard/atkbd.c index b1ce10f50bcf..22016ca15351 100644 --- a/drivers/input/keyboard/atkbd.c +++ b/drivers/input/keyboard/atkbd.c @@ -834,10 +834,10 @@ static void atkbd_disconnect(struct serio *serio) } /* - * Most special keys (Fn+F?) on Dell Latitudes do not generate release + * Most special keys (Fn+F?) on Dell laptops do not generate release * events so we have to do it ourselves. */ -static void atkbd_latitude_keymap_fixup(struct atkbd *atkbd) +static void atkbd_dell_laptop_keymap_fixup(struct atkbd *atkbd) { const unsigned int forced_release_keys[] = { 0x85, 0x86, 0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8f, 0x93, @@ -1207,15 +1207,13 @@ static ssize_t atkbd_set_extra(struct atkbd *atkbd, const char *buf, size_t coun { struct input_dev *old_dev, *new_dev; unsigned long value; - char *rest; int err; unsigned char old_extra, old_set; if (!atkbd->write) return -EIO; - value = simple_strtoul(buf, &rest, 10); - if (*rest || value > 1) + if (strict_strtoul(buf, 10, &value) || value > 1) return -EINVAL; if (atkbd->extra != value) { @@ -1264,12 +1262,10 @@ static ssize_t atkbd_set_scroll(struct atkbd *atkbd, const char *buf, size_t cou { struct input_dev *old_dev, *new_dev; unsigned long value; - char *rest; int err; unsigned char old_scroll; - value = simple_strtoul(buf, &rest, 10); - if (*rest || value > 1) + if (strict_strtoul(buf, 10, &value) || value > 1) return -EINVAL; if (atkbd->scroll != value) { @@ -1310,15 +1306,13 @@ static ssize_t atkbd_set_set(struct atkbd *atkbd, const char *buf, size_t count) { struct input_dev *old_dev, *new_dev; unsigned long value; - char *rest; int err; unsigned char old_set, old_extra; if (!atkbd->write) return -EIO; - value = simple_strtoul(buf, &rest, 10); - if (*rest || (value != 2 && value != 3)) + if (strict_strtoul(buf, 10, &value) || (value != 2 && value != 3)) return -EINVAL; if (atkbd->set != value) { @@ -1361,15 +1355,13 @@ static ssize_t atkbd_set_softrepeat(struct atkbd *atkbd, const char *buf, size_t { struct input_dev *old_dev, *new_dev; unsigned long value; - char *rest; int err; unsigned char old_softrepeat, old_softraw; if (!atkbd->write) return -EIO; - value = simple_strtoul(buf, &rest, 10); - if (*rest || value > 1) + if (strict_strtoul(buf, 10, &value) || value > 1) return -EINVAL; if (atkbd->softrepeat != value) { @@ -1413,12 +1405,10 @@ static ssize_t atkbd_set_softraw(struct atkbd *atkbd, const char *buf, size_t co { struct input_dev *old_dev, *new_dev; unsigned long value; - char *rest; int err; unsigned char old_softraw; - value = simple_strtoul(buf, &rest, 10); - if (*rest || value > 1) + if (strict_strtoul(buf, 10, &value) || value > 1) return -EINVAL; if (atkbd->softraw != value) { @@ -1461,13 +1451,13 @@ static int __init atkbd_setup_fixup(const struct dmi_system_id *id) static struct dmi_system_id atkbd_dmi_quirk_table[] __initdata = { { - .ident = "Dell Latitude series", + .ident = "Dell Laptop", .matches = { DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), - DMI_MATCH(DMI_PRODUCT_NAME, "Latitude"), + DMI_MATCH(DMI_CHASSIS_TYPE, "8"), /* Portable */ }, .callback = atkbd_setup_fixup, - .driver_data = atkbd_latitude_keymap_fixup, + .driver_data = atkbd_dell_laptop_keymap_fixup, }, { .ident = "HP 2133", diff --git a/drivers/input/keyboard/bf54x-keys.c b/drivers/input/keyboard/bf54x-keys.c index e348cfccc17a..19284016e0f4 100644 --- a/drivers/input/keyboard/bf54x-keys.c +++ b/drivers/input/keyboard/bf54x-keys.c @@ -8,7 +8,7 @@ * * * Modified: - * Copyright 2007 Analog Devices Inc. + * Copyright 2007-2008 Analog Devices Inc. * * Bugs: Enter bugs at http://blackfin.uclinux.org/ * @@ -81,6 +81,9 @@ struct bf54x_kpad { unsigned short *keycode; struct timer_list timer; unsigned int keyup_test_jiffies; + unsigned short kpad_msel; + unsigned short kpad_prescale; + unsigned short kpad_ctl; }; static inline int bfin_kpad_find_key(struct bf54x_kpad *bf54x_kpad, @@ -360,6 +363,10 @@ static int bfin_kpad_suspend(struct platform_device *pdev, pm_message_t state) { struct bf54x_kpad *bf54x_kpad = platform_get_drvdata(pdev); + bf54x_kpad->kpad_msel = bfin_read_KPAD_MSEL(); + bf54x_kpad->kpad_prescale = bfin_read_KPAD_PRESCALE(); + bf54x_kpad->kpad_ctl = bfin_read_KPAD_CTL(); + if (device_may_wakeup(&pdev->dev)) enable_irq_wake(bf54x_kpad->irq); @@ -370,6 +377,10 @@ static int bfin_kpad_resume(struct platform_device *pdev) { struct bf54x_kpad *bf54x_kpad = platform_get_drvdata(pdev); + bfin_write_KPAD_MSEL(bf54x_kpad->kpad_msel); + bfin_write_KPAD_PRESCALE(bf54x_kpad->kpad_prescale); + bfin_write_KPAD_CTL(bf54x_kpad->kpad_ctl); + if (device_may_wakeup(&pdev->dev)) disable_irq_wake(bf54x_kpad->irq); diff --git a/drivers/input/keyboard/gpio_keys.c b/drivers/input/keyboard/gpio_keys.c index ec96b369dd7a..05f3f43582c2 100644 --- a/drivers/input/keyboard/gpio_keys.c +++ b/drivers/input/keyboard/gpio_keys.c @@ -36,9 +36,10 @@ struct gpio_keys_drvdata { struct gpio_button_data data[0]; }; -static void gpio_keys_report_event(struct gpio_keys_button *button, - struct input_dev *input) +static void gpio_keys_report_event(struct gpio_button_data *bdata) { + struct gpio_keys_button *button = bdata->button; + struct input_dev *input = bdata->input; unsigned int type = button->type ?: EV_KEY; int state = (gpio_get_value(button->gpio) ? 1 : 0) ^ button->active_low; @@ -50,34 +51,23 @@ static void gpio_check_button(unsigned long _data) { struct gpio_button_data *data = (struct gpio_button_data *)_data; - gpio_keys_report_event(data->button, data->input); + gpio_keys_report_event(data); } static irqreturn_t gpio_keys_isr(int irq, void *dev_id) { - struct platform_device *pdev = dev_id; - struct gpio_keys_platform_data *pdata = pdev->dev.platform_data; - struct gpio_keys_drvdata *ddata = platform_get_drvdata(pdev); - int i; + struct gpio_button_data *bdata = dev_id; + struct gpio_keys_button *button = bdata->button; - for (i = 0; i < pdata->nbuttons; i++) { - struct gpio_keys_button *button = &pdata->buttons[i]; + BUG_ON(irq != gpio_to_irq(button->gpio)); - if (irq == gpio_to_irq(button->gpio)) { - struct gpio_button_data *bdata = &ddata->data[i]; - - if (button->debounce_interval) - mod_timer(&bdata->timer, - jiffies + - msecs_to_jiffies(button->debounce_interval)); - else - gpio_keys_report_event(button, bdata->input); - - return IRQ_HANDLED; - } - } + if (button->debounce_interval) + mod_timer(&bdata->timer, + jiffies + msecs_to_jiffies(button->debounce_interval)); + else + gpio_keys_report_event(bdata); - return IRQ_NONE; + return IRQ_HANDLED; } static int __devinit gpio_keys_probe(struct platform_device *pdev) @@ -151,7 +141,7 @@ static int __devinit gpio_keys_probe(struct platform_device *pdev) IRQF_SAMPLE_RANDOM | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, button->desc ? button->desc : "gpio_keys", - pdev); + bdata); if (error) { pr_err("gpio-keys: Unable to claim irq %d; error %d\n", irq, error); @@ -178,7 +168,7 @@ static int __devinit gpio_keys_probe(struct platform_device *pdev) fail2: while (--i >= 0) { - free_irq(gpio_to_irq(pdata->buttons[i].gpio), pdev); + free_irq(gpio_to_irq(pdata->buttons[i].gpio), &ddata->data[i]); if (pdata->buttons[i].debounce_interval) del_timer_sync(&ddata->data[i].timer); gpio_free(pdata->buttons[i].gpio); @@ -203,7 +193,7 @@ static int __devexit gpio_keys_remove(struct platform_device *pdev) for (i = 0; i < pdata->nbuttons; i++) { int irq = gpio_to_irq(pdata->buttons[i].gpio); - free_irq(irq, pdev); + free_irq(irq, &ddata->data[i]); if (pdata->buttons[i].debounce_interval) del_timer_sync(&ddata->data[i].timer); gpio_free(pdata->buttons[i].gpio); diff --git a/drivers/input/keyboard/omap-keypad.c b/drivers/input/keyboard/omap-keypad.c index dcea87a0bc56..69e674ecf19a 100644 --- a/drivers/input/keyboard/omap-keypad.c +++ b/drivers/input/keyboard/omap-keypad.c @@ -62,7 +62,7 @@ struct omap_kp { unsigned int debounce; }; -DECLARE_TASKLET_DISABLED(kp_tasklet, omap_kp_tasklet, 0); +static DECLARE_TASKLET_DISABLED(kp_tasklet, omap_kp_tasklet, 0); static int *keymap; static unsigned int *row_gpios; @@ -72,12 +72,9 @@ static unsigned int *col_gpios; static void set_col_gpio_val(struct omap_kp *omap_kp, u8 value) { int col; - for (col = 0; col < omap_kp->cols; col++) { - if (value & (1 << col)) - omap_set_gpio_dataout(col_gpios[col], 1); - else - omap_set_gpio_dataout(col_gpios[col], 0); - } + + for (col = 0; col < omap_kp->cols; col++) + gpio_set_value(col_gpios[col], value & (1 << col)); } static u8 get_row_gpio_val(struct omap_kp *omap_kp) @@ -86,7 +83,7 @@ static u8 get_row_gpio_val(struct omap_kp *omap_kp) u8 value = 0; for (row = 0; row < omap_kp->rows; row++) { - if (omap_get_gpio_datain(row_gpios[row])) + if (gpio_get_value(row_gpios[row])) value |= (1 << row); } return value; @@ -333,23 +330,23 @@ static int __init omap_kp_probe(struct platform_device *pdev) if (cpu_is_omap24xx()) { /* Cols: outputs */ for (col_idx = 0; col_idx < omap_kp->cols; col_idx++) { - if (omap_request_gpio(col_gpios[col_idx]) < 0) { + if (gpio_request(col_gpios[col_idx], "omap_kp_col") < 0) { printk(KERN_ERR "Failed to request" "GPIO%d for keypad\n", col_gpios[col_idx]); goto err1; } - omap_set_gpio_direction(col_gpios[col_idx], 0); + gpio_direction_output(col_gpios[col_idx], 0); } /* Rows: inputs */ for (row_idx = 0; row_idx < omap_kp->rows; row_idx++) { - if (omap_request_gpio(row_gpios[row_idx]) < 0) { + if (gpio_request(row_gpios[row_idx], "omap_kp_row") < 0) { printk(KERN_ERR "Failed to request" "GPIO%d for keypad\n", row_gpios[row_idx]); goto err2; } - omap_set_gpio_direction(row_gpios[row_idx], 1); + gpio_direction_input(row_gpios[row_idx]); } } else { col_idx = 0; @@ -418,10 +415,10 @@ err3: device_remove_file(&pdev->dev, &dev_attr_enable); err2: for (i = row_idx - 1; i >=0; i--) - omap_free_gpio(row_gpios[i]); + gpio_free(row_gpios[i]); err1: for (i = col_idx - 1; i >=0; i--) - omap_free_gpio(col_gpios[i]); + gpio_free(col_gpios[i]); kfree(omap_kp); input_free_device(input_dev); @@ -438,9 +435,9 @@ static int omap_kp_remove(struct platform_device *pdev) if (cpu_is_omap24xx()) { int i; for (i = 0; i < omap_kp->cols; i++) - omap_free_gpio(col_gpios[i]); + gpio_free(col_gpios[i]); for (i = 0; i < omap_kp->rows; i++) { - omap_free_gpio(row_gpios[i]); + gpio_free(row_gpios[i]); free_irq(OMAP_GPIO_IRQ(row_gpios[i]), 0); } } else { diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig index e99b7882f382..199055db5082 100644 --- a/drivers/input/misc/Kconfig +++ b/drivers/input/misc/Kconfig @@ -180,6 +180,19 @@ config INPUT_YEALINK To compile this driver as a module, choose M here: the module will be called yealink. +config INPUT_CM109 + tristate "C-Media CM109 USB I/O Controller" + depends on EXPERIMENTAL + depends on USB_ARCH_HAS_HCD + select USB + help + Say Y here if you want to enable keyboard and buzzer functions of the + C-Media CM109 usb phones. The audio part is enabled by the generic + usb sound driver, so you might want to enable that as well. + + To compile this driver as a module, choose M here: the module will be + called cm109. + config INPUT_UINPUT tristate "User level driver support" help diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile index f48009b52226..d7db2aeb8a98 100644 --- a/drivers/input/misc/Makefile +++ b/drivers/input/misc/Makefile @@ -16,6 +16,7 @@ obj-$(CONFIG_INPUT_ATI_REMOTE2) += ati_remote2.o obj-$(CONFIG_INPUT_KEYSPAN_REMOTE) += keyspan_remote.o obj-$(CONFIG_INPUT_POWERMATE) += powermate.o obj-$(CONFIG_INPUT_YEALINK) += yealink.o +obj-$(CONFIG_INPUT_CM109) += cm109.o obj-$(CONFIG_HP_SDC_RTC) += hp_sdc_rtc.o obj-$(CONFIG_INPUT_UINPUT) += uinput.o obj-$(CONFIG_INPUT_APANEL) += apanel.o diff --git a/drivers/input/misc/ati_remote2.c b/drivers/input/misc/ati_remote2.c index a7fabafbd94c..3c9988dc0e9f 100644 --- a/drivers/input/misc/ati_remote2.c +++ b/drivers/input/misc/ati_remote2.c @@ -1,8 +1,8 @@ /* * ati_remote2 - ATI/Philips USB RF remote driver * - * Copyright (C) 2005 Ville Syrjala <syrjala@sci.fi> - * Copyright (C) 2007 Peter Stokes <linux@dadeos.freeserve.co.uk> + * Copyright (C) 2005-2008 Ville Syrjala <syrjala@sci.fi> + * Copyright (C) 2007-2008 Peter Stokes <linux@dadeos.co.uk> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 @@ -12,7 +12,7 @@ #include <linux/usb/input.h> #define DRIVER_DESC "ATI/Philips USB RF remote driver" -#define DRIVER_VERSION "0.2" +#define DRIVER_VERSION "0.3" MODULE_DESCRIPTION(DRIVER_DESC); MODULE_VERSION(DRIVER_VERSION); @@ -27,7 +27,7 @@ MODULE_LICENSE("GPL"); * A remote's "channel" may be altered by pressing and holding the "PC" button for * approximately 3 seconds, after which the button will slowly flash the count of the * currently configured "channel", using the numeric keypad enter a number between 1 and - * 16 and then the "PC" button again, the button will slowly flash the count of the + * 16 and then press the "PC" button again, the button will slowly flash the count of the * newly configured "channel". */ @@ -45,9 +45,25 @@ static struct usb_device_id ati_remote2_id_table[] = { }; MODULE_DEVICE_TABLE(usb, ati_remote2_id_table); -static struct { - int hw_code; - int key_code; +static DEFINE_MUTEX(ati_remote2_mutex); + +enum { + ATI_REMOTE2_OPENED = 0x1, + ATI_REMOTE2_SUSPENDED = 0x2, +}; + +enum { + ATI_REMOTE2_AUX1, + ATI_REMOTE2_AUX2, + ATI_REMOTE2_AUX3, + ATI_REMOTE2_AUX4, + ATI_REMOTE2_PC, + ATI_REMOTE2_MODES, +}; + +static const struct { + u8 hw_code; + u16 keycode; } ati_remote2_key_table[] = { { 0x00, KEY_0 }, { 0x01, KEY_1 }, @@ -73,6 +89,7 @@ static struct { { 0x37, KEY_RECORD }, { 0x38, KEY_DVD }, { 0x39, KEY_TV }, + { 0x3f, KEY_PROG1 }, /* AUX1-AUX4 and PC */ { 0x54, KEY_MENU }, { 0x58, KEY_UP }, { 0x59, KEY_DOWN }, @@ -91,15 +108,9 @@ static struct { { 0xa9, BTN_LEFT }, { 0xaa, BTN_RIGHT }, { 0xbe, KEY_QUESTION }, - { 0xd5, KEY_FRONT }, { 0xd0, KEY_EDIT }, + { 0xd5, KEY_FRONT }, { 0xf9, KEY_INFO }, - { (0x00 << 8) | 0x3f, KEY_PROG1 }, - { (0x01 << 8) | 0x3f, KEY_PROG2 }, - { (0x02 << 8) | 0x3f, KEY_PROG3 }, - { (0x03 << 8) | 0x3f, KEY_PROG4 }, - { (0x04 << 8) | 0x3f, KEY_PC }, - { 0, KEY_RESERVED } }; struct ati_remote2 { @@ -117,46 +128,106 @@ struct ati_remote2 { char name[64]; char phys[64]; + + /* Each mode (AUX1-AUX4 and PC) can have an independent keymap. */ + u16 keycode[ATI_REMOTE2_MODES][ARRAY_SIZE(ati_remote2_key_table)]; + + unsigned int flags; }; static int ati_remote2_probe(struct usb_interface *interface, const struct usb_device_id *id); static void ati_remote2_disconnect(struct usb_interface *interface); +static int ati_remote2_suspend(struct usb_interface *interface, pm_message_t message); +static int ati_remote2_resume(struct usb_interface *interface); static struct usb_driver ati_remote2_driver = { .name = "ati_remote2", .probe = ati_remote2_probe, .disconnect = ati_remote2_disconnect, .id_table = ati_remote2_id_table, + .suspend = ati_remote2_suspend, + .resume = ati_remote2_resume, + .supports_autosuspend = 1, }; -static int ati_remote2_open(struct input_dev *idev) +static int ati_remote2_submit_urbs(struct ati_remote2 *ar2) { - struct ati_remote2 *ar2 = input_get_drvdata(idev); int r; r = usb_submit_urb(ar2->urb[0], GFP_KERNEL); if (r) { dev_err(&ar2->intf[0]->dev, - "%s: usb_submit_urb() = %d\n", __func__, r); + "%s(): usb_submit_urb() = %d\n", __func__, r); return r; } r = usb_submit_urb(ar2->urb[1], GFP_KERNEL); if (r) { usb_kill_urb(ar2->urb[0]); dev_err(&ar2->intf[1]->dev, - "%s: usb_submit_urb() = %d\n", __func__, r); + "%s(): usb_submit_urb() = %d\n", __func__, r); return r; } return 0; } +static void ati_remote2_kill_urbs(struct ati_remote2 *ar2) +{ + usb_kill_urb(ar2->urb[1]); + usb_kill_urb(ar2->urb[0]); +} + +static int ati_remote2_open(struct input_dev *idev) +{ + struct ati_remote2 *ar2 = input_get_drvdata(idev); + int r; + + dev_dbg(&ar2->intf[0]->dev, "%s()\n", __func__); + + r = usb_autopm_get_interface(ar2->intf[0]); + if (r) { + dev_err(&ar2->intf[0]->dev, + "%s(): usb_autopm_get_interface() = %d\n", __func__, r); + goto fail1; + } + + mutex_lock(&ati_remote2_mutex); + + if (!(ar2->flags & ATI_REMOTE2_SUSPENDED)) { + r = ati_remote2_submit_urbs(ar2); + if (r) + goto fail2; + } + + ar2->flags |= ATI_REMOTE2_OPENED; + + mutex_unlock(&ati_remote2_mutex); + + usb_autopm_put_interface(ar2->intf[0]); + + return 0; + + fail2: + mutex_unlock(&ati_remote2_mutex); + usb_autopm_put_interface(ar2->intf[0]); + fail1: + return r; +} + static void ati_remote2_close(struct input_dev *idev) { struct ati_remote2 *ar2 = input_get_drvdata(idev); - usb_kill_urb(ar2->urb[0]); - usb_kill_urb(ar2->urb[1]); + dev_dbg(&ar2->intf[0]->dev, "%s()\n", __func__); + + mutex_lock(&ati_remote2_mutex); + + if (!(ar2->flags & ATI_REMOTE2_SUSPENDED)) + ati_remote2_kill_urbs(ar2); + + ar2->flags &= ~ATI_REMOTE2_OPENED; + + mutex_unlock(&ati_remote2_mutex); } static void ati_remote2_input_mouse(struct ati_remote2 *ar2) @@ -172,7 +243,7 @@ static void ati_remote2_input_mouse(struct ati_remote2 *ar2) mode = data[0] & 0x0F; - if (mode > 4) { + if (mode > ATI_REMOTE2_PC) { dev_err(&ar2->intf[0]->dev, "Unknown mode byte (%02x %02x %02x %02x)\n", data[3], data[2], data[1], data[0]); @@ -191,7 +262,7 @@ static int ati_remote2_lookup(unsigned int hw_code) { int i; - for (i = 0; ati_remote2_key_table[i].key_code != KEY_RESERVED; i++) + for (i = 0; i < ARRAY_SIZE(ati_remote2_key_table); i++) if (ati_remote2_key_table[i].hw_code == hw_code) return i; @@ -211,7 +282,7 @@ static void ati_remote2_input_key(struct ati_remote2 *ar2) mode = data[0] & 0x0F; - if (mode > 4) { + if (mode > ATI_REMOTE2_PC) { dev_err(&ar2->intf[1]->dev, "Unknown mode byte (%02x %02x %02x %02x)\n", data[3], data[2], data[1], data[0]); @@ -219,10 +290,6 @@ static void ati_remote2_input_key(struct ati_remote2 *ar2) } hw_code = data[2]; - /* - * Mode keys (AUX1-AUX4, PC) all generate the same code byte. - * Use the mode byte to figure out which one was pressed. - */ if (hw_code == 0x3f) { /* * For some incomprehensible reason the mouse pad generates @@ -236,8 +303,6 @@ static void ati_remote2_input_key(struct ati_remote2 *ar2) if (data[1] == 0) ar2->mode = mode; - - hw_code |= mode << 8; } if (!((1 << mode) & mode_mask)) @@ -260,8 +325,8 @@ static void ati_remote2_input_key(struct ati_remote2 *ar2) case 2: /* repeat */ /* No repeat for mouse buttons. */ - if (ati_remote2_key_table[index].key_code == BTN_LEFT || - ati_remote2_key_table[index].key_code == BTN_RIGHT) + if (ar2->keycode[mode][index] == BTN_LEFT || + ar2->keycode[mode][index] == BTN_RIGHT) return; if (!time_after_eq(jiffies, ar2->jiffies)) @@ -276,7 +341,7 @@ static void ati_remote2_input_key(struct ati_remote2 *ar2) return; } - input_event(idev, EV_KEY, ati_remote2_key_table[index].key_code, data[1]); + input_event(idev, EV_KEY, ar2->keycode[mode][index], data[1]); input_sync(idev); } @@ -287,6 +352,7 @@ static void ati_remote2_complete_mouse(struct urb *urb) switch (urb->status) { case 0: + usb_mark_last_busy(ar2->udev); ati_remote2_input_mouse(ar2); break; case -ENOENT: @@ -297,6 +363,7 @@ static void ati_remote2_complete_mouse(struct urb *urb) "%s(): urb status = %d\n", __func__, urb->status); return; default: + usb_mark_last_busy(ar2->udev); dev_err(&ar2->intf[0]->dev, "%s(): urb status = %d\n", __func__, urb->status); } @@ -314,6 +381,7 @@ static void ati_remote2_complete_key(struct urb *urb) switch (urb->status) { case 0: + usb_mark_last_busy(ar2->udev); ati_remote2_input_key(ar2); break; case -ENOENT: @@ -324,6 +392,7 @@ static void ati_remote2_complete_key(struct urb *urb) "%s(): urb status = %d\n", __func__, urb->status); return; default: + usb_mark_last_busy(ar2->udev); dev_err(&ar2->intf[1]->dev, "%s(): urb status = %d\n", __func__, urb->status); } @@ -334,10 +403,60 @@ static void ati_remote2_complete_key(struct urb *urb) "%s(): usb_submit_urb() = %d\n", __func__, r); } +static int ati_remote2_getkeycode(struct input_dev *idev, + int scancode, int *keycode) +{ + struct ati_remote2 *ar2 = input_get_drvdata(idev); + int index, mode; + + mode = scancode >> 8; + if (mode > ATI_REMOTE2_PC || !((1 << mode) & mode_mask)) + return -EINVAL; + + index = ati_remote2_lookup(scancode & 0xFF); + if (index < 0) + return -EINVAL; + + *keycode = ar2->keycode[mode][index]; + return 0; +} + +static int ati_remote2_setkeycode(struct input_dev *idev, int scancode, int keycode) +{ + struct ati_remote2 *ar2 = input_get_drvdata(idev); + int index, mode, old_keycode; + + mode = scancode >> 8; + if (mode > ATI_REMOTE2_PC || !((1 << mode) & mode_mask)) + return -EINVAL; + + index = ati_remote2_lookup(scancode & 0xFF); + if (index < 0) + return -EINVAL; + + if (keycode < KEY_RESERVED || keycode > KEY_MAX) + return -EINVAL; + + old_keycode = ar2->keycode[mode][index]; + ar2->keycode[mode][index] = keycode; + set_bit(keycode, idev->keybit); + + for (mode = 0; mode < ATI_REMOTE2_MODES; mode++) { + for (index = 0; index < ARRAY_SIZE(ati_remote2_key_table); index++) { + if (ar2->keycode[mode][index] == old_keycode) + return 0; + } + } + + clear_bit(old_keycode, idev->keybit); + + return 0; +} + static int ati_remote2_input_init(struct ati_remote2 *ar2) { struct input_dev *idev; - int i, retval; + int index, mode, retval; idev = input_allocate_device(); if (!idev) @@ -350,8 +469,26 @@ static int ati_remote2_input_init(struct ati_remote2 *ar2) idev->keybit[BIT_WORD(BTN_MOUSE)] = BIT_MASK(BTN_LEFT) | BIT_MASK(BTN_RIGHT); idev->relbit[0] = BIT_MASK(REL_X) | BIT_MASK(REL_Y); - for (i = 0; ati_remote2_key_table[i].key_code != KEY_RESERVED; i++) - set_bit(ati_remote2_key_table[i].key_code, idev->keybit); + + for (mode = 0; mode < ATI_REMOTE2_MODES; mode++) { + for (index = 0; index < ARRAY_SIZE(ati_remote2_key_table); index++) { + ar2->keycode[mode][index] = ati_remote2_key_table[index].keycode; + set_bit(ar2->keycode[mode][index], idev->keybit); + } + } + + /* AUX1-AUX4 and PC generate the same scancode. */ + index = ati_remote2_lookup(0x3f); + ar2->keycode[ATI_REMOTE2_AUX1][index] = KEY_PROG1; + ar2->keycode[ATI_REMOTE2_AUX2][index] = KEY_PROG2; + ar2->keycode[ATI_REMOTE2_AUX3][index] = KEY_PROG3; + ar2->keycode[ATI_REMOTE2_AUX4][index] = KEY_PROG4; + ar2->keycode[ATI_REMOTE2_PC][index] = KEY_PC; + set_bit(KEY_PROG1, idev->keybit); + set_bit(KEY_PROG2, idev->keybit); + set_bit(KEY_PROG3, idev->keybit); + set_bit(KEY_PROG4, idev->keybit); + set_bit(KEY_PC, idev->keybit); idev->rep[REP_DELAY] = 250; idev->rep[REP_PERIOD] = 33; @@ -359,6 +496,9 @@ static int ati_remote2_input_init(struct ati_remote2 *ar2) idev->open = ati_remote2_open; idev->close = ati_remote2_close; + idev->getkeycode = ati_remote2_getkeycode; + idev->setkeycode = ati_remote2_setkeycode; + idev->name = ar2->name; idev->phys = ar2->phys; @@ -490,6 +630,8 @@ static int ati_remote2_probe(struct usb_interface *interface, const struct usb_d usb_set_intfdata(interface, ar2); + interface->needs_remote_wakeup = 1; + return 0; fail2: @@ -522,6 +664,57 @@ static void ati_remote2_disconnect(struct usb_interface *interface) kfree(ar2); } +static int ati_remote2_suspend(struct usb_interface *interface, + pm_message_t message) +{ + struct ati_remote2 *ar2; + struct usb_host_interface *alt = interface->cur_altsetting; + + if (alt->desc.bInterfaceNumber) + return 0; + + ar2 = usb_get_intfdata(interface); + + dev_dbg(&ar2->intf[0]->dev, "%s()\n", __func__); + + mutex_lock(&ati_remote2_mutex); + + if (ar2->flags & ATI_REMOTE2_OPENED) + ati_remote2_kill_urbs(ar2); + + ar2->flags |= ATI_REMOTE2_SUSPENDED; + + mutex_unlock(&ati_remote2_mutex); + + return 0; +} + +static int ati_remote2_resume(struct usb_interface *interface) +{ + struct ati_remote2 *ar2; + struct usb_host_interface *alt = interface->cur_altsetting; + int r = 0; + + if (alt->desc.bInterfaceNumber) + return 0; + + ar2 = usb_get_intfdata(interface); + + dev_dbg(&ar2->intf[0]->dev, "%s()\n", __func__); + + mutex_lock(&ati_remote2_mutex); + + if (ar2->flags & ATI_REMOTE2_OPENED) + r = ati_remote2_submit_urbs(ar2); + + if (!r) + ar2->flags &= ~ATI_REMOTE2_SUSPENDED; + + mutex_unlock(&ati_remote2_mutex); + + return r; +} + static int __init ati_remote2_init(void) { int r; diff --git a/drivers/input/misc/cm109.c b/drivers/input/misc/cm109.c new file mode 100644 index 000000000000..bce160f4349b --- /dev/null +++ b/drivers/input/misc/cm109.c @@ -0,0 +1,882 @@ +/* + * Driver for the VoIP USB phones with CM109 chipsets. + * + * Copyright (C) 2007 - 2008 Alfred E. Heggestad <aeh@db.org> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation, version 2. + */ + +/* + * Tested devices: + * - Komunikate KIP1000 + * - Genius G-talk + * - Allied-Telesis Corega USBPH01 + * - ... + * + * This driver is based on the yealink.c driver + * + * Thanks to: + * - Authors of yealink.c + * - Thomas Reitmayr + * - Oliver Neukum for good review comments and code + * - Shaun Jackman <sjackman@gmail.com> for Genius G-talk keymap + * - Dmitry Torokhov for valuable input and review + * + * Todo: + * - Read/write EEPROM + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/slab.h> +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/rwsem.h> +#include <linux/usb/input.h> + +#define DRIVER_VERSION "20080805" +#define DRIVER_AUTHOR "Alfred E. Heggestad" +#define DRIVER_DESC "CM109 phone driver" + +static char *phone = "kip1000"; +module_param(phone, charp, S_IRUSR); +MODULE_PARM_DESC(phone, "Phone name {kip1000, gtalk, usbph01}"); + +enum { + /* HID Registers */ + HID_IR0 = 0x00, /* Record/Playback-mute button, Volume up/down */ + HID_IR1 = 0x01, /* GPI, generic registers or EEPROM_DATA0 */ + HID_IR2 = 0x02, /* Generic registers or EEPROM_DATA1 */ + HID_IR3 = 0x03, /* Generic registers or EEPROM_CTRL */ + HID_OR0 = 0x00, /* Mapping control, buzzer, SPDIF (offset 0x04) */ + HID_OR1 = 0x01, /* GPO - General Purpose Output */ + HID_OR2 = 0x02, /* Set GPIO to input/output mode */ + HID_OR3 = 0x03, /* SPDIF status channel or EEPROM_CTRL */ + + /* HID_IR0 */ + RECORD_MUTE = 1 << 3, + PLAYBACK_MUTE = 1 << 2, + VOLUME_DOWN = 1 << 1, + VOLUME_UP = 1 << 0, + + /* HID_OR0 */ + /* bits 7-6 + 0: HID_OR1-2 are used for GPO; HID_OR0, 3 are used for buzzer + and SPDIF + 1: HID_OR0-3 are used as generic HID registers + 2: Values written to HID_OR0-3 are also mapped to MCU_CTRL, + EEPROM_DATA0-1, EEPROM_CTRL (see Note) + 3: Reserved + */ + HID_OR_GPO_BUZ_SPDIF = 0 << 6, + HID_OR_GENERIC_HID_REG = 1 << 6, + HID_OR_MAP_MCU_EEPROM = 2 << 6, + + BUZZER_ON = 1 << 5, + + /* up to 256 normal keys, up to 16 special keys */ + KEYMAP_SIZE = 256 + 16, +}; + +/* CM109 protocol packet */ +struct cm109_ctl_packet { + u8 byte[4]; +} __attribute__ ((packed)); + +enum { USB_PKT_LEN = sizeof(struct cm109_ctl_packet) }; + +/* CM109 device structure */ +struct cm109_dev { + struct input_dev *idev; /* input device */ + struct usb_device *udev; /* usb device */ + struct usb_interface *intf; + + /* irq input channel */ + struct cm109_ctl_packet *irq_data; + dma_addr_t irq_dma; + struct urb *urb_irq; + + /* control output channel */ + struct cm109_ctl_packet *ctl_data; + dma_addr_t ctl_dma; + struct usb_ctrlrequest *ctl_req; + dma_addr_t ctl_req_dma; + struct urb *urb_ctl; + /* + * The 3 bitfields below are protected by ctl_submit_lock. + * They have to be separate since they are accessed from IRQ + * context. + */ + unsigned irq_urb_pending:1; /* irq_urb is in flight */ + unsigned ctl_urb_pending:1; /* ctl_urb is in flight */ + unsigned buzzer_pending:1; /* need to issue buzz command */ + spinlock_t ctl_submit_lock; + + unsigned char buzzer_state; /* on/off */ + + /* flags */ + unsigned open:1; + unsigned resetting:1; + unsigned shutdown:1; + + /* This mutex protects writes to the above flags */ + struct mutex pm_mutex; + + unsigned short keymap[KEYMAP_SIZE]; + + char phys[64]; /* physical device path */ + int key_code; /* last reported key */ + int keybit; /* 0=new scan 1,2,4,8=scan columns */ + u8 gpi; /* Cached value of GPI (high nibble) */ +}; + +/****************************************************************************** + * CM109 key interface + *****************************************************************************/ + +static unsigned short special_keymap(int code) +{ + if (code > 0xff) { + switch (code - 0xff) { + case RECORD_MUTE: return KEY_MUTE; + case PLAYBACK_MUTE: return KEY_MUTE; + case VOLUME_DOWN: return KEY_VOLUMEDOWN; + case VOLUME_UP: return KEY_VOLUMEUP; + } + } + return KEY_RESERVED; +} + +/* Map device buttons to internal key events. + * + * The "up" and "down" keys, are symbolised by arrows on the button. + * The "pickup" and "hangup" keys are symbolised by a green and red phone + * on the button. + + Komunikate KIP1000 Keyboard Matrix + + -> -- 1 -- 2 -- 3 --> GPI pin 4 (0x10) + | | | | + <- -- 4 -- 5 -- 6 --> GPI pin 5 (0x20) + | | | | + END - 7 -- 8 -- 9 --> GPI pin 6 (0x40) + | | | | + OK -- * -- 0 -- # --> GPI pin 7 (0x80) + | | | | + + /|\ /|\ /|\ /|\ + | | | | +GPO +pin: 3 2 1 0 + 0x8 0x4 0x2 0x1 + + */ +static unsigned short keymap_kip1000(int scancode) +{ + switch (scancode) { /* phone key: */ + case 0x82: return KEY_NUMERIC_0; /* 0 */ + case 0x14: return KEY_NUMERIC_1; /* 1 */ + case 0x12: return KEY_NUMERIC_2; /* 2 */ + case 0x11: return KEY_NUMERIC_3; /* 3 */ + case 0x24: return KEY_NUMERIC_4; /* 4 */ + case 0x22: return KEY_NUMERIC_5; /* 5 */ + case 0x21: return KEY_NUMERIC_6; /* 6 */ + case 0x44: return KEY_NUMERIC_7; /* 7 */ + case 0x42: return KEY_NUMERIC_8; /* 8 */ + case 0x41: return KEY_NUMERIC_9; /* 9 */ + case 0x81: return KEY_NUMERIC_POUND; /* # */ + case 0x84: return KEY_NUMERIC_STAR; /* * */ + case 0x88: return KEY_ENTER; /* pickup */ + case 0x48: return KEY_ESC; /* hangup */ + case 0x28: return KEY_LEFT; /* IN */ + case 0x18: return KEY_RIGHT; /* OUT */ + default: return special_keymap(scancode); + } +} + +/* + Contributed by Shaun Jackman <sjackman@gmail.com> + + Genius G-Talk keyboard matrix + 0 1 2 3 + 4: 0 4 8 Talk + 5: 1 5 9 End + 6: 2 6 # Up + 7: 3 7 * Down +*/ +static unsigned short keymap_gtalk(int scancode) +{ + switch (scancode) { + case 0x11: return KEY_NUMERIC_0; + case 0x21: return KEY_NUMERIC_1; + case 0x41: return KEY_NUMERIC_2; + case 0x81: return KEY_NUMERIC_3; + case 0x12: return KEY_NUMERIC_4; + case 0x22: return KEY_NUMERIC_5; + case 0x42: return KEY_NUMERIC_6; + case 0x82: return KEY_NUMERIC_7; + case 0x14: return KEY_NUMERIC_8; + case 0x24: return KEY_NUMERIC_9; + case 0x44: return KEY_NUMERIC_POUND; /* # */ + case 0x84: return KEY_NUMERIC_STAR; /* * */ + case 0x18: return KEY_ENTER; /* Talk (green handset) */ + case 0x28: return KEY_ESC; /* End (red handset) */ + case 0x48: return KEY_UP; /* Menu up (rocker switch) */ + case 0x88: return KEY_DOWN; /* Menu down (rocker switch) */ + default: return special_keymap(scancode); + } +} + +/* + * Keymap for Allied-Telesis Corega USBPH01 + * http://www.alliedtelesis-corega.com/2/1344/1437/1360/chprd.html + * + * Contributed by july@nat.bg + */ +static unsigned short keymap_usbph01(int scancode) +{ + switch (scancode) { + case 0x11: return KEY_NUMERIC_0; /* 0 */ + case 0x21: return KEY_NUMERIC_1; /* 1 */ + case 0x41: return KEY_NUMERIC_2; /* 2 */ + case 0x81: return KEY_NUMERIC_3; /* 3 */ + case 0x12: return KEY_NUMERIC_4; /* 4 */ + case 0x22: return KEY_NUMERIC_5; /* 5 */ + case 0x42: return KEY_NUMERIC_6; /* 6 */ + case 0x82: return KEY_NUMERIC_7; /* 7 */ + case 0x14: return KEY_NUMERIC_8; /* 8 */ + case 0x24: return KEY_NUMERIC_9; /* 9 */ + case 0x44: return KEY_NUMERIC_POUND; /* # */ + case 0x84: return KEY_NUMERIC_STAR; /* * */ + case 0x18: return KEY_ENTER; /* pickup */ + case 0x28: return KEY_ESC; /* hangup */ + case 0x48: return KEY_LEFT; /* IN */ + case 0x88: return KEY_RIGHT; /* OUT */ + default: return special_keymap(scancode); + } +} + +static unsigned short (*keymap)(int) = keymap_kip1000; + +/* + * Completes a request by converting the data into events for the + * input subsystem. + */ +static void report_key(struct cm109_dev *dev, int key) +{ + struct input_dev *idev = dev->idev; + + if (dev->key_code >= 0) { + /* old key up */ + input_report_key(idev, dev->key_code, 0); + } + + dev->key_code = key; + if (key >= 0) { + /* new valid key */ + input_report_key(idev, key, 1); + } + + input_sync(idev); +} + +/****************************************************************************** + * CM109 usb communication interface + *****************************************************************************/ + +static void cm109_submit_buzz_toggle(struct cm109_dev *dev) +{ + int error; + + if (dev->buzzer_state) + dev->ctl_data->byte[HID_OR0] |= BUZZER_ON; + else + dev->ctl_data->byte[HID_OR0] &= ~BUZZER_ON; + + error = usb_submit_urb(dev->urb_ctl, GFP_ATOMIC); + if (error) + err("%s: usb_submit_urb (urb_ctl) failed %d", __func__, error); +} + +/* + * IRQ handler + */ +static void cm109_urb_irq_callback(struct urb *urb) +{ + struct cm109_dev *dev = urb->context; + const int status = urb->status; + int error; + + dev_dbg(&urb->dev->dev, "### URB IRQ: [0x%02x 0x%02x 0x%02x 0x%02x] keybit=0x%02x\n", + dev->irq_data->byte[0], + dev->irq_data->byte[1], + dev->irq_data->byte[2], + dev->irq_data->byte[3], + dev->keybit); + + if (status) { + if (status == -ESHUTDOWN) + return; + err("%s: urb status %d", __func__, status); + } + + /* Special keys */ + if (dev->irq_data->byte[HID_IR0] & 0x0f) { + const int code = (dev->irq_data->byte[HID_IR0] & 0x0f); + report_key(dev, dev->keymap[0xff + code]); + } + + /* Scan key column */ + if (dev->keybit == 0xf) { + + /* Any changes ? */ + if ((dev->gpi & 0xf0) == (dev->irq_data->byte[HID_IR1] & 0xf0)) + goto out; + + dev->gpi = dev->irq_data->byte[HID_IR1] & 0xf0; + dev->keybit = 0x1; + } else { + report_key(dev, dev->keymap[dev->irq_data->byte[HID_IR1]]); + + dev->keybit <<= 1; + if (dev->keybit > 0x8) + dev->keybit = 0xf; + } + + out: + + spin_lock(&dev->ctl_submit_lock); + + dev->irq_urb_pending = 0; + + if (likely(!dev->shutdown)) { + + if (dev->buzzer_state) + dev->ctl_data->byte[HID_OR0] |= BUZZER_ON; + else + dev->ctl_data->byte[HID_OR0] &= ~BUZZER_ON; + + dev->ctl_data->byte[HID_OR1] = dev->keybit; + dev->ctl_data->byte[HID_OR2] = dev->keybit; + + dev->buzzer_pending = 0; + dev->ctl_urb_pending = 1; + + error = usb_submit_urb(dev->urb_ctl, GFP_ATOMIC); + if (error) + err("%s: usb_submit_urb (urb_ctl) failed %d", + __func__, error); + } + + spin_unlock(&dev->ctl_submit_lock); +} + +static void cm109_urb_ctl_callback(struct urb *urb) +{ + struct cm109_dev *dev = urb->context; + const int status = urb->status; + int error; + + dev_dbg(&urb->dev->dev, "### URB CTL: [0x%02x 0x%02x 0x%02x 0x%02x]\n", + dev->ctl_data->byte[0], + dev->ctl_data->byte[1], + dev->ctl_data->byte[2], + dev->ctl_data->byte[3]); + + if (status) + err("%s: urb status %d", __func__, status); + + spin_lock(&dev->ctl_submit_lock); + + dev->ctl_urb_pending = 0; + + if (likely(!dev->shutdown)) { + + if (dev->buzzer_pending) { + dev->buzzer_pending = 0; + dev->ctl_urb_pending = 1; + cm109_submit_buzz_toggle(dev); + } else if (likely(!dev->irq_urb_pending)) { + /* ask for key data */ + dev->irq_urb_pending = 1; + error = usb_submit_urb(dev->urb_irq, GFP_ATOMIC); + if (error) + err("%s: usb_submit_urb (urb_irq) failed %d", + __func__, error); + } + } + + spin_unlock(&dev->ctl_submit_lock); +} + +static void cm109_toggle_buzzer_async(struct cm109_dev *dev) +{ + unsigned long flags; + + spin_lock_irqsave(&dev->ctl_submit_lock, flags); + + if (dev->ctl_urb_pending) { + /* URB completion will resubmit */ + dev->buzzer_pending = 1; + } else { + dev->ctl_urb_pending = 1; + cm109_submit_buzz_toggle(dev); + } + + spin_unlock_irqrestore(&dev->ctl_submit_lock, flags); +} + +static void cm109_toggle_buzzer_sync(struct cm109_dev *dev, int on) +{ + int error; + + if (on) + dev->ctl_data->byte[HID_OR0] |= BUZZER_ON; + else + dev->ctl_data->byte[HID_OR0] &= ~BUZZER_ON; + + error = usb_control_msg(dev->udev, + usb_sndctrlpipe(dev->udev, 0), + dev->ctl_req->bRequest, + dev->ctl_req->bRequestType, + le16_to_cpu(dev->ctl_req->wValue), + le16_to_cpu(dev->ctl_req->wIndex), + dev->ctl_data, + USB_PKT_LEN, USB_CTRL_SET_TIMEOUT); + if (error && error != EINTR) + err("%s: usb_control_msg() failed %d", __func__, error); +} + +static void cm109_stop_traffic(struct cm109_dev *dev) +{ + dev->shutdown = 1; + /* + * Make sure other CPUs see this + */ + smp_wmb(); + + usb_kill_urb(dev->urb_ctl); + usb_kill_urb(dev->urb_irq); + + cm109_toggle_buzzer_sync(dev, 0); + + dev->shutdown = 0; + smp_wmb(); +} + +static void cm109_restore_state(struct cm109_dev *dev) +{ + if (dev->open) { + /* + * Restore buzzer state. + * This will also kick regular URB submission + */ + cm109_toggle_buzzer_async(dev); + } +} + +/****************************************************************************** + * input event interface + *****************************************************************************/ + +static int cm109_input_open(struct input_dev *idev) +{ + struct cm109_dev *dev = input_get_drvdata(idev); + int error; + + error = usb_autopm_get_interface(dev->intf); + if (error < 0) { + err("%s - cannot autoresume, result %d", + __func__, error); + return error; + } + + mutex_lock(&dev->pm_mutex); + + dev->buzzer_state = 0; + dev->key_code = -1; /* no keys pressed */ + dev->keybit = 0xf; + + /* issue INIT */ + dev->ctl_data->byte[HID_OR0] = HID_OR_GPO_BUZ_SPDIF; + dev->ctl_data->byte[HID_OR1] = dev->keybit; + dev->ctl_data->byte[HID_OR2] = dev->keybit; + dev->ctl_data->byte[HID_OR3] = 0x00; + + error = usb_submit_urb(dev->urb_ctl, GFP_KERNEL); + if (error) + err("%s: usb_submit_urb (urb_ctl) failed %d", __func__, error); + else + dev->open = 1; + + mutex_unlock(&dev->pm_mutex); + + if (error) + usb_autopm_put_interface(dev->intf); + + return error; +} + +static void cm109_input_close(struct input_dev *idev) +{ + struct cm109_dev *dev = input_get_drvdata(idev); + + mutex_lock(&dev->pm_mutex); + + /* + * Once we are here event delivery is stopped so we + * don't need to worry about someone starting buzzer + * again + */ + cm109_stop_traffic(dev); + dev->open = 0; + + mutex_unlock(&dev->pm_mutex); + + usb_autopm_put_interface(dev->intf); +} + +static int cm109_input_ev(struct input_dev *idev, unsigned int type, + unsigned int code, int value) +{ + struct cm109_dev *dev = input_get_drvdata(idev); + + dev_dbg(&dev->udev->dev, + "input_ev: type=%u code=%u value=%d\n", type, code, value); + + if (type != EV_SND) + return -EINVAL; + + switch (code) { + case SND_TONE: + case SND_BELL: + dev->buzzer_state = !!value; + if (!dev->resetting) + cm109_toggle_buzzer_async(dev); + return 0; + + default: + return -EINVAL; + } +} + + +/****************************************************************************** + * Linux interface and usb initialisation + *****************************************************************************/ + +struct driver_info { + char *name; +}; + +static const struct driver_info info_cm109 = { + .name = "CM109 USB driver", +}; + +enum { + VENDOR_ID = 0x0d8c, /* C-Media Electronics */ + PRODUCT_ID_CM109 = 0x000e, /* CM109 defines range 0x0008 - 0x000f */ +}; + +/* table of devices that work with this driver */ +static const struct usb_device_id cm109_usb_table[] = { + { + .match_flags = USB_DEVICE_ID_MATCH_DEVICE | + USB_DEVICE_ID_MATCH_INT_INFO, + .idVendor = VENDOR_ID, + .idProduct = PRODUCT_ID_CM109, + .bInterfaceClass = USB_CLASS_HID, + .bInterfaceSubClass = 0, + .bInterfaceProtocol = 0, + .driver_info = (kernel_ulong_t) &info_cm109 + }, + /* you can add more devices here with product ID 0x0008 - 0x000f */ + { } +}; + +static void cm109_usb_cleanup(struct cm109_dev *dev) +{ + if (dev->ctl_req) + usb_buffer_free(dev->udev, sizeof(*(dev->ctl_req)), + dev->ctl_req, dev->ctl_req_dma); + if (dev->ctl_data) + usb_buffer_free(dev->udev, USB_PKT_LEN, + dev->ctl_data, dev->ctl_dma); + if (dev->irq_data) + usb_buffer_free(dev->udev, USB_PKT_LEN, + dev->irq_data, dev->irq_dma); + + usb_free_urb(dev->urb_irq); /* parameter validation in core/urb */ + usb_free_urb(dev->urb_ctl); /* parameter validation in core/urb */ + kfree(dev); +} + +static void cm109_usb_disconnect(struct usb_interface *interface) +{ + struct cm109_dev *dev = usb_get_intfdata(interface); + + usb_set_intfdata(interface, NULL); + input_unregister_device(dev->idev); + cm109_usb_cleanup(dev); +} + +static int cm109_usb_probe(struct usb_interface *intf, + const struct usb_device_id *id) +{ + struct usb_device *udev = interface_to_usbdev(intf); + struct driver_info *nfo = (struct driver_info *)id->driver_info; + struct usb_host_interface *interface; + struct usb_endpoint_descriptor *endpoint; + struct cm109_dev *dev; + struct input_dev *input_dev = NULL; + int ret, pipe, i; + int error = -ENOMEM; + + interface = intf->cur_altsetting; + endpoint = &interface->endpoint[0].desc; + + if (!usb_endpoint_is_int_in(endpoint)) + return -ENODEV; + + dev = kzalloc(sizeof(*dev), GFP_KERNEL); + if (!dev) + return -ENOMEM; + + spin_lock_init(&dev->ctl_submit_lock); + mutex_init(&dev->pm_mutex); + + dev->udev = udev; + dev->intf = intf; + + dev->idev = input_dev = input_allocate_device(); + if (!input_dev) + goto err_out; + + /* allocate usb buffers */ + dev->irq_data = usb_buffer_alloc(udev, USB_PKT_LEN, + GFP_KERNEL, &dev->irq_dma); + if (!dev->irq_data) + goto err_out; + + dev->ctl_data = usb_buffer_alloc(udev, USB_PKT_LEN, + GFP_KERNEL, &dev->ctl_dma); + if (!dev->ctl_data) + goto err_out; + + dev->ctl_req = usb_buffer_alloc(udev, sizeof(*(dev->ctl_req)), + GFP_KERNEL, &dev->ctl_req_dma); + if (!dev->ctl_req) + goto err_out; + + /* allocate urb structures */ + dev->urb_irq = usb_alloc_urb(0, GFP_KERNEL); + if (!dev->urb_irq) + goto err_out; + + dev->urb_ctl = usb_alloc_urb(0, GFP_KERNEL); + if (!dev->urb_ctl) + goto err_out; + + /* get a handle to the interrupt data pipe */ + pipe = usb_rcvintpipe(udev, endpoint->bEndpointAddress); + ret = usb_maxpacket(udev, pipe, usb_pipeout(pipe)); + if (ret != USB_PKT_LEN) + err("invalid payload size %d, expected %d", ret, USB_PKT_LEN); + + /* initialise irq urb */ + usb_fill_int_urb(dev->urb_irq, udev, pipe, dev->irq_data, + USB_PKT_LEN, + cm109_urb_irq_callback, dev, endpoint->bInterval); + dev->urb_irq->transfer_dma = dev->irq_dma; + dev->urb_irq->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; + dev->urb_irq->dev = udev; + + /* initialise ctl urb */ + dev->ctl_req->bRequestType = USB_TYPE_CLASS | USB_RECIP_INTERFACE | + USB_DIR_OUT; + dev->ctl_req->bRequest = USB_REQ_SET_CONFIGURATION; + dev->ctl_req->wValue = cpu_to_le16(0x200); + dev->ctl_req->wIndex = cpu_to_le16(interface->desc.bInterfaceNumber); + dev->ctl_req->wLength = cpu_to_le16(USB_PKT_LEN); + + usb_fill_control_urb(dev->urb_ctl, udev, usb_sndctrlpipe(udev, 0), + (void *)dev->ctl_req, dev->ctl_data, USB_PKT_LEN, + cm109_urb_ctl_callback, dev); + dev->urb_ctl->setup_dma = dev->ctl_req_dma; + dev->urb_ctl->transfer_dma = dev->ctl_dma; + dev->urb_ctl->transfer_flags |= URB_NO_SETUP_DMA_MAP | + URB_NO_TRANSFER_DMA_MAP; + dev->urb_ctl->dev = udev; + + /* find out the physical bus location */ + usb_make_path(udev, dev->phys, sizeof(dev->phys)); + strlcat(dev->phys, "/input0", sizeof(dev->phys)); + + /* register settings for the input device */ + input_dev->name = nfo->name; + input_dev->phys = dev->phys; + usb_to_input_id(udev, &input_dev->id); + input_dev->dev.parent = &intf->dev; + + input_set_drvdata(input_dev, dev); + input_dev->open = cm109_input_open; + input_dev->close = cm109_input_close; + input_dev->event = cm109_input_ev; + + input_dev->keycode = dev->keymap; + input_dev->keycodesize = sizeof(unsigned char); + input_dev->keycodemax = ARRAY_SIZE(dev->keymap); + + input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_SND); + input_dev->sndbit[0] = BIT_MASK(SND_BELL) | BIT_MASK(SND_TONE); + + /* register available key events */ + for (i = 0; i < KEYMAP_SIZE; i++) { + unsigned short k = keymap(i); + dev->keymap[i] = k; + __set_bit(k, input_dev->keybit); + } + __clear_bit(KEY_RESERVED, input_dev->keybit); + + error = input_register_device(dev->idev); + if (error) + goto err_out; + + usb_set_intfdata(intf, dev); + + return 0; + + err_out: + input_free_device(input_dev); + cm109_usb_cleanup(dev); + return error; +} + +static int cm109_usb_suspend(struct usb_interface *intf, pm_message_t message) +{ + struct cm109_dev *dev = usb_get_intfdata(intf); + + dev_info(&intf->dev, "cm109: usb_suspend (event=%d)\n", message.event); + + mutex_lock(&dev->pm_mutex); + cm109_stop_traffic(dev); + mutex_unlock(&dev->pm_mutex); + + return 0; +} + +static int cm109_usb_resume(struct usb_interface *intf) +{ + struct cm109_dev *dev = usb_get_intfdata(intf); + + dev_info(&intf->dev, "cm109: usb_resume\n"); + + mutex_lock(&dev->pm_mutex); + cm109_restore_state(dev); + mutex_unlock(&dev->pm_mutex); + + return 0; +} + +static int cm109_usb_pre_reset(struct usb_interface *intf) +{ + struct cm109_dev *dev = usb_get_intfdata(intf); + + mutex_lock(&dev->pm_mutex); + + /* + * Make sure input events don't try to toggle buzzer + * while we are resetting + */ + dev->resetting = 1; + smp_wmb(); + + cm109_stop_traffic(dev); + + return 0; +} + +static int cm109_usb_post_reset(struct usb_interface *intf) +{ + struct cm109_dev *dev = usb_get_intfdata(intf); + + dev->resetting = 0; + smp_wmb(); + + cm109_restore_state(dev); + + mutex_unlock(&dev->pm_mutex); + + return 0; +} + +static struct usb_driver cm109_driver = { + .name = "cm109", + .probe = cm109_usb_probe, + .disconnect = cm109_usb_disconnect, + .suspend = cm109_usb_suspend, + .resume = cm109_usb_resume, + .reset_resume = cm109_usb_resume, + .pre_reset = cm109_usb_pre_reset, + .post_reset = cm109_usb_post_reset, + .id_table = cm109_usb_table, + .supports_autosuspend = 1, +}; + +static int __init cm109_select_keymap(void) +{ + /* Load the phone keymap */ + if (!strcasecmp(phone, "kip1000")) { + keymap = keymap_kip1000; + printk(KERN_INFO KBUILD_MODNAME ": " + "Keymap for Komunikate KIP1000 phone loaded\n"); + } else if (!strcasecmp(phone, "gtalk")) { + keymap = keymap_gtalk; + printk(KERN_INFO KBUILD_MODNAME ": " + "Keymap for Genius G-talk phone loaded\n"); + } else if (!strcasecmp(phone, "usbph01")) { + keymap = keymap_usbph01; + printk(KERN_INFO KBUILD_MODNAME ": " + "Keymap for Allied-Telesis Corega USBPH01 phone loaded\n"); + } else { + printk(KERN_ERR KBUILD_MODNAME ": " + "Unsupported phone: %s\n", phone); + return -EINVAL; + } + + return 0; +} + +static int __init cm109_init(void) +{ + int err; + + err = cm109_select_keymap(); + if (err) + return err; + + err = usb_register(&cm109_driver); + if (err) + return err; + + printk(KERN_INFO KBUILD_MODNAME ": " + DRIVER_DESC ": " DRIVER_VERSION " (C) " DRIVER_AUTHOR "\n"); + + return 0; +} + +static void __exit cm109_exit(void) +{ + usb_deregister(&cm109_driver); +} + +module_init(cm109_init); +module_exit(cm109_exit); + +MODULE_DEVICE_TABLE(usb, cm109_usb_table); + +MODULE_AUTHOR(DRIVER_AUTHOR); +MODULE_DESCRIPTION(DRIVER_DESC); +MODULE_LICENSE("GPL"); diff --git a/drivers/input/misc/wistron_btns.c b/drivers/input/misc/wistron_btns.c index fe268be3293b..7c8957dd22c0 100644 --- a/drivers/input/misc/wistron_btns.c +++ b/drivers/input/misc/wistron_btns.c @@ -277,6 +277,16 @@ static struct key_entry keymap_fs_amilo_pro_v2000[] __initdata = { { KE_END, 0 } }; +static struct key_entry keymap_fs_amilo_pro_v3505[] __initdata = { + { KE_KEY, 0x01, {KEY_HELP} }, /* Fn+F1 */ + { KE_KEY, 0x06, {KEY_DISPLAYTOGGLE} }, /* Fn+F4 */ + { KE_BLUETOOTH, 0x30 }, /* Fn+F10 */ + { KE_KEY, 0x31, {KEY_MAIL} }, /* mail button */ + { KE_KEY, 0x36, {KEY_WWW} }, /* www button */ + { KE_WIFI, 0x78 }, /* satelite dish button */ + { KE_END, 0 } +}; + static struct key_entry keymap_fujitsu_n3510[] __initdata = { { KE_KEY, 0x11, {KEY_PROG1} }, { KE_KEY, 0x12, {KEY_PROG2} }, @@ -618,6 +628,15 @@ static struct dmi_system_id dmi_ids[] __initdata = { }, { .callback = dmi_matched, + .ident = "Fujitsu-Siemens Amilo Pro Edition V3505", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), + DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Pro Edition V3505"), + }, + .driver_data = keymap_fs_amilo_pro_v3505 + }, + { + .callback = dmi_matched, .ident = "Fujitsu-Siemens Amilo M7400", .matches = { DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), diff --git a/drivers/input/misc/yealink.c b/drivers/input/misc/yealink.c index facefd3dba29..11b5c7e84ed1 100644 --- a/drivers/input/misc/yealink.c +++ b/drivers/input/misc/yealink.c @@ -52,8 +52,8 @@ #include <linux/module.h> #include <linux/rwsem.h> #include <linux/usb/input.h> +#include <linux/map_to_7segment.h> -#include "map_to_7segment.h" #include "yealink.h" #define DRIVER_VERSION "yld-20051230" diff --git a/drivers/input/mouse/Kconfig b/drivers/input/mouse/Kconfig index f996546fc443..f488b6852baf 100644 --- a/drivers/input/mouse/Kconfig +++ b/drivers/input/mouse/Kconfig @@ -96,6 +96,16 @@ config MOUSE_PS2_TOUCHKIT If unsure, say N. +config MOUSE_PS2_OLPC + bool "OLPC PS/2 mouse protocol extension" + depends on MOUSE_PS2 && OLPC + help + Say Y here if you have an OLPC XO-1 laptop (with built-in + PS/2 touchpad/tablet device). The manufacturer calls the + touchpad an HGPK. + + If unsure, say N. + config MOUSE_SERIAL tristate "Serial mouse" select SERIO diff --git a/drivers/input/mouse/Makefile b/drivers/input/mouse/Makefile index d4d202516090..8e6e69097801 100644 --- a/drivers/input/mouse/Makefile +++ b/drivers/input/mouse/Makefile @@ -21,6 +21,7 @@ obj-$(CONFIG_MOUSE_GPIO) += gpio_mouse.o psmouse-objs := psmouse-base.o synaptics.o psmouse-$(CONFIG_MOUSE_PS2_ALPS) += alps.o +psmouse-$(CONFIG_MOUSE_PS2_OLPC) += hgpk.o psmouse-$(CONFIG_MOUSE_PS2_LOGIPS2PP) += logips2pp.o psmouse-$(CONFIG_MOUSE_PS2_LIFEBOOK) += lifebook.o psmouse-$(CONFIG_MOUSE_PS2_TRACKPOINT) += trackpoint.o diff --git a/drivers/input/mouse/alps.c b/drivers/input/mouse/alps.c index 385e32bcf6a6..cbedf957cc58 100644 --- a/drivers/input/mouse/alps.c +++ b/drivers/input/mouse/alps.c @@ -54,6 +54,7 @@ static const struct alps_model_info alps_model_data[] = { { { 0x20, 0x02, 0x0e }, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT }, /* XXX */ { { 0x22, 0x02, 0x0a }, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT }, { { 0x22, 0x02, 0x14 }, 0xff, 0xff, ALPS_PASS | ALPS_DUALPOINT }, /* Dell Latitude D600 */ + { { 0x62, 0x02, 0x14 }, 0xcf, 0xcf, ALPS_PASS | ALPS_DUALPOINT }, /* Dell Latitude E6500 */ { { 0x73, 0x02, 0x50 }, 0xcf, 0xcf, ALPS_FW_BK_1 } /* Dell Vostro 1400 */ }; diff --git a/drivers/input/mouse/appletouch.c b/drivers/input/mouse/appletouch.c index 1f41ae94f26b..079816e6b23b 100644 --- a/drivers/input/mouse/appletouch.c +++ b/drivers/input/mouse/appletouch.c @@ -136,12 +136,28 @@ MODULE_DEVICE_TABLE(usb, atp_table); #define ATP_GEYSER_MODE_REQUEST_INDEX 0 #define ATP_GEYSER_MODE_VENDOR_VALUE 0x04 +/** + * enum atp_status_bits - status bit meanings + * + * These constants represent the meaning of the status bits. + * (only Geyser 3/4) + * + * @ATP_STATUS_BUTTON: The button was pressed + * @ATP_STATUS_BASE_UPDATE: Update of the base values (untouched pad) + * @ATP_STATUS_FROM_RESET: Reset previously performed + */ +enum atp_status_bits { + ATP_STATUS_BUTTON = BIT(0), + ATP_STATUS_BASE_UPDATE = BIT(2), + ATP_STATUS_FROM_RESET = BIT(4), +}; + /* Structure to hold all of our device specific stuff */ struct atp { char phys[64]; struct usb_device *udev; /* usb device */ struct urb *urb; /* usb request block */ - signed char *data; /* transferred data */ + u8 *data; /* transferred data */ struct input_dev *input; /* input dev */ enum atp_touchpad_type type; /* type of touchpad */ bool open; @@ -251,8 +267,6 @@ static void atp_reinit(struct work_struct *work) int retval; dprintk("appletouch: putting appletouch to sleep (reinit)\n"); - dev->idlecount = 0; - atp_geyser_init(udev); retval = usb_submit_urb(dev->urb, GFP_ATOMIC); @@ -327,11 +341,14 @@ static inline void atp_report_fingers(struct input_dev *input, int fingers) input_report_key(input, BTN_TOOL_TRIPLETAP, fingers > 2); } -static void atp_complete(struct urb *urb) +/* Check URB status and for correct length of data package */ + +#define ATP_URB_STATUS_SUCCESS 0 +#define ATP_URB_STATUS_ERROR 1 +#define ATP_URB_STATUS_ERROR_FATAL 2 + +static int atp_status_check(struct urb *urb) { - int x, y, x_z, y_z, x_f, y_f; - int retval, i, j; - int key; struct atp *dev = urb->context; switch (urb->status) { @@ -351,11 +368,12 @@ static void atp_complete(struct urb *urb) /* This urb is terminated, clean up */ dbg("atp_complete: urb shutting down with status: %d", urb->status); - return; + return ATP_URB_STATUS_ERROR_FATAL; + default: dbg("atp_complete: nonzero urb status received: %d", urb->status); - goto exit; + return ATP_URB_STATUS_ERROR; } /* drop incomplete datasets */ @@ -363,30 +381,33 @@ static void atp_complete(struct urb *urb) dprintk("appletouch: incomplete data package" " (first byte: %d, length: %d).\n", dev->data[0], dev->urb->actual_length); - goto exit; + return ATP_URB_STATUS_ERROR; } - /* reorder the sensors values */ - if (dev->type == ATP_GEYSER3 || dev->type == ATP_GEYSER4) { - memset(dev->xy_cur, 0, sizeof(dev->xy_cur)); + return ATP_URB_STATUS_SUCCESS; +} - /* - * The values are laid out like this: - * -, Y1, Y2, -, Y3, Y4, -, ..., -, X1, X2, -, X3, X4, ... - * '-' is an unused value. - */ +/* + * USB interrupt callback functions + */ - /* read X values */ - for (i = 0, j = 19; i < 20; i += 2, j += 3) { - dev->xy_cur[i] = dev->data[j + 1]; - dev->xy_cur[i + 1] = dev->data[j + 2]; - } - /* read Y values */ - for (i = 0, j = 1; i < 9; i += 2, j += 3) { - dev->xy_cur[ATP_XSENSORS + i] = dev->data[j + 1]; - dev->xy_cur[ATP_XSENSORS + i + 1] = dev->data[j + 2]; - } - } else if (dev->type == ATP_GEYSER2) { +/* Interrupt function for older touchpads: FOUNTAIN/GEYSER1/GEYSER2 */ + +static void atp_complete_geyser_1_2(struct urb *urb) +{ + int x, y, x_z, y_z, x_f, y_f; + int retval, i, j; + int key; + struct atp *dev = urb->context; + int status = atp_status_check(urb); + + if (status == ATP_URB_STATUS_ERROR_FATAL) + return; + else if (status == ATP_URB_STATUS_ERROR) + goto exit; + + /* reorder the sensors values */ + if (dev->type == ATP_GEYSER2) { memset(dev->xy_cur, 0, sizeof(dev->xy_cur)); /* @@ -427,34 +448,40 @@ static void atp_complete(struct urb *urb) /* first sample */ dev->valid = true; dev->x_old = dev->y_old = -1; + + /* Store first sample */ memcpy(dev->xy_old, dev->xy_cur, sizeof(dev->xy_old)); - if (dev->size_detect_done || - dev->type == ATP_GEYSER3) /* No 17" Macbooks (yet) */ - goto exit; + /* Perform size detection, if not done already */ + if (!dev->size_detect_done) { + + /* 17" Powerbooks have extra X sensors */ + for (i = (dev->type == ATP_GEYSER2 ? 15 : 16); + i < ATP_XSENSORS; i++) { + if (!dev->xy_cur[i]) + continue; + + printk(KERN_INFO + "appletouch: 17\" model detected.\n"); + + if (dev->type == ATP_GEYSER2) + input_set_abs_params(dev->input, ABS_X, + 0, + (20 - 1) * + ATP_XFACT - 1, + ATP_FUZZ, 0); + else + input_set_abs_params(dev->input, ABS_X, + 0, + (26 - 1) * + ATP_XFACT - 1, + ATP_FUZZ, 0); + break; + } - /* 17" Powerbooks have extra X sensors */ - for (i = (dev->type == ATP_GEYSER2 ? 15 : 16); - i < ATP_XSENSORS; i++) { - if (!dev->xy_cur[i]) - continue; - - printk(KERN_INFO "appletouch: 17\" model detected.\n"); - if (dev->type == ATP_GEYSER2) - input_set_abs_params(dev->input, ABS_X, 0, - (20 - 1) * - ATP_XFACT - 1, - ATP_FUZZ, 0); - else - input_set_abs_params(dev->input, ABS_X, 0, - (ATP_XSENSORS - 1) * - ATP_XFACT - 1, - ATP_FUZZ, 0); - break; + dev->size_detect_done = 1; + goto exit; } - - dev->size_detect_done = 1; - goto exit; } for (i = 0; i < ATP_XSENSORS + ATP_YSENSORS; i++) { @@ -475,7 +502,118 @@ static void atp_complete(struct urb *urb) ATP_XFACT, &x_z, &x_f); y = atp_calculate_abs(dev->xy_acc + ATP_XSENSORS, ATP_YSENSORS, ATP_YFACT, &y_z, &y_f); - key = dev->data[dev->datalen - 1] & 1; + key = dev->data[dev->datalen - 1] & ATP_STATUS_BUTTON; + + if (x && y) { + if (dev->x_old != -1) { + x = (dev->x_old * 3 + x) >> 2; + y = (dev->y_old * 3 + y) >> 2; + dev->x_old = x; + dev->y_old = y; + + if (debug > 1) + printk(KERN_DEBUG "appletouch: " + "X: %3d Y: %3d Xz: %3d Yz: %3d\n", + x, y, x_z, y_z); + + input_report_key(dev->input, BTN_TOUCH, 1); + input_report_abs(dev->input, ABS_X, x); + input_report_abs(dev->input, ABS_Y, y); + input_report_abs(dev->input, ABS_PRESSURE, + min(ATP_PRESSURE, x_z + y_z)); + atp_report_fingers(dev->input, max(x_f, y_f)); + } + dev->x_old = x; + dev->y_old = y; + + } else if (!x && !y) { + + dev->x_old = dev->y_old = -1; + input_report_key(dev->input, BTN_TOUCH, 0); + input_report_abs(dev->input, ABS_PRESSURE, 0); + atp_report_fingers(dev->input, 0); + + /* reset the accumulator on release */ + memset(dev->xy_acc, 0, sizeof(dev->xy_acc)); + } + + input_report_key(dev->input, BTN_LEFT, key); + input_sync(dev->input); + + exit: + retval = usb_submit_urb(dev->urb, GFP_ATOMIC); + if (retval) + err("atp_complete: usb_submit_urb failed with result %d", + retval); +} + +/* Interrupt function for older touchpads: GEYSER3/GEYSER4 */ + +static void atp_complete_geyser_3_4(struct urb *urb) +{ + int x, y, x_z, y_z, x_f, y_f; + int retval, i, j; + int key; + struct atp *dev = urb->context; + int status = atp_status_check(urb); + + if (status == ATP_URB_STATUS_ERROR_FATAL) + return; + else if (status == ATP_URB_STATUS_ERROR) + goto exit; + + /* Reorder the sensors values: + * + * The values are laid out like this: + * -, Y1, Y2, -, Y3, Y4, -, ..., -, X1, X2, -, X3, X4, ... + * '-' is an unused value. + */ + + /* read X values */ + for (i = 0, j = 19; i < 20; i += 2, j += 3) { + dev->xy_cur[i] = dev->data[j + 1]; + dev->xy_cur[i + 1] = dev->data[j + 2]; + } + /* read Y values */ + for (i = 0, j = 1; i < 9; i += 2, j += 3) { + dev->xy_cur[ATP_XSENSORS + i] = dev->data[j + 1]; + dev->xy_cur[ATP_XSENSORS + i + 1] = dev->data[j + 2]; + } + + dbg_dump("sample", dev->xy_cur); + + /* Just update the base values (i.e. touchpad in untouched state) */ + if (dev->data[dev->datalen - 1] & ATP_STATUS_BASE_UPDATE) { + + dprintk(KERN_DEBUG "appletouch: updated base values\n"); + + memcpy(dev->xy_old, dev->xy_cur, sizeof(dev->xy_old)); + goto exit; + } + + for (i = 0; i < ATP_XSENSORS + ATP_YSENSORS; i++) { + /* calculate the change */ + dev->xy_acc[i] = dev->xy_cur[i] - dev->xy_old[i]; + + /* this is a round-robin value, so couple with that */ + if (dev->xy_acc[i] > 127) + dev->xy_acc[i] -= 256; + + if (dev->xy_acc[i] < -127) + dev->xy_acc[i] += 256; + + /* prevent down drifting */ + if (dev->xy_acc[i] < 0) + dev->xy_acc[i] = 0; + } + + dbg_dump("accumulator", dev->xy_acc); + + x = atp_calculate_abs(dev->xy_acc, ATP_XSENSORS, + ATP_XFACT, &x_z, &x_f); + y = atp_calculate_abs(dev->xy_acc + ATP_XSENSORS, ATP_YSENSORS, + ATP_YFACT, &y_z, &y_f); + key = dev->data[dev->datalen - 1] & ATP_STATUS_BUTTON; if (x && y) { if (dev->x_old != -1) { @@ -514,28 +652,27 @@ static void atp_complete(struct urb *urb) input_sync(dev->input); /* - * Many Geysers will continue to send packets continually after + * Geysers 3/4 will continue to send packets continually after * the first touch unless reinitialised. Do so if it's been * idle for a while in order to avoid waking the kernel up - * several hundred times a second. Re-initialization does not - * work on Fountain touchpads. + * several hundred times a second. */ - if (dev->type != ATP_FOUNTAIN) { - /* - * Button must not be pressed when entering suspend, - * otherwise we will never release the button. - */ - if (!x && !y && !key) { - dev->idlecount++; - if (dev->idlecount == 10) { - dev->valid = false; - schedule_work(&dev->work); - /* Don't resubmit urb here, wait for reinit */ - return; - } - } else + + /* + * Button must not be pressed when entering suspend, + * otherwise we will never release the button. + */ + if (!x && !y && !key) { + dev->idlecount++; + if (dev->idlecount == 10) { + dev->x_old = dev->y_old = -1; dev->idlecount = 0; - } + schedule_work(&dev->work); + /* Don't resubmit urb here, wait for reinit */ + return; + } + } else + dev->idlecount = 0; exit: retval = usb_submit_urb(dev->urb, GFP_ATOMIC); @@ -632,9 +769,19 @@ static int atp_probe(struct usb_interface *iface, if (!dev->data) goto err_free_urb; - usb_fill_int_urb(dev->urb, udev, - usb_rcvintpipe(udev, int_in_endpointAddr), - dev->data, dev->datalen, atp_complete, dev, 1); + /* Select the USB complete (callback) function */ + if (dev->type == ATP_FOUNTAIN || + dev->type == ATP_GEYSER1 || + dev->type == ATP_GEYSER2) + usb_fill_int_urb(dev->urb, udev, + usb_rcvintpipe(udev, int_in_endpointAddr), + dev->data, dev->datalen, + atp_complete_geyser_1_2, dev, 1); + else + usb_fill_int_urb(dev->urb, udev, + usb_rcvintpipe(udev, int_in_endpointAddr), + dev->data, dev->datalen, + atp_complete_geyser_3_4, dev, 1); error = atp_handle_geyser(dev); if (error) @@ -751,8 +898,6 @@ static int atp_suspend(struct usb_interface *iface, pm_message_t message) struct atp *dev = usb_get_intfdata(iface); usb_kill_urb(dev->urb); - dev->valid = false; - return 0; } diff --git a/drivers/input/mouse/hgpk.c b/drivers/input/mouse/hgpk.c new file mode 100644 index 000000000000..e82d34201e97 --- /dev/null +++ b/drivers/input/mouse/hgpk.c @@ -0,0 +1,477 @@ +/* + * OLPC HGPK (XO-1) touchpad PS/2 mouse driver + * + * Copyright (c) 2006-2008 One Laptop Per Child + * Authors: + * Zephaniah E. Hull + * Andres Salomon <dilinger@debian.org> + * + * This driver is partly based on the ALPS driver, which is: + * + * Copyright (c) 2003 Neil Brown <neilb@cse.unsw.edu.au> + * Copyright (c) 2003-2005 Peter Osterlund <petero2@telia.com> + * Copyright (c) 2004 Dmitry Torokhov <dtor@mail.ru> + * Copyright (c) 2005 Vojtech Pavlik <vojtech@suse.cz> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * The spec from ALPS is available from + * <http://wiki.laptop.org/go/Touch_Pad/Tablet>. It refers to this + * device as HGPK (Hybrid GS, PT, and Keymatrix). + * + * The earliest versions of the device had simultaneous reporting; that + * was removed. After that, the device used the Advanced Mode GS/PT streaming + * stuff. That turned out to be too buggy to support, so we've finally + * switched to Mouse Mode (which utilizes only the center 1/3 of the touchpad). + */ + +#define DEBUG +#include <linux/input.h> +#include <linux/serio.h> +#include <linux/libps2.h> +#include <linux/delay.h> +#include <asm/olpc.h> + +#include "psmouse.h" +#include "hgpk.h" + +static int tpdebug; +module_param(tpdebug, int, 0644); +MODULE_PARM_DESC(tpdebug, "enable debugging, dumping packets to KERN_DEBUG."); + +static int recalib_delta = 100; +module_param(recalib_delta, int, 0644); +MODULE_PARM_DESC(recalib_delta, + "packets containing a delta this large will cause a recalibration."); + +/* + * When the touchpad gets ultra-sensitive, one can keep their finger 1/2" + * above the pad and still have it send packets. This causes a jump cursor + * when one places their finger on the pad. We can probably detect the + * jump as we see a large deltas (>= 100px). In mouse mode, I've been + * unable to even come close to 100px deltas during normal usage, so I think + * this threshold is safe. If a large delta occurs, trigger a recalibration. + */ +static void hgpk_jumpy_hack(struct psmouse *psmouse, int x, int y) +{ + struct hgpk_data *priv = psmouse->private; + + if (abs(x) > recalib_delta || abs(y) > recalib_delta) { + hgpk_err(psmouse, ">%dpx jump detected (%d,%d)\n", + recalib_delta, x, y); + /* My car gets forty rods to the hogshead and that's the + * way I likes it! */ + psmouse_queue_work(psmouse, &priv->recalib_wq, + msecs_to_jiffies(1000)); + } +} + +/* + * We have no idea why this particular hardware bug occurs. The touchpad + * will randomly start spewing packets without anything touching the + * pad. This wouldn't necessarily be bad, but it's indicative of a + * severely miscalibrated pad; attempting to use the touchpad while it's + * spewing means the cursor will jump all over the place, and act "drunk". + * + * The packets that are spewed tend to all have deltas between -2 and 2, and + * the cursor will move around without really going very far. It will + * tend to end up in the same location; if we tally up the changes over + * 100 packets, we end up w/ a final delta of close to 0. This happens + * pretty regularly when the touchpad is spewing, and is pretty hard to + * manually trigger (at least for *my* fingers). So, it makes a perfect + * scheme for detecting spews. + */ +static void hgpk_spewing_hack(struct psmouse *psmouse, + int l, int r, int x, int y) +{ + struct hgpk_data *priv = psmouse->private; + + /* ignore button press packets; many in a row could trigger + * a false-positive! */ + if (l || r) + return; + + priv->x_tally += x; + priv->y_tally += y; + + if (++priv->count > 100) { + if (abs(priv->x_tally) < 3 && abs(priv->y_tally) < 3) { + hgpk_dbg(psmouse, "packet spew detected (%d,%d)\n", + priv->x_tally, priv->y_tally); + psmouse_queue_work(psmouse, &priv->recalib_wq, + msecs_to_jiffies(1000)); + } + /* reset every 100 packets */ + priv->count = 0; + priv->x_tally = 0; + priv->y_tally = 0; + } +} + +/* + * HGPK Mouse Mode format (standard mouse format, sans middle button) + * + * byte 0: y-over x-over y-neg x-neg 1 0 swr swl + * byte 1: x7 x6 x5 x4 x3 x2 x1 x0 + * byte 2: y7 y6 y5 y4 y3 y2 y1 y0 + * + * swr/swl are the left/right buttons. + * x-neg/y-neg are the x and y delta negative bits + * x-over/y-over are the x and y overflow bits + */ +static int hgpk_validate_byte(unsigned char *packet) +{ + return (packet[0] & 0x0C) == 0x08; +} + +static void hgpk_process_packet(struct psmouse *psmouse) +{ + struct input_dev *dev = psmouse->dev; + unsigned char *packet = psmouse->packet; + int x, y, left, right; + + left = packet[0] & 1; + right = (packet[0] >> 1) & 1; + + x = packet[1] - ((packet[0] << 4) & 0x100); + y = ((packet[0] << 3) & 0x100) - packet[2]; + + hgpk_jumpy_hack(psmouse, x, y); + hgpk_spewing_hack(psmouse, left, right, x, y); + + if (tpdebug) + hgpk_dbg(psmouse, "l=%d r=%d x=%d y=%d\n", left, right, x, y); + + input_report_key(dev, BTN_LEFT, left); + input_report_key(dev, BTN_RIGHT, right); + + input_report_rel(dev, REL_X, x); + input_report_rel(dev, REL_Y, y); + + input_sync(dev); +} + +static psmouse_ret_t hgpk_process_byte(struct psmouse *psmouse) +{ + struct hgpk_data *priv = psmouse->private; + + if (hgpk_validate_byte(psmouse->packet)) { + hgpk_dbg(psmouse, "%s: (%d) %02x %02x %02x\n", + __func__, psmouse->pktcnt, psmouse->packet[0], + psmouse->packet[1], psmouse->packet[2]); + return PSMOUSE_BAD_DATA; + } + + if (psmouse->pktcnt >= psmouse->pktsize) { + hgpk_process_packet(psmouse); + return PSMOUSE_FULL_PACKET; + } + + if (priv->recalib_window) { + if (time_before(jiffies, priv->recalib_window)) { + /* + * ugh, got a packet inside our recalibration + * window, schedule another recalibration. + */ + hgpk_dbg(psmouse, + "packet inside calibration window, " + "queueing another recalibration\n"); + psmouse_queue_work(psmouse, &priv->recalib_wq, + msecs_to_jiffies(1000)); + } + priv->recalib_window = 0; + } + + return PSMOUSE_GOOD_DATA; +} + +static int hgpk_force_recalibrate(struct psmouse *psmouse) +{ + struct ps2dev *ps2dev = &psmouse->ps2dev; + struct hgpk_data *priv = psmouse->private; + + /* C-series touchpads added the recalibrate command */ + if (psmouse->model < HGPK_MODEL_C) + return 0; + + /* we don't want to race with the irq handler, nor with resyncs */ + psmouse_set_state(psmouse, PSMOUSE_INITIALIZING); + + /* start by resetting the device */ + psmouse_reset(psmouse); + + /* send the recalibrate request */ + if (ps2_command(ps2dev, NULL, 0xf5) || + ps2_command(ps2dev, NULL, 0xf5) || + ps2_command(ps2dev, NULL, 0xe6) || + ps2_command(ps2dev, NULL, 0xf5)) { + return -1; + } + + /* according to ALPS, 150mS is required for recalibration */ + msleep(150); + + /* XXX: If a finger is down during this delay, recalibration will + * detect capacitance incorrectly. This is a hardware bug, and + * we don't have a good way to deal with it. The 2s window stuff + * (below) is our best option for now. + */ + + if (ps2_command(ps2dev, NULL, PSMOUSE_CMD_ENABLE)) + return -1; + + psmouse_set_state(psmouse, PSMOUSE_ACTIVATED); + + /* After we recalibrate, we shouldn't get any packets for 2s. If + * we do, it's likely that someone's finger was on the touchpad. + * If someone's finger *was* on the touchpad, it's probably + * miscalibrated. So, we should schedule another recalibration + */ + priv->recalib_window = jiffies + msecs_to_jiffies(2000); + + return 0; +} + +/* + * This kills power to the touchpad; according to ALPS, current consumption + * goes down to 50uA after running this. To turn power back on, we drive + * MS-DAT low. + */ +static int hgpk_toggle_power(struct psmouse *psmouse, int enable) +{ + struct ps2dev *ps2dev = &psmouse->ps2dev; + int timeo; + + /* Added on D-series touchpads */ + if (psmouse->model < HGPK_MODEL_D) + return 0; + + if (enable) { + psmouse_set_state(psmouse, PSMOUSE_INITIALIZING); + + /* + * Sending a byte will drive MS-DAT low; this will wake up + * the controller. Once we get an ACK back from it, it + * means we can continue with the touchpad re-init. ALPS + * tells us that 1s should be long enough, so set that as + * the upper bound. + */ + for (timeo = 20; timeo > 0; timeo--) { + if (!ps2_sendbyte(&psmouse->ps2dev, + PSMOUSE_CMD_DISABLE, 20)) + break; + msleep(50); + } + + psmouse_reset(psmouse); + + /* should be all set, enable the touchpad */ + ps2_command(&psmouse->ps2dev, NULL, PSMOUSE_CMD_ENABLE); + psmouse_set_state(psmouse, PSMOUSE_ACTIVATED); + + } else { + hgpk_dbg(psmouse, "Powering off touchpad.\n"); + psmouse_set_state(psmouse, PSMOUSE_IGNORE); + + if (ps2_command(ps2dev, NULL, 0xec) || + ps2_command(ps2dev, NULL, 0xec) || + ps2_command(ps2dev, NULL, 0xea)) { + return -1; + } + + /* probably won't see an ACK, the touchpad will be off */ + ps2_sendbyte(&psmouse->ps2dev, 0xec, 20); + } + + return 0; +} + +static int hgpk_poll(struct psmouse *psmouse) +{ + /* We can't poll, so always return failure. */ + return -1; +} + +static int hgpk_reconnect(struct psmouse *psmouse) +{ + /* During suspend/resume the ps2 rails remain powered. We don't want + * to do a reset because it's flush data out of buffers; however, + * earlier prototypes (B1) had some brokenness that required a reset. */ + if (olpc_board_at_least(olpc_board(0xb2))) + if (psmouse->ps2dev.serio->dev.power.power_state.event != + PM_EVENT_ON) + return 0; + + psmouse_reset(psmouse); + + return 0; +} + +static ssize_t hgpk_show_powered(struct psmouse *psmouse, void *data, char *buf) +{ + struct hgpk_data *priv = psmouse->private; + + return sprintf(buf, "%d\n", priv->powered); +} + +static ssize_t hgpk_set_powered(struct psmouse *psmouse, void *data, + const char *buf, size_t count) +{ + struct hgpk_data *priv = psmouse->private; + unsigned long value; + int err; + + err = strict_strtoul(buf, 10, &value); + if (err || value > 1) + return -EINVAL; + + if (value != priv->powered) { + /* + * hgpk_toggle_power will deal w/ state so + * we're not racing w/ irq + */ + err = hgpk_toggle_power(psmouse, value); + if (!err) + priv->powered = value; + } + + return err ? err : count; +} + +__PSMOUSE_DEFINE_ATTR(powered, S_IWUSR | S_IRUGO, NULL, + hgpk_show_powered, hgpk_set_powered, 0); + +static void hgpk_disconnect(struct psmouse *psmouse) +{ + struct hgpk_data *priv = psmouse->private; + + device_remove_file(&psmouse->ps2dev.serio->dev, + &psmouse_attr_powered.dattr); + psmouse_reset(psmouse); + kfree(priv); +} + +static void hgpk_recalib_work(struct work_struct *work) +{ + struct delayed_work *w = container_of(work, struct delayed_work, work); + struct hgpk_data *priv = container_of(w, struct hgpk_data, recalib_wq); + struct psmouse *psmouse = priv->psmouse; + + hgpk_dbg(psmouse, "recalibrating touchpad..\n"); + + if (hgpk_force_recalibrate(psmouse)) + hgpk_err(psmouse, "recalibration failed!\n"); +} + +static int hgpk_register(struct psmouse *psmouse) +{ + struct input_dev *dev = psmouse->dev; + int err; + + /* unset the things that psmouse-base sets which we don't have */ + __clear_bit(BTN_MIDDLE, dev->keybit); + + /* set the things we do have */ + __set_bit(EV_KEY, dev->evbit); + __set_bit(EV_REL, dev->evbit); + + __set_bit(REL_X, dev->relbit); + __set_bit(REL_Y, dev->relbit); + + __set_bit(BTN_LEFT, dev->keybit); + __set_bit(BTN_RIGHT, dev->keybit); + + /* register handlers */ + psmouse->protocol_handler = hgpk_process_byte; + psmouse->poll = hgpk_poll; + psmouse->disconnect = hgpk_disconnect; + psmouse->reconnect = hgpk_reconnect; + psmouse->pktsize = 3; + + /* Disable the idle resync. */ + psmouse->resync_time = 0; + /* Reset after a lot of bad bytes. */ + psmouse->resetafter = 1024; + + err = device_create_file(&psmouse->ps2dev.serio->dev, + &psmouse_attr_powered.dattr); + if (err) + hgpk_err(psmouse, "Failed to create sysfs attribute\n"); + + return err; +} + +int hgpk_init(struct psmouse *psmouse) +{ + struct hgpk_data *priv; + int err = -ENOMEM; + + priv = kzalloc(sizeof(struct hgpk_data), GFP_KERNEL); + if (!priv) + goto alloc_fail; + + psmouse->private = priv; + priv->psmouse = psmouse; + priv->powered = 1; + INIT_DELAYED_WORK(&priv->recalib_wq, hgpk_recalib_work); + + err = psmouse_reset(psmouse); + if (err) + goto init_fail; + + err = hgpk_register(psmouse); + if (err) + goto init_fail; + + return 0; + +init_fail: + kfree(priv); +alloc_fail: + return err; +} + +static enum hgpk_model_t hgpk_get_model(struct psmouse *psmouse) +{ + struct ps2dev *ps2dev = &psmouse->ps2dev; + unsigned char param[3]; + + /* E7, E7, E7, E9 gets us a 3 byte identifier */ + if (ps2_command(ps2dev, NULL, PSMOUSE_CMD_SETSCALE21) || + ps2_command(ps2dev, NULL, PSMOUSE_CMD_SETSCALE21) || + ps2_command(ps2dev, NULL, PSMOUSE_CMD_SETSCALE21) || + ps2_command(ps2dev, param, PSMOUSE_CMD_GETINFO)) { + return -EIO; + } + + hgpk_dbg(psmouse, "ID: %02x %02x %02x", param[0], param[1], param[2]); + + /* HGPK signature: 0x67, 0x00, 0x<model> */ + if (param[0] != 0x67 || param[1] != 0x00) + return -ENODEV; + + hgpk_info(psmouse, "OLPC touchpad revision 0x%x\n", param[2]); + + return param[2]; +} + +int hgpk_detect(struct psmouse *psmouse, int set_properties) +{ + int version; + + version = hgpk_get_model(psmouse); + if (version < 0) + return version; + + if (set_properties) { + psmouse->vendor = "ALPS"; + psmouse->name = "HGPK"; + psmouse->model = version; + } + + return 0; +} diff --git a/drivers/input/mouse/hgpk.h b/drivers/input/mouse/hgpk.h new file mode 100644 index 000000000000..a4b2a96f5f54 --- /dev/null +++ b/drivers/input/mouse/hgpk.h @@ -0,0 +1,49 @@ +/* + * OLPC HGPK (XO-1) touchpad PS/2 mouse driver + */ + +#ifndef _HGPK_H +#define _HGPK_H + +enum hgpk_model_t { + HGPK_MODEL_PREA = 0x0a, /* pre-B1s */ + HGPK_MODEL_A = 0x14, /* found on B1s, PT disabled in hardware */ + HGPK_MODEL_B = 0x28, /* B2s, has capacitance issues */ + HGPK_MODEL_C = 0x3c, + HGPK_MODEL_D = 0x50, /* C1, mass production */ +}; + +struct hgpk_data { + struct psmouse *psmouse; + int powered; + int count, x_tally, y_tally; /* hardware workaround stuff */ + unsigned long recalib_window; + struct delayed_work recalib_wq; +}; + +#define hgpk_dbg(psmouse, format, arg...) \ + dev_dbg(&(psmouse)->ps2dev.serio->dev, format, ## arg) +#define hgpk_err(psmouse, format, arg...) \ + dev_err(&(psmouse)->ps2dev.serio->dev, format, ## arg) +#define hgpk_info(psmouse, format, arg...) \ + dev_info(&(psmouse)->ps2dev.serio->dev, format, ## arg) +#define hgpk_warn(psmouse, format, arg...) \ + dev_warn(&(psmouse)->ps2dev.serio->dev, format, ## arg) +#define hgpk_notice(psmouse, format, arg...) \ + dev_notice(&(psmouse)->ps2dev.serio->dev, format, ## arg) + +#ifdef CONFIG_MOUSE_PS2_OLPC +int hgpk_detect(struct psmouse *psmouse, int set_properties); +int hgpk_init(struct psmouse *psmouse); +#else +static inline int hgpk_detect(struct psmouse *psmouse, int set_properties) +{ + return -ENODEV; +} +static inline int hgpk_init(struct psmouse *psmouse) +{ + return -ENODEV; +} +#endif + +#endif diff --git a/drivers/input/mouse/logips2pp.c b/drivers/input/mouse/logips2pp.c index 0c5660d28caa..390f1dbb98a4 100644 --- a/drivers/input/mouse/logips2pp.c +++ b/drivers/input/mouse/logips2pp.c @@ -157,10 +157,8 @@ static ssize_t ps2pp_attr_show_smartscroll(struct psmouse *psmouse, void *data, static ssize_t ps2pp_attr_set_smartscroll(struct psmouse *psmouse, void *data, const char *buf, size_t count) { unsigned long value; - char *rest; - value = simple_strtoul(buf, &rest, 10); - if (*rest || value > 1) + if (strict_strtoul(buf, 10, &value) || value > 1) return -EINVAL; ps2pp_set_smartscroll(psmouse, value); diff --git a/drivers/input/mouse/psmouse-base.c b/drivers/input/mouse/psmouse-base.c index f5a6be1d3c46..126e977e199e 100644 --- a/drivers/input/mouse/psmouse-base.c +++ b/drivers/input/mouse/psmouse-base.c @@ -25,6 +25,7 @@ #include "synaptics.h" #include "logips2pp.h" #include "alps.h" +#include "hgpk.h" #include "lifebook.h" #include "trackpoint.h" #include "touchkit_ps2.h" @@ -201,6 +202,12 @@ static psmouse_ret_t psmouse_process_byte(struct psmouse *psmouse) return PSMOUSE_FULL_PACKET; } +void psmouse_queue_work(struct psmouse *psmouse, struct delayed_work *work, + unsigned long delay) +{ + queue_delayed_work(kpsmoused_wq, work, delay); +} + /* * __psmouse_set_state() sets new psmouse state and resets all flags. */ @@ -220,7 +227,7 @@ static inline void __psmouse_set_state(struct psmouse *psmouse, enum psmouse_sta * is not a concern. */ -static void psmouse_set_state(struct psmouse *psmouse, enum psmouse_state new_state) +void psmouse_set_state(struct psmouse *psmouse, enum psmouse_state new_state) { serio_pause_rx(psmouse->ps2dev.serio); __psmouse_set_state(psmouse, new_state); @@ -305,7 +312,7 @@ static irqreturn_t psmouse_interrupt(struct serio *serio, psmouse->name, psmouse->phys, psmouse->pktcnt); psmouse->badbyte = psmouse->packet[0]; __psmouse_set_state(psmouse, PSMOUSE_RESYNCING); - queue_work(kpsmoused_wq, &psmouse->resync_work); + psmouse_queue_work(psmouse, &psmouse->resync_work, 0); goto out; } @@ -342,7 +349,7 @@ static irqreturn_t psmouse_interrupt(struct serio *serio, time_after(jiffies, psmouse->last + psmouse->resync_time * HZ)) { psmouse->badbyte = psmouse->packet[0]; __psmouse_set_state(psmouse, PSMOUSE_RESYNCING); - queue_work(kpsmoused_wq, &psmouse->resync_work); + psmouse_queue_work(psmouse, &psmouse->resync_work, 0); goto out; } @@ -630,8 +637,20 @@ static int psmouse_extensions(struct psmouse *psmouse, } } - if (max_proto > PSMOUSE_IMEX) { +/* + * Try OLPC HGPK touchpad. + */ + if (max_proto > PSMOUSE_IMEX && + hgpk_detect(psmouse, set_properties) == 0) { + if (!set_properties || hgpk_init(psmouse) == 0) + return PSMOUSE_HGPK; +/* + * Init failed, try basic relative protocols + */ + max_proto = PSMOUSE_IMEX; + } + if (max_proto > PSMOUSE_IMEX) { if (genius_detect(psmouse, set_properties) == 0) return PSMOUSE_GENPS; @@ -762,6 +781,14 @@ static const struct psmouse_protocol psmouse_protocols[] = { .detect = touchkit_ps2_detect, }, #endif +#ifdef CONFIG_MOUSE_PS2_OLPC + { + .type = PSMOUSE_HGPK, + .name = "OLPC HGPK", + .alias = "hgpk", + .detect = hgpk_detect, + }, +#endif { .type = PSMOUSE_CORTRON, .name = "CortronPS/2", @@ -935,7 +962,7 @@ static int psmouse_poll(struct psmouse *psmouse) static void psmouse_resync(struct work_struct *work) { struct psmouse *parent = NULL, *psmouse = - container_of(work, struct psmouse, resync_work); + container_of(work, struct psmouse, resync_work.work); struct serio *serio = psmouse->ps2dev.serio; psmouse_ret_t rc = PSMOUSE_GOOD_DATA; int failed = 0, enabled = 0; @@ -1194,7 +1221,7 @@ static int psmouse_connect(struct serio *serio, struct serio_driver *drv) goto err_free; ps2_init(&psmouse->ps2dev, serio); - INIT_WORK(&psmouse->resync_work, psmouse_resync); + INIT_DELAYED_WORK(&psmouse->resync_work, psmouse_resync); psmouse->dev = input_dev; snprintf(psmouse->phys, sizeof(psmouse->phys), "%s/input0", serio->phys); @@ -1395,25 +1422,29 @@ ssize_t psmouse_attr_set_helper(struct device *dev, struct device_attribute *dev psmouse = serio_get_drvdata(serio); - if (psmouse->state == PSMOUSE_IGNORE) { - retval = -ENODEV; - goto out_unlock; - } + if (attr->protect) { + if (psmouse->state == PSMOUSE_IGNORE) { + retval = -ENODEV; + goto out_unlock; + } - if (serio->parent && serio->id.type == SERIO_PS_PSTHRU) { - parent = serio_get_drvdata(serio->parent); - psmouse_deactivate(parent); - } + if (serio->parent && serio->id.type == SERIO_PS_PSTHRU) { + parent = serio_get_drvdata(serio->parent); + psmouse_deactivate(parent); + } - psmouse_deactivate(psmouse); + psmouse_deactivate(psmouse); + } retval = attr->set(psmouse, attr->data, buf, count); - if (retval != -ENODEV) - psmouse_activate(psmouse); + if (attr->protect) { + if (retval != -ENODEV) + psmouse_activate(psmouse); - if (parent) - psmouse_activate(parent); + if (parent) + psmouse_activate(parent); + } out_unlock: mutex_unlock(&psmouse_mutex); @@ -1433,10 +1464,8 @@ static ssize_t psmouse_set_int_attr(struct psmouse *psmouse, void *offset, const { unsigned int *field = (unsigned int *)((char *)psmouse + (size_t)offset); unsigned long value; - char *rest; - value = simple_strtoul(buf, &rest, 10); - if (*rest) + if (strict_strtoul(buf, 10, &value)) return -EINVAL; if ((unsigned int)value != value) @@ -1549,10 +1578,8 @@ static ssize_t psmouse_attr_set_protocol(struct psmouse *psmouse, void *data, co static ssize_t psmouse_attr_set_rate(struct psmouse *psmouse, void *data, const char *buf, size_t count) { unsigned long value; - char *rest; - value = simple_strtoul(buf, &rest, 10); - if (*rest) + if (strict_strtoul(buf, 10, &value)) return -EINVAL; psmouse->set_rate(psmouse, value); @@ -1562,10 +1589,8 @@ static ssize_t psmouse_attr_set_rate(struct psmouse *psmouse, void *data, const static ssize_t psmouse_attr_set_resolution(struct psmouse *psmouse, void *data, const char *buf, size_t count) { unsigned long value; - char *rest; - value = simple_strtoul(buf, &rest, 10); - if (*rest) + if (strict_strtoul(buf, 10, &value)) return -EINVAL; psmouse->set_resolution(psmouse, value); diff --git a/drivers/input/mouse/psmouse.h b/drivers/input/mouse/psmouse.h index 1317bdd8cc7c..8b608a1cdd12 100644 --- a/drivers/input/mouse/psmouse.h +++ b/drivers/input/mouse/psmouse.h @@ -39,7 +39,7 @@ struct psmouse { void *private; struct input_dev *dev; struct ps2dev ps2dev; - struct work_struct resync_work; + struct delayed_work resync_work; char *vendor; char *name; unsigned char packet[8]; @@ -89,20 +89,24 @@ enum psmouse_type { PSMOUSE_TRACKPOINT, PSMOUSE_TOUCHKIT_PS2, PSMOUSE_CORTRON, + PSMOUSE_HGPK, PSMOUSE_AUTO /* This one should always be last */ }; +void psmouse_queue_work(struct psmouse *psmouse, struct delayed_work *work, + unsigned long delay); int psmouse_sliced_command(struct psmouse *psmouse, unsigned char command); int psmouse_reset(struct psmouse *psmouse); +void psmouse_set_state(struct psmouse *psmouse, enum psmouse_state new_state); void psmouse_set_resolution(struct psmouse *psmouse, unsigned int resolution); - struct psmouse_attribute { struct device_attribute dattr; void *data; ssize_t (*show)(struct psmouse *psmouse, void *data, char *buf); ssize_t (*set)(struct psmouse *psmouse, void *data, const char *buf, size_t count); + int protect; }; #define to_psmouse_attr(a) container_of((a), struct psmouse_attribute, dattr) @@ -111,7 +115,7 @@ ssize_t psmouse_attr_show_helper(struct device *dev, struct device_attribute *at ssize_t psmouse_attr_set_helper(struct device *dev, struct device_attribute *attr, const char *buf, size_t count); -#define PSMOUSE_DEFINE_ATTR(_name, _mode, _data, _show, _set) \ +#define __PSMOUSE_DEFINE_ATTR(_name, _mode, _data, _show, _set, _protect) \ static ssize_t _show(struct psmouse *, void *data, char *); \ static ssize_t _set(struct psmouse *, void *data, const char *, size_t); \ static struct psmouse_attribute psmouse_attr_##_name = { \ @@ -126,6 +130,10 @@ static struct psmouse_attribute psmouse_attr_##_name = { \ .data = _data, \ .show = _show, \ .set = _set, \ + .protect = _protect, \ } +#define PSMOUSE_DEFINE_ATTR(_name, _mode, _data, _show, _set) \ + __PSMOUSE_DEFINE_ATTR(_name, _mode, _data, _show, _set, 1) + #endif /* _PSMOUSE_H */ diff --git a/drivers/input/mouse/trackpoint.c b/drivers/input/mouse/trackpoint.c index 26b845fc186a..e68c814c4361 100644 --- a/drivers/input/mouse/trackpoint.c +++ b/drivers/input/mouse/trackpoint.c @@ -89,10 +89,8 @@ static ssize_t trackpoint_set_int_attr(struct psmouse *psmouse, void *data, struct trackpoint_attr_data *attr = data; unsigned char *field = (unsigned char *)((char *)tp + attr->field_offset); unsigned long value; - char *rest; - value = simple_strtoul(buf, &rest, 10); - if (*rest || value > 255) + if (strict_strtoul(buf, 10, &value) || value > 255) return -EINVAL; *field = value; @@ -117,10 +115,8 @@ static ssize_t trackpoint_set_bit_attr(struct psmouse *psmouse, void *data, struct trackpoint_attr_data *attr = data; unsigned char *field = (unsigned char *)((char *)tp + attr->field_offset); unsigned long value; - char *rest; - value = simple_strtoul(buf, &rest, 10); - if (*rest || value > 1) + if (strict_strtoul(buf, 10, &value) || value > 1) return -EINVAL; if (attr->inverted) diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-x86ia64io.h index 5aafe24984c5..a321aea2c7b5 100644 --- a/drivers/input/serio/i8042-x86ia64io.h +++ b/drivers/input/serio/i8042-x86ia64io.h @@ -322,6 +322,13 @@ static struct dmi_system_id __initdata i8042_dmi_nomux_table[] = { DMI_MATCH(DMI_PRODUCT_NAME, "N34AS6"), }, }, + { + .ident = "IBM 2656", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "IBM"), + DMI_MATCH(DMI_PRODUCT_NAME, "2656"), + }, + }, { } }; diff --git a/drivers/input/serio/serio_raw.c b/drivers/input/serio/serio_raw.c index c9397c8ee97e..470770c09260 100644 --- a/drivers/input/serio/serio_raw.c +++ b/drivers/input/serio/serio_raw.c @@ -373,6 +373,12 @@ static struct serio_device_id serio_raw_serio_ids[] = { .id = SERIO_ANY, .extra = SERIO_ANY, }, + { + .type = SERIO_8042_XL, + .proto = SERIO_ANY, + .id = SERIO_ANY, + .extra = SERIO_ANY, + }, { 0 } }; diff --git a/drivers/input/tablet/aiptek.c b/drivers/input/tablet/aiptek.c index 8f037a1d44a6..e53c838f1866 100644 --- a/drivers/input/tablet/aiptek.c +++ b/drivers/input/tablet/aiptek.c @@ -1202,16 +1202,22 @@ static ssize_t store_tabletXtilt(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { struct aiptek *aiptek = dev_get_drvdata(dev); - int x; + long x; + + if (strict_strtol(buf, 10, &x)) { + size_t len = buf[count - 1] == '\n' ? count - 1 : count; + + if (strncmp(buf, "disable", len)) + return -EINVAL; - if (strcmp(buf, "disable") == 0) { aiptek->newSetting.xTilt = AIPTEK_TILT_DISABLE; } else { - x = (int)simple_strtol(buf, NULL, 10); - if (x >= AIPTEK_TILT_MIN && x <= AIPTEK_TILT_MAX) { - aiptek->newSetting.xTilt = x; - } + if (x < AIPTEK_TILT_MIN || x > AIPTEK_TILT_MAX) + return -EINVAL; + + aiptek->newSetting.xTilt = x; } + return count; } @@ -1238,16 +1244,22 @@ static ssize_t store_tabletYtilt(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { struct aiptek *aiptek = dev_get_drvdata(dev); - int y; + long y; + + if (strict_strtol(buf, 10, &y)) { + size_t len = buf[count - 1] == '\n' ? count - 1 : count; + + if (strncmp(buf, "disable", len)) + return -EINVAL; - if (strcmp(buf, "disable") == 0) { aiptek->newSetting.yTilt = AIPTEK_TILT_DISABLE; } else { - y = (int)simple_strtol(buf, NULL, 10); - if (y >= AIPTEK_TILT_MIN && y <= AIPTEK_TILT_MAX) { - aiptek->newSetting.yTilt = y; - } + if (y < AIPTEK_TILT_MIN || y > AIPTEK_TILT_MAX) + return -EINVAL; + + aiptek->newSetting.yTilt = y; } + return count; } @@ -1269,8 +1281,12 @@ static ssize_t store_tabletJitterDelay(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { struct aiptek *aiptek = dev_get_drvdata(dev); + long j; + + if (strict_strtol(buf, 10, &j)) + return -EINVAL; - aiptek->newSetting.jitterDelay = (int)simple_strtol(buf, NULL, 10); + aiptek->newSetting.jitterDelay = (int)j; return count; } @@ -1294,8 +1310,12 @@ static ssize_t store_tabletProgrammableDelay(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { struct aiptek *aiptek = dev_get_drvdata(dev); + long d; - aiptek->newSetting.programmableDelay = (int)simple_strtol(buf, NULL, 10); + if (strict_strtol(buf, 10, &d)) + return -EINVAL; + + aiptek->newSetting.programmableDelay = (int)d; return count; } @@ -1541,8 +1561,11 @@ static ssize_t store_tabletWheel(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { struct aiptek *aiptek = dev_get_drvdata(dev); + long w; + + if (strict_strtol(buf, 10, &w)) return -EINVAL; - aiptek->newSetting.wheel = (int)simple_strtol(buf, NULL, 10); + aiptek->newSetting.wheel = (int)w; return count; } diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c index 8583c766d565..b9b7fc6ff1eb 100644 --- a/drivers/input/touchscreen/ads7846.c +++ b/drivers/input/touchscreen/ads7846.c @@ -69,6 +69,17 @@ struct ts_event { int ignore; }; +/* + * We allocate this separately to avoid cache line sharing issues when + * driver is used with DMA-based SPI controllers (like atmel_spi) on + * systems where main memory is not DMA-coherent (most non-x86 boards). + */ +struct ads7846_packet { + u8 read_x, read_y, read_z1, read_z2, pwrdown; + u16 dummy; /* for the pwrdown read */ + struct ts_event tc; +}; + struct ads7846 { struct input_dev *input; char phys[32]; @@ -86,9 +97,7 @@ struct ads7846 { u16 x_plate_ohms; u16 pressure_max; - u8 read_x, read_y, read_z1, read_z2, pwrdown; - u16 dummy; /* for the pwrdown read */ - struct ts_event tc; + struct ads7846_packet *packet; struct spi_transfer xfer[18]; struct spi_message msg[5]; @@ -463,10 +472,11 @@ static ssize_t ads7846_disable_store(struct device *dev, const char *buf, size_t count) { struct ads7846 *ts = dev_get_drvdata(dev); - char *endp; - int i; + long i; + + if (strict_strtoul(buf, 10, &i)) + return -EINVAL; - i = simple_strtoul(buf, &endp, 10); spin_lock_irq(&ts->lock); if (i) @@ -512,16 +522,17 @@ static int get_pendown_state(struct ads7846 *ts) static void ads7846_rx(void *ads) { struct ads7846 *ts = ads; + struct ads7846_packet *packet = ts->packet; unsigned Rt; u16 x, y, z1, z2; /* ads7846_rx_val() did in-place conversion (including byteswap) from * on-the-wire format as part of debouncing to get stable readings. */ - x = ts->tc.x; - y = ts->tc.y; - z1 = ts->tc.z1; - z2 = ts->tc.z2; + x = packet->tc.x; + y = packet->tc.y; + z1 = packet->tc.z1; + z2 = packet->tc.z2; /* range filtering */ if (x == MAX_12BIT) @@ -545,10 +556,10 @@ static void ads7846_rx(void *ads) * the maximum. Don't report it to user space, repeat at least * once more the measurement */ - if (ts->tc.ignore || Rt > ts->pressure_max) { + if (packet->tc.ignore || Rt > ts->pressure_max) { #ifdef VERBOSE pr_debug("%s: ignored %d pressure %d\n", - ts->spi->dev.bus_id, ts->tc.ignore, Rt); + ts->spi->dev.bus_id, packet->tc.ignore, Rt); #endif hrtimer_start(&ts->timer, ktime_set(0, TS_POLL_PERIOD), HRTIMER_MODE_REL); @@ -641,6 +652,7 @@ static int ads7846_no_filter(void *ads, int data_idx, int *val) static void ads7846_rx_val(void *ads) { struct ads7846 *ts = ads; + struct ads7846_packet *packet = ts->packet; struct spi_message *m; struct spi_transfer *t; int val; @@ -660,7 +672,7 @@ static void ads7846_rx_val(void *ads) case ADS7846_FILTER_REPEAT: break; case ADS7846_FILTER_IGNORE: - ts->tc.ignore = 1; + packet->tc.ignore = 1; /* Last message will contain ads7846_rx() as the * completion function. */ @@ -668,7 +680,7 @@ static void ads7846_rx_val(void *ads) break; case ADS7846_FILTER_OK: *(u16 *)t->rx_buf = val; - ts->tc.ignore = 0; + packet->tc.ignore = 0; m = &ts->msg[++ts->msg_idx]; break; default: @@ -773,7 +785,6 @@ static void ads7846_disable(struct ads7846 *ts) /* we know the chip's in lowpower mode since we always * leave it that way after every request */ - } /* Must be called with ts->lock held */ @@ -849,6 +860,7 @@ static int __devinit setup_pendown(struct spi_device *spi, struct ads7846 *ts) static int __devinit ads7846_probe(struct spi_device *spi) { struct ads7846 *ts; + struct ads7846_packet *packet; struct input_dev *input_dev; struct ads7846_platform_data *pdata = spi->dev.platform_data; struct spi_message *m; @@ -884,14 +896,16 @@ static int __devinit ads7846_probe(struct spi_device *spi) return err; ts = kzalloc(sizeof(struct ads7846), GFP_KERNEL); + packet = kzalloc(sizeof(struct ads7846_packet), GFP_KERNEL); input_dev = input_allocate_device(); - if (!ts || !input_dev) { + if (!ts || !packet || !input_dev) { err = -ENOMEM; goto err_free_mem; } dev_set_drvdata(&spi->dev, ts); + ts->packet = packet; ts->spi = spi; ts->input = input_dev; ts->vref_mv = pdata->vref_mv; @@ -963,13 +977,13 @@ static int __devinit ads7846_probe(struct spi_device *spi) spi_message_init(m); /* y- still on; turn on only y+ (and ADC) */ - ts->read_y = READ_Y(vref); - x->tx_buf = &ts->read_y; + packet->read_y = READ_Y(vref); + x->tx_buf = &packet->read_y; x->len = 1; spi_message_add_tail(x, m); x++; - x->rx_buf = &ts->tc.y; + x->rx_buf = &packet->tc.y; x->len = 2; spi_message_add_tail(x, m); @@ -981,12 +995,12 @@ static int __devinit ads7846_probe(struct spi_device *spi) x->delay_usecs = pdata->settle_delay_usecs; x++; - x->tx_buf = &ts->read_y; + x->tx_buf = &packet->read_y; x->len = 1; spi_message_add_tail(x, m); x++; - x->rx_buf = &ts->tc.y; + x->rx_buf = &packet->tc.y; x->len = 2; spi_message_add_tail(x, m); } @@ -999,13 +1013,13 @@ static int __devinit ads7846_probe(struct spi_device *spi) /* turn y- off, x+ on, then leave in lowpower */ x++; - ts->read_x = READ_X(vref); - x->tx_buf = &ts->read_x; + packet->read_x = READ_X(vref); + x->tx_buf = &packet->read_x; x->len = 1; spi_message_add_tail(x, m); x++; - x->rx_buf = &ts->tc.x; + x->rx_buf = &packet->tc.x; x->len = 2; spi_message_add_tail(x, m); @@ -1014,12 +1028,12 @@ static int __devinit ads7846_probe(struct spi_device *spi) x->delay_usecs = pdata->settle_delay_usecs; x++; - x->tx_buf = &ts->read_x; + x->tx_buf = &packet->read_x; x->len = 1; spi_message_add_tail(x, m); x++; - x->rx_buf = &ts->tc.x; + x->rx_buf = &packet->tc.x; x->len = 2; spi_message_add_tail(x, m); } @@ -1033,13 +1047,13 @@ static int __devinit ads7846_probe(struct spi_device *spi) spi_message_init(m); x++; - ts->read_z1 = READ_Z1(vref); - x->tx_buf = &ts->read_z1; + packet->read_z1 = READ_Z1(vref); + x->tx_buf = &packet->read_z1; x->len = 1; spi_message_add_tail(x, m); x++; - x->rx_buf = &ts->tc.z1; + x->rx_buf = &packet->tc.z1; x->len = 2; spi_message_add_tail(x, m); @@ -1048,12 +1062,12 @@ static int __devinit ads7846_probe(struct spi_device *spi) x->delay_usecs = pdata->settle_delay_usecs; x++; - x->tx_buf = &ts->read_z1; + x->tx_buf = &packet->read_z1; x->len = 1; spi_message_add_tail(x, m); x++; - x->rx_buf = &ts->tc.z1; + x->rx_buf = &packet->tc.z1; x->len = 2; spi_message_add_tail(x, m); } @@ -1065,13 +1079,13 @@ static int __devinit ads7846_probe(struct spi_device *spi) spi_message_init(m); x++; - ts->read_z2 = READ_Z2(vref); - x->tx_buf = &ts->read_z2; + packet->read_z2 = READ_Z2(vref); + x->tx_buf = &packet->read_z2; x->len = 1; spi_message_add_tail(x, m); x++; - x->rx_buf = &ts->tc.z2; + x->rx_buf = &packet->tc.z2; x->len = 2; spi_message_add_tail(x, m); @@ -1080,12 +1094,12 @@ static int __devinit ads7846_probe(struct spi_device *spi) x->delay_usecs = pdata->settle_delay_usecs; x++; - x->tx_buf = &ts->read_z2; + x->tx_buf = &packet->read_z2; x->len = 1; spi_message_add_tail(x, m); x++; - x->rx_buf = &ts->tc.z2; + x->rx_buf = &packet->tc.z2; x->len = 2; spi_message_add_tail(x, m); } @@ -1099,13 +1113,13 @@ static int __devinit ads7846_probe(struct spi_device *spi) spi_message_init(m); x++; - ts->pwrdown = PWRDOWN; - x->tx_buf = &ts->pwrdown; + packet->pwrdown = PWRDOWN; + x->tx_buf = &packet->pwrdown; x->len = 1; spi_message_add_tail(x, m); x++; - x->rx_buf = &ts->dummy; + x->rx_buf = &packet->dummy; x->len = 2; CS_CHANGE(*x); spi_message_add_tail(x, m); @@ -1158,6 +1172,7 @@ static int __devinit ads7846_probe(struct spi_device *spi) ts->filter_cleanup(ts->filter_data); err_free_mem: input_free_device(input_dev); + kfree(packet); kfree(ts); return err; } @@ -1183,6 +1198,7 @@ static int __devexit ads7846_remove(struct spi_device *spi) if (ts->filter_cleanup) ts->filter_cleanup(ts->filter_data); + kfree(ts->packet); kfree(ts); dev_dbg(&spi->dev, "unregistered touchscreen\n"); diff --git a/drivers/input/touchscreen/atmel_tsadcc.c b/drivers/input/touchscreen/atmel_tsadcc.c index eee126b19e8b..a89a6a8f05e6 100644 --- a/drivers/input/touchscreen/atmel_tsadcc.c +++ b/drivers/input/touchscreen/atmel_tsadcc.c @@ -91,6 +91,9 @@ struct atmel_tsadcc { char phys[32]; struct clk *clk; int irq; + unsigned int prev_absx; + unsigned int prev_absy; + unsigned char bufferedmeasure; }; static void __iomem *tsc_base; @@ -100,10 +103,9 @@ static void __iomem *tsc_base; static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) { - struct input_dev *input_dev = ((struct atmel_tsadcc *)dev)->input; + struct atmel_tsadcc *ts_dev = (struct atmel_tsadcc *)dev; + struct input_dev *input_dev = ts_dev->input; - unsigned int absx; - unsigned int absy; unsigned int status; unsigned int reg; @@ -121,6 +123,7 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT); input_report_key(input_dev, BTN_TOUCH, 0); + ts_dev->bufferedmeasure = 0; input_sync(input_dev); } else if (status & ATMEL_TSADCC_PENCNT) { @@ -138,16 +141,23 @@ static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev) } else if (status & ATMEL_TSADCC_EOC(3)) { /* Conversion finished */ - absx = atmel_tsadcc_read(ATMEL_TSADCC_CDR3) << 10; - absx /= atmel_tsadcc_read(ATMEL_TSADCC_CDR2); - - absy = atmel_tsadcc_read(ATMEL_TSADCC_CDR1) << 10; - absy /= atmel_tsadcc_read(ATMEL_TSADCC_CDR0); - - input_report_abs(input_dev, ABS_X, absx); - input_report_abs(input_dev, ABS_Y, absy); - input_report_key(input_dev, BTN_TOUCH, 1); - input_sync(input_dev); + if (ts_dev->bufferedmeasure) { + /* Last measurement is always discarded, since it can + * be erroneous. + * Always report previous measurement */ + input_report_abs(input_dev, ABS_X, ts_dev->prev_absx); + input_report_abs(input_dev, ABS_Y, ts_dev->prev_absy); + input_report_key(input_dev, BTN_TOUCH, 1); + input_sync(input_dev); + } else + ts_dev->bufferedmeasure = 1; + + /* Now make new measurement */ + ts_dev->prev_absx = atmel_tsadcc_read(ATMEL_TSADCC_CDR3) << 10; + ts_dev->prev_absx /= atmel_tsadcc_read(ATMEL_TSADCC_CDR2); + + ts_dev->prev_absy = atmel_tsadcc_read(ATMEL_TSADCC_CDR1) << 10; + ts_dev->prev_absy /= atmel_tsadcc_read(ATMEL_TSADCC_CDR0); } return IRQ_HANDLED; @@ -223,6 +233,7 @@ static int __devinit atmel_tsadcc_probe(struct platform_device *pdev) } ts_dev->input = input_dev; + ts_dev->bufferedmeasure = 0; snprintf(ts_dev->phys, sizeof(ts_dev->phys), "%s/input0", pdev->dev.bus_id); diff --git a/drivers/input/touchscreen/mainstone-wm97xx.c b/drivers/input/touchscreen/mainstone-wm97xx.c index 37a555f37306..ba648750a8d9 100644 --- a/drivers/input/touchscreen/mainstone-wm97xx.c +++ b/drivers/input/touchscreen/mainstone-wm97xx.c @@ -3,8 +3,7 @@ * Wolfson WM97xx AC97 Codecs. * * Copyright 2004, 2007 Wolfson Microelectronics PLC. - * Author: Liam Girdwood - * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * Author: Liam Girdwood <lrg@slimlogic.co.uk> * Parts Copyright : Ian Molton <spyro@f2s.com> * Andrew Zabolotny <zap@homelink.ru> * @@ -296,6 +295,6 @@ module_init(mainstone_wm97xx_init); module_exit(mainstone_wm97xx_exit); /* Module information */ -MODULE_AUTHOR("Liam Girdwood <liam.girdwood@wolfsonmicro.com>"); +MODULE_AUTHOR("Liam Girdwood <lrg@slimlogic.co.uk>"); MODULE_DESCRIPTION("wm97xx continuous touch driver for mainstone"); MODULE_LICENSE("GPL"); diff --git a/drivers/input/touchscreen/wm9705.c b/drivers/input/touchscreen/wm9705.c index 372efbc694ff..6b5be742c27d 100644 --- a/drivers/input/touchscreen/wm9705.c +++ b/drivers/input/touchscreen/wm9705.c @@ -2,8 +2,7 @@ * wm9705.c -- Codec driver for Wolfson WM9705 AC97 Codec. * * Copyright 2003, 2004, 2005, 2006, 2007 Wolfson Microelectronics PLC. - * Author: Liam Girdwood - * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * Author: Liam Girdwood <lrg@slimlogic.co.uk> * Parts Copyright : Ian Molton <spyro@f2s.com> * Andrew Zabolotny <zap@homelink.ru> * Russell King <rmk@arm.linux.org.uk> @@ -347,6 +346,6 @@ struct wm97xx_codec_drv wm9705_codec = { EXPORT_SYMBOL_GPL(wm9705_codec); /* Module information */ -MODULE_AUTHOR("Liam Girdwood <liam.girdwood@wolfsonmicro.com>"); +MODULE_AUTHOR("Liam Girdwood <lrg@slimlogic.co.uk>"); MODULE_DESCRIPTION("WM9705 Touch Screen Driver"); MODULE_LICENSE("GPL"); diff --git a/drivers/input/touchscreen/wm9712.c b/drivers/input/touchscreen/wm9712.c index c8bb1e7335fc..7490b05c3566 100644 --- a/drivers/input/touchscreen/wm9712.c +++ b/drivers/input/touchscreen/wm9712.c @@ -2,8 +2,7 @@ * wm9712.c -- Codec driver for Wolfson WM9712 AC97 Codecs. * * Copyright 2003, 2004, 2005, 2006, 2007 Wolfson Microelectronics PLC. - * Author: Liam Girdwood - * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * Author: Liam Girdwood <lrg@slimlogic.co.uk> * Parts Copyright : Ian Molton <spyro@f2s.com> * Andrew Zabolotny <zap@homelink.ru> * Russell King <rmk@arm.linux.org.uk> @@ -462,6 +461,6 @@ struct wm97xx_codec_drv wm9712_codec = { EXPORT_SYMBOL_GPL(wm9712_codec); /* Module information */ -MODULE_AUTHOR("Liam Girdwood <liam.girdwood@wolfsonmicro.com>"); +MODULE_AUTHOR("Liam Girdwood <lrg@slimlogic.co.uk>"); MODULE_DESCRIPTION("WM9712 Touch Screen Driver"); MODULE_LICENSE("GPL"); diff --git a/drivers/input/touchscreen/wm9713.c b/drivers/input/touchscreen/wm9713.c index 781ee83547e6..238b5132712e 100644 --- a/drivers/input/touchscreen/wm9713.c +++ b/drivers/input/touchscreen/wm9713.c @@ -2,8 +2,7 @@ * wm9713.c -- Codec touch driver for Wolfson WM9713 AC97 Codec. * * Copyright 2003, 2004, 2005, 2006, 2007, 2008 Wolfson Microelectronics PLC. - * Author: Liam Girdwood - * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * Author: Liam Girdwood <lrg@slimlogic.co.uk> * Parts Copyright : Ian Molton <spyro@f2s.com> * Andrew Zabolotny <zap@homelink.ru> * Russell King <rmk@arm.linux.org.uk> @@ -476,6 +475,6 @@ struct wm97xx_codec_drv wm9713_codec = { EXPORT_SYMBOL_GPL(wm9713_codec); /* Module information */ -MODULE_AUTHOR("Liam Girdwood <liam.girdwood@wolfsonmicro.com>"); +MODULE_AUTHOR("Liam Girdwood <lrg@slimlogic.co.uk>"); MODULE_DESCRIPTION("WM9713 Touch Screen Driver"); MODULE_LICENSE("GPL"); diff --git a/drivers/input/touchscreen/wm97xx-core.c b/drivers/input/touchscreen/wm97xx-core.c index d589ab0e3adc..d15aa11d7056 100644 --- a/drivers/input/touchscreen/wm97xx-core.c +++ b/drivers/input/touchscreen/wm97xx-core.c @@ -3,8 +3,7 @@ * and WM9713 AC97 Codecs. * * Copyright 2003, 2004, 2005, 2006, 2007, 2008 Wolfson Microelectronics PLC. - * Author: Liam Girdwood - * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * Author: Liam Girdwood <lrg@slimlogic.co.uk> * Parts Copyright : Ian Molton <spyro@f2s.com> * Andrew Zabolotny <zap@homelink.ru> * Russell King <rmk@arm.linux.org.uk> @@ -824,6 +823,6 @@ module_init(wm97xx_init); module_exit(wm97xx_exit); /* Module information */ -MODULE_AUTHOR("Liam Girdwood <liam.girdwood@wolfsonmicro.com>"); +MODULE_AUTHOR("Liam Girdwood <lrg@slimlogic.co.uk>"); MODULE_DESCRIPTION("WM97xx Core - Touch Screen / AUX ADC / GPIO Driver"); MODULE_LICENSE("GPL"); diff --git a/drivers/md/faulty.c b/drivers/md/faulty.c index 268547dbfbd3..f26c1f9a475b 100644 --- a/drivers/md/faulty.c +++ b/drivers/md/faulty.c @@ -287,6 +287,8 @@ static int run(mddev_t *mddev) int i; conf_t *conf = kmalloc(sizeof(*conf), GFP_KERNEL); + if (!conf) + return -ENOMEM; for (i=0; i<Modes; i++) { atomic_set(&conf->counters[i], 0); diff --git a/drivers/md/linear.c b/drivers/md/linear.c index b9cbee688fae..190147c79e79 100644 --- a/drivers/md/linear.c +++ b/drivers/md/linear.c @@ -16,16 +16,8 @@ Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ -#include <linux/module.h> - -#include <linux/raid/md.h> -#include <linux/slab.h> #include <linux/raid/linear.h> -#define MAJOR_NR MD_MAJOR -#define MD_DRIVER -#define MD_PERSONALITY - /* * find which device holds a particular offset */ @@ -33,16 +25,15 @@ static inline dev_info_t *which_dev(mddev_t *mddev, sector_t sector) { dev_info_t *hash; linear_conf_t *conf = mddev_to_conf(mddev); - sector_t block = sector >> 1; /* * sector_div(a,b) returns the remainer and sets a to a/b */ - block >>= conf->preshift; - (void)sector_div(block, conf->hash_spacing); - hash = conf->hash_table[block]; + sector >>= conf->sector_shift; + (void)sector_div(sector, conf->spacing); + hash = conf->hash_table[sector]; - while ((sector>>1) >= (hash->size + hash->offset)) + while (sector >= hash->num_sectors + hash->start_sector) hash++; return hash; } @@ -65,7 +56,7 @@ static int linear_mergeable_bvec(struct request_queue *q, sector_t sector = bvm->bi_sector + get_start_sect(bvm->bi_bdev); dev0 = which_dev(mddev, sector); - maxsectors = (dev0->size << 1) - (sector - (dev0->offset<<1)); + maxsectors = dev0->num_sectors - (sector - dev0->start_sector); if (maxsectors < bio_sectors) maxsectors = 0; @@ -112,8 +103,8 @@ static linear_conf_t *linear_conf(mddev_t *mddev, int raid_disks) dev_info_t **table; mdk_rdev_t *rdev; int i, nb_zone, cnt; - sector_t min_spacing; - sector_t curr_offset; + sector_t min_sectors; + sector_t curr_sector; struct list_head *tmp; conf = kzalloc (sizeof (*conf) + raid_disks*sizeof(dev_info_t), @@ -145,7 +136,7 @@ static linear_conf_t *linear_conf(mddev_t *mddev, int raid_disks) mddev->queue->max_sectors > (PAGE_SIZE>>9)) blk_queue_max_sectors(mddev->queue, PAGE_SIZE>>9); - disk->size = rdev->size; + disk->num_sectors = rdev->size * 2; conf->array_sectors += rdev->size * 2; cnt++; @@ -155,34 +146,34 @@ static linear_conf_t *linear_conf(mddev_t *mddev, int raid_disks) goto out; } - min_spacing = conf->array_sectors / 2; - sector_div(min_spacing, PAGE_SIZE/sizeof(struct dev_info *)); + min_sectors = conf->array_sectors; + sector_div(min_sectors, PAGE_SIZE/sizeof(struct dev_info *)); - /* min_spacing is the minimum spacing that will fit the hash + /* min_sectors is the minimum spacing that will fit the hash * table in one PAGE. This may be much smaller than needed. * We find the smallest non-terminal set of consecutive devices - * that is larger than min_spacing as use the size of that as + * that is larger than min_sectors and use the size of that as * the actual spacing */ - conf->hash_spacing = conf->array_sectors / 2; + conf->spacing = conf->array_sectors; for (i=0; i < cnt-1 ; i++) { - sector_t sz = 0; + sector_t tmp = 0; int j; - for (j = i; j < cnt - 1 && sz < min_spacing; j++) - sz += conf->disks[j].size; - if (sz >= min_spacing && sz < conf->hash_spacing) - conf->hash_spacing = sz; + for (j = i; j < cnt - 1 && tmp < min_sectors; j++) + tmp += conf->disks[j].num_sectors; + if (tmp >= min_sectors && tmp < conf->spacing) + conf->spacing = tmp; } - /* hash_spacing may be too large for sector_div to work with, + /* spacing may be too large for sector_div to work with, * so we might need to pre-shift */ - conf->preshift = 0; + conf->sector_shift = 0; if (sizeof(sector_t) > sizeof(u32)) { - sector_t space = conf->hash_spacing; + sector_t space = conf->spacing; while (space > (sector_t)(~(u32)0)) { space >>= 1; - conf->preshift++; + conf->sector_shift++; } } /* @@ -194,9 +185,9 @@ static linear_conf_t *linear_conf(mddev_t *mddev, int raid_disks) unsigned round; unsigned long base; - sz = conf->array_sectors >> (conf->preshift + 1); + sz = conf->array_sectors >> conf->sector_shift; sz += 1; /* force round-up */ - base = conf->hash_spacing >> conf->preshift; + base = conf->spacing >> conf->sector_shift; round = sector_div(sz, base); nb_zone = sz + (round ? 1 : 0); } @@ -211,32 +202,31 @@ static linear_conf_t *linear_conf(mddev_t *mddev, int raid_disks) * Here we generate the linear hash table * First calculate the device offsets. */ - conf->disks[0].offset = 0; + conf->disks[0].start_sector = 0; for (i = 1; i < raid_disks; i++) - conf->disks[i].offset = - conf->disks[i-1].offset + - conf->disks[i-1].size; + conf->disks[i].start_sector = + conf->disks[i-1].start_sector + + conf->disks[i-1].num_sectors; table = conf->hash_table; - curr_offset = 0; i = 0; - for (curr_offset = 0; - curr_offset < conf->array_sectors / 2; - curr_offset += conf->hash_spacing) { + for (curr_sector = 0; + curr_sector < conf->array_sectors; + curr_sector += conf->spacing) { while (i < raid_disks-1 && - curr_offset >= conf->disks[i+1].offset) + curr_sector >= conf->disks[i+1].start_sector) i++; *table ++ = conf->disks + i; } - if (conf->preshift) { - conf->hash_spacing >>= conf->preshift; - /* round hash_spacing up so that when we divide by it, + if (conf->sector_shift) { + conf->spacing >>= conf->sector_shift; + /* round spacing up so that when we divide by it, * we err on the side of "too-low", which is safest. */ - conf->hash_spacing++; + conf->spacing++; } BUG_ON(table - conf->hash_table > nb_zone); @@ -317,7 +307,6 @@ static int linear_make_request (struct request_queue *q, struct bio *bio) const int rw = bio_data_dir(bio); mddev_t *mddev = q->queuedata; dev_info_t *tmp_dev; - sector_t block; int cpu; if (unlikely(bio_barrier(bio))) { @@ -332,29 +321,33 @@ static int linear_make_request (struct request_queue *q, struct bio *bio) part_stat_unlock(); tmp_dev = which_dev(mddev, bio->bi_sector); - block = bio->bi_sector >> 1; - if (unlikely(block >= (tmp_dev->size + tmp_dev->offset) - || block < tmp_dev->offset)) { + if (unlikely(bio->bi_sector >= (tmp_dev->num_sectors + + tmp_dev->start_sector) + || (bio->bi_sector < + tmp_dev->start_sector))) { char b[BDEVNAME_SIZE]; - printk("linear_make_request: Block %llu out of bounds on " - "dev %s size %llu offset %llu\n", - (unsigned long long)block, + printk("linear_make_request: Sector %llu out of bounds on " + "dev %s: %llu sectors, offset %llu\n", + (unsigned long long)bio->bi_sector, bdevname(tmp_dev->rdev->bdev, b), - (unsigned long long)tmp_dev->size, - (unsigned long long)tmp_dev->offset); + (unsigned long long)tmp_dev->num_sectors, + (unsigned long long)tmp_dev->start_sector); bio_io_error(bio); return 0; } if (unlikely(bio->bi_sector + (bio->bi_size >> 9) > - (tmp_dev->offset + tmp_dev->size)<<1)) { + tmp_dev->start_sector + tmp_dev->num_sectors)) { /* This bio crosses a device boundary, so we have to * split it. */ struct bio_pair *bp; + bp = bio_split(bio, - ((tmp_dev->offset + tmp_dev->size)<<1) - bio->bi_sector); + tmp_dev->start_sector + tmp_dev->num_sectors + - bio->bi_sector); + if (linear_make_request(q, &bp->bio1)) generic_make_request(&bp->bio1); if (linear_make_request(q, &bp->bio2)) @@ -364,7 +357,8 @@ static int linear_make_request (struct request_queue *q, struct bio *bio) } bio->bi_bdev = tmp_dev->rdev->bdev; - bio->bi_sector = bio->bi_sector - (tmp_dev->offset << 1) + tmp_dev->rdev->data_offset; + bio->bi_sector = bio->bi_sector - tmp_dev->start_sector + + tmp_dev->rdev->data_offset; return 1; } @@ -372,29 +366,6 @@ static int linear_make_request (struct request_queue *q, struct bio *bio) static void linear_status (struct seq_file *seq, mddev_t *mddev) { -#undef MD_DEBUG -#ifdef MD_DEBUG - int j; - linear_conf_t *conf = mddev_to_conf(mddev); - sector_t s = 0; - - seq_printf(seq, " "); - for (j = 0; j < mddev->raid_disks; j++) - { - char b[BDEVNAME_SIZE]; - s += conf->smallest_size; - seq_printf(seq, "[%s", - bdevname(conf->hash_table[j][0].rdev->bdev,b)); - - while (s > conf->hash_table[j][0].offset + - conf->hash_table[j][0].size) - seq_printf(seq, "/%s] ", - bdevname(conf->hash_table[j][1].rdev->bdev,b)); - else - seq_printf(seq, "] "); - } - seq_printf(seq, "\n"); -#endif seq_printf(seq, " %dk rounding", mddev->chunk_size/1024); } diff --git a/drivers/md/md.c b/drivers/md/md.c index 0a3a4bdcd4af..aaa3d465de4e 100644 --- a/drivers/md/md.c +++ b/drivers/md/md.c @@ -32,31 +32,21 @@ Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ -#include <linux/module.h> -#include <linux/kernel.h> #include <linux/kthread.h> -#include <linux/linkage.h> #include <linux/raid/md.h> #include <linux/raid/bitmap.h> #include <linux/sysctl.h> #include <linux/buffer_head.h> /* for invalidate_bdev */ #include <linux/poll.h> -#include <linux/mutex.h> #include <linux/ctype.h> -#include <linux/freezer.h> - -#include <linux/init.h> - +#include <linux/hdreg.h> +#include <linux/proc_fs.h> +#include <linux/random.h> +#include <linux/reboot.h> #include <linux/file.h> - -#ifdef CONFIG_KMOD -#include <linux/kmod.h> -#endif - -#include <asm/unaligned.h> +#include <linux/delay.h> #define MAJOR_NR MD_MAJOR -#define MD_DRIVER /* 63 partitions with the alternate major number (mdp) */ #define MdpMinorShift 6 @@ -66,7 +56,7 @@ #ifndef MODULE -static void autostart_arrays (int part); +static void autostart_arrays(int part); #endif static LIST_HEAD(pers_list); @@ -212,7 +202,7 @@ static DEFINE_SPINLOCK(all_mddevs_lock); ) -static int md_fail_request (struct request_queue *q, struct bio *bio) +static int md_fail_request(struct request_queue *q, struct bio *bio) { bio_io_error(bio); return 0; @@ -2106,8 +2096,6 @@ rdev_size_store(mdk_rdev_t *rdev, const char *buf, size_t len) if (strict_strtoull(buf, 10, &size) < 0) return -EINVAL; - if (size < my_mddev->size) - return -EINVAL; if (my_mddev->pers && rdev->raid_disk >= 0) { if (my_mddev->persistent) { size = super_types[my_mddev->major_version]. @@ -2118,9 +2106,9 @@ rdev_size_store(mdk_rdev_t *rdev, const char *buf, size_t len) size = (rdev->bdev->bd_inode->i_size >> 10); size -= rdev->data_offset/2; } - if (size < my_mddev->size) - return -EINVAL; /* component must fit device */ } + if (size < my_mddev->size) + return -EINVAL; /* component must fit device */ rdev->size = size; if (size > oldsize && my_mddev->external) { @@ -2406,12 +2394,11 @@ safe_delay_store(mddev_t *mddev, const char *cbuf, size_t len) int i; unsigned long msec; char buf[30]; - char *e; + /* remove a period, and count digits after it */ if (len >= sizeof(buf)) return -EINVAL; - strlcpy(buf, cbuf, len); - buf[len] = 0; + strlcpy(buf, cbuf, sizeof(buf)); for (i=0; i<len; i++) { if (dot) { if (isdigit(buf[i])) { @@ -2424,8 +2411,7 @@ safe_delay_store(mddev_t *mddev, const char *cbuf, size_t len) buf[i] = 0; } } - msec = simple_strtoul(buf, &e, 10); - if (e == buf || (*e && *e != '\n')) + if (strict_strtoul(buf, 10, &msec) < 0) return -EINVAL; msec = (msec * 1000) / scale; if (msec == 0) @@ -2727,9 +2713,9 @@ array_state_store(mddev_t *mddev, const char *buf, size_t len) break; case read_auto: if (mddev->pers) { - if (mddev->ro != 1) + if (mddev->ro == 0) err = do_md_stop(mddev, 1, 0); - else + else if (mddev->ro == 1) err = restart_array(mddev); if (err == 0) { mddev->ro = 2; @@ -2945,7 +2931,13 @@ metadata_store(mddev_t *mddev, const char *buf, size_t len) { int major, minor; char *e; - if (!list_empty(&mddev->disks)) + /* Changing the details of 'external' metadata is + * always permitted. Otherwise there must be + * no devices attached to the array. + */ + if (mddev->external && strncmp(buf, "external:", 9) == 0) + ; + else if (!list_empty(&mddev->disks)) return -EBUSY; if (cmd_match(buf, "none")) { @@ -3527,17 +3519,12 @@ static int do_md_run(mddev_t * mddev) return -EINVAL; } /* - * chunk-size has to be a power of 2 and multiples of PAGE_SIZE + * chunk-size has to be a power of 2 */ if ( (1 << ffz(~chunk_size)) != chunk_size) { printk(KERN_ERR "chunk_size of %d not valid\n", chunk_size); return -EINVAL; } - if (chunk_size < PAGE_SIZE) { - printk(KERN_ERR "too small chunk_size: %d < %ld\n", - chunk_size, PAGE_SIZE); - return -EINVAL; - } /* devices must have minimum size of one chunk */ rdev_for_each(rdev, tmp, mddev) { @@ -3555,12 +3542,10 @@ static int do_md_run(mddev_t * mddev) } } -#ifdef CONFIG_KMOD if (mddev->level != LEVEL_NONE) request_module("md-level-%d", mddev->level); else if (mddev->clevel[0]) request_module("md-%s", mddev->clevel); -#endif /* * Drop all container device buffers, from now on @@ -3971,10 +3956,10 @@ static void autorun_array(mddev_t *mddev) } printk("\n"); - err = do_md_run (mddev); + err = do_md_run(mddev); if (err) { printk(KERN_WARNING "md: do_md_run() returned %d\n", err); - do_md_stop (mddev, 0, 0); + do_md_stop(mddev, 0, 0); } } @@ -4333,7 +4318,7 @@ static int add_new_disk(mddev_t * mddev, mdu_disk_info_t *info) if (!(info->state & (1<<MD_DISK_FAULTY))) { int err; - rdev = md_import_device (dev, -1, 0); + rdev = md_import_device(dev, -1, 0); if (IS_ERR(rdev)) { printk(KERN_WARNING "md: error, md_import_device() returned %ld\n", @@ -4415,7 +4400,7 @@ static int hot_add_disk(mddev_t * mddev, dev_t dev) return -EINVAL; } - rdev = md_import_device (dev, -1, 0); + rdev = md_import_device(dev, -1, 0); if (IS_ERR(rdev)) { printk(KERN_WARNING "md: error, md_import_device() returned %ld\n", @@ -4934,11 +4919,11 @@ static int md_ioctl(struct inode *inode, struct file *file, goto done_unlock; case STOP_ARRAY: - err = do_md_stop (mddev, 0, 1); + err = do_md_stop(mddev, 0, 1); goto done_unlock; case STOP_ARRAY_RO: - err = do_md_stop (mddev, 1, 1); + err = do_md_stop(mddev, 1, 1); goto done_unlock; } @@ -4987,7 +4972,7 @@ static int md_ioctl(struct inode *inode, struct file *file, goto done_unlock; case RUN_ARRAY: - err = do_md_run (mddev); + err = do_md_run(mddev); goto done_unlock; case SET_BITMAP_FILE: @@ -5425,11 +5410,11 @@ static int md_seq_show(struct seq_file *seq, void *v) seq_printf(seq, " super non-persistent"); if (mddev->pers) { - mddev->pers->status (seq, mddev); + mddev->pers->status(seq, mddev); seq_printf(seq, "\n "); if (mddev->pers->sync_request) { if (mddev->curr_resync > 2) { - status_resync (seq, mddev); + status_resync(seq, mddev); seq_printf(seq, "\n "); } else if (mddev->curr_resync == 1 || mddev->curr_resync == 2) seq_printf(seq, "\tresync=DELAYED\n "); @@ -6260,7 +6245,7 @@ static int md_notify_reboot(struct notifier_block *this, * appears to still be in use. Hence * the '100'. */ - do_md_stop (mddev, 1, 100); + do_md_stop(mddev, 1, 100); mddev_unlock(mddev); } /* @@ -6304,7 +6289,7 @@ static int __init md_init(void) raid_table_header = register_sysctl_table(raid_root_table); md_geninit(); - return (0); + return 0; } diff --git a/drivers/md/multipath.c b/drivers/md/multipath.c index 8bb8794129b3..8744014b9d80 100644 --- a/drivers/md/multipath.c +++ b/drivers/md/multipath.c @@ -19,16 +19,7 @@ * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ -#include <linux/module.h> -#include <linux/slab.h> -#include <linux/spinlock.h> #include <linux/raid/multipath.h> -#include <linux/buffer_head.h> -#include <asm/atomic.h> - -#define MAJOR_NR MD_MAJOR -#define MD_DRIVER -#define MD_PERSONALITY #define MAX_WORK_PER_DISK 128 diff --git a/drivers/md/raid0.c b/drivers/md/raid0.c index 53508a8a981d..8ac6488ad0dc 100644 --- a/drivers/md/raid0.c +++ b/drivers/md/raid0.c @@ -18,13 +18,8 @@ Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ -#include <linux/module.h> #include <linux/raid/raid0.h> -#define MAJOR_NR MD_MAJOR -#define MD_DRIVER -#define MD_PERSONALITY - static void raid0_unplug(struct request_queue *q) { mddev_t *mddev = q->queuedata; diff --git a/drivers/md/raid1.c b/drivers/md/raid1.c index b9764429d856..9c788e2489b1 100644 --- a/drivers/md/raid1.c +++ b/drivers/md/raid1.c @@ -32,6 +32,7 @@ */ #include "dm-bio-list.h" +#include <linux/delay.h> #include <linux/raid/raid1.h> #include <linux/raid/bitmap.h> diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c index 8bdc9bfc2887..da5129a24b18 100644 --- a/drivers/md/raid10.c +++ b/drivers/md/raid10.c @@ -19,6 +19,7 @@ */ #include "dm-bio-list.h" +#include <linux/delay.h> #include <linux/raid/raid10.h> #include <linux/raid/bitmap.h> @@ -2028,8 +2029,9 @@ static int run(mddev_t *mddev) int nc, fc, fo; sector_t stride, size; - if (mddev->chunk_size == 0) { - printk(KERN_ERR "md/raid10: non-zero chunk size required.\n"); + if (mddev->chunk_size < PAGE_SIZE) { + printk(KERN_ERR "md/raid10: chunk size must be " + "at least PAGE_SIZE(%ld).\n", PAGE_SIZE); return -EINVAL; } diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c index ae16794bef20..a36a7435edf5 100644 --- a/drivers/md/raid5.c +++ b/drivers/md/raid5.c @@ -43,12 +43,7 @@ * miss any bits. */ -#include <linux/module.h> -#include <linux/slab.h> -#include <linux/highmem.h> -#include <linux/bitops.h> #include <linux/kthread.h> -#include <asm/atomic.h> #include "raid6.h" #include <linux/raid/bitmap.h> @@ -275,7 +270,7 @@ static int grow_buffers(struct stripe_head *sh, int num) return 0; } -static void raid5_build_block (struct stripe_head *sh, int i); +static void raid5_build_block(struct stripe_head *sh, int i); static void init_stripe(struct stripe_head *sh, sector_t sector, int pd_idx, int disks) { @@ -1151,7 +1146,7 @@ static void raid5_end_read_request(struct bio * bi, int error) release_stripe(sh); } -static void raid5_end_write_request (struct bio *bi, int error) +static void raid5_end_write_request(struct bio *bi, int error) { struct stripe_head *sh = bi->bi_private; raid5_conf_t *conf = sh->raid_conf; @@ -1183,7 +1178,7 @@ static void raid5_end_write_request (struct bio *bi, int error) static sector_t compute_blocknr(struct stripe_head *sh, int i); -static void raid5_build_block (struct stripe_head *sh, int i) +static void raid5_build_block(struct stripe_head *sh, int i) { struct r5dev *dev = &sh->dev[i]; @@ -1221,10 +1216,10 @@ static void error(mddev_t *mddev, mdk_rdev_t *rdev) set_bit(MD_RECOVERY_INTR, &mddev->recovery); } set_bit(Faulty, &rdev->flags); - printk (KERN_ALERT - "raid5: Disk failure on %s, disabling device.\n" - "raid5: Operation continuing on %d devices.\n", - bdevname(rdev->bdev,b), conf->raid_disks - mddev->degraded); + printk(KERN_ALERT + "raid5: Disk failure on %s, disabling device.\n" + "raid5: Operation continuing on %d devices.\n", + bdevname(rdev->bdev,b), conf->raid_disks - mddev->degraded); } } @@ -1320,8 +1315,8 @@ static sector_t raid5_compute_sector(sector_t r_sector, unsigned int raid_disks, *dd_idx = (*pd_idx + 2 + *dd_idx) % raid_disks; break; default: - printk (KERN_CRIT "raid6: unsupported algorithm %d\n", - conf->algorithm); + printk(KERN_CRIT "raid6: unsupported algorithm %d\n", + conf->algorithm); } break; } @@ -1396,8 +1391,8 @@ static sector_t compute_blocknr(struct stripe_head *sh, int i) } break; default: - printk (KERN_CRIT "raid6: unsupported algorithm %d\n", - conf->algorithm); + printk(KERN_CRIT "raid6: unsupported algorithm %d\n", + conf->algorithm); } break; } @@ -1405,7 +1400,7 @@ static sector_t compute_blocknr(struct stripe_head *sh, int i) chunk_number = stripe * data_disks + i; r_sector = (sector_t)chunk_number * sectors_per_chunk + chunk_offset; - check = raid5_compute_sector (r_sector, raid_disks, data_disks, &dummy1, &dummy2, conf); + check = raid5_compute_sector(r_sector, raid_disks, data_disks, &dummy1, &dummy2, conf); if (check != sh->sector || dummy1 != dd_idx || dummy2 != sh->pd_idx) { printk(KERN_ERR "compute_blocknr: map not correct\n"); return 0; @@ -4012,6 +4007,13 @@ static int run(mddev_t *mddev) return -EIO; } + if (mddev->chunk_size < PAGE_SIZE) { + printk(KERN_ERR "md/raid5: chunk_size must be at least " + "PAGE_SIZE but %d < %ld\n", + mddev->chunk_size, PAGE_SIZE); + return -EINVAL; + } + if (mddev->reshape_position != MaxSector) { /* Check that we can continue the reshape. * Currently only disks can change, it must @@ -4289,7 +4291,7 @@ static int stop(mddev_t *mddev) } #ifdef DEBUG -static void print_sh (struct seq_file *seq, struct stripe_head *sh) +static void print_sh(struct seq_file *seq, struct stripe_head *sh) { int i; @@ -4305,7 +4307,7 @@ static void print_sh (struct seq_file *seq, struct stripe_head *sh) seq_printf(seq, "\n"); } -static void printall (struct seq_file *seq, raid5_conf_t *conf) +static void printall(struct seq_file *seq, raid5_conf_t *conf) { struct stripe_head *sh; struct hlist_node *hn; @@ -4323,7 +4325,7 @@ static void printall (struct seq_file *seq, raid5_conf_t *conf) } #endif -static void status (struct seq_file *seq, mddev_t *mddev) +static void status(struct seq_file *seq, mddev_t *mddev) { raid5_conf_t *conf = (raid5_conf_t *) mddev->private; int i; diff --git a/drivers/md/raid6.h b/drivers/md/raid6.h index 31cbee71365f..98dcde88470e 100644 --- a/drivers/md/raid6.h +++ b/drivers/md/raid6.h @@ -18,15 +18,6 @@ /* Set to 1 to use kernel-wide empty_zero_page */ #define RAID6_USE_EMPTY_ZERO_PAGE 0 -#include <linux/module.h> -#include <linux/stddef.h> -#include <linux/compiler.h> -#include <linux/types.h> -#include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/mempool.h> -#include <linux/list.h> -#include <linux/vmalloc.h> #include <linux/raid/md.h> #include <linux/raid/raid5.h> diff --git a/drivers/message/i2o/Makefile b/drivers/message/i2o/Makefile index 2c2e39aa1efa..b0982dacfd0a 100644 --- a/drivers/message/i2o/Makefile +++ b/drivers/message/i2o/Makefile @@ -5,7 +5,7 @@ # In the future, some of these should be built conditionally. # -i2o_core-y += iop.o driver.o device.o debug.o pci.o exec-osm.o +i2o_core-y += iop.o driver.o device.o debug.o pci.o exec-osm.o memory.o i2o_bus-y += bus-osm.o i2o_config-y += config-osm.o obj-$(CONFIG_I2O) += i2o_core.o diff --git a/drivers/message/i2o/device.c b/drivers/message/i2o/device.c index 8774c670e668..54c2e9ae23e5 100644 --- a/drivers/message/i2o/device.c +++ b/drivers/message/i2o/device.c @@ -467,7 +467,7 @@ int i2o_parm_issue(struct i2o_device *i2o_dev, int cmd, void *oplist, res.virt = NULL; - if (i2o_dma_alloc(dev, &res, reslen, GFP_KERNEL)) + if (i2o_dma_alloc(dev, &res, reslen)) return -ENOMEM; msg = i2o_msg_get_wait(c, I2O_TIMEOUT_MESSAGE_GET); diff --git a/drivers/message/i2o/exec-osm.c b/drivers/message/i2o/exec-osm.c index 6cbcc21de518..56faef1a1d55 100644 --- a/drivers/message/i2o/exec-osm.c +++ b/drivers/message/i2o/exec-osm.c @@ -388,8 +388,8 @@ static int i2o_exec_lct_notify(struct i2o_controller *c, u32 change_ind) dev = &c->pdev->dev; - if (i2o_dma_realloc - (dev, &c->dlct, le32_to_cpu(sb->expected_lct_size), GFP_KERNEL)) + if (i2o_dma_realloc(dev, &c->dlct, + le32_to_cpu(sb->expected_lct_size))) return -ENOMEM; msg = i2o_msg_get_wait(c, I2O_TIMEOUT_MESSAGE_GET); diff --git a/drivers/message/i2o/i2o_config.c b/drivers/message/i2o/i2o_config.c index 4238de98d4a6..a3fabdbe6ca6 100644 --- a/drivers/message/i2o/i2o_config.c +++ b/drivers/message/i2o/i2o_config.c @@ -260,7 +260,7 @@ static int i2o_cfg_swdl(unsigned long arg) if (IS_ERR(msg)) return PTR_ERR(msg); - if (i2o_dma_alloc(&c->pdev->dev, &buffer, fragsize, GFP_KERNEL)) { + if (i2o_dma_alloc(&c->pdev->dev, &buffer, fragsize)) { i2o_msg_nop(c, msg); return -ENOMEM; } @@ -339,7 +339,7 @@ static int i2o_cfg_swul(unsigned long arg) if (IS_ERR(msg)) return PTR_ERR(msg); - if (i2o_dma_alloc(&c->pdev->dev, &buffer, fragsize, GFP_KERNEL)) { + if (i2o_dma_alloc(&c->pdev->dev, &buffer, fragsize)) { i2o_msg_nop(c, msg); return -ENOMEM; } @@ -634,9 +634,7 @@ static int i2o_cfg_passthru32(struct file *file, unsigned cmnd, sg_size = sg[i].flag_count & 0xffffff; p = &(sg_list[sg_index]); /* Allocate memory for the transfer */ - if (i2o_dma_alloc - (&c->pdev->dev, p, sg_size, - PCI_DMA_BIDIRECTIONAL)) { + if (i2o_dma_alloc(&c->pdev->dev, p, sg_size)) { printk(KERN_DEBUG "%s: Could not allocate SG buffer - size = %d buffer number %d of %d\n", c->name, sg_size, i, sg_count); @@ -780,12 +778,11 @@ static int i2o_cfg_passthru(unsigned long arg) u32 size = 0; u32 reply_size = 0; u32 rcode = 0; - void *sg_list[SG_TABLESIZE]; + struct i2o_dma sg_list[SG_TABLESIZE]; u32 sg_offset = 0; u32 sg_count = 0; int sg_index = 0; u32 i = 0; - void *p = NULL; i2o_status_block *sb; struct i2o_message *msg; unsigned int iop; @@ -842,6 +839,7 @@ static int i2o_cfg_passthru(unsigned long arg) memset(sg_list, 0, sizeof(sg_list[0]) * SG_TABLESIZE); if (sg_offset) { struct sg_simple_element *sg; + struct i2o_dma *p; if (sg_offset * 4 >= size) { rcode = -EFAULT; @@ -871,22 +869,22 @@ static int i2o_cfg_passthru(unsigned long arg) goto sg_list_cleanup; } sg_size = sg[i].flag_count & 0xffffff; + p = &(sg_list[sg_index]); + if (i2o_dma_alloc(&c->pdev->dev, p, sg_size)) { /* Allocate memory for the transfer */ - p = kmalloc(sg_size, GFP_KERNEL); - if (!p) { printk(KERN_DEBUG "%s: Could not allocate SG buffer - size = %d buffer number %d of %d\n", c->name, sg_size, i, sg_count); rcode = -ENOMEM; goto sg_list_cleanup; } - sg_list[sg_index++] = p; // sglist indexed with input frame, not our internal frame. + sg_index++; /* Copy in the user's SG buffer if necessary */ if (sg[i]. flag_count & 0x04000000 /*I2O_SGL_FLAGS_DIR */ ) { // TODO 64bit fix if (copy_from_user - (p, (void __user *)sg[i].addr_bus, + (p->virt, (void __user *)sg[i].addr_bus, sg_size)) { printk(KERN_DEBUG "%s: Could not copy SG buf %d FROM user\n", @@ -895,8 +893,7 @@ static int i2o_cfg_passthru(unsigned long arg) goto sg_list_cleanup; } } - //TODO 64bit fix - sg[i].addr_bus = virt_to_bus(p); + sg[i].addr_bus = p->phys; } } @@ -908,7 +905,7 @@ static int i2o_cfg_passthru(unsigned long arg) } if (sg_offset) { - u32 rmsg[128]; + u32 rmsg[I2O_OUTBOUND_MSG_FRAME_SIZE]; /* Copy back the Scatter Gather buffers back to user space */ u32 j; // TODO 64bit fix @@ -942,11 +939,11 @@ static int i2o_cfg_passthru(unsigned long arg) sg_size = sg[j].flag_count & 0xffffff; // TODO 64bit fix if (copy_to_user - ((void __user *)sg[j].addr_bus, sg_list[j], + ((void __user *)sg[j].addr_bus, sg_list[j].virt, sg_size)) { printk(KERN_WARNING "%s: Could not copy %p TO user %x\n", - c->name, sg_list[j], + c->name, sg_list[j].virt, sg[j].addr_bus); rcode = -EFAULT; goto sg_list_cleanup; @@ -973,7 +970,7 @@ sg_list_cleanup: } for (i = 0; i < sg_index; i++) - kfree(sg_list[i]); + i2o_dma_free(&c->pdev->dev, &sg_list[i]); cleanup: kfree(reply); diff --git a/drivers/message/i2o/iop.c b/drivers/message/i2o/iop.c index da715e11c1b2..be2b5926d26c 100644 --- a/drivers/message/i2o/iop.c +++ b/drivers/message/i2o/iop.c @@ -1004,7 +1004,7 @@ static int i2o_hrt_get(struct i2o_controller *c) size = hrt->num_entries * hrt->entry_len << 2; if (size > c->hrt.len) { - if (i2o_dma_realloc(dev, &c->hrt, size, GFP_KERNEL)) + if (i2o_dma_realloc(dev, &c->hrt, size)) return -ENOMEM; else hrt = c->hrt.virt; diff --git a/drivers/message/i2o/memory.c b/drivers/message/i2o/memory.c new file mode 100644 index 000000000000..f5cc95c564e2 --- /dev/null +++ b/drivers/message/i2o/memory.c @@ -0,0 +1,313 @@ +/* + * Functions to handle I2O memory + * + * Pulled from the inlines in i2o headers and uninlined + * + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include <linux/module.h> +#include <linux/i2o.h> +#include <linux/delay.h> +#include <linux/string.h> +#include <linux/slab.h> +#include "core.h" + +/* Protects our 32/64bit mask switching */ +static DEFINE_MUTEX(mem_lock); + +/** + * i2o_sg_tablesize - Calculate the maximum number of elements in a SGL + * @c: I2O controller for which the calculation should be done + * @body_size: maximum body size used for message in 32-bit words. + * + * Return the maximum number of SG elements in a SG list. + */ +u16 i2o_sg_tablesize(struct i2o_controller *c, u16 body_size) +{ + i2o_status_block *sb = c->status_block.virt; + u16 sg_count = + (sb->inbound_frame_size - sizeof(struct i2o_message) / 4) - + body_size; + + if (c->pae_support) { + /* + * for 64-bit a SG attribute element must be added and each + * SG element needs 12 bytes instead of 8. + */ + sg_count -= 2; + sg_count /= 3; + } else + sg_count /= 2; + + if (c->short_req && (sg_count > 8)) + sg_count = 8; + + return sg_count; +} +EXPORT_SYMBOL_GPL(i2o_sg_tablesize); + + +/** + * i2o_dma_map_single - Map pointer to controller and fill in I2O message. + * @c: I2O controller + * @ptr: pointer to the data which should be mapped + * @size: size of data in bytes + * @direction: DMA_TO_DEVICE / DMA_FROM_DEVICE + * @sg_ptr: pointer to the SG list inside the I2O message + * + * This function does all necessary DMA handling and also writes the I2O + * SGL elements into the I2O message. For details on DMA handling see also + * dma_map_single(). The pointer sg_ptr will only be set to the end of the + * SG list if the allocation was successful. + * + * Returns DMA address which must be checked for failures using + * dma_mapping_error(). + */ +dma_addr_t i2o_dma_map_single(struct i2o_controller *c, void *ptr, + size_t size, + enum dma_data_direction direction, + u32 ** sg_ptr) +{ + u32 sg_flags; + u32 *mptr = *sg_ptr; + dma_addr_t dma_addr; + + switch (direction) { + case DMA_TO_DEVICE: + sg_flags = 0xd4000000; + break; + case DMA_FROM_DEVICE: + sg_flags = 0xd0000000; + break; + default: + return 0; + } + + dma_addr = dma_map_single(&c->pdev->dev, ptr, size, direction); + if (!dma_mapping_error(&c->pdev->dev, dma_addr)) { +#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64 + if ((sizeof(dma_addr_t) > 4) && c->pae_support) { + *mptr++ = cpu_to_le32(0x7C020002); + *mptr++ = cpu_to_le32(PAGE_SIZE); + } +#endif + + *mptr++ = cpu_to_le32(sg_flags | size); + *mptr++ = cpu_to_le32(i2o_dma_low(dma_addr)); +#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64 + if ((sizeof(dma_addr_t) > 4) && c->pae_support) + *mptr++ = cpu_to_le32(i2o_dma_high(dma_addr)); +#endif + *sg_ptr = mptr; + } + return dma_addr; +} +EXPORT_SYMBOL_GPL(i2o_dma_map_single); + +/** + * i2o_dma_map_sg - Map a SG List to controller and fill in I2O message. + * @c: I2O controller + * @sg: SG list to be mapped + * @sg_count: number of elements in the SG list + * @direction: DMA_TO_DEVICE / DMA_FROM_DEVICE + * @sg_ptr: pointer to the SG list inside the I2O message + * + * This function does all necessary DMA handling and also writes the I2O + * SGL elements into the I2O message. For details on DMA handling see also + * dma_map_sg(). The pointer sg_ptr will only be set to the end of the SG + * list if the allocation was successful. + * + * Returns 0 on failure or 1 on success. + */ +int i2o_dma_map_sg(struct i2o_controller *c, struct scatterlist *sg, + int sg_count, enum dma_data_direction direction, u32 ** sg_ptr) +{ + u32 sg_flags; + u32 *mptr = *sg_ptr; + + switch (direction) { + case DMA_TO_DEVICE: + sg_flags = 0x14000000; + break; + case DMA_FROM_DEVICE: + sg_flags = 0x10000000; + break; + default: + return 0; + } + + sg_count = dma_map_sg(&c->pdev->dev, sg, sg_count, direction); + if (!sg_count) + return 0; + +#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64 + if ((sizeof(dma_addr_t) > 4) && c->pae_support) { + *mptr++ = cpu_to_le32(0x7C020002); + *mptr++ = cpu_to_le32(PAGE_SIZE); + } +#endif + + while (sg_count-- > 0) { + if (!sg_count) + sg_flags |= 0xC0000000; + *mptr++ = cpu_to_le32(sg_flags | sg_dma_len(sg)); + *mptr++ = cpu_to_le32(i2o_dma_low(sg_dma_address(sg))); +#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64 + if ((sizeof(dma_addr_t) > 4) && c->pae_support) + *mptr++ = cpu_to_le32(i2o_dma_high(sg_dma_address(sg))); +#endif + sg = sg_next(sg); + } + *sg_ptr = mptr; + + return 1; +} +EXPORT_SYMBOL_GPL(i2o_dma_map_sg); + +/** + * i2o_dma_alloc - Allocate DMA memory + * @dev: struct device pointer to the PCI device of the I2O controller + * @addr: i2o_dma struct which should get the DMA buffer + * @len: length of the new DMA memory + * + * Allocate a coherent DMA memory and write the pointers into addr. + * + * Returns 0 on success or -ENOMEM on failure. + */ +int i2o_dma_alloc(struct device *dev, struct i2o_dma *addr, size_t len) +{ + struct pci_dev *pdev = to_pci_dev(dev); + int dma_64 = 0; + + mutex_lock(&mem_lock); + if ((sizeof(dma_addr_t) > 4) && (pdev->dma_mask == DMA_64BIT_MASK)) { + dma_64 = 1; + if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) { + mutex_unlock(&mem_lock); + return -ENOMEM; + } + } + + addr->virt = dma_alloc_coherent(dev, len, &addr->phys, GFP_KERNEL); + + if ((sizeof(dma_addr_t) > 4) && dma_64) + if (pci_set_dma_mask(pdev, DMA_64BIT_MASK)) + printk(KERN_WARNING "i2o: unable to set 64-bit DMA"); + mutex_unlock(&mem_lock); + + if (!addr->virt) + return -ENOMEM; + + memset(addr->virt, 0, len); + addr->len = len; + + return 0; +} +EXPORT_SYMBOL_GPL(i2o_dma_alloc); + + +/** + * i2o_dma_free - Free DMA memory + * @dev: struct device pointer to the PCI device of the I2O controller + * @addr: i2o_dma struct which contains the DMA buffer + * + * Free a coherent DMA memory and set virtual address of addr to NULL. + */ +void i2o_dma_free(struct device *dev, struct i2o_dma *addr) +{ + if (addr->virt) { + if (addr->phys) + dma_free_coherent(dev, addr->len, addr->virt, + addr->phys); + else + kfree(addr->virt); + addr->virt = NULL; + } +} +EXPORT_SYMBOL_GPL(i2o_dma_free); + + +/** + * i2o_dma_realloc - Realloc DMA memory + * @dev: struct device pointer to the PCI device of the I2O controller + * @addr: pointer to a i2o_dma struct DMA buffer + * @len: new length of memory + * + * If there was something allocated in the addr, free it first. If len > 0 + * than try to allocate it and write the addresses back to the addr + * structure. If len == 0 set the virtual address to NULL. + * + * Returns the 0 on success or negative error code on failure. + */ +int i2o_dma_realloc(struct device *dev, struct i2o_dma *addr, size_t len) +{ + i2o_dma_free(dev, addr); + + if (len) + return i2o_dma_alloc(dev, addr, len); + + return 0; +} +EXPORT_SYMBOL_GPL(i2o_dma_realloc); + +/* + * i2o_pool_alloc - Allocate an slab cache and mempool + * @mempool: pointer to struct i2o_pool to write data into. + * @name: name which is used to identify cache + * @size: size of each object + * @min_nr: minimum number of objects + * + * First allocates a slab cache with name and size. Then allocates a + * mempool which uses the slab cache for allocation and freeing. + * + * Returns 0 on success or negative error code on failure. + */ +int i2o_pool_alloc(struct i2o_pool *pool, const char *name, + size_t size, int min_nr) +{ + pool->name = kmalloc(strlen(name) + 1, GFP_KERNEL); + if (!pool->name) + goto exit; + strcpy(pool->name, name); + + pool->slab = + kmem_cache_create(pool->name, size, 0, SLAB_HWCACHE_ALIGN, NULL); + if (!pool->slab) + goto free_name; + + pool->mempool = mempool_create_slab_pool(min_nr, pool->slab); + if (!pool->mempool) + goto free_slab; + + return 0; + +free_slab: + kmem_cache_destroy(pool->slab); + +free_name: + kfree(pool->name); + +exit: + return -ENOMEM; +} +EXPORT_SYMBOL_GPL(i2o_pool_alloc); + +/* + * i2o_pool_free - Free slab cache and mempool again + * @mempool: pointer to struct i2o_pool which should be freed + * + * Note that you have to return all objects to the mempool again before + * calling i2o_pool_free(). + */ +void i2o_pool_free(struct i2o_pool *pool) +{ + mempool_destroy(pool->mempool); + kmem_cache_destroy(pool->slab); + kfree(pool->name); +}; +EXPORT_SYMBOL_GPL(i2o_pool_free); diff --git a/drivers/message/i2o/pci.c b/drivers/message/i2o/pci.c index 685a89547a51..610ef1204e68 100644 --- a/drivers/message/i2o/pci.c +++ b/drivers/message/i2o/pci.c @@ -186,31 +186,29 @@ static int __devinit i2o_pci_alloc(struct i2o_controller *c) } } - if (i2o_dma_alloc(dev, &c->status, 8, GFP_KERNEL)) { + if (i2o_dma_alloc(dev, &c->status, 8)) { i2o_pci_free(c); return -ENOMEM; } - if (i2o_dma_alloc(dev, &c->hrt, sizeof(i2o_hrt), GFP_KERNEL)) { + if (i2o_dma_alloc(dev, &c->hrt, sizeof(i2o_hrt))) { i2o_pci_free(c); return -ENOMEM; } - if (i2o_dma_alloc(dev, &c->dlct, 8192, GFP_KERNEL)) { + if (i2o_dma_alloc(dev, &c->dlct, 8192)) { i2o_pci_free(c); return -ENOMEM; } - if (i2o_dma_alloc(dev, &c->status_block, sizeof(i2o_status_block), - GFP_KERNEL)) { + if (i2o_dma_alloc(dev, &c->status_block, sizeof(i2o_status_block))) { i2o_pci_free(c); return -ENOMEM; } - if (i2o_dma_alloc - (dev, &c->out_queue, - I2O_MAX_OUTBOUND_MSG_FRAMES * I2O_OUTBOUND_MSG_FRAME_SIZE * - sizeof(u32), GFP_KERNEL)) { + if (i2o_dma_alloc(dev, &c->out_queue, + I2O_MAX_OUTBOUND_MSG_FRAMES * I2O_OUTBOUND_MSG_FRAME_SIZE * + sizeof(u32))) { i2o_pci_free(c); return -ENOMEM; } diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index a726f3b01a6b..efd3aa08b88b 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -15,7 +15,7 @@ if MISC_DEVICES config ATMEL_PWM tristate "Atmel AT32/AT91 PWM support" - depends on AVR32 || ARCH_AT91 + depends on AVR32 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_AT91CAP9 help This option enables device driver support for the PWM channels on certain Atmel prcoessors. Pulse Width Modulation is used for @@ -409,6 +409,7 @@ config EEEPC_LAPTOP depends on BACKLIGHT_CLASS_DEVICE depends on HWMON depends on EXPERIMENTAL + depends on RFKILL ---help--- This driver supports the Fn-Fx keys on Eee PC laptops. It also adds the ability to switch camera/wlan on/off. diff --git a/drivers/misc/hp-wmi.c b/drivers/misc/hp-wmi.c index 6d407c2a4f91..5dabfb69ee53 100644 --- a/drivers/misc/hp-wmi.c +++ b/drivers/misc/hp-wmi.c @@ -309,7 +309,7 @@ static int hp_wmi_setkeycode(struct input_dev *dev, int scancode, int keycode) return -EINVAL; } -void hp_wmi_notify(u32 value, void *context) +static void hp_wmi_notify(u32 value, void *context) { struct acpi_buffer response = { ACPI_ALLOCATE_BUFFER, NULL }; static struct key_entry *key; diff --git a/drivers/misc/sgi-gru/gru.h b/drivers/misc/sgi-gru/gru.h index 40df7cb3f0a5..f93f03a9e6e9 100644 --- a/drivers/misc/sgi-gru/gru.h +++ b/drivers/misc/sgi-gru/gru.h @@ -30,9 +30,9 @@ /* * Size used to map GRU GSeg */ -#if defined CONFIG_IA64 +#if defined(CONFIG_IA64) #define GRU_GSEG_PAGESIZE (256 * 1024UL) -#elif defined CONFIG_X86_64 +#elif defined(CONFIG_X86_64) #define GRU_GSEG_PAGESIZE (256 * 1024UL) /* ZZZ 2MB ??? */ #else #error "Unsupported architecture" diff --git a/drivers/misc/sgi-gru/gru_instructions.h b/drivers/misc/sgi-gru/gru_instructions.h index 0dc36225c7c6..48762e7b98be 100644 --- a/drivers/misc/sgi-gru/gru_instructions.h +++ b/drivers/misc/sgi-gru/gru_instructions.h @@ -26,7 +26,7 @@ * Architecture dependent functions */ -#if defined CONFIG_IA64 +#if defined(CONFIG_IA64) #include <linux/compiler.h> #include <asm/intrinsics.h> #define __flush_cache(p) ia64_fc(p) @@ -36,7 +36,7 @@ barrier(); \ *((volatile int *)(p)) = v; /* force st.rel */ \ } while (0) -#elif defined CONFIG_X86_64 +#elif defined(CONFIG_X86_64) #define __flush_cache(p) clflush(p) #define gru_ordered_store_int(p,v) \ do { \ @@ -299,6 +299,7 @@ static inline void gru_flush_cache(void *p) static inline void gru_start_instruction(struct gru_instruction *ins, int op32) { gru_ordered_store_int(ins, op32); + gru_flush_cache(ins); } @@ -604,8 +605,9 @@ static inline int gru_get_cb_substatus(void *cb) static inline int gru_check_status(void *cb) { struct gru_control_block_status *cbs = (void *)cb; - int ret = cbs->istatus; + int ret; + ret = cbs->istatus; if (ret == CBS_CALL_OS) ret = gru_check_status_proc(cb); return ret; @@ -617,7 +619,7 @@ static inline int gru_check_status(void *cb) static inline int gru_wait(void *cb) { struct gru_control_block_status *cbs = (void *)cb; - int ret = cbs->istatus;; + int ret = cbs->istatus; if (ret != CBS_IDLE) ret = gru_wait_proc(cb); diff --git a/drivers/misc/sgi-gru/grufault.c b/drivers/misc/sgi-gru/grufault.c index 3d33015bbf31..8c389d606c30 100644 --- a/drivers/misc/sgi-gru/grufault.c +++ b/drivers/misc/sgi-gru/grufault.c @@ -214,12 +214,14 @@ static int non_atomic_pte_lookup(struct vm_area_struct *vma, } /* - * * atomic_pte_lookup * * Convert a user virtual address to a physical address * Only supports Intel large pages (2MB only) on x86_64. * ZZZ - hugepage support is incomplete + * + * NOTE: mmap_sem is already held on entry to this function. This + * guarantees existence of the page tables. */ static int atomic_pte_lookup(struct vm_area_struct *vma, unsigned long vaddr, int write, unsigned long *paddr, int *pageshift) @@ -229,9 +231,6 @@ static int atomic_pte_lookup(struct vm_area_struct *vma, unsigned long vaddr, pud_t *pudp; pte_t pte; - WARN_ON(irqs_disabled()); /* ZZZ debug */ - - local_irq_disable(); pgdp = pgd_offset(vma->vm_mm, vaddr); if (unlikely(pgd_none(*pgdp))) goto err; @@ -250,8 +249,6 @@ static int atomic_pte_lookup(struct vm_area_struct *vma, unsigned long vaddr, #endif pte = *pte_offset_kernel(pmdp, vaddr); - local_irq_enable(); - if (unlikely(!pte_present(pte) || (write && (!pte_write(pte) || !pte_dirty(pte))))) return 1; @@ -324,6 +321,7 @@ static int gru_try_dropin(struct gru_thread_state *gts, * Atomic lookup is faster & usually works even if called in non-atomic * context. */ + rmb(); /* Must/check ms_range_active before loading PTEs */ ret = atomic_pte_lookup(vma, vaddr, write, &paddr, &pageshift); if (ret) { if (!cb) @@ -543,6 +541,7 @@ int gru_get_exception_detail(unsigned long arg) ucbnum = get_cb_number((void *)excdet.cb); cbrnum = thread_cbr_number(gts, ucbnum); cbe = get_cbe_by_index(gts->ts_gru, cbrnum); + prefetchw(cbe); /* Harmless on hardware, required for emulator */ excdet.opc = cbe->opccpy; excdet.exopc = cbe->exopccpy; excdet.ecause = cbe->ecause; diff --git a/drivers/misc/sgi-gru/grufile.c b/drivers/misc/sgi-gru/grufile.c index d61cee796efd..5c027b6b4e5a 100644 --- a/drivers/misc/sgi-gru/grufile.c +++ b/drivers/misc/sgi-gru/grufile.c @@ -113,7 +113,7 @@ static int gru_file_mmap(struct file *file, struct vm_area_struct *vma) return -EPERM; if (vma->vm_start & (GRU_GSEG_PAGESIZE - 1) || - vma->vm_end & (GRU_GSEG_PAGESIZE - 1)) + vma->vm_end & (GRU_GSEG_PAGESIZE - 1)) return -EINVAL; vma->vm_flags |= @@ -398,6 +398,12 @@ static int __init gru_init(void) irq = get_base_irq(); for (chip = 0; chip < GRU_CHIPLETS_PER_BLADE; chip++) { ret = request_irq(irq + chip, gru_intr, 0, id, NULL); + /* TODO: fix irq handling on x86. For now ignore failures because + * interrupts are not required & not yet fully supported */ + if (ret) { + printk("!!!WARNING: GRU ignoring request failure!!!\n"); + ret = 0; + } if (ret) { printk(KERN_ERR "%s: request_irq failed\n", GRU_DRIVER_ID_STR); diff --git a/drivers/misc/sgi-gru/gruhandles.h b/drivers/misc/sgi-gru/gruhandles.h index d16031d62673..b63018d60fe1 100644 --- a/drivers/misc/sgi-gru/gruhandles.h +++ b/drivers/misc/sgi-gru/gruhandles.h @@ -91,12 +91,7 @@ #define GSEGPOFF(h) ((h) & (GRU_SIZE - 1)) /* Convert an arbitrary handle address to the beginning of the GRU segment */ -#ifndef __PLUGIN__ #define GRUBASE(h) ((void *)((unsigned long)(h) & ~(GRU_SIZE - 1))) -#else -extern void *gmu_grubase(void *h); -#define GRUBASE(h) gmu_grubase(h) -#endif /* General addressing macros. */ static inline void *get_gseg_base_address(void *base, int ctxnum) diff --git a/drivers/misc/sgi-gru/grukservices.c b/drivers/misc/sgi-gru/grukservices.c index dfd49af0fe18..880c55dfb662 100644 --- a/drivers/misc/sgi-gru/grukservices.c +++ b/drivers/misc/sgi-gru/grukservices.c @@ -122,6 +122,7 @@ int gru_get_cb_exception_detail(void *cb, struct gru_control_block_extended *cbe; cbe = get_cbe(GRUBASE(cb), get_cb_number(cb)); + prefetchw(cbe); /* Harmless on hardware, required for emulator */ excdet->opc = cbe->opccpy; excdet->exopc = cbe->exopccpy; excdet->ecause = cbe->ecause; @@ -466,7 +467,7 @@ int gru_send_message_gpa(unsigned long mq, void *mesg, unsigned int bytes) STAT(mesq_send); BUG_ON(bytes < sizeof(int) || bytes > 2 * GRU_CACHE_LINE_BYTES); - clines = (bytes + GRU_CACHE_LINE_BYTES - 1) / GRU_CACHE_LINE_BYTES; + clines = DIV_ROUND_UP(bytes, GRU_CACHE_LINE_BYTES); if (gru_get_cpu_resources(bytes, &cb, &dsr)) return MQE_BUG_NO_RESOURCES; memcpy(dsr, mesg, bytes); diff --git a/drivers/misc/sgi-gru/grumain.c b/drivers/misc/sgi-gru/grumain.c index 0eeb8dddd2f5..e11e1ac50900 100644 --- a/drivers/misc/sgi-gru/grumain.c +++ b/drivers/misc/sgi-gru/grumain.c @@ -432,29 +432,35 @@ static inline long gru_copy_handle(void *d, void *s) return GRU_HANDLE_BYTES; } -/* rewrite in assembly & use lots of prefetch */ -static void gru_load_context_data(void *save, void *grubase, int ctxnum, - unsigned long cbrmap, unsigned long dsrmap) +static void gru_prefetch_context(void *gseg, void *cb, void *cbe, unsigned long cbrmap, + unsigned long length) { - void *gseg, *cb, *cbe; - unsigned long length; int i, scr; - gseg = grubase + ctxnum * GRU_GSEG_STRIDE; - length = hweight64(dsrmap) * GRU_DSR_AU_BYTES; prefetch_data(gseg + GRU_DS_BASE, length / GRU_CACHE_LINE_BYTES, GRU_CACHE_LINE_BYTES); - cb = gseg + GRU_CB_BASE; - cbe = grubase + GRU_CBE_BASE; for_each_cbr_in_allocation_map(i, &cbrmap, scr) { prefetch_data(cb, 1, GRU_CACHE_LINE_BYTES); prefetch_data(cbe + i * GRU_HANDLE_STRIDE, 1, GRU_CACHE_LINE_BYTES); cb += GRU_HANDLE_STRIDE; } +} + +static void gru_load_context_data(void *save, void *grubase, int ctxnum, + unsigned long cbrmap, unsigned long dsrmap) +{ + void *gseg, *cb, *cbe; + unsigned long length; + int i, scr; + gseg = grubase + ctxnum * GRU_GSEG_STRIDE; cb = gseg + GRU_CB_BASE; + cbe = grubase + GRU_CBE_BASE; + length = hweight64(dsrmap) * GRU_DSR_AU_BYTES; + gru_prefetch_context(gseg, cb, cbe, cbrmap, length); + for_each_cbr_in_allocation_map(i, &cbrmap, scr) { save += gru_copy_handle(cb, save); save += gru_copy_handle(cbe + i * GRU_HANDLE_STRIDE, save); @@ -472,15 +478,16 @@ static void gru_unload_context_data(void *save, void *grubase, int ctxnum, int i, scr; gseg = grubase + ctxnum * GRU_GSEG_STRIDE; - cb = gseg + GRU_CB_BASE; cbe = grubase + GRU_CBE_BASE; + length = hweight64(dsrmap) * GRU_DSR_AU_BYTES; + gru_prefetch_context(gseg, cb, cbe, cbrmap, length); + for_each_cbr_in_allocation_map(i, &cbrmap, scr) { save += gru_copy_handle(save, cb); save += gru_copy_handle(save, cbe + i * GRU_HANDLE_STRIDE); cb += GRU_HANDLE_STRIDE; } - length = hweight64(dsrmap) * GRU_DSR_AU_BYTES; memcpy(save, gseg + GRU_DS_BASE, length); } diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c index c16028872bbb..1b9fc3c6b875 100644 --- a/drivers/mmc/host/omap.c +++ b/drivers/mmc/host/omap.c @@ -172,7 +172,7 @@ struct mmc_omap_host { struct omap_mmc_platform_data *pdata; }; -void mmc_omap_fclk_offdelay(struct mmc_omap_slot *slot) +static void mmc_omap_fclk_offdelay(struct mmc_omap_slot *slot) { unsigned long tick_ns; @@ -182,7 +182,7 @@ void mmc_omap_fclk_offdelay(struct mmc_omap_slot *slot) } } -void mmc_omap_fclk_enable(struct mmc_omap_host *host, unsigned int enable) +static void mmc_omap_fclk_enable(struct mmc_omap_host *host, unsigned int enable) { unsigned long flags; @@ -1455,7 +1455,9 @@ static int __init mmc_omap_probe(struct platform_device *pdev) host->irq = irq; host->phys_base = host->mem_res->start; - host->virt_base = (void __iomem *) IO_ADDRESS(host->phys_base); + host->virt_base = ioremap(res->start, res->end - res->start + 1); + if (!host->virt_base) + goto err_ioremap; if (cpu_is_omap24xx()) { host->iclk = clk_get(&pdev->dev, "mmc_ick"); @@ -1510,6 +1512,8 @@ err_free_iclk: clk_put(host->iclk); } err_free_mmc_host: + iounmap(host->virt_base); +err_ioremap: kfree(host); err_free_mem_region: release_mem_region(res->start, res->end - res->start + 1); @@ -1536,6 +1540,7 @@ static int mmc_omap_remove(struct platform_device *pdev) if (host->fclk && !IS_ERR(host->fclk)) clk_put(host->fclk); + iounmap(host->virt_base); release_mem_region(pdev->resource[0].start, pdev->resource[0].end - pdev->resource[0].start + 1); diff --git a/drivers/mtd/nand/ams-delta.c b/drivers/mtd/nand/ams-delta.c index 26d42987971f..782994ead0e8 100644 --- a/drivers/mtd/nand/ams-delta.c +++ b/drivers/mtd/nand/ams-delta.c @@ -145,7 +145,7 @@ static void ams_delta_hwcontrol(struct mtd_info *mtd, int cmd, static int ams_delta_nand_ready(struct mtd_info *mtd) { - return omap_get_gpio_datain(AMS_DELTA_GPIO_PIN_NAND_RB); + return gpio_get_value(AMS_DELTA_GPIO_PIN_NAND_RB); } /* @@ -185,7 +185,7 @@ static int __init ams_delta_init(void) this->read_buf = ams_delta_read_buf; this->verify_buf = ams_delta_verify_buf; this->cmd_ctrl = ams_delta_hwcontrol; - if (!omap_request_gpio(AMS_DELTA_GPIO_PIN_NAND_RB)) { + if (gpio_request(AMS_DELTA_GPIO_PIN_NAND_RB, "nand_rdy") == 0) { this->dev_ready = ams_delta_nand_ready; } else { this->dev_ready = NULL; diff --git a/drivers/net/3c509.c b/drivers/net/3c509.c index b9d097c9f6bb..3a7bc524af33 100644 --- a/drivers/net/3c509.c +++ b/drivers/net/3c509.c @@ -40,7 +40,7 @@ v1.14 10/15/97 Avoided waiting..discard message for fast machines -djb v1.15 1/31/98 Faster recovery for Tx errors. -djb v1.16 2/3/98 Different ID port handling to avoid sound cards. -djb - v1.18 12Mar2001 Andrew Morton <andrewm@uow.edu.au> + v1.18 12Mar2001 Andrew Morton - Avoid bogus detect of 3c590's (Andrzej Krzysztofowicz) - Reviewed against 1.18 from scyld.com v1.18a 17Nov2001 Jeff Garzik <jgarzik@pobox.com> diff --git a/drivers/net/cs89x0.c b/drivers/net/cs89x0.c index a28de8182802..7107620f615d 100644 --- a/drivers/net/cs89x0.c +++ b/drivers/net/cs89x0.c @@ -36,8 +36,7 @@ Alan Cox : Removed 1.2 support, added 2.1 extra counters. - Andrew Morton : andrewm@uow.edu.au - : Kernel 2.3.48 + Andrew Morton : Kernel 2.3.48 : Handle kmalloc() failures : Other resource allocation fixes : Add SMP locks @@ -49,7 +48,7 @@ : Fixed an out-of-mem bug in dma_rx() : Updated Documentation/networking/cs89x0.txt - Andrew Morton : andrewm@uow.edu.au / Kernel 2.3.99-pre1 + Andrew Morton : Kernel 2.3.99-pre1 : Use skb_reserve to longword align IP header (two places) : Remove a delay loop from dma_rx() : Replace '100' with HZ @@ -57,11 +56,11 @@ : Added 'cs89x0_dma=N' kernel boot option : Correctly initialise lp->lock in non-module compile - Andrew Morton : andrewm@uow.edu.au / Kernel 2.3.99-pre4-1 + Andrew Morton : Kernel 2.3.99-pre4-1 : MOD_INC/DEC race fix (see : http://www.uwsg.indiana.edu/hypermail/linux/kernel/0003.3/1532.html) - Andrew Morton : andrewm@uow.edu.au / Kernel 2.4.0-test7-pre2 + Andrew Morton : Kernel 2.4.0-test7-pre2 : Enhanced EEPROM support to cover more devices, : abstracted IRQ mapping to support CONFIG_ARCH_CLPS7500 arch : (Jason Gunthorpe <jgg@ualberta.ca>) @@ -156,7 +155,7 @@ #include "cs89x0.h" static char version[] __initdata = -"cs89x0.c: v2.4.3-pre1 Russell Nelson <nelson@crynwr.com>, Andrew Morton <andrewm@uow.edu.au>\n"; +"cs89x0.c: v2.4.3-pre1 Russell Nelson <nelson@crynwr.com>, Andrew Morton\n"; #define DRV_NAME "cs89x0" @@ -1877,7 +1876,7 @@ MODULE_PARM_DESC(dmasize , "(ignored)"); MODULE_PARM_DESC(use_dma , "(ignored)"); #endif -MODULE_AUTHOR("Mike Cruse, Russwll Nelson <nelson@crynwr.com>, Andrew Morton <andrewm@uow.edu.au>"); +MODULE_AUTHOR("Mike Cruse, Russwll Nelson <nelson@crynwr.com>, Andrew Morton"); MODULE_LICENSE("GPL"); diff --git a/drivers/net/wireless/ath9k/main.c b/drivers/net/wireless/ath9k/main.c index 74726990d59e..f05f584ab7bc 100644 --- a/drivers/net/wireless/ath9k/main.c +++ b/drivers/net/wireless/ath9k/main.c @@ -1640,6 +1640,11 @@ static int ath9k_ampdu_action(struct ieee80211_hw *hw, return ret; } +static int ath9k_no_fragmentation(struct ieee80211_hw *hw, u32 value) +{ + return -EOPNOTSUPP; +} + static struct ieee80211_ops ath9k_ops = { .tx = ath9k_tx, .start = ath9k_start, @@ -1664,7 +1669,8 @@ static struct ieee80211_ops ath9k_ops = { .get_tsf = ath9k_get_tsf, .reset_tsf = ath9k_reset_tsf, .tx_last_beacon = NULL, - .ampdu_action = ath9k_ampdu_action + .ampdu_action = ath9k_ampdu_action, + .set_frag_threshold = ath9k_no_fragmentation, }; static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c index f6003e7996af..5155b8a760a7 100644 --- a/drivers/net/wireless/iwlwifi/iwl-5000.c +++ b/drivers/net/wireless/iwlwifi/iwl-5000.c @@ -833,12 +833,12 @@ static int iwl5000_hw_set_hw_params(struct iwl_priv *priv) switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) { case CSR_HW_REV_TYPE_5100: case CSR_HW_REV_TYPE_5300: - /* 5X00 wants in Celsius */ + case CSR_HW_REV_TYPE_5350: + /* 5X00 and 5350 wants in Celsius */ priv->hw_params.ct_kill_threshold = CT_KILL_THRESHOLD; break; case CSR_HW_REV_TYPE_5150: - case CSR_HW_REV_TYPE_5350: - /* 5X50 wants in Kelvin */ + /* 5150 wants in Kelvin */ priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD); break; diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c index 93944de923ca..e2a58e477036 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c @@ -2422,7 +2422,7 @@ static void rs_free_sta(void *priv_r, struct ieee80211_sta *sta, void *priv_sta) { struct iwl_lq_sta *lq_sta = priv_sta; - struct iwl_priv *priv = priv_r; + struct iwl_priv *priv __maybe_unused = priv_r; IWL_DEBUG_RATE("enter\n"); kfree(lq_sta); diff --git a/drivers/net/wireless/libertas/cmd.c b/drivers/net/wireless/libertas/cmd.c index a912fb68c099..297696de2da0 100644 --- a/drivers/net/wireless/libertas/cmd.c +++ b/drivers/net/wireless/libertas/cmd.c @@ -823,7 +823,9 @@ int lbs_update_channel(struct lbs_private *priv) int lbs_set_channel(struct lbs_private *priv, u8 channel) { struct cmd_ds_802_11_rf_channel cmd; +#ifdef DEBUG u8 old_channel = priv->curbssparams.channel; +#endif int ret = 0; lbs_deb_enter(LBS_DEB_CMD); diff --git a/drivers/net/wireless/orinoco_cs.c b/drivers/net/wireless/orinoco_cs.c index e585684e59a0..6fcf2bda7cdf 100644 --- a/drivers/net/wireless/orinoco_cs.c +++ b/drivers/net/wireless/orinoco_cs.c @@ -378,6 +378,7 @@ static int orinoco_cs_resume(struct pcmcia_device *link) struct orinoco_private *priv = netdev_priv(dev); struct orinoco_pccard *card = priv->card; int err = 0; + unsigned long flags; if (! test_bit(0, &card->hard_reset_in_progress)) { err = orinoco_reinit_firmware(dev); @@ -387,7 +388,7 @@ static int orinoco_cs_resume(struct pcmcia_device *link) return -EIO; } - spin_lock(&priv->lock); + spin_lock_irqsave(&priv->lock, flags); netif_device_attach(dev); priv->hw_unavailable--; @@ -399,7 +400,7 @@ static int orinoco_cs_resume(struct pcmcia_device *link) dev->name, err); } - spin_unlock(&priv->lock); + spin_unlock_irqrestore(&priv->lock, flags); } return err; diff --git a/drivers/net/wireless/p54/p54common.c b/drivers/net/wireless/p54/p54common.c index 1994aa199d37..117c7d3a52b0 100644 --- a/drivers/net/wireless/p54/p54common.c +++ b/drivers/net/wireless/p54/p54common.c @@ -479,7 +479,6 @@ static int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len) printk(KERN_ERR "p54: eeprom parse failed!\n"); return err; } -EXPORT_SYMBOL_GPL(p54_parse_eeprom); static int p54_rssi_to_dbm(struct ieee80211_hw *dev, int rssi) { diff --git a/drivers/net/wireless/p54/p54usb.c b/drivers/net/wireless/p54/p54usb.c index 1912f5e9a0a9..75d749bccb0d 100644 --- a/drivers/net/wireless/p54/p54usb.c +++ b/drivers/net/wireless/p54/p54usb.c @@ -39,6 +39,7 @@ static struct usb_device_id p54u_table[] __devinitdata = { {USB_DEVICE(0x0846, 0x4200)}, /* Netgear WG121 */ {USB_DEVICE(0x0846, 0x4210)}, /* Netgear WG121 the second ? */ {USB_DEVICE(0x0846, 0x4220)}, /* Netgear WG111 */ + {USB_DEVICE(0x09aa, 0x1000)}, /* Spinnaker Proto board */ {USB_DEVICE(0x0cde, 0x0006)}, /* Medion 40900, Roper Europe */ {USB_DEVICE(0x124a, 0x4023)}, /* Shuttle PN15, Airvast WM168g, IOGear GWU513 */ {USB_DEVICE(0x1915, 0x2234)}, /* Linksys WUSB54G OEM */ @@ -63,8 +64,8 @@ static struct usb_device_id p54u_table[] __devinitdata = { {USB_DEVICE(0x0cde, 0x0006)}, /* Medion MD40900 */ {USB_DEVICE(0x0cde, 0x0008)}, /* Sagem XG703A */ {USB_DEVICE(0x0d8e, 0x3762)}, /* DLink DWL-G120 Cohiba */ - {USB_DEVICE(0x09aa, 0x1000)}, /* Spinnaker Proto board */ {USB_DEVICE(0x124a, 0x4025)}, /* IOGear GWU513 (GW3887IK chip) */ + {USB_DEVICE(0x1260, 0xee22)}, /* SMC 2862W-G version 2 */ {USB_DEVICE(0x13b1, 0x000a)}, /* Linksys WUSB54G ver 2 */ {USB_DEVICE(0x13B1, 0x000C)}, /* Linksys WUSB54AG */ {USB_DEVICE(0x1435, 0x0427)}, /* Inventel UR054G */ diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.c b/drivers/net/wireless/rt2x00/rt2x00queue.c index 1676ac484790..451d410ecdae 100644 --- a/drivers/net/wireless/rt2x00/rt2x00queue.c +++ b/drivers/net/wireless/rt2x00/rt2x00queue.c @@ -374,7 +374,7 @@ int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb) struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX); struct txentry_desc txdesc; struct skb_frame_desc *skbdesc; - unsigned int iv_len; + unsigned int iv_len = 0; if (unlikely(rt2x00queue_full(queue))) return -EINVAL; @@ -395,6 +395,9 @@ int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb) entry->skb = skb; rt2x00queue_create_tx_descriptor(entry, &txdesc); + if (IEEE80211_SKB_CB(skb)->control.hw_key != NULL) + iv_len = IEEE80211_SKB_CB(skb)->control.hw_key->iv_len; + /* * All information is retreived from the skb->cb array, * now we should claim ownership of the driver part of that @@ -410,9 +413,7 @@ int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb) * the frame so we can provide it to the driver seperately. */ if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) && - !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags) && - (IEEE80211_SKB_CB(skb)->control.hw_key != NULL)) { - iv_len = IEEE80211_SKB_CB(skb)->control.hw_key->iv_len; + !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) { rt2x00crypto_tx_remove_iv(skb, iv_len); } diff --git a/drivers/net/wireless/rtl8187_dev.c b/drivers/net/wireless/rtl8187_dev.c index e9902613e2ee..431e3c78bf27 100644 --- a/drivers/net/wireless/rtl8187_dev.c +++ b/drivers/net/wireless/rtl8187_dev.c @@ -33,10 +33,13 @@ MODULE_LICENSE("GPL"); static struct usb_device_id rtl8187_table[] __devinitdata = { /* Asus */ {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187}, + /* Belkin */ + {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B}, /* Realtek */ {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187}, {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B}, {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B}, + {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B}, /* Netgear */ {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187}, {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187}, diff --git a/drivers/net/wireless/spectrum_cs.c b/drivers/net/wireless/spectrum_cs.c index b0c71c3be467..852789ad34b3 100644 --- a/drivers/net/wireless/spectrum_cs.c +++ b/drivers/net/wireless/spectrum_cs.c @@ -426,10 +426,11 @@ spectrum_cs_suspend(struct pcmcia_device *link) { struct net_device *dev = link->priv; struct orinoco_private *priv = netdev_priv(dev); + unsigned long flags; int err = 0; /* Mark the device as stopped, to block IO until later */ - spin_lock(&priv->lock); + spin_lock_irqsave(&priv->lock, flags); err = __orinoco_down(dev); if (err) @@ -439,7 +440,7 @@ spectrum_cs_suspend(struct pcmcia_device *link) netif_device_detach(dev); priv->hw_unavailable++; - spin_unlock(&priv->lock); + spin_unlock_irqrestore(&priv->lock, flags); return err; } diff --git a/drivers/net/xen-netfront.c b/drivers/net/xen-netfront.c index 3c3dd403f5dd..5c7a87e38951 100644 --- a/drivers/net/xen-netfront.c +++ b/drivers/net/xen-netfront.c @@ -471,7 +471,7 @@ static int xennet_start_xmit(struct sk_buff *skb, struct net_device *dev) unsigned int offset = offset_in_page(data); unsigned int len = skb_headlen(skb); - frags += (offset + len + PAGE_SIZE - 1) / PAGE_SIZE; + frags += DIV_ROUND_UP(offset + len, PAGE_SIZE); if (unlikely(frags > MAX_SKB_FRAGS + 1)) { printk(KERN_ALERT "xennet: skb rides the rocket: %d frags\n", frags); diff --git a/drivers/nubus/nubus.c b/drivers/nubus/nubus.c index 2f047e573d86..f5f75844954c 100644 --- a/drivers/nubus/nubus.c +++ b/drivers/nubus/nubus.c @@ -126,7 +126,7 @@ static void nubus_advance(unsigned char **ptr, int len, int map) { while(not_useful(p,map)) p++; - p++; + p++; len--; } *ptr = p; diff --git a/drivers/parport/ChangeLog b/drivers/parport/ChangeLog index db717c1d62a5..8565bbbeb6ec 100644 --- a/drivers/parport/ChangeLog +++ b/drivers/parport/ChangeLog @@ -311,7 +311,7 @@ * ieee1284_ops.c (parport_ieee1284_read_nibble): Reset nAutoFd on timeout. Matches 2.2.x behaviour. -2001-03-02 Andrew Morton <andrewm@uow.edu.au> +2001-03-02 Andrew Morton * parport_pc.c (registered_parport): New static variable. (parport_pc_find_ports): Set it when we register PCI driver. diff --git a/drivers/parport/ieee1284.c b/drivers/parport/ieee1284.c index e97059415ab4..ac2a805ac7ea 100644 --- a/drivers/parport/ieee1284.c +++ b/drivers/parport/ieee1284.c @@ -1,4 +1,4 @@ -/* $Id: parport_ieee1284.c,v 1.4 1997/10/19 21:37:21 philip Exp $ +/* * IEEE-1284 implementation for parport. * * Authors: Phil Blundell <philb@gnu.org> diff --git a/drivers/parport/probe.c b/drivers/parport/probe.c index cd565bb4e1a9..0f6550719bcf 100644 --- a/drivers/parport/probe.c +++ b/drivers/parport/probe.c @@ -1,4 +1,4 @@ -/* $Id: parport_probe.c,v 1.1 1999/07/03 08:56:17 davem Exp $ +/* * Parallel port device probing code * * Authors: Carsten Gross, carsten@sol.wohnheim.uni-ulm.de diff --git a/drivers/parport/share.c b/drivers/parport/share.c index a8a62bbbb576..0ebca450ed29 100644 --- a/drivers/parport/share.c +++ b/drivers/parport/share.c @@ -1,4 +1,4 @@ -/* $Id: parport_share.c,v 1.15 1998/01/11 12:06:17 philip Exp $ +/* * Parallel-port resource manager code. * * Authors: David Campbell <campbell@tirian.che.curtin.edu.au> diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile index 74d1c906c5d6..b46c60b72708 100644 --- a/drivers/pcmcia/Makefile +++ b/drivers/pcmcia/Makefile @@ -64,10 +64,11 @@ sa1100_cs-$(CONFIG_SA1100_SHANNON) += sa1100_shannon.o sa1100_cs-$(CONFIG_SA1100_SIMPAD) += sa1100_simpad.o pxa2xx_lubbock_cs-y += pxa2xx_lubbock.o sa1111_generic.o +pxa2xx_cm_x2xx_cs-y += pxa2xx_cm_x2xx.o pxa2xx_cm_x255.o pxa2xx_cm_x270.o pxa2xx-obj-$(CONFIG_ARCH_LUBBOCK) += pxa2xx_lubbock_cs.o pxa2xx-obj-$(CONFIG_MACH_MAINSTONE) += pxa2xx_mainstone.o pxa2xx-obj-$(CONFIG_PXA_SHARPSL) += pxa2xx_sharpsl.o -pxa2xx-obj-$(CONFIG_MACH_ARMCORE) += pxa2xx_cm_x2xx.o pxa2xx_cm_x255.o pxa2xx_cm_x270.o +pxa2xx-obj-$(CONFIG_MACH_ARMCORE) += pxa2xx_cm_x2xx_cs.o pxa2xx-obj-$(CONFIG_ARCH_VIPER) += pxa2xx_viper.o pxa2xx-obj-$(CONFIG_TRIZEPS_PCMCIA) += pxa2xx_trizeps.o pxa2xx-obj-$(CONFIG_MACH_PALMTX) += pxa2xx_palmtx.o diff --git a/drivers/pnp/base.h b/drivers/pnp/base.h index 9fd7bb9b7dce..7cc7bf5304aa 100644 --- a/drivers/pnp/base.h +++ b/drivers/pnp/base.h @@ -147,7 +147,7 @@ char *pnp_resource_type_name(struct resource *res); void dbg_pnp_show_resources(struct pnp_dev *dev, char *desc); void pnp_free_resources(struct pnp_dev *dev); -int pnp_resource_type(struct resource *res); +unsigned long pnp_resource_type(struct resource *res); struct pnp_resource { struct list_head list; diff --git a/drivers/pnp/core.c b/drivers/pnp/core.c index a411582bcd72..cc0aeaed6179 100644 --- a/drivers/pnp/core.c +++ b/drivers/pnp/core.c @@ -218,7 +218,6 @@ void __pnp_remove_device(struct pnp_dev *dev) static int __init pnp_init(void) { - printk(KERN_INFO "Linux Plug and Play Support v0.97 (c) Adam Belay\n"); return bus_register(&pnp_bus_type); } diff --git a/drivers/pnp/quirks.c b/drivers/pnp/quirks.c index 0bdf9b8a5e58..d15e2b77af88 100644 --- a/drivers/pnp/quirks.c +++ b/drivers/pnp/quirks.c @@ -245,7 +245,7 @@ static void quirk_system_pci_resources(struct pnp_dev *dev) */ for_each_pci_dev(pdev) { for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { - unsigned int type; + unsigned long type; type = pci_resource_flags(pdev, i) & (IORESOURCE_IO | IORESOURCE_MEM); diff --git a/drivers/pnp/resource.c b/drivers/pnp/resource.c index 4cfe3a1efdfb..dbae23acdd5b 100644 --- a/drivers/pnp/resource.c +++ b/drivers/pnp/resource.c @@ -467,14 +467,14 @@ int pnp_check_dma(struct pnp_dev *dev, struct resource *res) #endif } -int pnp_resource_type(struct resource *res) +unsigned long pnp_resource_type(struct resource *res) { return res->flags & (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_IRQ | IORESOURCE_DMA); } struct resource *pnp_get_resource(struct pnp_dev *dev, - unsigned int type, unsigned int num) + unsigned long type, unsigned int num) { struct pnp_resource *pnp_res; struct resource *res; diff --git a/drivers/power/olpc_battery.c b/drivers/power/olpc_battery.c index 32570af3c5c9..5fbca2681baa 100644 --- a/drivers/power/olpc_battery.c +++ b/drivers/power/olpc_battery.c @@ -205,9 +205,9 @@ static int olpc_bat_get_property(struct power_supply *psy, union power_supply_propval *val) { int ret = 0; - int16_t ec_word; + __be16 ec_word; uint8_t ec_byte; - uint64_t ser_buf; + __be64 ser_buf; ret = olpc_ec_cmd(EC_BAT_STATUS, NULL, 0, &ec_byte, 1); if (ret) @@ -257,16 +257,14 @@ static int olpc_bat_get_property(struct power_supply *psy, if (ret) return ret; - ec_word = be16_to_cpu(ec_word); - val->intval = ec_word * 9760L / 32; + val->intval = (int)be16_to_cpu(ec_word) * 9760L / 32; break; case POWER_SUPPLY_PROP_CURRENT_AVG: ret = olpc_ec_cmd(EC_BAT_CURRENT, NULL, 0, (void *)&ec_word, 2); if (ret) return ret; - ec_word = be16_to_cpu(ec_word); - val->intval = ec_word * 15625L / 120; + val->intval = (int)be16_to_cpu(ec_word) * 15625L / 120; break; case POWER_SUPPLY_PROP_CAPACITY: ret = olpc_ec_cmd(EC_BAT_SOC, NULL, 0, &ec_byte, 1); @@ -278,24 +276,22 @@ static int olpc_bat_get_property(struct power_supply *psy, ret = olpc_ec_cmd(EC_BAT_TEMP, NULL, 0, (void *)&ec_word, 2); if (ret) return ret; - ec_word = be16_to_cpu(ec_word); - val->intval = ec_word * 100 / 256; + + val->intval = (int)be16_to_cpu(ec_word) * 100 / 256; break; case POWER_SUPPLY_PROP_TEMP_AMBIENT: ret = olpc_ec_cmd(EC_AMB_TEMP, NULL, 0, (void *)&ec_word, 2); if (ret) return ret; - ec_word = be16_to_cpu(ec_word); - val->intval = ec_word * 100 / 256; + val->intval = (int)be16_to_cpu(ec_word) * 100 / 256; break; case POWER_SUPPLY_PROP_CHARGE_COUNTER: ret = olpc_ec_cmd(EC_BAT_ACR, NULL, 0, (void *)&ec_word, 2); if (ret) return ret; - ec_word = be16_to_cpu(ec_word); - val->intval = ec_word * 6250 / 15; + val->intval = (int)be16_to_cpu(ec_word) * 6250 / 15; break; case POWER_SUPPLY_PROP_SERIAL_NUMBER: ret = olpc_ec_cmd(EC_BAT_SERIAL, NULL, 0, (void *)&ser_buf, 8); diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index f3d7fd3406a6..f660ef3e5b29 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -220,22 +220,22 @@ config RTC_DRV_PCF8583 will be called rtc-pcf8583. config RTC_DRV_M41T80 - tristate "ST M41T80/81/82/83/84/85/87" + tristate "ST M41T65/M41T80/81/82/83/84/85/87" help - If you say Y here you will get support for the - ST M41T80 RTC chips series. Currently following chips are - supported: M41T80, M41T81, M41T82, M41T83, M41ST84, M41ST85 - and M41ST87. + If you say Y here you will get support for the ST M41T60 + and M41T80 RTC chips series. Currently, the following chips are + supported: M41T65, M41T80, M41T81, M41T82, M41T83, M41ST84, + M41ST85, and M41ST87. This driver can also be built as a module. If so, the module will be called rtc-m41t80. config RTC_DRV_M41T80_WDT - bool "ST M41T80 series RTC watchdog timer" + bool "ST M41T65/M41T80 series RTC watchdog timer" depends on RTC_DRV_M41T80 help If you say Y here you will get support for the - watchdog timer in ST M41T80 RTC chips series. + watchdog timer in the ST M41T60 and M41T80 RTC chips series. config RTC_DRV_TWL92330 boolean "TI TWL92330/Menelaus" @@ -319,6 +319,15 @@ config RTC_DRV_RS5C348 This driver can also be built as a module. If so, the module will be called rtc-rs5c348. +config RTC_DRV_DS3234 + tristate "Maxim/Dallas DS3234" + help + If you say yes here you get support for the + Maxim/Dallas DS3234 SPI RTC chip. + + This driver can also be built as a module. If so, the module + will be called rtc-ds3234. + endif # SPI_MASTER comment "Platform RTC drivers" @@ -603,7 +612,7 @@ config RTC_DRV_RS5C313 config RTC_DRV_PPC tristate "PowerPC machine dependent RTC support" - depends on PPC_MERGE + depends on PPC help The PowerPC kernel has machine-specific functions for accessing the RTC. This exposes that functionality through the generic RTC diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 37a71b727262..d05928b3ca94 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -32,6 +32,7 @@ obj-$(CONFIG_RTC_DRV_DS1511) += rtc-ds1511.o obj-$(CONFIG_RTC_DRV_DS1553) += rtc-ds1553.o obj-$(CONFIG_RTC_DRV_DS1672) += rtc-ds1672.o obj-$(CONFIG_RTC_DRV_DS1742) += rtc-ds1742.o +obj-$(CONFIG_RTC_DRV_DS3234) += rtc-ds3234.o obj-$(CONFIG_RTC_DRV_EP93XX) += rtc-ep93xx.o obj-$(CONFIG_RTC_DRV_FM3130) += rtc-fm3130.o obj-$(CONFIG_RTC_DRV_ISL1208) += rtc-isl1208.o diff --git a/drivers/rtc/rtc-at91rm9200.c b/drivers/rtc/rtc-at91rm9200.c index 4e888cc8be5b..37082616482b 100644 --- a/drivers/rtc/rtc-at91rm9200.c +++ b/drivers/rtc/rtc-at91rm9200.c @@ -29,10 +29,10 @@ #include <linux/completion.h> #include <asm/uaccess.h> + #include <mach/at91_rtc.h> -#define AT91_RTC_FREQ 1 #define AT91_RTC_EPOCH 1900UL /* just like arch/arm/common/rtctime.c */ static DECLARE_COMPLETION(at91_rtc_updated); @@ -228,8 +228,6 @@ static int at91_rtc_proc(struct device *dev, struct seq_file *seq) (imr & AT91_RTC_ACKUPD) ? "yes" : "no"); seq_printf(seq, "periodic_IRQ\t: %s\n", (imr & AT91_RTC_SECEV) ? "yes" : "no"); - seq_printf(seq, "periodic_freq\t: %ld\n", - (unsigned long) AT91_RTC_FREQ); return 0; } diff --git a/drivers/rtc/rtc-dev.c b/drivers/rtc/rtc-dev.c index 52e2743b04ec..079e9ed907e0 100644 --- a/drivers/rtc/rtc-dev.c +++ b/drivers/rtc/rtc-dev.c @@ -432,9 +432,15 @@ static int rtc_dev_release(struct inode *inode, struct file *file) { struct rtc_device *rtc = file->private_data; -#ifdef CONFIG_RTC_INTF_DEV_UIE_EMUL - clear_uie(rtc); -#endif + /* We shut down the repeating IRQs that userspace enabled, + * since nothing is listening to them. + * - Update (UIE) ... currently only managed through ioctls + * - Periodic (PIE) ... also used through rtc_*() interface calls + * + * Leave the alarm alone; it may be set to trigger a system wakeup + * later, or be used by kernel code, and is a one-shot event anyway. + */ + rtc_dev_ioctl(file, RTC_UIE_OFF, 0); rtc_irq_set_state(rtc, NULL, 0); if (rtc->ops->release) diff --git a/drivers/rtc/rtc-ds1286.c b/drivers/rtc/rtc-ds1286.c index 4b4c1b6a4187..4fcb16bbff4a 100644 --- a/drivers/rtc/rtc-ds1286.c +++ b/drivers/rtc/rtc-ds1286.c @@ -17,6 +17,7 @@ #include <linux/platform_device.h> #include <linux/bcd.h> #include <linux/ds1286.h> +#include <linux/io.h> #define DRV_VERSION "1.0" diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c index bbf97e65202a..4fcf0734a6ef 100644 --- a/drivers/rtc/rtc-ds1307.c +++ b/drivers/rtc/rtc-ds1307.c @@ -23,10 +23,6 @@ * to have set the chip up as a clock (turning on the oscillator and * setting the date and time), Linux can ignore the non-clock features. * That's a natural job for a factory or repair bench. - * - * This is currently a simple no-alarms driver. If your board has the - * alarm irq wired up on a ds1337 or ds1339, and you want to use that, - * then look at the rtc-rs5c372 driver for code to steal... */ enum ds_type { ds_1307, @@ -67,6 +63,7 @@ enum ds_type { # define DS1307_BIT_RS0 0x01 #define DS1337_REG_CONTROL 0x0e # define DS1337_BIT_nEOSC 0x80 +# define DS1339_BIT_BBSQI 0x20 # define DS1337_BIT_RS2 0x10 # define DS1337_BIT_RS1 0x08 # define DS1337_BIT_INTCN 0x04 @@ -83,19 +80,22 @@ enum ds_type { # define DS1337_BIT_OSF 0x80 # define DS1337_BIT_A2I 0x02 # define DS1337_BIT_A1I 0x01 +#define DS1339_REG_ALARM1_SECS 0x07 #define DS1339_REG_TRICKLE 0x10 struct ds1307 { u8 reg_addr; - bool has_nvram; - u8 regs[8]; + u8 regs[11]; enum ds_type type; + unsigned long flags; +#define HAS_NVRAM 0 /* bit 0 == sysfs file active */ +#define HAS_ALARM 1 /* bit 1 == irq claimed */ struct i2c_msg msg[2]; struct i2c_client *client; - struct i2c_client dev; struct rtc_device *rtc; + struct work_struct work; }; struct chip_desc { @@ -132,12 +132,79 @@ static const struct i2c_device_id ds1307_id[] = { }; MODULE_DEVICE_TABLE(i2c, ds1307_id); +/*----------------------------------------------------------------------*/ + +/* + * The IRQ logic includes a "real" handler running in IRQ context just + * long enough to schedule this workqueue entry. We need a task context + * to talk to the RTC, since I2C I/O calls require that; and disable the + * IRQ until we clear its status on the chip, so that this handler can + * work with any type of triggering (not just falling edge). + * + * The ds1337 and ds1339 both have two alarms, but we only use the first + * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm + * signal; ds1339 chips have only one alarm signal. + */ +static void ds1307_work(struct work_struct *work) +{ + struct ds1307 *ds1307; + struct i2c_client *client; + struct mutex *lock; + int stat, control; + + ds1307 = container_of(work, struct ds1307, work); + client = ds1307->client; + lock = &ds1307->rtc->ops_lock; + + mutex_lock(lock); + stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS); + if (stat < 0) + goto out; + + if (stat & DS1337_BIT_A1I) { + stat &= ~DS1337_BIT_A1I; + i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat); + + control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); + if (control < 0) + goto out; + + control &= ~DS1337_BIT_A1IE; + i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control); + + /* rtc_update_irq() assumes that it is called + * from IRQ-disabled context. + */ + local_irq_disable(); + rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF); + local_irq_enable(); + } + +out: + if (test_bit(HAS_ALARM, &ds1307->flags)) + enable_irq(client->irq); + mutex_unlock(lock); +} + +static irqreturn_t ds1307_irq(int irq, void *dev_id) +{ + struct i2c_client *client = dev_id; + struct ds1307 *ds1307 = i2c_get_clientdata(client); + + disable_irq_nosync(irq); + schedule_work(&ds1307->work); + return IRQ_HANDLED; +} + +/*----------------------------------------------------------------------*/ + static int ds1307_get_time(struct device *dev, struct rtc_time *t) { struct ds1307 *ds1307 = dev_get_drvdata(dev); int tmp; /* read the RTC date and time registers all at once */ + ds1307->reg_addr = 0; ds1307->msg[1].flags = I2C_M_RD; ds1307->msg[1].len = 7; @@ -231,9 +298,186 @@ static int ds1307_set_time(struct device *dev, struct rtc_time *t) return 0; } +static int ds1307_read_alarm(struct device *dev, struct rtc_wkalrm *t) +{ + struct i2c_client *client = to_i2c_client(dev); + struct ds1307 *ds1307 = i2c_get_clientdata(client); + int ret; + + if (!test_bit(HAS_ALARM, &ds1307->flags)) + return -EINVAL; + + /* read all ALARM1, ALARM2, and status registers at once */ + ds1307->reg_addr = DS1339_REG_ALARM1_SECS; + ds1307->msg[1].flags = I2C_M_RD; + ds1307->msg[1].len = 9; + + ret = i2c_transfer(to_i2c_adapter(client->dev.parent), + ds1307->msg, 2); + if (ret != 2) { + dev_err(dev, "%s error %d\n", "alarm read", ret); + return -EIO; + } + + dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n", + "alarm read", + ds1307->regs[0], ds1307->regs[1], + ds1307->regs[2], ds1307->regs[3], + ds1307->regs[4], ds1307->regs[5], + ds1307->regs[6], ds1307->regs[7], + ds1307->regs[8]); + + /* report alarm time (ALARM1); assume 24 hour and day-of-month modes, + * and that all four fields are checked matches + */ + t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f); + t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f); + t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f); + t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f); + t->time.tm_mon = -1; + t->time.tm_year = -1; + t->time.tm_wday = -1; + t->time.tm_yday = -1; + t->time.tm_isdst = -1; + + /* ... and status */ + t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE); + t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I); + + dev_dbg(dev, "%s secs=%d, mins=%d, " + "hours=%d, mday=%d, enabled=%d, pending=%d\n", + "alarm read", t->time.tm_sec, t->time.tm_min, + t->time.tm_hour, t->time.tm_mday, + t->enabled, t->pending); + + return 0; +} + +static int ds1307_set_alarm(struct device *dev, struct rtc_wkalrm *t) +{ + struct i2c_client *client = to_i2c_client(dev); + struct ds1307 *ds1307 = i2c_get_clientdata(client); + unsigned char *buf = ds1307->regs; + u8 control, status; + int ret; + + if (!test_bit(HAS_ALARM, &ds1307->flags)) + return -EINVAL; + + dev_dbg(dev, "%s secs=%d, mins=%d, " + "hours=%d, mday=%d, enabled=%d, pending=%d\n", + "alarm set", t->time.tm_sec, t->time.tm_min, + t->time.tm_hour, t->time.tm_mday, + t->enabled, t->pending); + + /* read current status of both alarms and the chip */ + ds1307->reg_addr = DS1339_REG_ALARM1_SECS; + ds1307->msg[1].flags = I2C_M_RD; + ds1307->msg[1].len = 9; + + ret = i2c_transfer(to_i2c_adapter(client->dev.parent), + ds1307->msg, 2); + if (ret != 2) { + dev_err(dev, "%s error %d\n", "alarm write", ret); + return -EIO; + } + control = ds1307->regs[7]; + status = ds1307->regs[8]; + + dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n", + "alarm set (old status)", + ds1307->regs[0], ds1307->regs[1], + ds1307->regs[2], ds1307->regs[3], + ds1307->regs[4], ds1307->regs[5], + ds1307->regs[6], control, status); + + /* set ALARM1, using 24 hour and day-of-month modes */ + *buf++ = DS1339_REG_ALARM1_SECS; /* first register addr */ + buf[0] = bin2bcd(t->time.tm_sec); + buf[1] = bin2bcd(t->time.tm_min); + buf[2] = bin2bcd(t->time.tm_hour); + buf[3] = bin2bcd(t->time.tm_mday); + + /* set ALARM2 to non-garbage */ + buf[4] = 0; + buf[5] = 0; + buf[6] = 0; + + /* optionally enable ALARM1 */ + buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE); + if (t->enabled) { + dev_dbg(dev, "alarm IRQ armed\n"); + buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */ + } + buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I); + + ds1307->msg[1].flags = 0; + ds1307->msg[1].len = 10; + + ret = i2c_transfer(to_i2c_adapter(client->dev.parent), + &ds1307->msg[1], 1); + if (ret != 1) { + dev_err(dev, "can't set alarm time\n"); + return -EIO; + } + + return 0; +} + +static int ds1307_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) +{ + struct i2c_client *client = to_i2c_client(dev); + struct ds1307 *ds1307 = i2c_get_clientdata(client); + int ret; + + switch (cmd) { + case RTC_AIE_OFF: + if (!test_bit(HAS_ALARM, &ds1307->flags)) + return -ENOTTY; + + ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); + if (ret < 0) + return ret; + + ret &= ~DS1337_BIT_A1IE; + + ret = i2c_smbus_write_byte_data(client, + DS1337_REG_CONTROL, ret); + if (ret < 0) + return ret; + + break; + + case RTC_AIE_ON: + if (!test_bit(HAS_ALARM, &ds1307->flags)) + return -ENOTTY; + + ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); + if (ret < 0) + return ret; + + ret |= DS1337_BIT_A1IE; + + ret = i2c_smbus_write_byte_data(client, + DS1337_REG_CONTROL, ret); + if (ret < 0) + return ret; + + break; + + default: + return -ENOIOCTLCMD; + } + + return 0; +} + static const struct rtc_class_ops ds13xx_rtc_ops = { .read_time = ds1307_get_time, .set_time = ds1307_set_time, + .read_alarm = ds1307_read_alarm, + .set_alarm = ds1307_set_alarm, + .ioctl = ds1307_ioctl, }; /*----------------------------------------------------------------------*/ @@ -327,6 +571,7 @@ static int __devinit ds1307_probe(struct i2c_client *client, int tmp; const struct chip_desc *chip = &chips[id->driver_data]; struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); + int want_irq = false; if (!i2c_check_functionality(adapter, I2C_FUNC_I2C | I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) @@ -353,6 +598,12 @@ static int __devinit ds1307_probe(struct i2c_client *client, switch (ds1307->type) { case ds_1337: case ds_1339: + /* has IRQ? */ + if (ds1307->client->irq > 0 && chip->alarm) { + INIT_WORK(&ds1307->work, ds1307_work); + want_irq = true; + } + ds1307->reg_addr = DS1337_REG_CONTROL; ds1307->msg[1].len = 2; @@ -369,8 +620,20 @@ static int __devinit ds1307_probe(struct i2c_client *client, /* oscillator off? turn it on, so clock can tick. */ if (ds1307->regs[0] & DS1337_BIT_nEOSC) - i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, - ds1307->regs[0] & ~DS1337_BIT_nEOSC); + ds1307->regs[0] &= ~DS1337_BIT_nEOSC; + + /* Using IRQ? Disable the square wave and both alarms. + * For ds1339, be sure alarms can trigger when we're + * running on Vbackup (BBSQI); we assume ds1337 will + * ignore that bit + */ + if (want_irq) { + ds1307->regs[0] |= DS1337_BIT_INTCN | DS1339_BIT_BBSQI; + ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE); + } + + i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, + ds1307->regs[0]); /* oscillator fault? clear flag, and warn */ if (ds1307->regs[1] & DS1337_BIT_OSF) { @@ -495,10 +758,22 @@ read_rtc: goto exit_free; } + if (want_irq) { + err = request_irq(client->irq, ds1307_irq, 0, + ds1307->rtc->name, client); + if (err) { + dev_err(&client->dev, + "unable to request IRQ!\n"); + goto exit_irq; + } + set_bit(HAS_ALARM, &ds1307->flags); + dev_dbg(&client->dev, "got IRQ %d\n", client->irq); + } + if (chip->nvram56) { err = sysfs_create_bin_file(&client->dev.kobj, &nvram); if (err == 0) { - ds1307->has_nvram = true; + set_bit(HAS_NVRAM, &ds1307->flags); dev_info(&client->dev, "56 bytes nvram\n"); } } @@ -512,7 +787,9 @@ exit_bad: ds1307->regs[2], ds1307->regs[3], ds1307->regs[4], ds1307->regs[5], ds1307->regs[6]); - +exit_irq: + if (ds1307->rtc) + rtc_device_unregister(ds1307->rtc); exit_free: kfree(ds1307); return err; @@ -520,9 +797,14 @@ exit_free: static int __devexit ds1307_remove(struct i2c_client *client) { - struct ds1307 *ds1307 = i2c_get_clientdata(client); + struct ds1307 *ds1307 = i2c_get_clientdata(client); + + if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) { + free_irq(client->irq, client); + cancel_work_sync(&ds1307->work); + } - if (ds1307->has_nvram) + if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags)) sysfs_remove_bin_file(&client->dev.kobj, &nvram); rtc_device_unregister(ds1307->rtc); diff --git a/drivers/rtc/rtc-ds1374.c b/drivers/rtc/rtc-ds1374.c index a150418fba76..a5b0fc09f0c6 100644 --- a/drivers/rtc/rtc-ds1374.c +++ b/drivers/rtc/rtc-ds1374.c @@ -429,12 +429,33 @@ static int __devexit ds1374_remove(struct i2c_client *client) return 0; } +#ifdef CONFIG_PM +static int ds1374_suspend(struct i2c_client *client, pm_message_t state) +{ + if (client->irq >= 0 && device_may_wakeup(&client->dev)) + enable_irq_wake(client->irq); + return 0; +} + +static int ds1374_resume(struct i2c_client *client) +{ + if (client->irq >= 0 && device_may_wakeup(&client->dev)) + disable_irq_wake(client->irq); + return 0; +} +#else +#define ds1374_suspend NULL +#define ds1374_resume NULL +#endif + static struct i2c_driver ds1374_driver = { .driver = { .name = "rtc-ds1374", .owner = THIS_MODULE, }, .probe = ds1374_probe, + .suspend = ds1374_suspend, + .resume = ds1374_resume, .remove = __devexit_p(ds1374_remove), .id_table = ds1374_id, }; diff --git a/drivers/rtc/rtc-ds1511.c b/drivers/rtc/rtc-ds1511.c index 0f0d27d1c4ca..86981d34fbb6 100644 --- a/drivers/rtc/rtc-ds1511.c +++ b/drivers/rtc/rtc-ds1511.c @@ -379,18 +379,6 @@ ds1511_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } - static void -ds1511_rtc_release(struct device *dev) -{ - struct platform_device *pdev = to_platform_device(dev); - struct rtc_plat_data *pdata = platform_get_drvdata(pdev); - - if (pdata->irq >= 0) { - pdata->irqen = 0; - ds1511_rtc_update_alarm(pdata); - } -} - static int ds1511_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) { @@ -428,7 +416,6 @@ static const struct rtc_class_ops ds1511_rtc_ops = { .set_time = ds1511_rtc_set_time, .read_alarm = ds1511_rtc_read_alarm, .set_alarm = ds1511_rtc_set_alarm, - .release = ds1511_rtc_release, .ioctl = ds1511_rtc_ioctl, }; diff --git a/drivers/rtc/rtc-ds1553.c b/drivers/rtc/rtc-ds1553.c index a19f11415540..4ef59285b489 100644 --- a/drivers/rtc/rtc-ds1553.c +++ b/drivers/rtc/rtc-ds1553.c @@ -207,17 +207,6 @@ static irqreturn_t ds1553_rtc_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static void ds1553_rtc_release(struct device *dev) -{ - struct platform_device *pdev = to_platform_device(dev); - struct rtc_plat_data *pdata = platform_get_drvdata(pdev); - - if (pdata->irq >= 0) { - pdata->irqen = 0; - ds1553_rtc_update_alarm(pdata); - } -} - static int ds1553_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) { @@ -254,7 +243,6 @@ static const struct rtc_class_ops ds1553_rtc_ops = { .set_time = ds1553_rtc_set_time, .read_alarm = ds1553_rtc_read_alarm, .set_alarm = ds1553_rtc_set_alarm, - .release = ds1553_rtc_release, .ioctl = ds1553_rtc_ioctl, }; diff --git a/drivers/rtc/rtc-ds1672.c b/drivers/rtc/rtc-ds1672.c index 6fa4556f5f5c..341d7a5b45a2 100644 --- a/drivers/rtc/rtc-ds1672.c +++ b/drivers/rtc/rtc-ds1672.c @@ -9,17 +9,10 @@ * published by the Free Software Foundation. */ -#include <linux/module.h> #include <linux/i2c.h> #include <linux/rtc.h> -#define DRV_VERSION "0.3" - -/* Addresses to scan: none. This chip cannot be detected. */ -static const unsigned short normal_i2c[] = { I2C_CLIENT_END }; - -/* Insmod parameters */ -I2C_CLIENT_INSMOD; +#define DRV_VERSION "0.4" /* Registers */ @@ -29,8 +22,7 @@ I2C_CLIENT_INSMOD; #define DS1672_REG_CONTROL_EOSC 0x80 -/* Prototypes */ -static int ds1672_probe(struct i2c_adapter *adapter, int address, int kind); +static struct i2c_driver ds1672_driver; /* * In the routines that deal directly with the ds1672 hardware, we use @@ -44,8 +36,8 @@ static int ds1672_get_datetime(struct i2c_client *client, struct rtc_time *tm) unsigned char buf[4]; struct i2c_msg msgs[] = { - { client->addr, 0, 1, &addr }, /* setup read ptr */ - { client->addr, I2C_M_RD, 4, buf }, /* read date */ + {client->addr, 0, 1, &addr}, /* setup read ptr */ + {client->addr, I2C_M_RD, 4, buf}, /* read date */ }; /* read date registers */ @@ -80,7 +72,7 @@ static int ds1672_set_mmss(struct i2c_client *client, unsigned long secs) buf[2] = (secs & 0x0000FF00) >> 8; buf[3] = (secs & 0x00FF0000) >> 16; buf[4] = (secs & 0xFF000000) >> 24; - buf[5] = 0; /* set control reg to enable counting */ + buf[5] = 0; /* set control reg to enable counting */ xfer = i2c_master_send(client, buf, 6); if (xfer != 6) { @@ -127,8 +119,8 @@ static int ds1672_get_control(struct i2c_client *client, u8 *status) unsigned char addr = DS1672_REG_CONTROL; struct i2c_msg msgs[] = { - { client->addr, 0, 1, &addr }, /* setup read ptr */ - { client->addr, I2C_M_RD, 1, status }, /* read control */ + {client->addr, 0, 1, &addr}, /* setup read ptr */ + {client->addr, I2C_M_RD, 1, status}, /* read control */ }; /* read control register */ @@ -141,7 +133,8 @@ static int ds1672_get_control(struct i2c_client *client, u8 *status) } /* following are the sysfs callback functions */ -static ssize_t show_control(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t show_control(struct device *dev, struct device_attribute *attr, + char *buf) { struct i2c_client *client = to_i2c_client(dev); u8 control; @@ -152,85 +145,46 @@ static ssize_t show_control(struct device *dev, struct device_attribute *attr, c return err; return sprintf(buf, "%s\n", (control & DS1672_REG_CONTROL_EOSC) - ? "disabled" : "enabled"); + ? "disabled" : "enabled"); } + static DEVICE_ATTR(control, S_IRUGO, show_control, NULL); static const struct rtc_class_ops ds1672_rtc_ops = { - .read_time = ds1672_rtc_read_time, - .set_time = ds1672_rtc_set_time, - .set_mmss = ds1672_rtc_set_mmss, + .read_time = ds1672_rtc_read_time, + .set_time = ds1672_rtc_set_time, + .set_mmss = ds1672_rtc_set_mmss, }; -static int ds1672_attach(struct i2c_adapter *adapter) +static int ds1672_remove(struct i2c_client *client) { - return i2c_probe(adapter, &addr_data, ds1672_probe); -} - -static int ds1672_detach(struct i2c_client *client) -{ - int err; struct rtc_device *rtc = i2c_get_clientdata(client); - if (rtc) + if (rtc) rtc_device_unregister(rtc); - if ((err = i2c_detach_client(client))) - return err; - - kfree(client); - return 0; } -static struct i2c_driver ds1672_driver = { - .driver = { - .name = "ds1672", - }, - .id = I2C_DRIVERID_DS1672, - .attach_adapter = &ds1672_attach, - .detach_client = &ds1672_detach, -}; - -static int ds1672_probe(struct i2c_adapter *adapter, int address, int kind) +static int ds1672_probe(struct i2c_client *client, + const struct i2c_device_id *id) { int err = 0; u8 control; - struct i2c_client *client; struct rtc_device *rtc; - dev_dbg(&adapter->dev, "%s\n", __func__); + dev_dbg(&client->dev, "%s\n", __func__); - if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) { - err = -ENODEV; - goto exit; - } - - if (!(client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL))) { - err = -ENOMEM; - goto exit; - } - - /* I2C client */ - client->addr = address; - client->driver = &ds1672_driver; - client->adapter = adapter; - - strlcpy(client->name, ds1672_driver.driver.name, I2C_NAME_SIZE); - - /* Inform the i2c layer */ - if ((err = i2c_attach_client(client))) - goto exit_kfree; + if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) + return -ENODEV; dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n"); rtc = rtc_device_register(ds1672_driver.driver.name, &client->dev, - &ds1672_rtc_ops, THIS_MODULE); + &ds1672_rtc_ops, THIS_MODULE); - if (IS_ERR(rtc)) { - err = PTR_ERR(rtc); - goto exit_detach; - } + if (IS_ERR(rtc)) + return PTR_ERR(rtc); i2c_set_clientdata(client, rtc); @@ -241,7 +195,7 @@ static int ds1672_probe(struct i2c_adapter *adapter, int address, int kind) if (control & DS1672_REG_CONTROL_EOSC) dev_warn(&client->dev, "Oscillator not enabled. " - "Set time to enable.\n"); + "Set time to enable.\n"); /* Register sysfs hooks */ err = device_create_file(&client->dev, &dev_attr_control); @@ -250,19 +204,19 @@ static int ds1672_probe(struct i2c_adapter *adapter, int address, int kind) return 0; -exit_devreg: + exit_devreg: rtc_device_unregister(rtc); - -exit_detach: - i2c_detach_client(client); - -exit_kfree: - kfree(client); - -exit: return err; } +static struct i2c_driver ds1672_driver = { + .driver = { + .name = "rtc-ds1672", + }, + .probe = &ds1672_probe, + .remove = &ds1672_remove, +}; + static int __init ds1672_init(void) { return i2c_add_driver(&ds1672_driver); diff --git a/drivers/rtc/rtc-ds3234.c b/drivers/rtc/rtc-ds3234.c new file mode 100644 index 000000000000..37d131d03f33 --- /dev/null +++ b/drivers/rtc/rtc-ds3234.c @@ -0,0 +1,290 @@ +/* drivers/rtc/rtc-ds3234.c + * + * Driver for Dallas Semiconductor (DS3234) SPI RTC with Integrated Crystal + * and SRAM. + * + * Copyright (C) 2008 MIMOMax Wireless Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + * + * 07-May-2008: Dennis Aberilla <denzzzhome@yahoo.com> + * - Created based on the max6902 code. Only implements the + * date/time keeping functions; no SRAM yet. + */ + +#include <linux/device.h> +#include <linux/platform_device.h> +#include <linux/rtc.h> +#include <linux/spi/spi.h> +#include <linux/bcd.h> + +#define DS3234_REG_SECONDS 0x00 +#define DS3234_REG_MINUTES 0x01 +#define DS3234_REG_HOURS 0x02 +#define DS3234_REG_DAY 0x03 +#define DS3234_REG_DATE 0x04 +#define DS3234_REG_MONTH 0x05 +#define DS3234_REG_YEAR 0x06 +#define DS3234_REG_CENTURY (1 << 7) /* Bit 7 of the Month register */ + +#define DS3234_REG_CONTROL 0x0E +#define DS3234_REG_CONT_STAT 0x0F + +#undef DS3234_DEBUG + +struct ds3234 { + struct rtc_device *rtc; + u8 buf[8]; /* Burst read: addr + 7 regs */ + u8 tx_buf[2]; + u8 rx_buf[2]; +}; + +static void ds3234_set_reg(struct device *dev, unsigned char address, + unsigned char data) +{ + struct spi_device *spi = to_spi_device(dev); + unsigned char buf[2]; + + /* MSB must be '1' to indicate write */ + buf[0] = address | 0x80; + buf[1] = data; + + spi_write(spi, buf, 2); +} + +static int ds3234_get_reg(struct device *dev, unsigned char address, + unsigned char *data) +{ + struct spi_device *spi = to_spi_device(dev); + struct ds3234 *chip = dev_get_drvdata(dev); + struct spi_message message; + struct spi_transfer xfer; + int status; + + if (!data) + return -EINVAL; + + /* Build our spi message */ + spi_message_init(&message); + memset(&xfer, 0, sizeof(xfer)); + + /* Address + dummy tx byte */ + xfer.len = 2; + xfer.tx_buf = chip->tx_buf; + xfer.rx_buf = chip->rx_buf; + + chip->tx_buf[0] = address; + chip->tx_buf[1] = 0xff; + + spi_message_add_tail(&xfer, &message); + + /* do the i/o */ + status = spi_sync(spi, &message); + if (status == 0) + status = message.status; + else + return status; + + *data = chip->rx_buf[1]; + + return status; +} + +static int ds3234_get_datetime(struct device *dev, struct rtc_time *dt) +{ + struct spi_device *spi = to_spi_device(dev); + struct ds3234 *chip = dev_get_drvdata(dev); + struct spi_message message; + struct spi_transfer xfer; + int status; + + /* build the message */ + spi_message_init(&message); + memset(&xfer, 0, sizeof(xfer)); + xfer.len = 1 + 7; /* Addr + 7 registers */ + xfer.tx_buf = chip->buf; + xfer.rx_buf = chip->buf; + chip->buf[0] = 0x00; /* Start address */ + spi_message_add_tail(&xfer, &message); + + /* do the i/o */ + status = spi_sync(spi, &message); + if (status == 0) + status = message.status; + else + return status; + + /* Seconds, Minutes, Hours, Day, Date, Month, Year */ + dt->tm_sec = bcd2bin(chip->buf[1]); + dt->tm_min = bcd2bin(chip->buf[2]); + dt->tm_hour = bcd2bin(chip->buf[3] & 0x3f); + dt->tm_wday = bcd2bin(chip->buf[4]) - 1; /* 0 = Sun */ + dt->tm_mday = bcd2bin(chip->buf[5]); + dt->tm_mon = bcd2bin(chip->buf[6] & 0x1f) - 1; /* 0 = Jan */ + dt->tm_year = bcd2bin(chip->buf[7] & 0xff) + 100; /* Assume 20YY */ + +#ifdef DS3234_DEBUG + dev_dbg(dev, "\n%s : Read RTC values\n", __func__); + dev_dbg(dev, "tm_hour: %i\n", dt->tm_hour); + dev_dbg(dev, "tm_min : %i\n", dt->tm_min); + dev_dbg(dev, "tm_sec : %i\n", dt->tm_sec); + dev_dbg(dev, "tm_wday: %i\n", dt->tm_wday); + dev_dbg(dev, "tm_mday: %i\n", dt->tm_mday); + dev_dbg(dev, "tm_mon : %i\n", dt->tm_mon); + dev_dbg(dev, "tm_year: %i\n", dt->tm_year); +#endif + + return 0; +} + +static int ds3234_set_datetime(struct device *dev, struct rtc_time *dt) +{ +#ifdef DS3234_DEBUG + dev_dbg(dev, "\n%s : Setting RTC values\n", __func__); + dev_dbg(dev, "tm_sec : %i\n", dt->tm_sec); + dev_dbg(dev, "tm_min : %i\n", dt->tm_min); + dev_dbg(dev, "tm_hour: %i\n", dt->tm_hour); + dev_dbg(dev, "tm_wday: %i\n", dt->tm_wday); + dev_dbg(dev, "tm_mday: %i\n", dt->tm_mday); + dev_dbg(dev, "tm_mon : %i\n", dt->tm_mon); + dev_dbg(dev, "tm_year: %i\n", dt->tm_year); +#endif + + ds3234_set_reg(dev, DS3234_REG_SECONDS, bin2bcd(dt->tm_sec)); + ds3234_set_reg(dev, DS3234_REG_MINUTES, bin2bcd(dt->tm_min)); + ds3234_set_reg(dev, DS3234_REG_HOURS, bin2bcd(dt->tm_hour) & 0x3f); + + /* 0 = Sun */ + ds3234_set_reg(dev, DS3234_REG_DAY, bin2bcd(dt->tm_wday + 1)); + ds3234_set_reg(dev, DS3234_REG_DATE, bin2bcd(dt->tm_mday)); + + /* 0 = Jan */ + ds3234_set_reg(dev, DS3234_REG_MONTH, bin2bcd(dt->tm_mon + 1)); + + /* Assume 20YY although we just want to make sure not to go negative. */ + if (dt->tm_year > 100) + dt->tm_year -= 100; + + ds3234_set_reg(dev, DS3234_REG_YEAR, bin2bcd(dt->tm_year)); + + return 0; +} + +static int ds3234_read_time(struct device *dev, struct rtc_time *tm) +{ + return ds3234_get_datetime(dev, tm); +} + +static int ds3234_set_time(struct device *dev, struct rtc_time *tm) +{ + return ds3234_set_datetime(dev, tm); +} + +static const struct rtc_class_ops ds3234_rtc_ops = { + .read_time = ds3234_read_time, + .set_time = ds3234_set_time, +}; + +static int ds3234_probe(struct spi_device *spi) +{ + struct rtc_device *rtc; + unsigned char tmp; + struct ds3234 *chip; + int res; + + rtc = rtc_device_register("ds3234", + &spi->dev, &ds3234_rtc_ops, THIS_MODULE); + if (IS_ERR(rtc)) + return PTR_ERR(rtc); + + spi->mode = SPI_MODE_3; + spi->bits_per_word = 8; + spi_setup(spi); + + chip = kzalloc(sizeof(struct ds3234), GFP_KERNEL); + if (!chip) { + rtc_device_unregister(rtc); + return -ENOMEM; + } + chip->rtc = rtc; + dev_set_drvdata(&spi->dev, chip); + + res = ds3234_get_reg(&spi->dev, DS3234_REG_SECONDS, &tmp); + if (res) { + rtc_device_unregister(rtc); + return res; + } + + /* Control settings + * + * CONTROL_REG + * BIT 7 6 5 4 3 2 1 0 + * EOSC BBSQW CONV RS2 RS1 INTCN A2IE A1IE + * + * 0 0 0 1 1 1 0 0 + * + * CONTROL_STAT_REG + * BIT 7 6 5 4 3 2 1 0 + * OSF BB32kHz CRATE1 CRATE0 EN32kHz BSY A2F A1F + * + * 1 0 0 0 1 0 0 0 + */ + ds3234_get_reg(&spi->dev, DS3234_REG_CONTROL, &tmp); + ds3234_set_reg(&spi->dev, DS3234_REG_CONTROL, tmp & 0x1c); + + ds3234_get_reg(&spi->dev, DS3234_REG_CONT_STAT, &tmp); + ds3234_set_reg(&spi->dev, DS3234_REG_CONT_STAT, tmp & 0x88); + + /* Print our settings */ + ds3234_get_reg(&spi->dev, DS3234_REG_CONTROL, &tmp); + dev_info(&spi->dev, "Control Reg: 0x%02x\n", tmp); + + ds3234_get_reg(&spi->dev, DS3234_REG_CONT_STAT, &tmp); + dev_info(&spi->dev, "Ctrl/Stat Reg: 0x%02x\n", tmp); + + return 0; +} + +static int __exit ds3234_remove(struct spi_device *spi) +{ + struct ds3234 *chip = platform_get_drvdata(spi); + struct rtc_device *rtc = chip->rtc; + + if (rtc) + rtc_device_unregister(rtc); + + kfree(chip); + + return 0; +} + +static struct spi_driver ds3234_driver = { + .driver = { + .name = "ds3234", + .bus = &spi_bus_type, + .owner = THIS_MODULE, + }, + .probe = ds3234_probe, + .remove = __devexit_p(ds3234_remove), +}; + +static __init int ds3234_init(void) +{ + printk(KERN_INFO "DS3234 SPI RTC Driver\n"); + return spi_register_driver(&ds3234_driver); +} +module_init(ds3234_init); + +static __exit void ds3234_exit(void) +{ + spi_unregister_driver(&ds3234_driver); +} +module_exit(ds3234_exit); + +MODULE_DESCRIPTION("DS3234 SPI RTC driver"); +MODULE_AUTHOR("Dennis Aberilla <denzzzhome@yahoo.com>"); +MODULE_LICENSE("GPL"); diff --git a/drivers/rtc/rtc-m41t80.c b/drivers/rtc/rtc-m41t80.c index 24bc1689fc74..470fb2d29545 100644 --- a/drivers/rtc/rtc-m41t80.c +++ b/drivers/rtc/rtc-m41t80.c @@ -56,21 +56,27 @@ #define M41T80_ALHOUR_HT (1 << 6) /* HT: Halt Update Bit */ #define M41T80_FLAGS_AF (1 << 6) /* AF: Alarm Flag Bit */ #define M41T80_FLAGS_BATT_LOW (1 << 4) /* BL: Battery Low Bit */ +#define M41T80_WATCHDOG_RB2 (1 << 7) /* RB: Watchdog resolution */ +#define M41T80_WATCHDOG_RB1 (1 << 1) /* RB: Watchdog resolution */ +#define M41T80_WATCHDOG_RB0 (1 << 0) /* RB: Watchdog resolution */ -#define M41T80_FEATURE_HT (1 << 0) -#define M41T80_FEATURE_BL (1 << 1) +#define M41T80_FEATURE_HT (1 << 0) /* Halt feature */ +#define M41T80_FEATURE_BL (1 << 1) /* Battery low indicator */ +#define M41T80_FEATURE_SQ (1 << 2) /* Squarewave feature */ +#define M41T80_FEATURE_WD (1 << 3) /* Extra watchdog resolution */ #define DRV_VERSION "0.05" static const struct i2c_device_id m41t80_id[] = { - { "m41t80", 0 }, - { "m41t81", M41T80_FEATURE_HT }, - { "m41t81s", M41T80_FEATURE_HT | M41T80_FEATURE_BL }, - { "m41t82", M41T80_FEATURE_HT | M41T80_FEATURE_BL }, - { "m41t83", M41T80_FEATURE_HT | M41T80_FEATURE_BL }, - { "m41st84", M41T80_FEATURE_HT | M41T80_FEATURE_BL }, - { "m41st85", M41T80_FEATURE_HT | M41T80_FEATURE_BL }, - { "m41st87", M41T80_FEATURE_HT | M41T80_FEATURE_BL }, + { "m41t65", M41T80_FEATURE_HT | M41T80_FEATURE_WD }, + { "m41t80", M41T80_FEATURE_SQ }, + { "m41t81", M41T80_FEATURE_HT | M41T80_FEATURE_SQ}, + { "m41t81s", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, + { "m41t82", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, + { "m41t83", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, + { "m41st84", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, + { "m41st85", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, + { "m41st87", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, { } }; MODULE_DEVICE_TABLE(i2c, m41t80_id); @@ -386,8 +392,12 @@ static ssize_t m41t80_sysfs_show_sqwfreq(struct device *dev, struct device_attribute *attr, char *buf) { struct i2c_client *client = to_i2c_client(dev); + struct m41t80_data *clientdata = i2c_get_clientdata(client); int val; + if (!(clientdata->features & M41T80_FEATURE_SQ)) + return -EINVAL; + val = i2c_smbus_read_byte_data(client, M41T80_REG_SQW); if (val < 0) return -EIO; @@ -408,9 +418,13 @@ static ssize_t m41t80_sysfs_set_sqwfreq(struct device *dev, const char *buf, size_t count) { struct i2c_client *client = to_i2c_client(dev); + struct m41t80_data *clientdata = i2c_get_clientdata(client); int almon, sqw; int val = simple_strtoul(buf, NULL, 0); + if (!(clientdata->features & M41T80_FEATURE_SQ)) + return -EINVAL; + if (val) { if (!is_power_of_2(val)) return -EINVAL; @@ -499,6 +513,8 @@ static void wdt_ping(void) .buf = i2c_data, }, }; + struct m41t80_data *clientdata = i2c_get_clientdata(save_client); + i2c_data[0] = 0x09; /* watchdog register */ if (wdt_margin > 31) @@ -509,6 +525,13 @@ static void wdt_ping(void) */ i2c_data[1] = wdt_margin<<2 | 0x82; + /* + * M41T65 has three bits for watchdog resolution. Don't set bit 7, as + * that would be an invalid resolution. + */ + if (clientdata->features & M41T80_FEATURE_WD) + i2c_data[1] &= ~M41T80_WATCHDOG_RB2; + i2c_transfer(save_client->adapter, msgs1, 1); } diff --git a/drivers/rtc/rtc-m48t35.c b/drivers/rtc/rtc-m48t35.c index b9c1fe4a198e..0b2197559940 100644 --- a/drivers/rtc/rtc-m48t35.c +++ b/drivers/rtc/rtc-m48t35.c @@ -18,6 +18,7 @@ #include <linux/rtc.h> #include <linux/platform_device.h> #include <linux/bcd.h> +#include <linux/io.h> #define DRV_VERSION "1.0" diff --git a/drivers/rtc/rtc-max6900.c b/drivers/rtc/rtc-max6900.c index ded3c0abad83..12c9cd25cad8 100644 --- a/drivers/rtc/rtc-max6900.c +++ b/drivers/rtc/rtc-max6900.c @@ -17,19 +17,18 @@ #include <linux/rtc.h> #include <linux/delay.h> -#define DRV_NAME "max6900" -#define DRV_VERSION "0.1" +#define DRV_VERSION "0.2" /* * register indices */ -#define MAX6900_REG_SC 0 /* seconds 00-59 */ -#define MAX6900_REG_MN 1 /* minutes 00-59 */ -#define MAX6900_REG_HR 2 /* hours 00-23 */ -#define MAX6900_REG_DT 3 /* day of month 00-31 */ -#define MAX6900_REG_MO 4 /* month 01-12 */ -#define MAX6900_REG_DW 5 /* day of week 1-7 */ -#define MAX6900_REG_YR 6 /* year 00-99 */ +#define MAX6900_REG_SC 0 /* seconds 00-59 */ +#define MAX6900_REG_MN 1 /* minutes 00-59 */ +#define MAX6900_REG_HR 2 /* hours 00-23 */ +#define MAX6900_REG_DT 3 /* day of month 00-31 */ +#define MAX6900_REG_MO 4 /* month 01-12 */ +#define MAX6900_REG_DW 5 /* day of week 1-7 */ +#define MAX6900_REG_YR 6 /* year 00-99 */ #define MAX6900_REG_CT 7 /* control */ /* register 8 is undocumented */ #define MAX6900_REG_CENTURY 9 /* century */ @@ -39,7 +38,6 @@ #define MAX6900_REG_CT_WP (1 << 7) /* Write Protect */ - /* * register read/write commands */ @@ -52,16 +50,7 @@ #define MAX6900_IDLE_TIME_AFTER_WRITE 3 /* specification says 2.5 mS */ -#define MAX6900_I2C_ADDR 0xa0 - -static const unsigned short normal_i2c[] = { - MAX6900_I2C_ADDR >> 1, - I2C_CLIENT_END -}; - -I2C_CLIENT_INSMOD; /* defines addr_data */ - -static int max6900_probe(struct i2c_adapter *adapter, int addr, int kind); +static struct i2c_driver max6900_driver; static int max6900_i2c_read_regs(struct i2c_client *client, u8 *buf) { @@ -69,36 +58,35 @@ static int max6900_i2c_read_regs(struct i2c_client *client, u8 *buf) u8 reg_century_read[1] = { MAX6900_REG_CENTURY_READ }; struct i2c_msg msgs[4] = { { - .addr = client->addr, - .flags = 0, /* write */ - .len = sizeof(reg_burst_read), - .buf = reg_burst_read - }, + .addr = client->addr, + .flags = 0, /* write */ + .len = sizeof(reg_burst_read), + .buf = reg_burst_read} + , { - .addr = client->addr, - .flags = I2C_M_RD, - .len = MAX6900_BURST_LEN, - .buf = buf - }, + .addr = client->addr, + .flags = I2C_M_RD, + .len = MAX6900_BURST_LEN, + .buf = buf} + , { - .addr = client->addr, - .flags = 0, /* write */ - .len = sizeof(reg_century_read), - .buf = reg_century_read - }, + .addr = client->addr, + .flags = 0, /* write */ + .len = sizeof(reg_century_read), + .buf = reg_century_read} + , { - .addr = client->addr, - .flags = I2C_M_RD, - .len = sizeof(buf[MAX6900_REG_CENTURY]), - .buf = &buf[MAX6900_REG_CENTURY] - } + .addr = client->addr, + .flags = I2C_M_RD, + .len = sizeof(buf[MAX6900_REG_CENTURY]), + .buf = &buf[MAX6900_REG_CENTURY] + } }; int rc; rc = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); if (rc != ARRAY_SIZE(msgs)) { - dev_err(&client->dev, "%s: register read failed\n", - __func__); + dev_err(&client->dev, "%s: register read failed\n", __func__); return -EIO; } return 0; @@ -109,20 +97,18 @@ static int max6900_i2c_write_regs(struct i2c_client *client, u8 const *buf) u8 i2c_century_buf[1 + 1] = { MAX6900_REG_CENTURY_WRITE }; struct i2c_msg century_msgs[1] = { { - .addr = client->addr, - .flags = 0, /* write */ - .len = sizeof(i2c_century_buf), - .buf = i2c_century_buf - } + .addr = client->addr, + .flags = 0, /* write */ + .len = sizeof(i2c_century_buf), + .buf = i2c_century_buf} }; u8 i2c_burst_buf[MAX6900_BURST_LEN + 1] = { MAX6900_REG_BURST_WRITE }; struct i2c_msg burst_msgs[1] = { { - .addr = client->addr, - .flags = 0, /* write */ - .len = sizeof(i2c_burst_buf), - .buf = i2c_burst_buf - } + .addr = client->addr, + .flags = 0, /* write */ + .len = sizeof(i2c_burst_buf), + .buf = i2c_burst_buf} }; int rc; @@ -133,10 +119,12 @@ static int max6900_i2c_write_regs(struct i2c_client *client, u8 const *buf) * bit as part of the burst write. */ i2c_century_buf[1] = buf[MAX6900_REG_CENTURY]; + rc = i2c_transfer(client->adapter, century_msgs, ARRAY_SIZE(century_msgs)); if (rc != ARRAY_SIZE(century_msgs)) goto write_failed; + msleep(MAX6900_IDLE_TIME_AFTER_WRITE); memcpy(&i2c_burst_buf[1], buf, MAX6900_BURST_LEN); @@ -148,45 +136,11 @@ static int max6900_i2c_write_regs(struct i2c_client *client, u8 const *buf) return 0; -write_failed: - dev_err(&client->dev, "%s: register write failed\n", - __func__); + write_failed: + dev_err(&client->dev, "%s: register write failed\n", __func__); return -EIO; } -static int max6900_i2c_validate_client(struct i2c_client *client) -{ - u8 regs[MAX6900_REG_LEN]; - u8 zero_mask[] = { - 0x80, /* seconds */ - 0x80, /* minutes */ - 0x40, /* hours */ - 0xc0, /* day of month */ - 0xe0, /* month */ - 0xf8, /* day of week */ - 0x00, /* year */ - 0x7f, /* control */ - }; - int i; - int rc; - int reserved; - - reserved = i2c_smbus_read_byte_data(client, MAX6900_REG_RESERVED_READ); - if (reserved != 0x07) - return -ENODEV; - - rc = max6900_i2c_read_regs(client, regs); - if (rc < 0) - return rc; - - for (i = 0; i < ARRAY_SIZE(zero_mask); ++i) { - if (regs[i] & zero_mask[i]) - return -ENODEV; - } - - return 0; -} - static int max6900_i2c_read_time(struct i2c_client *client, struct rtc_time *tm) { int rc; @@ -202,7 +156,7 @@ static int max6900_i2c_read_time(struct i2c_client *client, struct rtc_time *tm) tm->tm_mday = BCD2BIN(regs[MAX6900_REG_DT]); tm->tm_mon = BCD2BIN(regs[MAX6900_REG_MO]) - 1; tm->tm_year = BCD2BIN(regs[MAX6900_REG_YR]) + - BCD2BIN(regs[MAX6900_REG_CENTURY]) * 100 - 1900; + BCD2BIN(regs[MAX6900_REG_CENTURY]) * 100 - 1900; tm->tm_wday = BCD2BIN(regs[MAX6900_REG_DW]); return 0; @@ -211,7 +165,7 @@ static int max6900_i2c_read_time(struct i2c_client *client, struct rtc_time *tm) static int max6900_i2c_clear_write_protect(struct i2c_client *client) { int rc; - rc = i2c_smbus_write_byte_data (client, MAX6900_REG_CONTROL_WRITE, 0); + rc = i2c_smbus_write_byte_data(client, MAX6900_REG_CONTROL_WRITE, 0); if (rc < 0) { dev_err(&client->dev, "%s: control register write failed\n", __func__); @@ -220,8 +174,8 @@ static int max6900_i2c_clear_write_protect(struct i2c_client *client) return 0; } -static int max6900_i2c_set_time(struct i2c_client *client, - struct rtc_time const *tm) +static int +max6900_i2c_set_time(struct i2c_client *client, struct rtc_time const *tm) { u8 regs[MAX6900_REG_LEN]; int rc; @@ -258,89 +212,49 @@ static int max6900_rtc_set_time(struct device *dev, struct rtc_time *tm) return max6900_i2c_set_time(to_i2c_client(dev), tm); } -static int max6900_attach_adapter(struct i2c_adapter *adapter) -{ - return i2c_probe(adapter, &addr_data, max6900_probe); -} - -static int max6900_detach_client(struct i2c_client *client) +static int max6900_remove(struct i2c_client *client) { - struct rtc_device *const rtc = i2c_get_clientdata(client); + struct rtc_device *rtc = i2c_get_clientdata(client); if (rtc) rtc_device_unregister(rtc); - return i2c_detach_client(client); + return 0; } -static struct i2c_driver max6900_driver = { - .driver = { - .name = DRV_NAME, - }, - .id = I2C_DRIVERID_MAX6900, - .attach_adapter = max6900_attach_adapter, - .detach_client = max6900_detach_client, -}; - static const struct rtc_class_ops max6900_rtc_ops = { - .read_time = max6900_rtc_read_time, - .set_time = max6900_rtc_set_time, + .read_time = max6900_rtc_read_time, + .set_time = max6900_rtc_set_time, }; -static int max6900_probe(struct i2c_adapter *adapter, int addr, int kind) +static int +max6900_probe(struct i2c_client *client, const struct i2c_device_id *id) { - int rc = 0; - struct i2c_client *client = NULL; - struct rtc_device *rtc = NULL; - - if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) { - rc = -ENODEV; - goto failout; - } - - client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL); - if (client == NULL) { - rc = -ENOMEM; - goto failout; - } - - client->addr = addr; - client->adapter = adapter; - client->driver = &max6900_driver; - strlcpy(client->name, DRV_NAME, I2C_NAME_SIZE); - - if (kind < 0) { - rc = max6900_i2c_validate_client(client); - if (rc < 0) - goto failout; - } + struct rtc_device *rtc; - rc = i2c_attach_client(client); - if (rc < 0) - goto failout; + if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) + return -ENODEV; - dev_info(&client->dev, - "chip found, driver version " DRV_VERSION "\n"); + dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n"); rtc = rtc_device_register(max6900_driver.driver.name, - &client->dev, - &max6900_rtc_ops, THIS_MODULE); - if (IS_ERR(rtc)) { - rc = PTR_ERR(rtc); - goto failout_detach; - } + &client->dev, &max6900_rtc_ops, THIS_MODULE); + if (IS_ERR(rtc)) + return PTR_ERR(rtc); i2c_set_clientdata(client, rtc); return 0; - -failout_detach: - i2c_detach_client(client); -failout: - kfree(client); - return rc; } +static struct i2c_driver max6900_driver = { + .driver = { + .name = "rtc-max6900", + }, + .probe = max6900_probe, + .remove = max6900_remove, +}; + static int __init max6900_init(void) { return i2c_add_driver(&max6900_driver); @@ -352,6 +266,7 @@ static void __exit max6900_exit(void) } MODULE_DESCRIPTION("Maxim MAX6900 RTC driver"); +MODULE_AUTHOR("Dale Farnsworth <dale@farnsworth.org>"); MODULE_LICENSE("GPL"); MODULE_VERSION(DRV_VERSION); diff --git a/drivers/rtc/rtc-pcf8563.c b/drivers/rtc/rtc-pcf8563.c index 748a502a6355..a829f20ad6d6 100644 --- a/drivers/rtc/rtc-pcf8563.c +++ b/drivers/rtc/rtc-pcf8563.c @@ -179,58 +179,6 @@ struct pcf8563_limit unsigned char max; }; -static int pcf8563_validate_client(struct i2c_client *client) -{ - int i; - - static const struct pcf8563_limit pattern[] = { - /* register, mask, min, max */ - { PCF8563_REG_SC, 0x7F, 0, 59 }, - { PCF8563_REG_MN, 0x7F, 0, 59 }, - { PCF8563_REG_HR, 0x3F, 0, 23 }, - { PCF8563_REG_DM, 0x3F, 0, 31 }, - { PCF8563_REG_MO, 0x1F, 0, 12 }, - }; - - /* check limits (only registers with bcd values) */ - for (i = 0; i < ARRAY_SIZE(pattern); i++) { - int xfer; - unsigned char value; - unsigned char buf = pattern[i].reg; - - struct i2c_msg msgs[] = { - { client->addr, 0, 1, &buf }, - { client->addr, I2C_M_RD, 1, &buf }, - }; - - xfer = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); - - if (xfer != ARRAY_SIZE(msgs)) { - dev_err(&client->dev, - "%s: could not read register 0x%02X\n", - __func__, pattern[i].reg); - - return -EIO; - } - - value = BCD2BIN(buf & pattern[i].mask); - - if (value > pattern[i].max || - value < pattern[i].min) { - dev_dbg(&client->dev, - "%s: pattern=%d, reg=%x, mask=0x%02x, min=%d, " - "max=%d, value=%d, raw=0x%02X\n", - __func__, i, pattern[i].reg, pattern[i].mask, - pattern[i].min, pattern[i].max, - value, buf); - - return -ENODEV; - } - } - - return 0; -} - static int pcf8563_rtc_read_time(struct device *dev, struct rtc_time *tm) { return pcf8563_get_datetime(to_i2c_client(dev), tm); @@ -262,12 +210,6 @@ static int pcf8563_probe(struct i2c_client *client, if (!pcf8563) return -ENOMEM; - /* Verify the chip is really an PCF8563 */ - if (pcf8563_validate_client(client) < 0) { - err = -ENODEV; - goto exit_kfree; - } - dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n"); pcf8563->rtc = rtc_device_register(pcf8563_driver.driver.name, diff --git a/drivers/rtc/rtc-pl030.c b/drivers/rtc/rtc-pl030.c index 8448eeb9d675..826153552157 100644 --- a/drivers/rtc/rtc-pl030.c +++ b/drivers/rtc/rtc-pl030.c @@ -34,15 +34,6 @@ static irqreturn_t pl030_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static int pl030_open(struct device *dev) -{ - return 0; -} - -static void pl030_release(struct device *dev) -{ -} - static int pl030_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) { return -ENOIOCTLCMD; @@ -104,8 +95,6 @@ static int pl030_set_time(struct device *dev, struct rtc_time *tm) } static const struct rtc_class_ops pl030_ops = { - .open = pl030_open, - .release = pl030_release, .ioctl = pl030_ioctl, .read_time = pl030_read_time, .set_time = pl030_set_time, diff --git a/drivers/rtc/rtc-pl031.c b/drivers/rtc/rtc-pl031.c index 08b4610ec5a6..333eec689d2f 100644 --- a/drivers/rtc/rtc-pl031.c +++ b/drivers/rtc/rtc-pl031.c @@ -45,18 +45,6 @@ static irqreturn_t pl031_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static int pl031_open(struct device *dev) -{ - /* - * We request IRQ in pl031_probe, so nothing to do here... - */ - return 0; -} - -static void pl031_release(struct device *dev) -{ -} - static int pl031_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) { struct pl031_local *ldata = dev_get_drvdata(dev); @@ -118,8 +106,6 @@ static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) } static const struct rtc_class_ops pl031_ops = { - .open = pl031_open, - .release = pl031_release, .ioctl = pl031_ioctl, .read_time = pl031_read_time, .set_time = pl031_set_time, diff --git a/drivers/rtc/rtc-rs5c372.c b/drivers/rtc/rtc-rs5c372.c index 56caf6b2c3e5..8b561958fb1e 100644 --- a/drivers/rtc/rtc-rs5c372.c +++ b/drivers/rtc/rtc-rs5c372.c @@ -1,8 +1,9 @@ /* - * An I2C driver for Ricoh RS5C372 and RV5C38[67] RTCs + * An I2C driver for Ricoh RS5C372, R2025S/D and RV5C38[67] RTCs * * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net> * Copyright (C) 2006 Tower Technologies + * Copyright (C) 2008 Paul Mundt * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -13,7 +14,7 @@ #include <linux/rtc.h> #include <linux/bcd.h> -#define DRV_VERSION "0.5" +#define DRV_VERSION "0.6" /* @@ -51,7 +52,8 @@ # define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */ #define RS5C_REG_CTRL2 15 # define RS5C372_CTRL2_24 (1 << 5) -# define RS5C_CTRL2_XSTP (1 << 4) +# define R2025_CTRL2_XST (1 << 5) +# define RS5C_CTRL2_XSTP (1 << 4) /* only if !R2025S/D */ # define RS5C_CTRL2_CTFG (1 << 2) # define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */ # define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */ @@ -63,6 +65,7 @@ enum rtc_type { rtc_undef = 0, + rtc_r2025sd, rtc_rs5c372a, rtc_rs5c372b, rtc_rv5c386, @@ -70,6 +73,7 @@ enum rtc_type { }; static const struct i2c_device_id rs5c372_id[] = { + { "r2025sd", rtc_r2025sd }, { "rs5c372a", rtc_rs5c372a }, { "rs5c372b", rtc_rs5c372b }, { "rv5c386", rtc_rv5c386 }, @@ -89,6 +93,7 @@ struct rs5c372 { enum rtc_type type; unsigned time24:1; unsigned has_irq:1; + unsigned smbus:1; char buf[17]; char *regs; }; @@ -106,10 +111,25 @@ static int rs5c_get_regs(struct rs5c372 *rs5c) * * The first method doesn't work with the iop3xx adapter driver, on at * least 80219 chips; this works around that bug. + * + * The third method on the other hand doesn't work for the SMBus-only + * configurations, so we use the the first method there, stripping off + * the extra register in the process. */ - if ((i2c_transfer(client->adapter, msgs, 1)) != 1) { - dev_warn(&client->dev, "can't read registers\n"); - return -EIO; + if (rs5c->smbus) { + int addr = RS5C_ADDR(RS5C372_REG_SECS); + int size = sizeof(rs5c->buf) - 1; + + if (i2c_smbus_read_i2c_block_data(client, addr, size, + rs5c->buf + 1) != size) { + dev_warn(&client->dev, "can't read registers\n"); + return -EIO; + } + } else { + if ((i2c_transfer(client->adapter, msgs, 1)) != 1) { + dev_warn(&client->dev, "can't read registers\n"); + return -EIO; + } } dev_dbg(&client->dev, @@ -187,6 +207,7 @@ static int rs5c372_set_datetime(struct i2c_client *client, struct rtc_time *tm) { struct rs5c372 *rs5c = i2c_get_clientdata(client); unsigned char buf[8]; + int addr; dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d " "mday=%d, mon=%d, year=%d, wday=%d\n", @@ -194,16 +215,16 @@ static int rs5c372_set_datetime(struct i2c_client *client, struct rtc_time *tm) tm->tm_sec, tm->tm_min, tm->tm_hour, tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); - buf[0] = RS5C_ADDR(RS5C372_REG_SECS); - buf[1] = BIN2BCD(tm->tm_sec); - buf[2] = BIN2BCD(tm->tm_min); - buf[3] = rs5c_hr2reg(rs5c, tm->tm_hour); - buf[4] = BIN2BCD(tm->tm_wday); - buf[5] = BIN2BCD(tm->tm_mday); - buf[6] = BIN2BCD(tm->tm_mon + 1); - buf[7] = BIN2BCD(tm->tm_year - 100); + addr = RS5C_ADDR(RS5C372_REG_SECS); + buf[0] = BIN2BCD(tm->tm_sec); + buf[1] = BIN2BCD(tm->tm_min); + buf[2] = rs5c_hr2reg(rs5c, tm->tm_hour); + buf[3] = BIN2BCD(tm->tm_wday); + buf[4] = BIN2BCD(tm->tm_mday); + buf[5] = BIN2BCD(tm->tm_mon + 1); + buf[6] = BIN2BCD(tm->tm_year - 100); - if ((i2c_master_send(client, buf, 8)) != 8) { + if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) { dev_err(&client->dev, "%s: write error\n", __func__); return -EIO; } @@ -266,16 +287,16 @@ rs5c_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) { struct i2c_client *client = to_i2c_client(dev); struct rs5c372 *rs5c = i2c_get_clientdata(client); - unsigned char buf[2]; - int status; + unsigned char buf; + int status, addr; - buf[1] = rs5c->regs[RS5C_REG_CTRL1]; + buf = rs5c->regs[RS5C_REG_CTRL1]; switch (cmd) { case RTC_UIE_OFF: case RTC_UIE_ON: /* some 327a modes use a different IRQ pin for 1Hz irqs */ if (rs5c->type == rtc_rs5c372a - && (buf[1] & RS5C372A_CTRL1_SL1)) + && (buf & RS5C372A_CTRL1_SL1)) return -ENOIOCTLCMD; case RTC_AIE_OFF: case RTC_AIE_ON: @@ -293,28 +314,30 @@ rs5c_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) if (status < 0) return status; - buf[0] = RS5C_ADDR(RS5C_REG_CTRL1); + addr = RS5C_ADDR(RS5C_REG_CTRL1); switch (cmd) { case RTC_AIE_OFF: /* alarm off */ - buf[1] &= ~RS5C_CTRL1_AALE; + buf &= ~RS5C_CTRL1_AALE; break; case RTC_AIE_ON: /* alarm on */ - buf[1] |= RS5C_CTRL1_AALE; + buf |= RS5C_CTRL1_AALE; break; case RTC_UIE_OFF: /* update off */ - buf[1] &= ~RS5C_CTRL1_CT_MASK; + buf &= ~RS5C_CTRL1_CT_MASK; break; case RTC_UIE_ON: /* update on */ - buf[1] &= ~RS5C_CTRL1_CT_MASK; - buf[1] |= RS5C_CTRL1_CT4; + buf &= ~RS5C_CTRL1_CT_MASK; + buf |= RS5C_CTRL1_CT4; break; } - if ((i2c_master_send(client, buf, 2)) != 2) { + + if (i2c_smbus_write_byte_data(client, addr, buf) < 0) { printk(KERN_WARNING "%s: can't update alarm\n", rs5c->rtc->name); status = -EIO; } else - rs5c->regs[RS5C_REG_CTRL1] = buf[1]; + rs5c->regs[RS5C_REG_CTRL1] = buf; + return status; } @@ -364,8 +387,8 @@ static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t) { struct i2c_client *client = to_i2c_client(dev); struct rs5c372 *rs5c = i2c_get_clientdata(client); - int status; - unsigned char buf[4]; + int status, addr, i; + unsigned char buf[3]; /* only handle up to 24 hours in the future, like RTC_ALM_SET */ if (t->time.tm_mday != -1 @@ -380,33 +403,36 @@ static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t) if (status < 0) return status; if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) { - buf[0] = RS5C_ADDR(RS5C_REG_CTRL1); - buf[1] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE; - if (i2c_master_send(client, buf, 2) != 2) { + addr = RS5C_ADDR(RS5C_REG_CTRL1); + buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE; + if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) { pr_debug("%s: can't disable alarm\n", rs5c->rtc->name); return -EIO; } - rs5c->regs[RS5C_REG_CTRL1] = buf[1]; + rs5c->regs[RS5C_REG_CTRL1] = buf[0]; } /* set alarm */ - buf[0] = RS5C_ADDR(RS5C_REG_ALARM_A_MIN); - buf[1] = BIN2BCD(t->time.tm_min); - buf[2] = rs5c_hr2reg(rs5c, t->time.tm_hour); - buf[3] = 0x7f; /* any/all days */ - if ((i2c_master_send(client, buf, 4)) != 4) { - pr_debug("%s: can't set alarm time\n", rs5c->rtc->name); - return -EIO; + buf[0] = BIN2BCD(t->time.tm_min); + buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour); + buf[2] = 0x7f; /* any/all days */ + + for (i = 0; i < sizeof(buf); i++) { + addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i); + if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) { + pr_debug("%s: can't set alarm time\n", rs5c->rtc->name); + return -EIO; + } } /* ... and maybe enable its irq */ if (t->enabled) { - buf[0] = RS5C_ADDR(RS5C_REG_CTRL1); - buf[1] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE; - if ((i2c_master_send(client, buf, 2)) != 2) + addr = RS5C_ADDR(RS5C_REG_CTRL1); + buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE; + if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) printk(KERN_WARNING "%s: can't enable alarm\n", rs5c->rtc->name); - rs5c->regs[RS5C_REG_CTRL1] = buf[1]; + rs5c->regs[RS5C_REG_CTRL1] = buf[0]; } return 0; @@ -503,18 +529,81 @@ static void rs5c_sysfs_unregister(struct device *dev) static struct i2c_driver rs5c372_driver; +static int rs5c_oscillator_setup(struct rs5c372 *rs5c372) +{ + unsigned char buf[2]; + int addr, i, ret = 0; + + if (rs5c372->type == rtc_r2025sd) { + if (!(rs5c372->regs[RS5C_REG_CTRL2] & R2025_CTRL2_XST)) + return ret; + rs5c372->regs[RS5C_REG_CTRL2] &= ~R2025_CTRL2_XST; + } else { + if (!(rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP)) + return ret; + rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP; + } + + addr = RS5C_ADDR(RS5C_REG_CTRL1); + buf[0] = rs5c372->regs[RS5C_REG_CTRL1]; + buf[1] = rs5c372->regs[RS5C_REG_CTRL2]; + + /* use 24hr mode */ + switch (rs5c372->type) { + case rtc_rs5c372a: + case rtc_rs5c372b: + buf[1] |= RS5C372_CTRL2_24; + rs5c372->time24 = 1; + break; + case rtc_r2025sd: + case rtc_rv5c386: + case rtc_rv5c387a: + buf[0] |= RV5C387_CTRL1_24; + rs5c372->time24 = 1; + break; + default: + /* impossible */ + break; + } + + for (i = 0; i < sizeof(buf); i++) { + addr = RS5C_ADDR(RS5C_REG_CTRL1 + i); + ret = i2c_smbus_write_byte_data(rs5c372->client, addr, buf[i]); + if (unlikely(ret < 0)) + return ret; + } + + rs5c372->regs[RS5C_REG_CTRL1] = buf[0]; + rs5c372->regs[RS5C_REG_CTRL2] = buf[1]; + + return 0; +} + static int rs5c372_probe(struct i2c_client *client, const struct i2c_device_id *id) { int err = 0; + int smbus_mode = 0; struct rs5c372 *rs5c372; struct rtc_time tm; dev_dbg(&client->dev, "%s\n", __func__); - if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { - err = -ENODEV; - goto exit; + if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C | + I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) { + /* + * If we don't have any master mode adapter, try breaking + * it down in to the barest of capabilities. + */ + if (i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA | + I2C_FUNC_SMBUS_I2C_BLOCK)) + smbus_mode = 1; + else { + /* Still no good, give up */ + err = -ENODEV; + goto exit; + } } if (!(rs5c372 = kzalloc(sizeof(struct rs5c372), GFP_KERNEL))) { @@ -528,6 +617,7 @@ static int rs5c372_probe(struct i2c_client *client, /* we read registers 0x0f then 0x00-0x0f; skip the first one */ rs5c372->regs = &rs5c372->buf[1]; + rs5c372->smbus = smbus_mode; err = rs5c_get_regs(rs5c372); if (err < 0) @@ -543,6 +633,7 @@ static int rs5c372_probe(struct i2c_client *client, if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24) rs5c372->time24 = 1; break; + case rtc_r2025sd: case rtc_rv5c386: case rtc_rv5c387a: if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24) @@ -558,39 +649,14 @@ static int rs5c372_probe(struct i2c_client *client, /* if the oscillator lost power and no other software (like * the bootloader) set it up, do it here. + * + * The R2025S/D does this a little differently than the other + * parts, so we special case that.. */ - if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP) { - unsigned char buf[3]; - - rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP; - - buf[0] = RS5C_ADDR(RS5C_REG_CTRL1); - buf[1] = rs5c372->regs[RS5C_REG_CTRL1]; - buf[2] = rs5c372->regs[RS5C_REG_CTRL2]; - - /* use 24hr mode */ - switch (rs5c372->type) { - case rtc_rs5c372a: - case rtc_rs5c372b: - buf[2] |= RS5C372_CTRL2_24; - rs5c372->time24 = 1; - break; - case rtc_rv5c386: - case rtc_rv5c387a: - buf[1] |= RV5C387_CTRL1_24; - rs5c372->time24 = 1; - break; - default: - /* impossible */ - break; - } - - if ((i2c_master_send(client, buf, 3)) != 3) { - dev_err(&client->dev, "setup error\n"); - goto exit_kfree; - } - rs5c372->regs[RS5C_REG_CTRL1] = buf[1]; - rs5c372->regs[RS5C_REG_CTRL2] = buf[2]; + err = rs5c_oscillator_setup(rs5c372); + if (unlikely(err < 0)) { + dev_err(&client->dev, "setup error\n"); + goto exit_kfree; } if (rs5c372_get_datetime(client, &tm) < 0) @@ -598,6 +664,7 @@ static int rs5c372_probe(struct i2c_client *client, dev_info(&client->dev, "%s found, %s, driver version " DRV_VERSION "\n", ({ char *s; switch (rs5c372->type) { + case rtc_r2025sd: s = "r2025sd"; break; case rtc_rs5c372a: s = "rs5c372a"; break; case rtc_rs5c372b: s = "rs5c372b"; break; case rtc_rv5c386: s = "rv5c386"; break; @@ -667,7 +734,8 @@ module_exit(rs5c372_exit); MODULE_AUTHOR( "Pavel Mironchik <pmironchik@optifacio.net>, " - "Alessandro Zummo <a.zummo@towertech.it>"); + "Alessandro Zummo <a.zummo@towertech.it>, " + "Paul Mundt <lethal@linux-sh.org>"); MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver"); MODULE_LICENSE("GPL"); MODULE_VERSION(DRV_VERSION); diff --git a/drivers/rtc/rtc-sh.c b/drivers/rtc/rtc-sh.c index 1f88e9e914ec..fcead4c4cd1f 100644 --- a/drivers/rtc/rtc-sh.c +++ b/drivers/rtc/rtc-sh.c @@ -257,12 +257,6 @@ static inline void sh_rtc_setaie(struct device *dev, unsigned int enable) spin_unlock_irq(&rtc->lock); } -static void sh_rtc_release(struct device *dev) -{ - sh_rtc_setpie(dev, 0); - sh_rtc_setaie(dev, 0); -} - static int sh_rtc_proc(struct device *dev, struct seq_file *seq) { struct sh_rtc *rtc = dev_get_drvdata(dev); @@ -559,7 +553,6 @@ static int sh_rtc_irq_set_freq(struct device *dev, int freq) } static struct rtc_class_ops sh_rtc_ops = { - .release = sh_rtc_release, .ioctl = sh_rtc_ioctl, .read_time = sh_rtc_read_time, .set_time = sh_rtc_set_time, diff --git a/drivers/rtc/rtc-stk17ta8.c b/drivers/rtc/rtc-stk17ta8.c index 31d3c8c28588..9a7e920315fa 100644 --- a/drivers/rtc/rtc-stk17ta8.c +++ b/drivers/rtc/rtc-stk17ta8.c @@ -215,17 +215,6 @@ static irqreturn_t stk17ta8_rtc_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static void stk17ta8_rtc_release(struct device *dev) -{ - struct platform_device *pdev = to_platform_device(dev); - struct rtc_plat_data *pdata = platform_get_drvdata(pdev); - - if (pdata->irq >= 0) { - pdata->irqen = 0; - stk17ta8_rtc_update_alarm(pdata); - } -} - static int stk17ta8_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) { @@ -254,7 +243,6 @@ static const struct rtc_class_ops stk17ta8_rtc_ops = { .set_time = stk17ta8_rtc_set_time, .read_alarm = stk17ta8_rtc_read_alarm, .set_alarm = stk17ta8_rtc_set_alarm, - .release = stk17ta8_rtc_release, .ioctl = stk17ta8_rtc_ioctl, }; diff --git a/drivers/s390/net/ctcm_mpc.c b/drivers/s390/net/ctcm_mpc.c index cbe470493bf0..19f5d5ed85e0 100644 --- a/drivers/s390/net/ctcm_mpc.c +++ b/drivers/s390/net/ctcm_mpc.c @@ -1673,7 +1673,7 @@ static int mpc_validate_xid(struct mpcg_info *mpcginfo) done: if (rc) { - ctcm_pr_info("ctcmpc : %s() failed\n", __FUNCTION__); + ctcm_pr_info("ctcmpc : %s() failed\n", __func__); priv->xid->xid2_flag2 = 0x40; grp->saved_xid2->xid2_flag2 = 0x40; } diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c index d3ca7d32abe0..1528de23a650 100644 --- a/drivers/serial/8250.c +++ b/drivers/serial/8250.c @@ -2223,9 +2223,9 @@ serial8250_set_termios(struct uart_port *port, struct ktermios *termios, serial_outp(up, UART_EFR, efr); } -#ifdef CONFIG_ARCH_OMAP15XX +#ifdef CONFIG_ARCH_OMAP /* Workaround to enable 115200 baud on OMAP1510 internal ports */ - if (cpu_is_omap1510() && is_omap_port((unsigned int)up->port.membase)) { + if (cpu_is_omap1510() && is_omap_port(up)) { if (baud == 115200) { quot = 1; serial_out(up, UART_OMAP_OSC_12M_SEL, 1); @@ -2278,18 +2278,27 @@ serial8250_pm(struct uart_port *port, unsigned int state, p->pm(port, state, oldstate); } +static unsigned int serial8250_port_size(struct uart_8250_port *pt) +{ + if (pt->port.iotype == UPIO_AU) + return 0x100000; +#ifdef CONFIG_ARCH_OMAP + if (is_omap_port(pt)) + return 0x16 << pt->port.regshift; +#endif + return 8 << pt->port.regshift; +} + /* * Resource handling. */ static int serial8250_request_std_resource(struct uart_8250_port *up) { - unsigned int size = 8 << up->port.regshift; + unsigned int size = serial8250_port_size(up); int ret = 0; switch (up->port.iotype) { case UPIO_AU: - size = 0x100000; - /* fall thru */ case UPIO_TSI: case UPIO_MEM32: case UPIO_MEM: @@ -2323,12 +2332,10 @@ static int serial8250_request_std_resource(struct uart_8250_port *up) static void serial8250_release_std_resource(struct uart_8250_port *up) { - unsigned int size = 8 << up->port.regshift; + unsigned int size = serial8250_port_size(up); switch (up->port.iotype) { case UPIO_AU: - size = 0x100000; - /* fall thru */ case UPIO_TSI: case UPIO_MEM32: case UPIO_MEM: diff --git a/drivers/serial/s3c2400.c b/drivers/serial/s3c2400.c index c8b4266ac35f..4873f2978bd2 100644 --- a/drivers/serial/s3c2400.c +++ b/drivers/serial/s3c2400.c @@ -19,7 +19,7 @@ #include <mach/hardware.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include "samsung.h" diff --git a/drivers/serial/s3c2410.c b/drivers/serial/s3c2410.c index 40a2531b5541..87c182ef71b8 100644 --- a/drivers/serial/s3c2410.c +++ b/drivers/serial/s3c2410.c @@ -21,7 +21,7 @@ #include <asm/irq.h> #include <mach/hardware.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include "samsung.h" diff --git a/drivers/serial/s3c2412.c b/drivers/serial/s3c2412.c index d0170319c729..fd017b375568 100644 --- a/drivers/serial/s3c2412.c +++ b/drivers/serial/s3c2412.c @@ -21,7 +21,7 @@ #include <asm/irq.h> #include <mach/hardware.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include "samsung.h" diff --git a/drivers/serial/s3c2440.c b/drivers/serial/s3c2440.c index d4a2b17b2498..317d239ab740 100644 --- a/drivers/serial/s3c2440.c +++ b/drivers/serial/s3c2440.c @@ -21,7 +21,7 @@ #include <asm/irq.h> #include <mach/hardware.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include "samsung.h" diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c index 5a88b3f9fe9b..1e219d3d0352 100644 --- a/drivers/serial/samsung.c +++ b/drivers/serial/samsung.c @@ -47,7 +47,7 @@ #include <mach/hardware.h> -#include <asm/plat-s3c/regs-serial.h> +#include <plat/regs-serial.h> #include <mach/regs-gpio.h> #include "samsung.h" diff --git a/drivers/spi/mpc52xx_psc_spi.c b/drivers/spi/mpc52xx_psc_spi.c index cdb3d3191719..0debe11b67b4 100644 --- a/drivers/spi/mpc52xx_psc_spi.c +++ b/drivers/spi/mpc52xx_psc_spi.c @@ -15,13 +15,7 @@ #include <linux/init.h> #include <linux/errno.h> #include <linux/interrupt.h> - -#if defined(CONFIG_PPC_MERGE) #include <linux/of_platform.h> -#else -#include <linux/platform_device.h> -#endif - #include <linux/workqueue.h> #include <linux/completion.h> #include <linux/io.h> @@ -471,53 +465,6 @@ static int __exit mpc52xx_psc_spi_do_remove(struct device *dev) return 0; } -#if !defined(CONFIG_PPC_MERGE) -static int __init mpc52xx_psc_spi_probe(struct platform_device *dev) -{ - switch(dev->id) { - case 1: - case 2: - case 3: - case 6: - return mpc52xx_psc_spi_do_probe(&dev->dev, - MPC52xx_PA(MPC52xx_PSCx_OFFSET(dev->id)), - MPC52xx_PSC_SIZE, platform_get_irq(dev, 0), dev->id); - default: - return -EINVAL; - } -} - -static int __exit mpc52xx_psc_spi_remove(struct platform_device *dev) -{ - return mpc52xx_psc_spi_do_remove(&dev->dev); -} - -/* work with hotplug and coldplug */ -MODULE_ALIAS("platform:mpc52xx-psc-spi"); - -static struct platform_driver mpc52xx_psc_spi_platform_driver = { - .remove = __exit_p(mpc52xx_psc_spi_remove), - .driver = { - .name = "mpc52xx-psc-spi", - .owner = THIS_MODULE, - }, -}; - -static int __init mpc52xx_psc_spi_init(void) -{ - return platform_driver_probe(&mpc52xx_psc_spi_platform_driver, - mpc52xx_psc_spi_probe); -} -module_init(mpc52xx_psc_spi_init); - -static void __exit mpc52xx_psc_spi_exit(void) -{ - platform_driver_unregister(&mpc52xx_psc_spi_platform_driver); -} -module_exit(mpc52xx_psc_spi_exit); - -#else /* defined(CONFIG_PPC_MERGE) */ - static int __init mpc52xx_psc_spi_of_probe(struct of_device *op, const struct of_device_id *match) { @@ -586,8 +533,6 @@ static void __exit mpc52xx_psc_spi_exit(void) } module_exit(mpc52xx_psc_spi_exit); -#endif /* defined(CONFIG_PPC_MERGE) */ - MODULE_AUTHOR("Dragos Carp"); MODULE_DESCRIPTION("MPC52xx PSC SPI Driver"); MODULE_LICENSE("GPL"); diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c index 9d2186fd74aa..454a2712e629 100644 --- a/drivers/spi/omap2_mcspi.c +++ b/drivers/spi/omap2_mcspi.c @@ -119,12 +119,14 @@ struct omap2_mcspi { struct clk *fck; /* Virtual base address of the controller */ void __iomem *base; + unsigned long phys; /* SPI1 has 4 channels, while SPI2 has 2 */ struct omap2_mcspi_dma *dma_channels; }; struct omap2_mcspi_cs { void __iomem *base; + unsigned long phys; int word_len; }; @@ -233,7 +235,7 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer) c = count; word_len = cs->word_len; - base = (unsigned long) io_v2p(cs->base); + base = cs->phys; tx_reg = base + OMAP2_MCSPI_TX0; rx_reg = base + OMAP2_MCSPI_RX0; rx = xfer->rx_buf; @@ -633,6 +635,7 @@ static int omap2_mcspi_setup(struct spi_device *spi) if (!cs) return -ENOMEM; cs->base = mcspi->base + spi->chip_select * 0x14; + cs->phys = mcspi->phys + spi->chip_select * 0x14; spi->controller_state = cs; } @@ -1005,7 +1008,13 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev) goto err1; } - mcspi->base = (void __iomem *) io_p2v(r->start); + mcspi->phys = r->start; + mcspi->base = ioremap(r->start, r->end - r->start + 1); + if (!mcspi->base) { + dev_dbg(&pdev->dev, "can't ioremap MCSPI\n"); + status = -ENOMEM; + goto err1aa; + } INIT_WORK(&mcspi->work, omap2_mcspi_work); @@ -1055,6 +1064,8 @@ err3: err2: clk_put(mcspi->ick); err1a: + iounmap(mcspi->base); +err1aa: release_mem_region(r->start, (r->end - r->start) + 1); err1: spi_master_put(master); @@ -1067,6 +1078,7 @@ static int __exit omap2_mcspi_remove(struct platform_device *pdev) struct omap2_mcspi *mcspi; struct omap2_mcspi_dma *dma_channels; struct resource *r; + void __iomem *base; master = dev_get_drvdata(&pdev->dev); mcspi = spi_master_get_devdata(master); @@ -1078,7 +1090,9 @@ static int __exit omap2_mcspi_remove(struct platform_device *pdev) r = platform_get_resource(pdev, IORESOURCE_MEM, 0); release_mem_region(r->start, (r->end - r->start) + 1); + base = mcspi->base; spi_unregister_master(master); + iounmap(base); kfree(dma_channels); return 0; diff --git a/drivers/spi/omap_uwire.c b/drivers/spi/omap_uwire.c index 5515eb97d7c5..bab6ff061e91 100644 --- a/drivers/spi/omap_uwire.c +++ b/drivers/spi/omap_uwire.c @@ -59,7 +59,6 @@ * and irqs should show there too... */ #define UWIRE_BASE_PHYS 0xFFFB3000 -#define UWIRE_BASE ((void *__iomem)IO_ADDRESS(UWIRE_BASE_PHYS)) /* uWire Registers: */ #define UWIRE_IO_SIZE 0x20 @@ -103,16 +102,21 @@ struct uwire_state { }; /* REVISIT compile time constant for idx_shift? */ +/* + * Or, put it in a structure which is used throughout the driver; + * that avoids having to issue two loads for each bit of static data. + */ static unsigned int uwire_idx_shift; +static void __iomem *uwire_base; static inline void uwire_write_reg(int idx, u16 val) { - __raw_writew(val, UWIRE_BASE + (idx << uwire_idx_shift)); + __raw_writew(val, uwire_base + (idx << uwire_idx_shift)); } static inline u16 uwire_read_reg(int idx) { - return __raw_readw(UWIRE_BASE + (idx << uwire_idx_shift)); + return __raw_readw(uwire_base + (idx << uwire_idx_shift)); } static inline void omap_uwire_configure_mode(u8 cs, unsigned long flags) @@ -492,6 +496,14 @@ static int __init uwire_probe(struct platform_device *pdev) return -ENODEV; uwire = spi_master_get_devdata(master); + + uwire_base = ioremap(UWIRE_BASE_PHYS, UWIRE_IO_SIZE); + if (!uwire_base) { + dev_dbg(&pdev->dev, "can't ioremap UWIRE\n"); + spi_master_put(master); + return -ENOMEM; + } + dev_set_drvdata(&pdev->dev, uwire); uwire->ck = clk_get(&pdev->dev, "armxor_ck"); @@ -520,8 +532,10 @@ static int __init uwire_probe(struct platform_device *pdev) uwire->bitbang.txrx_bufs = uwire_txrx; status = spi_bitbang_start(&uwire->bitbang); - if (status < 0) + if (status < 0) { uwire_off(uwire); + iounmap(uwire_base); + } return status; } @@ -534,6 +548,7 @@ static int __exit uwire_remove(struct platform_device *pdev) status = spi_bitbang_stop(&uwire->bitbang); uwire_off(uwire); + iounmap(uwire_base); return status; } diff --git a/drivers/spi/orion_spi.c b/drivers/spi/orion_spi.c index b872bfaf4bd2..014becb7d530 100644 --- a/drivers/spi/orion_spi.c +++ b/drivers/spi/orion_spi.c @@ -364,6 +364,11 @@ static int orion_spi_setup(struct spi_device *spi) return -EINVAL; } + /* Fix ac timing if required. */ + if (orion_spi->spi_info->enable_clock_fix) + orion_spi_setbits(orion_spi, ORION_SPI_IF_CONFIG_REG, + (1 << 14)); + if (spi->bits_per_word == 0) spi->bits_per_word = 8; diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c index d47d3636227f..dae87b1a4c6e 100644 --- a/drivers/spi/pxa2xx_spi.c +++ b/drivers/spi/pxa2xx_spi.c @@ -47,6 +47,10 @@ MODULE_ALIAS("platform:pxa2xx-spi"); #define MAX_BUSES 3 +#define RX_THRESH_DFLT 8 +#define TX_THRESH_DFLT 8 +#define TIMOUT_DFLT 1000 + #define DMA_INT_MASK (DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERR) #define RESET_DMA_CHANNEL (DCSR_NODESC | DMA_INT_MASK) #define IS_DMA_ALIGNED(x) ((((u32)(x)) & 0x07) == 0) @@ -1171,6 +1175,8 @@ static int setup(struct spi_device *spi) struct driver_data *drv_data = spi_master_get_devdata(spi->master); struct ssp_device *ssp = drv_data->ssp; unsigned int clk_div; + uint tx_thres = TX_THRESH_DFLT; + uint rx_thres = RX_THRESH_DFLT; if (!spi->bits_per_word) spi->bits_per_word = 8; @@ -1209,8 +1215,7 @@ static int setup(struct spi_device *spi) chip->cs_control = null_cs_control; chip->enable_dma = 0; - chip->timeout = 1000; - chip->threshold = SSCR1_RxTresh(1) | SSCR1_TxTresh(1); + chip->timeout = TIMOUT_DFLT; chip->dma_burst_size = drv_data->master_info->enable_dma ? DCMD_BURST8 : 0; } @@ -1224,22 +1229,21 @@ static int setup(struct spi_device *spi) if (chip_info) { if (chip_info->cs_control) chip->cs_control = chip_info->cs_control; - - chip->timeout = chip_info->timeout; - - chip->threshold = (SSCR1_RxTresh(chip_info->rx_threshold) & - SSCR1_RFT) | - (SSCR1_TxTresh(chip_info->tx_threshold) & - SSCR1_TFT); - - chip->enable_dma = chip_info->dma_burst_size != 0 - && drv_data->master_info->enable_dma; + if (chip_info->timeout) + chip->timeout = chip_info->timeout; + if (chip_info->tx_threshold) + tx_thres = chip_info->tx_threshold; + if (chip_info->rx_threshold) + rx_thres = chip_info->rx_threshold; + chip->enable_dma = drv_data->master_info->enable_dma; chip->dma_threshold = 0; - if (chip_info->enable_loopback) chip->cr1 = SSCR1_LBM; } + chip->threshold = (SSCR1_RxTresh(rx_thres) & SSCR1_RFT) | + (SSCR1_TxTresh(tx_thres) & SSCR1_TFT); + /* set dma burst and threshold outside of chip_info path so that if * chip_info goes away after setting chip->enable_dma, the * burst and threshold can still respond to changes in bits_per_word */ @@ -1268,17 +1272,19 @@ static int setup(struct spi_device *spi) /* NOTE: PXA25x_SSP _could_ use external clocking ... */ if (drv_data->ssp_type != PXA25x_SSP) - dev_dbg(&spi->dev, "%d bits/word, %ld Hz, mode %d\n", + dev_dbg(&spi->dev, "%d bits/word, %ld Hz, mode %d, %s\n", spi->bits_per_word, clk_get_rate(ssp->clk) / (1 + ((chip->cr0 & SSCR0_SCR) >> 8)), - spi->mode & 0x3); + spi->mode & 0x3, + chip->enable_dma ? "DMA" : "PIO"); else - dev_dbg(&spi->dev, "%d bits/word, %ld Hz, mode %d\n", + dev_dbg(&spi->dev, "%d bits/word, %ld Hz, mode %d, %s\n", spi->bits_per_word, - clk_get_rate(ssp->clk) + clk_get_rate(ssp->clk) / 2 / (1 + ((chip->cr0 & SSCR0_SCR) >> 8)), - spi->mode & 0x3); + spi->mode & 0x3, + chip->enable_dma ? "DMA" : "PIO"); if (spi->bits_per_word <= 8) { chip->n_bytes = 1; @@ -1407,9 +1413,9 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct pxa2xx_spi_master *platform_info; struct spi_master *master; - struct driver_data *drv_data = NULL; + struct driver_data *drv_data; struct ssp_device *ssp; - int status = 0; + int status; platform_info = dev->platform_data; @@ -1422,7 +1428,7 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev) /* Allocate master with space for drv_data and null dma buffer */ master = spi_alloc_master(dev, sizeof(struct driver_data) + 16); if (!master) { - dev_err(&pdev->dev, "can not alloc spi_master\n"); + dev_err(&pdev->dev, "cannot alloc spi_master\n"); ssp_free(ssp); return -ENOMEM; } @@ -1458,7 +1464,7 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev) status = request_irq(ssp->irq, ssp_int, 0, dev->bus_id, drv_data); if (status < 0) { - dev_err(&pdev->dev, "can not get IRQ\n"); + dev_err(&pdev->dev, "cannot get IRQ %d\n", ssp->irq); goto out_error_master_alloc; } @@ -1498,7 +1504,9 @@ static int __init pxa2xx_spi_probe(struct platform_device *pdev) /* Load default SSP configuration */ write_SSCR0(0, drv_data->ioaddr); - write_SSCR1(SSCR1_RxTresh(4) | SSCR1_TxTresh(12), drv_data->ioaddr); + write_SSCR1(SSCR1_RxTresh(RX_THRESH_DFLT) | + SSCR1_TxTresh(TX_THRESH_DFLT), + drv_data->ioaddr); write_SSCR0(SSCR0_SerClkDiv(2) | SSCR0_Motorola | SSCR0_DataSize(8), diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 75e86865234c..3734dc9708e1 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -660,7 +660,7 @@ int spi_write_then_read(struct spi_device *spi, int status; struct spi_message message; - struct spi_transfer x[2]; + struct spi_transfer x; u8 *local_buf; /* Use preallocated DMA-safe buffer. We can't avoid copying here, @@ -671,15 +671,9 @@ int spi_write_then_read(struct spi_device *spi, return -EINVAL; spi_message_init(&message); - memset(x, 0, sizeof x); - if (n_tx) { - x[0].len = n_tx; - spi_message_add_tail(&x[0], &message); - } - if (n_rx) { - x[1].len = n_rx; - spi_message_add_tail(&x[1], &message); - } + memset(&x, 0, sizeof x); + x.len = n_tx + n_rx; + spi_message_add_tail(&x, &message); /* ... unless someone else is using the pre-allocated buffer */ if (!mutex_trylock(&lock)) { @@ -690,15 +684,15 @@ int spi_write_then_read(struct spi_device *spi, local_buf = buf; memcpy(local_buf, txbuf, n_tx); - x[0].tx_buf = local_buf; - x[1].rx_buf = local_buf + n_tx; + x.tx_buf = local_buf; + x.rx_buf = local_buf; /* do the i/o */ status = spi_sync(spi, &message); if (status == 0) - memcpy(rxbuf, x[1].rx_buf, n_rx); + memcpy(rxbuf, x.rx_buf + n_tx, n_rx); - if (x[0].tx_buf == buf) + if (x.tx_buf == buf) mutex_unlock(&lock); else kfree(local_buf); @@ -744,5 +738,5 @@ err0: * driver registration) _could_ be dynamically linked (modular) ... costs * include needing to have boardinfo data structures be much more public. */ -subsys_initcall(spi_init); +postcore_initcall(spi_init); diff --git a/drivers/spi/spi_s3c24xx.c b/drivers/spi/spi_s3c24xx.c index 3eb414b84a9d..c252cbac00f1 100644 --- a/drivers/spi/spi_s3c24xx.c +++ b/drivers/spi/spi_s3c24xx.c @@ -247,6 +247,9 @@ static void s3c24xx_spi_initialsetup(struct s3c24xx_spi *hw) writeb(0xff, hw->regs + S3C2410_SPPRE); writeb(SPPIN_DEFAULT, hw->regs + S3C2410_SPPIN); writeb(SPCON_DEFAULT, hw->regs + S3C2410_SPCON); + + if (hw->pdata && hw->pdata->gpio_setup) + hw->pdata->gpio_setup(hw->pdata, 1); } static int __init s3c24xx_spi_probe(struct platform_device *pdev) @@ -412,6 +415,9 @@ static int s3c24xx_spi_suspend(struct platform_device *pdev, pm_message_t msg) { struct s3c24xx_spi *hw = platform_get_drvdata(pdev); + if (hw->pdata && hw->pdata->gpio_setup) + hw->pdata->gpio_setup(hw->pdata, 0); + clk_disable(hw->clk); return 0; } diff --git a/drivers/telephony/ixj.c b/drivers/telephony/ixj.c index ec7aeb502d15..41b6530b8f25 100644 --- a/drivers/telephony/ixj.c +++ b/drivers/telephony/ixj.c @@ -42,8 +42,6 @@ ***************************************************************************/ /* - * $Log: ixj.c,v $ - * * Revision 4.8 2003/07/09 19:39:00 Daniele Bellucci * Audit some copy_*_user and minor cleanup. * diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c index 95b3ec89c126..522185629624 100644 --- a/drivers/usb/host/ohci-omap.c +++ b/drivers/usb/host/ohci-omap.c @@ -344,7 +344,12 @@ static int usb_hcd_omap_probe (const struct hc_driver *driver, goto err1; } - hcd->regs = (void __iomem *) (int) IO_ADDRESS(hcd->rsrc_start); + hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); + if (!hcd->regs) { + dev_err(&pdev->dev, "can't ioremap OHCI HCD\n"); + retval = -ENOMEM; + goto err2; + } ohci = hcd_to_ohci(hcd); ohci_hcd_init(ohci); @@ -355,11 +360,11 @@ static int usb_hcd_omap_probe (const struct hc_driver *driver, irq = platform_get_irq(pdev, 0); if (irq < 0) { retval = -ENXIO; - goto err2; + goto err3; } retval = usb_add_hcd(hcd, irq, IRQF_DISABLED); if (retval) - goto err2; + goto err3; host_initialized = 1; @@ -367,6 +372,8 @@ static int usb_hcd_omap_probe (const struct hc_driver *driver, omap_ohci_clock_power(0); return 0; +err3: + iounmap(hcd->regs); err2: release_mem_region(hcd->rsrc_start, hcd->rsrc_len); err1: @@ -401,6 +408,7 @@ usb_hcd_omap_remove (struct usb_hcd *hcd, struct platform_device *pdev) } if (machine_is_omap_osk()) omap_free_gpio(9); + iounmap(hcd->regs); release_mem_region(hcd->rsrc_start, hcd->rsrc_len); usb_put_hcd(hcd); clk_put(usb_dc_ck); diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index f79c2040758b..0f13448c6f79 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -76,6 +76,14 @@ config FB_DDC select I2C default n +config FB_BOOT_VESA_SUPPORT + bool + depends on FB + default n + ---help--- + If true, at least one selected framebuffer driver can take advantage + of VESA video modes set at an early boot stage via the vga= parameter. + config FB_CFB_FILLRECT tristate depends on FB @@ -254,16 +262,24 @@ config FB_PM2 select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT help - This is the frame buffer device driver for the Permedia2 AGP frame - buffer card from ASK, aka `Graphic Blaster Exxtreme'. There is a - product page at - <http://www.ask.com.hk/product/Permedia%202/permedia2.htm>. + This is the frame buffer device driver for cards based on + the 3D Labs Permedia, Permedia 2 and Permedia 2V chips. + The driver was tested on the following cards: + Diamond FireGL 1000 PRO AGP + ELSA Gloria Synergy PCI + Appian Jeronimo PRO (both heads) PCI + 3DLabs Oxygen ACX aka EONtronics Picasso P2 PCI + Techsource Raptor GFX-8P (aka Sun PGX-32) on SPARC + ASK Graphic Blaster Exxtreme AGP + + To compile this driver as a module, choose M here: the + module will be called pm2fb. config FB_PM2_FIFO_DISCONNECT bool "enable FIFO disconnect feature" depends on FB_PM2 && PCI help - Support the Permedia2 FIFO disconnect feature (see CONFIG_FB_PM2). + Support the Permedia2 FIFO disconnect feature. config FB_ARMCLCD tristate "ARM PrimeCell PL110 support" @@ -673,6 +689,7 @@ config FB_VESA select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT + select FB_BOOT_VESA_SUPPORT help This is the frame buffer device driver for generic VESA 2.0 compliant graphic cards. The older VESA 1.2 cards are not supported. @@ -681,23 +698,14 @@ config FB_VESA config FB_EFI bool "EFI-based Framebuffer Support" - depends on (FB = y) && X86 - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT - help - This is the EFI frame buffer device driver. If the firmware on - your platform is UEFI2.0, select Y to add support for - Graphics Output Protocol for early console messages to appear. - -config FB_IMAC - bool "Intel-based Macintosh Framebuffer Support" depends on (FB = y) && X86 && EFI select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT help - This is the frame buffer device driver for the Intel-based Macintosh + This is the EFI frame buffer device driver. If the firmware on + your platform is EFI 1.10 or UEFI 2.0, select Y to add support for + using the EFI framebuffer as your console. config FB_N411 tristate "N411 Apollo/Hecuba devkit support" @@ -1118,6 +1126,7 @@ config FB_INTEL select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT + select FB_BOOT_VESA_SUPPORT help This driver supports the on-board graphics built in to the Intel 830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/965G/965GM chipsets. @@ -1470,6 +1479,7 @@ config FB_SIS select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT + select FB_BOOT_VESA_SUPPORT help This is the frame buffer device driver for the SiS 300, 315, 330 and 340 series as well as XGI V3XT, V5, V8, Z7 graphics chipsets. @@ -1492,6 +1502,24 @@ config FB_SIS_315 (315/H/PRO, 55x, 650, 651, 740, 330, 661, 741, 760, 761) as well as XGI V3XT, V5, V8 and Z7. +config FB_VIA + tristate "VIA UniChrome (Pro) and Chrome9 display support" + depends on FB && PCI + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT + select FB_SOFT_CURSOR + select I2C_ALGOBIT + select I2C + help + This is the frame buffer device driver for Graphics chips of VIA + UniChrome (Pro) Family (CLE266,PM800/CN400,P4M800CE/P4M800Pro/ + CN700/VN800,CX700/VX700,P4M890) and Chrome9 Family (K8M890,CN896 + /P4M900,VX800) + Say Y if you have a VIA UniChrome graphics board. + + To compile this driver as a module, choose M here: the + module will be called viafb. config FB_NEOMAGIC tristate "NeoMagic display support" depends on FB && PCI @@ -1521,25 +1549,25 @@ config FB_KYRO module will be called kyrofb. config FB_3DFX - tristate "3Dfx Banshee/Voodoo3 display support" + tristate "3Dfx Banshee/Voodoo3/Voodoo5 display support" depends on FB && PCI select FB_CFB_IMAGEBLIT select FB_CFB_FILLRECT select FB_CFB_COPYAREA help - This driver supports graphics boards with the 3Dfx Banshee/Voodoo3 - chips. Say Y if you have such a graphics board. + This driver supports graphics boards with the 3Dfx Banshee, + Voodoo3 or VSA-100 (aka Voodoo4/5) chips. Say Y if you have + such a graphics board. To compile this driver as a module, choose M here: the module will be called tdfxfb. config FB_3DFX_ACCEL - bool "3Dfx Banshee/Voodoo3 Acceleration functions (EXPERIMENTAL)" + bool "3Dfx Acceleration functions (EXPERIMENTAL)" depends on FB_3DFX && EXPERIMENTAL ---help--- - This will compile the 3Dfx Banshee/Voodoo3 frame buffer device - with acceleration functions. - + This will compile the 3Dfx Banshee/Voodoo3/VSA-100 frame buffer + device driver with acceleration functions. config FB_VOODOO1 tristate "3Dfx Voodoo Graphics (sst1) support" @@ -1604,17 +1632,16 @@ config FB_TRIDENT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT ---help--- - This driver is supposed to support graphics boards with the - Trident CyberXXXX/Image/CyberBlade chips mostly found in laptops + This is the frame buffer device driver for Trident PCI/AGP chipsets. + Supported chipset families are TGUI 9440/96XX, 3DImage, Blade3D + and Blade XP. + There are also integrated versions of these chips called CyberXXXX, + CyberImage or CyberBlade. These chips are mostly found in laptops but also on some motherboards. For more information, read <file:Documentation/fb/tridentfb.txt> - Cyberblade/i1 support will be removed soon, use the cyblafb driver - instead. - Say Y if you have such a graphics board. - To compile this driver as a module, choose M here: the module will be called tridentfb. @@ -1869,6 +1896,28 @@ config FB_SH_MOBILE_LCDC ---help--- Frame buffer driver for the on-chip SH-Mobile LCD controller. +config FB_TMIO + tristate "Toshiba Mobile IO FrameBuffer support" + depends on FB && MFD_CORE + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT + ---help--- + Frame buffer driver for the Toshiba Mobile IO integrated as found + on the Sharp SL-6000 series + + This driver is also available as a module ( = code which can be + inserted and removed from the running kernel whenever you want). The + module will be called tmiofb. If you want to compile it as a module, + say M here and read <file:Documentation/kbuild/modules.txt>. + + If unsure, say N. + +config FB_TMIO_ACCELL + bool "tmiofb acceleration" + depends on FB_TMIO + default y + config FB_S3C2410 tristate "S3C2410 LCD framebuffer support" depends on FB && ARCH_S3C2410 diff --git a/drivers/video/Makefile b/drivers/video/Makefile index ad0330bf9be3..248bddc8d0b0 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -42,6 +42,7 @@ obj-$(CONFIG_FB_ATY) += aty/ macmodes.o obj-$(CONFIG_FB_ATY128) += aty/ macmodes.o obj-$(CONFIG_FB_RADEON) += aty/ obj-$(CONFIG_FB_SIS) += sis/ +obj-$(CONFIG_FB_VIA) += via/ obj-$(CONFIG_FB_KYRO) += kyro/ obj-$(CONFIG_FB_SAVAGE) += savage/ obj-$(CONFIG_FB_GEODE) += geode/ @@ -97,6 +98,7 @@ obj-$(CONFIG_FB_CIRRUS) += cirrusfb.o obj-$(CONFIG_FB_ASILIANT) += asiliantfb.o obj-$(CONFIG_FB_PXA) += pxafb.o obj-$(CONFIG_FB_W100) += w100fb.o +obj-$(CONFIG_FB_TMIO) += tmiofb.o obj-$(CONFIG_FB_AU1100) += au1100fb.o obj-$(CONFIG_FB_AU1200) += au1200fb.o obj-$(CONFIG_FB_PMAG_AA) += pmag-aa-fb.o @@ -124,7 +126,6 @@ obj-$(CONFIG_FB_CARMINE) += carminefb.o # Platform or fallback drivers go here obj-$(CONFIG_FB_UVESA) += uvesafb.o obj-$(CONFIG_FB_VESA) += vesafb.o -obj-$(CONFIG_FB_IMAC) += imacfb.o obj-$(CONFIG_FB_EFI) += efifb.o obj-$(CONFIG_FB_VGA16) += vga16fb.o obj-$(CONFIG_FB_OF) += offb.o diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c index d38fd5217422..f8d0a57a07cb 100644 --- a/drivers/video/atmel_lcdfb.c +++ b/drivers/video/atmel_lcdfb.c @@ -372,6 +372,13 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var, var->transp.offset = var->transp.length = 0; var->xoffset = var->yoffset = 0; + if (info->fix.smem_len) { + unsigned int smem_len = (var->xres_virtual * var->yres_virtual + * ((var->bits_per_pixel + 7) / 8)); + if (smem_len > info->fix.smem_len) + return -EINVAL; + } + /* Saturate vertical and horizontal timings at maximum values */ var->vsync_len = min_t(u32, var->vsync_len, (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1); diff --git a/drivers/video/aty/radeon_accel.c b/drivers/video/aty/radeon_accel.c index aa95f8350242..8718f7349d6b 100644 --- a/drivers/video/aty/radeon_accel.c +++ b/drivers/video/aty/radeon_accel.c @@ -5,61 +5,61 @@ * --dte */ -static void radeon_fixup_offset(struct radeonfb_info *rinfo) +#define FLUSH_CACHE_WORKAROUND 1 + +void radeon_fifo_update_and_wait(struct radeonfb_info *rinfo, int entries) { - u32 local_base; - - /* *** Ugly workaround *** */ - /* - * On some platforms, the video memory is mapped at 0 in radeon chip space - * (like PPCs) by the firmware. X will always move it up so that it's seen - * by the chip to be at the same address as the PCI BAR. - * That means that when switching back from X, there is a mismatch between - * the offsets programmed into the engine. This means that potentially, - * accel operations done before radeonfb has a chance to re-init the engine - * will have incorrect offsets, and potentially trash system memory ! - * - * The correct fix is for fbcon to never call any accel op before the engine - * has properly been re-initialized (by a call to set_var), but this is a - * complex fix. This workaround in the meantime, called before every accel - * operation, makes sure the offsets are in sync. - */ + int i; - radeon_fifo_wait (1); - local_base = INREG(MC_FB_LOCATION) << 16; - if (local_base == rinfo->fb_local_base) - return; + for (i=0; i<2000000; i++) { + rinfo->fifo_free = INREG(RBBM_STATUS) & 0x7f; + if (rinfo->fifo_free >= entries) + return; + udelay(10); + } + printk(KERN_ERR "radeonfb: FIFO Timeout !\n"); + /* XXX Todo: attempt to reset the engine */ +} - rinfo->fb_local_base = local_base; +static inline void radeon_fifo_wait(struct radeonfb_info *rinfo, int entries) +{ + if (entries <= rinfo->fifo_free) + rinfo->fifo_free -= entries; + else + radeon_fifo_update_and_wait(rinfo, entries); +} - radeon_fifo_wait (3); - OUTREG(DEFAULT_PITCH_OFFSET, (rinfo->pitch << 0x16) | - (rinfo->fb_local_base >> 10)); - OUTREG(DST_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10)); - OUTREG(SRC_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10)); +static inline void radeonfb_set_creg(struct radeonfb_info *rinfo, u32 reg, + u32 *cache, u32 new_val) +{ + if (new_val == *cache) + return; + *cache = new_val; + radeon_fifo_wait(rinfo, 1); + OUTREG(reg, new_val); } static void radeonfb_prim_fillrect(struct radeonfb_info *rinfo, const struct fb_fillrect *region) { - radeon_fifo_wait(4); - - OUTREG(DP_GUI_MASTER_CNTL, - rinfo->dp_gui_master_cntl /* contains, like GMC_DST_32BPP */ - | GMC_BRUSH_SOLID_COLOR - | ROP3_P); - if (radeon_get_dstbpp(rinfo->depth) != DST_8BPP) - OUTREG(DP_BRUSH_FRGD_CLR, rinfo->pseudo_palette[region->color]); - else - OUTREG(DP_BRUSH_FRGD_CLR, region->color); - OUTREG(DP_WRITE_MSK, 0xffffffff); - OUTREG(DP_CNTL, (DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM)); - - radeon_fifo_wait(2); + radeonfb_set_creg(rinfo, DP_GUI_MASTER_CNTL, &rinfo->dp_gui_mc_cache, + rinfo->dp_gui_mc_base | GMC_BRUSH_SOLID_COLOR | ROP3_P); + radeonfb_set_creg(rinfo, DP_CNTL, &rinfo->dp_cntl_cache, + DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM); + radeonfb_set_creg(rinfo, DP_BRUSH_FRGD_CLR, &rinfo->dp_brush_fg_cache, + region->color); + + /* Ensure the dst cache is flushed and the engine idle before + * issuing the operation. + * + * This works around engine lockups on some cards + */ +#if FLUSH_CACHE_WORKAROUND + radeon_fifo_wait(rinfo, 2); OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL); OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE)); - - radeon_fifo_wait(2); +#endif + radeon_fifo_wait(rinfo, 2); OUTREG(DST_Y_X, (region->dy << 16) | region->dx); OUTREG(DST_WIDTH_HEIGHT, (region->width << 16) | region->height); } @@ -70,15 +70,14 @@ void radeonfb_fillrect(struct fb_info *info, const struct fb_fillrect *region) struct fb_fillrect modded; int vxres, vyres; - if (info->state != FBINFO_STATE_RUNNING) + WARN_ON(rinfo->gfx_mode); + if (info->state != FBINFO_STATE_RUNNING || rinfo->gfx_mode) return; if (info->flags & FBINFO_HWACCEL_DISABLED) { cfb_fillrect(info, region); return; } - radeon_fixup_offset(rinfo); - vxres = info->var.xres_virtual; vyres = info->var.yres_virtual; @@ -91,6 +90,10 @@ void radeonfb_fillrect(struct fb_info *info, const struct fb_fillrect *region) if(modded.dx + modded.width > vxres) modded.width = vxres - modded.dx; if(modded.dy + modded.height > vyres) modded.height = vyres - modded.dy; + if (info->fix.visual == FB_VISUAL_TRUECOLOR || + info->fix.visual == FB_VISUAL_DIRECTCOLOR ) + modded.color = ((u32 *) (info->pseudo_palette))[region->color]; + radeonfb_prim_fillrect(rinfo, &modded); } @@ -109,22 +112,22 @@ static void radeonfb_prim_copyarea(struct radeonfb_info *rinfo, if ( xdir < 0 ) { sx += w-1; dx += w-1; } if ( ydir < 0 ) { sy += h-1; dy += h-1; } - radeon_fifo_wait(3); - OUTREG(DP_GUI_MASTER_CNTL, - rinfo->dp_gui_master_cntl /* i.e. GMC_DST_32BPP */ - | GMC_BRUSH_NONE - | GMC_SRC_DSTCOLOR - | ROP3_S - | DP_SRC_SOURCE_MEMORY ); - OUTREG(DP_WRITE_MSK, 0xffffffff); - OUTREG(DP_CNTL, (xdir>=0 ? DST_X_LEFT_TO_RIGHT : 0) - | (ydir>=0 ? DST_Y_TOP_TO_BOTTOM : 0)); - - radeon_fifo_wait(2); + radeonfb_set_creg(rinfo, DP_GUI_MASTER_CNTL, &rinfo->dp_gui_mc_cache, + rinfo->dp_gui_mc_base | + GMC_BRUSH_NONE | + GMC_SRC_DATATYPE_COLOR | + ROP3_S | + DP_SRC_SOURCE_MEMORY); + radeonfb_set_creg(rinfo, DP_CNTL, &rinfo->dp_cntl_cache, + (xdir>=0 ? DST_X_LEFT_TO_RIGHT : 0) | + (ydir>=0 ? DST_Y_TOP_TO_BOTTOM : 0)); + +#if FLUSH_CACHE_WORKAROUND + radeon_fifo_wait(rinfo, 2); OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL); OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE)); - - radeon_fifo_wait(3); +#endif + radeon_fifo_wait(rinfo, 3); OUTREG(SRC_Y_X, (sy << 16) | sx); OUTREG(DST_Y_X, (dy << 16) | dx); OUTREG(DST_HEIGHT_WIDTH, (h << 16) | w); @@ -143,15 +146,14 @@ void radeonfb_copyarea(struct fb_info *info, const struct fb_copyarea *area) modded.width = area->width; modded.height = area->height; - if (info->state != FBINFO_STATE_RUNNING) + WARN_ON(rinfo->gfx_mode); + if (info->state != FBINFO_STATE_RUNNING || rinfo->gfx_mode) return; if (info->flags & FBINFO_HWACCEL_DISABLED) { cfb_copyarea(info, area); return; } - radeon_fixup_offset(rinfo); - vxres = info->var.xres_virtual; vyres = info->var.yres_virtual; @@ -168,13 +170,112 @@ void radeonfb_copyarea(struct fb_info *info, const struct fb_copyarea *area) radeonfb_prim_copyarea(rinfo, &modded); } +static void radeonfb_prim_imageblit(struct radeonfb_info *rinfo, + const struct fb_image *image, + u32 fg, u32 bg) +{ + unsigned int src_bytes, dwords; + u32 *bits; + + radeonfb_set_creg(rinfo, DP_GUI_MASTER_CNTL, &rinfo->dp_gui_mc_cache, + rinfo->dp_gui_mc_base | + GMC_BRUSH_NONE | + GMC_SRC_DATATYPE_MONO_FG_BG | + ROP3_S | + GMC_BYTE_ORDER_MSB_TO_LSB | + DP_SRC_SOURCE_HOST_DATA); + radeonfb_set_creg(rinfo, DP_CNTL, &rinfo->dp_cntl_cache, + DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM); + radeonfb_set_creg(rinfo, DP_SRC_FRGD_CLR, &rinfo->dp_src_fg_cache, fg); + radeonfb_set_creg(rinfo, DP_SRC_BKGD_CLR, &rinfo->dp_src_bg_cache, bg); + + radeon_fifo_wait(rinfo, 1); + OUTREG(DST_Y_X, (image->dy << 16) | image->dx); + + /* Ensure the dst cache is flushed and the engine idle before + * issuing the operation. + * + * This works around engine lockups on some cards + */ +#if FLUSH_CACHE_WORKAROUND + radeon_fifo_wait(rinfo, 2); + OUTREG(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL); + OUTREG(WAIT_UNTIL, (WAIT_2D_IDLECLEAN | WAIT_DMA_GUI_IDLE)); +#endif + + /* X here pads width to a multiple of 32 and uses the clipper to + * adjust the result. Is that really necessary ? Things seem to + * work ok for me without that and the doco doesn't seem to imply + * there is such a restriction. + */ + OUTREG(DST_WIDTH_HEIGHT, (image->width << 16) | image->height); + + src_bytes = (((image->width * image->depth) + 7) / 8) * image->height; + dwords = (src_bytes + 3) / 4; + bits = (u32*)(image->data); + + while(dwords >= 8) { + radeon_fifo_wait(rinfo, 8); +#if BITS_PER_LONG == 64 + __raw_writeq(*((u64 *)(bits)), rinfo->mmio_base + HOST_DATA0); + __raw_writeq(*((u64 *)(bits+2)), rinfo->mmio_base + HOST_DATA2); + __raw_writeq(*((u64 *)(bits+4)), rinfo->mmio_base + HOST_DATA4); + __raw_writeq(*((u64 *)(bits+6)), rinfo->mmio_base + HOST_DATA6); + bits += 8; +#else + __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA0); + __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA1); + __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA2); + __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA3); + __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA4); + __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA5); + __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA6); + __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA7); +#endif + dwords -= 8; + } + while(dwords--) { + radeon_fifo_wait(rinfo, 1); + __raw_writel(*(bits++), rinfo->mmio_base + HOST_DATA0); + } +} + void radeonfb_imageblit(struct fb_info *info, const struct fb_image *image) { struct radeonfb_info *rinfo = info->par; + u32 fg, bg; - if (info->state != FBINFO_STATE_RUNNING) + WARN_ON(rinfo->gfx_mode); + if (info->state != FBINFO_STATE_RUNNING || rinfo->gfx_mode) + return; + + if (!image->width || !image->height) return; - radeon_engine_idle(); + + /* We only do 1 bpp color expansion for now */ + if (info->flags & FBINFO_HWACCEL_DISABLED || image->depth != 1) + goto fallback; + + /* Fallback if running out of the screen. We may do clipping + * in the future */ + if ((image->dx + image->width) > info->var.xres_virtual || + (image->dy + image->height) > info->var.yres_virtual) + goto fallback; + + if (info->fix.visual == FB_VISUAL_TRUECOLOR || + info->fix.visual == FB_VISUAL_DIRECTCOLOR) { + fg = ((u32*)(info->pseudo_palette))[image->fg_color]; + bg = ((u32*)(info->pseudo_palette))[image->bg_color]; + } else { + fg = image->fg_color; + bg = image->bg_color; + } + + radeonfb_prim_imageblit(rinfo, image, fg, bg); + return; + + fallback: + radeon_engine_idle(rinfo); cfb_imageblit(info, image); } @@ -185,7 +286,8 @@ int radeonfb_sync(struct fb_info *info) if (info->state != FBINFO_STATE_RUNNING) return 0; - radeon_engine_idle(); + + radeon_engine_idle(rinfo); return 0; } @@ -211,9 +313,7 @@ void radeonfb_engine_reset(struct radeonfb_info *rinfo) host_path_cntl = INREG(HOST_PATH_CNTL); rbbm_soft_reset = INREG(RBBM_SOFT_RESET); - if (rinfo->family == CHIP_FAMILY_R300 || - rinfo->family == CHIP_FAMILY_R350 || - rinfo->family == CHIP_FAMILY_RV350) { + if (IS_R300_VARIANT(rinfo)) { u32 tmp; OUTREG(RBBM_SOFT_RESET, (rbbm_soft_reset | @@ -249,9 +349,7 @@ void radeonfb_engine_reset(struct radeonfb_info *rinfo) INREG(HOST_PATH_CNTL); OUTREG(HOST_PATH_CNTL, host_path_cntl); - if (rinfo->family != CHIP_FAMILY_R300 && - rinfo->family != CHIP_FAMILY_R350 && - rinfo->family != CHIP_FAMILY_RV350) + if (!IS_R300_VARIANT(rinfo)) OUTREG(RBBM_SOFT_RESET, rbbm_soft_reset); OUTREG(CLOCK_CNTL_INDEX, clock_cntl_index); @@ -265,15 +363,24 @@ void radeonfb_engine_init (struct radeonfb_info *rinfo) /* disable 3D engine */ OUTREG(RB3D_CNTL, 0); + rinfo->fifo_free = 0; radeonfb_engine_reset(rinfo); - radeon_fifo_wait (1); - if ((rinfo->family != CHIP_FAMILY_R300) && - (rinfo->family != CHIP_FAMILY_R350) && - (rinfo->family != CHIP_FAMILY_RV350)) + radeon_fifo_wait(rinfo, 1); + if (IS_R300_VARIANT(rinfo)) { + OUTREG(RB2D_DSTCACHE_MODE, INREG(RB2D_DSTCACHE_MODE) | + RB2D_DC_AUTOFLUSH_ENABLE | + RB2D_DC_DC_DISABLE_IGNORE_PE); + } else { + /* This needs to be double checked with ATI. Latest X driver + * completely "forgets" to set this register on < r3xx, and + * we used to just write 0 there... I'll keep the 0 and update + * that when we have sorted things out on X side. + */ OUTREG(RB2D_DSTCACHE_MODE, 0); + } - radeon_fifo_wait (3); + radeon_fifo_wait(rinfo, 3); /* We re-read MC_FB_LOCATION from card as it can have been * modified by XFree drivers (ouch !) */ @@ -284,41 +391,57 @@ void radeonfb_engine_init (struct radeonfb_info *rinfo) OUTREG(DST_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10)); OUTREG(SRC_PITCH_OFFSET, (rinfo->pitch << 0x16) | (rinfo->fb_local_base >> 10)); - radeon_fifo_wait (1); -#if defined(__BIG_ENDIAN) + radeon_fifo_wait(rinfo, 1); +#ifdef __BIG_ENDIAN OUTREGP(DP_DATATYPE, HOST_BIG_ENDIAN_EN, ~HOST_BIG_ENDIAN_EN); #else OUTREGP(DP_DATATYPE, 0, ~HOST_BIG_ENDIAN_EN); #endif - radeon_fifo_wait (2); + radeon_fifo_wait(rinfo, 2); OUTREG(DEFAULT_SC_TOP_LEFT, 0); OUTREG(DEFAULT_SC_BOTTOM_RIGHT, (DEFAULT_SC_RIGHT_MAX | DEFAULT_SC_BOTTOM_MAX)); + /* set default DP_GUI_MASTER_CNTL */ temp = radeon_get_dstbpp(rinfo->depth); - rinfo->dp_gui_master_cntl = ((temp << 8) | GMC_CLR_CMP_CNTL_DIS); + rinfo->dp_gui_mc_base = ((temp << 8) | GMC_CLR_CMP_CNTL_DIS); - radeon_fifo_wait (1); - OUTREG(DP_GUI_MASTER_CNTL, (rinfo->dp_gui_master_cntl | - GMC_BRUSH_SOLID_COLOR | - GMC_SRC_DATATYPE_COLOR)); + rinfo->dp_gui_mc_cache = rinfo->dp_gui_mc_base | + GMC_BRUSH_SOLID_COLOR | + GMC_SRC_DATATYPE_COLOR; + radeon_fifo_wait(rinfo, 1); + OUTREG(DP_GUI_MASTER_CNTL, rinfo->dp_gui_mc_cache); - radeon_fifo_wait (7); /* clear line drawing regs */ + radeon_fifo_wait(rinfo, 2); OUTREG(DST_LINE_START, 0); OUTREG(DST_LINE_END, 0); - /* set brush color regs */ - OUTREG(DP_BRUSH_FRGD_CLR, 0xffffffff); - OUTREG(DP_BRUSH_BKGD_CLR, 0x00000000); - - /* set source color regs */ - OUTREG(DP_SRC_FRGD_CLR, 0xffffffff); - OUTREG(DP_SRC_BKGD_CLR, 0x00000000); + /* set brush and source color regs */ + rinfo->dp_brush_fg_cache = 0xffffffff; + rinfo->dp_brush_bg_cache = 0x00000000; + rinfo->dp_src_fg_cache = 0xffffffff; + rinfo->dp_src_bg_cache = 0x00000000; + radeon_fifo_wait(rinfo, 4); + OUTREG(DP_BRUSH_FRGD_CLR, rinfo->dp_brush_fg_cache); + OUTREG(DP_BRUSH_BKGD_CLR, rinfo->dp_brush_bg_cache); + OUTREG(DP_SRC_FRGD_CLR, rinfo->dp_src_fg_cache); + OUTREG(DP_SRC_BKGD_CLR, rinfo->dp_src_bg_cache); + + /* Default direction */ + rinfo->dp_cntl_cache = DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM; + radeon_fifo_wait(rinfo, 1); + OUTREG(DP_CNTL, rinfo->dp_cntl_cache); /* default write mask */ + radeon_fifo_wait(rinfo, 1); OUTREG(DP_WRITE_MSK, 0xffffffff); - radeon_engine_idle (); + /* Default to no swapping of host data */ + radeon_fifo_wait(rinfo, 1); + OUTREG(RBBM_GUICNTL, RBBM_GUICNTL_HOST_DATA_SWAP_NONE); + + /* Make sure it's settled */ + radeon_engine_idle(rinfo); } diff --git a/drivers/video/aty/radeon_backlight.c b/drivers/video/aty/radeon_backlight.c index 1a056adb61c8..f343ba83f0ae 100644 --- a/drivers/video/aty/radeon_backlight.c +++ b/drivers/video/aty/radeon_backlight.c @@ -66,7 +66,7 @@ static int radeon_bl_update_status(struct backlight_device *bd) level = bd->props.brightness; del_timer_sync(&rinfo->lvds_timer); - radeon_engine_idle(); + radeon_engine_idle(rinfo); lvds_gen_cntl = INREG(LVDS_GEN_CNTL); if (level > 0) { diff --git a/drivers/video/aty/radeon_base.c b/drivers/video/aty/radeon_base.c index 652273e9f5f9..9a5821c65ebf 100644 --- a/drivers/video/aty/radeon_base.c +++ b/drivers/video/aty/radeon_base.c @@ -852,7 +852,6 @@ static int radeonfb_pan_display (struct fb_var_screeninfo *var, if (rinfo->asleep) return 0; - radeon_fifo_wait(2); OUTREG(CRTC_OFFSET, ((var->yoffset * var->xres_virtual + var->xoffset) * var->bits_per_pixel / 8) & ~7); return 0; @@ -882,7 +881,6 @@ static int radeonfb_ioctl (struct fb_info *info, unsigned int cmd, if (rc) return rc; - radeon_fifo_wait(2); if (value & 0x01) { tmp = INREG(LVDS_GEN_CNTL); @@ -940,7 +938,7 @@ int radeon_screen_blank(struct radeonfb_info *rinfo, int blank, int mode_switch) if (rinfo->lock_blank) return 0; - radeon_engine_idle(); + radeon_engine_idle(rinfo); val = INREG(CRTC_EXT_CNTL); val &= ~(CRTC_DISPLAY_DIS | CRTC_HSYNC_DIS | @@ -1048,7 +1046,7 @@ static int radeonfb_blank (int blank, struct fb_info *info) if (rinfo->asleep) return 0; - + return radeon_screen_blank(rinfo, blank, 0); } @@ -1074,8 +1072,6 @@ static int radeon_setcolreg (unsigned regno, unsigned red, unsigned green, pindex = regno; if (!rinfo->asleep) { - radeon_fifo_wait(9); - if (rinfo->bpp == 16) { pindex = regno * 8; @@ -1244,8 +1240,6 @@ static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_reg { int i; - radeon_fifo_wait(20); - /* Workaround from XFree */ if (rinfo->is_mobility) { /* A temporal workaround for the occational blanking on certain laptop @@ -1286,11 +1280,10 @@ static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_reg radeon_pll_errata_after_data(rinfo); /* Set PPLL ref. div */ - if (rinfo->family == CHIP_FAMILY_R300 || + if (IS_R300_VARIANT(rinfo) || rinfo->family == CHIP_FAMILY_RS300 || - rinfo->family == CHIP_FAMILY_R350 || - rinfo->family == CHIP_FAMILY_RV350 || - rinfo->family == CHIP_FAMILY_RV380 ) { + rinfo->family == CHIP_FAMILY_RS400 || + rinfo->family == CHIP_FAMILY_RS480) { if (mode->ppll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) { /* When restoring console mode, use saved PPLL_REF_DIV * setting. @@ -1342,7 +1335,7 @@ static void radeon_lvds_timer_func(unsigned long data) { struct radeonfb_info *rinfo = (struct radeonfb_info *)data; - radeon_engine_idle(); + radeon_engine_idle(rinfo); OUTREG(LVDS_GEN_CNTL, rinfo->pending_lvds_gen_cntl); } @@ -1360,10 +1353,11 @@ void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode, if (nomodeset) return; + radeon_engine_idle(rinfo); + if (!regs_only) radeon_screen_blank(rinfo, FB_BLANK_NORMAL, 0); - radeon_fifo_wait(31); for (i=0; i<10; i++) OUTREG(common_regs[i].reg, common_regs[i].val); @@ -1391,7 +1385,6 @@ void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode, radeon_write_pll_regs(rinfo, mode); if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD)) { - radeon_fifo_wait(10); OUTREG(FP_CRTC_H_TOTAL_DISP, mode->fp_crtc_h_total_disp); OUTREG(FP_CRTC_V_TOTAL_DISP, mode->fp_crtc_v_total_disp); OUTREG(FP_H_SYNC_STRT_WID, mode->fp_h_sync_strt_wid); @@ -1406,7 +1399,6 @@ void radeon_write_mode (struct radeonfb_info *rinfo, struct radeon_regs *mode, if (!regs_only) radeon_screen_blank(rinfo, FB_BLANK_UNBLANK, 0); - radeon_fifo_wait(2); OUTPLL(VCLK_ECP_CNTL, mode->vclk_ecp_cntl); return; @@ -1461,10 +1453,7 @@ static void radeon_calc_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs /* Not all chip revs have the same format for this register, * extract the source selection */ - if (rinfo->family == CHIP_FAMILY_R200 || - rinfo->family == CHIP_FAMILY_R300 || - rinfo->family == CHIP_FAMILY_R350 || - rinfo->family == CHIP_FAMILY_RV350) { + if (rinfo->family == CHIP_FAMILY_R200 || IS_R300_VARIANT(rinfo)) { source = (fp2_gen_cntl >> 10) & 0x3; /* sourced from transform unit, check for transform unit * own source @@ -1560,7 +1549,7 @@ static int radeonfb_set_par(struct fb_info *info) /* We always want engine to be idle on a mode switch, even * if we won't actually change the mode */ - radeon_engine_idle(); + radeon_engine_idle(rinfo); hSyncStart = mode->xres + mode->right_margin; hSyncEnd = hSyncStart + mode->hsync_len; @@ -1855,7 +1844,6 @@ static int radeonfb_set_par(struct fb_info *info) return 0; } - static struct fb_ops radeonfb_ops = { .owner = THIS_MODULE, .fb_check_var = radeonfb_check_var, @@ -1879,6 +1867,7 @@ static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo) info->par = rinfo; info->pseudo_palette = rinfo->pseudo_palette; info->flags = FBINFO_DEFAULT + | FBINFO_HWACCEL_IMAGEBLIT | FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT | FBINFO_HWACCEL_XPAN @@ -2005,11 +1994,11 @@ static void radeon_identify_vram(struct radeonfb_info *rinfo) (rinfo->family == CHIP_FAMILY_RS200) || (rinfo->family == CHIP_FAMILY_RS300) || (rinfo->family == CHIP_FAMILY_RC410) || + (rinfo->family == CHIP_FAMILY_RS400) || (rinfo->family == CHIP_FAMILY_RS480) ) { u32 tom = INREG(NB_TOM); tmp = ((((tom >> 16) - (tom & 0xffff) + 1) << 6) * 1024); - radeon_fifo_wait(6); OUTREG(MC_FB_LOCATION, tom); OUTREG(DISPLAY_BASE_ADDR, (tom & 0xffff) << 16); OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16); diff --git a/drivers/video/aty/radeon_i2c.c b/drivers/video/aty/radeon_i2c.c index 8c8fa35f1b7c..2c5567175dca 100644 --- a/drivers/video/aty/radeon_i2c.c +++ b/drivers/video/aty/radeon_i2c.c @@ -139,12 +139,8 @@ void radeon_delete_i2c_busses(struct radeonfb_info *rinfo) int radeon_probe_i2c_connector(struct radeonfb_info *rinfo, int conn, u8 **out_edid) { - u32 reg = rinfo->i2c[conn-1].ddc_reg; u8 *edid; - OUTREG(reg, INREG(reg) & - ~(VGA_DDC_DATA_OUTPUT | VGA_DDC_CLK_OUTPUT)); - edid = fb_ddc_read(&rinfo->i2c[conn-1].adapter); if (out_edid) diff --git a/drivers/video/aty/radeon_pm.c b/drivers/video/aty/radeon_pm.c index 675abdafc2d8..3df5015f1d13 100644 --- a/drivers/video/aty/radeon_pm.c +++ b/drivers/video/aty/radeon_pm.c @@ -2653,9 +2653,9 @@ int radeonfb_pci_suspend(struct pci_dev *pdev, pm_message_t mesg) if (!(info->flags & FBINFO_HWACCEL_DISABLED)) { /* Make sure engine is reset */ - radeon_engine_idle(); + radeon_engine_idle(rinfo); radeonfb_engine_reset(rinfo); - radeon_engine_idle(); + radeon_engine_idle(rinfo); } /* Blank display and LCD */ @@ -2767,7 +2767,7 @@ int radeonfb_pci_resume(struct pci_dev *pdev) rinfo->asleep = 0; } else - radeon_engine_idle(); + radeon_engine_idle(rinfo); /* Restore display & engine */ radeon_write_mode (rinfo, &rinfo->state, 1); diff --git a/drivers/video/aty/radeonfb.h b/drivers/video/aty/radeonfb.h index ccbfffd12805..ea0b5b47acaf 100644 --- a/drivers/video/aty/radeonfb.h +++ b/drivers/video/aty/radeonfb.h @@ -53,6 +53,7 @@ enum radeon_family { CHIP_FAMILY_RV380, /* RV370/RV380/M22/M24 */ CHIP_FAMILY_R420, /* R420/R423/M18 */ CHIP_FAMILY_RC410, + CHIP_FAMILY_RS400, CHIP_FAMILY_RS480, CHIP_FAMILY_LAST, }; @@ -335,7 +336,15 @@ struct radeonfb_info { int mon2_type; u8 *mon2_EDID; - u32 dp_gui_master_cntl; + /* accel bits */ + u32 dp_gui_mc_base; + u32 dp_gui_mc_cache; + u32 dp_cntl_cache; + u32 dp_brush_fg_cache; + u32 dp_brush_bg_cache; + u32 dp_src_fg_cache; + u32 dp_src_bg_cache; + u32 fifo_free; struct pll_info pll; @@ -347,6 +356,7 @@ struct radeonfb_info { int lock_blank; int dynclk; int no_schedule; + int gfx_mode; enum radeon_pm_mode pm_mode; reinit_function_ptr reinit_func; @@ -391,8 +401,14 @@ static inline void _radeon_msleep(struct radeonfb_info *rinfo, unsigned long ms) #define OUTREG8(addr,val) writeb(val, (rinfo->mmio_base)+addr) #define INREG16(addr) readw((rinfo->mmio_base)+addr) #define OUTREG16(addr,val) writew(val, (rinfo->mmio_base)+addr) + +#ifdef CONFIG_PPC +#define INREG(addr) ({ eieio(); ld_le32(rinfo->mmio_base+(addr)); }) +#define OUTREG(addr,val) do { eieio(); st_le32(rinfo->mmio_base+(addr),(val)); } while(0) +#else #define INREG(addr) readl((rinfo->mmio_base)+addr) #define OUTREG(addr,val) writel(val, (rinfo->mmio_base)+addr) +#endif static inline void _OUTREGP(struct radeonfb_info *rinfo, u32 addr, u32 val, u32 mask) @@ -533,16 +549,25 @@ static inline u32 radeon_get_dstbpp(u16 depth) /* * 2D Engine helper routines */ + +extern void radeon_fifo_update_and_wait(struct radeonfb_info *rinfo, int entries); + static inline void radeon_engine_flush (struct radeonfb_info *rinfo) { int i; - /* initiate flush */ - OUTREGP(RB2D_DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL, + /* Initiate flush */ + OUTREGP(DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL, ~RB2D_DC_FLUSH_ALL); + /* Ensure FIFO is empty, ie, make sure the flush commands + * has reached the cache + */ + radeon_fifo_update_and_wait(rinfo, 64); + + /* Wait for the flush to complete */ for (i=0; i < 2000000; i++) { - if (!(INREG(RB2D_DSTCACHE_CTLSTAT) & RB2D_DC_BUSY)) + if (!(INREG(DSTCACHE_CTLSTAT) & RB2D_DC_BUSY)) return; udelay(1); } @@ -550,25 +575,12 @@ static inline void radeon_engine_flush (struct radeonfb_info *rinfo) } -static inline void _radeon_fifo_wait(struct radeonfb_info *rinfo, int entries) -{ - int i; - - for (i=0; i<2000000; i++) { - if ((INREG(RBBM_STATUS) & 0x7f) >= entries) - return; - udelay(1); - } - printk(KERN_ERR "radeonfb: FIFO Timeout !\n"); -} - - -static inline void _radeon_engine_idle(struct radeonfb_info *rinfo) +static inline void radeon_engine_idle(struct radeonfb_info *rinfo) { int i; /* ensure FIFO is empty before waiting for idle */ - _radeon_fifo_wait (rinfo, 64); + radeon_fifo_update_and_wait (rinfo, 64); for (i=0; i<2000000; i++) { if (((INREG(RBBM_STATUS) & GUI_ACTIVE)) == 0) { @@ -581,8 +593,6 @@ static inline void _radeon_engine_idle(struct radeonfb_info *rinfo) } -#define radeon_engine_idle() _radeon_engine_idle(rinfo) -#define radeon_fifo_wait(entries) _radeon_fifo_wait(rinfo,entries) #define radeon_msleep(ms) _radeon_msleep(rinfo,ms) @@ -612,6 +622,7 @@ extern void radeonfb_imageblit(struct fb_info *p, const struct fb_image *image); extern int radeonfb_sync(struct fb_info *info); extern void radeonfb_engine_init (struct radeonfb_info *rinfo); extern void radeonfb_engine_reset(struct radeonfb_info *rinfo); +extern void radeon_fixup_mem_offset(struct radeonfb_info *rinfo); /* Other functions */ extern int radeon_screen_blank(struct radeonfb_info *rinfo, int blank, int mode_switch); diff --git a/drivers/video/carminefb.c b/drivers/video/carminefb.c index e15bb447440a..c9b191319a9a 100644 --- a/drivers/video/carminefb.c +++ b/drivers/video/carminefb.c @@ -535,7 +535,7 @@ static struct fb_ops carminefb_ops = { .fb_setcolreg = carmine_setcolreg, }; -static int alloc_carmine_fb(void __iomem *regs, void __iomem *smem_base, +static int __devinit alloc_carmine_fb(void __iomem *regs, void __iomem *smem_base, int smem_offset, struct device *device, struct fb_info **rinfo) { int ret; diff --git a/drivers/video/cirrusfb.c b/drivers/video/cirrusfb.c index e729fb279645..048b139f0e50 100644 --- a/drivers/video/cirrusfb.c +++ b/drivers/video/cirrusfb.c @@ -327,29 +327,7 @@ static const struct { #endif /* CONFIG_ZORRO */ struct cirrusfb_regs { - long freq; - long nom; - long den; - long div; - long multiplexing; - long mclk; - long divMCLK; - - long HorizRes; /* The x resolution in pixel */ - long HorizTotal; - long HorizDispEnd; - long HorizBlankStart; - long HorizBlankEnd; - long HorizSyncStart; - long HorizSyncEnd; - - long VertRes; /* the physical y resolution in scanlines */ - long VertTotal; - long VertDispEnd; - long VertSyncStart; - long VertSyncEnd; - long VertBlankStart; - long VertBlankEnd; + int multiplexing; }; #ifdef CIRRUSFB_DEBUG @@ -367,110 +345,13 @@ struct cirrusfb_info { struct cirrusfb_regs currentmode; int blank_mode; + u32 pseudo_palette[16]; - u32 pseudo_palette[16]; - -#ifdef CONFIG_ZORRO - struct zorro_dev *zdev; -#endif -#ifdef CONFIG_PCI - struct pci_dev *pdev; -#endif void (*unmap)(struct fb_info *info); }; -static unsigned cirrusfb_def_mode = 1; -static int noaccel; - -/* - * Predefined Video Modes - */ - -static const struct { - const char *name; - struct fb_var_screeninfo var; -} cirrusfb_predefined[] = { - { - /* autodetect mode */ - .name = "Autodetect", - }, { - /* 640x480, 31.25 kHz, 60 Hz, 25 MHz PixClock */ - .name = "640x480", - .var = { - .xres = 640, - .yres = 480, - .xres_virtual = 640, - .yres_virtual = 480, - .bits_per_pixel = 8, - .red = { .length = 8 }, - .green = { .length = 8 }, - .blue = { .length = 8 }, - .width = -1, - .height = -1, - .pixclock = 40000, - .left_margin = 48, - .right_margin = 16, - .upper_margin = 32, - .lower_margin = 8, - .hsync_len = 96, - .vsync_len = 4, - .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .vmode = FB_VMODE_NONINTERLACED - } - }, { - /* 800x600, 48 kHz, 76 Hz, 50 MHz PixClock */ - .name = "800x600", - .var = { - .xres = 800, - .yres = 600, - .xres_virtual = 800, - .yres_virtual = 600, - .bits_per_pixel = 8, - .red = { .length = 8 }, - .green = { .length = 8 }, - .blue = { .length = 8 }, - .width = -1, - .height = -1, - .pixclock = 20000, - .left_margin = 128, - .right_margin = 16, - .upper_margin = 24, - .lower_margin = 2, - .hsync_len = 96, - .vsync_len = 6, - .vmode = FB_VMODE_NONINTERLACED - } - }, { - /* - * Modeline from XF86Config: - * Mode "1024x768" 80 1024 1136 1340 1432 768 770 774 805 - */ - /* 1024x768, 55.8 kHz, 70 Hz, 80 MHz PixClock */ - .name = "1024x768", - .var = { - .xres = 1024, - .yres = 768, - .xres_virtual = 1024, - .yres_virtual = 768, - .bits_per_pixel = 8, - .red = { .length = 8 }, - .green = { .length = 8 }, - .blue = { .length = 8 }, - .width = -1, - .height = -1, - .pixclock = 12500, - .left_margin = 144, - .right_margin = 32, - .upper_margin = 30, - .lower_margin = 2, - .hsync_len = 192, - .vsync_len = 6, - .vmode = FB_VMODE_NONINTERLACED - } - } -}; - -#define NUM_TOTAL_MODES ARRAY_SIZE(cirrusfb_predefined) +static int noaccel __devinitdata; +static char *mode_option __devinitdata = "640x480@60"; /****************************************************************************/ /**** BEGIN PROTOTYPES ******************************************************/ @@ -514,10 +395,6 @@ static struct fb_ops cirrusfb_ops = { .fb_imageblit = cirrusfb_imageblit, }; -/*--- Hardware Specific Routines -------------------------------------------*/ -static int cirrusfb_decode_var(const struct fb_var_screeninfo *var, - struct cirrusfb_regs *regs, - struct fb_info *info); /*--- Internal routines ----------------------------------------------------*/ static void init_vgachip(struct fb_info *info); static void switch_monitor(struct cirrusfb_info *cinfo, int on); @@ -546,9 +423,7 @@ static void cirrusfb_RectFill(u8 __iomem *regbase, int bits_per_pixel, u_short width, u_short height, u_char color, u_short line_length); -static void bestclock(long freq, long *best, - long *nom, long *den, - long *div, long maxfreq); +static void bestclock(long freq, int *nom, int *den, int *div); #ifdef CIRRUSFB_DEBUG static void cirrusfb_dump(void); @@ -584,45 +459,28 @@ static int cirrusfb_release(struct fb_info *info, int user) /****************************************************************************/ /**** BEGIN Hardware specific Routines **************************************/ -/* Get a good MCLK value */ -static long cirrusfb_get_mclk(long freq, int bpp, long *div) +/* Check if the MCLK is not a better clock source */ +static int cirrusfb_check_mclk(struct cirrusfb_info *cinfo, long freq) { - long mclk; + long mclk = vga_rseq(cinfo->regbase, CL_SEQR1F) & 0x3f; - assert(div != NULL); - - /* Calculate MCLK, in case VCLK is high enough to require > 50MHz. - * Assume a 64-bit data path for now. The formula is: - * ((B * PCLK * 2)/W) * 1.2 - * B = bytes per pixel, PCLK = pixclock, W = data width in bytes */ - mclk = ((bpp / 8) * freq * 2) / 4; - mclk = (mclk * 12) / 10; - if (mclk < 50000) - mclk = 50000; - DPRINTK("Use MCLK of %ld kHz\n", mclk); - - /* Calculate value for SR1F. Multiply by 2 so we can round up. */ - mclk = ((mclk * 16) / 14318); - mclk = (mclk + 1) / 2; - DPRINTK("Set SR1F[5:0] to 0x%lx\n", mclk); + /* Read MCLK value */ + mclk = (14318 * mclk) >> 3; + DPRINTK("Read MCLK of %ld kHz\n", mclk); /* Determine if we should use MCLK instead of VCLK, and if so, what we - * should divide it by to get VCLK */ - switch (freq) { - case 24751 ... 25249: - *div = 2; - DPRINTK("Using VCLK = MCLK/2\n"); - break; - case 49501 ... 50499: - *div = 1; + * should divide it by to get VCLK + */ + + if (abs(freq - mclk) < 250) { DPRINTK("Using VCLK = MCLK\n"); - break; - default: - *div = 0; - break; + return 1; + } else if (abs(freq - (mclk / 2)) < 250) { + DPRINTK("Using VCLK = MCLK/2\n"); + return 2; } - return mclk; + return 0; } static int cirrusfb_check_var(struct fb_var_screeninfo *var, @@ -638,7 +496,6 @@ static int cirrusfb_check_var(struct fb_var_screeninfo *var, break; /* 8 pixel per byte, only 1/4th of mem usable */ case 8: case 16: - case 24: case 32: break; /* 1 pixel == 1 byte */ default: @@ -713,7 +570,6 @@ static int cirrusfb_check_var(struct fb_var_screeninfo *var, var->blue.length = 5; break; - case 24: case 32: if (isPReP) { var->red.offset = 8; @@ -767,8 +623,6 @@ static int cirrusfb_decode_var(const struct fb_var_screeninfo *var, long maxclock; int maxclockidx = var->bits_per_pixel >> 3; struct cirrusfb_info *cinfo = info->par; - int xres, hfront, hsync, hback; - int yres, vfront, vsync, vback; switch (var->bits_per_pixel) { case 1: @@ -782,10 +636,9 @@ static int cirrusfb_decode_var(const struct fb_var_screeninfo *var, break; case 16: - case 24: case 32: info->fix.line_length = var->xres_virtual * maxclockidx; - info->fix.visual = FB_VISUAL_DIRECTCOLOR; + info->fix.visual = FB_VISUAL_TRUECOLOR; break; default: @@ -827,90 +680,33 @@ static int cirrusfb_decode_var(const struct fb_var_screeninfo *var, switch (var->bits_per_pixel) { case 16: case 32: - if (regs->HorizRes <= 800) + if (var->xres <= 800) /* Xbh has this type of clock for 32-bit */ freq /= 2; break; } #endif - - bestclock(freq, ®s->freq, ®s->nom, ®s->den, ®s->div, - maxclock); - regs->mclk = cirrusfb_get_mclk(freq, var->bits_per_pixel, - ®s->divMCLK); - - xres = var->xres; - hfront = var->right_margin; - hsync = var->hsync_len; - hback = var->left_margin; - - yres = var->yres; - vfront = var->lower_margin; - vsync = var->vsync_len; - vback = var->upper_margin; - - if (var->vmode & FB_VMODE_DOUBLE) { - yres *= 2; - vfront *= 2; - vsync *= 2; - vback *= 2; - } else if (var->vmode & FB_VMODE_INTERLACED) { - yres = (yres + 1) / 2; - vfront = (vfront + 1) / 2; - vsync = (vsync + 1) / 2; - vback = (vback + 1) / 2; - } - regs->HorizRes = xres; - regs->HorizTotal = (xres + hfront + hsync + hback) / 8 - 5; - regs->HorizDispEnd = xres / 8 - 1; - regs->HorizBlankStart = xres / 8; - /* does not count with "-5" */ - regs->HorizBlankEnd = regs->HorizTotal + 5; - regs->HorizSyncStart = (xres + hfront) / 8 + 1; - regs->HorizSyncEnd = (xres + hfront + hsync) / 8 + 1; - - regs->VertRes = yres; - regs->VertTotal = yres + vfront + vsync + vback - 2; - regs->VertDispEnd = yres - 1; - regs->VertBlankStart = yres; - regs->VertBlankEnd = regs->VertTotal; - regs->VertSyncStart = yres + vfront - 1; - regs->VertSyncEnd = yres + vfront + vsync - 1; - - if (regs->VertRes >= 1024) { - regs->VertTotal /= 2; - regs->VertSyncStart /= 2; - regs->VertSyncEnd /= 2; - regs->VertDispEnd /= 2; - } - if (regs->multiplexing) { - regs->HorizTotal /= 2; - regs->HorizSyncStart /= 2; - regs->HorizSyncEnd /= 2; - regs->HorizDispEnd /= 2; - } - return 0; } -static void cirrusfb_set_mclk(const struct cirrusfb_info *cinfo, int val, - int div) +static void cirrusfb_set_mclk_as_source(const struct cirrusfb_info *cinfo, + int div) { + unsigned char old1f, old1e; assert(cinfo != NULL); + old1f = vga_rseq(cinfo->regbase, CL_SEQR1F) & ~0x40; - if (div == 2) { - /* VCLK = MCLK/2 */ - unsigned char old = vga_rseq(cinfo->regbase, CL_SEQR1E); - vga_wseq(cinfo->regbase, CL_SEQR1E, old | 0x1); - vga_wseq(cinfo->regbase, CL_SEQR1F, 0x40 | (val & 0x3f)); - } else if (div == 1) { - /* VCLK = MCLK */ - unsigned char old = vga_rseq(cinfo->regbase, CL_SEQR1E); - vga_wseq(cinfo->regbase, CL_SEQR1E, old & ~0x1); - vga_wseq(cinfo->regbase, CL_SEQR1F, 0x40 | (val & 0x3f)); - } else { - vga_wseq(cinfo->regbase, CL_SEQR1F, val & 0x3f); + if (div) { + DPRINTK("Set %s as pixclock source.\n", + (div == 2) ? "MCLK/2" : "MCLK"); + old1f |= 0x40; + old1e = vga_rseq(cinfo->regbase, CL_SEQR1E) & ~0x1; + if (div == 2) + old1e |= 1; + + vga_wseq(cinfo->regbase, CL_SEQR1E, old1e); } + vga_wseq(cinfo->regbase, CL_SEQR1F, old1f); } /************************************************************************* @@ -927,6 +723,10 @@ static int cirrusfb_set_par_foo(struct fb_info *info) unsigned char tmp; int offset = 0, err; const struct cirrusfb_board_info_rec *bi; + int hdispend, hsyncstart, hsyncend, htotal; + int yres, vdispend, vsyncstart, vsyncend, vtotal; + long freq; + int nom, den, div; DPRINTK("ENTER\n"); DPRINTK("Requested mode: %dx%dx%d\n", @@ -944,76 +744,117 @@ static int cirrusfb_set_par_foo(struct fb_info *info) bi = &cirrusfb_board_info[cinfo->btype]; + hsyncstart = var->xres + var->right_margin; + hsyncend = hsyncstart + var->hsync_len; + htotal = (hsyncend + var->left_margin) / 8 - 5; + hdispend = var->xres / 8 - 1; + hsyncstart = hsyncstart / 8 + 1; + hsyncend = hsyncend / 8 + 1; + + yres = var->yres; + vsyncstart = yres + var->lower_margin; + vsyncend = vsyncstart + var->vsync_len; + vtotal = vsyncend + var->upper_margin; + vdispend = yres - 1; + + if (var->vmode & FB_VMODE_DOUBLE) { + yres *= 2; + vsyncstart *= 2; + vsyncend *= 2; + vtotal *= 2; + } else if (var->vmode & FB_VMODE_INTERLACED) { + yres = (yres + 1) / 2; + vsyncstart = (vsyncstart + 1) / 2; + vsyncend = (vsyncend + 1) / 2; + vtotal = (vtotal + 1) / 2; + } + + vtotal -= 2; + vsyncstart -= 1; + vsyncend -= 1; + + if (yres >= 1024) { + vtotal /= 2; + vsyncstart /= 2; + vsyncend /= 2; + vdispend /= 2; + } + if (regs.multiplexing) { + htotal /= 2; + hsyncstart /= 2; + hsyncend /= 2; + hdispend /= 2; + } /* unlock register VGA_CRTC_H_TOTAL..CRT7 */ vga_wcrt(regbase, VGA_CRTC_V_SYNC_END, 0x20); /* previously: 0x00) */ /* if debugging is enabled, all parameters get output before writing */ - DPRINTK("CRT0: %ld\n", regs.HorizTotal); - vga_wcrt(regbase, VGA_CRTC_H_TOTAL, regs.HorizTotal); + DPRINTK("CRT0: %d\n", htotal); + vga_wcrt(regbase, VGA_CRTC_H_TOTAL, htotal); - DPRINTK("CRT1: %ld\n", regs.HorizDispEnd); - vga_wcrt(regbase, VGA_CRTC_H_DISP, regs.HorizDispEnd); + DPRINTK("CRT1: %d\n", hdispend); + vga_wcrt(regbase, VGA_CRTC_H_DISP, hdispend); - DPRINTK("CRT2: %ld\n", regs.HorizBlankStart); - vga_wcrt(regbase, VGA_CRTC_H_BLANK_START, regs.HorizBlankStart); + DPRINTK("CRT2: %d\n", var->xres / 8); + vga_wcrt(regbase, VGA_CRTC_H_BLANK_START, var->xres / 8); /* + 128: Compatible read */ - DPRINTK("CRT3: 128+%ld\n", regs.HorizBlankEnd % 32); + DPRINTK("CRT3: 128+%d\n", (htotal + 5) % 32); vga_wcrt(regbase, VGA_CRTC_H_BLANK_END, - 128 + (regs.HorizBlankEnd % 32)); + 128 + ((htotal + 5) % 32)); - DPRINTK("CRT4: %ld\n", regs.HorizSyncStart); - vga_wcrt(regbase, VGA_CRTC_H_SYNC_START, regs.HorizSyncStart); + DPRINTK("CRT4: %d\n", hsyncstart); + vga_wcrt(regbase, VGA_CRTC_H_SYNC_START, hsyncstart); - tmp = regs.HorizSyncEnd % 32; - if (regs.HorizBlankEnd & 32) + tmp = hsyncend % 32; + if ((htotal + 5) & 32) tmp += 128; DPRINTK("CRT5: %d\n", tmp); vga_wcrt(regbase, VGA_CRTC_H_SYNC_END, tmp); - DPRINTK("CRT6: %ld\n", regs.VertTotal & 0xff); - vga_wcrt(regbase, VGA_CRTC_V_TOTAL, (regs.VertTotal & 0xff)); + DPRINTK("CRT6: %d\n", vtotal & 0xff); + vga_wcrt(regbase, VGA_CRTC_V_TOTAL, vtotal & 0xff); tmp = 16; /* LineCompare bit #9 */ - if (regs.VertTotal & 256) + if (vtotal & 256) tmp |= 1; - if (regs.VertDispEnd & 256) + if (vdispend & 256) tmp |= 2; - if (regs.VertSyncStart & 256) + if (vsyncstart & 256) tmp |= 4; - if (regs.VertBlankStart & 256) + if ((vdispend + 1) & 256) tmp |= 8; - if (regs.VertTotal & 512) + if (vtotal & 512) tmp |= 32; - if (regs.VertDispEnd & 512) + if (vdispend & 512) tmp |= 64; - if (regs.VertSyncStart & 512) + if (vsyncstart & 512) tmp |= 128; DPRINTK("CRT7: %d\n", tmp); vga_wcrt(regbase, VGA_CRTC_OVERFLOW, tmp); tmp = 0x40; /* LineCompare bit #8 */ - if (regs.VertBlankStart & 512) + if ((vdispend + 1) & 512) tmp |= 0x20; if (var->vmode & FB_VMODE_DOUBLE) tmp |= 0x80; DPRINTK("CRT9: %d\n", tmp); vga_wcrt(regbase, VGA_CRTC_MAX_SCAN, tmp); - DPRINTK("CRT10: %ld\n", regs.VertSyncStart & 0xff); - vga_wcrt(regbase, VGA_CRTC_V_SYNC_START, regs.VertSyncStart & 0xff); + DPRINTK("CRT10: %d\n", vsyncstart & 0xff); + vga_wcrt(regbase, VGA_CRTC_V_SYNC_START, vsyncstart & 0xff); - DPRINTK("CRT11: 64+32+%ld\n", regs.VertSyncEnd % 16); - vga_wcrt(regbase, VGA_CRTC_V_SYNC_END, regs.VertSyncEnd % 16 + 64 + 32); + DPRINTK("CRT11: 64+32+%d\n", vsyncend % 16); + vga_wcrt(regbase, VGA_CRTC_V_SYNC_END, vsyncend % 16 + 64 + 32); - DPRINTK("CRT12: %ld\n", regs.VertDispEnd & 0xff); - vga_wcrt(regbase, VGA_CRTC_V_DISP_END, regs.VertDispEnd & 0xff); + DPRINTK("CRT12: %d\n", vdispend & 0xff); + vga_wcrt(regbase, VGA_CRTC_V_DISP_END, vdispend & 0xff); - DPRINTK("CRT15: %ld\n", regs.VertBlankStart & 0xff); - vga_wcrt(regbase, VGA_CRTC_V_BLANK_START, regs.VertBlankStart & 0xff); + DPRINTK("CRT15: %d\n", (vdispend + 1) & 0xff); + vga_wcrt(regbase, VGA_CRTC_V_BLANK_START, (vdispend + 1) & 0xff); - DPRINTK("CRT16: %ld\n", regs.VertBlankEnd & 0xff); - vga_wcrt(regbase, VGA_CRTC_V_BLANK_END, regs.VertBlankEnd & 0xff); + DPRINTK("CRT16: %d\n", vtotal & 0xff); + vga_wcrt(regbase, VGA_CRTC_V_BLANK_END, vtotal & 0xff); DPRINTK("CRT18: 0xff\n"); vga_wcrt(regbase, VGA_CRTC_LINE_COMPARE, 0xff); @@ -1021,38 +862,53 @@ static int cirrusfb_set_par_foo(struct fb_info *info) tmp = 0; if (var->vmode & FB_VMODE_INTERLACED) tmp |= 1; - if (regs.HorizBlankEnd & 64) + if ((htotal + 5) & 64) tmp |= 16; - if (regs.HorizBlankEnd & 128) + if ((htotal + 5) & 128) tmp |= 32; - if (regs.VertBlankEnd & 256) + if (vtotal & 256) tmp |= 64; - if (regs.VertBlankEnd & 512) + if (vtotal & 512) tmp |= 128; DPRINTK("CRT1a: %d\n", tmp); vga_wcrt(regbase, CL_CRT1A, tmp); + freq = PICOS2KHZ(var->pixclock); + bestclock(freq, &nom, &den, &div); + /* set VCLK0 */ /* hardware RefClock: 14.31818 MHz */ /* formula: VClk = (OSC * N) / (D * (1+P)) */ /* Example: VClk = (14.31818 * 91) / (23 * (1+1)) = 28.325 MHz */ - vga_wseq(regbase, CL_SEQRB, regs.nom); - tmp = regs.den << 1; - if (regs.div != 0) - tmp |= 1; + if (cinfo->btype == BT_ALPINE) { + /* if freq is close to mclk or mclk/2 select mclk + * as clock source + */ + int divMCLK = cirrusfb_check_mclk(cinfo, freq); + if (divMCLK) { + nom = 0; + cirrusfb_set_mclk_as_source(cinfo, divMCLK); + } + } + if (nom) { + vga_wseq(regbase, CL_SEQRB, nom); + tmp = den << 1; + if (div != 0) + tmp |= 1; - /* 6 bit denom; ONLY 5434!!! (bugged me 10 days) */ - if ((cinfo->btype == BT_SD64) || - (cinfo->btype == BT_ALPINE) || - (cinfo->btype == BT_GD5480)) - tmp |= 0x80; + /* 6 bit denom; ONLY 5434!!! (bugged me 10 days) */ + if ((cinfo->btype == BT_SD64) || + (cinfo->btype == BT_ALPINE) || + (cinfo->btype == BT_GD5480)) + tmp |= 0x80; - DPRINTK("CL_SEQR1B: %ld\n", (long) tmp); - vga_wseq(regbase, CL_SEQR1B, tmp); + DPRINTK("CL_SEQR1B: %ld\n", (long) tmp); + vga_wseq(regbase, CL_SEQR1B, tmp); + } - if (regs.VertRes >= 1024) + if (yres >= 1024) /* 1280x1024 */ vga_wcrt(regbase, VGA_CRTC_MODE, 0xc7); else @@ -1066,7 +922,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info) /* don't know if it would hurt to also program this if no interlaced */ /* mode is used, but I feel better this way.. :-) */ if (var->vmode & FB_VMODE_INTERLACED) - vga_wcrt(regbase, VGA_CRTC_REGS, regs.HorizTotal / 2); + vga_wcrt(regbase, VGA_CRTC_REGS, htotal / 2); else vga_wcrt(regbase, VGA_CRTC_REGS, 0x00); /* interlace control */ @@ -1240,7 +1096,6 @@ static int cirrusfb_set_par_foo(struct fb_info *info) case BT_ALPINE: DPRINTK(" (for GD543x)\n"); - cirrusfb_set_mclk(cinfo, regs.mclk, regs.divMCLK); /* We already set SRF and SR1F */ break; @@ -1312,11 +1167,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info) case BT_ALPINE: DPRINTK(" (for GD543x)\n"); - if (regs.HorizRes >= 1024) - vga_wseq(regbase, CL_SEQR7, 0xa7); - else - vga_wseq(regbase, CL_SEQR7, 0xa3); - cirrusfb_set_mclk(cinfo, regs.mclk, regs.divMCLK); + vga_wseq(regbase, CL_SEQR7, 0xa7); break; case BT_GD5480: @@ -1360,7 +1211,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info) */ else if (var->bits_per_pixel == 32) { - DPRINTK("cirrusfb: preparing for 24/32 bit deep display\n"); + DPRINTK("cirrusfb: preparing for 32 bit deep display\n"); switch (cinfo->btype) { case BT_SD64: /* Extended Sequencer Mode: 256c col. mode */ @@ -1394,7 +1245,6 @@ static int cirrusfb_set_par_foo(struct fb_info *info) case BT_ALPINE: DPRINTK(" (for GD543x)\n"); vga_wseq(regbase, CL_SEQR7, 0xa9); - cirrusfb_set_mclk(cinfo, regs.mclk, regs.divMCLK); break; case BT_GD5480: @@ -1949,8 +1799,6 @@ static void init_vgachip(struct fb_info *info) /* misc... */ WHDR(cinfo, 0); /* Hidden DAC register: - */ - printk(KERN_DEBUG "cirrusfb: This board has %ld bytes of DRAM memory\n", - info->screen_size); DPRINTK("EXIT\n"); return; } @@ -2122,7 +1970,7 @@ static int release_io_ports; * based on the DRAM bandwidth bit and DRAM bank switching bit. This * works with 1MB, 2MB and 4MB configurations (which the Motorola boards * seem to have. */ -static unsigned int cirrusfb_get_memsize(u8 __iomem *regbase) +static unsigned int __devinit cirrusfb_get_memsize(u8 __iomem *regbase) { unsigned long mem; unsigned char SRF; @@ -2188,8 +2036,7 @@ static void get_pci_addrs(const struct pci_dev *pdev, static void cirrusfb_pci_unmap(struct fb_info *info) { - struct cirrusfb_info *cinfo = info->par; - struct pci_dev *pdev = cinfo->pdev; + struct pci_dev *pdev = to_pci_dev(info->device); iounmap(info->screen_base); #if 0 /* if system didn't claim this region, we would... */ @@ -2205,20 +2052,22 @@ static void cirrusfb_pci_unmap(struct fb_info *info) static void __devexit cirrusfb_zorro_unmap(struct fb_info *info) { struct cirrusfb_info *cinfo = info->par; - zorro_release_device(cinfo->zdev); + struct zorro_dev *zdev = to_zorro_dev(info->device); + + zorro_release_device(zdev); if (cinfo->btype == BT_PICASSO4) { cinfo->regbase -= 0x600000; iounmap((void *)cinfo->regbase); iounmap(info->screen_base); } else { - if (zorro_resource_start(cinfo->zdev) > 0x01000000) + if (zorro_resource_start(zdev) > 0x01000000) iounmap(info->screen_base); } } #endif /* CONFIG_ZORRO */ -static int cirrusfb_set_fbinfo(struct fb_info *info) +static int __devinit cirrusfb_set_fbinfo(struct fb_info *info) { struct cirrusfb_info *cinfo = info->par; struct fb_var_screeninfo *var = &info->var; @@ -2235,7 +2084,7 @@ static int cirrusfb_set_fbinfo(struct fb_info *info) if (cinfo->btype == BT_GD5480) { if (var->bits_per_pixel == 16) info->screen_base += 1 * MB_; - if (var->bits_per_pixel == 24 || var->bits_per_pixel == 32) + if (var->bits_per_pixel == 32) info->screen_base += 2 * MB_; } @@ -2262,7 +2111,7 @@ static int cirrusfb_set_fbinfo(struct fb_info *info) return 0; } -static int cirrusfb_register(struct fb_info *info) +static int __devinit cirrusfb_register(struct fb_info *info) { struct cirrusfb_info *cinfo = info->par; int err; @@ -2278,23 +2127,27 @@ static int cirrusfb_register(struct fb_info *info) /* sanity checks */ assert(btype != BT_NONE); + /* set all the vital stuff */ + cirrusfb_set_fbinfo(info); + DPRINTK("cirrusfb: (RAM start set to: 0x%p)\n", info->screen_base); - /* Make pretend we've set the var so our structures are in a "good" */ - /* state, even though we haven't written the mode to the hw yet... */ - info->var = cirrusfb_predefined[cirrusfb_def_mode].var; + err = fb_find_mode(&info->var, info, mode_option, NULL, 0, NULL, 8); + if (!err) { + DPRINTK("wrong initial video mode\n"); + err = -EINVAL; + goto err_dealloc_cmap; + } + info->var.activate = FB_ACTIVATE_NOW; err = cirrusfb_decode_var(&info->var, &cinfo->currentmode, info); if (err < 0) { /* should never happen */ DPRINTK("choking on default var... umm, no good.\n"); - goto err_unmap_cirrusfb; + goto err_dealloc_cmap; } - /* set all the vital stuff */ - cirrusfb_set_fbinfo(info); - err = register_framebuffer(info); if (err < 0) { printk(KERN_ERR "cirrusfb: could not register " @@ -2307,7 +2160,6 @@ static int cirrusfb_register(struct fb_info *info) err_dealloc_cmap: fb_dealloc_cmap(&info->cmap); -err_unmap_cirrusfb: cinfo->unmap(info); framebuffer_release(info); return err; @@ -2330,8 +2182,8 @@ static void __devexit cirrusfb_cleanup(struct fb_info *info) } #ifdef CONFIG_PCI -static int cirrusfb_pci_register(struct pci_dev *pdev, - const struct pci_device_id *ent) +static int __devinit cirrusfb_pci_register(struct pci_dev *pdev, + const struct pci_device_id *ent) { struct cirrusfb_info *cinfo; struct fb_info *info; @@ -2353,7 +2205,6 @@ static int cirrusfb_pci_register(struct pci_dev *pdev, } cinfo = info->par; - cinfo->pdev = pdev; cinfo->btype = btype = (enum cirrus_board) ent->driver_data; DPRINTK(" Found PCI device, base address 0 is 0x%x, btype set to %d\n", @@ -2459,8 +2310,8 @@ static struct pci_driver cirrusfb_pci_driver = { #endif /* CONFIG_PCI */ #ifdef CONFIG_ZORRO -static int cirrusfb_zorro_register(struct zorro_dev *z, - const struct zorro_device_id *ent) +static int __devinit cirrusfb_zorro_register(struct zorro_dev *z, + const struct zorro_device_id *ent) { struct cirrusfb_info *cinfo; struct fb_info *info; @@ -2489,7 +2340,6 @@ static int cirrusfb_zorro_register(struct zorro_dev *z, assert(z); assert(btype != BT_NONE); - cinfo->zdev = z; board_addr = zorro_resource_start(z); board_size = zorro_resource_len(z); info->screen_size = size; @@ -2621,17 +2471,17 @@ static int __init cirrusfb_setup(char *options) { return 0; while ((this_opt = strsep(&options, ",")) != NULL) { - if (!*this_opt) continue; + if (!*this_opt) + continue; DPRINTK("cirrusfb_setup: option '%s'\n", this_opt); - for (i = 0; i < NUM_TOTAL_MODES; i++) { - sprintf(s, "mode:%s", cirrusfb_predefined[i].name); - if (strcmp(this_opt, s) == 0) - cirrusfb_def_mode = i; - } if (!strcmp(this_opt, "noaccel")) noaccel = 1; + else if (!strncmp(this_opt, "mode:", 5)) + mode_option = this_opt + 5; + else + mode_option = this_opt; } return 0; } @@ -2657,6 +2507,11 @@ static void __exit cirrusfb_exit(void) module_init(cirrusfb_init); +module_param(mode_option, charp, 0); +MODULE_PARM_DESC(mode_option, "Initial video mode e.g. '648x480-8@60'"); +module_param(noaccel, bool, 0); +MODULE_PARM_DESC(noaccel, "Disable acceleration"); + #ifdef MODULE module_exit(cirrusfb_exit); #endif @@ -3050,16 +2905,14 @@ static void cirrusfb_RectFill(u8 __iomem *regbase, int bits_per_pixel, * bestclock() - determine closest possible clock lower(?) than the * desired pixel clock **************************************************************************/ -static void bestclock(long freq, long *best, long *nom, - long *den, long *div, long maxfreq) +static void bestclock(long freq, int *nom, int *den, int *div) { - long n, h, d, f; + int n, d; + long h, diff; - assert(best != NULL); assert(nom != NULL); assert(den != NULL); assert(div != NULL); - assert(maxfreq > 0); *nom = 0; *den = 0; @@ -3070,51 +2923,47 @@ static void bestclock(long freq, long *best, long *nom, if (freq < 8000) freq = 8000; - if (freq > maxfreq) - freq = maxfreq; - - *best = 0; - f = freq * 10; + diff = freq; for (n = 32; n < 128; n++) { - d = (143181 * n) / f; + int s = 0; + + d = (14318 * n) / freq; if ((d >= 7) && (d <= 63)) { - if (d > 31) - d = (d / 2) * 2; - h = (14318 * n) / d; - if (abs(h - freq) < abs(*best - freq)) { - *best = h; + int temp = d; + + if (temp > 31) { + s = 1; + temp >>= 1; + } + h = ((14318 * n) / temp) >> s; + h = h > freq ? h - freq : freq - h; + if (h < diff) { + diff = h; *nom = n; - if (d < 32) { - *den = d; - *div = 0; - } else { - *den = d / 2; - *div = 1; - } + *den = temp; + *div = s; } } - d = DIV_ROUND_UP(143181 * n, f); + d++; if ((d >= 7) && (d <= 63)) { - if (d > 31) - d = (d / 2) * 2; - h = (14318 * n) / d; - if (abs(h - freq) < abs(*best - freq)) { - *best = h; + if (d > 31) { + s = 1; + d >>= 1; + } + h = ((14318 * n) / d) >> s; + h = h > freq ? h - freq : freq - h; + if (h < diff) { + diff = h; *nom = n; - if (d < 32) { - *den = d; - *div = 0; - } else { - *den = d / 2; - *div = 1; - } + *den = d; + *div = s; } } } DPRINTK("Best possible values for given frequency:\n"); - DPRINTK(" best: %ld kHz nom: %ld den: %ld div: %ld\n", + DPRINTK(" freq: %ld kHz nom: %d den: %d div: %d\n", freq, *nom, *den, *div); DPRINTK("EXIT\n"); diff --git a/drivers/video/console/fbcon.c b/drivers/video/console/fbcon.c index da91bb16da8a..93a080e827cc 100644 --- a/drivers/video/console/fbcon.c +++ b/drivers/video/console/fbcon.c @@ -2977,8 +2977,8 @@ static void fbcon_set_all_vcs(struct fb_info *info) p = &fb_display[vc->vc_num]; set_blitting_type(vc, info); var_to_display(p, &info->var, info); - cols = FBCON_SWAP(p->rotate, info->var.xres, info->var.yres); - rows = FBCON_SWAP(p->rotate, info->var.yres, info->var.xres); + cols = FBCON_SWAP(ops->rotate, info->var.xres, info->var.yres); + rows = FBCON_SWAP(ops->rotate, info->var.yres, info->var.xres); cols /= vc->vc_font.width; rows /= vc->vc_font.height; vc_resize(vc, cols, rows); diff --git a/drivers/video/console/vgacon.c b/drivers/video/console/vgacon.c index 6df29a62d720..448d209a0bf2 100644 --- a/drivers/video/console/vgacon.c +++ b/drivers/video/console/vgacon.c @@ -239,8 +239,7 @@ static void vgacon_restore_screen(struct vc_data *c) static int vgacon_scrolldelta(struct vc_data *c, int lines) { - int start, end, count, soff, diff; - void *d, *s; + int start, end, count, soff; if (!lines) { c->vc_visible_origin = c->vc_origin; @@ -287,29 +286,29 @@ static int vgacon_scrolldelta(struct vc_data *c, int lines) if (count > c->vc_rows) count = c->vc_rows; - diff = c->vc_rows - count; + if (count) { + int copysize; - d = (void *) c->vc_origin; - s = (void *) c->vc_screenbuf; + int diff = c->vc_rows - count; + void *d = (void *) c->vc_origin; + void *s = (void *) c->vc_screenbuf; - while (count--) { - scr_memcpyw(d, vgacon_scrollback + soff, c->vc_size_row); - d += c->vc_size_row; - soff += c->vc_size_row; + count *= c->vc_size_row; + /* how much memory to end of buffer left? */ + copysize = min(count, vgacon_scrollback_size - soff); + scr_memcpyw(d, vgacon_scrollback + soff, copysize); + d += copysize; + count -= copysize; - if (soff >= vgacon_scrollback_size) - soff = 0; - } + if (count) { + scr_memcpyw(d, vgacon_scrollback, count); + d += count; + } - if (diff == c->vc_rows) { + if (diff) + scr_memcpyw(d, s, diff * c->vc_size_row); + } else vgacon_cursor(c, CM_MOVE); - } else { - while (diff--) { - scr_memcpyw(d, s, c->vc_size_row); - d += c->vc_size_row; - s += c->vc_size_row; - } - } return 1; } diff --git a/drivers/video/efifb.c b/drivers/video/efifb.c index bd779ae44b1e..daf9b81878a4 100644 --- a/drivers/video/efifb.c +++ b/drivers/video/efifb.c @@ -12,6 +12,7 @@ #include <linux/fb.h> #include <linux/platform_device.h> #include <linux/screen_info.h> +#include <linux/dmi.h> #include <video/vga.h> @@ -33,6 +34,105 @@ static struct fb_fix_screeninfo efifb_fix __initdata = { .visual = FB_VISUAL_TRUECOLOR, }; +enum { + M_I17, /* 17-Inch iMac */ + M_I20, /* 20-Inch iMac */ + M_I20_SR, /* 20-Inch iMac (Santa Rosa) */ + M_I24, /* 24-Inch iMac */ + M_MINI, /* Mac Mini */ + M_MB, /* MacBook */ + M_MB_2, /* MacBook, 2nd rev. */ + M_MB_3, /* MacBook, 3rd rev. */ + M_MB_SR, /* MacBook, 2nd gen, (Santa Rosa) */ + M_MBA, /* MacBook Air */ + M_MBP, /* MacBook Pro */ + M_MBP_2, /* MacBook Pro 2nd gen */ + M_MBP_SR, /* MacBook Pro (Santa Rosa) */ + M_MBP_4, /* MacBook Pro, 4th gen */ + M_UNKNOWN /* placeholder */ +}; + +static struct efifb_dmi_info { + char *optname; + unsigned long base; + int stride; + int width; + int height; +} dmi_list[] = { + [M_I17] = { "i17", 0x80010000, 1472 * 4, 1440, 900 }, + [M_I20] = { "i20", 0x80010000, 1728 * 4, 1680, 1050 }, /* guess */ + [M_I20_SR] = { "imac7", 0x40010000, 1728 * 4, 1680, 1050 }, + [M_I24] = { "i24", 0x80010000, 2048 * 4, 1920, 1200 }, /* guess */ + [M_MINI]= { "mini", 0x80000000, 2048 * 4, 1024, 768 }, + [M_MB] = { "macbook", 0x80000000, 2048 * 4, 1280, 800 }, + [M_MBA] = { "mba", 0x80000000, 2048 * 4, 1280, 800 }, + [M_MBP] = { "mbp", 0x80010000, 1472 * 4, 1440, 900 }, + [M_MBP_2] = { "mbp2", 0, 0, 0, 0 }, /* placeholder */ + [M_MBP_SR] = { "mbp3", 0x80030000, 2048 * 4, 1440, 900 }, + [M_MBP_4] = { "mbp4", 0xc0060000, 2048 * 4, 1920, 1200 }, + [M_UNKNOWN] = { NULL, 0, 0, 0, 0 } +}; + +static int set_system(const struct dmi_system_id *id); + +#define EFIFB_DMI_SYSTEM_ID(vendor, name, enumid) \ + { set_system, name, { \ + DMI_MATCH(DMI_BIOS_VENDOR, vendor), \ + DMI_MATCH(DMI_PRODUCT_NAME, name) }, \ + &dmi_list[enumid] } + +static struct dmi_system_id __initdata dmi_system_table[] = { + EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "iMac4,1", M_I17), + /* At least one of these two will be right; maybe both? */ + EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "iMac5,1", M_I20), + EFIFB_DMI_SYSTEM_ID("Apple Inc.", "iMac5,1", M_I20), + /* At least one of these two will be right; maybe both? */ + EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "iMac6,1", M_I24), + EFIFB_DMI_SYSTEM_ID("Apple Inc.", "iMac6,1", M_I24), + EFIFB_DMI_SYSTEM_ID("Apple Inc.", "iMac7,1", M_I20_SR), + EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "Macmini1,1", M_MINI), + EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "MacBook1,1", M_MB), + /* At least one of these two will be right; maybe both? */ + EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "MacBook2,1", M_MB), + EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBook2,1", M_MB), + /* At least one of these two will be right; maybe both? */ + EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "MacBook3,1", M_MB), + EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBook3,1", M_MB), + EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBook4,1", M_MB), + EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBookAir1,1", M_MBA), + EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "MacBookPro1,1", M_MBP), + EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "MacBookPro2,1", M_MBP_2), + EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBookPro2,1", M_MBP_2), + EFIFB_DMI_SYSTEM_ID("Apple Computer, Inc.", "MacBookPro3,1", M_MBP_SR), + EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBookPro3,1", M_MBP_SR), + EFIFB_DMI_SYSTEM_ID("Apple Inc.", "MacBookPro4,1", M_MBP_4), + {}, +}; + +static int set_system(const struct dmi_system_id *id) +{ + struct efifb_dmi_info *info = id->driver_data; + if (info->base == 0) + return -ENODEV; + + printk(KERN_INFO "efifb: dmi detected %s - framebuffer at %p " + "(%dx%d, stride %d)\n", id->ident, + (void *)info->base, info->width, info->height, + info->stride); + + /* Trust the bootloader over the DMI tables */ + if (screen_info.lfb_base == 0) + screen_info.lfb_base = info->base; + if (screen_info.lfb_linelength == 0) + screen_info.lfb_linelength = info->stride; + if (screen_info.lfb_width == 0) + screen_info.lfb_width = info->width; + if (screen_info.lfb_height == 0) + screen_info.lfb_height = info->height; + + return 0; +} + static int efifb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue, unsigned transp, struct fb_info *info) @@ -67,6 +167,38 @@ static struct fb_ops efifb_ops = { .fb_imageblit = cfb_imageblit, }; +static int __init efifb_setup(char *options) +{ + char *this_opt; + int i; + + if (!options || !*options) + return 0; + + while ((this_opt = strsep(&options, ",")) != NULL) { + if (!*this_opt) continue; + + for (i = 0; i < M_UNKNOWN; i++) { + if (!strcmp(this_opt, dmi_list[i].optname) && + dmi_list[i].base != 0) { + screen_info.lfb_base = dmi_list[i].base; + screen_info.lfb_linelength = dmi_list[i].stride; + screen_info.lfb_width = dmi_list[i].width; + screen_info.lfb_height = dmi_list[i].height; + } + } + if (!strncmp(this_opt, "base:", 5)) + screen_info.lfb_base = simple_strtoul(this_opt+5, NULL, 0); + else if (!strncmp(this_opt, "stride:", 7)) + screen_info.lfb_linelength = simple_strtoul(this_opt+7, NULL, 0) * 4; + else if (!strncmp(this_opt, "height:", 7)) + screen_info.lfb_height = simple_strtoul(this_opt+7, NULL, 0); + else if (!strncmp(this_opt, "width:", 6)) + screen_info.lfb_width = simple_strtoul(this_opt+6, NULL, 0); + } + return 0; +} + static int __init efifb_probe(struct platform_device *dev) { struct fb_info *info; @@ -74,6 +206,26 @@ static int __init efifb_probe(struct platform_device *dev) unsigned int size_vmode; unsigned int size_remap; unsigned int size_total; + int request_succeeded = 0; + + printk(KERN_INFO "efifb: probing for efifb\n"); + + if (!screen_info.lfb_depth) + screen_info.lfb_depth = 32; + if (!screen_info.pages) + screen_info.pages = 1; + + /* just assume they're all unset if any are */ + if (!screen_info.blue_size) { + screen_info.blue_size = 8; + screen_info.blue_pos = 0; + screen_info.green_size = 8; + screen_info.green_pos = 8; + screen_info.red_size = 8; + screen_info.red_pos = 16; + screen_info.rsvd_size = 8; + screen_info.rsvd_pos = 24; + } efifb_fix.smem_start = screen_info.lfb_base; efifb_defined.bits_per_pixel = screen_info.lfb_depth; @@ -98,21 +250,25 @@ static int __init efifb_probe(struct platform_device *dev) * option to simply use size_total as that * wastes plenty of kernel address space. */ size_remap = size_vmode * 2; - if (size_remap < size_vmode) - size_remap = size_vmode; if (size_remap > size_total) size_remap = size_total; + if (size_remap % PAGE_SIZE) + size_remap += PAGE_SIZE - (size_remap % PAGE_SIZE); efifb_fix.smem_len = size_remap; - if (!request_mem_region(efifb_fix.smem_start, size_total, "efifb")) + if (request_mem_region(efifb_fix.smem_start, size_remap, "efifb")) { + request_succeeded = 1; + } else { /* We cannot make this fatal. Sometimes this comes from magic spaces our resource handlers simply don't know about */ printk(KERN_WARNING "efifb: cannot reserve video memory at 0x%lx\n", efifb_fix.smem_start); + } info = framebuffer_alloc(sizeof(u32) * 16, &dev->dev); if (!info) { + printk(KERN_ERR "efifb: cannot allocate framebuffer\n"); err = -ENOMEM; goto err_release_mem; } @@ -125,7 +281,7 @@ static int __init efifb_probe(struct platform_device *dev) "0x%x @ 0x%lx\n", efifb_fix.smem_len, efifb_fix.smem_start); err = -EIO; - goto err_unmap; + goto err_release_fb; } printk(KERN_INFO "efifb: framebuffer at 0x%lx, mapped to 0x%p, " @@ -178,25 +334,27 @@ static int __init efifb_probe(struct platform_device *dev) info->fix = efifb_fix; info->flags = FBINFO_FLAG_DEFAULT; - if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) { - err = -ENOMEM; + if ((err = fb_alloc_cmap(&info->cmap, 256, 0)) < 0) { + printk(KERN_ERR "efifb: cannot allocate colormap\n"); goto err_unmap; } - if (register_framebuffer(info) < 0) { - err = -EINVAL; + if ((err = register_framebuffer(info)) < 0) { + printk(KERN_ERR "efifb: cannot register framebuffer\n"); goto err_fb_dealoc; } printk(KERN_INFO "fb%d: %s frame buffer device\n", - info->node, info->fix.id); + info->node, info->fix.id); return 0; err_fb_dealoc: fb_dealloc_cmap(&info->cmap); err_unmap: iounmap(info->screen_base); +err_release_fb: framebuffer_release(info); err_release_mem: - release_mem_region(efifb_fix.smem_start, size_total); + if (request_succeeded) + release_mem_region(efifb_fix.smem_start, size_total); return err; } @@ -214,9 +372,22 @@ static struct platform_device efifb_device = { static int __init efifb_init(void) { int ret; + char *option = NULL; if (screen_info.orig_video_isVGA != VIDEO_TYPE_EFI) return -ENODEV; + dmi_check_system(dmi_system_table); + + if (fb_get_options("efifb", &option)) + return -ENODEV; + efifb_setup(option); + + /* We don't get linelength from UGA Draw Protocol, only from + * EFI Graphics Protocol. So if it's not in DMI, and it's not + * passed in from the user, we really can't use the framebuffer. + */ + if (!screen_info.lfb_linelength) + return -ENODEV; ret = platform_driver_register(&efifb_driver); diff --git a/drivers/video/fbmon.c b/drivers/video/fbmon.c index 6a0aa180c266..5c1a2c01778f 100644 --- a/drivers/video/fbmon.c +++ b/drivers/video/fbmon.c @@ -564,7 +564,13 @@ static void get_detailed_timing(unsigned char *block, mode->sync |= FB_SYNC_VERT_HIGH_ACT; mode->refresh = PIXEL_CLOCK/((H_ACTIVE + H_BLANKING) * (V_ACTIVE + V_BLANKING)); - mode->vmode = 0; + if (INTERLACED) { + mode->yres *= 2; + mode->upper_margin *= 2; + mode->lower_margin *= 2; + mode->vsync_len *= 2; + mode->vmode |= FB_VMODE_INTERLACED; + } mode->flag = FB_MODE_IS_DETAILED; DPRINTK(" %d MHz ", PIXEL_CLOCK/1000000); diff --git a/drivers/video/imacfb.c b/drivers/video/imacfb.c index 9366ef2bb5f7..e69de29bb2d1 100644 --- a/drivers/video/imacfb.c +++ b/drivers/video/imacfb.c @@ -1,376 +0,0 @@ -/* - * framebuffer driver for Intel Based Mac's - * - * (c) 2006 Edgar Hucek <gimli@dark-green.com> - * Original imac driver written by Gerd Knorr <kraxel@goldbach.in-berlin.de> - * - */ - -#include <linux/delay.h> -#include <linux/errno.h> -#include <linux/fb.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/ioport.h> -#include <linux/mm.h> -#include <linux/module.h> -#include <linux/platform_device.h> -#include <linux/screen_info.h> -#include <linux/slab.h> -#include <linux/string.h> -#include <linux/dmi.h> -#include <linux/efi.h> - -#include <asm/io.h> - -#include <video/vga.h> - -typedef enum _MAC_TYPE { - M_I17, - M_I20, - M_MINI, - M_MACBOOK, - M_UNKNOWN -} MAC_TYPE; - -/* --------------------------------------------------------------------- */ - -static struct fb_var_screeninfo imacfb_defined __initdata = { - .activate = FB_ACTIVATE_NOW, - .height = -1, - .width = -1, - .right_margin = 32, - .upper_margin = 16, - .lower_margin = 4, - .vsync_len = 4, - .vmode = FB_VMODE_NONINTERLACED, -}; - -static struct fb_fix_screeninfo imacfb_fix __initdata = { - .id = "IMAC VGA", - .type = FB_TYPE_PACKED_PIXELS, - .accel = FB_ACCEL_NONE, - .visual = FB_VISUAL_TRUECOLOR, -}; - -static int inverse; -static int model = M_UNKNOWN; -static int manual_height; -static int manual_width; - -static int set_system(const struct dmi_system_id *id) -{ - printk(KERN_INFO "imacfb: %s detected - set system to %ld\n", - id->ident, (long)id->driver_data); - - model = (long)id->driver_data; - - return 0; -} - -static struct dmi_system_id __initdata dmi_system_table[] = { - { set_system, "iMac4,1", { - DMI_MATCH(DMI_BIOS_VENDOR,"Apple Computer, Inc."), - DMI_MATCH(DMI_PRODUCT_NAME,"iMac4,1") }, (void*)M_I17}, - { set_system, "MacBookPro1,1", { - DMI_MATCH(DMI_BIOS_VENDOR,"Apple Computer, Inc."), - DMI_MATCH(DMI_PRODUCT_NAME,"MacBookPro1,1") }, (void*)M_I17}, - { set_system, "MacBook1,1", { - DMI_MATCH(DMI_BIOS_VENDOR,"Apple Computer, Inc."), - DMI_MATCH(DMI_PRODUCT_NAME,"MacBook1,1")}, (void *)M_MACBOOK}, - { set_system, "Macmini1,1", { - DMI_MATCH(DMI_BIOS_VENDOR,"Apple Computer, Inc."), - DMI_MATCH(DMI_PRODUCT_NAME,"Macmini1,1")}, (void *)M_MINI}, - {}, -}; - -#define DEFAULT_FB_MEM 1024*1024*16 - -/* --------------------------------------------------------------------- */ - -static int imacfb_setcolreg(unsigned regno, unsigned red, unsigned green, - unsigned blue, unsigned transp, - struct fb_info *info) -{ - /* - * Set a single color register. The values supplied are - * already rounded down to the hardware's capabilities - * (according to the entries in the `var' structure). Return - * != 0 for invalid regno. - */ - - if (regno >= info->cmap.len) - return 1; - - if (regno < 16) { - red >>= 8; - green >>= 8; - blue >>= 8; - ((u32 *)(info->pseudo_palette))[regno] = - (red << info->var.red.offset) | - (green << info->var.green.offset) | - (blue << info->var.blue.offset); - } - return 0; -} - -static struct fb_ops imacfb_ops = { - .owner = THIS_MODULE, - .fb_setcolreg = imacfb_setcolreg, - .fb_fillrect = cfb_fillrect, - .fb_copyarea = cfb_copyarea, - .fb_imageblit = cfb_imageblit, -}; - -static int __init imacfb_setup(char *options) -{ - char *this_opt; - - if (!options || !*options) - return 0; - - while ((this_opt = strsep(&options, ",")) != NULL) { - if (!*this_opt) continue; - - if (!strcmp(this_opt, "inverse")) - inverse = 1; - else if (!strcmp(this_opt, "i17")) - model = M_I17; - else if (!strcmp(this_opt, "i20")) - model = M_I20; - else if (!strcmp(this_opt, "mini")) - model = M_MINI; - else if (!strcmp(this_opt, "macbook")) - model = M_MACBOOK; - else if (!strncmp(this_opt, "height:", 7)) - manual_height = simple_strtoul(this_opt+7, NULL, 0); - else if (!strncmp(this_opt, "width:", 6)) - manual_width = simple_strtoul(this_opt+6, NULL, 0); - } - return 0; -} - -static int __init imacfb_probe(struct platform_device *dev) -{ - struct fb_info *info; - int err; - unsigned int size_vmode; - unsigned int size_remap; - unsigned int size_total; - - screen_info.lfb_depth = 32; - screen_info.lfb_size = DEFAULT_FB_MEM / 0x10000; - screen_info.pages=1; - screen_info.blue_size = 8; - screen_info.blue_pos = 0; - screen_info.green_size = 8; - screen_info.green_pos = 8; - screen_info.red_size = 8; - screen_info.red_pos = 16; - screen_info.rsvd_size = 8; - screen_info.rsvd_pos = 24; - - switch (model) { - case M_I17: - screen_info.lfb_width = 1440; - screen_info.lfb_height = 900; - screen_info.lfb_linelength = 1472 * 4; - screen_info.lfb_base = 0x80010000; - break; - case M_I20: - screen_info.lfb_width = 1680; - screen_info.lfb_height = 1050; - screen_info.lfb_linelength = 1728 * 4; - screen_info.lfb_base = 0x80010000; - break; - case M_MINI: - screen_info.lfb_width = 1024; - screen_info.lfb_height = 768; - screen_info.lfb_linelength = 2048 * 4; - screen_info.lfb_base = 0x80000000; - break; - case M_MACBOOK: - screen_info.lfb_width = 1280; - screen_info.lfb_height = 800; - screen_info.lfb_linelength = 2048 * 4; - screen_info.lfb_base = 0x80000000; - break; - } - - /* if the user wants to manually specify height/width, - we will override the defaults */ - /* TODO: eventually get auto-detection working */ - if (manual_height > 0) - screen_info.lfb_height = manual_height; - if (manual_width > 0) - screen_info.lfb_width = manual_width; - - imacfb_fix.smem_start = screen_info.lfb_base; - imacfb_defined.bits_per_pixel = screen_info.lfb_depth; - imacfb_defined.xres = screen_info.lfb_width; - imacfb_defined.yres = screen_info.lfb_height; - imacfb_fix.line_length = screen_info.lfb_linelength; - - /* size_vmode -- that is the amount of memory needed for the - * used video mode, i.e. the minimum amount of - * memory we need. */ - size_vmode = imacfb_defined.yres * imacfb_fix.line_length; - - /* size_total -- all video memory we have. Used for - * entries, ressource allocation and bounds - * checking. */ - size_total = screen_info.lfb_size * 65536; - if (size_total < size_vmode) - size_total = size_vmode; - - /* size_remap -- the amount of video memory we are going to - * use for imacfb. With modern cards it is no - * option to simply use size_total as that - * wastes plenty of kernel address space. */ - size_remap = size_vmode * 2; - if (size_remap < size_vmode) - size_remap = size_vmode; - if (size_remap > size_total) - size_remap = size_total; - imacfb_fix.smem_len = size_remap; - - if (!request_mem_region(imacfb_fix.smem_start, size_total, "imacfb")) { - printk(KERN_WARNING - "imacfb: cannot reserve video memory at 0x%lx\n", - imacfb_fix.smem_start); - /* We cannot make this fatal. Sometimes this comes from magic - spaces our resource handlers simply don't know about */ - } - - info = framebuffer_alloc(sizeof(u32) * 16, &dev->dev); - if (!info) { - err = -ENOMEM; - goto err_release_mem; - } - info->pseudo_palette = info->par; - info->par = NULL; - - info->screen_base = ioremap(imacfb_fix.smem_start, imacfb_fix.smem_len); - if (!info->screen_base) { - printk(KERN_ERR "imacfb: abort, cannot ioremap video memory " - "0x%x @ 0x%lx\n", - imacfb_fix.smem_len, imacfb_fix.smem_start); - err = -EIO; - goto err_unmap; - } - - printk(KERN_INFO "imacfb: framebuffer at 0x%lx, mapped to 0x%p, " - "using %dk, total %dk\n", - imacfb_fix.smem_start, info->screen_base, - size_remap/1024, size_total/1024); - printk(KERN_INFO "imacfb: mode is %dx%dx%d, linelength=%d, pages=%d\n", - imacfb_defined.xres, imacfb_defined.yres, - imacfb_defined.bits_per_pixel, imacfb_fix.line_length, - screen_info.pages); - - imacfb_defined.xres_virtual = imacfb_defined.xres; - imacfb_defined.yres_virtual = imacfb_fix.smem_len / - imacfb_fix.line_length; - printk(KERN_INFO "imacfb: scrolling: redraw\n"); - imacfb_defined.yres_virtual = imacfb_defined.yres; - - /* some dummy values for timing to make fbset happy */ - imacfb_defined.pixclock = 10000000 / imacfb_defined.xres * - 1000 / imacfb_defined.yres; - imacfb_defined.left_margin = (imacfb_defined.xres / 8) & 0xf8; - imacfb_defined.hsync_len = (imacfb_defined.xres / 8) & 0xf8; - - imacfb_defined.red.offset = screen_info.red_pos; - imacfb_defined.red.length = screen_info.red_size; - imacfb_defined.green.offset = screen_info.green_pos; - imacfb_defined.green.length = screen_info.green_size; - imacfb_defined.blue.offset = screen_info.blue_pos; - imacfb_defined.blue.length = screen_info.blue_size; - imacfb_defined.transp.offset = screen_info.rsvd_pos; - imacfb_defined.transp.length = screen_info.rsvd_size; - - printk(KERN_INFO "imacfb: %s: " - "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n", - "Truecolor", - screen_info.rsvd_size, - screen_info.red_size, - screen_info.green_size, - screen_info.blue_size, - screen_info.rsvd_pos, - screen_info.red_pos, - screen_info.green_pos, - screen_info.blue_pos); - - imacfb_fix.ypanstep = 0; - imacfb_fix.ywrapstep = 0; - - /* request failure does not faze us, as vgacon probably has this - * region already (FIXME) */ - request_region(0x3c0, 32, "imacfb"); - - info->fbops = &imacfb_ops; - info->var = imacfb_defined; - info->fix = imacfb_fix; - info->flags = FBINFO_FLAG_DEFAULT; - - if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) { - err = -ENOMEM; - goto err_unmap; - } - if (register_framebuffer(info)<0) { - err = -EINVAL; - goto err_fb_dealoc; - } - printk(KERN_INFO "fb%d: %s frame buffer device\n", - info->node, info->fix.id); - return 0; - -err_fb_dealoc: - fb_dealloc_cmap(&info->cmap); -err_unmap: - iounmap(info->screen_base); - framebuffer_release(info); -err_release_mem: - release_mem_region(imacfb_fix.smem_start, size_total); - return err; -} - -static struct platform_driver imacfb_driver = { - .probe = imacfb_probe, - .driver = { - .name = "imacfb", - }, -}; - -static struct platform_device imacfb_device = { - .name = "imacfb", -}; - -static int __init imacfb_init(void) -{ - int ret; - char *option = NULL; - - if (!efi_enabled) - return -ENODEV; - if (!dmi_check_system(dmi_system_table)) - return -ENODEV; - if (model == M_UNKNOWN) - return -ENODEV; - - if (fb_get_options("imacfb", &option)) - return -ENODEV; - - imacfb_setup(option); - ret = platform_driver_register(&imacfb_driver); - - if (!ret) { - ret = platform_device_register(&imacfb_device); - if (ret) - platform_driver_unregister(&imacfb_driver); - } - return ret; -} -module_init(imacfb_init); - -MODULE_LICENSE("GPL"); diff --git a/drivers/video/intelfb/intelfb.h b/drivers/video/intelfb/intelfb.h index 3325fbd68ab3..a50bea614804 100644 --- a/drivers/video/intelfb/intelfb.h +++ b/drivers/video/intelfb/intelfb.h @@ -12,9 +12,9 @@ #endif /*** Version/name ***/ -#define INTELFB_VERSION "0.9.5" +#define INTELFB_VERSION "0.9.6" #define INTELFB_MODULE_NAME "intelfb" -#define SUPPORTED_CHIPSETS "830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/965G/965GM" +#define SUPPORTED_CHIPSETS "830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM/945GME/965G/965GM" /*** Debug/feature defines ***/ @@ -58,6 +58,7 @@ #define PCI_DEVICE_ID_INTEL_915GM 0x2592 #define PCI_DEVICE_ID_INTEL_945G 0x2772 #define PCI_DEVICE_ID_INTEL_945GM 0x27A2 +#define PCI_DEVICE_ID_INTEL_945GME 0x27AE #define PCI_DEVICE_ID_INTEL_965G 0x29A2 #define PCI_DEVICE_ID_INTEL_965GM 0x2A02 @@ -160,6 +161,7 @@ enum intel_chips { INTEL_915GM, INTEL_945G, INTEL_945GM, + INTEL_945GME, INTEL_965G, INTEL_965GM, }; @@ -363,6 +365,7 @@ struct intelfb_info { ((dinfo)->chipset == INTEL_915GM) || \ ((dinfo)->chipset == INTEL_945G) || \ ((dinfo)->chipset == INTEL_945GM) || \ + ((dinfo)->chipset == INTEL_945GME) || \ ((dinfo)->chipset == INTEL_965G) || \ ((dinfo)->chipset == INTEL_965GM)) diff --git a/drivers/video/intelfb/intelfb_i2c.c b/drivers/video/intelfb/intelfb_i2c.c index fcf9fadbf572..5d896b81f4e0 100644 --- a/drivers/video/intelfb/intelfb_i2c.c +++ b/drivers/video/intelfb/intelfb_i2c.c @@ -171,6 +171,7 @@ void intelfb_create_i2c_busses(struct intelfb_info *dinfo) /* has some LVDS + tv-out */ case INTEL_945G: case INTEL_945GM: + case INTEL_945GME: case INTEL_965G: case INTEL_965GM: /* SDVO ports have a single control bus - 2 devices */ diff --git a/drivers/video/intelfb/intelfbdrv.c b/drivers/video/intelfb/intelfbdrv.c index e44303f9bc52..a09e23649357 100644 --- a/drivers/video/intelfb/intelfbdrv.c +++ b/drivers/video/intelfb/intelfbdrv.c @@ -2,7 +2,7 @@ * intelfb * * Linux framebuffer driver for Intel(R) 830M/845G/852GM/855GM/865G/915G/915GM/ - * 945G/945GM/965G/965GM integrated graphics chips. + * 945G/945GM/945GME/965G/965GM integrated graphics chips. * * Copyright © 2002, 2003 David Dawes <dawes@xfree86.org> * 2004 Sylvain Meyer @@ -102,6 +102,9 @@ * * 04/2008 - Version 0.9.5 * Add support for 965G/965GM. (Maik Broemme <mbroemme@plusserver.de>) + * + * 08/2008 - Version 0.9.6 + * Add support for 945GME. (Phil Endecott <spam_from_intelfb@chezphil.org>) */ #include <linux/module.h> @@ -183,6 +186,7 @@ static struct pci_device_id intelfb_pci_table[] __devinitdata = { { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_915GM, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_915GM }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_945G, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_945G }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_945GM, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_945GM }, + { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_945GME, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_945GME }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_965G, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_965G }, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_965GM, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, INTELFB_CLASS_MASK, INTEL_965GM }, { 0, } @@ -555,6 +559,7 @@ static int __devinit intelfb_pci_register(struct pci_dev *pdev, (ent->device == PCI_DEVICE_ID_INTEL_915GM) || (ent->device == PCI_DEVICE_ID_INTEL_945G) || (ent->device == PCI_DEVICE_ID_INTEL_945GM) || + (ent->device == PCI_DEVICE_ID_INTEL_945GME) || (ent->device == PCI_DEVICE_ID_INTEL_965G) || (ent->device == PCI_DEVICE_ID_INTEL_965GM)) { diff --git a/drivers/video/intelfb/intelfbhw.c b/drivers/video/intelfb/intelfbhw.c index 8e6d6a4db0ad..8b26b27c2db6 100644 --- a/drivers/video/intelfb/intelfbhw.c +++ b/drivers/video/intelfb/intelfbhw.c @@ -143,6 +143,12 @@ int intelfbhw_get_chipset(struct pci_dev *pdev, struct intelfb_info *dinfo) dinfo->mobile = 1; dinfo->pll_index = PLLS_I9xx; return 0; + case PCI_DEVICE_ID_INTEL_945GME: + dinfo->name = "Intel(R) 945GME"; + dinfo->chipset = INTEL_945GME; + dinfo->mobile = 1; + dinfo->pll_index = PLLS_I9xx; + return 0; case PCI_DEVICE_ID_INTEL_965G: dinfo->name = "Intel(R) 965G"; dinfo->chipset = INTEL_965G; @@ -186,6 +192,7 @@ int intelfbhw_get_memory(struct pci_dev *pdev, int *aperture_size, case PCI_DEVICE_ID_INTEL_915GM: case PCI_DEVICE_ID_INTEL_945G: case PCI_DEVICE_ID_INTEL_945GM: + case PCI_DEVICE_ID_INTEL_945GME: case PCI_DEVICE_ID_INTEL_965G: case PCI_DEVICE_ID_INTEL_965GM: /* 915, 945 and 965 chipsets support a 256MB aperture. diff --git a/drivers/video/matrox/matroxfb_base.c b/drivers/video/matrox/matroxfb_base.c index c02136202792..8e7a275df50c 100644 --- a/drivers/video/matrox/matroxfb_base.c +++ b/drivers/video/matrox/matroxfb_base.c @@ -1453,6 +1453,13 @@ static struct board { MGA_G100, &vbG100, "MGA-G100 (AGP)"}, + {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200EV_PCI, 0xFF, + 0, 0, + DEVF_G200, + 230000, + MGA_G200, + &vbG200, + "MGA-G200eV (PCI)"}, {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF, 0, 0, DEVF_G200, @@ -2118,6 +2125,8 @@ static struct pci_device_id matroxfb_devices[] = { PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, + {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200EV_PCI, + PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, diff --git a/drivers/video/neofb.c b/drivers/video/neofb.c index 25172b2a2a94..bfb802d26d5a 100644 --- a/drivers/video/neofb.c +++ b/drivers/video/neofb.c @@ -426,11 +426,11 @@ static void vgaHWProtect(int on) { unsigned char tmp; + tmp = vga_rseq(NULL, 0x01); if (on) { /* * Turn off screen and disable sequencer. */ - tmp = vga_rseq(NULL, 0x01); vga_wseq(NULL, 0x00, 0x01); /* Synchronous Reset */ vga_wseq(NULL, 0x01, tmp | 0x20); /* disable the display */ @@ -439,7 +439,6 @@ static void vgaHWProtect(int on) /* * Reenable sequencer, then turn on screen. */ - tmp = vga_rseq(NULL, 0x01); vga_wseq(NULL, 0x01, tmp & ~0x20); /* reenable display */ vga_wseq(NULL, 0x00, 0x03); /* clear synchronousreset */ @@ -558,14 +557,12 @@ neofb_open(struct fb_info *info, int user) { struct neofb_par *par = info->par; - mutex_lock(&par->open_lock); if (!par->ref_count) { memset(&par->state, 0, sizeof(struct vgastate)); par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS; save_vga(&par->state); } par->ref_count++; - mutex_unlock(&par->open_lock); return 0; } @@ -575,16 +572,13 @@ neofb_release(struct fb_info *info, int user) { struct neofb_par *par = info->par; - mutex_lock(&par->open_lock); - if (!par->ref_count) { - mutex_unlock(&par->open_lock); + if (!par->ref_count) return -EINVAL; - } + if (par->ref_count == 1) { restore_vga(&par->state); } par->ref_count--; - mutex_unlock(&par->open_lock); return 0; } @@ -648,10 +642,10 @@ neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) var->blue.msb_right = 0; var->transp.msb_right = 0; + var->transp.offset = 0; + var->transp.length = 0; switch (var->bits_per_pixel) { case 8: /* PSEUDOCOLOUR, 256 */ - var->transp.offset = 0; - var->transp.length = 0; var->red.offset = 0; var->red.length = 8; var->green.offset = 0; @@ -661,8 +655,6 @@ neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) break; case 16: /* DIRECTCOLOUR, 64k */ - var->transp.offset = 0; - var->transp.length = 0; var->red.offset = 11; var->red.length = 5; var->green.offset = 5; @@ -672,8 +664,6 @@ neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) break; case 24: /* TRUECOLOUR, 16m */ - var->transp.offset = 0; - var->transp.length = 0; var->red.offset = 16; var->red.length = 8; var->green.offset = 8; @@ -704,8 +694,6 @@ neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) if (vramlen > 4 * 1024 * 1024) vramlen = 4 * 1024 * 1024; - if (var->yres_virtual < var->yres) - var->yres_virtual = var->yres; if (var->xres_virtual < var->xres) var->xres_virtual = var->xres; @@ -722,8 +710,6 @@ neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) if it was possible. We should return -EINVAL, but I disagree */ if (var->yres_virtual < var->yres) var->yres = var->yres_virtual; - if (var->xres_virtual < var->xres) - var->xres = var->xres_virtual; if (var->xoffset + var->xres > var->xres_virtual) var->xoffset = var->xres_virtual - var->xres; if (var->yoffset + var->yres > var->yres_virtual) @@ -1186,8 +1172,11 @@ static int neofb_set_par(struct fb_info *info) return 0; } -static void neofb_update_start(struct fb_info *info, - struct fb_var_screeninfo *var) +/* + * Pan or Wrap the Display + */ +static int neofb_pan_display(struct fb_var_screeninfo *var, + struct fb_info *info) { struct neofb_par *par = info->par; struct vgastate *state = &par->state; @@ -1216,35 +1205,7 @@ static void neofb_update_start(struct fb_info *info, vga_wgfx(state->vgabase, 0x0E, (((Base >> 16) & 0x0f) | (oldExtCRTDispAddr & 0xf0))); neoLock(state); -} - -/* - * Pan or Wrap the Display - */ -static int neofb_pan_display(struct fb_var_screeninfo *var, - struct fb_info *info) -{ - u_int y_bottom; - - y_bottom = var->yoffset; - - if (!(var->vmode & FB_VMODE_YWRAP)) - y_bottom += var->yres; - if (var->xoffset > (var->xres_virtual - var->xres)) - return -EINVAL; - if (y_bottom > info->var.yres_virtual) - return -EINVAL; - - neofb_update_start(info, var); - - info->var.xoffset = var->xoffset; - info->var.yoffset = var->yoffset; - - if (var->vmode & FB_VMODE_YWRAP) - info->var.vmode |= FB_VMODE_YWRAP; - else - info->var.vmode &= ~FB_VMODE_YWRAP; return 0; } @@ -1992,7 +1953,6 @@ static struct fb_info *__devinit neo_alloc_fb_info(struct pci_dev *dev, const st info->fix.accel = id->driver_data; - mutex_init(&par->open_lock); par->pci_burst = !nopciburst; par->lcd_stretch = !nostretch; par->libretto = libretto; diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c index 6efcf89e7fbe..dfb72f5e4c96 100644 --- a/drivers/video/omap/dispc.c +++ b/drivers/video/omap/dispc.c @@ -156,7 +156,7 @@ struct resmap { }; static struct { - u32 base; + void __iomem *base; struct omapfb_mem_desc mem_desc; struct resmap *res_map[DISPC_MEMTYPE_NUM]; @@ -212,9 +212,9 @@ static void enable_rfbi_mode(int enable) dispc_write_reg(DISPC_CONTROL, l); /* Set bypass mode in RFBI module */ - l = __raw_readl(io_p2v(RFBI_CONTROL)); + l = __raw_readl(IO_ADDRESS(RFBI_CONTROL)); l |= enable ? 0 : (1 << 1); - __raw_writel(l, io_p2v(RFBI_CONTROL)); + __raw_writel(l, IO_ADDRESS(RFBI_CONTROL)); } static void set_lcd_data_lines(int data_lines) @@ -1349,14 +1349,19 @@ static int omap_dispc_init(struct omapfb_device *fbdev, int ext_mode, memset(&dispc, 0, sizeof(dispc)); - dispc.base = io_p2v(DISPC_BASE); + dispc.base = ioremap(DISPC_BASE, SZ_1K); + if (!dispc.base) { + dev_err(fbdev->dev, "can't ioremap DISPC\n"); + return -ENOMEM; + } + dispc.fbdev = fbdev; dispc.ext_mode = ext_mode; init_completion(&dispc.frame_done); if ((r = get_dss_clocks()) < 0) - return r; + goto fail0; enable_interface_clocks(1); enable_lcd_clocks(1); @@ -1414,7 +1419,7 @@ static int omap_dispc_init(struct omapfb_device *fbdev, int ext_mode, } /* L3 firewall setting: enable access to OCM RAM */ - __raw_writel(0x402000b0, io_p2v(0x680050a0)); + __raw_writel(0x402000b0, IO_ADDRESS(0x680050a0)); if ((r = alloc_palette_ram()) < 0) goto fail2; @@ -1464,7 +1469,8 @@ fail1: enable_lcd_clocks(0); enable_interface_clocks(0); put_dss_clocks(); - +fail0: + iounmap(dispc.base); return r; } @@ -1481,6 +1487,7 @@ static void omap_dispc_cleanup(void) free_irq(INT_24XX_DSS_IRQ, dispc.fbdev); enable_interface_clocks(0); put_dss_clocks(); + iounmap(dispc.base); } const struct lcd_ctrl omap2_int_ctrl = { diff --git a/drivers/video/omap/dispc.h b/drivers/video/omap/dispc.h index eb1512b56ce8..ef720a78f6d5 100644 --- a/drivers/video/omap/dispc.h +++ b/drivers/video/omap/dispc.h @@ -40,4 +40,6 @@ extern void omap_dispc_enable_digit_out(int enable); extern int omap_dispc_request_irq(void (*callback)(void *data), void *data); extern void omap_dispc_free_irq(void); +extern const struct lcd_ctrl omap2_int_ctrl; + #endif diff --git a/drivers/video/omap/lcd_h4.c b/drivers/video/omap/lcd_h4.c index 88c19d424ef7..6ff56430341b 100644 --- a/drivers/video/omap/lcd_h4.c +++ b/drivers/video/omap/lcd_h4.c @@ -47,7 +47,7 @@ static unsigned long h4_panel_get_caps(struct lcd_panel *panel) return 0; } -struct lcd_panel h4_panel = { +static struct lcd_panel h4_panel = { .name = "h4", .config = OMAP_LCDC_PANEL_TFT, @@ -91,7 +91,7 @@ static int h4_panel_resume(struct platform_device *pdev) return 0; } -struct platform_driver h4_panel_driver = { +static struct platform_driver h4_panel_driver = { .probe = h4_panel_probe, .remove = h4_panel_remove, .suspend = h4_panel_suspend, diff --git a/drivers/video/omap/lcd_inn1610.c b/drivers/video/omap/lcd_inn1610.c index 6a42c6a0cd99..4c4f7ee6d733 100644 --- a/drivers/video/omap/lcd_inn1610.c +++ b/drivers/video/omap/lcd_inn1610.c @@ -32,43 +32,43 @@ static int innovator1610_panel_init(struct lcd_panel *panel, { int r = 0; - if (omap_request_gpio(14)) { + if (gpio_request(14, "lcd_en0")) { pr_err(MODULE_NAME ": can't request GPIO 14\n"); r = -1; goto exit; } - if (omap_request_gpio(15)) { + if (gpio_request(15, "lcd_en1")) { pr_err(MODULE_NAME ": can't request GPIO 15\n"); - omap_free_gpio(14); + gpio_free(14); r = -1; goto exit; } /* configure GPIO(14, 15) as outputs */ - omap_set_gpio_direction(14, 0); - omap_set_gpio_direction(15, 0); + gpio_direction_output(14, 0); + gpio_direction_output(15, 0); exit: return r; } static void innovator1610_panel_cleanup(struct lcd_panel *panel) { - omap_free_gpio(15); - omap_free_gpio(14); + gpio_free(15); + gpio_free(14); } static int innovator1610_panel_enable(struct lcd_panel *panel) { /* set GPIO14 and GPIO15 high */ - omap_set_gpio_dataout(14, 1); - omap_set_gpio_dataout(15, 1); + gpio_set_value(14, 1); + gpio_set_value(15, 1); return 0; } static void innovator1610_panel_disable(struct lcd_panel *panel) { /* set GPIO13, GPIO14 and GPIO15 low */ - omap_set_gpio_dataout(14, 0); - omap_set_gpio_dataout(15, 0); + gpio_set_value(14, 0); + gpio_set_value(15, 0); } static unsigned long innovator1610_panel_get_caps(struct lcd_panel *panel) diff --git a/drivers/video/omap/lcd_osk.c b/drivers/video/omap/lcd_osk.c index a4a725f427a4..379c96d36da5 100644 --- a/drivers/video/omap/lcd_osk.c +++ b/drivers/video/omap/lcd_osk.c @@ -29,6 +29,7 @@ static int osk_panel_init(struct lcd_panel *panel, struct omapfb_device *fbdev) { + /* gpio2 was allocated in board init */ return 0; } @@ -47,11 +48,8 @@ static int osk_panel_enable(struct lcd_panel *panel) /* Set PWL level */ omap_writeb(0xFF, OMAP_PWL_ENABLE); - /* configure GPIO2 as output */ - omap_set_gpio_direction(2, 0); - - /* set GPIO2 high */ - omap_set_gpio_dataout(2, 1); + /* set GPIO2 high (lcd power enabled) */ + gpio_set_value(2, 1); return 0; } @@ -65,7 +63,7 @@ static void osk_panel_disable(struct lcd_panel *panel) omap_writeb(0x00, OMAP_PWL_CLK_ENABLE); /* set GPIO2 low */ - omap_set_gpio_dataout(2, 0); + gpio_set_value(2, 0); } static unsigned long osk_panel_get_caps(struct lcd_panel *panel) diff --git a/drivers/video/omap/lcd_sx1.c b/drivers/video/omap/lcd_sx1.c index caa6a896cb8b..e55de201b8ff 100644 --- a/drivers/video/omap/lcd_sx1.c +++ b/drivers/video/omap/lcd_sx1.c @@ -81,21 +81,21 @@ static void epson_sendbyte(int flag, unsigned char byte) int i, shifter = 0x80; if (!flag) - omap_set_gpio_dataout(_A_LCD_SSC_A0, 0); + gpio_set_value(_A_LCD_SSC_A0, 0); mdelay(2); - omap_set_gpio_dataout(A_LCD_SSC_RD, 1); + gpio_set_value(A_LCD_SSC_RD, 1); - omap_set_gpio_dataout(A_LCD_SSC_SD, flag); + gpio_set_value(A_LCD_SSC_SD, flag); OMAP_MCBSP_WRITE(OMAP1510_MCBSP3_BASE, PCR0, 0x2200); OMAP_MCBSP_WRITE(OMAP1510_MCBSP3_BASE, PCR0, 0x2202); for (i = 0; i < 8; i++) { OMAP_MCBSP_WRITE(OMAP1510_MCBSP3_BASE, PCR0, 0x2200); - omap_set_gpio_dataout(A_LCD_SSC_SD, shifter & byte); + gpio_set_value(A_LCD_SSC_SD, shifter & byte); OMAP_MCBSP_WRITE(OMAP1510_MCBSP3_BASE, PCR0, 0x2202); shifter >>= 1; } - omap_set_gpio_dataout(_A_LCD_SSC_A0, 1); + gpio_set_value(_A_LCD_SSC_A0, 1); } static void init_system(void) @@ -107,25 +107,18 @@ static void init_system(void) static void setup_GPIO(void) { /* new wave */ - omap_request_gpio(A_LCD_SSC_RD); - omap_request_gpio(A_LCD_SSC_SD); - omap_request_gpio(_A_LCD_RESET); - omap_request_gpio(_A_LCD_SSC_CS); - omap_request_gpio(_A_LCD_SSC_A0); - - /* set all GPIOs to output */ - omap_set_gpio_direction(A_LCD_SSC_RD, 0); - omap_set_gpio_direction(A_LCD_SSC_SD, 0); - omap_set_gpio_direction(_A_LCD_RESET, 0); - omap_set_gpio_direction(_A_LCD_SSC_CS, 0); - omap_set_gpio_direction(_A_LCD_SSC_A0, 0); - - /* set GPIO data */ - omap_set_gpio_dataout(A_LCD_SSC_RD, 1); - omap_set_gpio_dataout(A_LCD_SSC_SD, 0); - omap_set_gpio_dataout(_A_LCD_RESET, 0); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 1); - omap_set_gpio_dataout(_A_LCD_SSC_A0, 1); + gpio_request(A_LCD_SSC_RD, "lcd_ssc_rd"); + gpio_request(A_LCD_SSC_SD, "lcd_ssc_sd"); + gpio_request(_A_LCD_RESET, "lcd_reset"); + gpio_request(_A_LCD_SSC_CS, "lcd_ssc_cs"); + gpio_request(_A_LCD_SSC_A0, "lcd_ssc_a0"); + + /* set GPIOs to output, with initial data */ + gpio_direction_output(A_LCD_SSC_RD, 1); + gpio_direction_output(A_LCD_SSC_SD, 0); + gpio_direction_output(_A_LCD_RESET, 0); + gpio_direction_output(_A_LCD_SSC_CS, 1); + gpio_direction_output(_A_LCD_SSC_A0, 1); } static void display_init(void) @@ -139,61 +132,61 @@ static void display_init(void) mdelay(2); /* reset LCD */ - omap_set_gpio_dataout(A_LCD_SSC_SD, 1); + gpio_set_value(A_LCD_SSC_SD, 1); epson_sendbyte(0, 0x25); - omap_set_gpio_dataout(_A_LCD_RESET, 0); + gpio_set_value(_A_LCD_RESET, 0); mdelay(10); - omap_set_gpio_dataout(_A_LCD_RESET, 1); + gpio_set_value(_A_LCD_RESET, 1); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 1); mdelay(2); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 0); + gpio_set_value(_A_LCD_SSC_CS, 0); /* init LCD, phase 1 */ epson_sendbyte(0, 0xCA); for (i = 0; i < 10; i++) epson_sendbyte(1, INIT_1[i]); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 1); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 0); + gpio_set_value(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 0); /* init LCD phase 2 */ epson_sendbyte(0, 0xCB); for (i = 0; i < 125; i++) epson_sendbyte(1, INIT_2[i]); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 1); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 0); + gpio_set_value(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 0); /* init LCD phase 2a */ epson_sendbyte(0, 0xCC); for (i = 0; i < 14; i++) epson_sendbyte(1, INIT_3[i]); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 1); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 0); + gpio_set_value(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 0); /* init LCD phase 3 */ epson_sendbyte(0, 0xBC); epson_sendbyte(1, 0x08); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 1); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 0); + gpio_set_value(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 0); /* init LCD phase 4 */ epson_sendbyte(0, 0x07); epson_sendbyte(1, 0x05); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 1); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 0); + gpio_set_value(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 0); /* init LCD phase 5 */ epson_sendbyte(0, 0x94); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 1); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 0); + gpio_set_value(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 0); /* init LCD phase 6 */ epson_sendbyte(0, 0xC6); epson_sendbyte(1, 0x80); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 1); mdelay(100); /* used to be 1000 */ - omap_set_gpio_dataout(_A_LCD_SSC_CS, 0); + gpio_set_value(_A_LCD_SSC_CS, 0); /* init LCD phase 7 */ epson_sendbyte(0, 0x16); @@ -201,8 +194,8 @@ static void display_init(void) epson_sendbyte(1, 0x00); epson_sendbyte(1, 0xB1); epson_sendbyte(1, 0x00); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 1); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 0); + gpio_set_value(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 0); /* init LCD phase 8 */ epson_sendbyte(0, 0x76); @@ -210,12 +203,12 @@ static void display_init(void) epson_sendbyte(1, 0x00); epson_sendbyte(1, 0xDB); epson_sendbyte(1, 0x00); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 1); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 0); + gpio_set_value(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 0); /* init LCD phase 9 */ epson_sendbyte(0, 0xAF); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 1); } static int sx1_panel_init(struct lcd_panel *panel, struct omapfb_device *fbdev) @@ -231,18 +224,18 @@ static void sx1_panel_disable(struct lcd_panel *panel) { printk(KERN_INFO "SX1: LCD panel disable\n"); sx1_setmmipower(0); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 1); epson_sendbyte(0, 0x25); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 0); + gpio_set_value(_A_LCD_SSC_CS, 0); epson_sendbyte(0, 0xAE); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 1); mdelay(100); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 0); + gpio_set_value(_A_LCD_SSC_CS, 0); epson_sendbyte(0, 0x95); - omap_set_gpio_dataout(_A_LCD_SSC_CS, 1); + gpio_set_value(_A_LCD_SSC_CS, 1); } static int sx1_panel_enable(struct lcd_panel *panel) diff --git a/drivers/video/omap/lcdc.c b/drivers/video/omap/lcdc.c index 83514f066712..6e2ea7518761 100644 --- a/drivers/video/omap/lcdc.c +++ b/drivers/video/omap/lcdc.c @@ -34,6 +34,8 @@ #include <asm/mach-types.h> +#include "lcdc.h" + #define MODULE_NAME "lcdc" #define OMAP_LCDC_BASE 0xfffec000 diff --git a/drivers/video/omap/lcdc.h b/drivers/video/omap/lcdc.h index adb731e5314a..845222270db3 100644 --- a/drivers/video/omap/lcdc.h +++ b/drivers/video/omap/lcdc.h @@ -4,4 +4,6 @@ int omap_lcdc_set_dma_callback(void (*callback)(void *data), void *data); void omap_lcdc_free_dma_callback(void); +extern const struct lcd_ctrl omap1_int_ctrl; + #endif diff --git a/drivers/video/omap/omapfb_main.c b/drivers/video/omap/omapfb_main.c index 51a138bd113c..5a5e407dc45f 100644 --- a/drivers/video/omap/omapfb_main.c +++ b/drivers/video/omap/omapfb_main.c @@ -31,11 +31,14 @@ #include <mach/dma.h> #include <mach/omapfb.h> +#include "lcdc.h" +#include "dispc.h" + #define MODULE_NAME "omapfb" static unsigned int def_accel; static unsigned long def_vram[OMAPFB_PLANE_NUM]; -static int def_vram_cnt; +static unsigned int def_vram_cnt; static unsigned long def_vxres; static unsigned long def_vyres; static unsigned int def_rotate; @@ -84,12 +87,10 @@ static struct caps_table_struct color_caps[] = { * LCD panel * --------------------------------------------------------------------------- */ -extern struct lcd_ctrl omap1_int_ctrl; -extern struct lcd_ctrl omap2_int_ctrl; extern struct lcd_ctrl hwa742_ctrl; extern struct lcd_ctrl blizzard_ctrl; -static struct lcd_ctrl *ctrls[] = { +static const struct lcd_ctrl *ctrls[] = { #ifdef CONFIG_ARCH_OMAP1 &omap1_int_ctrl, #else @@ -740,7 +741,7 @@ static int omapfb_update_win(struct fb_info *fbi, int ret; omapfb_rqueue_lock(plane->fbdev); - ret = omapfb_update_window_async(fbi, win, NULL, 0); + ret = omapfb_update_window_async(fbi, win, NULL, NULL); omapfb_rqueue_unlock(plane->fbdev); return ret; @@ -768,7 +769,7 @@ static int omapfb_update_full_screen(struct fb_info *fbi) win.format = 0; omapfb_rqueue_lock(fbdev); - r = fbdev->ctrl->update_window(fbi, &win, NULL, 0); + r = fbdev->ctrl->update_window(fbi, &win, NULL, NULL); omapfb_rqueue_unlock(fbdev); return r; @@ -1047,7 +1048,7 @@ void omapfb_write_first_pixel(struct omapfb_device *fbdev, u16 pixval) win.height = 2; win.out_width = 2; win.out_height = 2; - fbdev->ctrl->update_window(fbdev->fb_info[0], &win, NULL, 0); + fbdev->ctrl->update_window(fbdev->fb_info[0], &win, NULL, NULL); } omapfb_rqueue_unlock(fbdev); } diff --git a/drivers/video/omap/rfbi.c b/drivers/video/omap/rfbi.c index 4a6f13d3facf..a13c8dcad2a8 100644 --- a/drivers/video/omap/rfbi.c +++ b/drivers/video/omap/rfbi.c @@ -59,7 +59,7 @@ #define DISPC_CONTROL 0x0040 static struct { - u32 base; + void __iomem *base; void (*lcdc_callback)(void *data); void *lcdc_callback_data; unsigned long l4_khz; @@ -518,7 +518,11 @@ static int rfbi_init(struct omapfb_device *fbdev) int r; rfbi.fbdev = fbdev; - rfbi.base = io_p2v(RFBI_BASE); + rfbi.base = ioremap(RFBI_BASE, SZ_1K); + if (!rfbi.base) { + dev_err(fbdev->dev, "can't ioremap RFBI\n"); + return -ENOMEM; + } if ((r = rfbi_get_clocks()) < 0) return r; @@ -566,6 +570,7 @@ static void rfbi_cleanup(void) { omap_dispc_free_irq(); rfbi_put_clocks(); + iounmap(rfbi.base); } const struct lcd_ctrl_extif omap2_ext_if = { diff --git a/drivers/video/omap/sossi.c b/drivers/video/omap/sossi.c index 6359353c2c67..a76946220249 100644 --- a/drivers/video/omap/sossi.c +++ b/drivers/video/omap/sossi.c @@ -574,7 +574,12 @@ static int sossi_init(struct omapfb_device *fbdev) struct clk *dpll1out_ck; int r; - sossi.base = (void __iomem *)IO_ADDRESS(OMAP_SOSSI_BASE); + sossi.base = ioremap(OMAP_SOSSI_BASE, SZ_1K); + if (!sossi.base) { + dev_err(fbdev->dev, "can't ioremap SoSSI\n"); + return -ENOMEM; + } + sossi.fbdev = fbdev; spin_lock_init(&sossi.lock); @@ -665,6 +670,7 @@ static void sossi_cleanup(void) { omap_lcdc_free_dma_callback(); clk_put(sossi.fck); + iounmap(sossi.base); } struct lcd_ctrl_extif omap1_ext_if = { diff --git a/drivers/video/s1d13xxxfb.c b/drivers/video/s1d13xxxfb.c index b829dc7c5edf..a7b01d2724b5 100644 --- a/drivers/video/s1d13xxxfb.c +++ b/drivers/video/s1d13xxxfb.c @@ -50,6 +50,11 @@ #define dbg(fmt, args...) do { } while (0) #endif +static const int __devinitconst s1d13xxxfb_revisions[] = { + S1D13506_CHIP_REV, /* Rev.4 on HP Jornada 7xx S1D13506 */ + S1D13806_CHIP_REV, /* Rev.7 on .. */ +}; + /* * Here we define the default struct fb_fix_screeninfo */ @@ -538,6 +543,7 @@ s1d13xxxfb_probe(struct platform_device *pdev) struct fb_info *info; struct s1d13xxxfb_pdata *pdata = NULL; int ret = 0; + int i; u8 revision; dbg("probe called: device is %p\n", pdev); @@ -607,10 +613,19 @@ s1d13xxxfb_probe(struct platform_device *pdev) goto bail; } - revision = s1d13xxxfb_readreg(default_par, S1DREG_REV_CODE); - if ((revision >> 2) != S1D_CHIP_REV) { - printk(KERN_INFO PFX "chip not found: %i\n", (revision >> 2)); - ret = -ENODEV; + revision = s1d13xxxfb_readreg(default_par, S1DREG_REV_CODE) >> 2; + + ret = -ENODEV; + + for (i = 0; i < ARRAY_SIZE(s1d13xxxfb_revisions); i++) { + if (revision == s1d13xxxfb_revisions[i]) + ret = 0; + } + + if (!ret) + printk(KERN_INFO PFX "chip revision %i\n", revision); + else { + printk(KERN_INFO PFX "unknown chip revision %i\n", revision); goto bail; } diff --git a/drivers/video/tdfxfb.c b/drivers/video/tdfxfb.c index 4599a4385bc9..14bd3f3680b8 100644 --- a/drivers/video/tdfxfb.c +++ b/drivers/video/tdfxfb.c @@ -1195,57 +1195,58 @@ static int __devinit tdfxfb_probe(struct pci_dev *pdev, return -ENOMEM; default_par = info->par; + info->fix = tdfx_fix; /* Configure the default fb_fix_screeninfo first */ switch (pdev->device) { case PCI_DEVICE_ID_3DFX_BANSHEE: - strcpy(tdfx_fix.id, "3Dfx Banshee"); + strcpy(info->fix.id, "3Dfx Banshee"); default_par->max_pixclock = BANSHEE_MAX_PIXCLOCK; break; case PCI_DEVICE_ID_3DFX_VOODOO3: - strcpy(tdfx_fix.id, "3Dfx Voodoo3"); + strcpy(info->fix.id, "3Dfx Voodoo3"); default_par->max_pixclock = VOODOO3_MAX_PIXCLOCK; break; case PCI_DEVICE_ID_3DFX_VOODOO5: - strcpy(tdfx_fix.id, "3Dfx Voodoo5"); + strcpy(info->fix.id, "3Dfx Voodoo5"); default_par->max_pixclock = VOODOO5_MAX_PIXCLOCK; break; } - tdfx_fix.mmio_start = pci_resource_start(pdev, 0); - tdfx_fix.mmio_len = pci_resource_len(pdev, 0); - if (!request_mem_region(tdfx_fix.mmio_start, tdfx_fix.mmio_len, + info->fix.mmio_start = pci_resource_start(pdev, 0); + info->fix.mmio_len = pci_resource_len(pdev, 0); + if (!request_mem_region(info->fix.mmio_start, info->fix.mmio_len, "tdfx regbase")) { printk(KERN_ERR "tdfxfb: Can't reserve regbase\n"); goto out_err; } default_par->regbase_virt = - ioremap_nocache(tdfx_fix.mmio_start, tdfx_fix.mmio_len); + ioremap_nocache(info->fix.mmio_start, info->fix.mmio_len); if (!default_par->regbase_virt) { printk(KERN_ERR "fb: Can't remap %s register area.\n", - tdfx_fix.id); + info->fix.id); goto out_err_regbase; } - tdfx_fix.smem_start = pci_resource_start(pdev, 1); - tdfx_fix.smem_len = do_lfb_size(default_par, pdev->device); - if (!tdfx_fix.smem_len) { - printk(KERN_ERR "fb: Can't count %s memory.\n", tdfx_fix.id); + info->fix.smem_start = pci_resource_start(pdev, 1); + info->fix.smem_len = do_lfb_size(default_par, pdev->device); + if (!info->fix.smem_len) { + printk(KERN_ERR "fb: Can't count %s memory.\n", info->fix.id); goto out_err_regbase; } - if (!request_mem_region(tdfx_fix.smem_start, + if (!request_mem_region(info->fix.smem_start, pci_resource_len(pdev, 1), "tdfx smem")) { printk(KERN_ERR "tdfxfb: Can't reserve smem\n"); goto out_err_regbase; } - info->screen_base = ioremap_nocache(tdfx_fix.smem_start, - tdfx_fix.smem_len); + info->screen_base = ioremap_nocache(info->fix.smem_start, + info->fix.smem_len); if (!info->screen_base) { printk(KERN_ERR "fb: Can't remap %s framebuffer.\n", - tdfx_fix.id); + info->fix.id); goto out_err_screenbase; } @@ -1257,20 +1258,19 @@ static int __devinit tdfxfb_probe(struct pci_dev *pdev, goto out_err_screenbase; } - printk(KERN_INFO "fb: %s memory = %dK\n", tdfx_fix.id, - tdfx_fix.smem_len >> 10); + printk(KERN_INFO "fb: %s memory = %dK\n", info->fix.id, + info->fix.smem_len >> 10); default_par->mtrr_handle = -1; if (!nomtrr) default_par->mtrr_handle = - mtrr_add(tdfx_fix.smem_start, tdfx_fix.smem_len, + mtrr_add(info->fix.smem_start, info->fix.smem_len, MTRR_TYPE_WRCOMB, 1); - tdfx_fix.ypanstep = nopan ? 0 : 1; - tdfx_fix.ywrapstep = nowrap ? 0 : 1; + info->fix.ypanstep = nopan ? 0 : 1; + info->fix.ywrapstep = nowrap ? 0 : 1; info->fbops = &tdfxfb_ops; - info->fix = tdfx_fix; info->pseudo_palette = default_par->palette; info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; #ifdef CONFIG_FB_3DFX_ACCEL @@ -1323,14 +1323,14 @@ out_err_iobase: out_err_screenbase: if (info->screen_base) iounmap(info->screen_base); - release_mem_region(tdfx_fix.smem_start, pci_resource_len(pdev, 1)); + release_mem_region(info->fix.smem_start, pci_resource_len(pdev, 1)); out_err_regbase: /* * Cleanup after anything that was remapped/allocated. */ if (default_par->regbase_virt) iounmap(default_par->regbase_virt); - release_mem_region(tdfx_fix.mmio_start, tdfx_fix.mmio_len); + release_mem_region(info->fix.mmio_start, info->fix.mmio_len); out_err: framebuffer_release(info); return -ENXIO; diff --git a/drivers/video/tmiofb.c b/drivers/video/tmiofb.c new file mode 100644 index 000000000000..2a380011e9ba --- /dev/null +++ b/drivers/video/tmiofb.c @@ -0,0 +1,1050 @@ +/* + * Frame Buffer Device for Toshiba Mobile IO(TMIO) controller + * + * Copyright(C) 2005-2006 Chris Humbert + * Copyright(C) 2005 Dirk Opfer + * Copytight(C) 2007,2008 Dmitry Baryshkov + * + * Based on: + * drivers/video/w100fb.c + * code written by Sharp/Lineo for 2.4 kernels + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation; + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/fb.h> +#include <linux/interrupt.h> +#include <linux/delay.h> +/* Why should fb driver call console functions? because acquire_console_sem() */ +#include <linux/console.h> +#include <linux/mfd/core.h> +#include <linux/mfd/tmio.h> +#include <linux/uaccess.h> + +/* + * accelerator commands + */ +#define TMIOFB_ACC_CSADR(x) (0x00000000 | ((x) & 0x001ffffe)) +#define TMIOFB_ACC_CHPIX(x) (0x01000000 | ((x) & 0x000003ff)) +#define TMIOFB_ACC_CVPIX(x) (0x02000000 | ((x) & 0x000003ff)) +#define TMIOFB_ACC_PSADR(x) (0x03000000 | ((x) & 0x00fffffe)) +#define TMIOFB_ACC_PHPIX(x) (0x04000000 | ((x) & 0x000003ff)) +#define TMIOFB_ACC_PVPIX(x) (0x05000000 | ((x) & 0x000003ff)) +#define TMIOFB_ACC_PHOFS(x) (0x06000000 | ((x) & 0x000003ff)) +#define TMIOFB_ACC_PVOFS(x) (0x07000000 | ((x) & 0x000003ff)) +#define TMIOFB_ACC_POADR(x) (0x08000000 | ((x) & 0x00fffffe)) +#define TMIOFB_ACC_RSTR(x) (0x09000000 | ((x) & 0x000000ff)) +#define TMIOFB_ACC_TCLOR(x) (0x0A000000 | ((x) & 0x0000ffff)) +#define TMIOFB_ACC_FILL(x) (0x0B000000 | ((x) & 0x0000ffff)) +#define TMIOFB_ACC_DSADR(x) (0x0C000000 | ((x) & 0x00fffffe)) +#define TMIOFB_ACC_SSADR(x) (0x0D000000 | ((x) & 0x00fffffe)) +#define TMIOFB_ACC_DHPIX(x) (0x0E000000 | ((x) & 0x000003ff)) +#define TMIOFB_ACC_DVPIX(x) (0x0F000000 | ((x) & 0x000003ff)) +#define TMIOFB_ACC_SHPIX(x) (0x10000000 | ((x) & 0x000003ff)) +#define TMIOFB_ACC_SVPIX(x) (0x11000000 | ((x) & 0x000003ff)) +#define TMIOFB_ACC_LBINI(x) (0x12000000 | ((x) & 0x0000ffff)) +#define TMIOFB_ACC_LBK2(x) (0x13000000 | ((x) & 0x0000ffff)) +#define TMIOFB_ACC_SHBINI(x) (0x14000000 | ((x) & 0x0000ffff)) +#define TMIOFB_ACC_SHBK2(x) (0x15000000 | ((x) & 0x0000ffff)) +#define TMIOFB_ACC_SVBINI(x) (0x16000000 | ((x) & 0x0000ffff)) +#define TMIOFB_ACC_SVBK2(x) (0x17000000 | ((x) & 0x0000ffff)) + +#define TMIOFB_ACC_CMGO 0x20000000 +#define TMIOFB_ACC_CMGO_CEND 0x00000001 +#define TMIOFB_ACC_CMGO_INT 0x00000002 +#define TMIOFB_ACC_CMGO_CMOD 0x00000010 +#define TMIOFB_ACC_CMGO_CDVRV 0x00000020 +#define TMIOFB_ACC_CMGO_CDHRV 0x00000040 +#define TMIOFB_ACC_CMGO_RUND 0x00008000 +#define TMIOFB_ACC_SCGO 0x21000000 +#define TMIOFB_ACC_SCGO_CEND 0x00000001 +#define TMIOFB_ACC_SCGO_INT 0x00000002 +#define TMIOFB_ACC_SCGO_ROP3 0x00000004 +#define TMIOFB_ACC_SCGO_TRNS 0x00000008 +#define TMIOFB_ACC_SCGO_DVRV 0x00000010 +#define TMIOFB_ACC_SCGO_DHRV 0x00000020 +#define TMIOFB_ACC_SCGO_SVRV 0x00000040 +#define TMIOFB_ACC_SCGO_SHRV 0x00000080 +#define TMIOFB_ACC_SCGO_DSTXY 0x00008000 +#define TMIOFB_ACC_SBGO 0x22000000 +#define TMIOFB_ACC_SBGO_CEND 0x00000001 +#define TMIOFB_ACC_SBGO_INT 0x00000002 +#define TMIOFB_ACC_SBGO_DVRV 0x00000010 +#define TMIOFB_ACC_SBGO_DHRV 0x00000020 +#define TMIOFB_ACC_SBGO_SVRV 0x00000040 +#define TMIOFB_ACC_SBGO_SHRV 0x00000080 +#define TMIOFB_ACC_SBGO_SBMD 0x00000100 +#define TMIOFB_ACC_FLGO 0x23000000 +#define TMIOFB_ACC_FLGO_CEND 0x00000001 +#define TMIOFB_ACC_FLGO_INT 0x00000002 +#define TMIOFB_ACC_FLGO_ROP3 0x00000004 +#define TMIOFB_ACC_LDGO 0x24000000 +#define TMIOFB_ACC_LDGO_CEND 0x00000001 +#define TMIOFB_ACC_LDGO_INT 0x00000002 +#define TMIOFB_ACC_LDGO_ROP3 0x00000004 +#define TMIOFB_ACC_LDGO_ENDPX 0x00000008 +#define TMIOFB_ACC_LDGO_LVRV 0x00000010 +#define TMIOFB_ACC_LDGO_LHRV 0x00000020 +#define TMIOFB_ACC_LDGO_LDMOD 0x00000040 + +/* a FIFO is always allocated, even if acceleration is not used */ +#define TMIOFB_FIFO_SIZE 512 + +/* + * LCD Host Controller Configuration Register + * + * This iomem area supports only 16-bit IO. + */ +#define CCR_CMD 0x04 /* Command */ +#define CCR_REVID 0x08 /* Revision ID */ +#define CCR_BASEL 0x10 /* LCD Control Reg Base Addr Low */ +#define CCR_BASEH 0x12 /* LCD Control Reg Base Addr High */ +#define CCR_UGCC 0x40 /* Unified Gated Clock Control */ +#define CCR_GCC 0x42 /* Gated Clock Control */ +#define CCR_USC 0x50 /* Unified Software Clear */ +#define CCR_VRAMRTC 0x60 /* VRAM Timing Control */ + /* 0x61 VRAM Refresh Control */ +#define CCR_VRAMSAC 0x62 /* VRAM Access Control */ + /* 0x63 VRAM Status */ +#define CCR_VRAMBC 0x64 /* VRAM Block Control */ + +/* + * LCD Control Register + * + * This iomem area supports only 16-bit IO. + */ +#define LCR_UIS 0x000 /* Unified Interrupt Status */ +#define LCR_VHPN 0x008 /* VRAM Horizontal Pixel Number */ +#define LCR_CFSAL 0x00a /* Command FIFO Start Address Low */ +#define LCR_CFSAH 0x00c /* Command FIFO Start Address High */ +#define LCR_CFS 0x00e /* Command FIFO Size */ +#define LCR_CFWS 0x010 /* Command FIFO Writeable Size */ +#define LCR_BBIE 0x012 /* BitBLT Interrupt Enable */ +#define LCR_BBISC 0x014 /* BitBLT Interrupt Status and Clear */ +#define LCR_CCS 0x016 /* Command Count Status */ +#define LCR_BBES 0x018 /* BitBLT Execution Status */ +#define LCR_CMDL 0x01c /* Command Low */ +#define LCR_CMDH 0x01e /* Command High */ +#define LCR_CFC 0x022 /* Command FIFO Clear */ +#define LCR_CCIFC 0x024 /* CMOS Camera IF Control */ +#define LCR_HWT 0x026 /* Hardware Test */ +#define LCR_LCDCCRC 0x100 /* LCDC Clock and Reset Control */ +#define LCR_LCDCC 0x102 /* LCDC Control */ +#define LCR_LCDCOPC 0x104 /* LCDC Output Pin Control */ +#define LCR_LCDIS 0x108 /* LCD Interrupt Status */ +#define LCR_LCDIM 0x10a /* LCD Interrupt Mask */ +#define LCR_LCDIE 0x10c /* LCD Interrupt Enable */ +#define LCR_GDSAL 0x122 /* Graphics Display Start Address Low */ +#define LCR_GDSAH 0x124 /* Graphics Display Start Address High */ +#define LCR_VHPCL 0x12a /* VRAM Horizontal Pixel Count Low */ +#define LCR_VHPCH 0x12c /* VRAM Horizontal Pixel Count High */ +#define LCR_GM 0x12e /* Graphic Mode(VRAM access enable) */ +#define LCR_HT 0x140 /* Horizontal Total */ +#define LCR_HDS 0x142 /* Horizontal Display Start */ +#define LCR_HSS 0x144 /* H-Sync Start */ +#define LCR_HSE 0x146 /* H-Sync End */ +#define LCR_HNP 0x14c /* Horizontal Number of Pixels */ +#define LCR_VT 0x150 /* Vertical Total */ +#define LCR_VDS 0x152 /* Vertical Display Start */ +#define LCR_VSS 0x154 /* V-Sync Start */ +#define LCR_VSE 0x156 /* V-Sync End */ +#define LCR_CDLN 0x160 /* Current Display Line Number */ +#define LCR_ILN 0x162 /* Interrupt Line Number */ +#define LCR_SP 0x164 /* Sync Polarity */ +#define LCR_MISC 0x166 /* MISC(RGB565 mode) */ +#define LCR_VIHSS 0x16a /* Video Interface H-Sync Start */ +#define LCR_VIVS 0x16c /* Video Interface Vertical Start */ +#define LCR_VIVE 0x16e /* Video Interface Vertical End */ +#define LCR_VIVSS 0x170 /* Video Interface V-Sync Start */ +#define LCR_VCCIS 0x17e /* Video / CMOS Camera Interface Select */ +#define LCR_VIDWSAL 0x180 /* VI Data Write Start Address Low */ +#define LCR_VIDWSAH 0x182 /* VI Data Write Start Address High */ +#define LCR_VIDRSAL 0x184 /* VI Data Read Start Address Low */ +#define LCR_VIDRSAH 0x186 /* VI Data Read Start Address High */ +#define LCR_VIPDDST 0x188 /* VI Picture Data Display Start Timing */ +#define LCR_VIPDDET 0x186 /* VI Picture Data Display End Timing */ +#define LCR_VIE 0x18c /* Video Interface Enable */ +#define LCR_VCS 0x18e /* Video/Camera Select */ +#define LCR_VPHWC 0x194 /* Video Picture Horizontal Wait Count */ +#define LCR_VPHS 0x196 /* Video Picture Horizontal Size */ +#define LCR_VPVWC 0x198 /* Video Picture Vertical Wait Count */ +#define LCR_VPVS 0x19a /* Video Picture Vertical Size */ +#define LCR_PLHPIX 0x1a0 /* PLHPIX */ +#define LCR_XS 0x1a2 /* XStart */ +#define LCR_XCKHW 0x1a4 /* XCK High Width */ +#define LCR_STHS 0x1a8 /* STH Start */ +#define LCR_VT2 0x1aa /* Vertical Total */ +#define LCR_YCKSW 0x1ac /* YCK Start Wait */ +#define LCR_YSTS 0x1ae /* YST Start */ +#define LCR_PPOLS 0x1b0 /* #PPOL Start */ +#define LCR_PRECW 0x1b2 /* PREC Width */ +#define LCR_VCLKHW 0x1b4 /* VCLK High Width */ +#define LCR_OC 0x1b6 /* Output Control */ + +static char *mode_option __devinitdata; + +struct tmiofb_par { + u32 pseudo_palette[16]; + +#ifdef CONFIG_FB_TMIO_ACCELL + wait_queue_head_t wait_acc; + bool use_polling; +#endif + + void __iomem *ccr; + void __iomem *lcr; +}; + +/*--------------------------------------------------------------------------*/ + +/* + * reasons for an interrupt: + * uis bbisc lcdis + * 0100 0001 accelerator command completed + * 2000 0001 vsync start + * 2000 0002 display start + * 2000 0004 line number match(0x1ff mask???) + */ +static irqreturn_t tmiofb_irq(int irq, void *__info) +{ + struct fb_info *info = __info; + struct tmiofb_par *par = info->par; + unsigned int bbisc = tmio_ioread16(par->lcr + LCR_BBISC); + + + /* + * We were in polling mode and now we got correct irq. + * Switch back to IRQ-based sync of command FIFO + */ + if (unlikely(par->use_polling && irq != -1)) { + printk(KERN_INFO "tmiofb: switching to waitq\n"); + par->use_polling = false; + } + + tmio_iowrite16(bbisc, par->lcr + LCR_BBISC); + +#ifdef CONFIG_FB_TMIO_ACCELL + if (bbisc & 1) + wake_up(&par->wait_acc); +#endif + + return IRQ_HANDLED; +} + + +/*--------------------------------------------------------------------------*/ + + +/* + * Turns off the LCD controller and LCD host controller. + */ +static int tmiofb_hw_stop(struct platform_device *dev) +{ + struct mfd_cell *cell = dev->dev.platform_data; + struct tmio_fb_data *data = cell->driver_data; + struct fb_info *info = platform_get_drvdata(dev); + struct tmiofb_par *par = info->par; + + tmio_iowrite16(0, par->ccr + CCR_UGCC); + tmio_iowrite16(0, par->lcr + LCR_GM); + data->lcd_set_power(dev, 0); + tmio_iowrite16(0x0010, par->lcr + LCR_LCDCCRC); + + return 0; +} + +/* + * Initializes the LCD host controller. + */ +static int tmiofb_hw_init(struct platform_device *dev) +{ + struct mfd_cell *cell = dev->dev.platform_data; + struct fb_info *info = platform_get_drvdata(dev); + struct tmiofb_par *par = info->par; + const struct resource *nlcr = &cell->resources[0]; + const struct resource *vram = &cell->resources[2]; + unsigned long base; + + if (nlcr == NULL || vram == NULL) + return -EINVAL; + + base = nlcr->start; + + tmio_iowrite16(0x003a, par->ccr + CCR_UGCC); + tmio_iowrite16(0x003a, par->ccr + CCR_GCC); + tmio_iowrite16(0x3f00, par->ccr + CCR_USC); + + msleep(2); /* wait for device to settle */ + + tmio_iowrite16(0x0000, par->ccr + CCR_USC); + tmio_iowrite16(base >> 16, par->ccr + CCR_BASEH); + tmio_iowrite16(base, par->ccr + CCR_BASEL); + tmio_iowrite16(0x0002, par->ccr + CCR_CMD); /* base address enable */ + tmio_iowrite16(0x40a8, par->ccr + CCR_VRAMRTC); /* VRAMRC, VRAMTC */ + tmio_iowrite16(0x0018, par->ccr + CCR_VRAMSAC); /* VRAMSTS, VRAMAC */ + tmio_iowrite16(0x0002, par->ccr + CCR_VRAMBC); + msleep(2); /* wait for device to settle */ + tmio_iowrite16(0x000b, par->ccr + CCR_VRAMBC); + + base = vram->start + info->screen_size; + tmio_iowrite16(base >> 16, par->lcr + LCR_CFSAH); + tmio_iowrite16(base, par->lcr + LCR_CFSAL); + tmio_iowrite16(TMIOFB_FIFO_SIZE - 1, par->lcr + LCR_CFS); + tmio_iowrite16(1, par->lcr + LCR_CFC); + tmio_iowrite16(1, par->lcr + LCR_BBIE); + tmio_iowrite16(0, par->lcr + LCR_CFWS); + + return 0; +} + +/* + * Sets the LCD controller's output resolution and pixel clock + */ +static void tmiofb_hw_mode(struct platform_device *dev) +{ + struct mfd_cell *cell = dev->dev.platform_data; + struct tmio_fb_data *data = cell->driver_data; + struct fb_info *info = platform_get_drvdata(dev); + struct fb_videomode *mode = info->mode; + struct tmiofb_par *par = info->par; + unsigned int i; + + tmio_iowrite16(0, par->lcr + LCR_GM); + data->lcd_set_power(dev, 0); + tmio_iowrite16(0x0010, par->lcr + LCR_LCDCCRC); + data->lcd_mode(dev, mode); + data->lcd_set_power(dev, 1); + + tmio_iowrite16(info->fix.line_length, par->lcr + LCR_VHPN); + tmio_iowrite16(0, par->lcr + LCR_GDSAH); + tmio_iowrite16(0, par->lcr + LCR_GDSAL); + tmio_iowrite16(info->fix.line_length >> 16, par->lcr + LCR_VHPCH); + tmio_iowrite16(info->fix.line_length, par->lcr + LCR_VHPCL); + tmio_iowrite16(i = 0, par->lcr + LCR_HSS); + tmio_iowrite16(i += mode->hsync_len, par->lcr + LCR_HSE); + tmio_iowrite16(i += mode->left_margin, par->lcr + LCR_HDS); + tmio_iowrite16(i += mode->xres + mode->right_margin, par->lcr + LCR_HT); + tmio_iowrite16(mode->xres, par->lcr + LCR_HNP); + tmio_iowrite16(i = 0, par->lcr + LCR_VSS); + tmio_iowrite16(i += mode->vsync_len, par->lcr + LCR_VSE); + tmio_iowrite16(i += mode->upper_margin, par->lcr + LCR_VDS); + tmio_iowrite16(i += mode->yres, par->lcr + LCR_ILN); + tmio_iowrite16(i += mode->lower_margin, par->lcr + LCR_VT); + tmio_iowrite16(3, par->lcr + LCR_MISC); /* RGB565 mode */ + tmio_iowrite16(1, par->lcr + LCR_GM); /* VRAM enable */ + tmio_iowrite16(0x4007, par->lcr + LCR_LCDCC); + tmio_iowrite16(3, par->lcr + LCR_SP); /* sync polarity */ + + tmio_iowrite16(0x0010, par->lcr + LCR_LCDCCRC); + msleep(5); /* wait for device to settle */ + tmio_iowrite16(0x0014, par->lcr + LCR_LCDCCRC); /* STOP_CKP */ + msleep(5); /* wait for device to settle */ + tmio_iowrite16(0x0015, par->lcr + LCR_LCDCCRC); /* STOP_CKP|SOFT_RESET*/ + tmio_iowrite16(0xfffa, par->lcr + LCR_VCS); +} + +/*--------------------------------------------------------------------------*/ + +#ifdef CONFIG_FB_TMIO_ACCELL +static int __must_check +tmiofb_acc_wait(struct fb_info *info, unsigned int ccs) +{ + struct tmiofb_par *par = info->par; + /* + * This code can be called whith interrupts disabled. + * So instead of relaying on irq to trigger the event, + * poll the state till the necessary command is executed. + */ + if (irqs_disabled() || par->use_polling) { + int i = 0; + while (tmio_ioread16(par->lcr + LCR_CCS) > ccs) { + udelay(1); + i++; + if (i > 10000) { + pr_err("tmiofb: timeout waiting for %d\n", + ccs); + return -ETIMEDOUT; + } + tmiofb_irq(-1, info); + } + } else { + if (!wait_event_interruptible_timeout(par->wait_acc, + tmio_ioread16(par->lcr + LCR_CCS) <= ccs, + 1000)) { + pr_err("tmiofb: timeout waiting for %d\n", ccs); + return -ETIMEDOUT; + } + } + + return 0; +} + +/* + * Writes an accelerator command to the accelerator's FIFO. + */ +static int +tmiofb_acc_write(struct fb_info *info, const u32 *cmd, unsigned int count) +{ + struct tmiofb_par *par = info->par; + int ret; + + ret = tmiofb_acc_wait(info, TMIOFB_FIFO_SIZE - count); + if (ret) + return ret; + + for (; count; count--, cmd++) { + tmio_iowrite16(*cmd >> 16, par->lcr + LCR_CMDH); + tmio_iowrite16(*cmd, par->lcr + LCR_CMDL); + } + + return ret; +} + +/* + * Wait for the accelerator to finish its operations before writing + * to the framebuffer for consistent display output. + */ +static int tmiofb_sync(struct fb_info *fbi) +{ + struct tmiofb_par *par = fbi->par; + + int ret; + int i = 0; + + ret = tmiofb_acc_wait(fbi, 0); + + while (tmio_ioread16(par->lcr + LCR_BBES) & 2) { /* blit active */ + udelay(1); + i++ ; + if (i > 10000) { + printk(KERN_ERR "timeout waiting for blit to end!\n"); + return -ETIMEDOUT; + } + } + + return ret; +} + +static void +tmiofb_fillrect(struct fb_info *fbi, const struct fb_fillrect *rect) +{ + const u32 cmd[] = { + TMIOFB_ACC_DSADR((rect->dy * fbi->mode->xres + rect->dx) * 2), + TMIOFB_ACC_DHPIX(rect->width - 1), + TMIOFB_ACC_DVPIX(rect->height - 1), + TMIOFB_ACC_FILL(rect->color), + TMIOFB_ACC_FLGO, + }; + + if (fbi->state != FBINFO_STATE_RUNNING || + fbi->flags & FBINFO_HWACCEL_DISABLED) { + cfb_fillrect(fbi, rect); + return; + } + + tmiofb_acc_write(fbi, cmd, ARRAY_SIZE(cmd)); +} + +static void +tmiofb_copyarea(struct fb_info *fbi, const struct fb_copyarea *area) +{ + const u32 cmd[] = { + TMIOFB_ACC_DSADR((area->dy * fbi->mode->xres + area->dx) * 2), + TMIOFB_ACC_DHPIX(area->width - 1), + TMIOFB_ACC_DVPIX(area->height - 1), + TMIOFB_ACC_SSADR((area->sy * fbi->mode->xres + area->sx) * 2), + TMIOFB_ACC_SCGO, + }; + + if (fbi->state != FBINFO_STATE_RUNNING || + fbi->flags & FBINFO_HWACCEL_DISABLED) { + cfb_copyarea(fbi, area); + return; + } + + tmiofb_acc_write(fbi, cmd, ARRAY_SIZE(cmd)); +} +#endif + +static void tmiofb_clearscreen(struct fb_info *info) +{ + const struct fb_fillrect rect = { + .dx = 0, + .dy = 0, + .width = info->mode->xres, + .height = info->mode->yres, + .color = 0, + .rop = ROP_COPY, + }; + + info->fbops->fb_fillrect(info, &rect); +} + +static int tmiofb_vblank(struct fb_info *fbi, struct fb_vblank *vblank) +{ + struct tmiofb_par *par = fbi->par; + struct fb_videomode *mode = fbi->mode; + unsigned int vcount = tmio_ioread16(par->lcr + LCR_CDLN); + unsigned int vds = mode->vsync_len + mode->upper_margin; + + vblank->vcount = vcount; + vblank->flags = FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_VCOUNT + | FB_VBLANK_HAVE_VSYNC; + + if (vcount < mode->vsync_len) + vblank->flags |= FB_VBLANK_VSYNCING; + + if (vcount < vds || vcount > vds + mode->yres) + vblank->flags |= FB_VBLANK_VBLANKING; + + return 0; +} + + +static int tmiofb_ioctl(struct fb_info *fbi, + unsigned int cmd, unsigned long arg) +{ + switch (cmd) { + case FBIOGET_VBLANK: { + struct fb_vblank vblank = {0}; + void __user *argp = (void __user *) arg; + + tmiofb_vblank(fbi, &vblank); + if (copy_to_user(argp, &vblank, sizeof vblank)) + return -EFAULT; + return 0; + } + +#ifdef CONFIG_FB_TMIO_ACCELL + case FBIO_TMIO_ACC_SYNC: + tmiofb_sync(fbi); + return 0; + + case FBIO_TMIO_ACC_WRITE: { + u32 __user *argp = (void __user *) arg; + u32 len; + u32 acc[16]; + + if (get_user(len, argp)) + return -EFAULT; + if (len > ARRAY_SIZE(acc)) + return -EINVAL; + if (copy_from_user(acc, argp + 1, sizeof(u32) * len)) + return -EFAULT; + + return tmiofb_acc_write(fbi, acc, len); + } +#endif + } + + return -ENOTTY; +} + +/*--------------------------------------------------------------------------*/ + +/* Select the smallest mode that allows the desired resolution to be + * displayed. If desired, the x and y parameters can be rounded up to + * match the selected mode. + */ +static struct fb_videomode * +tmiofb_find_mode(struct fb_info *info, struct fb_var_screeninfo *var) +{ + struct mfd_cell *cell = + info->device->platform_data; + struct tmio_fb_data *data = cell->driver_data; + struct fb_videomode *best = NULL; + int i; + + for (i = 0; i < data->num_modes; i++) { + struct fb_videomode *mode = data->modes + i; + + if (mode->xres >= var->xres && mode->yres >= var->yres + && (!best || (mode->xres < best->xres + && mode->yres < best->yres))) + best = mode; + } + + return best; +} + +static int tmiofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) +{ + + struct fb_videomode *mode; + struct mfd_cell *cell = + info->device->platform_data; + struct tmio_fb_data *data = cell->driver_data; + + mode = tmiofb_find_mode(info, var); + if (!mode || var->bits_per_pixel > 16) + return -EINVAL; + + fb_videomode_to_var(var, mode); + + var->xres_virtual = mode->xres; + var->yres_virtual = info->screen_size / (mode->xres * 2); + + if (var->yres_virtual < var->yres) + return -EINVAL; + + var->xoffset = 0; + var->yoffset = 0; + var->bits_per_pixel = 16; + var->grayscale = 0; + var->red.offset = 11; + var->red.length = 5; + var->green.offset = 5; + var->green.length = 6; + var->blue.offset = 0; + var->blue.length = 5; + var->transp.offset = 0; + var->transp.length = 0; + var->nonstd = 0; + var->height = data->height; /* mm */ + var->width = data->width; /* mm */ + var->rotate = 0; + return 0; +} + +static int tmiofb_set_par(struct fb_info *info) +{ + struct fb_var_screeninfo *var = &info->var; + struct fb_videomode *mode; + + mode = tmiofb_find_mode(info, var); + if (!mode) + return -EINVAL; + + info->mode = mode; + info->fix.line_length = info->mode->xres * + var->bits_per_pixel / 8; + + tmiofb_hw_mode(to_platform_device(info->device)); + tmiofb_clearscreen(info); + return 0; +} + +static int tmiofb_setcolreg(unsigned regno, unsigned red, unsigned green, + unsigned blue, unsigned transp, + struct fb_info *info) +{ + struct tmiofb_par *par = info->par; + + if (regno < ARRAY_SIZE(par->pseudo_palette)) { + par->pseudo_palette[regno] = + ((red & 0xf800)) | + ((green & 0xfc00) >> 5) | + ((blue & 0xf800) >> 11); + return 0; + } + + return -EINVAL; +} + +static int tmiofb_blank(int blank, struct fb_info *info) +{ + /* + * everything is done in lcd/bl drivers. + * this is purely to make sysfs happy and work. + */ + return 0; +} + +static struct fb_ops tmiofb_ops = { + .owner = THIS_MODULE, + + .fb_ioctl = tmiofb_ioctl, + .fb_check_var = tmiofb_check_var, + .fb_set_par = tmiofb_set_par, + .fb_setcolreg = tmiofb_setcolreg, + .fb_blank = tmiofb_blank, + .fb_imageblit = cfb_imageblit, +#ifdef CONFIG_FB_TMIO_ACCELL + .fb_sync = tmiofb_sync, + .fb_fillrect = tmiofb_fillrect, + .fb_copyarea = tmiofb_copyarea, +#else + .fb_fillrect = cfb_fillrect, + .fb_copyarea = cfb_copyarea, +#endif +}; + +/*--------------------------------------------------------------------------*/ + +static int __devinit tmiofb_probe(struct platform_device *dev) +{ + struct mfd_cell *cell = dev->dev.platform_data; + struct tmio_fb_data *data = cell->driver_data; + struct resource *ccr = platform_get_resource(dev, IORESOURCE_MEM, 1); + struct resource *lcr = platform_get_resource(dev, IORESOURCE_MEM, 0); + struct resource *vram = platform_get_resource(dev, IORESOURCE_MEM, 2); + int irq = platform_get_irq(dev, 0); + struct fb_info *info; + struct tmiofb_par *par; + int retval; + + /* + * This is the only way ATM to disable the fb + */ + if (data == NULL) { + dev_err(&dev->dev, "NULL platform data!\n"); + return -EINVAL; + } + + info = framebuffer_alloc(sizeof(struct tmiofb_par), &dev->dev); + + if (!info) + return -ENOMEM; + + par = info->par; + +#ifdef CONFIG_FB_TMIO_ACCELL + init_waitqueue_head(&par->wait_acc); + + par->use_polling = true; + + info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_COPYAREA + | FBINFO_HWACCEL_FILLRECT; +#else + info->flags = FBINFO_DEFAULT; +#endif + + info->fbops = &tmiofb_ops; + + strcpy(info->fix.id, "tmio-fb"); + info->fix.smem_start = vram->start; + info->fix.smem_len = resource_size(vram); + info->fix.type = FB_TYPE_PACKED_PIXELS; + info->fix.visual = FB_VISUAL_TRUECOLOR; + info->fix.mmio_start = lcr->start; + info->fix.mmio_len = resource_size(lcr); + info->fix.accel = FB_ACCEL_NONE; + info->screen_size = info->fix.smem_len - (4 * TMIOFB_FIFO_SIZE); + info->pseudo_palette = par->pseudo_palette; + + par->ccr = ioremap(ccr->start, resource_size(ccr)); + if (!par->ccr) { + retval = -ENOMEM; + goto err_ioremap_ccr; + } + + par->lcr = ioremap(info->fix.mmio_start, info->fix.mmio_len); + if (!par->lcr) { + retval = -ENOMEM; + goto err_ioremap_lcr; + } + + info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len); + if (!info->screen_base) { + retval = -ENOMEM; + goto err_ioremap_vram; + } + + retval = request_irq(irq, &tmiofb_irq, IRQF_DISABLED, + dev->dev.bus_id, info); + + if (retval) + goto err_request_irq; + + platform_set_drvdata(dev, info); + + retval = fb_find_mode(&info->var, info, mode_option, + data->modes, data->num_modes, + data->modes, 16); + if (!retval) { + retval = -EINVAL; + goto err_find_mode; + } + + if (cell->enable) { + retval = cell->enable(dev); + if (retval) + goto err_enable; + } + + retval = tmiofb_hw_init(dev); + if (retval) + goto err_hw_init; + + fb_videomode_to_modelist(data->modes, data->num_modes, + &info->modelist); + + retval = register_framebuffer(info); + if (retval < 0) + goto err_register_framebuffer; + + printk(KERN_INFO "fb%d: %s frame buffer device\n", + info->node, info->fix.id); + + return 0; + +err_register_framebuffer: +/*err_set_par:*/ + tmiofb_hw_stop(dev); +err_hw_init: + if (cell->disable) + cell->disable(dev); +err_enable: +err_find_mode: + platform_set_drvdata(dev, NULL); + free_irq(irq, info); +err_request_irq: + iounmap(info->screen_base); +err_ioremap_vram: + iounmap(par->lcr); +err_ioremap_lcr: + iounmap(par->ccr); +err_ioremap_ccr: + framebuffer_release(info); + return retval; +} + +static int __devexit tmiofb_remove(struct platform_device *dev) +{ + struct mfd_cell *cell = dev->dev.platform_data; + struct fb_info *info = platform_get_drvdata(dev); + int irq = platform_get_irq(dev, 0); + struct tmiofb_par *par; + + if (info) { + par = info->par; + unregister_framebuffer(info); + + tmiofb_hw_stop(dev); + + if (cell->disable) + cell->disable(dev); + + platform_set_drvdata(dev, NULL); + + free_irq(irq, info); + + iounmap(info->screen_base); + iounmap(par->lcr); + iounmap(par->ccr); + + framebuffer_release(info); + } + + return 0; +} + +#ifdef DEBUG +static void tmiofb_dump_regs(struct platform_device *dev) +{ + struct fb_info *info = platform_get_drvdata(dev); + struct tmiofb_par *par = info->par; + + printk(KERN_DEBUG "lhccr:\n"); +#define CCR_PR(n) printk(KERN_DEBUG "\t" #n " = \t%04x\n",\ + tmio_ioread16(par->ccr + CCR_ ## n)); + CCR_PR(CMD); + CCR_PR(REVID); + CCR_PR(BASEL); + CCR_PR(BASEH); + CCR_PR(UGCC); + CCR_PR(GCC); + CCR_PR(USC); + CCR_PR(VRAMRTC); + CCR_PR(VRAMSAC); + CCR_PR(VRAMBC); +#undef CCR_PR + + printk(KERN_DEBUG "lcr: \n"); +#define LCR_PR(n) printk(KERN_DEBUG "\t" #n " = \t%04x\n",\ + tmio_ioread16(par->lcr + LCR_ ## n)); + LCR_PR(UIS); + LCR_PR(VHPN); + LCR_PR(CFSAL); + LCR_PR(CFSAH); + LCR_PR(CFS); + LCR_PR(CFWS); + LCR_PR(BBIE); + LCR_PR(BBISC); + LCR_PR(CCS); + LCR_PR(BBES); + LCR_PR(CMDL); + LCR_PR(CMDH); + LCR_PR(CFC); + LCR_PR(CCIFC); + LCR_PR(HWT); + LCR_PR(LCDCCRC); + LCR_PR(LCDCC); + LCR_PR(LCDCOPC); + LCR_PR(LCDIS); + LCR_PR(LCDIM); + LCR_PR(LCDIE); + LCR_PR(GDSAL); + LCR_PR(GDSAH); + LCR_PR(VHPCL); + LCR_PR(VHPCH); + LCR_PR(GM); + LCR_PR(HT); + LCR_PR(HDS); + LCR_PR(HSS); + LCR_PR(HSE); + LCR_PR(HNP); + LCR_PR(VT); + LCR_PR(VDS); + LCR_PR(VSS); + LCR_PR(VSE); + LCR_PR(CDLN); + LCR_PR(ILN); + LCR_PR(SP); + LCR_PR(MISC); + LCR_PR(VIHSS); + LCR_PR(VIVS); + LCR_PR(VIVE); + LCR_PR(VIVSS); + LCR_PR(VCCIS); + LCR_PR(VIDWSAL); + LCR_PR(VIDWSAH); + LCR_PR(VIDRSAL); + LCR_PR(VIDRSAH); + LCR_PR(VIPDDST); + LCR_PR(VIPDDET); + LCR_PR(VIE); + LCR_PR(VCS); + LCR_PR(VPHWC); + LCR_PR(VPHS); + LCR_PR(VPVWC); + LCR_PR(VPVS); + LCR_PR(PLHPIX); + LCR_PR(XS); + LCR_PR(XCKHW); + LCR_PR(STHS); + LCR_PR(VT2); + LCR_PR(YCKSW); + LCR_PR(YSTS); + LCR_PR(PPOLS); + LCR_PR(PRECW); + LCR_PR(VCLKHW); + LCR_PR(OC); +#undef LCR_PR +} +#endif + +#ifdef CONFIG_PM +static int tmiofb_suspend(struct platform_device *dev, pm_message_t state) +{ + struct fb_info *info = platform_get_drvdata(dev); + struct tmiofb_par *par = info->par; + struct mfd_cell *cell = dev->dev.platform_data; + int retval = 0; + + acquire_console_sem(); + + fb_set_suspend(info, 1); + + if (info->fbops->fb_sync) + info->fbops->fb_sync(info); + + + /* + * The fb should be usable even if interrupts are disabled (and they are + * during suspend/resume). Switch temporary to forced polling. + */ + printk(KERN_INFO "tmiofb: switching to polling\n"); + par->use_polling = true; + tmiofb_hw_stop(dev); + + if (cell->suspend) + retval = cell->suspend(dev); + + release_console_sem(); + + return retval; +} + +static int tmiofb_resume(struct platform_device *dev) +{ + struct fb_info *info = platform_get_drvdata(dev); + struct mfd_cell *cell = dev->dev.platform_data; + int retval; + + acquire_console_sem(); + + if (cell->resume) { + retval = cell->resume(dev); + if (retval) + goto out; + } + + tmiofb_irq(-1, info); + + tmiofb_hw_init(dev); + + tmiofb_hw_mode(dev); + + fb_set_suspend(info, 0); +out: + release_console_sem(); + return retval; +} +#else +#define tmiofb_suspend NULL +#define tmiofb_resume NULL +#endif + +static struct platform_driver tmiofb_driver = { + .driver.name = "tmio-fb", + .driver.owner = THIS_MODULE, + .probe = tmiofb_probe, + .remove = __devexit_p(tmiofb_remove), + .suspend = tmiofb_suspend, + .resume = tmiofb_resume, +}; + +/*--------------------------------------------------------------------------*/ + +#ifndef MODULE +static void __init tmiofb_setup(char *options) +{ + char *this_opt; + + if (!options || !*options) + return; + + while ((this_opt = strsep(&options, ",")) != NULL) { + if (!*this_opt) + continue; + /* + * FIXME + */ + } +} +#endif + +static int __init tmiofb_init(void) +{ +#ifndef MODULE + char *option = NULL; + + if (fb_get_options("tmiofb", &option)) + return -ENODEV; + tmiofb_setup(option); +#endif + return platform_driver_register(&tmiofb_driver); +} + +static void __exit tmiofb_cleanup(void) +{ + platform_driver_unregister(&tmiofb_driver); +} + +module_init(tmiofb_init); +module_exit(tmiofb_cleanup); + +MODULE_DESCRIPTION("TMIO framebuffer driver"); +MODULE_AUTHOR("Chris Humbert, Dirk Opfer, Dmitry Baryshkov"); +MODULE_LICENSE("GPL"); diff --git a/drivers/video/uvesafb.c b/drivers/video/uvesafb.c index 50744229c7a9..6c2d37fdd3b9 100644 --- a/drivers/video/uvesafb.c +++ b/drivers/video/uvesafb.c @@ -516,10 +516,12 @@ static int __devinit uvesafb_vbe_getmodes(struct uvesafb_ktask *task, err = uvesafb_exec(task); if (err || (task->t.regs.eax & 0xffff) != 0x004f) { - printk(KERN_ERR "uvesafb: Getting mode info block " + printk(KERN_WARNING "uvesafb: Getting mode info block " "for mode 0x%x failed (eax=0x%x, err=%d)\n", *mode, (u32)task->t.regs.eax, err); - return -EINVAL; + mode++; + par->vbe_modes_cnt--; + continue; } mib = task->buf; @@ -548,7 +550,10 @@ static int __devinit uvesafb_vbe_getmodes(struct uvesafb_ktask *task, mib->depth = mib->bits_per_pixel; } - return 0; + if (par->vbe_modes_cnt > 0) + return 0; + else + return -EINVAL; } /* diff --git a/drivers/video/vga16fb.c b/drivers/video/vga16fb.c index e31bca8a0cb2..5b2938903ac2 100644 --- a/drivers/video/vga16fb.c +++ b/drivers/video/vga16fb.c @@ -58,7 +58,6 @@ struct vga16fb_par { unsigned char ClockingMode; /* Seq-Controller:01h */ } vga_state; struct vgastate state; - struct mutex open_lock; unsigned int ref_count; int palette_blanked, vesa_blanked, mode, isVGA; u8 misc, pel_msk, vss, clkdiv; @@ -286,7 +285,6 @@ static int vga16fb_open(struct fb_info *info, int user) { struct vga16fb_par *par = info->par; - mutex_lock(&par->open_lock); if (!par->ref_count) { memset(&par->state, 0, sizeof(struct vgastate)); par->state.flags = VGA_SAVE_FONTS | VGA_SAVE_MODE | @@ -294,7 +292,6 @@ static int vga16fb_open(struct fb_info *info, int user) save_vga(&par->state); } par->ref_count++; - mutex_unlock(&par->open_lock); return 0; } @@ -303,15 +300,12 @@ static int vga16fb_release(struct fb_info *info, int user) { struct vga16fb_par *par = info->par; - mutex_lock(&par->open_lock); - if (!par->ref_count) { - mutex_unlock(&par->open_lock); + if (!par->ref_count) return -EINVAL; - } + if (par->ref_count == 1) restore_vga(&par->state); par->ref_count--; - mutex_unlock(&par->open_lock); return 0; } @@ -1326,7 +1320,6 @@ static int __init vga16fb_probe(struct platform_device *dev) printk(KERN_INFO "vga16fb: mapped to 0x%p\n", info->screen_base); par = info->par; - mutex_init(&par->open_lock); par->isVGA = screen_info.orig_video_isVGA; par->palette_blanked = 0; par->vesa_blanked = 0; diff --git a/drivers/video/via/Makefile b/drivers/video/via/Makefile new file mode 100644 index 000000000000..e533b4b6aba4 --- /dev/null +++ b/drivers/video/via/Makefile @@ -0,0 +1,7 @@ +# +# Makefile for the VIA framebuffer driver (for Linux Kernel 2.6) +# + +obj-$(CONFIG_FB_VIA) += viafb.o + +viafb-y :=viafbdev.o hw.o iface.o via_i2c.o dvi.o lcd.o ioctl.o accel.o via_utility.o vt1636.o global.o tblDPASetting.o viamode.o tbl1636.o diff --git a/drivers/video/via/accel.c b/drivers/video/via/accel.c new file mode 100644 index 000000000000..632523ff1fb7 --- /dev/null +++ b/drivers/video/via/accel.c @@ -0,0 +1,279 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ +#include "global.h" + +void viafb_init_accel(void) +{ + viaparinfo->fbmem_free -= CURSOR_SIZE; + viaparinfo->cursor_start = viaparinfo->fbmem_free; + viaparinfo->fbmem_used += CURSOR_SIZE; + + /* Reverse 8*1024 memory space for cursor image */ + viaparinfo->fbmem_free -= (CURSOR_SIZE + VQ_SIZE); + viaparinfo->VQ_start = viaparinfo->fbmem_free; + viaparinfo->VQ_end = viaparinfo->VQ_start + VQ_SIZE - 1; + viaparinfo->fbmem_used += (CURSOR_SIZE + VQ_SIZE); } + +void viafb_init_2d_engine(void) +{ + u32 dwVQStartAddr, dwVQEndAddr; + u32 dwVQLen, dwVQStartL, dwVQEndL, dwVQStartEndH; + + /* init 2D engine regs to reset 2D engine */ + writel(0x0, viaparinfo->io_virt + VIA_REG_GEMODE); + writel(0x0, viaparinfo->io_virt + VIA_REG_SRCPOS); + writel(0x0, viaparinfo->io_virt + VIA_REG_DSTPOS); + writel(0x0, viaparinfo->io_virt + VIA_REG_DIMENSION); + writel(0x0, viaparinfo->io_virt + VIA_REG_PATADDR); + writel(0x0, viaparinfo->io_virt + VIA_REG_FGCOLOR); + writel(0x0, viaparinfo->io_virt + VIA_REG_BGCOLOR); + writel(0x0, viaparinfo->io_virt + VIA_REG_CLIPTL); + writel(0x0, viaparinfo->io_virt + VIA_REG_CLIPBR); + writel(0x0, viaparinfo->io_virt + VIA_REG_OFFSET); + writel(0x0, viaparinfo->io_virt + VIA_REG_KEYCONTROL); + writel(0x0, viaparinfo->io_virt + VIA_REG_SRCBASE); + writel(0x0, viaparinfo->io_virt + VIA_REG_DSTBASE); + writel(0x0, viaparinfo->io_virt + VIA_REG_PITCH); + writel(0x0, viaparinfo->io_virt + VIA_REG_MONOPAT1); + + /* Init AGP and VQ regs */ + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_K8M890: + case UNICHROME_P4M900: + writel(0x00100000, viaparinfo->io_virt + VIA_REG_CR_TRANSET); + writel(0x680A0000, viaparinfo->io_virt + VIA_REG_CR_TRANSPACE); + writel(0x02000000, viaparinfo->io_virt + VIA_REG_CR_TRANSPACE); + break; + + default: + writel(0x00100000, viaparinfo->io_virt + VIA_REG_TRANSET); + writel(0x00000000, viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x00333004, viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x60000000, viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x61000000, viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x62000000, viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x63000000, viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x64000000, viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x7D000000, viaparinfo->io_virt + VIA_REG_TRANSPACE); + + writel(0xFE020000, viaparinfo->io_virt + VIA_REG_TRANSET); + writel(0x00000000, viaparinfo->io_virt + VIA_REG_TRANSPACE); + break; + } + if (viaparinfo->VQ_start != 0) { + /* Enable VQ */ + dwVQStartAddr = viaparinfo->VQ_start; + dwVQEndAddr = viaparinfo->VQ_end; + + dwVQStartL = 0x50000000 | (dwVQStartAddr & 0xFFFFFF); + dwVQEndL = 0x51000000 | (dwVQEndAddr & 0xFFFFFF); + dwVQStartEndH = 0x52000000 | + ((dwVQStartAddr & 0xFF000000) >> 24) | + ((dwVQEndAddr & 0xFF000000) >> 16); + dwVQLen = 0x53000000 | (VQ_SIZE >> 3); + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_K8M890: + case UNICHROME_P4M900: + dwVQStartL |= 0x20000000; + dwVQEndL |= 0x20000000; + dwVQStartEndH |= 0x20000000; + dwVQLen |= 0x20000000; + break; + default: + break; + } + + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_K8M890: + case UNICHROME_P4M900: + writel(0x00100000, + viaparinfo->io_virt + VIA_REG_CR_TRANSET); + writel(dwVQStartEndH, + viaparinfo->io_virt + VIA_REG_CR_TRANSPACE); + writel(dwVQStartL, + viaparinfo->io_virt + VIA_REG_CR_TRANSPACE); + writel(dwVQEndL, + viaparinfo->io_virt + VIA_REG_CR_TRANSPACE); + writel(dwVQLen, + viaparinfo->io_virt + VIA_REG_CR_TRANSPACE); + writel(0x74301001, + viaparinfo->io_virt + VIA_REG_CR_TRANSPACE); + writel(0x00000000, + viaparinfo->io_virt + VIA_REG_CR_TRANSPACE); + break; + default: + writel(0x00FE0000, + viaparinfo->io_virt + VIA_REG_TRANSET); + writel(0x080003FE, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x0A00027C, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x0B000260, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x0C000274, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x0D000264, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x0E000000, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x0F000020, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x1000027E, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x110002FE, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x200F0060, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + + writel(0x00000006, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x40008C0F, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x44000000, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x45080C04, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x46800408, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + + writel(dwVQStartEndH, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(dwVQStartL, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(dwVQEndL, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(dwVQLen, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + break; + } + } else { + /* Disable VQ */ + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_K8M890: + case UNICHROME_P4M900: + writel(0x00100000, + viaparinfo->io_virt + VIA_REG_CR_TRANSET); + writel(0x74301000, + viaparinfo->io_virt + VIA_REG_CR_TRANSPACE); + break; + default: + writel(0x00FE0000, + viaparinfo->io_virt + VIA_REG_TRANSET); + writel(0x00000004, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x40008C0F, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x44000000, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x45080C04, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + writel(0x46800408, + viaparinfo->io_virt + VIA_REG_TRANSPACE); + break; + } + } + + viafb_set_2d_color_depth(viaparinfo->bpp); + + writel(0x0, viaparinfo->io_virt + VIA_REG_SRCBASE); + writel(0x0, viaparinfo->io_virt + VIA_REG_DSTBASE); + + writel(VIA_PITCH_ENABLE | + (((viaparinfo->hres * + viaparinfo->bpp >> 3) >> 3) | (((viaparinfo->hres * + viaparinfo-> + bpp >> 3) >> 3) << 16)), + viaparinfo->io_virt + VIA_REG_PITCH); +} + +void viafb_set_2d_color_depth(int bpp) +{ + u32 dwGEMode; + + dwGEMode = readl(viaparinfo->io_virt + 0x04) & 0xFFFFFCFF; + + switch (bpp) { + case 16: + dwGEMode |= VIA_GEM_16bpp; + break; + case 32: + dwGEMode |= VIA_GEM_32bpp; + break; + default: + dwGEMode |= VIA_GEM_8bpp; + break; + } + + /* Set BPP and Pitch */ + writel(dwGEMode, viaparinfo->io_virt + VIA_REG_GEMODE); +} + +void viafb_hw_cursor_init(void) +{ + /* Set Cursor Image Base Address */ + writel(viaparinfo->cursor_start, + viaparinfo->io_virt + VIA_REG_CURSOR_MODE); + writel(0x0, viaparinfo->io_virt + VIA_REG_CURSOR_POS); + writel(0x0, viaparinfo->io_virt + VIA_REG_CURSOR_ORG); + writel(0x0, viaparinfo->io_virt + VIA_REG_CURSOR_BG); + writel(0x0, viaparinfo->io_virt + VIA_REG_CURSOR_FG); +} + +void viafb_show_hw_cursor(struct fb_info *info, int Status) +{ + u32 temp; + u32 iga_path = ((struct viafb_par *)(info->par))->iga_path; + + temp = readl(viaparinfo->io_virt + VIA_REG_CURSOR_MODE); + switch (Status) { + case HW_Cursor_ON: + temp |= 0x1; + break; + case HW_Cursor_OFF: + temp &= 0xFFFFFFFE; + break; + } + switch (iga_path) { + case IGA2: + temp |= 0x80000000; + break; + case IGA1: + default: + temp &= 0x7FFFFFFF; + } + writel(temp, viaparinfo->io_virt + VIA_REG_CURSOR_MODE); +} + +int viafb_wait_engine_idle(void) +{ + int loop = 0; + + while (!(readl(viaparinfo->io_virt + VIA_REG_STATUS) & + VIA_VR_QUEUE_BUSY) && (loop++ < MAXLOOP)) + cpu_relax(); + + while ((readl(viaparinfo->io_virt + VIA_REG_STATUS) & + (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY | VIA_3D_ENG_BUSY)) && + (loop++ < MAXLOOP)) + cpu_relax(); + + return loop >= MAXLOOP; +} diff --git a/drivers/video/via/accel.h b/drivers/video/via/accel.h new file mode 100644 index 000000000000..29bf854e8ccf --- /dev/null +++ b/drivers/video/via/accel.h @@ -0,0 +1,169 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef __ACCEL_H__ +#define __ACCEL_H__ + +#define FB_ACCEL_VIA_UNICHROME 50 + +/* MMIO Base Address Definition */ +#define MMIO_VGABASE 0x8000 +#define MMIO_CR_READ (MMIO_VGABASE + 0x3D4) +#define MMIO_CR_WRITE (MMIO_VGABASE + 0x3D5) +#define MMIO_SR_READ (MMIO_VGABASE + 0x3C4) +#define MMIO_SR_WRITE (MMIO_VGABASE + 0x3C5) + +/* HW Cursor Status Define */ +#define HW_Cursor_ON 0 +#define HW_Cursor_OFF 1 + +#define CURSOR_SIZE (8 * 1024) +#define VQ_SIZE (256 * 1024) + +#define VIA_MMIO_BLTBASE 0x200000 +#define VIA_MMIO_BLTSIZE 0x200000 + +/* Defines for 2D registers */ +#define VIA_REG_GECMD 0x000 +#define VIA_REG_GEMODE 0x004 +#define VIA_REG_SRCPOS 0x008 +#define VIA_REG_DSTPOS 0x00C +/* width and height */ +#define VIA_REG_DIMENSION 0x010 +#define VIA_REG_PATADDR 0x014 +#define VIA_REG_FGCOLOR 0x018 +#define VIA_REG_BGCOLOR 0x01C +/* top and left of clipping */ +#define VIA_REG_CLIPTL 0x020 +/* bottom and right of clipping */ +#define VIA_REG_CLIPBR 0x024 +#define VIA_REG_OFFSET 0x028 +/* color key control */ +#define VIA_REG_KEYCONTROL 0x02C +#define VIA_REG_SRCBASE 0x030 +#define VIA_REG_DSTBASE 0x034 +/* pitch of src and dst */ +#define VIA_REG_PITCH 0x038 +#define VIA_REG_MONOPAT0 0x03C +#define VIA_REG_MONOPAT1 0x040 +/* from 0x100 to 0x1ff */ +#define VIA_REG_COLORPAT 0x100 + +/* VIA_REG_PITCH(0x38): Pitch Setting */ +#define VIA_PITCH_ENABLE 0x80000000 + +/* defines for VIA HW cursor registers */ +#define VIA_REG_CURSOR_MODE 0x2D0 +#define VIA_REG_CURSOR_POS 0x2D4 +#define VIA_REG_CURSOR_ORG 0x2D8 +#define VIA_REG_CURSOR_BG 0x2DC +#define VIA_REG_CURSOR_FG 0x2E0 + +/* VIA_REG_GEMODE(0x04): GE mode */ +#define VIA_GEM_8bpp 0x00000000 +#define VIA_GEM_16bpp 0x00000100 +#define VIA_GEM_32bpp 0x00000300 + +/* VIA_REG_GECMD(0x00): 2D Engine Command */ +#define VIA_GEC_NOOP 0x00000000 +#define VIA_GEC_BLT 0x00000001 +#define VIA_GEC_LINE 0x00000005 + +/* Rotate Command */ +#define VIA_GEC_ROT 0x00000008 + +#define VIA_GEC_SRC_XY 0x00000000 +#define VIA_GEC_SRC_LINEAR 0x00000010 +#define VIA_GEC_DST_XY 0x00000000 +#define VIA_GEC_DST_LINRAT 0x00000020 + +#define VIA_GEC_SRC_FB 0x00000000 +#define VIA_GEC_SRC_SYS 0x00000040 +#define VIA_GEC_DST_FB 0x00000000 +#define VIA_GEC_DST_SYS 0x00000080 + +/* source is mono */ +#define VIA_GEC_SRC_MONO 0x00000100 +/* pattern is mono */ +#define VIA_GEC_PAT_MONO 0x00000200 +/* mono src is opaque */ +#define VIA_GEC_MSRC_OPAQUE 0x00000000 +/* mono src is transparent */ +#define VIA_GEC_MSRC_TRANS 0x00000400 +/* pattern is in frame buffer */ +#define VIA_GEC_PAT_FB 0x00000000 +/* pattern is from reg setting */ +#define VIA_GEC_PAT_REG 0x00000800 + +#define VIA_GEC_CLIP_DISABLE 0x00000000 +#define VIA_GEC_CLIP_ENABLE 0x00001000 + +#define VIA_GEC_FIXCOLOR_PAT 0x00002000 + +#define VIA_GEC_INCX 0x00000000 +#define VIA_GEC_DECY 0x00004000 +#define VIA_GEC_INCY 0x00000000 +#define VIA_GEC_DECX 0x00008000 +/* mono pattern is opaque */ +#define VIA_GEC_MPAT_OPAQUE 0x00000000 +/* mono pattern is transparent */ +#define VIA_GEC_MPAT_TRANS 0x00010000 + +#define VIA_GEC_MONO_UNPACK 0x00000000 +#define VIA_GEC_MONO_PACK 0x00020000 +#define VIA_GEC_MONO_DWORD 0x00000000 +#define VIA_GEC_MONO_WORD 0x00040000 +#define VIA_GEC_MONO_BYTE 0x00080000 + +#define VIA_GEC_LASTPIXEL_ON 0x00000000 +#define VIA_GEC_LASTPIXEL_OFF 0x00100000 +#define VIA_GEC_X_MAJOR 0x00000000 +#define VIA_GEC_Y_MAJOR 0x00200000 +#define VIA_GEC_QUICK_START 0x00800000 + +/* defines for VIA 3D registers */ +#define VIA_REG_STATUS 0x400 +#define VIA_REG_CR_TRANSET 0x41C +#define VIA_REG_CR_TRANSPACE 0x420 +#define VIA_REG_TRANSET 0x43C +#define VIA_REG_TRANSPACE 0x440 + +/* VIA_REG_STATUS(0x400): Engine Status */ + +/* Command Regulator is busy */ +#define VIA_CMD_RGTR_BUSY 0x00000080 +/* 2D Engine is busy */ +#define VIA_2D_ENG_BUSY 0x00000002 +/* 3D Engine is busy */ +#define VIA_3D_ENG_BUSY 0x00000001 +/* Virtual Queue is busy */ +#define VIA_VR_QUEUE_BUSY 0x00020000 + +#define MAXLOOP 0xFFFFFF + +void viafb_init_accel(void); +void viafb_init_2d_engine(void); +void set_2d_color_depth(int); +void viafb_hw_cursor_init(void); +void viafb_show_hw_cursor(struct fb_info *info, int Status); int +viafb_wait_engine_idle(void); void viafb_set_2d_color_depth(int bpp); + +#endif /* __ACCEL_H__ */ diff --git a/drivers/video/via/chip.h b/drivers/video/via/chip.h new file mode 100644 index 000000000000..dde95edc387a --- /dev/null +++ b/drivers/video/via/chip.h @@ -0,0 +1,190 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ +#ifndef __CHIP_H__ +#define __CHIP_H__ + +#include "global.h" + +/***************************************/ +/* Definition Graphic Chip Information */ +/***************************************/ + +#define PCI_VIA_VENDOR_ID 0x1106 + +/* Define VIA Graphic Chip Name */ +#define UNICHROME_CLE266 1 +#define UNICHROME_CLE266_DID 0x3122 +#define CLE266_REVISION_AX 0x0A +#define CLE266_REVISION_CX 0x0C + +#define UNICHROME_K400 2 +#define UNICHROME_K400_DID 0x7205 + +#define UNICHROME_K800 3 +#define UNICHROME_K800_DID 0x3108 + +#define UNICHROME_PM800 4 +#define UNICHROME_PM800_DID 0x3118 + +#define UNICHROME_CN700 5 +#define UNICHROME_CN700_DID 0x3344 + +#define UNICHROME_CX700 6 +#define UNICHROME_CX700_DID 0x3157 +#define CX700_REVISION_700 0x0 +#define CX700_REVISION_700M 0x1 +#define CX700_REVISION_700M2 0x2 + +#define UNICHROME_CN750 7 +#define UNICHROME_CN750_DID 0x3225 + +#define UNICHROME_K8M890 8 +#define UNICHROME_K8M890_DID 0x3230 + +#define UNICHROME_P4M890 9 +#define UNICHROME_P4M890_DID 0x3343 + +#define UNICHROME_P4M900 10 +#define UNICHROME_P4M900_DID 0x3371 + +#define UNICHROME_VX800 11 +#define UNICHROME_VX800_DID 0x1122 + +/**************************************************/ +/* Definition TMDS Trasmitter Information */ +/**************************************************/ + +/* Definition TMDS Trasmitter Index */ +#define NON_TMDS_TRANSMITTER 0x00 +#define VT1632_TMDS 0x01 +#define INTEGRATED_TMDS 0x42 + +/* Definition TMDS Trasmitter I2C Slave Address */ +#define VT1632_TMDS_I2C_ADDR 0x10 + +/**************************************************/ +/* Definition LVDS Trasmitter Information */ +/**************************************************/ + +/* Definition LVDS Trasmitter Index */ +#define NON_LVDS_TRANSMITTER 0x00 +#define VT1631_LVDS 0x01 +#define VT1636_LVDS 0x0E +#define INTEGRATED_LVDS 0x41 + +/* Definition Digital Transmitter Mode */ +#define TX_DATA_12_BITS 0x01 +#define TX_DATA_24_BITS 0x02 +#define TX_DATA_DDR_MODE 0x04 +#define TX_DATA_SDR_MODE 0x08 + +/* Definition LVDS Trasmitter I2C Slave Address */ +#define VT1631_LVDS_I2C_ADDR 0x70 +#define VT3271_LVDS_I2C_ADDR 0x80 +#define VT1636_LVDS_I2C_ADDR 0x80 + +struct tmds_chip_information { + int tmds_chip_name; + int tmds_chip_slave_addr; + int dvi_panel_id; + int data_mode; + int output_interface; + int i2c_port; + int device_type; +}; + +struct lvds_chip_information { + int lvds_chip_name; + int lvds_chip_slave_addr; + int data_mode; + int output_interface; + int i2c_port; +}; + +struct chip_information { + int gfx_chip_name; + int gfx_chip_revision; + int chip_on_slot; + struct tmds_chip_information tmds_chip_info; + struct lvds_chip_information lvds_chip_info; + struct lvds_chip_information lvds_chip_info2; +}; + +struct crt_setting_information { + int iga_path; + int h_active; + int v_active; + int bpp; + int refresh_rate; +}; + +struct tmds_setting_information { + int iga_path; + int h_active; + int v_active; + int bpp; + int refresh_rate; + int get_dvi_size_method; + int max_pixel_clock; + int dvi_panel_size; + int dvi_panel_hres; + int dvi_panel_vres; + int native_size; +}; + +struct lvds_setting_information { + int iga_path; + int h_active; + int v_active; + int bpp; + int refresh_rate; + int get_lcd_size_method; + int lcd_panel_id; + int lcd_panel_size; + int lcd_panel_hres; + int lcd_panel_vres; + int display_method; + int device_lcd_dualedge; + int LCDDithering; + int lcd_mode; + u32 vclk; /*panel mode clock value */ +}; + +struct GFX_DPA_SETTING { + int ClkRangeIndex; + u8 DVP0; /* CR96[3:0] */ + u8 DVP0DataDri_S1; /* SR2A[5] */ + u8 DVP0DataDri_S; /* SR1B[1] */ + u8 DVP0ClockDri_S1; /* SR2A[4] */ + u8 DVP0ClockDri_S; /* SR1E[2] */ + u8 DVP1; /* CR9B[3:0] */ + u8 DVP1Driving; /* SR65[3:0], Data and Clock driving */ + u8 DFPHigh; /* CR97[3:0] */ + u8 DFPLow; /* CR99[3:0] */ + +}; + +struct VT1636_DPA_SETTING { + int PanelSizeID; + u8 CLK_SEL_ST1; + u8 CLK_SEL_ST2; +}; +#endif /* __CHIP_H__ */ diff --git a/drivers/video/via/debug.h b/drivers/video/via/debug.h new file mode 100644 index 000000000000..86eacc2017f3 --- /dev/null +++ b/drivers/video/via/debug.h @@ -0,0 +1,41 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ +#ifndef __DEBUG_H__ +#define __DEBUG_H__ + +#ifndef VIAFB_DEBUG +#define VIAFB_DEBUG 0 +#endif + +#if VIAFB_DEBUG +#define DEBUG_MSG(f, a...) printk(f, ## a) +#else +#define DEBUG_MSG(f, a...) +#endif + +#define VIAFB_WARN 0 +#if VIAFB_WARN +#define WARN_MSG(f, a...) printk(f, ## a) +#else +#define WARN_MSG(f, a...) +#endif + +#endif /* __DEBUG_H__ */ diff --git a/drivers/video/via/dvi.c b/drivers/video/via/dvi.c new file mode 100644 index 000000000000..d6965447ca69 --- /dev/null +++ b/drivers/video/via/dvi.c @@ -0,0 +1,682 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ +#include "global.h" + +static void tmds_register_write(int index, u8 data); +static int tmds_register_read(int index); +static int tmds_register_read_bytes(int index, u8 *buff, int buff_len); +static int check_reduce_blanking_mode(int mode_index, + int refresh_rate); +static int dvi_get_panel_size_from_DDCv1(void); +static int dvi_get_panel_size_from_DDCv2(void); +static unsigned char dvi_get_panel_info(void); +static int viafb_dvi_query_EDID(void); + +static int check_tmds_chip(int device_id_subaddr, int device_id) +{ + if (tmds_register_read(device_id_subaddr) == device_id) + return OK; + else + return FAIL; +} + +void viafb_init_dvi_size(void) +{ + DEBUG_MSG(KERN_INFO "viafb_init_dvi_size()\n"); + DEBUG_MSG(KERN_INFO + "viaparinfo->tmds_setting_info->get_dvi_size_method %d\n", + viaparinfo->tmds_setting_info->get_dvi_size_method); + + switch (viaparinfo->tmds_setting_info->get_dvi_size_method) { + case GET_DVI_SIZE_BY_SYSTEM_BIOS: + break; + case GET_DVI_SZIE_BY_HW_STRAPPING: + break; + case GET_DVI_SIZE_BY_VGA_BIOS: + default: + dvi_get_panel_info(); + break; + } + return; +} + +int viafb_tmds_trasmitter_identify(void) +{ + unsigned char sr2a = 0, sr1e = 0, sr3e = 0; + + /* Turn on ouputting pad */ + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_K8M890: + /*=* DFP Low Pad on *=*/ + sr2a = viafb_read_reg(VIASR, SR2A); + viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1); + break; + + case UNICHROME_P4M900: + case UNICHROME_P4M890: + /* DFP Low Pad on */ + sr2a = viafb_read_reg(VIASR, SR2A); + viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1); + /* DVP0 Pad on */ + sr1e = viafb_read_reg(VIASR, SR1E); + viafb_write_reg_mask(SR1E, VIASR, 0xC0, BIT6 + BIT7); + break; + + default: + /* DVP0/DVP1 Pad on */ + sr1e = viafb_read_reg(VIASR, SR1E); + viafb_write_reg_mask(SR1E, VIASR, 0xF0, BIT4 + + BIT5 + BIT6 + BIT7); + /* SR3E[1]Multi-function selection: + 0 = Emulate I2C and DDC bus by GPIO2/3/4. */ + sr3e = viafb_read_reg(VIASR, SR3E); + viafb_write_reg_mask(SR3E, VIASR, 0x0, BIT5); + break; + } + + /* Check for VT1632: */ + viaparinfo->chip_info->tmds_chip_info.tmds_chip_name = VT1632_TMDS; + viaparinfo->chip_info-> + tmds_chip_info.tmds_chip_slave_addr = VT1632_TMDS_I2C_ADDR; + viaparinfo->chip_info->tmds_chip_info.i2c_port = I2CPORTINDEX; + if (check_tmds_chip(VT1632_DEVICE_ID_REG, VT1632_DEVICE_ID) != FAIL) { + /* + * Currently only support 12bits,dual edge,add 24bits mode later + */ + tmds_register_write(0x08, 0x3b); + + DEBUG_MSG(KERN_INFO "\n VT1632 TMDS ! \n"); + DEBUG_MSG(KERN_INFO "\n %2d", + viaparinfo->chip_info->tmds_chip_info.tmds_chip_name); + DEBUG_MSG(KERN_INFO "\n %2d", + viaparinfo->chip_info->tmds_chip_info.i2c_port); + return OK; + } else { + viaparinfo->chip_info->tmds_chip_info.i2c_port = GPIOPORTINDEX; + if (check_tmds_chip(VT1632_DEVICE_ID_REG, VT1632_DEVICE_ID) + != FAIL) { + tmds_register_write(0x08, 0x3b); + DEBUG_MSG(KERN_INFO "\n VT1632 TMDS ! \n"); + DEBUG_MSG(KERN_INFO "\n %2d", + viaparinfo->chip_info-> + tmds_chip_info.tmds_chip_name); + DEBUG_MSG(KERN_INFO "\n %2d", + viaparinfo->chip_info-> + tmds_chip_info.i2c_port); + return OK; + } + } + + viaparinfo->chip_info->tmds_chip_info.tmds_chip_name = INTEGRATED_TMDS; + + if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) && + ((viafb_display_hardware_layout == HW_LAYOUT_DVI_ONLY) || + (viafb_display_hardware_layout == HW_LAYOUT_LCD_DVI))) { + DEBUG_MSG(KERN_INFO "\n Integrated TMDS ! \n"); + return OK; + } + + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_K8M890: + viafb_write_reg(SR2A, VIASR, sr2a); + break; + + case UNICHROME_P4M900: + case UNICHROME_P4M890: + viafb_write_reg(SR2A, VIASR, sr2a); + viafb_write_reg(SR1E, VIASR, sr1e); + break; + + default: + viafb_write_reg(SR1E, VIASR, sr1e); + viafb_write_reg(SR3E, VIASR, sr3e); + break; + } + + viaparinfo->chip_info-> + tmds_chip_info.tmds_chip_name = NON_TMDS_TRANSMITTER; + viaparinfo->chip_info->tmds_chip_info. + tmds_chip_slave_addr = VT1632_TMDS_I2C_ADDR; + return FAIL; +} + +static void tmds_register_write(int index, u8 data) +{ + viaparinfo->i2c_stuff.i2c_port = + viaparinfo->chip_info->tmds_chip_info.i2c_port; + + viafb_i2c_writebyte(viaparinfo->chip_info->tmds_chip_info. + tmds_chip_slave_addr, index, + data); +} + +static int tmds_register_read(int index) +{ + u8 data; + + viaparinfo->i2c_stuff.i2c_port = + viaparinfo->chip_info->tmds_chip_info.i2c_port; + viafb_i2c_readbyte((u8) viaparinfo->chip_info-> + tmds_chip_info.tmds_chip_slave_addr, + (u8) index, &data); + return data; +} + +static int tmds_register_read_bytes(int index, u8 *buff, int buff_len) +{ + viaparinfo->i2c_stuff.i2c_port = + viaparinfo->chip_info->tmds_chip_info.i2c_port; + viafb_i2c_readbytes((u8) viaparinfo->chip_info->tmds_chip_info. + tmds_chip_slave_addr, (u8) index, buff, buff_len); + return 0; +} + +static int check_reduce_blanking_mode(int mode_index, + int refresh_rate) +{ + if (refresh_rate != 60) + return false; + + switch (mode_index) { + /* Following modes have reduce blanking mode. */ + case VIA_RES_1360X768: + case VIA_RES_1400X1050: + case VIA_RES_1440X900: + case VIA_RES_1600X900: + case VIA_RES_1680X1050: + case VIA_RES_1920X1080: + case VIA_RES_1920X1200: + break; + + default: + DEBUG_MSG(KERN_INFO + "This dvi mode %d have no reduce blanking mode!\n", + mode_index); + return false; + } + + return true; +} + +/* DVI Set Mode */ +void viafb_dvi_set_mode(int video_index, int mode_bpp, int set_iga) +{ + struct VideoModeTable *videoMode = NULL; + struct crt_mode_table *pDviTiming; + unsigned long desirePixelClock, maxPixelClock; + int status = 0; + videoMode = viafb_get_modetbl_pointer(video_index); + pDviTiming = videoMode->crtc; + desirePixelClock = pDviTiming->clk / 1000000; + maxPixelClock = (unsigned long)viaparinfo-> + tmds_setting_info->max_pixel_clock; + + DEBUG_MSG(KERN_INFO "\nDVI_set_mode!!\n"); + + if ((maxPixelClock != 0) && (desirePixelClock > maxPixelClock)) { + /*Check if reduce-blanking mode is exist */ + status = + check_reduce_blanking_mode(video_index, + pDviTiming->refresh_rate); + if (status) { + video_index += 100; /*Use reduce-blanking mode */ + videoMode = viafb_get_modetbl_pointer(video_index); + pDviTiming = videoMode->crtc; + DEBUG_MSG(KERN_INFO + "DVI use reduce blanking mode %d!!\n", + video_index); + } + } + viafb_fill_crtc_timing(pDviTiming, video_index, mode_bpp / 8, set_iga); + viafb_set_output_path(DEVICE_DVI, set_iga, + viaparinfo->chip_info->tmds_chip_info.output_interface); +} + +/* Sense DVI Connector */ +int viafb_dvi_sense(void) +{ + u8 RegSR1E = 0, RegSR3E = 0, RegCR6B = 0, RegCR91 = 0, + RegCR93 = 0, RegCR9B = 0, data; + int ret = false; + + DEBUG_MSG(KERN_INFO "viafb_dvi_sense!!\n"); + + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) { + /* DI1 Pad on */ + RegSR1E = viafb_read_reg(VIASR, SR1E); + viafb_write_reg(SR1E, VIASR, RegSR1E | 0x30); + + /* CR6B[0]VCK Input Selection: 1 = External clock. */ + RegCR6B = viafb_read_reg(VIACR, CR6B); + viafb_write_reg(CR6B, VIACR, RegCR6B | 0x08); + + /* CR91[4] VDD On [3] Data On [2] VEE On [1] Back Light Off + [0] Software Control Power Sequence */ + RegCR91 = viafb_read_reg(VIACR, CR91); + viafb_write_reg(CR91, VIACR, 0x1D); + + /* CR93[7] DI1 Data Source Selection: 1 = DSP2. + CR93[5] DI1 Clock Source: 1 = internal. + CR93[4] DI1 Clock Polarity. + CR93[3:1] DI1 Clock Adjust. CR93[0] DI1 enable */ + RegCR93 = viafb_read_reg(VIACR, CR93); + viafb_write_reg(CR93, VIACR, 0x01); + } else { + /* DVP0/DVP1 Pad on */ + RegSR1E = viafb_read_reg(VIASR, SR1E); + viafb_write_reg(SR1E, VIASR, RegSR1E | 0xF0); + + /* SR3E[1]Multi-function selection: + 0 = Emulate I2C and DDC bus by GPIO2/3/4. */ + RegSR3E = viafb_read_reg(VIASR, SR3E); + viafb_write_reg(SR3E, VIASR, RegSR3E & (~0x20)); + + /* CR91[4] VDD On [3] Data On [2] VEE On [1] Back Light Off + [0] Software Control Power Sequence */ + RegCR91 = viafb_read_reg(VIACR, CR91); + viafb_write_reg(CR91, VIACR, 0x1D); + + /*CR9B[4] DVP1 Data Source Selection: 1 = From secondary + display.CR9B[2:0] DVP1 Clock Adjust */ + RegCR9B = viafb_read_reg(VIACR, CR9B); + viafb_write_reg(CR9B, VIACR, 0x01); + } + + data = (u8) tmds_register_read(0x09); + if (data & 0x04) + ret = true; + + if (ret == false) { + if (viafb_dvi_query_EDID()) + ret = true; + } + + /* Restore status */ + viafb_write_reg(SR1E, VIASR, RegSR1E); + viafb_write_reg(CR91, VIACR, RegCR91); + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) { + viafb_write_reg(CR6B, VIACR, RegCR6B); + viafb_write_reg(CR93, VIACR, RegCR93); + } else { + viafb_write_reg(SR3E, VIASR, RegSR3E); + viafb_write_reg(CR9B, VIACR, RegCR9B); + } + + return ret; +} + +/* Query Flat Panel's EDID Table Version Through DVI Connector */ +static int viafb_dvi_query_EDID(void) +{ + u8 data0, data1; + int restore; + + DEBUG_MSG(KERN_INFO "viafb_dvi_query_EDID!!\n"); + + restore = viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr; + viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = 0xA0; + + data0 = (u8) tmds_register_read(0x00); + data1 = (u8) tmds_register_read(0x01); + if ((data0 == 0) && (data1 == 0xFF)) { + viaparinfo->chip_info-> + tmds_chip_info.tmds_chip_slave_addr = restore; + return EDID_VERSION_1; /* Found EDID1 Table */ + } + + data0 = (u8) tmds_register_read(0x00); + viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = restore; + if (data0 == 0x20) + return EDID_VERSION_2; /* Found EDID2 Table */ + else + return false; +} + +/* + * + * int dvi_get_panel_size_from_DDCv1(void) + * + * - Get Panel Size Using EDID1 Table + * + * Return Type: int + * + */ +static int dvi_get_panel_size_from_DDCv1(void) +{ + int i, max_h = 0, max_v = 0, tmp, restore; + unsigned char rData; + unsigned char EDID_DATA[18]; + + DEBUG_MSG(KERN_INFO "\n dvi_get_panel_size_from_DDCv1 \n"); + + restore = viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr; + viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = 0xA0; + + rData = tmds_register_read(0x23); + if (rData & 0x3C) + max_h = 640; + if (rData & 0xC0) + max_h = 720; + if (rData & 0x03) + max_h = 800; + + rData = tmds_register_read(0x24); + if (rData & 0xC0) + max_h = 800; + if (rData & 0x1E) + max_h = 1024; + if (rData & 0x01) + max_h = 1280; + + for (i = 0x25; i < 0x6D; i++) { + switch (i) { + case 0x26: + case 0x28: + case 0x2A: + case 0x2C: + case 0x2E: + case 0x30: + case 0x32: + case 0x34: + rData = tmds_register_read(i); + if (rData == 1) + break; + /* data = (data + 31) * 8 */ + tmp = (rData + 31) << 3; + if (tmp > max_h) + max_h = tmp; + break; + + case 0x36: + case 0x48: + case 0x5A: + case 0x6C: + tmds_register_read_bytes(i, EDID_DATA, 10); + if (!(EDID_DATA[0] || EDID_DATA[1])) { + /* The first two byte must be zero. */ + if (EDID_DATA[3] == 0xFD) { + /* To get max pixel clock. */ + viaparinfo->tmds_setting_info-> + max_pixel_clock = EDID_DATA[9] * 10; + } + } + break; + + default: + break; + } + } + + switch (max_h) { + case 640: + viaparinfo->tmds_setting_info->dvi_panel_size = + VIA_RES_640X480; + break; + case 800: + viaparinfo->tmds_setting_info->dvi_panel_size = + VIA_RES_800X600; + break; + case 1024: + viaparinfo->tmds_setting_info->dvi_panel_size = + VIA_RES_1024X768; + break; + case 1280: + viaparinfo->tmds_setting_info->dvi_panel_size = + VIA_RES_1280X1024; + break; + case 1400: + viaparinfo->tmds_setting_info->dvi_panel_size = + VIA_RES_1400X1050; + break; + case 1440: + viaparinfo->tmds_setting_info->dvi_panel_size = + VIA_RES_1440X1050; + break; + case 1600: + viaparinfo->tmds_setting_info->dvi_panel_size = + VIA_RES_1600X1200; + break; + case 1920: + if (max_v == 1200) { + viaparinfo->tmds_setting_info->dvi_panel_size = + VIA_RES_1920X1200; + } else { + viaparinfo->tmds_setting_info->dvi_panel_size = + VIA_RES_1920X1080; + } + + break; + default: + viaparinfo->tmds_setting_info->dvi_panel_size = + VIA_RES_1024X768; + DEBUG_MSG(KERN_INFO "Unknow panel size max resolution = %d !\ + set default panel size.\n", max_h); + break; + } + + DEBUG_MSG(KERN_INFO "DVI max pixelclock = %d\n", + viaparinfo->tmds_setting_info->max_pixel_clock); + viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = restore; + return viaparinfo->tmds_setting_info->dvi_panel_size; +} + +/* + * + * int dvi_get_panel_size_from_DDCv2(void) + * + * - Get Panel Size Using EDID2 Table + * + * Return Type: int + * + */ +static int dvi_get_panel_size_from_DDCv2(void) +{ + int HSize = 0, restore; + unsigned char R_Buffer[2]; + + DEBUG_MSG(KERN_INFO "\n dvi_get_panel_size_from_DDCv2 \n"); + + restore = viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr; + viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = 0xA2; + + /* Horizontal: 0x76, 0x77 */ + tmds_register_read_bytes(0x76, R_Buffer, 2); + HSize = R_Buffer[0]; + HSize += R_Buffer[1] << 8; + + switch (HSize) { + case 640: + viaparinfo->tmds_setting_info->dvi_panel_size = + VIA_RES_640X480; + break; + case 800: + viaparinfo->tmds_setting_info->dvi_panel_size = + VIA_RES_800X600; + break; + case 1024: + viaparinfo->tmds_setting_info->dvi_panel_size = + VIA_RES_1024X768; + break; + case 1280: + viaparinfo->tmds_setting_info->dvi_panel_size = + VIA_RES_1280X1024; + break; + case 1400: + viaparinfo->tmds_setting_info->dvi_panel_size = + VIA_RES_1400X1050; + break; + case 1440: + viaparinfo->tmds_setting_info->dvi_panel_size = + VIA_RES_1440X1050; + break; + case 1600: + viaparinfo->tmds_setting_info->dvi_panel_size = + VIA_RES_1600X1200; + break; + default: + viaparinfo->tmds_setting_info->dvi_panel_size = + VIA_RES_1024X768; + DEBUG_MSG(KERN_INFO "Unknow panel size max resolution = %d!\ + set default panel size.\n", HSize); + break; + } + + viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = restore; + return viaparinfo->tmds_setting_info->dvi_panel_size; +} + +/* + * + * unsigned char dvi_get_panel_info(void) + * + * - Get Panel Size + * + * Return Type: unsigned char + */ +static unsigned char dvi_get_panel_info(void) +{ + unsigned char dvipanelsize; + DEBUG_MSG(KERN_INFO "dvi_get_panel_info! \n"); + + viafb_dvi_sense(); + switch (viafb_dvi_query_EDID()) { + case 1: + dvi_get_panel_size_from_DDCv1(); + break; + case 2: + dvi_get_panel_size_from_DDCv2(); + break; + default: + break; + } + + DEBUG_MSG(KERN_INFO "dvi panel size is %2d \n", + viaparinfo->tmds_setting_info->dvi_panel_size); + dvipanelsize = (unsigned char)(viaparinfo-> + tmds_setting_info->dvi_panel_size); + return dvipanelsize; +} + +/* If Disable DVI, turn off pad */ +void viafb_dvi_disable(void) +{ + if (viaparinfo->chip_info-> + tmds_chip_info.output_interface == INTERFACE_DVP0) + viafb_write_reg(SR1E, VIASR, + viafb_read_reg(VIASR, SR1E) & (~0xC0)); + + if (viaparinfo->chip_info-> + tmds_chip_info.output_interface == INTERFACE_DVP1) + viafb_write_reg(SR1E, VIASR, + viafb_read_reg(VIASR, SR1E) & (~0x30)); + + if (viaparinfo->chip_info-> + tmds_chip_info.output_interface == INTERFACE_DFP_HIGH) + viafb_write_reg(SR2A, VIASR, + viafb_read_reg(VIASR, SR2A) & (~0x0C)); + + if (viaparinfo->chip_info-> + tmds_chip_info.output_interface == INTERFACE_DFP_LOW) + viafb_write_reg(SR2A, VIASR, + viafb_read_reg(VIASR, SR2A) & (~0x03)); + + if (viaparinfo->chip_info-> + tmds_chip_info.output_interface == INTERFACE_TMDS) + /* Turn off TMDS power. */ + viafb_write_reg(CRD2, VIACR, + viafb_read_reg(VIACR, CRD2) | 0x08); +} + +/* If Enable DVI, turn off pad */ +void viafb_dvi_enable(void) +{ + u8 data; + + if (viaparinfo->chip_info-> + tmds_chip_info.output_interface == INTERFACE_DVP0) { + viafb_write_reg(SR1E, VIASR, + viafb_read_reg(VIASR, SR1E) | 0xC0); + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) + tmds_register_write(0x88, 0x3b); + else + /*clear CR91[5] to direct on display period + in the secondary diplay path */ + viafb_write_reg(CR91, VIACR, + viafb_read_reg(VIACR, CR91) & 0xDF); + } + + if (viaparinfo->chip_info-> + tmds_chip_info.output_interface == INTERFACE_DVP1) { + viafb_write_reg(SR1E, VIASR, + viafb_read_reg(VIASR, SR1E) | 0x30); + + /*fix dvi cann't be enabled with MB VT5718C4 - Al Zhang */ + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) { + tmds_register_write(0x88, 0x3b); + } else { + /*clear CR91[5] to direct on display period + in the secondary diplay path */ + viafb_write_reg(CR91, VIACR, + viafb_read_reg(VIACR, CR91) & 0xDF); + } + + /*fix DVI cannot enable on EPIA-M board */ + if (viafb_platform_epia_dvi == 1) { + viafb_write_reg_mask(CR91, VIACR, 0x1f, 0x1f); + viafb_write_reg_mask(CR88, VIACR, 0x00, BIT6 + BIT0); + if (viafb_bus_width == 24) { + if (viafb_device_lcd_dualedge == 1) + data = 0x3F; + else + data = 0x37; + viafb_i2c_writebyte(viaparinfo->chip_info-> + tmds_chip_info. + tmds_chip_slave_addr, + 0x08, data); + } + } + } + + if (viaparinfo->chip_info-> + tmds_chip_info.output_interface == INTERFACE_DFP_HIGH) { + viafb_write_reg(SR2A, VIASR, + viafb_read_reg(VIASR, SR2A) | 0x0C); + viafb_write_reg(CR91, VIACR, + viafb_read_reg(VIACR, CR91) & 0xDF); + } + + if (viaparinfo->chip_info-> + tmds_chip_info.output_interface == INTERFACE_DFP_LOW) { + viafb_write_reg(SR2A, VIASR, + viafb_read_reg(VIASR, SR2A) | 0x03); + viafb_write_reg(CR91, VIACR, + viafb_read_reg(VIACR, CR91) & 0xDF); + } + if (viaparinfo->chip_info-> + tmds_chip_info.output_interface == INTERFACE_TMDS) { + /* Turn on Display period in the panel path. */ + viafb_write_reg_mask(CR91, VIACR, 0, BIT7); + + /* Turn on TMDS power. */ + viafb_write_reg_mask(CRD2, VIACR, 0, BIT3); + } +} + diff --git a/drivers/video/via/dvi.h b/drivers/video/via/dvi.h new file mode 100644 index 000000000000..e1ec37fb0dc3 --- /dev/null +++ b/drivers/video/via/dvi.h @@ -0,0 +1,64 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef __DVI_H__ +#define __DVI_H__ + +/*Definition TMDS Device ID register*/ +#define VT1632_DEVICE_ID_REG 0x02 +#define VT1632_DEVICE_ID 0x92 + +#define GET_DVI_SIZE_BY_SYSTEM_BIOS 0x01 +#define GET_DVI_SIZE_BY_VGA_BIOS 0x02 +#define GET_DVI_SZIE_BY_HW_STRAPPING 0x03 + +/* Definition DVI Panel ID*/ +/* Resolution: 640x480, Channel: single, Dithering: Enable */ +#define DVI_PANEL_ID0_640X480 0x00 +/* Resolution: 800x600, Channel: single, Dithering: Enable */ +#define DVI_PANEL_ID1_800x600 0x01 +/* Resolution: 1024x768, Channel: single, Dithering: Enable */ +#define DVI_PANEL_ID1_1024x768 0x02 +/* Resolution: 1280x768, Channel: single, Dithering: Enable */ +#define DVI_PANEL_ID1_1280x768 0x03 +/* Resolution: 1280x1024, Channel: dual, Dithering: Enable */ +#define DVI_PANEL_ID1_1280x1024 0x04 +/* Resolution: 1400x1050, Channel: dual, Dithering: Enable */ +#define DVI_PANEL_ID1_1400x1050 0x05 +/* Resolution: 1600x1200, Channel: dual, Dithering: Enable */ +#define DVI_PANEL_ID1_1600x1200 0x06 + +/* Define the version of EDID*/ +#define EDID_VERSION_1 1 +#define EDID_VERSION_2 2 + +#define DEV_CONNECT_DVI 0x01 +#define DEV_CONNECT_HDMI 0x02 + +struct VideoModeTable *viafb_get_cea_mode_tbl_pointer(int Index); +int viafb_dvi_sense(void); +void viafb_dvi_disable(void); +void viafb_dvi_enable(void); +int viafb_tmds_trasmitter_identify(void); +void viafb_init_dvi_size(void); +void viafb_dvi_set_mode(int video_index, int mode_bpp, int set_iga); + +#endif /* __DVI_H__ */ diff --git a/drivers/video/via/global.c b/drivers/video/via/global.c new file mode 100644 index 000000000000..468be2425af3 --- /dev/null +++ b/drivers/video/via/global.c @@ -0,0 +1,60 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ +#include "global.h" +int viafb_platform_epia_dvi = STATE_OFF; +int viafb_device_lcd_dualedge = STATE_OFF; +int viafb_bus_width = 12; +int viafb_display_hardware_layout = HW_LAYOUT_LCD_DVI; +int viafb_memsize; +int viafb_DeviceStatus = CRT_Device; +int viafb_hotplug; +int viafb_refresh = 60; +int viafb_refresh1 = 60; +int viafb_lcd_dsp_method = LCD_EXPANDSION; +int viafb_lcd_mode = LCD_OPENLDI; +int viafb_bpp = 32; +int viafb_bpp1 = 32; +int viafb_accel = 1; +int viafb_CRT_ON = 1; +int viafb_DVI_ON; +int viafb_LCD_ON ; +int viafb_LCD2_ON; +int viafb_SAMM_ON; +int viafb_dual_fb; +int viafb_hotplug_Xres = 640; +int viafb_hotplug_Yres = 480; +int viafb_hotplug_bpp = 32; +int viafb_hotplug_refresh = 60; +unsigned int viafb_second_offset; +int viafb_second_size; +int viafb_primary_dev = None_Device; +void __iomem *viafb_FB_MM; +unsigned int viafb_second_xres = 640; +unsigned int viafb_second_yres = 480; +unsigned int viafb_second_virtual_xres; +unsigned int viafb_second_virtual_yres; +int viafb_lcd_panel_id = LCD_PANEL_ID_MAXIMUM + 1; +struct fb_cursor viacursor; +struct fb_info *viafbinfo; +struct fb_info *viafbinfo1; +struct viafb_par *viaparinfo; +struct viafb_par *viaparinfo1; + diff --git a/drivers/video/via/global.h b/drivers/video/via/global.h new file mode 100644 index 000000000000..8e5263c5b812 --- /dev/null +++ b/drivers/video/via/global.h @@ -0,0 +1,90 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef __GLOBAL_H__ +#define __GLOBAL_H__ + +#include <linux/fb.h> +#include <linux/delay.h> +#include <linux/ioport.h> +#include <linux/pci.h> +#include <linux/io.h> +#include <linux/uaccess.h> +#include <linux/init.h> +#include <linux/proc_fs.h> +#include <linux/console.h> +#include <linux/timer.h> + +#include "debug.h" + +#include "iface.h" +#include "viafbdev.h" +#include "chip.h" +#include "debug.h" +#include "accel.h" +#include "share.h" +#include "dvi.h" +#include "viamode.h" +#include "via_i2c.h" +#include "hw.h" + +#include "lcd.h" +#include "ioctl.h" +#include "viamode.h" +#include "via_utility.h" +#include "vt1636.h" +#include "tblDPASetting.h" +#include "tbl1636.h" +#include "viafbdev.h" + +/* External struct*/ + +extern int viafb_platform_epia_dvi; +extern int viafb_device_lcd_dualedge; +extern int viafb_bus_width; +extern int viafb_display_hardware_layout; +extern struct offset offset_reg; +extern struct viafb_par *viaparinfo; +extern struct viafb_par *viaparinfo1; +extern struct fb_info *viafbinfo; +extern struct fb_info *viafbinfo1; +extern int viafb_DeviceStatus; +extern int viafb_refresh; +extern int viafb_refresh1; +extern int viafb_lcd_dsp_method; +extern int viafb_lcd_mode; +extern int viafb_bpp; +extern int viafb_bpp1; + +extern int viafb_CRT_ON; +extern int viafb_hotplug_Xres; +extern int viafb_hotplug_Yres; +extern int viafb_hotplug_bpp; +extern int viafb_hotplug_refresh; +extern int viafb_primary_dev; +extern void __iomem *viafb_FB_MM; +extern struct fb_cursor viacursor; + +extern unsigned int viafb_second_xres; +extern unsigned int viafb_second_yres; +extern int viafb_lcd_panel_id; + +#endif /* __GLOBAL_H__ */ diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c new file mode 100644 index 000000000000..fcd53ceb88fa --- /dev/null +++ b/drivers/video/via/hw.c @@ -0,0 +1,2865 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "global.h" + +static const struct pci_device_id_info pciidlist[] = { + {PCI_VIA_VENDOR_ID, UNICHROME_CLE266_DID, UNICHROME_CLE266}, + {PCI_VIA_VENDOR_ID, UNICHROME_PM800_DID, UNICHROME_PM800}, + {PCI_VIA_VENDOR_ID, UNICHROME_K400_DID, UNICHROME_K400}, + {PCI_VIA_VENDOR_ID, UNICHROME_K800_DID, UNICHROME_K800}, + {PCI_VIA_VENDOR_ID, UNICHROME_CN700_DID, UNICHROME_CN700}, + {PCI_VIA_VENDOR_ID, UNICHROME_P4M890_DID, UNICHROME_P4M890}, + {PCI_VIA_VENDOR_ID, UNICHROME_K8M890_DID, UNICHROME_K8M890}, + {PCI_VIA_VENDOR_ID, UNICHROME_CX700_DID, UNICHROME_CX700}, + {PCI_VIA_VENDOR_ID, UNICHROME_P4M900_DID, UNICHROME_P4M900}, + {PCI_VIA_VENDOR_ID, UNICHROME_CN750_DID, UNICHROME_CN750}, + {PCI_VIA_VENDOR_ID, UNICHROME_VX800_DID, UNICHROME_VX800}, + {0, 0, 0} +}; + +struct offset offset_reg = { + /* IGA1 Offset Register */ + {IGA1_OFFSET_REG_NUM, {{CR13, 0, 7}, {CR35, 5, 7} } }, + /* IGA2 Offset Register */ + {IGA2_OFFSET_REG_NUM, {{CR66, 0, 7}, {CR67, 0, 1} } } +}; + +static struct pll_map pll_value[] = { + {CLK_25_175M, CLE266_PLL_25_175M, K800_PLL_25_175M, CX700_25_175M}, + {CLK_29_581M, CLE266_PLL_29_581M, K800_PLL_29_581M, CX700_29_581M}, + {CLK_26_880M, CLE266_PLL_26_880M, K800_PLL_26_880M, CX700_26_880M}, + {CLK_31_490M, CLE266_PLL_31_490M, K800_PLL_31_490M, CX700_31_490M}, + {CLK_31_500M, CLE266_PLL_31_500M, K800_PLL_31_500M, CX700_31_500M}, + {CLK_31_728M, CLE266_PLL_31_728M, K800_PLL_31_728M, CX700_31_728M}, + {CLK_32_668M, CLE266_PLL_32_668M, K800_PLL_32_668M, CX700_32_668M}, + {CLK_36_000M, CLE266_PLL_36_000M, K800_PLL_36_000M, CX700_36_000M}, + {CLK_40_000M, CLE266_PLL_40_000M, K800_PLL_40_000M, CX700_40_000M}, + {CLK_41_291M, CLE266_PLL_41_291M, K800_PLL_41_291M, CX700_41_291M}, + {CLK_43_163M, CLE266_PLL_43_163M, K800_PLL_43_163M, CX700_43_163M}, + {CLK_45_250M, CLE266_PLL_45_250M, K800_PLL_45_250M, CX700_45_250M}, + {CLK_46_000M, CLE266_PLL_46_000M, K800_PLL_46_000M, CX700_46_000M}, + {CLK_46_996M, CLE266_PLL_46_996M, K800_PLL_46_996M, CX700_46_996M}, + {CLK_48_000M, CLE266_PLL_48_000M, K800_PLL_48_000M, CX700_48_000M}, + {CLK_48_875M, CLE266_PLL_48_875M, K800_PLL_48_875M, CX700_48_875M}, + {CLK_49_500M, CLE266_PLL_49_500M, K800_PLL_49_500M, CX700_49_500M}, + {CLK_52_406M, CLE266_PLL_52_406M, K800_PLL_52_406M, CX700_52_406M}, + {CLK_52_977M, CLE266_PLL_52_977M, K800_PLL_52_977M, CX700_52_977M}, + {CLK_56_250M, CLE266_PLL_56_250M, K800_PLL_56_250M, CX700_56_250M}, + {CLK_60_466M, CLE266_PLL_60_466M, K800_PLL_60_466M, CX700_60_466M}, + {CLK_61_500M, CLE266_PLL_61_500M, K800_PLL_61_500M, CX700_61_500M}, + {CLK_65_000M, CLE266_PLL_65_000M, K800_PLL_65_000M, CX700_65_000M}, + {CLK_65_178M, CLE266_PLL_65_178M, K800_PLL_65_178M, CX700_65_178M}, + {CLK_66_750M, CLE266_PLL_66_750M, K800_PLL_66_750M, CX700_66_750M}, + {CLK_68_179M, CLE266_PLL_68_179M, K800_PLL_68_179M, CX700_68_179M}, + {CLK_69_924M, CLE266_PLL_69_924M, K800_PLL_69_924M, CX700_69_924M}, + {CLK_70_159M, CLE266_PLL_70_159M, K800_PLL_70_159M, CX700_70_159M}, + {CLK_72_000M, CLE266_PLL_72_000M, K800_PLL_72_000M, CX700_72_000M}, + {CLK_78_750M, CLE266_PLL_78_750M, K800_PLL_78_750M, CX700_78_750M}, + {CLK_80_136M, CLE266_PLL_80_136M, K800_PLL_80_136M, CX700_80_136M}, + {CLK_83_375M, CLE266_PLL_83_375M, K800_PLL_83_375M, CX700_83_375M}, + {CLK_83_950M, CLE266_PLL_83_950M, K800_PLL_83_950M, CX700_83_950M}, + {CLK_84_750M, CLE266_PLL_84_750M, K800_PLL_84_750M, CX700_84_750M}, + {CLK_85_860M, CLE266_PLL_85_860M, K800_PLL_85_860M, CX700_85_860M}, + {CLK_88_750M, CLE266_PLL_88_750M, K800_PLL_88_750M, CX700_88_750M}, + {CLK_94_500M, CLE266_PLL_94_500M, K800_PLL_94_500M, CX700_94_500M}, + {CLK_97_750M, CLE266_PLL_97_750M, K800_PLL_97_750M, CX700_97_750M}, + {CLK_101_000M, CLE266_PLL_101_000M, K800_PLL_101_000M, + CX700_101_000M}, + {CLK_106_500M, CLE266_PLL_106_500M, K800_PLL_106_500M, + CX700_106_500M}, + {CLK_108_000M, CLE266_PLL_108_000M, K800_PLL_108_000M, + CX700_108_000M}, + {CLK_113_309M, CLE266_PLL_113_309M, K800_PLL_113_309M, + CX700_113_309M}, + {CLK_118_840M, CLE266_PLL_118_840M, K800_PLL_118_840M, + CX700_118_840M}, + {CLK_119_000M, CLE266_PLL_119_000M, K800_PLL_119_000M, + CX700_119_000M}, + {CLK_121_750M, CLE266_PLL_121_750M, K800_PLL_121_750M, + CX700_121_750M}, + {CLK_125_104M, CLE266_PLL_125_104M, K800_PLL_125_104M, + CX700_125_104M}, + {CLK_133_308M, CLE266_PLL_133_308M, K800_PLL_133_308M, + CX700_133_308M}, + {CLK_135_000M, CLE266_PLL_135_000M, K800_PLL_135_000M, + CX700_135_000M}, + {CLK_136_700M, CLE266_PLL_136_700M, K800_PLL_136_700M, + CX700_136_700M}, + {CLK_138_400M, CLE266_PLL_138_400M, K800_PLL_138_400M, + CX700_138_400M}, + {CLK_146_760M, CLE266_PLL_146_760M, K800_PLL_146_760M, + CX700_146_760M}, + {CLK_153_920M, CLE266_PLL_153_920M, K800_PLL_153_920M, + CX700_153_920M}, + {CLK_156_000M, CLE266_PLL_156_000M, K800_PLL_156_000M, + CX700_156_000M}, + {CLK_157_500M, CLE266_PLL_157_500M, K800_PLL_157_500M, + CX700_157_500M}, + {CLK_162_000M, CLE266_PLL_162_000M, K800_PLL_162_000M, + CX700_162_000M}, + {CLK_187_000M, CLE266_PLL_187_000M, K800_PLL_187_000M, + CX700_187_000M}, + {CLK_193_295M, CLE266_PLL_193_295M, K800_PLL_193_295M, + CX700_193_295M}, + {CLK_202_500M, CLE266_PLL_202_500M, K800_PLL_202_500M, + CX700_202_500M}, + {CLK_204_000M, CLE266_PLL_204_000M, K800_PLL_204_000M, + CX700_204_000M}, + {CLK_218_500M, CLE266_PLL_218_500M, K800_PLL_218_500M, + CX700_218_500M}, + {CLK_234_000M, CLE266_PLL_234_000M, K800_PLL_234_000M, + CX700_234_000M}, + {CLK_267_250M, CLE266_PLL_267_250M, K800_PLL_267_250M, + CX700_267_250M}, + {CLK_297_500M, CLE266_PLL_297_500M, K800_PLL_297_500M, + CX700_297_500M}, + {CLK_74_481M, CLE266_PLL_74_481M, K800_PLL_74_481M, CX700_74_481M}, + {CLK_172_798M, CLE266_PLL_172_798M, K800_PLL_172_798M, + CX700_172_798M}, + {CLK_122_614M, CLE266_PLL_122_614M, K800_PLL_122_614M, + CX700_122_614M}, + {CLK_74_270M, CLE266_PLL_74_270M, K800_PLL_74_270M, CX700_74_270M}, + {CLK_148_500M, CLE266_PLL_148_500M, K800_PLL_148_500M, + CX700_148_500M} +}; + +static struct fifo_depth_select display_fifo_depth_reg = { + /* IGA1 FIFO Depth_Select */ + {IGA1_FIFO_DEPTH_SELECT_REG_NUM, {{SR17, 0, 7} } }, + /* IGA2 FIFO Depth_Select */ + {IGA2_FIFO_DEPTH_SELECT_REG_NUM, + {{CR68, 4, 7}, {CR94, 7, 7}, {CR95, 7, 7} } } +}; + +static struct fifo_threshold_select fifo_threshold_select_reg = { + /* IGA1 FIFO Threshold Select */ + {IGA1_FIFO_THRESHOLD_REG_NUM, {{SR16, 0, 5}, {SR16, 7, 7} } }, + /* IGA2 FIFO Threshold Select */ + {IGA2_FIFO_THRESHOLD_REG_NUM, {{CR68, 0, 3}, {CR95, 4, 6} } } +}; + +static struct fifo_high_threshold_select fifo_high_threshold_select_reg = { + /* IGA1 FIFO High Threshold Select */ + {IGA1_FIFO_HIGH_THRESHOLD_REG_NUM, {{SR18, 0, 5}, {SR18, 7, 7} } }, + /* IGA2 FIFO High Threshold Select */ + {IGA2_FIFO_HIGH_THRESHOLD_REG_NUM, {{CR92, 0, 3}, {CR95, 0, 2} } } +}; + +static struct display_queue_expire_num display_queue_expire_num_reg = { + /* IGA1 Display Queue Expire Num */ + {IGA1_DISPLAY_QUEUE_EXPIRE_NUM_REG_NUM, {{SR22, 0, 4} } }, + /* IGA2 Display Queue Expire Num */ + {IGA2_DISPLAY_QUEUE_EXPIRE_NUM_REG_NUM, {{CR94, 0, 6} } } +}; + +/* Definition Fetch Count Registers*/ +static struct fetch_count fetch_count_reg = { + /* IGA1 Fetch Count Register */ + {IGA1_FETCH_COUNT_REG_NUM, {{SR1C, 0, 7}, {SR1D, 0, 1} } }, + /* IGA2 Fetch Count Register */ + {IGA2_FETCH_COUNT_REG_NUM, {{CR65, 0, 7}, {CR67, 2, 3} } } +}; + +static struct iga1_crtc_timing iga1_crtc_reg = { + /* IGA1 Horizontal Total */ + {IGA1_HOR_TOTAL_REG_NUM, {{CR00, 0, 7}, {CR36, 3, 3} } }, + /* IGA1 Horizontal Addressable Video */ + {IGA1_HOR_ADDR_REG_NUM, {{CR01, 0, 7} } }, + /* IGA1 Horizontal Blank Start */ + {IGA1_HOR_BLANK_START_REG_NUM, {{CR02, 0, 7} } }, + /* IGA1 Horizontal Blank End */ + {IGA1_HOR_BLANK_END_REG_NUM, + {{CR03, 0, 4}, {CR05, 7, 7}, {CR33, 5, 5} } }, + /* IGA1 Horizontal Sync Start */ + {IGA1_HOR_SYNC_START_REG_NUM, {{CR04, 0, 7}, {CR33, 4, 4} } }, + /* IGA1 Horizontal Sync End */ + {IGA1_HOR_SYNC_END_REG_NUM, {{CR05, 0, 4} } }, + /* IGA1 Vertical Total */ + {IGA1_VER_TOTAL_REG_NUM, + {{CR06, 0, 7}, {CR07, 0, 0}, {CR07, 5, 5}, {CR35, 0, 0} } }, + /* IGA1 Vertical Addressable Video */ + {IGA1_VER_ADDR_REG_NUM, + {{CR12, 0, 7}, {CR07, 1, 1}, {CR07, 6, 6}, {CR35, 2, 2} } }, + /* IGA1 Vertical Blank Start */ + {IGA1_VER_BLANK_START_REG_NUM, + {{CR15, 0, 7}, {CR07, 3, 3}, {CR09, 5, 5}, {CR35, 3, 3} } }, + /* IGA1 Vertical Blank End */ + {IGA1_VER_BLANK_END_REG_NUM, {{CR16, 0, 7} } }, + /* IGA1 Vertical Sync Start */ + {IGA1_VER_SYNC_START_REG_NUM, + {{CR10, 0, 7}, {CR07, 2, 2}, {CR07, 7, 7}, {CR35, 1, 1} } }, + /* IGA1 Vertical Sync End */ + {IGA1_VER_SYNC_END_REG_NUM, {{CR11, 0, 3} } } +}; + +static struct iga2_crtc_timing iga2_crtc_reg = { + /* IGA2 Horizontal Total */ + {IGA2_HOR_TOTAL_REG_NUM, {{CR50, 0, 7}, {CR55, 0, 3} } }, + /* IGA2 Horizontal Addressable Video */ + {IGA2_HOR_ADDR_REG_NUM, {{CR51, 0, 7}, {CR55, 4, 6} } }, + /* IGA2 Horizontal Blank Start */ + {IGA2_HOR_BLANK_START_REG_NUM, {{CR52, 0, 7}, {CR54, 0, 2} } }, + /* IGA2 Horizontal Blank End */ + {IGA2_HOR_BLANK_END_REG_NUM, + {{CR53, 0, 7}, {CR54, 3, 5}, {CR5D, 6, 6} } }, + /* IGA2 Horizontal Sync Start */ + {IGA2_HOR_SYNC_START_REG_NUM, + {{CR56, 0, 7}, {CR54, 6, 7}, {CR5C, 7, 7}, {CR5D, 7, 7} } }, + /* IGA2 Horizontal Sync End */ + {IGA2_HOR_SYNC_END_REG_NUM, {{CR57, 0, 7}, {CR5C, 6, 6} } }, + /* IGA2 Vertical Total */ + {IGA2_VER_TOTAL_REG_NUM, {{CR58, 0, 7}, {CR5D, 0, 2} } }, + /* IGA2 Vertical Addressable Video */ + {IGA2_VER_ADDR_REG_NUM, {{CR59, 0, 7}, {CR5D, 3, 5} } }, + /* IGA2 Vertical Blank Start */ + {IGA2_VER_BLANK_START_REG_NUM, {{CR5A, 0, 7}, {CR5C, 0, 2} } }, + /* IGA2 Vertical Blank End */ + {IGA2_VER_BLANK_END_REG_NUM, {{CR5B, 0, 7}, {CR5C, 3, 5} } }, + /* IGA2 Vertical Sync Start */ + {IGA2_VER_SYNC_START_REG_NUM, {{CR5E, 0, 7}, {CR5F, 5, 7} } }, + /* IGA2 Vertical Sync End */ + {IGA2_VER_SYNC_END_REG_NUM, {{CR5F, 0, 4} } } +}; + +static struct rgbLUT palLUT_table[] = { + /* {R,G,B} */ + /* Index 0x00~0x03 */ + {0x00, 0x00, 0x00}, {0x00, 0x00, 0x2A}, {0x00, 0x2A, 0x00}, {0x00, + 0x2A, + 0x2A}, + /* Index 0x04~0x07 */ + {0x2A, 0x00, 0x00}, {0x2A, 0x00, 0x2A}, {0x2A, 0x15, 0x00}, {0x2A, + 0x2A, + 0x2A}, + /* Index 0x08~0x0B */ + {0x15, 0x15, 0x15}, {0x15, 0x15, 0x3F}, {0x15, 0x3F, 0x15}, {0x15, + 0x3F, + 0x3F}, + /* Index 0x0C~0x0F */ + {0x3F, 0x15, 0x15}, {0x3F, 0x15, 0x3F}, {0x3F, 0x3F, 0x15}, {0x3F, + 0x3F, + 0x3F}, + /* Index 0x10~0x13 */ + {0x00, 0x00, 0x00}, {0x05, 0x05, 0x05}, {0x08, 0x08, 0x08}, {0x0B, + 0x0B, + 0x0B}, + /* Index 0x14~0x17 */ + {0x0E, 0x0E, 0x0E}, {0x11, 0x11, 0x11}, {0x14, 0x14, 0x14}, {0x18, + 0x18, + 0x18}, + /* Index 0x18~0x1B */ + {0x1C, 0x1C, 0x1C}, {0x20, 0x20, 0x20}, {0x24, 0x24, 0x24}, {0x28, + 0x28, + 0x28}, + /* Index 0x1C~0x1F */ + {0x2D, 0x2D, 0x2D}, {0x32, 0x32, 0x32}, {0x38, 0x38, 0x38}, {0x3F, + 0x3F, + 0x3F}, + /* Index 0x20~0x23 */ + {0x00, 0x00, 0x3F}, {0x10, 0x00, 0x3F}, {0x1F, 0x00, 0x3F}, {0x2F, + 0x00, + 0x3F}, + /* Index 0x24~0x27 */ + {0x3F, 0x00, 0x3F}, {0x3F, 0x00, 0x2F}, {0x3F, 0x00, 0x1F}, {0x3F, + 0x00, + 0x10}, + /* Index 0x28~0x2B */ + {0x3F, 0x00, 0x00}, {0x3F, 0x10, 0x00}, {0x3F, 0x1F, 0x00}, {0x3F, + 0x2F, + 0x00}, + /* Index 0x2C~0x2F */ + {0x3F, 0x3F, 0x00}, {0x2F, 0x3F, 0x00}, {0x1F, 0x3F, 0x00}, {0x10, + 0x3F, + 0x00}, + /* Index 0x30~0x33 */ + {0x00, 0x3F, 0x00}, {0x00, 0x3F, 0x10}, {0x00, 0x3F, 0x1F}, {0x00, + 0x3F, + 0x2F}, + /* Index 0x34~0x37 */ + {0x00, 0x3F, 0x3F}, {0x00, 0x2F, 0x3F}, {0x00, 0x1F, 0x3F}, {0x00, + 0x10, + 0x3F}, + /* Index 0x38~0x3B */ + {0x1F, 0x1F, 0x3F}, {0x27, 0x1F, 0x3F}, {0x2F, 0x1F, 0x3F}, {0x37, + 0x1F, + 0x3F}, + /* Index 0x3C~0x3F */ + {0x3F, 0x1F, 0x3F}, {0x3F, 0x1F, 0x37}, {0x3F, 0x1F, 0x2F}, {0x3F, + 0x1F, + 0x27}, + /* Index 0x40~0x43 */ + {0x3F, 0x1F, 0x1F}, {0x3F, 0x27, 0x1F}, {0x3F, 0x2F, 0x1F}, {0x3F, + 0x3F, + 0x1F}, + /* Index 0x44~0x47 */ + {0x3F, 0x3F, 0x1F}, {0x37, 0x3F, 0x1F}, {0x2F, 0x3F, 0x1F}, {0x27, + 0x3F, + 0x1F}, + /* Index 0x48~0x4B */ + {0x1F, 0x3F, 0x1F}, {0x1F, 0x3F, 0x27}, {0x1F, 0x3F, 0x2F}, {0x1F, + 0x3F, + 0x37}, + /* Index 0x4C~0x4F */ + {0x1F, 0x3F, 0x3F}, {0x1F, 0x37, 0x3F}, {0x1F, 0x2F, 0x3F}, {0x1F, + 0x27, + 0x3F}, + /* Index 0x50~0x53 */ + {0x2D, 0x2D, 0x3F}, {0x31, 0x2D, 0x3F}, {0x36, 0x2D, 0x3F}, {0x3A, + 0x2D, + 0x3F}, + /* Index 0x54~0x57 */ + {0x3F, 0x2D, 0x3F}, {0x3F, 0x2D, 0x3A}, {0x3F, 0x2D, 0x36}, {0x3F, + 0x2D, + 0x31}, + /* Index 0x58~0x5B */ + {0x3F, 0x2D, 0x2D}, {0x3F, 0x31, 0x2D}, {0x3F, 0x36, 0x2D}, {0x3F, + 0x3A, + 0x2D}, + /* Index 0x5C~0x5F */ + {0x3F, 0x3F, 0x2D}, {0x3A, 0x3F, 0x2D}, {0x36, 0x3F, 0x2D}, {0x31, + 0x3F, + 0x2D}, + /* Index 0x60~0x63 */ + {0x2D, 0x3F, 0x2D}, {0x2D, 0x3F, 0x31}, {0x2D, 0x3F, 0x36}, {0x2D, + 0x3F, + 0x3A}, + /* Index 0x64~0x67 */ + {0x2D, 0x3F, 0x3F}, {0x2D, 0x3A, 0x3F}, {0x2D, 0x36, 0x3F}, {0x2D, + 0x31, + 0x3F}, + /* Index 0x68~0x6B */ + {0x00, 0x00, 0x1C}, {0x07, 0x00, 0x1C}, {0x0E, 0x00, 0x1C}, {0x15, + 0x00, + 0x1C}, + /* Index 0x6C~0x6F */ + {0x1C, 0x00, 0x1C}, {0x1C, 0x00, 0x15}, {0x1C, 0x00, 0x0E}, {0x1C, + 0x00, + 0x07}, + /* Index 0x70~0x73 */ + {0x1C, 0x00, 0x00}, {0x1C, 0x07, 0x00}, {0x1C, 0x0E, 0x00}, {0x1C, + 0x15, + 0x00}, + /* Index 0x74~0x77 */ + {0x1C, 0x1C, 0x00}, {0x15, 0x1C, 0x00}, {0x0E, 0x1C, 0x00}, {0x07, + 0x1C, + 0x00}, + /* Index 0x78~0x7B */ + {0x00, 0x1C, 0x00}, {0x00, 0x1C, 0x07}, {0x00, 0x1C, 0x0E}, {0x00, + 0x1C, + 0x15}, + /* Index 0x7C~0x7F */ + {0x00, 0x1C, 0x1C}, {0x00, 0x15, 0x1C}, {0x00, 0x0E, 0x1C}, {0x00, + 0x07, + 0x1C}, + /* Index 0x80~0x83 */ + {0x0E, 0x0E, 0x1C}, {0x11, 0x0E, 0x1C}, {0x15, 0x0E, 0x1C}, {0x18, + 0x0E, + 0x1C}, + /* Index 0x84~0x87 */ + {0x1C, 0x0E, 0x1C}, {0x1C, 0x0E, 0x18}, {0x1C, 0x0E, 0x15}, {0x1C, + 0x0E, + 0x11}, + /* Index 0x88~0x8B */ + {0x1C, 0x0E, 0x0E}, {0x1C, 0x11, 0x0E}, {0x1C, 0x15, 0x0E}, {0x1C, + 0x18, + 0x0E}, + /* Index 0x8C~0x8F */ + {0x1C, 0x1C, 0x0E}, {0x18, 0x1C, 0x0E}, {0x15, 0x1C, 0x0E}, {0x11, + 0x1C, + 0x0E}, + /* Index 0x90~0x93 */ + {0x0E, 0x1C, 0x0E}, {0x0E, 0x1C, 0x11}, {0x0E, 0x1C, 0x15}, {0x0E, + 0x1C, + 0x18}, + /* Index 0x94~0x97 */ + {0x0E, 0x1C, 0x1C}, {0x0E, 0x18, 0x1C}, {0x0E, 0x15, 0x1C}, {0x0E, + 0x11, + 0x1C}, + /* Index 0x98~0x9B */ + {0x14, 0x14, 0x1C}, {0x16, 0x14, 0x1C}, {0x18, 0x14, 0x1C}, {0x1A, + 0x14, + 0x1C}, + /* Index 0x9C~0x9F */ + {0x1C, 0x14, 0x1C}, {0x1C, 0x14, 0x1A}, {0x1C, 0x14, 0x18}, {0x1C, + 0x14, + 0x16}, + /* Index 0xA0~0xA3 */ + {0x1C, 0x14, 0x14}, {0x1C, 0x16, 0x14}, {0x1C, 0x18, 0x14}, {0x1C, + 0x1A, + 0x14}, + /* Index 0xA4~0xA7 */ + {0x1C, 0x1C, 0x14}, {0x1A, 0x1C, 0x14}, {0x18, 0x1C, 0x14}, {0x16, + 0x1C, + 0x14}, + /* Index 0xA8~0xAB */ + {0x14, 0x1C, 0x14}, {0x14, 0x1C, 0x16}, {0x14, 0x1C, 0x18}, {0x14, + 0x1C, + 0x1A}, + /* Index 0xAC~0xAF */ + {0x14, 0x1C, 0x1C}, {0x14, 0x1A, 0x1C}, {0x14, 0x18, 0x1C}, {0x14, + 0x16, + 0x1C}, + /* Index 0xB0~0xB3 */ + {0x00, 0x00, 0x10}, {0x04, 0x00, 0x10}, {0x08, 0x00, 0x10}, {0x0C, + 0x00, + 0x10}, + /* Index 0xB4~0xB7 */ + {0x10, 0x00, 0x10}, {0x10, 0x00, 0x0C}, {0x10, 0x00, 0x08}, {0x10, + 0x00, + 0x04}, + /* Index 0xB8~0xBB */ + {0x10, 0x00, 0x00}, {0x10, 0x04, 0x00}, {0x10, 0x08, 0x00}, {0x10, + 0x0C, + 0x00}, + /* Index 0xBC~0xBF */ + {0x10, 0x10, 0x00}, {0x0C, 0x10, 0x00}, {0x08, 0x10, 0x00}, {0x04, + 0x10, + 0x00}, + /* Index 0xC0~0xC3 */ + {0x00, 0x10, 0x00}, {0x00, 0x10, 0x04}, {0x00, 0x10, 0x08}, {0x00, + 0x10, + 0x0C}, + /* Index 0xC4~0xC7 */ + {0x00, 0x10, 0x10}, {0x00, 0x0C, 0x10}, {0x00, 0x08, 0x10}, {0x00, + 0x04, + 0x10}, + /* Index 0xC8~0xCB */ + {0x08, 0x08, 0x10}, {0x0A, 0x08, 0x10}, {0x0C, 0x08, 0x10}, {0x0E, + 0x08, + 0x10}, + /* Index 0xCC~0xCF */ + {0x10, 0x08, 0x10}, {0x10, 0x08, 0x0E}, {0x10, 0x08, 0x0C}, {0x10, + 0x08, + 0x0A}, + /* Index 0xD0~0xD3 */ + {0x10, 0x08, 0x08}, {0x10, 0x0A, 0x08}, {0x10, 0x0C, 0x08}, {0x10, + 0x0E, + 0x08}, + /* Index 0xD4~0xD7 */ + {0x10, 0x10, 0x08}, {0x0E, 0x10, 0x08}, {0x0C, 0x10, 0x08}, {0x0A, + 0x10, + 0x08}, + /* Index 0xD8~0xDB */ + {0x08, 0x10, 0x08}, {0x08, 0x10, 0x0A}, {0x08, 0x10, 0x0C}, {0x08, + 0x10, + 0x0E}, + /* Index 0xDC~0xDF */ + {0x08, 0x10, 0x10}, {0x08, 0x0E, 0x10}, {0x08, 0x0C, 0x10}, {0x08, + 0x0A, + 0x10}, + /* Index 0xE0~0xE3 */ + {0x0B, 0x0B, 0x10}, {0x0C, 0x0B, 0x10}, {0x0D, 0x0B, 0x10}, {0x0F, + 0x0B, + 0x10}, + /* Index 0xE4~0xE7 */ + {0x10, 0x0B, 0x10}, {0x10, 0x0B, 0x0F}, {0x10, 0x0B, 0x0D}, {0x10, + 0x0B, + 0x0C}, + /* Index 0xE8~0xEB */ + {0x10, 0x0B, 0x0B}, {0x10, 0x0C, 0x0B}, {0x10, 0x0D, 0x0B}, {0x10, + 0x0F, + 0x0B}, + /* Index 0xEC~0xEF */ + {0x10, 0x10, 0x0B}, {0x0F, 0x10, 0x0B}, {0x0D, 0x10, 0x0B}, {0x0C, + 0x10, + 0x0B}, + /* Index 0xF0~0xF3 */ + {0x0B, 0x10, 0x0B}, {0x0B, 0x10, 0x0C}, {0x0B, 0x10, 0x0D}, {0x0B, + 0x10, + 0x0F}, + /* Index 0xF4~0xF7 */ + {0x0B, 0x10, 0x10}, {0x0B, 0x0F, 0x10}, {0x0B, 0x0D, 0x10}, {0x0B, + 0x0C, + 0x10}, + /* Index 0xF8~0xFB */ + {0x00, 0x00, 0x00}, {0x00, 0x00, 0x00}, {0x00, 0x00, 0x00}, {0x00, + 0x00, + 0x00}, + /* Index 0xFC~0xFF */ + {0x00, 0x00, 0x00}, {0x00, 0x00, 0x00}, {0x00, 0x00, 0x00}, {0x00, + 0x00, + 0x00} +}; + +static void set_crt_output_path(int set_iga); +static void dvi_patch_skew_dvp0(void); +static void dvi_patch_skew_dvp1(void); +static void dvi_patch_skew_dvp_low(void); +static void set_dvi_output_path(int set_iga, int output_interface); +static void set_lcd_output_path(int set_iga, int output_interface); +static int search_mode_setting(int ModeInfoIndex); +static void load_fix_bit_crtc_reg(void); +static void init_gfx_chip_info(void); +static void init_tmds_chip_info(void); +static void init_lvds_chip_info(void); +static void device_screen_off(void); +static void device_screen_on(void); +static void set_display_channel(void); +static void device_off(void); +static void device_on(void); +static void enable_second_display_channel(void); +static void disable_second_display_channel(void); +static int get_fb_size_from_pci(void); + +void viafb_write_reg(u8 index, u16 io_port, u8 data) +{ + outb(index, io_port); + outb(data, io_port + 1); + /*DEBUG_MSG(KERN_INFO "\nIndex=%2d Value=%2d", index, data); */ +} +u8 viafb_read_reg(int io_port, u8 index) +{ + outb(index, io_port); + return inb(io_port + 1); +} + +void viafb_lock_crt(void) +{ + viafb_write_reg_mask(CR11, VIACR, BIT7, BIT7); +} + +void viafb_unlock_crt(void) +{ + viafb_write_reg_mask(CR11, VIACR, 0, BIT7); + viafb_write_reg_mask(CR47, VIACR, 0, BIT0); +} + +void viafb_write_reg_mask(u8 index, int io_port, u8 data, u8 mask) +{ + u8 tmp; + + outb(index, io_port); + tmp = inb(io_port + 1); + outb((data & mask) | (tmp & (~mask)), io_port + 1); + /*DEBUG_MSG(KERN_INFO "\nIndex=%2d Value=%2d", index, tmp); */ +} + +void write_dac_reg(u8 index, u8 r, u8 g, u8 b) +{ + outb(index, LUT_INDEX_WRITE); + outb(r, LUT_DATA); + outb(g, LUT_DATA); + outb(b, LUT_DATA); +} + +/*Set IGA path for each device*/ +void viafb_set_iga_path(void) +{ + + if (viafb_SAMM_ON == 1) { + if (viafb_CRT_ON) { + if (viafb_primary_dev == CRT_Device) + viaparinfo->crt_setting_info->iga_path = IGA1; + else + viaparinfo->crt_setting_info->iga_path = IGA2; + } + + if (viafb_DVI_ON) { + if (viafb_primary_dev == DVI_Device) + viaparinfo->tmds_setting_info->iga_path = IGA1; + else + viaparinfo->tmds_setting_info->iga_path = IGA2; + } + + if (viafb_LCD_ON) { + if (viafb_primary_dev == LCD_Device) { + if (viafb_dual_fb && + (viaparinfo->chip_info->gfx_chip_name == + UNICHROME_CLE266)) { + viaparinfo-> + lvds_setting_info->iga_path = IGA2; + viaparinfo-> + crt_setting_info->iga_path = IGA1; + viaparinfo-> + tmds_setting_info->iga_path = IGA1; + } else + viaparinfo-> + lvds_setting_info->iga_path = IGA1; + } else { + viaparinfo->lvds_setting_info->iga_path = IGA2; + } + } + if (viafb_LCD2_ON) { + if (LCD2_Device == viafb_primary_dev) + viaparinfo->lvds_setting_info2->iga_path = IGA1; + else + viaparinfo->lvds_setting_info2->iga_path = IGA2; + } + } else { + viafb_SAMM_ON = 0; + + if (viafb_CRT_ON && viafb_LCD_ON) { + viaparinfo->crt_setting_info->iga_path = IGA1; + viaparinfo->lvds_setting_info->iga_path = IGA2; + } else if (viafb_CRT_ON && viafb_DVI_ON) { + viaparinfo->crt_setting_info->iga_path = IGA1; + viaparinfo->tmds_setting_info->iga_path = IGA2; + } else if (viafb_LCD_ON && viafb_DVI_ON) { + viaparinfo->tmds_setting_info->iga_path = IGA1; + viaparinfo->lvds_setting_info->iga_path = IGA2; + } else if (viafb_LCD_ON && viafb_LCD2_ON) { + viaparinfo->lvds_setting_info->iga_path = IGA2; + viaparinfo->lvds_setting_info2->iga_path = IGA2; + } else if (viafb_CRT_ON) { + viaparinfo->crt_setting_info->iga_path = IGA1; + } else if (viafb_LCD_ON) { + viaparinfo->lvds_setting_info->iga_path = IGA2; + } else if (viafb_DVI_ON) { + viaparinfo->tmds_setting_info->iga_path = IGA1; + } + } +} + +void viafb_set_start_addr(void) +{ + unsigned long offset = 0, tmp = 0, size = 0; + unsigned long length; + + DEBUG_MSG(KERN_INFO "viafb_set_start_addr!\n"); + viafb_unlock_crt(); + /* update starting address of IGA1 */ + viafb_write_reg(CR0C, VIACR, 0x00); /*initial starting address */ + viafb_write_reg(CR0D, VIACR, 0x00); + viafb_write_reg(CR34, VIACR, 0x00); + viafb_write_reg_mask(CR48, VIACR, 0x00, 0x1F); + + if (viafb_dual_fb) { + viaparinfo->iga_path = IGA1; + viaparinfo1->iga_path = IGA2; + } + + if (viafb_SAMM_ON == 1) { + if (!viafb_dual_fb) { + if (viafb_second_size) + size = viafb_second_size * 1024 * 1024; + else + size = 8 * 1024 * 1024; + } else { + + size = viaparinfo1->memsize; + } + offset = viafb_second_offset; + DEBUG_MSG(KERN_INFO + "viafb_second_size=%lx, second start_adddress=%lx\n", + size, offset); + } + if (viafb_SAMM_ON == 1) { + offset = offset >> 3; + + tmp = viafb_read_reg(VIACR, 0x62) & 0x01; + tmp |= (offset & 0x7F) << 1; + viafb_write_reg(CR62, VIACR, tmp); + viafb_write_reg(CR63, VIACR, ((offset & 0x7F80) >> 7)); + viafb_write_reg(CR64, VIACR, ((offset & 0x7F8000) >> 15)); + viafb_write_reg(CRA3, VIACR, ((offset & 0x3800000) >> 23)); + } else { + /* update starting address */ + viafb_write_reg(CR62, VIACR, 0x00); + viafb_write_reg(CR63, VIACR, 0x00); + viafb_write_reg(CR64, VIACR, 0x00); + viafb_write_reg(CRA3, VIACR, 0x00); + } + + if (viafb_SAMM_ON == 1) { + if (viafb_accel) { + if (!viafb_dual_fb) + length = size - viaparinfo->fbmem_used; + else + length = size - viaparinfo1->fbmem_used; + } else + length = size; + offset = (unsigned long)(void *)viafb_FB_MM + + viafb_second_offset; + memset((void *)offset, 0, length); + } + + viafb_lock_crt(); +} + +void viafb_set_output_path(int device, int set_iga, int output_interface) +{ + switch (device) { + case DEVICE_CRT: + set_crt_output_path(set_iga); + break; + case DEVICE_DVI: + set_dvi_output_path(set_iga, output_interface); + break; + case DEVICE_LCD: + set_lcd_output_path(set_iga, output_interface); + break; + } +} + +static void set_crt_output_path(int set_iga) +{ + viafb_write_reg_mask(CR36, VIACR, 0x00, BIT4 + BIT5); + + switch (set_iga) { + case IGA1: + viafb_write_reg_mask(SR16, VIASR, 0x00, BIT6); + break; + case IGA2: + case IGA1_IGA2: + viafb_write_reg_mask(CR6A, VIACR, 0xC0, BIT6 + BIT7); + viafb_write_reg_mask(SR16, VIASR, 0x40, BIT6); + if (set_iga == IGA1_IGA2) + viafb_write_reg_mask(CR6B, VIACR, 0x08, BIT3); + break; + } +} + +static void dvi_patch_skew_dvp0(void) +{ + /* Reset data driving first: */ + viafb_write_reg_mask(SR1B, VIASR, 0, BIT1); + viafb_write_reg_mask(SR2A, VIASR, 0, BIT4); + + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_P4M890: + { + if ((viaparinfo->tmds_setting_info->h_active == 1600) && + (viaparinfo->tmds_setting_info->v_active == + 1200)) + viafb_write_reg_mask(CR96, VIACR, 0x03, + BIT0 + BIT1 + BIT2); + else + viafb_write_reg_mask(CR96, VIACR, 0x07, + BIT0 + BIT1 + BIT2); + break; + } + + case UNICHROME_P4M900: + { + viafb_write_reg_mask(CR96, VIACR, 0x07, + BIT0 + BIT1 + BIT2 + BIT3); + viafb_write_reg_mask(SR1B, VIASR, 0x02, BIT1); + viafb_write_reg_mask(SR2A, VIASR, 0x10, BIT4); + break; + } + + default: + { + break; + } + } +} + +static void dvi_patch_skew_dvp1(void) +{ + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_CX700: + { + break; + } + + default: + { + break; + } + } +} + +static void dvi_patch_skew_dvp_low(void) +{ + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_K8M890: + { + viafb_write_reg_mask(CR99, VIACR, 0x03, BIT0 + BIT1); + break; + } + + case UNICHROME_P4M900: + { + viafb_write_reg_mask(CR99, VIACR, 0x08, + BIT0 + BIT1 + BIT2 + BIT3); + break; + } + + case UNICHROME_P4M890: + { + viafb_write_reg_mask(CR99, VIACR, 0x0F, + BIT0 + BIT1 + BIT2 + BIT3); + break; + } + + default: + { + break; + } + } +} + +static void set_dvi_output_path(int set_iga, int output_interface) +{ + switch (output_interface) { + case INTERFACE_DVP0: + viafb_write_reg_mask(CR6B, VIACR, 0x01, BIT0); + + if (set_iga == IGA1) { + viafb_write_reg_mask(CR96, VIACR, 0x00, BIT4); + viafb_write_reg_mask(CR6C, VIACR, 0x21, BIT0 + + BIT5 + BIT7); + } else { + viafb_write_reg_mask(CR96, VIACR, 0x10, BIT4); + viafb_write_reg_mask(CR6C, VIACR, 0xA1, BIT0 + + BIT5 + BIT7); + } + + viafb_write_reg_mask(SR1E, VIASR, 0xC0, BIT7 + BIT6); + + dvi_patch_skew_dvp0(); + break; + + case INTERFACE_DVP1: + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) { + if (set_iga == IGA1) + viafb_write_reg_mask(CR93, VIACR, 0x21, + BIT0 + BIT5 + BIT7); + else + viafb_write_reg_mask(CR93, VIACR, 0xA1, + BIT0 + BIT5 + BIT7); + } else { + if (set_iga == IGA1) + viafb_write_reg_mask(CR9B, VIACR, 0x00, BIT4); + else + viafb_write_reg_mask(CR9B, VIACR, 0x10, BIT4); + } + + viafb_write_reg_mask(SR1E, VIASR, 0x30, BIT4 + BIT5); + dvi_patch_skew_dvp1(); + break; + case INTERFACE_DFP_HIGH: + if (viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266) { + if (set_iga == IGA1) { + viafb_write_reg_mask(CR96, VIACR, 0x00, BIT4); + viafb_write_reg_mask(CR97, VIACR, 0x03, + BIT0 + BIT1 + BIT4); + } else { + viafb_write_reg_mask(CR96, VIACR, 0x10, BIT4); + viafb_write_reg_mask(CR97, VIACR, 0x13, + BIT0 + BIT1 + BIT4); + } + } + viafb_write_reg_mask(SR2A, VIASR, 0x0C, BIT2 + BIT3); + break; + + case INTERFACE_DFP_LOW: + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) + break; + + if (set_iga == IGA1) { + viafb_write_reg_mask(CR99, VIACR, 0x00, BIT4); + viafb_write_reg_mask(CR9B, VIACR, 0x00, BIT4); + } else { + viafb_write_reg_mask(CR99, VIACR, 0x10, BIT4); + viafb_write_reg_mask(CR9B, VIACR, 0x10, BIT4); + } + + viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1); + dvi_patch_skew_dvp_low(); + break; + + case INTERFACE_TMDS: + if (set_iga == IGA1) + viafb_write_reg_mask(CR99, VIACR, 0x00, BIT4); + else + viafb_write_reg_mask(CR99, VIACR, 0x10, BIT4); + break; + } + + if (set_iga == IGA2) { + enable_second_display_channel(); + /* Disable LCD Scaling */ + viafb_write_reg_mask(CR79, VIACR, 0x00, BIT0); + } +} + +static void set_lcd_output_path(int set_iga, int output_interface) +{ + DEBUG_MSG(KERN_INFO + "set_lcd_output_path, iga:%d,out_interface:%d\n", + set_iga, output_interface); + switch (set_iga) { + case IGA1: + viafb_write_reg_mask(CR6B, VIACR, 0x00, BIT3); + viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3); + + disable_second_display_channel(); + break; + + case IGA2: + viafb_write_reg_mask(CR6B, VIACR, 0x00, BIT3); + viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3); + + enable_second_display_channel(); + break; + + case IGA1_IGA2: + viafb_write_reg_mask(CR6B, VIACR, 0x08, BIT3); + viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3); + + disable_second_display_channel(); + break; + } + + switch (output_interface) { + case INTERFACE_DVP0: + if (set_iga == IGA1) { + viafb_write_reg_mask(CR96, VIACR, 0x00, BIT4); + } else { + viafb_write_reg(CR91, VIACR, 0x00); + viafb_write_reg_mask(CR96, VIACR, 0x10, BIT4); + } + break; + + case INTERFACE_DVP1: + if (set_iga == IGA1) + viafb_write_reg_mask(CR9B, VIACR, 0x00, BIT4); + else { + viafb_write_reg(CR91, VIACR, 0x00); + viafb_write_reg_mask(CR9B, VIACR, 0x10, BIT4); + } + break; + + case INTERFACE_DFP_HIGH: + if (set_iga == IGA1) + viafb_write_reg_mask(CR97, VIACR, 0x00, BIT4); + else { + viafb_write_reg(CR91, VIACR, 0x00); + viafb_write_reg_mask(CR97, VIACR, 0x10, BIT4); + viafb_write_reg_mask(CR96, VIACR, 0x10, BIT4); + } + break; + + case INTERFACE_DFP_LOW: + if (set_iga == IGA1) + viafb_write_reg_mask(CR99, VIACR, 0x00, BIT4); + else { + viafb_write_reg(CR91, VIACR, 0x00); + viafb_write_reg_mask(CR99, VIACR, 0x10, BIT4); + viafb_write_reg_mask(CR9B, VIACR, 0x10, BIT4); + } + + break; + + case INTERFACE_DFP: + if ((UNICHROME_K8M890 == viaparinfo->chip_info->gfx_chip_name) + || (UNICHROME_P4M890 == + viaparinfo->chip_info->gfx_chip_name)) + viafb_write_reg_mask(CR97, VIACR, 0x84, + BIT7 + BIT2 + BIT1 + BIT0); + if (set_iga == IGA1) { + viafb_write_reg_mask(CR97, VIACR, 0x00, BIT4); + viafb_write_reg_mask(CR99, VIACR, 0x00, BIT4); + } else { + viafb_write_reg(CR91, VIACR, 0x00); + viafb_write_reg_mask(CR97, VIACR, 0x10, BIT4); + viafb_write_reg_mask(CR99, VIACR, 0x10, BIT4); + } + break; + + case INTERFACE_LVDS0: + case INTERFACE_LVDS0LVDS1: + if (set_iga == IGA1) + viafb_write_reg_mask(CR99, VIACR, 0x00, BIT4); + else + viafb_write_reg_mask(CR99, VIACR, 0x10, BIT4); + + break; + + case INTERFACE_LVDS1: + if (set_iga == IGA1) + viafb_write_reg_mask(CR97, VIACR, 0x00, BIT4); + else + viafb_write_reg_mask(CR97, VIACR, 0x10, BIT4); + break; + } +} + +/* Search Mode Index */ +static int search_mode_setting(int ModeInfoIndex) +{ + int i = 0; + + while ((i < NUM_TOTAL_MODETABLE) && + (ModeInfoIndex != CLE266Modes[i].ModeIndex)) + i++; + if (i >= NUM_TOTAL_MODETABLE) + i = 0; + return i; + +} + +struct VideoModeTable *viafb_get_modetbl_pointer(int Index) +{ + struct VideoModeTable *TmpTbl = NULL; + TmpTbl = &CLE266Modes[search_mode_setting(Index)]; + return TmpTbl; +} + +struct VideoModeTable *viafb_get_cea_mode_tbl_pointer(int Index) +{ + struct VideoModeTable *TmpTbl = NULL; + int i = 0; + while ((i < NUM_TOTAL_CEA_MODES) && + (Index != CEA_HDMI_Modes[i].ModeIndex)) + i++; + if ((i < NUM_TOTAL_CEA_MODES)) + TmpTbl = &CEA_HDMI_Modes[i]; + else { + /*Still use general timing if don't find CEA timing */ + i = 0; + while ((i < NUM_TOTAL_MODETABLE) && + (Index != CLE266Modes[i].ModeIndex)) + i++; + if (i >= NUM_TOTAL_MODETABLE) + i = 0; + TmpTbl = &CLE266Modes[i]; + } + return TmpTbl; +} + +static void load_fix_bit_crtc_reg(void) +{ + /* always set to 1 */ + viafb_write_reg_mask(CR03, VIACR, 0x80, BIT7); + /* line compare should set all bits = 1 (extend modes) */ + viafb_write_reg(CR18, VIACR, 0xff); + /* line compare should set all bits = 1 (extend modes) */ + viafb_write_reg_mask(CR07, VIACR, 0x10, BIT4); + /* line compare should set all bits = 1 (extend modes) */ + viafb_write_reg_mask(CR09, VIACR, 0x40, BIT6); + /* line compare should set all bits = 1 (extend modes) */ + viafb_write_reg_mask(CR35, VIACR, 0x10, BIT4); + /* line compare should set all bits = 1 (extend modes) */ + viafb_write_reg_mask(CR33, VIACR, 0x06, BIT0 + BIT1 + BIT2); + /*viafb_write_reg_mask(CR32, VIACR, 0x01, BIT0); */ + /* extend mode always set to e3h */ + viafb_write_reg(CR17, VIACR, 0xe3); + /* extend mode always set to 0h */ + viafb_write_reg(CR08, VIACR, 0x00); + /* extend mode always set to 0h */ + viafb_write_reg(CR14, VIACR, 0x00); + + /* If K8M800, enable Prefetch Mode. */ + if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_K800) + || (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K8M890)) + viafb_write_reg_mask(CR33, VIACR, 0x08, BIT3); + if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) + && (viaparinfo->chip_info->gfx_chip_revision == CLE266_REVISION_AX)) + viafb_write_reg_mask(SR1A, VIASR, 0x02, BIT1); + +} + +void viafb_load_reg(int timing_value, int viafb_load_reg_num, + struct io_register *reg, + int io_type) +{ + int reg_mask; + int bit_num = 0; + int data; + int i, j; + int shift_next_reg; + int start_index, end_index, cr_index; + u16 get_bit; + + for (i = 0; i < viafb_load_reg_num; i++) { + reg_mask = 0; + data = 0; + start_index = reg[i].start_bit; + end_index = reg[i].end_bit; + cr_index = reg[i].io_addr; + + shift_next_reg = bit_num; + for (j = start_index; j <= end_index; j++) { + /*if (bit_num==8) timing_value = timing_value >>8; */ + reg_mask = reg_mask | (BIT0 << j); + get_bit = (timing_value & (BIT0 << bit_num)); + data = + data | ((get_bit >> shift_next_reg) << start_index); + bit_num++; + } + if (io_type == VIACR) + viafb_write_reg_mask(cr_index, VIACR, data, reg_mask); + else + viafb_write_reg_mask(cr_index, VIASR, data, reg_mask); + } + +} + +/* Write Registers */ +void viafb_write_regx(struct io_reg RegTable[], int ItemNum) +{ + int i; + unsigned char RegTemp; + + /*DEBUG_MSG(KERN_INFO "Table Size : %x!!\n",ItemNum ); */ + + for (i = 0; i < ItemNum; i++) { + outb(RegTable[i].index, RegTable[i].port); + RegTemp = inb(RegTable[i].port + 1); + RegTemp = (RegTemp & (~RegTable[i].mask)) | RegTable[i].value; + outb(RegTemp, RegTable[i].port + 1); + } +} + +void viafb_load_offset_reg(int h_addr, int bpp_byte, int set_iga) +{ + int reg_value; + int viafb_load_reg_num; + struct io_register *reg; + + switch (set_iga) { + case IGA1_IGA2: + case IGA1: + reg_value = IGA1_OFFSET_FORMULA(h_addr, bpp_byte); + viafb_load_reg_num = offset_reg.iga1_offset_reg.reg_num; + reg = offset_reg.iga1_offset_reg.reg; + viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIACR); + if (set_iga == IGA1) + break; + case IGA2: + reg_value = IGA2_OFFSET_FORMULA(h_addr, bpp_byte); + viafb_load_reg_num = offset_reg.iga2_offset_reg.reg_num; + reg = offset_reg.iga2_offset_reg.reg; + viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIACR); + break; + } +} + +void viafb_load_fetch_count_reg(int h_addr, int bpp_byte, int set_iga) +{ + int reg_value; + int viafb_load_reg_num; + struct io_register *reg = NULL; + + switch (set_iga) { + case IGA1_IGA2: + case IGA1: + reg_value = IGA1_FETCH_COUNT_FORMULA(h_addr, bpp_byte); + viafb_load_reg_num = fetch_count_reg. + iga1_fetch_count_reg.reg_num; + reg = fetch_count_reg.iga1_fetch_count_reg.reg; + viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR); + if (set_iga == IGA1) + break; + case IGA2: + reg_value = IGA2_FETCH_COUNT_FORMULA(h_addr, bpp_byte); + viafb_load_reg_num = fetch_count_reg. + iga2_fetch_count_reg.reg_num; + reg = fetch_count_reg.iga2_fetch_count_reg.reg; + viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIACR); + break; + } + +} + +void viafb_load_FIFO_reg(int set_iga, int hor_active, int ver_active) +{ + int reg_value; + int viafb_load_reg_num; + struct io_register *reg = NULL; + int iga1_fifo_max_depth = 0, iga1_fifo_threshold = + 0, iga1_fifo_high_threshold = 0, iga1_display_queue_expire_num = 0; + int iga2_fifo_max_depth = 0, iga2_fifo_threshold = + 0, iga2_fifo_high_threshold = 0, iga2_display_queue_expire_num = 0; + + if (set_iga == IGA1) { + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K800) { + iga1_fifo_max_depth = K800_IGA1_FIFO_MAX_DEPTH; + iga1_fifo_threshold = K800_IGA1_FIFO_THRESHOLD; + iga1_fifo_high_threshold = + K800_IGA1_FIFO_HIGH_THRESHOLD; + /* If resolution > 1280x1024, expire length = 64, else + expire length = 128 */ + if ((hor_active > 1280) && (ver_active > 1024)) + iga1_display_queue_expire_num = 16; + else + iga1_display_queue_expire_num = + K800_IGA1_DISPLAY_QUEUE_EXPIRE_NUM; + + } + + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_PM800) { + iga1_fifo_max_depth = P880_IGA1_FIFO_MAX_DEPTH; + iga1_fifo_threshold = P880_IGA1_FIFO_THRESHOLD; + iga1_fifo_high_threshold = + P880_IGA1_FIFO_HIGH_THRESHOLD; + iga1_display_queue_expire_num = + P880_IGA1_DISPLAY_QUEUE_EXPIRE_NUM; + + /* If resolution > 1280x1024, expire length = 64, else + expire length = 128 */ + if ((hor_active > 1280) && (ver_active > 1024)) + iga1_display_queue_expire_num = 16; + else + iga1_display_queue_expire_num = + P880_IGA1_DISPLAY_QUEUE_EXPIRE_NUM; + } + + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CN700) { + iga1_fifo_max_depth = CN700_IGA1_FIFO_MAX_DEPTH; + iga1_fifo_threshold = CN700_IGA1_FIFO_THRESHOLD; + iga1_fifo_high_threshold = + CN700_IGA1_FIFO_HIGH_THRESHOLD; + + /* If resolution > 1280x1024, expire length = 64, + else expire length = 128 */ + if ((hor_active > 1280) && (ver_active > 1024)) + iga1_display_queue_expire_num = 16; + else + iga1_display_queue_expire_num = + CN700_IGA1_DISPLAY_QUEUE_EXPIRE_NUM; + } + + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) { + iga1_fifo_max_depth = CX700_IGA1_FIFO_MAX_DEPTH; + iga1_fifo_threshold = CX700_IGA1_FIFO_THRESHOLD; + iga1_fifo_high_threshold = + CX700_IGA1_FIFO_HIGH_THRESHOLD; + iga1_display_queue_expire_num = + CX700_IGA1_DISPLAY_QUEUE_EXPIRE_NUM; + } + + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K8M890) { + iga1_fifo_max_depth = K8M890_IGA1_FIFO_MAX_DEPTH; + iga1_fifo_threshold = K8M890_IGA1_FIFO_THRESHOLD; + iga1_fifo_high_threshold = + K8M890_IGA1_FIFO_HIGH_THRESHOLD; + iga1_display_queue_expire_num = + K8M890_IGA1_DISPLAY_QUEUE_EXPIRE_NUM; + } + + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_P4M890) { + iga1_fifo_max_depth = P4M890_IGA1_FIFO_MAX_DEPTH; + iga1_fifo_threshold = P4M890_IGA1_FIFO_THRESHOLD; + iga1_fifo_high_threshold = + P4M890_IGA1_FIFO_HIGH_THRESHOLD; + iga1_display_queue_expire_num = + P4M890_IGA1_DISPLAY_QUEUE_EXPIRE_NUM; + } + + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_P4M900) { + iga1_fifo_max_depth = P4M900_IGA1_FIFO_MAX_DEPTH; + iga1_fifo_threshold = P4M900_IGA1_FIFO_THRESHOLD; + iga1_fifo_high_threshold = + P4M900_IGA1_FIFO_HIGH_THRESHOLD; + iga1_display_queue_expire_num = + P4M900_IGA1_DISPLAY_QUEUE_EXPIRE_NUM; + } + + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_VX800) { + iga1_fifo_max_depth = VX800_IGA1_FIFO_MAX_DEPTH; + iga1_fifo_threshold = VX800_IGA1_FIFO_THRESHOLD; + iga1_fifo_high_threshold = + VX800_IGA1_FIFO_HIGH_THRESHOLD; + iga1_display_queue_expire_num = + VX800_IGA1_DISPLAY_QUEUE_EXPIRE_NUM; + } + + /* Set Display FIFO Depath Select */ + reg_value = IGA1_FIFO_DEPTH_SELECT_FORMULA(iga1_fifo_max_depth); + viafb_load_reg_num = + display_fifo_depth_reg.iga1_fifo_depth_select_reg.reg_num; + reg = display_fifo_depth_reg.iga1_fifo_depth_select_reg.reg; + viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR); + + /* Set Display FIFO Threshold Select */ + reg_value = IGA1_FIFO_THRESHOLD_FORMULA(iga1_fifo_threshold); + viafb_load_reg_num = + fifo_threshold_select_reg. + iga1_fifo_threshold_select_reg.reg_num; + reg = + fifo_threshold_select_reg. + iga1_fifo_threshold_select_reg.reg; + viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR); + + /* Set FIFO High Threshold Select */ + reg_value = + IGA1_FIFO_HIGH_THRESHOLD_FORMULA(iga1_fifo_high_threshold); + viafb_load_reg_num = + fifo_high_threshold_select_reg. + iga1_fifo_high_threshold_select_reg.reg_num; + reg = + fifo_high_threshold_select_reg. + iga1_fifo_high_threshold_select_reg.reg; + viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR); + + /* Set Display Queue Expire Num */ + reg_value = + IGA1_DISPLAY_QUEUE_EXPIRE_NUM_FORMULA + (iga1_display_queue_expire_num); + viafb_load_reg_num = + display_queue_expire_num_reg. + iga1_display_queue_expire_num_reg.reg_num; + reg = + display_queue_expire_num_reg. + iga1_display_queue_expire_num_reg.reg; + viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR); + + } else { + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K800) { + iga2_fifo_max_depth = K800_IGA2_FIFO_MAX_DEPTH; + iga2_fifo_threshold = K800_IGA2_FIFO_THRESHOLD; + iga2_fifo_high_threshold = + K800_IGA2_FIFO_HIGH_THRESHOLD; + + /* If resolution > 1280x1024, expire length = 64, + else expire length = 128 */ + if ((hor_active > 1280) && (ver_active > 1024)) + iga2_display_queue_expire_num = 16; + else + iga2_display_queue_expire_num = + K800_IGA2_DISPLAY_QUEUE_EXPIRE_NUM; + } + + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_PM800) { + iga2_fifo_max_depth = P880_IGA2_FIFO_MAX_DEPTH; + iga2_fifo_threshold = P880_IGA2_FIFO_THRESHOLD; + iga2_fifo_high_threshold = + P880_IGA2_FIFO_HIGH_THRESHOLD; + + /* If resolution > 1280x1024, expire length = 64, + else expire length = 128 */ + if ((hor_active > 1280) && (ver_active > 1024)) + iga2_display_queue_expire_num = 16; + else + iga2_display_queue_expire_num = + P880_IGA2_DISPLAY_QUEUE_EXPIRE_NUM; + } + + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CN700) { + iga2_fifo_max_depth = CN700_IGA2_FIFO_MAX_DEPTH; + iga2_fifo_threshold = CN700_IGA2_FIFO_THRESHOLD; + iga2_fifo_high_threshold = + CN700_IGA2_FIFO_HIGH_THRESHOLD; + + /* If resolution > 1280x1024, expire length = 64, + else expire length = 128 */ + if ((hor_active > 1280) && (ver_active > 1024)) + iga2_display_queue_expire_num = 16; + else + iga2_display_queue_expire_num = + CN700_IGA2_DISPLAY_QUEUE_EXPIRE_NUM; + } + + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) { + iga2_fifo_max_depth = CX700_IGA2_FIFO_MAX_DEPTH; + iga2_fifo_threshold = CX700_IGA2_FIFO_THRESHOLD; + iga2_fifo_high_threshold = + CX700_IGA2_FIFO_HIGH_THRESHOLD; + iga2_display_queue_expire_num = + CX700_IGA2_DISPLAY_QUEUE_EXPIRE_NUM; + } + + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K8M890) { + iga2_fifo_max_depth = K8M890_IGA2_FIFO_MAX_DEPTH; + iga2_fifo_threshold = K8M890_IGA2_FIFO_THRESHOLD; + iga2_fifo_high_threshold = + K8M890_IGA2_FIFO_HIGH_THRESHOLD; + iga2_display_queue_expire_num = + K8M890_IGA2_DISPLAY_QUEUE_EXPIRE_NUM; + } + + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_P4M890) { + iga2_fifo_max_depth = P4M890_IGA2_FIFO_MAX_DEPTH; + iga2_fifo_threshold = P4M890_IGA2_FIFO_THRESHOLD; + iga2_fifo_high_threshold = + P4M890_IGA2_FIFO_HIGH_THRESHOLD; + iga2_display_queue_expire_num = + P4M890_IGA2_DISPLAY_QUEUE_EXPIRE_NUM; + } + + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_P4M900) { + iga2_fifo_max_depth = P4M900_IGA2_FIFO_MAX_DEPTH; + iga2_fifo_threshold = P4M900_IGA2_FIFO_THRESHOLD; + iga2_fifo_high_threshold = + P4M900_IGA2_FIFO_HIGH_THRESHOLD; + iga2_display_queue_expire_num = + P4M900_IGA2_DISPLAY_QUEUE_EXPIRE_NUM; + } + + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_VX800) { + iga2_fifo_max_depth = VX800_IGA2_FIFO_MAX_DEPTH; + iga2_fifo_threshold = VX800_IGA2_FIFO_THRESHOLD; + iga2_fifo_high_threshold = + VX800_IGA2_FIFO_HIGH_THRESHOLD; + iga2_display_queue_expire_num = + VX800_IGA2_DISPLAY_QUEUE_EXPIRE_NUM; + } + + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K800) { + /* Set Display FIFO Depath Select */ + reg_value = + IGA2_FIFO_DEPTH_SELECT_FORMULA(iga2_fifo_max_depth) + - 1; + /* Patch LCD in IGA2 case */ + viafb_load_reg_num = + display_fifo_depth_reg. + iga2_fifo_depth_select_reg.reg_num; + reg = + display_fifo_depth_reg. + iga2_fifo_depth_select_reg.reg; + viafb_load_reg(reg_value, + viafb_load_reg_num, reg, VIACR); + } else { + + /* Set Display FIFO Depath Select */ + reg_value = + IGA2_FIFO_DEPTH_SELECT_FORMULA(iga2_fifo_max_depth); + viafb_load_reg_num = + display_fifo_depth_reg. + iga2_fifo_depth_select_reg.reg_num; + reg = + display_fifo_depth_reg. + iga2_fifo_depth_select_reg.reg; + viafb_load_reg(reg_value, + viafb_load_reg_num, reg, VIACR); + } + + /* Set Display FIFO Threshold Select */ + reg_value = IGA2_FIFO_THRESHOLD_FORMULA(iga2_fifo_threshold); + viafb_load_reg_num = + fifo_threshold_select_reg. + iga2_fifo_threshold_select_reg.reg_num; + reg = + fifo_threshold_select_reg. + iga2_fifo_threshold_select_reg.reg; + viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIACR); + + /* Set FIFO High Threshold Select */ + reg_value = + IGA2_FIFO_HIGH_THRESHOLD_FORMULA(iga2_fifo_high_threshold); + viafb_load_reg_num = + fifo_high_threshold_select_reg. + iga2_fifo_high_threshold_select_reg.reg_num; + reg = + fifo_high_threshold_select_reg. + iga2_fifo_high_threshold_select_reg.reg; + viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIACR); + + /* Set Display Queue Expire Num */ + reg_value = + IGA2_DISPLAY_QUEUE_EXPIRE_NUM_FORMULA + (iga2_display_queue_expire_num); + viafb_load_reg_num = + display_queue_expire_num_reg. + iga2_display_queue_expire_num_reg.reg_num; + reg = + display_queue_expire_num_reg. + iga2_display_queue_expire_num_reg.reg; + viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIACR); + + } + +} + +u32 viafb_get_clk_value(int clk) +{ + int i; + + for (i = 0; i < NUM_TOTAL_PLL_TABLE; i++) { + if (clk == pll_value[i].clk) { + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_CLE266: + case UNICHROME_K400: + return pll_value[i].cle266_pll; + + case UNICHROME_K800: + case UNICHROME_PM800: + case UNICHROME_CN700: + return pll_value[i].k800_pll; + + case UNICHROME_CX700: + case UNICHROME_K8M890: + case UNICHROME_P4M890: + case UNICHROME_P4M900: + case UNICHROME_VX800: + return pll_value[i].cx700_pll; + } + } + } + + DEBUG_MSG(KERN_INFO "Can't find match PLL value\n\n"); + return 0; +} + +/* Set VCLK*/ +void viafb_set_vclock(u32 CLK, int set_iga) +{ + unsigned char RegTemp; + + /* H.W. Reset : ON */ + viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7); + + if ((set_iga == IGA1) || (set_iga == IGA1_IGA2)) { + /* Change D,N FOR VCLK */ + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_CLE266: + case UNICHROME_K400: + viafb_write_reg(SR46, VIASR, CLK / 0x100); + viafb_write_reg(SR47, VIASR, CLK % 0x100); + break; + + case UNICHROME_K800: + case UNICHROME_PM800: + case UNICHROME_CN700: + case UNICHROME_CX700: + case UNICHROME_K8M890: + case UNICHROME_P4M890: + case UNICHROME_P4M900: + case UNICHROME_VX800: + viafb_write_reg(SR44, VIASR, CLK / 0x10000); + DEBUG_MSG(KERN_INFO "\nSR44=%x", CLK / 0x10000); + viafb_write_reg(SR45, VIASR, (CLK & 0xFFFF) / 0x100); + DEBUG_MSG(KERN_INFO "\nSR45=%x", + (CLK & 0xFFFF) / 0x100); + viafb_write_reg(SR46, VIASR, CLK % 0x100); + DEBUG_MSG(KERN_INFO "\nSR46=%x", CLK % 0x100); + break; + } + } + + if ((set_iga == IGA2) || (set_iga == IGA1_IGA2)) { + /* Change D,N FOR LCK */ + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_CLE266: + case UNICHROME_K400: + viafb_write_reg(SR44, VIASR, CLK / 0x100); + viafb_write_reg(SR45, VIASR, CLK % 0x100); + break; + + case UNICHROME_K800: + case UNICHROME_PM800: + case UNICHROME_CN700: + case UNICHROME_CX700: + case UNICHROME_K8M890: + case UNICHROME_P4M890: + case UNICHROME_P4M900: + case UNICHROME_VX800: + viafb_write_reg(SR4A, VIASR, CLK / 0x10000); + viafb_write_reg(SR4B, VIASR, (CLK & 0xFFFF) / 0x100); + viafb_write_reg(SR4C, VIASR, CLK % 0x100); + break; + } + } + + /* H.W. Reset : OFF */ + viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7); + + /* Reset PLL */ + if ((set_iga == IGA1) || (set_iga == IGA1_IGA2)) { + viafb_write_reg_mask(SR40, VIASR, 0x02, BIT1); + viafb_write_reg_mask(SR40, VIASR, 0x00, BIT1); + } + + if ((set_iga == IGA2) || (set_iga == IGA1_IGA2)) { + viafb_write_reg_mask(SR40, VIASR, 0x01, BIT0); + viafb_write_reg_mask(SR40, VIASR, 0x00, BIT0); + } + + /* Fire! */ + RegTemp = inb(VIARMisc); + outb(RegTemp | (BIT2 + BIT3), VIAWMisc); +} + +void viafb_load_crtc_timing(struct display_timing device_timing, + int set_iga) +{ + int i; + int viafb_load_reg_num = 0; + int reg_value = 0; + struct io_register *reg = NULL; + + viafb_unlock_crt(); + + for (i = 0; i < 12; i++) { + if (set_iga == IGA1) { + switch (i) { + case H_TOTAL_INDEX: + reg_value = + IGA1_HOR_TOTAL_FORMULA(device_timing. + hor_total); + viafb_load_reg_num = + iga1_crtc_reg.hor_total.reg_num; + reg = iga1_crtc_reg.hor_total.reg; + break; + case H_ADDR_INDEX: + reg_value = + IGA1_HOR_ADDR_FORMULA(device_timing. + hor_addr); + viafb_load_reg_num = + iga1_crtc_reg.hor_addr.reg_num; + reg = iga1_crtc_reg.hor_addr.reg; + break; + case H_BLANK_START_INDEX: + reg_value = + IGA1_HOR_BLANK_START_FORMULA + (device_timing.hor_blank_start); + viafb_load_reg_num = + iga1_crtc_reg.hor_blank_start.reg_num; + reg = iga1_crtc_reg.hor_blank_start.reg; + break; + case H_BLANK_END_INDEX: + reg_value = + IGA1_HOR_BLANK_END_FORMULA + (device_timing.hor_blank_start, + device_timing.hor_blank_end); + viafb_load_reg_num = + iga1_crtc_reg.hor_blank_end.reg_num; + reg = iga1_crtc_reg.hor_blank_end.reg; + break; + case H_SYNC_START_INDEX: + reg_value = + IGA1_HOR_SYNC_START_FORMULA + (device_timing.hor_sync_start); + viafb_load_reg_num = + iga1_crtc_reg.hor_sync_start.reg_num; + reg = iga1_crtc_reg.hor_sync_start.reg; + break; + case H_SYNC_END_INDEX: + reg_value = + IGA1_HOR_SYNC_END_FORMULA + (device_timing.hor_sync_start, + device_timing.hor_sync_end); + viafb_load_reg_num = + iga1_crtc_reg.hor_sync_end.reg_num; + reg = iga1_crtc_reg.hor_sync_end.reg; + break; + case V_TOTAL_INDEX: + reg_value = + IGA1_VER_TOTAL_FORMULA(device_timing. + ver_total); + viafb_load_reg_num = + iga1_crtc_reg.ver_total.reg_num; + reg = iga1_crtc_reg.ver_total.reg; + break; + case V_ADDR_INDEX: + reg_value = + IGA1_VER_ADDR_FORMULA(device_timing. + ver_addr); + viafb_load_reg_num = + iga1_crtc_reg.ver_addr.reg_num; + reg = iga1_crtc_reg.ver_addr.reg; + break; + case V_BLANK_START_INDEX: + reg_value = + IGA1_VER_BLANK_START_FORMULA + (device_timing.ver_blank_start); + viafb_load_reg_num = + iga1_crtc_reg.ver_blank_start.reg_num; + reg = iga1_crtc_reg.ver_blank_start.reg; + break; + case V_BLANK_END_INDEX: + reg_value = + IGA1_VER_BLANK_END_FORMULA + (device_timing.ver_blank_start, + device_timing.ver_blank_end); + viafb_load_reg_num = + iga1_crtc_reg.ver_blank_end.reg_num; + reg = iga1_crtc_reg.ver_blank_end.reg; + break; + case V_SYNC_START_INDEX: + reg_value = + IGA1_VER_SYNC_START_FORMULA + (device_timing.ver_sync_start); + viafb_load_reg_num = + iga1_crtc_reg.ver_sync_start.reg_num; + reg = iga1_crtc_reg.ver_sync_start.reg; + break; + case V_SYNC_END_INDEX: + reg_value = + IGA1_VER_SYNC_END_FORMULA + (device_timing.ver_sync_start, + device_timing.ver_sync_end); + viafb_load_reg_num = + iga1_crtc_reg.ver_sync_end.reg_num; + reg = iga1_crtc_reg.ver_sync_end.reg; + break; + + } + } + + if (set_iga == IGA2) { + switch (i) { + case H_TOTAL_INDEX: + reg_value = + IGA2_HOR_TOTAL_FORMULA(device_timing. + hor_total); + viafb_load_reg_num = + iga2_crtc_reg.hor_total.reg_num; + reg = iga2_crtc_reg.hor_total.reg; + break; + case H_ADDR_INDEX: + reg_value = + IGA2_HOR_ADDR_FORMULA(device_timing. + hor_addr); + viafb_load_reg_num = + iga2_crtc_reg.hor_addr.reg_num; + reg = iga2_crtc_reg.hor_addr.reg; + break; + case H_BLANK_START_INDEX: + reg_value = + IGA2_HOR_BLANK_START_FORMULA + (device_timing.hor_blank_start); + viafb_load_reg_num = + iga2_crtc_reg.hor_blank_start.reg_num; + reg = iga2_crtc_reg.hor_blank_start.reg; + break; + case H_BLANK_END_INDEX: + reg_value = + IGA2_HOR_BLANK_END_FORMULA + (device_timing.hor_blank_start, + device_timing.hor_blank_end); + viafb_load_reg_num = + iga2_crtc_reg.hor_blank_end.reg_num; + reg = iga2_crtc_reg.hor_blank_end.reg; + break; + case H_SYNC_START_INDEX: + reg_value = + IGA2_HOR_SYNC_START_FORMULA + (device_timing.hor_sync_start); + if (UNICHROME_CN700 <= + viaparinfo->chip_info->gfx_chip_name) + viafb_load_reg_num = + iga2_crtc_reg.hor_sync_start. + reg_num; + else + viafb_load_reg_num = 3; + reg = iga2_crtc_reg.hor_sync_start.reg; + break; + case H_SYNC_END_INDEX: + reg_value = + IGA2_HOR_SYNC_END_FORMULA + (device_timing.hor_sync_start, + device_timing.hor_sync_end); + viafb_load_reg_num = + iga2_crtc_reg.hor_sync_end.reg_num; + reg = iga2_crtc_reg.hor_sync_end.reg; + break; + case V_TOTAL_INDEX: + reg_value = + IGA2_VER_TOTAL_FORMULA(device_timing. + ver_total); + viafb_load_reg_num = + iga2_crtc_reg.ver_total.reg_num; + reg = iga2_crtc_reg.ver_total.reg; + break; + case V_ADDR_INDEX: + reg_value = + IGA2_VER_ADDR_FORMULA(device_timing. + ver_addr); + viafb_load_reg_num = + iga2_crtc_reg.ver_addr.reg_num; + reg = iga2_crtc_reg.ver_addr.reg; + break; + case V_BLANK_START_INDEX: + reg_value = + IGA2_VER_BLANK_START_FORMULA + (device_timing.ver_blank_start); + viafb_load_reg_num = + iga2_crtc_reg.ver_blank_start.reg_num; + reg = iga2_crtc_reg.ver_blank_start.reg; + break; + case V_BLANK_END_INDEX: + reg_value = + IGA2_VER_BLANK_END_FORMULA + (device_timing.ver_blank_start, + device_timing.ver_blank_end); + viafb_load_reg_num = + iga2_crtc_reg.ver_blank_end.reg_num; + reg = iga2_crtc_reg.ver_blank_end.reg; + break; + case V_SYNC_START_INDEX: + reg_value = + IGA2_VER_SYNC_START_FORMULA + (device_timing.ver_sync_start); + viafb_load_reg_num = + iga2_crtc_reg.ver_sync_start.reg_num; + reg = iga2_crtc_reg.ver_sync_start.reg; + break; + case V_SYNC_END_INDEX: + reg_value = + IGA2_VER_SYNC_END_FORMULA + (device_timing.ver_sync_start, + device_timing.ver_sync_end); + viafb_load_reg_num = + iga2_crtc_reg.ver_sync_end.reg_num; + reg = iga2_crtc_reg.ver_sync_end.reg; + break; + + } + } + viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIACR); + } + + viafb_lock_crt(); +} + +void viafb_set_color_depth(int bpp_byte, int set_iga) +{ + if (set_iga == IGA1) { + switch (bpp_byte) { + case MODE_8BPP: + viafb_write_reg_mask(SR15, VIASR, 0x22, 0x7E); + break; + case MODE_16BPP: + viafb_write_reg_mask(SR15, VIASR, 0xB6, 0xFE); + break; + case MODE_32BPP: + viafb_write_reg_mask(SR15, VIASR, 0xAE, 0xFE); + break; + } + } else { + switch (bpp_byte) { + case MODE_8BPP: + viafb_write_reg_mask(CR67, VIACR, 0x00, BIT6 + BIT7); + break; + case MODE_16BPP: + viafb_write_reg_mask(CR67, VIACR, 0x40, BIT6 + BIT7); + break; + case MODE_32BPP: + viafb_write_reg_mask(CR67, VIACR, 0xC0, BIT6 + BIT7); + break; + } + } +} + +void viafb_fill_crtc_timing(struct crt_mode_table *crt_table, + int mode_index, int bpp_byte, int set_iga) +{ + struct VideoModeTable *video_mode; + struct display_timing crt_reg; + int i; + int index = 0; + int h_addr, v_addr; + u32 pll_D_N; + + video_mode = &CLE266Modes[search_mode_setting(mode_index)]; + + for (i = 0; i < video_mode->mode_array; i++) { + index = i; + + if (crt_table[i].refresh_rate == viaparinfo-> + crt_setting_info->refresh_rate) + break; + } + + crt_reg = crt_table[index].crtc; + + /* Mode 640x480 has border, but LCD/DFP didn't have border. */ + /* So we would delete border. */ + if ((viafb_LCD_ON | viafb_DVI_ON) && (mode_index == VIA_RES_640X480) + && (viaparinfo->crt_setting_info->refresh_rate == 60)) { + /* The border is 8 pixels. */ + crt_reg.hor_blank_start = crt_reg.hor_blank_start - 8; + + /* Blanking time should add left and right borders. */ + crt_reg.hor_blank_end = crt_reg.hor_blank_end + 16; + } + + h_addr = crt_reg.hor_addr; + v_addr = crt_reg.ver_addr; + + /* update polarity for CRT timing */ + if (crt_table[index].h_sync_polarity == NEGATIVE) { + if (crt_table[index].v_sync_polarity == NEGATIVE) + outb((inb(VIARMisc) & (~(BIT6 + BIT7))) | + (BIT6 + BIT7), VIAWMisc); + else + outb((inb(VIARMisc) & (~(BIT6 + BIT7))) | (BIT6), + VIAWMisc); + } else { + if (crt_table[index].v_sync_polarity == NEGATIVE) + outb((inb(VIARMisc) & (~(BIT6 + BIT7))) | (BIT7), + VIAWMisc); + else + outb((inb(VIARMisc) & (~(BIT6 + BIT7))), VIAWMisc); + } + + if (set_iga == IGA1) { + viafb_unlock_crt(); + viafb_write_reg(CR09, VIACR, 0x00); /*initial CR09=0 */ + viafb_write_reg_mask(CR11, VIACR, 0x00, BIT4 + BIT5 + BIT6); + viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7); + } + + switch (set_iga) { + case IGA1: + viafb_load_crtc_timing(crt_reg, IGA1); + break; + case IGA2: + viafb_load_crtc_timing(crt_reg, IGA2); + break; + } + + load_fix_bit_crtc_reg(); + viafb_lock_crt(); + viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7); + viafb_load_offset_reg(h_addr, bpp_byte, set_iga); + viafb_load_fetch_count_reg(h_addr, bpp_byte, set_iga); + + /* load FIFO */ + if ((viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266) + && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400)) + viafb_load_FIFO_reg(set_iga, h_addr, v_addr); + + /* load SR Register About Memory and Color part */ + viafb_set_color_depth(bpp_byte, set_iga); + + pll_D_N = viafb_get_clk_value(crt_table[index].clk); + DEBUG_MSG(KERN_INFO "PLL=%x", pll_D_N); + viafb_set_vclock(pll_D_N, set_iga); + +} + +void viafb_init_chip_info(void) +{ + init_gfx_chip_info(); + init_tmds_chip_info(); + init_lvds_chip_info(); + + viaparinfo->crt_setting_info->iga_path = IGA1; + viaparinfo->crt_setting_info->refresh_rate = viafb_refresh; + + /*Set IGA path for each device */ + viafb_set_iga_path(); + + viaparinfo->lvds_setting_info->display_method = viafb_lcd_dsp_method; + viaparinfo->lvds_setting_info->get_lcd_size_method = + GET_LCD_SIZE_BY_USER_SETTING; + viaparinfo->lvds_setting_info->lcd_mode = viafb_lcd_mode; + viaparinfo->lvds_setting_info2->display_method = + viaparinfo->lvds_setting_info->display_method; + viaparinfo->lvds_setting_info2->lcd_mode = + viaparinfo->lvds_setting_info->lcd_mode; +} + +void viafb_update_device_setting(int hres, int vres, + int bpp, int vmode_refresh, int flag) +{ + if (flag == 0) { + viaparinfo->crt_setting_info->h_active = hres; + viaparinfo->crt_setting_info->v_active = vres; + viaparinfo->crt_setting_info->bpp = bpp; + viaparinfo->crt_setting_info->refresh_rate = + vmode_refresh; + + viaparinfo->tmds_setting_info->h_active = hres; + viaparinfo->tmds_setting_info->v_active = vres; + viaparinfo->tmds_setting_info->bpp = bpp; + viaparinfo->tmds_setting_info->refresh_rate = + vmode_refresh; + + viaparinfo->lvds_setting_info->h_active = hres; + viaparinfo->lvds_setting_info->v_active = vres; + viaparinfo->lvds_setting_info->bpp = bpp; + viaparinfo->lvds_setting_info->refresh_rate = + vmode_refresh; + viaparinfo->lvds_setting_info2->h_active = hres; + viaparinfo->lvds_setting_info2->v_active = vres; + viaparinfo->lvds_setting_info2->bpp = bpp; + viaparinfo->lvds_setting_info2->refresh_rate = + vmode_refresh; + } else { + + if (viaparinfo->tmds_setting_info->iga_path == IGA2) { + viaparinfo->tmds_setting_info->h_active = hres; + viaparinfo->tmds_setting_info->v_active = vres; + viaparinfo->tmds_setting_info->bpp = bpp; + viaparinfo->tmds_setting_info->refresh_rate = + vmode_refresh; + } + + if (viaparinfo->lvds_setting_info->iga_path == IGA2) { + viaparinfo->lvds_setting_info->h_active = hres; + viaparinfo->lvds_setting_info->v_active = vres; + viaparinfo->lvds_setting_info->bpp = bpp; + viaparinfo->lvds_setting_info->refresh_rate = + vmode_refresh; + } + if (IGA2 == viaparinfo->lvds_setting_info2->iga_path) { + viaparinfo->lvds_setting_info2->h_active = hres; + viaparinfo->lvds_setting_info2->v_active = vres; + viaparinfo->lvds_setting_info2->bpp = bpp; + viaparinfo->lvds_setting_info2->refresh_rate = + vmode_refresh; + } + } +} + +static void init_gfx_chip_info(void) +{ + struct pci_dev *pdev = NULL; + u32 i; + u8 tmp; + + /* Indentify GFX Chip Name */ + for (i = 0; pciidlist[i].vendor != 0; i++) { + pdev = pci_get_device(pciidlist[i].vendor, + pciidlist[i].device, 0); + if (pdev) + break; + } + + if (!pciidlist[i].vendor) + return ; + + viaparinfo->chip_info->gfx_chip_name = pciidlist[i].chip_index; + + /* Check revision of CLE266 Chip */ + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) { + /* CR4F only define in CLE266.CX chip */ + tmp = viafb_read_reg(VIACR, CR4F); + viafb_write_reg(CR4F, VIACR, 0x55); + if (viafb_read_reg(VIACR, CR4F) != 0x55) + viaparinfo->chip_info->gfx_chip_revision = + CLE266_REVISION_AX; + else + viaparinfo->chip_info->gfx_chip_revision = + CLE266_REVISION_CX; + /* restore orignal CR4F value */ + viafb_write_reg(CR4F, VIACR, tmp); + } + + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) { + tmp = viafb_read_reg(VIASR, SR43); + DEBUG_MSG(KERN_INFO "SR43:%X\n", tmp); + if (tmp & 0x02) { + viaparinfo->chip_info->gfx_chip_revision = + CX700_REVISION_700M2; + } else if (tmp & 0x40) { + viaparinfo->chip_info->gfx_chip_revision = + CX700_REVISION_700M; + } else { + viaparinfo->chip_info->gfx_chip_revision = + CX700_REVISION_700; + } + } + + pci_dev_put(pdev); +} + +static void init_tmds_chip_info(void) +{ + viafb_tmds_trasmitter_identify(); + + if (INTERFACE_NONE == viaparinfo->chip_info->tmds_chip_info. + output_interface) { + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_CX700: + { + /* we should check support by hardware layout.*/ + if ((viafb_display_hardware_layout == + HW_LAYOUT_DVI_ONLY) + || (viafb_display_hardware_layout == + HW_LAYOUT_LCD_DVI)) { + viaparinfo->chip_info->tmds_chip_info. + output_interface = INTERFACE_TMDS; + } else { + viaparinfo->chip_info->tmds_chip_info. + output_interface = + INTERFACE_NONE; + } + break; + } + case UNICHROME_K8M890: + case UNICHROME_P4M900: + case UNICHROME_P4M890: + /* TMDS on PCIE, we set DFPLOW as default. */ + viaparinfo->chip_info->tmds_chip_info.output_interface = + INTERFACE_DFP_LOW; + break; + default: + { + /* set DVP1 default for DVI */ + viaparinfo->chip_info->tmds_chip_info + .output_interface = INTERFACE_DVP1; + } + } + } + + DEBUG_MSG(KERN_INFO "TMDS Chip = %d\n", + viaparinfo->chip_info->tmds_chip_info.tmds_chip_name); + viaparinfo->tmds_setting_info->get_dvi_size_method = + GET_DVI_SIZE_BY_VGA_BIOS; + viafb_init_dvi_size(); +} + +static void init_lvds_chip_info(void) +{ + if (viafb_lcd_panel_id > LCD_PANEL_ID_MAXIMUM) + viaparinfo->lvds_setting_info->get_lcd_size_method = + GET_LCD_SIZE_BY_VGA_BIOS; + else + viaparinfo->lvds_setting_info->get_lcd_size_method = + GET_LCD_SIZE_BY_USER_SETTING; + + viafb_lvds_trasmitter_identify(); + viafb_init_lcd_size(); + viafb_init_lvds_output_interface(&viaparinfo->chip_info->lvds_chip_info, + viaparinfo->lvds_setting_info); + if (viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name) { + viafb_init_lvds_output_interface(&viaparinfo->chip_info-> + lvds_chip_info2, viaparinfo->lvds_setting_info2); + } + /*If CX700,two singel LCD, we need to reassign + LCD interface to different LVDS port */ + if ((UNICHROME_CX700 == viaparinfo->chip_info->gfx_chip_name) + && (HW_LAYOUT_LCD1_LCD2 == viafb_display_hardware_layout)) { + if ((INTEGRATED_LVDS == viaparinfo->chip_info->lvds_chip_info. + lvds_chip_name) && (INTEGRATED_LVDS == + viaparinfo->chip_info-> + lvds_chip_info2.lvds_chip_name)) { + viaparinfo->chip_info->lvds_chip_info.output_interface = + INTERFACE_LVDS0; + viaparinfo->chip_info->lvds_chip_info2. + output_interface = + INTERFACE_LVDS1; + } + } + + DEBUG_MSG(KERN_INFO "LVDS Chip = %d\n", + viaparinfo->chip_info->lvds_chip_info.lvds_chip_name); + DEBUG_MSG(KERN_INFO "LVDS1 output_interface = %d\n", + viaparinfo->chip_info->lvds_chip_info.output_interface); + DEBUG_MSG(KERN_INFO "LVDS2 output_interface = %d\n", + viaparinfo->chip_info->lvds_chip_info.output_interface); +} + +void viafb_init_dac(int set_iga) +{ + int i; + u8 tmp; + + if (set_iga == IGA1) { + /* access Primary Display's LUT */ + viafb_write_reg_mask(SR1A, VIASR, 0x00, BIT0); + /* turn off LCK */ + viafb_write_reg_mask(SR1B, VIASR, 0x00, BIT7 + BIT6); + for (i = 0; i < 256; i++) { + write_dac_reg(i, palLUT_table[i].red, + palLUT_table[i].green, + palLUT_table[i].blue); + } + /* turn on LCK */ + viafb_write_reg_mask(SR1B, VIASR, 0xC0, BIT7 + BIT6); + } else { + tmp = viafb_read_reg(VIACR, CR6A); + /* access Secondary Display's LUT */ + viafb_write_reg_mask(CR6A, VIACR, 0x40, BIT6); + viafb_write_reg_mask(SR1A, VIASR, 0x01, BIT0); + for (i = 0; i < 256; i++) { + write_dac_reg(i, palLUT_table[i].red, + palLUT_table[i].green, + palLUT_table[i].blue); + } + /* set IGA1 DAC for default */ + viafb_write_reg_mask(SR1A, VIASR, 0x00, BIT0); + viafb_write_reg(CR6A, VIACR, tmp); + } +} + +static void device_screen_off(void) +{ + /* turn off CRT screen (IGA1) */ + viafb_write_reg_mask(SR01, VIASR, 0x20, BIT5); +} + +static void device_screen_on(void) +{ + /* turn on CRT screen (IGA1) */ + viafb_write_reg_mask(SR01, VIASR, 0x00, BIT5); +} + +static void set_display_channel(void) +{ + /*If viafb_LCD2_ON, on cx700, internal lvds's information + is keeped on lvds_setting_info2 */ + if (viafb_LCD2_ON && + viaparinfo->lvds_setting_info2->device_lcd_dualedge) { + /* For dual channel LCD: */ + /* Set to Dual LVDS channel. */ + viafb_write_reg_mask(CRD2, VIACR, 0x20, BIT4 + BIT5); + } else if (viafb_LCD_ON && viafb_DVI_ON) { + /* For LCD+DFP: */ + /* Set to LVDS1 + TMDS channel. */ + viafb_write_reg_mask(CRD2, VIACR, 0x10, BIT4 + BIT5); + } else if (viafb_DVI_ON) { + /* Set to single TMDS channel. */ + viafb_write_reg_mask(CRD2, VIACR, 0x30, BIT4 + BIT5); + } else if (viafb_LCD_ON) { + if (viaparinfo->lvds_setting_info->device_lcd_dualedge) { + /* For dual channel LCD: */ + /* Set to Dual LVDS channel. */ + viafb_write_reg_mask(CRD2, VIACR, 0x20, BIT4 + BIT5); + } else { + /* Set to LVDS0 + LVDS1 channel. */ + viafb_write_reg_mask(CRD2, VIACR, 0x00, BIT4 + BIT5); + } + } +} + +int viafb_setmode(int vmode_index, int hor_res, int ver_res, int video_bpp, + int vmode_index1, int hor_res1, int ver_res1, int video_bpp1) +{ + int i, j; + int port; + u8 value, index, mask; + struct VideoModeTable *vmode_tbl; + struct crt_mode_table *crt_timing; + struct VideoModeTable *vmode_tbl1 = NULL; + struct crt_mode_table *crt_timing1 = NULL; + + DEBUG_MSG(KERN_INFO "Set Mode!!\n"); + DEBUG_MSG(KERN_INFO + "vmode_index=%d hor_res=%d ver_res=%d video_bpp=%d\n", + vmode_index, hor_res, ver_res, video_bpp); + + device_screen_off(); + vmode_tbl = &CLE266Modes[search_mode_setting(vmode_index)]; + crt_timing = vmode_tbl->crtc; + + if (viafb_SAMM_ON == 1) { + vmode_tbl1 = &CLE266Modes[search_mode_setting(vmode_index1)]; + crt_timing1 = vmode_tbl1->crtc; + } + + inb(VIAStatus); + outb(0x00, VIAAR); + + /* Write Common Setting for Video Mode */ + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_CLE266: + viafb_write_regx(CLE266_ModeXregs, NUM_TOTAL_CLE266_ModeXregs); + break; + + case UNICHROME_K400: + viafb_write_regx(KM400_ModeXregs, NUM_TOTAL_KM400_ModeXregs); + break; + + case UNICHROME_K800: + case UNICHROME_PM800: + viafb_write_regx(CN400_ModeXregs, NUM_TOTAL_CN400_ModeXregs); + break; + + case UNICHROME_CN700: + case UNICHROME_K8M890: + case UNICHROME_P4M890: + case UNICHROME_P4M900: + viafb_write_regx(CN700_ModeXregs, NUM_TOTAL_CN700_ModeXregs); + break; + + case UNICHROME_CX700: + viafb_write_regx(CX700_ModeXregs, NUM_TOTAL_CX700_ModeXregs); + + case UNICHROME_VX800: + viafb_write_regx(VX800_ModeXregs, NUM_TOTAL_VX800_ModeXregs); + + break; + } + + device_off(); + + /* Fill VPIT Parameters */ + /* Write Misc Register */ + outb(VPIT.Misc, VIAWMisc); + + /* Write Sequencer */ + for (i = 1; i <= StdSR; i++) { + outb(i, VIASR); + outb(VPIT.SR[i - 1], VIASR + 1); + } + + viafb_set_start_addr(); + viafb_set_iga_path(); + + /* Write CRTC */ + viafb_fill_crtc_timing(crt_timing, vmode_index, video_bpp / 8, IGA1); + + /* Write Graphic Controller */ + for (i = 0; i < StdGR; i++) { + outb(i, VIAGR); + outb(VPIT.GR[i], VIAGR + 1); + } + + /* Write Attribute Controller */ + for (i = 0; i < StdAR; i++) { + inb(VIAStatus); + outb(i, VIAAR); + outb(VPIT.AR[i], VIAAR); + } + + inb(VIAStatus); + outb(0x20, VIAAR); + + /* Update Patch Register */ + + if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) + || (viaparinfo->chip_info->gfx_chip_name == UNICHROME_K400)) { + for (i = 0; i < NUM_TOTAL_PATCH_MODE; i++) { + if (res_patch_table[i].mode_index == vmode_index) { + for (j = 0; + j < res_patch_table[i].table_length; j++) { + index = + res_patch_table[i]. + io_reg_table[j].index; + port = + res_patch_table[i]. + io_reg_table[j].port; + value = + res_patch_table[i]. + io_reg_table[j].value; + mask = + res_patch_table[i]. + io_reg_table[j].mask; + viafb_write_reg_mask(index, port, value, + mask); + } + } + } + } + + if (viafb_SAMM_ON == 1) { + if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) + || (viaparinfo->chip_info->gfx_chip_name == + UNICHROME_K400)) { + for (i = 0; i < NUM_TOTAL_PATCH_MODE; i++) { + if (res_patch_table[i].mode_index == + vmode_index1) { + for (j = 0; + j < + res_patch_table[i]. + table_length; j++) { + index = + res_patch_table[i]. + io_reg_table[j].index; + port = + res_patch_table[i]. + io_reg_table[j].port; + value = + res_patch_table[i]. + io_reg_table[j].value; + mask = + res_patch_table[i]. + io_reg_table[j].mask; + viafb_write_reg_mask(index, + port, value, mask); + } + } + } + } + } + + /* Update Refresh Rate Setting */ + + /* Clear On Screen */ + + /* CRT set mode */ + if (viafb_CRT_ON) { + if (viafb_SAMM_ON && (viaparinfo->crt_setting_info->iga_path == + IGA2)) { + viafb_fill_crtc_timing(crt_timing1, vmode_index1, + video_bpp1 / 8, + viaparinfo->crt_setting_info->iga_path); + } else { + viafb_fill_crtc_timing(crt_timing, vmode_index, + video_bpp / 8, + viaparinfo->crt_setting_info->iga_path); + } + + set_crt_output_path(viaparinfo->crt_setting_info->iga_path); + + /* Patch if set_hres is not 8 alignment (1366) to viafb_setmode + to 8 alignment (1368),there is several pixels (2 pixels) + on right side of screen. */ + if (hor_res % 8) { + viafb_unlock_crt(); + viafb_write_reg(CR02, VIACR, + viafb_read_reg(VIACR, CR02) - 1); + viafb_lock_crt(); + } + } + + if (viafb_DVI_ON) { + if (viafb_SAMM_ON && + (viaparinfo->tmds_setting_info->iga_path == IGA2)) { + viafb_dvi_set_mode(viafb_get_mode_index + (viaparinfo->tmds_setting_info->h_active, + viaparinfo->tmds_setting_info-> + v_active, 1), + video_bpp1, viaparinfo-> + tmds_setting_info->iga_path); + } else { + viafb_dvi_set_mode(viafb_get_mode_index + (viaparinfo->tmds_setting_info->h_active, + viaparinfo-> + tmds_setting_info->v_active, 0), + video_bpp, viaparinfo-> + tmds_setting_info->iga_path); + } + } + + if (viafb_LCD_ON) { + if (viafb_SAMM_ON && + (viaparinfo->lvds_setting_info->iga_path == IGA2)) { + viaparinfo->lvds_setting_info->bpp = video_bpp1; + viafb_lcd_set_mode(crt_timing1, viaparinfo-> + lvds_setting_info, + &viaparinfo->chip_info->lvds_chip_info); + } else { + /* IGA1 doesn't have LCD scaling, so set it center. */ + if (viaparinfo->lvds_setting_info->iga_path == IGA1) { + viaparinfo->lvds_setting_info->display_method = + LCD_CENTERING; + } + viaparinfo->lvds_setting_info->bpp = video_bpp; + viafb_lcd_set_mode(crt_timing, viaparinfo-> + lvds_setting_info, + &viaparinfo->chip_info->lvds_chip_info); + } + } + if (viafb_LCD2_ON) { + if (viafb_SAMM_ON && + (viaparinfo->lvds_setting_info2->iga_path == IGA2)) { + viaparinfo->lvds_setting_info2->bpp = video_bpp1; + viafb_lcd_set_mode(crt_timing1, viaparinfo-> + lvds_setting_info2, + &viaparinfo->chip_info->lvds_chip_info2); + } else { + /* IGA1 doesn't have LCD scaling, so set it center. */ + if (viaparinfo->lvds_setting_info2->iga_path == IGA1) { + viaparinfo->lvds_setting_info2->display_method = + LCD_CENTERING; + } + viaparinfo->lvds_setting_info2->bpp = video_bpp; + viafb_lcd_set_mode(crt_timing, viaparinfo-> + lvds_setting_info2, + &viaparinfo->chip_info->lvds_chip_info2); + } + } + + if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) + && (viafb_LCD_ON || viafb_DVI_ON)) + set_display_channel(); + + /* If set mode normally, save resolution information for hot-plug . */ + if (!viafb_hotplug) { + viafb_hotplug_Xres = hor_res; + viafb_hotplug_Yres = ver_res; + viafb_hotplug_bpp = video_bpp; + viafb_hotplug_refresh = viafb_refresh; + + if (viafb_DVI_ON) + viafb_DeviceStatus = DVI_Device; + else + viafb_DeviceStatus = CRT_Device; + } + device_on(); + + if (viafb_SAMM_ON == 1) + viafb_write_reg_mask(CR6A, VIACR, 0xC0, BIT6 + BIT7); + + device_screen_on(); + return 1; +} + +int viafb_get_pixclock(int hres, int vres, int vmode_refresh) +{ + int i; + + for (i = 0; i < NUM_TOTAL_RES_MAP_REFRESH; i++) { + if ((hres == res_map_refresh_tbl[i].hres) + && (vres == res_map_refresh_tbl[i].vres) + && (vmode_refresh == res_map_refresh_tbl[i].vmode_refresh)) + return res_map_refresh_tbl[i].pixclock; + } + return RES_640X480_60HZ_PIXCLOCK; + +} + +int viafb_get_refresh(int hres, int vres, u32 long_refresh) +{ +#define REFRESH_TOLERANCE 3 + int i, nearest = -1, diff = REFRESH_TOLERANCE; + for (i = 0; i < NUM_TOTAL_RES_MAP_REFRESH; i++) { + if ((hres == res_map_refresh_tbl[i].hres) + && (vres == res_map_refresh_tbl[i].vres) + && (diff > (abs(long_refresh - + res_map_refresh_tbl[i].vmode_refresh)))) { + diff = abs(long_refresh - res_map_refresh_tbl[i]. + vmode_refresh); + nearest = i; + } + } +#undef REFRESH_TOLERANCE + if (nearest > 0) + return res_map_refresh_tbl[nearest].vmode_refresh; + return 60; +} + +static void device_off(void) +{ + viafb_crt_disable(); + viafb_dvi_disable(); + viafb_lcd_disable(); +} + +static void device_on(void) +{ + if (viafb_CRT_ON == 1) + viafb_crt_enable(); + if (viafb_DVI_ON == 1) + viafb_dvi_enable(); + if (viafb_LCD_ON == 1) + viafb_lcd_enable(); +} + +void viafb_crt_disable(void) +{ + viafb_write_reg_mask(CR36, VIACR, BIT5 + BIT4, BIT5 + BIT4); +} + +void viafb_crt_enable(void) +{ + viafb_write_reg_mask(CR36, VIACR, 0x0, BIT5 + BIT4); +} + +void viafb_get_mmio_info(unsigned long *mmio_base, + unsigned long *mmio_len) +{ + struct pci_dev *pdev = NULL; + u32 vendor, device; + u32 i; + + for (i = 0; pciidlist[i].vendor != 0; i++) + if (viaparinfo->chip_info->gfx_chip_name == + pciidlist[i].chip_index) + break; + + if (!pciidlist[i].vendor) + return ; + + vendor = pciidlist[i].vendor; + device = pciidlist[i].device; + + pdev = pci_get_device(vendor, device, NULL); + + if (!pdev) { + *mmio_base = 0; + *mmio_len = 0; + return ; + } + + *mmio_base = pci_resource_start(pdev, 1); + *mmio_len = pci_resource_len(pdev, 1); + + pci_dev_put(pdev); +} + +static void enable_second_display_channel(void) +{ + /* to enable second display channel. */ + viafb_write_reg_mask(CR6A, VIACR, 0x00, BIT6); + viafb_write_reg_mask(CR6A, VIACR, BIT7, BIT7); + viafb_write_reg_mask(CR6A, VIACR, BIT6, BIT6); +} + +static void disable_second_display_channel(void) +{ + /* to disable second display channel. */ + viafb_write_reg_mask(CR6A, VIACR, 0x00, BIT6); + viafb_write_reg_mask(CR6A, VIACR, 0x00, BIT7); + viafb_write_reg_mask(CR6A, VIACR, BIT6, BIT6); +} + +void viafb_get_fb_info(unsigned int *fb_base, unsigned int *fb_len) +{ + struct pci_dev *pdev = NULL; + u32 vendor, device; + u32 i; + + for (i = 0; pciidlist[i].vendor != 0; i++) + if (viaparinfo->chip_info->gfx_chip_name == + pciidlist[i].chip_index) + break; + + if (!pciidlist[i].vendor) + return ; + + vendor = pciidlist[i].vendor; + device = pciidlist[i].device; + + pdev = pci_get_device(vendor, device, NULL); + + if (!pdev) { + *fb_base = viafb_read_reg(VIASR, SR30) << 24; + *fb_len = viafb_get_memsize(); + DEBUG_MSG(KERN_INFO "Get FB info from SR30!\n"); + DEBUG_MSG(KERN_INFO "fb_base = %08x\n", *fb_base); + DEBUG_MSG(KERN_INFO "fb_len = %08x\n", *fb_len); + return ; + } + + *fb_base = (unsigned int)pci_resource_start(pdev, 0); + *fb_len = get_fb_size_from_pci(); + DEBUG_MSG(KERN_INFO "Get FB info from PCI system!\n"); + DEBUG_MSG(KERN_INFO "fb_base = %08x\n", *fb_base); + DEBUG_MSG(KERN_INFO "fb_len = %08x\n", *fb_len); + + pci_dev_put(pdev); +} + +static int get_fb_size_from_pci(void) +{ + unsigned long configid, deviceid, FBSize = 0; + int VideoMemSize; + int DeviceFound = false; + + for (configid = 0x80000000; configid < 0x80010800; configid += 0x100) { + outl(configid, (unsigned long)0xCF8); + deviceid = (inl((unsigned long)0xCFC) >> 16) & 0xffff; + + switch (deviceid) { + case CLE266: + case KM400: + outl(configid + 0xE0, (unsigned long)0xCF8); + FBSize = inl((unsigned long)0xCFC); + DeviceFound = true; /* Found device id */ + break; + + case CN400_FUNCTION3: + case CN700_FUNCTION3: + case CX700_FUNCTION3: + case KM800_FUNCTION3: + case KM890_FUNCTION3: + case P4M890_FUNCTION3: + case P4M900_FUNCTION3: + case VX800_FUNCTION3: + /*case CN750_FUNCTION3: */ + outl(configid + 0xA0, (unsigned long)0xCF8); + FBSize = inl((unsigned long)0xCFC); + DeviceFound = true; /* Found device id */ + break; + + default: + break; + } + + if (DeviceFound) + break; + } + + DEBUG_MSG(KERN_INFO "Device ID = %lx\n", deviceid); + + FBSize = FBSize & 0x00007000; + DEBUG_MSG(KERN_INFO "FB Size = %x\n", FBSize); + + if (viaparinfo->chip_info->gfx_chip_name < UNICHROME_CX700) { + switch (FBSize) { + case 0x00004000: + VideoMemSize = (16 << 20); /*16M */ + break; + + case 0x00005000: + VideoMemSize = (32 << 20); /*32M */ + break; + + case 0x00006000: + VideoMemSize = (64 << 20); /*64M */ + break; + + default: + VideoMemSize = (32 << 20); /*32M */ + break; + } + } else { + switch (FBSize) { + case 0x00001000: + VideoMemSize = (8 << 20); /*8M */ + break; + + case 0x00002000: + VideoMemSize = (16 << 20); /*16M */ + break; + + case 0x00003000: + VideoMemSize = (32 << 20); /*32M */ + break; + + case 0x00004000: + VideoMemSize = (64 << 20); /*64M */ + break; + + case 0x00005000: + VideoMemSize = (128 << 20); /*128M */ + break; + + case 0x00006000: + VideoMemSize = (256 << 20); /*256M */ + break; + + default: + VideoMemSize = (32 << 20); /*32M */ + break; + } + } + + return VideoMemSize; +} + +void viafb_set_dpa_gfx(int output_interface, struct GFX_DPA_SETTING\ + *p_gfx_dpa_setting) +{ + switch (output_interface) { + case INTERFACE_DVP0: + { + /* DVP0 Clock Polarity and Adjust: */ + viafb_write_reg_mask(CR96, VIACR, + p_gfx_dpa_setting->DVP0, 0x0F); + + /* DVP0 Clock and Data Pads Driving: */ + viafb_write_reg_mask(SR1E, VIASR, + p_gfx_dpa_setting->DVP0ClockDri_S, BIT2); + viafb_write_reg_mask(SR2A, VIASR, + p_gfx_dpa_setting->DVP0ClockDri_S1, + BIT4); + viafb_write_reg_mask(SR1B, VIASR, + p_gfx_dpa_setting->DVP0DataDri_S, BIT1); + viafb_write_reg_mask(SR2A, VIASR, + p_gfx_dpa_setting->DVP0DataDri_S1, BIT5); + break; + } + + case INTERFACE_DVP1: + { + /* DVP1 Clock Polarity and Adjust: */ + viafb_write_reg_mask(CR9B, VIACR, + p_gfx_dpa_setting->DVP1, 0x0F); + + /* DVP1 Clock and Data Pads Driving: */ + viafb_write_reg_mask(SR65, VIASR, + p_gfx_dpa_setting->DVP1Driving, 0x0F); + break; + } + + case INTERFACE_DFP_HIGH: + { + viafb_write_reg_mask(CR97, VIACR, + p_gfx_dpa_setting->DFPHigh, 0x0F); + break; + } + + case INTERFACE_DFP_LOW: + { + viafb_write_reg_mask(CR99, VIACR, + p_gfx_dpa_setting->DFPLow, 0x0F); + break; + } + + case INTERFACE_DFP: + { + viafb_write_reg_mask(CR97, VIACR, + p_gfx_dpa_setting->DFPHigh, 0x0F); + viafb_write_reg_mask(CR99, VIACR, + p_gfx_dpa_setting->DFPLow, 0x0F); + break; + } + } +} + +void viafb_memory_pitch_patch(struct fb_info *info) +{ + if (info->var.xres != info->var.xres_virtual) { + viafb_load_offset_reg(info->var.xres_virtual, + info->var.bits_per_pixel >> 3, IGA1); + + if (viafb_SAMM_ON) { + viafb_load_offset_reg(viafb_second_virtual_xres, + viafb_bpp1 >> 3, + IGA2); + } else { + viafb_load_offset_reg(info->var.xres_virtual, + info->var.bits_per_pixel >> 3, IGA2); + } + + } +} + +/*According var's xres, yres fill var's other timing information*/ +void viafb_fill_var_timing_info(struct fb_var_screeninfo *var, int refresh, + int mode_index) +{ + struct VideoModeTable *vmode_tbl = NULL; + struct crt_mode_table *crt_timing = NULL; + struct display_timing crt_reg; + int i = 0, index = 0; + vmode_tbl = &CLE266Modes[search_mode_setting(mode_index)]; + crt_timing = vmode_tbl->crtc; + for (i = 0; i < vmode_tbl->mode_array; i++) { + index = i; + if (crt_timing[i].refresh_rate == refresh) + break; + } + + crt_reg = crt_timing[index].crtc; + switch (var->bits_per_pixel) { + case 8: + var->red.offset = 0; + var->green.offset = 0; + var->blue.offset = 0; + var->red.length = 6; + var->green.length = 6; + var->blue.length = 6; + break; + case 16: + var->red.offset = 11; + var->green.offset = 5; + var->blue.offset = 0; + var->red.length = 5; + var->green.length = 6; + var->blue.length = 5; + break; + case 32: + var->red.offset = 16; + var->green.offset = 8; + var->blue.offset = 0; + var->red.length = 8; + var->green.length = 8; + var->blue.length = 8; + break; + default: + /* never happed, put here to keep consistent */ + break; + } + + var->pixclock = viafb_get_pixclock(var->xres, var->yres, refresh); + var->left_margin = + crt_reg.hor_total - (crt_reg.hor_sync_start + crt_reg.hor_sync_end); + var->right_margin = crt_reg.hor_sync_start - crt_reg.hor_addr; + var->hsync_len = crt_reg.hor_sync_end; + var->upper_margin = + crt_reg.ver_total - (crt_reg.ver_sync_start + crt_reg.ver_sync_end); + var->lower_margin = crt_reg.ver_sync_start - crt_reg.ver_addr; + var->vsync_len = crt_reg.ver_sync_end; +} diff --git a/drivers/video/via/hw.h b/drivers/video/via/hw.h new file mode 100644 index 000000000000..6ff38fa8569a --- /dev/null +++ b/drivers/video/via/hw.h @@ -0,0 +1,933 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef __HW_H__ +#define __HW_H__ + +#include "global.h" + +/*************************************************** +* Definition IGA1 Design Method of CRTC Registers * +****************************************************/ +#define IGA1_HOR_TOTAL_FORMULA(x) (((x)/8)-5) +#define IGA1_HOR_ADDR_FORMULA(x) (((x)/8)-1) +#define IGA1_HOR_BLANK_START_FORMULA(x) (((x)/8)-1) +#define IGA1_HOR_BLANK_END_FORMULA(x, y) (((x+y)/8)-1) +#define IGA1_HOR_SYNC_START_FORMULA(x) ((x)/8) +#define IGA1_HOR_SYNC_END_FORMULA(x, y) ((x+y)/8) + +#define IGA1_VER_TOTAL_FORMULA(x) ((x)-2) +#define IGA1_VER_ADDR_FORMULA(x) ((x)-1) +#define IGA1_VER_BLANK_START_FORMULA(x) ((x)-1) +#define IGA1_VER_BLANK_END_FORMULA(x, y) ((x+y)-1) +#define IGA1_VER_SYNC_START_FORMULA(x) ((x)-1) +#define IGA1_VER_SYNC_END_FORMULA(x, y) ((x+y)-1) + +/*************************************************** +** Definition IGA2 Design Method of CRTC Registers * +****************************************************/ +#define IGA2_HOR_TOTAL_FORMULA(x) ((x)-1) +#define IGA2_HOR_ADDR_FORMULA(x) ((x)-1) +#define IGA2_HOR_BLANK_START_FORMULA(x) ((x)-1) +#define IGA2_HOR_BLANK_END_FORMULA(x, y) ((x+y)-1) +#define IGA2_HOR_SYNC_START_FORMULA(x) ((x)-1) +#define IGA2_HOR_SYNC_END_FORMULA(x, y) ((x+y)-1) + +#define IGA2_VER_TOTAL_FORMULA(x) ((x)-1) +#define IGA2_VER_ADDR_FORMULA(x) ((x)-1) +#define IGA2_VER_BLANK_START_FORMULA(x) ((x)-1) +#define IGA2_VER_BLANK_END_FORMULA(x, y) ((x+y)-1) +#define IGA2_VER_SYNC_START_FORMULA(x) ((x)-1) +#define IGA2_VER_SYNC_END_FORMULA(x, y) ((x+y)-1) + +/**********************************************************/ +/* Definition IGA2 Design Method of CRTC Shadow Registers */ +/**********************************************************/ +#define IGA2_HOR_TOTAL_SHADOW_FORMULA(x) ((x/8)-5) +#define IGA2_HOR_BLANK_END_SHADOW_FORMULA(x, y) (((x+y)/8)-1) +#define IGA2_VER_TOTAL_SHADOW_FORMULA(x) ((x)-2) +#define IGA2_VER_ADDR_SHADOW_FORMULA(x) ((x)-1) +#define IGA2_VER_BLANK_START_SHADOW_FORMULA(x) ((x)-1) +#define IGA2_VER_BLANK_END_SHADOW_FORMULA(x, y) ((x+y)-1) +#define IGA2_VER_SYNC_START_SHADOW_FORMULA(x) (x) +#define IGA2_VER_SYNC_END_SHADOW_FORMULA(x, y) (x+y) + +/* Define Register Number for IGA1 CRTC Timing */ + +/* location: {CR00,0,7},{CR36,3,3} */ +#define IGA1_HOR_TOTAL_REG_NUM 2 +/* location: {CR01,0,7} */ +#define IGA1_HOR_ADDR_REG_NUM 1 +/* location: {CR02,0,7} */ +#define IGA1_HOR_BLANK_START_REG_NUM 1 +/* location: {CR03,0,4},{CR05,7,7},{CR33,5,5} */ +#define IGA1_HOR_BLANK_END_REG_NUM 3 +/* location: {CR04,0,7},{CR33,4,4} */ +#define IGA1_HOR_SYNC_START_REG_NUM 2 +/* location: {CR05,0,4} */ +#define IGA1_HOR_SYNC_END_REG_NUM 1 +/* location: {CR06,0,7},{CR07,0,0},{CR07,5,5},{CR35,0,0} */ +#define IGA1_VER_TOTAL_REG_NUM 4 +/* location: {CR12,0,7},{CR07,1,1},{CR07,6,6},{CR35,2,2} */ +#define IGA1_VER_ADDR_REG_NUM 4 +/* location: {CR15,0,7},{CR07,3,3},{CR09,5,5},{CR35,3,3} */ +#define IGA1_VER_BLANK_START_REG_NUM 4 +/* location: {CR16,0,7} */ +#define IGA1_VER_BLANK_END_REG_NUM 1 +/* location: {CR10,0,7},{CR07,2,2},{CR07,7,7},{CR35,1,1} */ +#define IGA1_VER_SYNC_START_REG_NUM 4 +/* location: {CR11,0,3} */ +#define IGA1_VER_SYNC_END_REG_NUM 1 + +/* Define Register Number for IGA2 Shadow CRTC Timing */ + +/* location: {CR6D,0,7},{CR71,3,3} */ +#define IGA2_SHADOW_HOR_TOTAL_REG_NUM 2 +/* location: {CR6E,0,7} */ +#define IGA2_SHADOW_HOR_BLANK_END_REG_NUM 1 +/* location: {CR6F,0,7},{CR71,0,2} */ +#define IGA2_SHADOW_VER_TOTAL_REG_NUM 2 +/* location: {CR70,0,7},{CR71,4,6} */ +#define IGA2_SHADOW_VER_ADDR_REG_NUM 2 +/* location: {CR72,0,7},{CR74,4,6} */ +#define IGA2_SHADOW_VER_BLANK_START_REG_NUM 2 +/* location: {CR73,0,7},{CR74,0,2} */ +#define IGA2_SHADOW_VER_BLANK_END_REG_NUM 2 +/* location: {CR75,0,7},{CR76,4,6} */ +#define IGA2_SHADOW_VER_SYNC_START_REG_NUM 2 +/* location: {CR76,0,3} */ +#define IGA2_SHADOW_VER_SYNC_END_REG_NUM 1 + +/* Define Register Number for IGA2 CRTC Timing */ + +/* location: {CR50,0,7},{CR55,0,3} */ +#define IGA2_HOR_TOTAL_REG_NUM 2 +/* location: {CR51,0,7},{CR55,4,6} */ +#define IGA2_HOR_ADDR_REG_NUM 2 +/* location: {CR52,0,7},{CR54,0,2} */ +#define IGA2_HOR_BLANK_START_REG_NUM 2 +/* location: CLE266: {CR53,0,7},{CR54,3,5} => CLE266's CR5D[6] +is reserved, so it may have problem to set 1600x1200 on IGA2. */ +/* Others: {CR53,0,7},{CR54,3,5},{CR5D,6,6} */ +#define IGA2_HOR_BLANK_END_REG_NUM 3 +/* location: {CR56,0,7},{CR54,6,7},{CR5C,7,7} */ +/* VT3314 and Later: {CR56,0,7},{CR54,6,7},{CR5C,7,7}, {CR5D,7,7} */ +#define IGA2_HOR_SYNC_START_REG_NUM 4 + +/* location: {CR57,0,7},{CR5C,6,6} */ +#define IGA2_HOR_SYNC_END_REG_NUM 2 +/* location: {CR58,0,7},{CR5D,0,2} */ +#define IGA2_VER_TOTAL_REG_NUM 2 +/* location: {CR59,0,7},{CR5D,3,5} */ +#define IGA2_VER_ADDR_REG_NUM 2 +/* location: {CR5A,0,7},{CR5C,0,2} */ +#define IGA2_VER_BLANK_START_REG_NUM 2 +/* location: {CR5E,0,7},{CR5C,3,5} */ +#define IGA2_VER_BLANK_END_REG_NUM 2 +/* location: {CR5E,0,7},{CR5F,5,7} */ +#define IGA2_VER_SYNC_START_REG_NUM 2 +/* location: {CR5F,0,4} */ +#define IGA2_VER_SYNC_END_REG_NUM 1 + +/* Define Offset and Fetch Count Register*/ + +/* location: {CR13,0,7},{CR35,5,7} */ +#define IGA1_OFFSET_REG_NUM 2 +/* 8 bytes alignment. */ +#define IGA1_OFFSER_ALIGN_BYTE 8 +/* x: H resolution, y: color depth */ +#define IGA1_OFFSET_FORMULA(x, y) ((x*y)/IGA1_OFFSER_ALIGN_BYTE) +/* location: {SR1C,0,7},{SR1D,0,1} */ +#define IGA1_FETCH_COUNT_REG_NUM 2 +/* 16 bytes alignment. */ +#define IGA1_FETCH_COUNT_ALIGN_BYTE 16 +/* x: H resolution, y: color depth */ +#define IGA1_FETCH_COUNT_PATCH_VALUE 4 +#define IGA1_FETCH_COUNT_FORMULA(x, y) \ + (((x*y)/IGA1_FETCH_COUNT_ALIGN_BYTE) + IGA1_FETCH_COUNT_PATCH_VALUE) + +/* location: {CR66,0,7},{CR67,0,1} */ +#define IGA2_OFFSET_REG_NUM 2 +#define IGA2_OFFSET_ALIGN_BYTE 8 +/* x: H resolution, y: color depth */ +#define IGA2_OFFSET_FORMULA(x, y) ((x*y)/IGA2_OFFSET_ALIGN_BYTE) +/* location: {CR65,0,7},{CR67,2,3} */ +#define IGA2_FETCH_COUNT_REG_NUM 2 +#define IGA2_FETCH_COUNT_ALIGN_BYTE 16 +#define IGA2_FETCH_COUNT_PATCH_VALUE 0 +#define IGA2_FETCH_COUNT_FORMULA(x, y) \ + (((x*y)/IGA2_FETCH_COUNT_ALIGN_BYTE) + IGA2_FETCH_COUNT_PATCH_VALUE) + +/* Staring Address*/ + +/* location: {CR0C,0,7},{CR0D,0,7},{CR34,0,7},{CR48,0,1} */ +#define IGA1_STARTING_ADDR_REG_NUM 4 +/* location: {CR62,1,7},{CR63,0,7},{CR64,0,7} */ +#define IGA2_STARTING_ADDR_REG_NUM 3 + +/* Define Display OFFSET*/ +/* These value are by HW suggested value*/ +/* location: {SR17,0,7} */ +#define K800_IGA1_FIFO_MAX_DEPTH 384 +/* location: {SR16,0,5},{SR16,7,7} */ +#define K800_IGA1_FIFO_THRESHOLD 328 +/* location: {SR18,0,5},{SR18,7,7} */ +#define K800_IGA1_FIFO_HIGH_THRESHOLD 296 +/* location: {SR22,0,4}. (128/4) =64, K800 must be set zero, */ + /* because HW only 5 bits */ +#define K800_IGA1_DISPLAY_QUEUE_EXPIRE_NUM 0 + +/* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */ +#define K800_IGA2_FIFO_MAX_DEPTH 384 +/* location: {CR68,0,3},{CR95,4,6} */ +#define K800_IGA2_FIFO_THRESHOLD 328 +/* location: {CR92,0,3},{CR95,0,2} */ +#define K800_IGA2_FIFO_HIGH_THRESHOLD 296 +/* location: {CR94,0,6} */ +#define K800_IGA2_DISPLAY_QUEUE_EXPIRE_NUM 128 + +/* location: {SR17,0,7} */ +#define P880_IGA1_FIFO_MAX_DEPTH 192 +/* location: {SR16,0,5},{SR16,7,7} */ +#define P880_IGA1_FIFO_THRESHOLD 128 +/* location: {SR18,0,5},{SR18,7,7} */ +#define P880_IGA1_FIFO_HIGH_THRESHOLD 64 +/* location: {SR22,0,4}. (128/4) =64, K800 must be set zero, */ + /* because HW only 5 bits */ +#define P880_IGA1_DISPLAY_QUEUE_EXPIRE_NUM 0 + +/* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */ +#define P880_IGA2_FIFO_MAX_DEPTH 96 +/* location: {CR68,0,3},{CR95,4,6} */ +#define P880_IGA2_FIFO_THRESHOLD 64 +/* location: {CR92,0,3},{CR95,0,2} */ +#define P880_IGA2_FIFO_HIGH_THRESHOLD 32 +/* location: {CR94,0,6} */ +#define P880_IGA2_DISPLAY_QUEUE_EXPIRE_NUM 128 + +/* VT3314 chipset*/ + +/* location: {SR17,0,7} */ +#define CN700_IGA1_FIFO_MAX_DEPTH 96 +/* location: {SR16,0,5},{SR16,7,7} */ +#define CN700_IGA1_FIFO_THRESHOLD 80 +/* location: {SR18,0,5},{SR18,7,7} */ +#define CN700_IGA1_FIFO_HIGH_THRESHOLD 64 +/* location: {SR22,0,4}. (128/4) =64, P800 must be set zero, + because HW only 5 bits */ +#define CN700_IGA1_DISPLAY_QUEUE_EXPIRE_NUM 0 +/* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */ +#define CN700_IGA2_FIFO_MAX_DEPTH 96 +/* location: {CR68,0,3},{CR95,4,6} */ +#define CN700_IGA2_FIFO_THRESHOLD 80 +/* location: {CR92,0,3},{CR95,0,2} */ +#define CN700_IGA2_FIFO_HIGH_THRESHOLD 32 +/* location: {CR94,0,6} */ +#define CN700_IGA2_DISPLAY_QUEUE_EXPIRE_NUM 128 + +/* For VT3324, these values are suggested by HW */ +/* location: {SR17,0,7} */ +#define CX700_IGA1_FIFO_MAX_DEPTH 192 +/* location: {SR16,0,5},{SR16,7,7} */ +#define CX700_IGA1_FIFO_THRESHOLD 128 +/* location: {SR18,0,5},{SR18,7,7} */ +#define CX700_IGA1_FIFO_HIGH_THRESHOLD 128 +/* location: {SR22,0,4} */ +#define CX700_IGA1_DISPLAY_QUEUE_EXPIRE_NUM 124 + +/* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */ +#define CX700_IGA2_FIFO_MAX_DEPTH 96 +/* location: {CR68,0,3},{CR95,4,6} */ +#define CX700_IGA2_FIFO_THRESHOLD 64 +/* location: {CR92,0,3},{CR95,0,2} */ +#define CX700_IGA2_FIFO_HIGH_THRESHOLD 32 +/* location: {CR94,0,6} */ +#define CX700_IGA2_DISPLAY_QUEUE_EXPIRE_NUM 128 + +/* VT3336 chipset*/ +/* location: {SR17,0,7} */ +#define K8M890_IGA1_FIFO_MAX_DEPTH 360 +/* location: {SR16,0,5},{SR16,7,7} */ +#define K8M890_IGA1_FIFO_THRESHOLD 328 +/* location: {SR18,0,5},{SR18,7,7} */ +#define K8M890_IGA1_FIFO_HIGH_THRESHOLD 296 +/* location: {SR22,0,4}. */ +#define K8M890_IGA1_DISPLAY_QUEUE_EXPIRE_NUM 124 + +/* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */ +#define K8M890_IGA2_FIFO_MAX_DEPTH 360 +/* location: {CR68,0,3},{CR95,4,6} */ +#define K8M890_IGA2_FIFO_THRESHOLD 328 +/* location: {CR92,0,3},{CR95,0,2} */ +#define K8M890_IGA2_FIFO_HIGH_THRESHOLD 296 +/* location: {CR94,0,6} */ +#define K8M890_IGA2_DISPLAY_QUEUE_EXPIRE_NUM 124 + +/* VT3327 chipset*/ +/* location: {SR17,0,7} */ +#define P4M890_IGA1_FIFO_MAX_DEPTH 96 +/* location: {SR16,0,5},{SR16,7,7} */ +#define P4M890_IGA1_FIFO_THRESHOLD 76 +/* location: {SR18,0,5},{SR18,7,7} */ +#define P4M890_IGA1_FIFO_HIGH_THRESHOLD 64 +/* location: {SR22,0,4}. (32/4) =8 */ +#define P4M890_IGA1_DISPLAY_QUEUE_EXPIRE_NUM 32 +/* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */ +#define P4M890_IGA2_FIFO_MAX_DEPTH 96 +/* location: {CR68,0,3},{CR95,4,6} */ +#define P4M890_IGA2_FIFO_THRESHOLD 76 +/* location: {CR92,0,3},{CR95,0,2} */ +#define P4M890_IGA2_FIFO_HIGH_THRESHOLD 64 +/* location: {CR94,0,6} */ +#define P4M890_IGA2_DISPLAY_QUEUE_EXPIRE_NUM 32 + +/* VT3364 chipset*/ +/* location: {SR17,0,7} */ +#define P4M900_IGA1_FIFO_MAX_DEPTH 96 +/* location: {SR16,0,5},{SR16,7,7} */ +#define P4M900_IGA1_FIFO_THRESHOLD 76 +/* location: {SR18,0,5},{SR18,7,7} */ +#define P4M900_IGA1_FIFO_HIGH_THRESHOLD 76 +/* location: {SR22,0,4}. */ +#define P4M900_IGA1_DISPLAY_QUEUE_EXPIRE_NUM 32 +/* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */ +#define P4M900_IGA2_FIFO_MAX_DEPTH 96 +/* location: {CR68,0,3},{CR95,4,6} */ +#define P4M900_IGA2_FIFO_THRESHOLD 76 +/* location: {CR92,0,3},{CR95,0,2} */ +#define P4M900_IGA2_FIFO_HIGH_THRESHOLD 76 +/* location: {CR94,0,6} */ +#define P4M900_IGA2_DISPLAY_QUEUE_EXPIRE_NUM 32 + +/* For VT3353, these values are suggested by HW */ +/* location: {SR17,0,7} */ +#define VX800_IGA1_FIFO_MAX_DEPTH 192 +/* location: {SR16,0,5},{SR16,7,7} */ +#define VX800_IGA1_FIFO_THRESHOLD 152 +/* location: {SR18,0,5},{SR18,7,7} */ +#define VX800_IGA1_FIFO_HIGH_THRESHOLD 152 +/* location: {SR22,0,4} */ +#define VX800_IGA1_DISPLAY_QUEUE_EXPIRE_NUM 64 +/* location: {CR68,4,7},{CR94,7,7},{CR95,7,7} */ +#define VX800_IGA2_FIFO_MAX_DEPTH 96 +/* location: {CR68,0,3},{CR95,4,6} */ +#define VX800_IGA2_FIFO_THRESHOLD 64 +/* location: {CR92,0,3},{CR95,0,2} */ +#define VX800_IGA2_FIFO_HIGH_THRESHOLD 32 +/* location: {CR94,0,6} */ +#define VX800_IGA2_DISPLAY_QUEUE_EXPIRE_NUM 128 + +#define IGA1_FIFO_DEPTH_SELECT_REG_NUM 1 +#define IGA1_FIFO_THRESHOLD_REG_NUM 2 +#define IGA1_FIFO_HIGH_THRESHOLD_REG_NUM 2 +#define IGA1_DISPLAY_QUEUE_EXPIRE_NUM_REG_NUM 1 + +#define IGA2_FIFO_DEPTH_SELECT_REG_NUM 3 +#define IGA2_FIFO_THRESHOLD_REG_NUM 2 +#define IGA2_FIFO_HIGH_THRESHOLD_REG_NUM 2 +#define IGA2_DISPLAY_QUEUE_EXPIRE_NUM_REG_NUM 1 + +#define IGA1_FIFO_DEPTH_SELECT_FORMULA(x) ((x/2)-1) +#define IGA1_FIFO_THRESHOLD_FORMULA(x) (x/4) +#define IGA1_DISPLAY_QUEUE_EXPIRE_NUM_FORMULA(x) (x/4) +#define IGA1_FIFO_HIGH_THRESHOLD_FORMULA(x) (x/4) +#define IGA2_FIFO_DEPTH_SELECT_FORMULA(x) (((x/2)/4)-1) +#define IGA2_FIFO_THRESHOLD_FORMULA(x) (x/4) +#define IGA2_DISPLAY_QUEUE_EXPIRE_NUM_FORMULA(x) (x/4) +#define IGA2_FIFO_HIGH_THRESHOLD_FORMULA(x) (x/4) + +/************************************************************************/ +/* LCD Timing */ +/************************************************************************/ + +/* 500 ms = 500000 us */ +#define LCD_POWER_SEQ_TD0 500000 +/* 50 ms = 50000 us */ +#define LCD_POWER_SEQ_TD1 50000 +/* 0 us */ +#define LCD_POWER_SEQ_TD2 0 +/* 210 ms = 210000 us */ +#define LCD_POWER_SEQ_TD3 210000 +/* 2^10 * (1/14.31818M) = 71.475 us (K400.revA) */ +#define CLE266_POWER_SEQ_UNIT 71 +/* 2^11 * (1/14.31818M) = 142.95 us (K400.revB) */ +#define K800_POWER_SEQ_UNIT 142 +/* 2^13 * (1/14.31818M) = 572.1 us */ +#define P880_POWER_SEQ_UNIT 572 + +#define CLE266_POWER_SEQ_FORMULA(x) ((x)/CLE266_POWER_SEQ_UNIT) +#define K800_POWER_SEQ_FORMULA(x) ((x)/K800_POWER_SEQ_UNIT) +#define P880_POWER_SEQ_FORMULA(x) ((x)/P880_POWER_SEQ_UNIT) + +/* location: {CR8B,0,7},{CR8F,0,3} */ +#define LCD_POWER_SEQ_TD0_REG_NUM 2 +/* location: {CR8C,0,7},{CR8F,4,7} */ +#define LCD_POWER_SEQ_TD1_REG_NUM 2 +/* location: {CR8D,0,7},{CR90,0,3} */ +#define LCD_POWER_SEQ_TD2_REG_NUM 2 +/* location: {CR8E,0,7},{CR90,4,7} */ +#define LCD_POWER_SEQ_TD3_REG_NUM 2 + +/* LCD Scaling factor*/ +/* x: indicate setting horizontal size*/ +/* y: indicate panel horizontal size*/ + +/* Horizontal scaling factor 10 bits (2^10) */ +#define CLE266_LCD_HOR_SCF_FORMULA(x, y) (((x-1)*1024)/(y-1)) +/* Vertical scaling factor 10 bits (2^10) */ +#define CLE266_LCD_VER_SCF_FORMULA(x, y) (((x-1)*1024)/(y-1)) +/* Horizontal scaling factor 10 bits (2^12) */ +#define K800_LCD_HOR_SCF_FORMULA(x, y) (((x-1)*4096)/(y-1)) +/* Vertical scaling factor 10 bits (2^11) */ +#define K800_LCD_VER_SCF_FORMULA(x, y) (((x-1)*2048)/(y-1)) + +/* location: {CR9F,0,1},{CR77,0,7},{CR79,4,5} */ +#define LCD_HOR_SCALING_FACTOR_REG_NUM 3 +/* location: {CR79,3,3},{CR78,0,7},{CR79,6,7} */ +#define LCD_VER_SCALING_FACTOR_REG_NUM 3 +/* location: {CR77,0,7},{CR79,4,5} */ +#define LCD_HOR_SCALING_FACTOR_REG_NUM_CLE 2 +/* location: {CR78,0,7},{CR79,6,7} */ +#define LCD_VER_SCALING_FACTOR_REG_NUM_CLE 2 + +/************************************************ + ***** Define IGA1 Display Timing ***** + ************************************************/ +struct io_register { + u8 io_addr; + u8 start_bit; + u8 end_bit; +}; + +/* IGA1 Horizontal Total */ +struct iga1_hor_total { + int reg_num; + struct io_register reg[IGA1_HOR_TOTAL_REG_NUM]; +}; + +/* IGA1 Horizontal Addressable Video */ +struct iga1_hor_addr { + int reg_num; + struct io_register reg[IGA1_HOR_ADDR_REG_NUM]; +}; + +/* IGA1 Horizontal Blank Start */ +struct iga1_hor_blank_start { + int reg_num; + struct io_register reg[IGA1_HOR_BLANK_START_REG_NUM]; +}; + +/* IGA1 Horizontal Blank End */ +struct iga1_hor_blank_end { + int reg_num; + struct io_register reg[IGA1_HOR_BLANK_END_REG_NUM]; +}; + +/* IGA1 Horizontal Sync Start */ +struct iga1_hor_sync_start { + int reg_num; + struct io_register reg[IGA1_HOR_SYNC_START_REG_NUM]; +}; + +/* IGA1 Horizontal Sync End */ +struct iga1_hor_sync_end { + int reg_num; + struct io_register reg[IGA1_HOR_SYNC_END_REG_NUM]; +}; + +/* IGA1 Vertical Total */ +struct iga1_ver_total { + int reg_num; + struct io_register reg[IGA1_VER_TOTAL_REG_NUM]; +}; + +/* IGA1 Vertical Addressable Video */ +struct iga1_ver_addr { + int reg_num; + struct io_register reg[IGA1_VER_ADDR_REG_NUM]; +}; + +/* IGA1 Vertical Blank Start */ +struct iga1_ver_blank_start { + int reg_num; + struct io_register reg[IGA1_VER_BLANK_START_REG_NUM]; +}; + +/* IGA1 Vertical Blank End */ +struct iga1_ver_blank_end { + int reg_num; + struct io_register reg[IGA1_VER_BLANK_END_REG_NUM]; +}; + +/* IGA1 Vertical Sync Start */ +struct iga1_ver_sync_start { + int reg_num; + struct io_register reg[IGA1_VER_SYNC_START_REG_NUM]; +}; + +/* IGA1 Vertical Sync End */ +struct iga1_ver_sync_end { + int reg_num; + struct io_register reg[IGA1_VER_SYNC_END_REG_NUM]; +}; + +/***************************************************** +** Define IGA2 Shadow Display Timing **** +*****************************************************/ + +/* IGA2 Shadow Horizontal Total */ +struct iga2_shadow_hor_total { + int reg_num; + struct io_register reg[IGA2_SHADOW_HOR_TOTAL_REG_NUM]; +}; + +/* IGA2 Shadow Horizontal Blank End */ +struct iga2_shadow_hor_blank_end { + int reg_num; + struct io_register reg[IGA2_SHADOW_HOR_BLANK_END_REG_NUM]; +}; + +/* IGA2 Shadow Vertical Total */ +struct iga2_shadow_ver_total { + int reg_num; + struct io_register reg[IGA2_SHADOW_VER_TOTAL_REG_NUM]; +}; + +/* IGA2 Shadow Vertical Addressable Video */ +struct iga2_shadow_ver_addr { + int reg_num; + struct io_register reg[IGA2_SHADOW_VER_ADDR_REG_NUM]; +}; + +/* IGA2 Shadow Vertical Blank Start */ +struct iga2_shadow_ver_blank_start { + int reg_num; + struct io_register reg[IGA2_SHADOW_VER_BLANK_START_REG_NUM]; +}; + +/* IGA2 Shadow Vertical Blank End */ +struct iga2_shadow_ver_blank_end { + int reg_num; + struct io_register reg[IGA2_SHADOW_VER_BLANK_END_REG_NUM]; +}; + +/* IGA2 Shadow Vertical Sync Start */ +struct iga2_shadow_ver_sync_start { + int reg_num; + struct io_register reg[IGA2_SHADOW_VER_SYNC_START_REG_NUM]; +}; + +/* IGA2 Shadow Vertical Sync End */ +struct iga2_shadow_ver_sync_end { + int reg_num; + struct io_register reg[IGA2_SHADOW_VER_SYNC_END_REG_NUM]; +}; + +/***************************************************** +** Define IGA2 Display Timing **** +******************************************************/ + +/* IGA2 Horizontal Total */ +struct iga2_hor_total { + int reg_num; + struct io_register reg[IGA2_HOR_TOTAL_REG_NUM]; +}; + +/* IGA2 Horizontal Addressable Video */ +struct iga2_hor_addr { + int reg_num; + struct io_register reg[IGA2_HOR_ADDR_REG_NUM]; +}; + +/* IGA2 Horizontal Blank Start */ +struct iga2_hor_blank_start { + int reg_num; + struct io_register reg[IGA2_HOR_BLANK_START_REG_NUM]; +}; + +/* IGA2 Horizontal Blank End */ +struct iga2_hor_blank_end { + int reg_num; + struct io_register reg[IGA2_HOR_BLANK_END_REG_NUM]; +}; + +/* IGA2 Horizontal Sync Start */ +struct iga2_hor_sync_start { + int reg_num; + struct io_register reg[IGA2_HOR_SYNC_START_REG_NUM]; +}; + +/* IGA2 Horizontal Sync End */ +struct iga2_hor_sync_end { + int reg_num; + struct io_register reg[IGA2_HOR_SYNC_END_REG_NUM]; +}; + +/* IGA2 Vertical Total */ +struct iga2_ver_total { + int reg_num; + struct io_register reg[IGA2_VER_TOTAL_REG_NUM]; +}; + +/* IGA2 Vertical Addressable Video */ +struct iga2_ver_addr { + int reg_num; + struct io_register reg[IGA2_VER_ADDR_REG_NUM]; +}; + +/* IGA2 Vertical Blank Start */ +struct iga2_ver_blank_start { + int reg_num; + struct io_register reg[IGA2_VER_BLANK_START_REG_NUM]; +}; + +/* IGA2 Vertical Blank End */ +struct iga2_ver_blank_end { + int reg_num; + struct io_register reg[IGA2_VER_BLANK_END_REG_NUM]; +}; + +/* IGA2 Vertical Sync Start */ +struct iga2_ver_sync_start { + int reg_num; + struct io_register reg[IGA2_VER_SYNC_START_REG_NUM]; +}; + +/* IGA2 Vertical Sync End */ +struct iga2_ver_sync_end { + int reg_num; + struct io_register reg[IGA2_VER_SYNC_END_REG_NUM]; +}; + +/* IGA1 Offset Register */ +struct iga1_offset { + int reg_num; + struct io_register reg[IGA1_OFFSET_REG_NUM]; +}; + +/* IGA2 Offset Register */ +struct iga2_offset { + int reg_num; + struct io_register reg[IGA2_OFFSET_REG_NUM]; +}; + +struct offset { + struct iga1_offset iga1_offset_reg; + struct iga2_offset iga2_offset_reg; +}; + +/* IGA1 Fetch Count Register */ +struct iga1_fetch_count { + int reg_num; + struct io_register reg[IGA1_FETCH_COUNT_REG_NUM]; +}; + +/* IGA2 Fetch Count Register */ +struct iga2_fetch_count { + int reg_num; + struct io_register reg[IGA2_FETCH_COUNT_REG_NUM]; +}; + +struct fetch_count { + struct iga1_fetch_count iga1_fetch_count_reg; + struct iga2_fetch_count iga2_fetch_count_reg; +}; + +/* Starting Address Register */ +struct iga1_starting_addr { + int reg_num; + struct io_register reg[IGA1_STARTING_ADDR_REG_NUM]; +}; + +struct iga2_starting_addr { + int reg_num; + struct io_register reg[IGA2_STARTING_ADDR_REG_NUM]; +}; + +struct starting_addr { + struct iga1_starting_addr iga1_starting_addr_reg; + struct iga2_starting_addr iga2_starting_addr_reg; +}; + +/* LCD Power Sequence Timer */ +struct lcd_pwd_seq_td0 { + int reg_num; + struct io_register reg[LCD_POWER_SEQ_TD0_REG_NUM]; +}; + +struct lcd_pwd_seq_td1 { + int reg_num; + struct io_register reg[LCD_POWER_SEQ_TD1_REG_NUM]; +}; + +struct lcd_pwd_seq_td2 { + int reg_num; + struct io_register reg[LCD_POWER_SEQ_TD2_REG_NUM]; +}; + +struct lcd_pwd_seq_td3 { + int reg_num; + struct io_register reg[LCD_POWER_SEQ_TD3_REG_NUM]; +}; + +struct _lcd_pwd_seq_timer { + struct lcd_pwd_seq_td0 td0; + struct lcd_pwd_seq_td1 td1; + struct lcd_pwd_seq_td2 td2; + struct lcd_pwd_seq_td3 td3; +}; + +/* LCD Scaling Factor */ +struct _lcd_hor_scaling_factor { + int reg_num; + struct io_register reg[LCD_HOR_SCALING_FACTOR_REG_NUM]; +}; + +struct _lcd_ver_scaling_factor { + int reg_num; + struct io_register reg[LCD_VER_SCALING_FACTOR_REG_NUM]; +}; + +struct _lcd_scaling_factor { + struct _lcd_hor_scaling_factor lcd_hor_scaling_factor; + struct _lcd_ver_scaling_factor lcd_ver_scaling_factor; +}; + +struct pll_map { + u32 clk; + u32 cle266_pll; + u32 k800_pll; + u32 cx700_pll; +}; + +struct rgbLUT { + u8 red; + u8 green; + u8 blue; +}; + +struct lcd_pwd_seq_timer { + u16 td0; + u16 td1; + u16 td2; + u16 td3; +}; + +/* Display FIFO Relation Registers*/ +struct iga1_fifo_depth_select { + int reg_num; + struct io_register reg[IGA1_FIFO_DEPTH_SELECT_REG_NUM]; +}; + +struct iga1_fifo_threshold_select { + int reg_num; + struct io_register reg[IGA1_FIFO_THRESHOLD_REG_NUM]; +}; + +struct iga1_fifo_high_threshold_select { + int reg_num; + struct io_register reg[IGA1_FIFO_HIGH_THRESHOLD_REG_NUM]; +}; + +struct iga1_display_queue_expire_num { + int reg_num; + struct io_register reg[IGA1_DISPLAY_QUEUE_EXPIRE_NUM_REG_NUM]; +}; + +struct iga2_fifo_depth_select { + int reg_num; + struct io_register reg[IGA2_FIFO_DEPTH_SELECT_REG_NUM]; +}; + +struct iga2_fifo_threshold_select { + int reg_num; + struct io_register reg[IGA2_FIFO_THRESHOLD_REG_NUM]; +}; + +struct iga2_fifo_high_threshold_select { + int reg_num; + struct io_register reg[IGA2_FIFO_HIGH_THRESHOLD_REG_NUM]; +}; + +struct iga2_display_queue_expire_num { + int reg_num; + struct io_register reg[IGA2_DISPLAY_QUEUE_EXPIRE_NUM_REG_NUM]; +}; + +struct fifo_depth_select { + struct iga1_fifo_depth_select iga1_fifo_depth_select_reg; + struct iga2_fifo_depth_select iga2_fifo_depth_select_reg; +}; + +struct fifo_threshold_select { + struct iga1_fifo_threshold_select iga1_fifo_threshold_select_reg; + struct iga2_fifo_threshold_select iga2_fifo_threshold_select_reg; +}; + +struct fifo_high_threshold_select { + struct iga1_fifo_high_threshold_select + iga1_fifo_high_threshold_select_reg; + struct iga2_fifo_high_threshold_select + iga2_fifo_high_threshold_select_reg; +}; + +struct display_queue_expire_num { + struct iga1_display_queue_expire_num + iga1_display_queue_expire_num_reg; + struct iga2_display_queue_expire_num + iga2_display_queue_expire_num_reg; +}; + +struct iga1_crtc_timing { + struct iga1_hor_total hor_total; + struct iga1_hor_addr hor_addr; + struct iga1_hor_blank_start hor_blank_start; + struct iga1_hor_blank_end hor_blank_end; + struct iga1_hor_sync_start hor_sync_start; + struct iga1_hor_sync_end hor_sync_end; + struct iga1_ver_total ver_total; + struct iga1_ver_addr ver_addr; + struct iga1_ver_blank_start ver_blank_start; + struct iga1_ver_blank_end ver_blank_end; + struct iga1_ver_sync_start ver_sync_start; + struct iga1_ver_sync_end ver_sync_end; +}; + +struct iga2_shadow_crtc_timing { + struct iga2_shadow_hor_total hor_total_shadow; + struct iga2_shadow_hor_blank_end hor_blank_end_shadow; + struct iga2_shadow_ver_total ver_total_shadow; + struct iga2_shadow_ver_addr ver_addr_shadow; + struct iga2_shadow_ver_blank_start ver_blank_start_shadow; + struct iga2_shadow_ver_blank_end ver_blank_end_shadow; + struct iga2_shadow_ver_sync_start ver_sync_start_shadow; + struct iga2_shadow_ver_sync_end ver_sync_end_shadow; +}; + +struct iga2_crtc_timing { + struct iga2_hor_total hor_total; + struct iga2_hor_addr hor_addr; + struct iga2_hor_blank_start hor_blank_start; + struct iga2_hor_blank_end hor_blank_end; + struct iga2_hor_sync_start hor_sync_start; + struct iga2_hor_sync_end hor_sync_end; + struct iga2_ver_total ver_total; + struct iga2_ver_addr ver_addr; + struct iga2_ver_blank_start ver_blank_start; + struct iga2_ver_blank_end ver_blank_end; + struct iga2_ver_sync_start ver_sync_start; + struct iga2_ver_sync_end ver_sync_end; +}; + +/* device ID */ +#define CLE266 0x3123 +#define KM400 0x3205 +#define CN400_FUNCTION2 0x2259 +#define CN400_FUNCTION3 0x3259 +/* support VT3314 chipset */ +#define CN700_FUNCTION2 0x2314 +#define CN700_FUNCTION3 0x3208 +/* VT3324 chipset */ +#define CX700_FUNCTION2 0x2324 +#define CX700_FUNCTION3 0x3324 +/* VT3204 chipset*/ +#define KM800_FUNCTION3 0x3204 +/* VT3336 chipset*/ +#define KM890_FUNCTION3 0x3336 +/* VT3327 chipset*/ +#define P4M890_FUNCTION3 0x3327 +/* VT3293 chipset*/ +#define CN750_FUNCTION3 0x3208 +/* VT3364 chipset*/ +#define P4M900_FUNCTION3 0x3364 +/* VT3353 chipset*/ +#define VX800_FUNCTION3 0x3353 + +#define NUM_TOTAL_PLL_TABLE ARRAY_SIZE(pll_value) + +struct IODATA { + u8 Index; + u8 Mask; + u8 Data; +}; + +struct pci_device_id_info { + u32 vendor; + u32 device; + u32 chip_index; +}; + +extern unsigned int viafb_second_virtual_xres; +extern unsigned int viafb_second_offset; +extern int viafb_second_size; +extern int viafb_SAMM_ON; +extern int viafb_dual_fb; +extern int viafb_LCD2_ON; +extern int viafb_LCD_ON; +extern int viafb_DVI_ON; +extern int viafb_accel; +extern int viafb_hotplug; + +void viafb_write_reg_mask(u8 index, int io_port, u8 data, u8 mask); +void viafb_set_output_path(int device, int set_iga, + int output_interface); +void viafb_fill_crtc_timing(struct crt_mode_table *crt_table, + int mode_index, int bpp_byte, int set_iga); + +void viafb_set_vclock(u32 CLK, int set_iga); +void viafb_load_reg(int timing_value, int viafb_load_reg_num, + struct io_register *reg, + int io_type); +void viafb_crt_disable(void); +void viafb_crt_enable(void); +void init_ad9389(void); +/* Access I/O Function */ +void viafb_write_reg(u8 index, u16 io_port, u8 data); +u8 viafb_read_reg(int io_port, u8 index); +void viafb_lock_crt(void); +void viafb_unlock_crt(void); +void viafb_load_offset_reg(int h_addr, int bpp_byte, int set_iga); +void viafb_load_fetch_count_reg(int h_addr, int bpp_byte, int set_iga); +void viafb_write_regx(struct io_reg RegTable[], int ItemNum); +struct VideoModeTable *viafb_get_modetbl_pointer(int Index); +u32 viafb_get_clk_value(int clk); +void viafb_load_FIFO_reg(int set_iga, int hor_active, int ver_active); +void viafb_set_color_depth(int bpp_byte, int set_iga); +void viafb_set_dpa_gfx(int output_interface, struct GFX_DPA_SETTING\ + *p_gfx_dpa_setting); + +int viafb_setmode(int vmode_index, int hor_res, int ver_res, + int video_bpp, int vmode_index1, int hor_res1, + int ver_res1, int video_bpp1); +void viafb_init_chip_info(void); +void viafb_init_dac(int set_iga); +int viafb_get_pixclock(int hres, int vres, int vmode_refresh); +int viafb_get_refresh(int hres, int vres, u32 float_refresh); +void viafb_update_device_setting(int hres, int vres, int bpp, + int vmode_refresh, int flag); +void viafb_get_mmio_info(unsigned long *mmio_base, + unsigned long *mmio_len); + +void viafb_set_iga_path(void); +void viafb_set_start_addr(void); +void viafb_get_fb_info(unsigned int *fb_base, unsigned int *fb_len); + +#endif /* __HW_H__ */ diff --git a/drivers/video/via/iface.c b/drivers/video/via/iface.c new file mode 100644 index 000000000000..1570636c8d51 --- /dev/null +++ b/drivers/video/via/iface.c @@ -0,0 +1,78 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "global.h" + +/* Get frame buffer size from VGA BIOS */ + +unsigned int viafb_get_memsize(void) +{ + unsigned int m; + + /* If memory size provided by user */ + if (viafb_memsize) + m = viafb_memsize * Mb; + else { + m = (unsigned int)viafb_read_reg(VIASR, SR39); + m = m * (4 * Mb); + + if ((m < (16 * Mb)) || (m > (64 * Mb))) + m = 16 * Mb; + } + DEBUG_MSG(KERN_INFO "framebuffer size = %d Mb\n", m / Mb); + return m; +} + +/* Get Video Buffer Starting Physical Address(back door)*/ + +unsigned long viafb_get_videobuf_addr(void) +{ + struct pci_dev *pdev = NULL; + unsigned char sys_mem; + unsigned char video_mem; + unsigned long sys_mem_size; + unsigned long video_mem_size; + /*system memory = 256 MB, video memory 64 MB */ + unsigned long vmem_starting_adr = 0x0C000000; + + pdev = + (struct pci_dev *)pci_get_device(VIA_K800_BRIDGE_VID, + VIA_K800_BRIDGE_DID, NULL); + if (pdev != NULL) { + pci_read_config_byte(pdev, VIA_K800_SYSTEM_MEMORY_REG, + &sys_mem); + pci_read_config_byte(pdev, VIA_K800_VIDEO_MEMORY_REG, + &video_mem); + video_mem = (video_mem & 0x70) >> 4; + sys_mem_size = ((unsigned long)sys_mem) << 24; + if (video_mem != 0) + video_mem_size = (1 << (video_mem)) * 1024 * 1024; + else + video_mem_size = 0; + + vmem_starting_adr = sys_mem_size - video_mem_size; + pci_dev_put(pdev); + } + + DEBUG_MSG(KERN_INFO "Video Memory Starting Address = %lx \n", + vmem_starting_adr); + return vmem_starting_adr; +} diff --git a/drivers/video/via/iface.h b/drivers/video/via/iface.h new file mode 100644 index 000000000000..790ec3e3aea2 --- /dev/null +++ b/drivers/video/via/iface.h @@ -0,0 +1,38 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef __IFACE_H__ +#define __IFACE_H__ + +#define Kb (1024) +#define Mb (Kb*Kb) + +#define VIA_K800_BRIDGE_VID 0x1106 +#define VIA_K800_BRIDGE_DID 0x3204 + +#define VIA_K800_SYSTEM_MEMORY_REG 0x47 +#define VIA_K800_VIDEO_MEMORY_REG 0xA1 + +extern int viafb_memsize; +unsigned int viafb_get_memsize(void); +unsigned long viafb_get_videobuf_addr(void); + +#endif /* __IFACE_H__ */ diff --git a/drivers/video/via/ioctl.c b/drivers/video/via/ioctl.c new file mode 100644 index 000000000000..da03c074e32a --- /dev/null +++ b/drivers/video/via/ioctl.c @@ -0,0 +1,112 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "global.h" + +int viafb_ioctl_get_viafb_info(u_long arg) +{ + struct viafb_ioctl_info viainfo; + + viainfo.viafb_id = VIAID; + viainfo.vendor_id = PCI_VIA_VENDOR_ID; + + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_CLE266: + viainfo.device_id = UNICHROME_CLE266_DID; + break; + + case UNICHROME_K400: + viainfo.device_id = UNICHROME_K400_DID; + break; + + case UNICHROME_K800: + viainfo.device_id = UNICHROME_K800_DID; + break; + + case UNICHROME_PM800: + viainfo.device_id = UNICHROME_PM800_DID; + break; + + case UNICHROME_CN700: + viainfo.device_id = UNICHROME_CN700_DID; + break; + + case UNICHROME_CX700: + viainfo.device_id = UNICHROME_CX700_DID; + break; + + case UNICHROME_K8M890: + viainfo.device_id = UNICHROME_K8M890_DID; + break; + + case UNICHROME_P4M890: + viainfo.device_id = UNICHROME_P4M890_DID; + break; + + case UNICHROME_P4M900: + viainfo.device_id = UNICHROME_P4M900_DID; + break; + } + + viainfo.version = VERSION_MAJOR; + viainfo.revision = VERSION_MINOR; + + if (copy_to_user((void __user *)arg, &viainfo, sizeof(viainfo))) + return -EFAULT; + + return 0; +} + +/* Hot-Plug Priority: DVI > CRT*/ +int viafb_ioctl_hotplug(int hres, int vres, int bpp) +{ + int DVIsense, status = 0; + DEBUG_MSG(KERN_INFO "viafb_ioctl_hotplug!!\n"); + + if (viaparinfo->chip_info->tmds_chip_info.tmds_chip_name != + NON_TMDS_TRANSMITTER) { + DVIsense = viafb_dvi_sense(); + + if (DVIsense) { + DEBUG_MSG(KERN_INFO "DVI Attached...\n"); + if (viafb_DeviceStatus != DVI_Device) { + viafb_DVI_ON = 1; + viafb_CRT_ON = 0; + viafb_LCD_ON = 0; + viafb_DeviceStatus = DVI_Device; + return viafb_DeviceStatus; + } + status = 1; + } else + DEBUG_MSG(KERN_INFO "DVI De-attached...\n"); + } + + if ((viafb_DeviceStatus != CRT_Device) && (status == 0)) { + viafb_CRT_ON = 1; + viafb_DVI_ON = 0; + viafb_LCD_ON = 0; + + viafb_DeviceStatus = CRT_Device; + return viafb_DeviceStatus; + } + + return 0; +} diff --git a/drivers/video/via/ioctl.h b/drivers/video/via/ioctl.h new file mode 100644 index 000000000000..842fe30b9868 --- /dev/null +++ b/drivers/video/via/ioctl.h @@ -0,0 +1,210 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef __IOCTL_H__ +#define __IOCTL_H__ + +#ifndef __user +#define __user +#endif + +/* VIAFB IOCTL definition */ +#define VIAFB_GET_INFO_SIZE 0x56494101 /* 'VIA\01' */ +#define VIAFB_GET_INFO 0x56494102 /* 'VIA\02' */ +#define VIAFB_HOTPLUG 0x56494103 /* 'VIA\03' */ +#define VIAFB_SET_HOTPLUG_FLAG 0x56494104 /* 'VIA\04' */ +#define VIAFB_GET_RESOLUTION 0x56494105 /* 'VIA\05' */ +#define VIAFB_GET_SAMM_INFO 0x56494107 /* 'VIA\07' */ +#define VIAFB_TURN_ON_OUTPUT_DEVICE 0x56494108 /* 'VIA\08' */ +#define VIAFB_TURN_OFF_OUTPUT_DEVICE 0x56494109 /* 'VIA\09' */ +#define VIAFB_SET_DEVICE 0x5649410A +#define VIAFB_GET_DEVICE 0x5649410B +#define VIAFB_GET_DRIVER_VERSION 0x56494112 /* 'VIA\12' */ +#define VIAFB_GET_CHIP_INFO 0x56494113 /* 'VIA\13' */ +#define VIAFB_SET_DEVICE_INFO 0x56494114 +#define VIAFB_GET_DEVICE_INFO 0x56494115 + +#define VIAFB_GET_DEVICE_SUPPORT 0x56494118 +#define VIAFB_GET_DEVICE_CONNECT 0x56494119 +#define VIAFB_GET_PANEL_SUPPORT_EXPAND 0x5649411A +#define VIAFB_GET_DRIVER_NAME 0x56494122 +#define VIAFB_GET_DEVICE_SUPPORT_STATE 0x56494123 +#define VIAFB_GET_GAMMA_LUT 0x56494124 +#define VIAFB_SET_GAMMA_LUT 0x56494125 +#define VIAFB_GET_GAMMA_SUPPORT_STATE 0x56494126 +#define VIAFB_SET_VIDEO_DEVICE 0x56494127 +#define VIAFB_GET_VIDEO_DEVICE 0x56494128 +#define VIAFB_SET_SECOND_MODE 0x56494129 +#define VIAFB_SYNC_SURFACE 0x56494130 +#define VIAFB_GET_DRIVER_CAPS 0x56494131 +#define VIAFB_GET_IGA_SCALING_INFO 0x56494132 +#define VIAFB_GET_PANEL_MAX_SIZE 0x56494133 +#define VIAFB_GET_PANEL_MAX_POSITION 0x56494134 +#define VIAFB_SET_PANEL_SIZE 0x56494135 +#define VIAFB_SET_PANEL_POSITION 0x56494136 +#define VIAFB_GET_PANEL_POSITION 0x56494137 +#define VIAFB_GET_PANEL_SIZE 0x56494138 + +#define None_Device 0x00 +#define CRT_Device 0x01 +#define LCD_Device 0x02 +#define DVI_Device 0x08 +#define CRT2_Device 0x10 +#define LCD2_Device 0x40 + +#define OP_LCD_CENTERING 0x01 +#define OP_LCD_PANEL_ID 0x02 +#define OP_LCD_MODE 0x03 + +/*SAMM operation flag*/ +#define OP_SAMM 0x80 + +#define LCD_PANEL_ID_MAXIMUM 22 + +#define STATE_ON 0x1 +#define STATE_OFF 0x0 +#define STATE_DEFAULT 0xFFFF + +#define MAX_ACTIVE_DEV_NUM 2 + +struct device_t { + unsigned short crt:1; + unsigned short dvi:1; + unsigned short lcd:1; + unsigned short samm:1; + unsigned short lcd_dsp_cent:1; + unsigned char lcd_mode:1; + unsigned short epia_dvi:1; + unsigned short lcd_dual_edge:1; + unsigned short lcd2:1; + + unsigned short primary_dev; + unsigned char lcd_panel_id; + unsigned short xres, yres; + unsigned short xres1, yres1; + unsigned short refresh; + unsigned short bpp; + unsigned short refresh1; + unsigned short bpp1; + unsigned short sequence; + unsigned short bus_width; +}; + +struct viafb_ioctl_info { + u32 viafb_id; /* for identifying viafb */ +#define VIAID 0x56494146 /* Identify myself with 'VIAF' */ + u16 vendor_id; + u16 device_id; + u8 version; + u8 revision; + u8 reserved[246]; /* for future use */ +}; + +struct viafb_ioctl_mode { + u32 xres; + u32 yres; + u32 refresh; + u32 bpp; + u32 xres_sec; + u32 yres_sec; + u32 virtual_xres_sec; + u32 virtual_yres_sec; + u32 refresh_sec; + u32 bpp_sec; +}; +struct viafb_ioctl_samm { + u32 samm_status; + u32 size_prim; + u32 size_sec; + u32 mem_base; + u32 offset_sec; +}; + +struct viafb_driver_version { + int iMajorNum; + int iKernelNum; + int iOSNum; + int iMinorNum; +}; + +struct viafb_ioctl_lcd_attribute { + unsigned int panel_id; + unsigned int display_center; + unsigned int lcd_mode; +}; + +struct viafb_ioctl_setting { + /* Enable or disable active devices */ + unsigned short device_flag; + /* Indicate which device should be turn on or turn off. */ + unsigned short device_status; + unsigned int reserved; + /* Indicate which LCD's attribute can be changed. */ + unsigned short lcd_operation_flag; + /* 1: SAMM ON 0: SAMM OFF */ + unsigned short samm_status; + /* horizontal resolution of first device */ + unsigned short first_dev_hor_res; + /* vertical resolution of first device */ + unsigned short first_dev_ver_res; + /* horizontal resolution of second device */ + unsigned short second_dev_hor_res; + /* vertical resolution of second device */ + unsigned short second_dev_ver_res; + /* refresh rate of first device */ + unsigned short first_dev_refresh; + /* bpp of first device */ + unsigned short first_dev_bpp; + /* refresh rate of second device */ + unsigned short second_dev_refresh; + /* bpp of second device */ + unsigned short second_dev_bpp; + /* Indicate which device are primary display device. */ + unsigned int primary_device; + /* Indicate which device will show video. only valid in duoview mode */ + unsigned int video_device_status; + unsigned int struct_reserved[34]; + struct viafb_ioctl_lcd_attribute lcd_attributes; +}; + +struct _UTFunctionCaps { + unsigned int dw3DScalingState; + unsigned int reserved[31]; +}; + +struct _POSITIONVALUE { + unsigned int dwX; + unsigned int dwY; +}; + +struct _panel_size_pos_info { + unsigned int device_type; + int x; + int y; +}; + +extern int viafb_LCD_ON; +extern int viafb_DVI_ON; + +int viafb_ioctl_get_viafb_info(u_long arg); +int viafb_ioctl_hotplug(int hres, int vres, int bpp); + +#endif /* __IOCTL_H__ */ diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c new file mode 100644 index 000000000000..6c7290a6a447 --- /dev/null +++ b/drivers/video/via/lcd.c @@ -0,0 +1,1821 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "global.h" +#include "lcdtbl.h" + +static struct iga2_shadow_crtc_timing iga2_shadow_crtc_reg = { + /* IGA2 Shadow Horizontal Total */ + {IGA2_SHADOW_HOR_TOTAL_REG_NUM, {{CR6D, 0, 7}, {CR71, 3, 3} } }, + /* IGA2 Shadow Horizontal Blank End */ + {IGA2_SHADOW_HOR_BLANK_END_REG_NUM, {{CR6E, 0, 7} } }, + /* IGA2 Shadow Vertical Total */ + {IGA2_SHADOW_VER_TOTAL_REG_NUM, {{CR6F, 0, 7}, {CR71, 0, 2} } }, + /* IGA2 Shadow Vertical Addressable Video */ + {IGA2_SHADOW_VER_ADDR_REG_NUM, {{CR70, 0, 7}, {CR71, 4, 6} } }, + /* IGA2 Shadow Vertical Blank Start */ + {IGA2_SHADOW_VER_BLANK_START_REG_NUM, + {{CR72, 0, 7}, {CR74, 4, 6} } }, + /* IGA2 Shadow Vertical Blank End */ + {IGA2_SHADOW_VER_BLANK_END_REG_NUM, {{CR73, 0, 7}, {CR74, 0, 2} } }, + /* IGA2 Shadow Vertical Sync Start */ + {IGA2_SHADOW_VER_SYNC_START_REG_NUM, {{CR75, 0, 7}, {CR76, 4, 6} } }, + /* IGA2 Shadow Vertical Sync End */ + {IGA2_SHADOW_VER_SYNC_END_REG_NUM, {{CR76, 0, 3} } } +}; + +static struct _lcd_scaling_factor lcd_scaling_factor = { + /* LCD Horizontal Scaling Factor Register */ + {LCD_HOR_SCALING_FACTOR_REG_NUM, + {{CR9F, 0, 1}, {CR77, 0, 7}, {CR79, 4, 5} } }, + /* LCD Vertical Scaling Factor Register */ + {LCD_VER_SCALING_FACTOR_REG_NUM, + {{CR79, 3, 3}, {CR78, 0, 7}, {CR79, 6, 7} } } +}; +static struct _lcd_scaling_factor lcd_scaling_factor_CLE = { + /* LCD Horizontal Scaling Factor Register */ + {LCD_HOR_SCALING_FACTOR_REG_NUM_CLE, {{CR77, 0, 7}, {CR79, 4, 5} } }, + /* LCD Vertical Scaling Factor Register */ + {LCD_VER_SCALING_FACTOR_REG_NUM_CLE, {{CR78, 0, 7}, {CR79, 6, 7} } } +}; + +static int check_lvds_chip(int device_id_subaddr, int device_id); +static bool lvds_identify_integratedlvds(void); +static int fp_id_to_vindex(int panel_id); +static int lvds_register_read(int index); +static void load_lcd_scaling(int set_hres, int set_vres, int panel_hres, + int panel_vres); +static void load_lcd_k400_patch_tbl(int set_hres, int set_vres, + int panel_id); +static void load_lcd_p880_patch_tbl(int set_hres, int set_vres, + int panel_id); +static void load_lcd_patch_regs(int set_hres, int set_vres, + int panel_id, int set_iga); +static void via_pitch_alignment_patch_lcd( + struct lvds_setting_information *plvds_setting_info, + struct lvds_chip_information + *plvds_chip_info); +static void lcd_patch_skew_dvp0(struct lvds_setting_information + *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info); +static void lcd_patch_skew_dvp1(struct lvds_setting_information + *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info); +static void lcd_patch_skew(struct lvds_setting_information + *plvds_setting_info, struct lvds_chip_information *plvds_chip_info); + +static void integrated_lvds_disable(struct lvds_setting_information + *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info); +static void integrated_lvds_enable(struct lvds_setting_information + *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info); +static void lcd_powersequence_off(void); +static void lcd_powersequence_on(void); +static void fill_lcd_format(void); +static void check_diport_of_integrated_lvds( + struct lvds_chip_information *plvds_chip_info, + struct lvds_setting_information + *plvds_setting_info); +static struct display_timing lcd_centering_timging(struct display_timing + mode_crt_reg, + struct display_timing panel_crt_reg); +static void load_crtc_shadow_timing(struct display_timing mode_timing, + struct display_timing panel_timing); +static void viafb_load_scaling_factor_for_p4m900(int set_hres, + int set_vres, int panel_hres, int panel_vres); + +static int check_lvds_chip(int device_id_subaddr, int device_id) +{ + if (lvds_register_read(device_id_subaddr) == device_id) + return OK; + else + return FAIL; +} + +void viafb_init_lcd_size(void) +{ + DEBUG_MSG(KERN_INFO "viafb_init_lcd_size()\n"); + DEBUG_MSG(KERN_INFO + "viaparinfo->lvds_setting_info->get_lcd_size_method %d\n", + viaparinfo->lvds_setting_info->get_lcd_size_method); + + switch (viaparinfo->lvds_setting_info->get_lcd_size_method) { + case GET_LCD_SIZE_BY_SYSTEM_BIOS: + break; + case GET_LCD_SZIE_BY_HW_STRAPPING: + break; + case GET_LCD_SIZE_BY_VGA_BIOS: + DEBUG_MSG(KERN_INFO "Get LCD Size method by VGA BIOS !!\n"); + viaparinfo->lvds_setting_info->lcd_panel_size = + fp_id_to_vindex(viafb_lcd_panel_id); + DEBUG_MSG(KERN_INFO "LCD Panel_ID = %d\n", + viaparinfo->lvds_setting_info->lcd_panel_id); + DEBUG_MSG(KERN_INFO "LCD Panel Size = %d\n", + viaparinfo->lvds_setting_info->lcd_panel_size); + break; + case GET_LCD_SIZE_BY_USER_SETTING: + DEBUG_MSG(KERN_INFO "Get LCD Size method by user setting !!\n"); + viaparinfo->lvds_setting_info->lcd_panel_size = + fp_id_to_vindex(viafb_lcd_panel_id); + DEBUG_MSG(KERN_INFO "LCD Panel_ID = %d\n", + viaparinfo->lvds_setting_info->lcd_panel_id); + DEBUG_MSG(KERN_INFO "LCD Panel Size = %d\n", + viaparinfo->lvds_setting_info->lcd_panel_size); + break; + default: + DEBUG_MSG(KERN_INFO "viafb_init_lcd_size fail\n"); + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_ID1_800X600; + viaparinfo->lvds_setting_info->lcd_panel_size = + fp_id_to_vindex(LCD_PANEL_ID1_800X600); + } + viaparinfo->lvds_setting_info2->lcd_panel_id = + viaparinfo->lvds_setting_info->lcd_panel_id; + viaparinfo->lvds_setting_info2->lcd_panel_size = + viaparinfo->lvds_setting_info->lcd_panel_size; + viaparinfo->lvds_setting_info2->lcd_panel_hres = + viaparinfo->lvds_setting_info->lcd_panel_hres; + viaparinfo->lvds_setting_info2->lcd_panel_vres = + viaparinfo->lvds_setting_info->lcd_panel_vres; + viaparinfo->lvds_setting_info2->device_lcd_dualedge = + viaparinfo->lvds_setting_info->device_lcd_dualedge; + viaparinfo->lvds_setting_info2->LCDDithering = + viaparinfo->lvds_setting_info->LCDDithering; +} + +static bool lvds_identify_integratedlvds(void) +{ + if (viafb_display_hardware_layout == HW_LAYOUT_LCD_EXTERNAL_LCD2) { + /* Two dual channel LCD (Internal LVDS + External LVDS): */ + /* If we have an external LVDS, such as VT1636, we should + have its chip ID already. */ + if (viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) { + viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name = + INTEGRATED_LVDS; + DEBUG_MSG(KERN_INFO "Support two dual channel LVDS!\ + (Internal LVDS + External LVDS)\n"); + } else { + viaparinfo->chip_info->lvds_chip_info.lvds_chip_name = + INTEGRATED_LVDS; + DEBUG_MSG(KERN_INFO "Not found external LVDS,\ + so can't support two dual channel LVDS!\n"); + } + } else if (viafb_display_hardware_layout == HW_LAYOUT_LCD1_LCD2) { + /* Two single channel LCD (Internal LVDS + Internal LVDS): */ + viaparinfo->chip_info->lvds_chip_info.lvds_chip_name = + INTEGRATED_LVDS; + viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name = + INTEGRATED_LVDS; + DEBUG_MSG(KERN_INFO "Support two single channel LVDS!\ + (Internal LVDS + Internal LVDS)\n"); + } else if (viafb_display_hardware_layout != HW_LAYOUT_DVI_ONLY) { + /* If we have found external LVDS, just use it, + otherwise, we will use internal LVDS as default. */ + if (!viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) { + viaparinfo->chip_info->lvds_chip_info.lvds_chip_name = + INTEGRATED_LVDS; + DEBUG_MSG(KERN_INFO "Found Integrated LVDS!\n"); + } + } else { + viaparinfo->chip_info->lvds_chip_info.lvds_chip_name = + NON_LVDS_TRANSMITTER; + DEBUG_MSG(KERN_INFO "Do not support LVDS!\n"); + return false; + } + + return true; +} + +int viafb_lvds_trasmitter_identify(void) +{ + viaparinfo->i2c_stuff.i2c_port = I2CPORTINDEX; + if (viafb_lvds_identify_vt1636()) { + viaparinfo->chip_info->lvds_chip_info.i2c_port = I2CPORTINDEX; + DEBUG_MSG(KERN_INFO + "Found VIA VT1636 LVDS on port i2c 0x31 \n"); + } else { + viaparinfo->i2c_stuff.i2c_port = GPIOPORTINDEX; + if (viafb_lvds_identify_vt1636()) { + viaparinfo->chip_info->lvds_chip_info.i2c_port = + GPIOPORTINDEX; + DEBUG_MSG(KERN_INFO + "Found VIA VT1636 LVDS on port gpio 0x2c \n"); + } + } + + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) + lvds_identify_integratedlvds(); + + if (viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) + return true; + /* Check for VT1631: */ + viaparinfo->chip_info->lvds_chip_info.lvds_chip_name = VT1631_LVDS; + viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr = + VT1631_LVDS_I2C_ADDR; + + if (check_lvds_chip(VT1631_DEVICE_ID_REG, VT1631_DEVICE_ID) != FAIL) { + DEBUG_MSG(KERN_INFO "\n VT1631 LVDS ! \n"); + DEBUG_MSG(KERN_INFO "\n %2d", + viaparinfo->chip_info->lvds_chip_info.lvds_chip_name); + DEBUG_MSG(KERN_INFO "\n %2d", + viaparinfo->chip_info->lvds_chip_info.lvds_chip_name); + return OK; + } + + viaparinfo->chip_info->lvds_chip_info.lvds_chip_name = + NON_LVDS_TRANSMITTER; + viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr = + VT1631_LVDS_I2C_ADDR; + return FAIL; +} + +static int fp_id_to_vindex(int panel_id) +{ + DEBUG_MSG(KERN_INFO "fp_get_panel_id()\n"); + + if (panel_id > LCD_PANEL_ID_MAXIMUM) + viafb_lcd_panel_id = panel_id = + viafb_read_reg(VIACR, CR3F) & 0x0F; + + switch (panel_id) { + case 0x0: + viaparinfo->lvds_setting_info->lcd_panel_hres = 640; + viaparinfo->lvds_setting_info->lcd_panel_vres = 480; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_ID0_640X480; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; + viaparinfo->lvds_setting_info->LCDDithering = 1; + return VIA_RES_640X480; + break; + case 0x1: + viaparinfo->lvds_setting_info->lcd_panel_hres = 800; + viaparinfo->lvds_setting_info->lcd_panel_vres = 600; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_ID1_800X600; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; + viaparinfo->lvds_setting_info->LCDDithering = 1; + return VIA_RES_800X600; + break; + case 0x2: + viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; + viaparinfo->lvds_setting_info->lcd_panel_vres = 768; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_ID2_1024X768; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; + viaparinfo->lvds_setting_info->LCDDithering = 1; + return VIA_RES_1024X768; + break; + case 0x3: + viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; + viaparinfo->lvds_setting_info->lcd_panel_vres = 768; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_ID3_1280X768; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; + viaparinfo->lvds_setting_info->LCDDithering = 1; + return VIA_RES_1280X768; + break; + case 0x4: + viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; + viaparinfo->lvds_setting_info->lcd_panel_vres = 1024; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_ID4_1280X1024; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; + viaparinfo->lvds_setting_info->LCDDithering = 1; + return VIA_RES_1280X1024; + break; + case 0x5: + viaparinfo->lvds_setting_info->lcd_panel_hres = 1400; + viaparinfo->lvds_setting_info->lcd_panel_vres = 1050; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_ID5_1400X1050; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; + viaparinfo->lvds_setting_info->LCDDithering = 1; + return VIA_RES_1400X1050; + break; + case 0x6: + viaparinfo->lvds_setting_info->lcd_panel_hres = 1600; + viaparinfo->lvds_setting_info->lcd_panel_vres = 1200; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_ID6_1600X1200; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; + viaparinfo->lvds_setting_info->LCDDithering = 1; + return VIA_RES_1600X1200; + break; + case 0x8: + viaparinfo->lvds_setting_info->lcd_panel_hres = 800; + viaparinfo->lvds_setting_info->lcd_panel_vres = 480; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_IDA_800X480; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; + viaparinfo->lvds_setting_info->LCDDithering = 1; + return VIA_RES_800X480; + break; + case 0x9: + viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; + viaparinfo->lvds_setting_info->lcd_panel_vres = 768; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_ID2_1024X768; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; + viaparinfo->lvds_setting_info->LCDDithering = 1; + return VIA_RES_1024X768; + break; + case 0xA: + viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; + viaparinfo->lvds_setting_info->lcd_panel_vres = 768; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_ID2_1024X768; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; + viaparinfo->lvds_setting_info->LCDDithering = 0; + return VIA_RES_1024X768; + break; + case 0xB: + viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; + viaparinfo->lvds_setting_info->lcd_panel_vres = 768; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_ID2_1024X768; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; + viaparinfo->lvds_setting_info->LCDDithering = 0; + return VIA_RES_1024X768; + break; + case 0xC: + viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; + viaparinfo->lvds_setting_info->lcd_panel_vres = 768; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_ID3_1280X768; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; + viaparinfo->lvds_setting_info->LCDDithering = 0; + return VIA_RES_1280X768; + break; + case 0xD: + viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; + viaparinfo->lvds_setting_info->lcd_panel_vres = 1024; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_ID4_1280X1024; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; + viaparinfo->lvds_setting_info->LCDDithering = 0; + return VIA_RES_1280X1024; + break; + case 0xE: + viaparinfo->lvds_setting_info->lcd_panel_hres = 1400; + viaparinfo->lvds_setting_info->lcd_panel_vres = 1050; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_ID5_1400X1050; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; + viaparinfo->lvds_setting_info->LCDDithering = 0; + return VIA_RES_1400X1050; + break; + case 0xF: + viaparinfo->lvds_setting_info->lcd_panel_hres = 1600; + viaparinfo->lvds_setting_info->lcd_panel_vres = 1200; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_ID6_1600X1200; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; + viaparinfo->lvds_setting_info->LCDDithering = 0; + return VIA_RES_1600X1200; + break; + case 0x10: + viaparinfo->lvds_setting_info->lcd_panel_hres = 1366; + viaparinfo->lvds_setting_info->lcd_panel_vres = 768; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_ID7_1366X768; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; + viaparinfo->lvds_setting_info->LCDDithering = 0; + return VIA_RES_1368X768; + break; + case 0x11: + viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; + viaparinfo->lvds_setting_info->lcd_panel_vres = 600; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_ID8_1024X600; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; + viaparinfo->lvds_setting_info->LCDDithering = 1; + return VIA_RES_1024X600; + break; + case 0x12: + viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; + viaparinfo->lvds_setting_info->lcd_panel_vres = 768; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_ID3_1280X768; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; + viaparinfo->lvds_setting_info->LCDDithering = 1; + return VIA_RES_1280X768; + break; + case 0x13: + viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; + viaparinfo->lvds_setting_info->lcd_panel_vres = 800; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_ID9_1280X800; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; + viaparinfo->lvds_setting_info->LCDDithering = 1; + return VIA_RES_1280X800; + break; + case 0x14: + viaparinfo->lvds_setting_info->lcd_panel_hres = 1360; + viaparinfo->lvds_setting_info->lcd_panel_vres = 768; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_IDB_1360X768; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; + viaparinfo->lvds_setting_info->LCDDithering = 0; + return VIA_RES_1360X768; + break; + case 0x15: + viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; + viaparinfo->lvds_setting_info->lcd_panel_vres = 768; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_ID3_1280X768; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; + viaparinfo->lvds_setting_info->LCDDithering = 0; + return VIA_RES_1280X768; + break; + case 0x16: + viaparinfo->lvds_setting_info->lcd_panel_hres = 480; + viaparinfo->lvds_setting_info->lcd_panel_vres = 640; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_IDC_480X640; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; + viaparinfo->lvds_setting_info->LCDDithering = 1; + return VIA_RES_480X640; + break; + default: + viaparinfo->lvds_setting_info->lcd_panel_hres = 800; + viaparinfo->lvds_setting_info->lcd_panel_vres = 600; + viaparinfo->lvds_setting_info->lcd_panel_id = + LCD_PANEL_ID1_800X600; + viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; + viaparinfo->lvds_setting_info->LCDDithering = 1; + return VIA_RES_800X600; + } +} + +static int lvds_register_read(int index) +{ + u8 data; + + viaparinfo->i2c_stuff.i2c_port = GPIOPORTINDEX; + viafb_i2c_readbyte((u8) viaparinfo->chip_info-> + lvds_chip_info.lvds_chip_slave_addr, + (u8) index, &data); + return data; +} + +static void load_lcd_scaling(int set_hres, int set_vres, int panel_hres, + int panel_vres) +{ + int reg_value = 0; + int viafb_load_reg_num; + struct io_register *reg = NULL; + + DEBUG_MSG(KERN_INFO "load_lcd_scaling()!!\n"); + + /* LCD Scaling Enable */ + viafb_write_reg_mask(CR79, VIACR, 0x07, BIT0 + BIT1 + BIT2); + if (UNICHROME_P4M900 == viaparinfo->chip_info->gfx_chip_name) { + viafb_load_scaling_factor_for_p4m900(set_hres, set_vres, + panel_hres, panel_vres); + return; + } + + /* Check if expansion for horizontal */ + if (set_hres != panel_hres) { + /* Load Horizontal Scaling Factor */ + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_CLE266: + case UNICHROME_K400: + reg_value = + CLE266_LCD_HOR_SCF_FORMULA(set_hres, panel_hres); + viafb_load_reg_num = + lcd_scaling_factor_CLE.lcd_hor_scaling_factor. + reg_num; + reg = lcd_scaling_factor_CLE.lcd_hor_scaling_factor.reg; + viafb_load_reg(reg_value, + viafb_load_reg_num, reg, VIACR); + break; + case UNICHROME_K800: + case UNICHROME_PM800: + case UNICHROME_CN700: + case UNICHROME_CX700: + case UNICHROME_K8M890: + case UNICHROME_P4M890: + reg_value = + K800_LCD_HOR_SCF_FORMULA(set_hres, panel_hres); + /* Horizontal scaling enabled */ + viafb_write_reg_mask(CRA2, VIACR, 0xC0, BIT7 + BIT6); + viafb_load_reg_num = + lcd_scaling_factor.lcd_hor_scaling_factor.reg_num; + reg = lcd_scaling_factor.lcd_hor_scaling_factor.reg; + viafb_load_reg(reg_value, + viafb_load_reg_num, reg, VIACR); + break; + } + + DEBUG_MSG(KERN_INFO "Horizontal Scaling value = %d", reg_value); + } else { + /* Horizontal scaling disabled */ + viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT7); + } + + /* Check if expansion for vertical */ + if (set_vres != panel_vres) { + /* Load Vertical Scaling Factor */ + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_CLE266: + case UNICHROME_K400: + reg_value = + CLE266_LCD_VER_SCF_FORMULA(set_vres, panel_vres); + viafb_load_reg_num = + lcd_scaling_factor_CLE.lcd_ver_scaling_factor. + reg_num; + reg = lcd_scaling_factor_CLE.lcd_ver_scaling_factor.reg; + viafb_load_reg(reg_value, + viafb_load_reg_num, reg, VIACR); + break; + case UNICHROME_K800: + case UNICHROME_PM800: + case UNICHROME_CN700: + case UNICHROME_CX700: + case UNICHROME_K8M890: + case UNICHROME_P4M890: + reg_value = + K800_LCD_VER_SCF_FORMULA(set_vres, panel_vres); + /* Vertical scaling enabled */ + viafb_write_reg_mask(CRA2, VIACR, 0x08, BIT3); + viafb_load_reg_num = + lcd_scaling_factor.lcd_ver_scaling_factor.reg_num; + reg = lcd_scaling_factor.lcd_ver_scaling_factor.reg; + viafb_load_reg(reg_value, + viafb_load_reg_num, reg, VIACR); + break; + } + + DEBUG_MSG(KERN_INFO "Vertical Scaling value = %d", reg_value); + } else { + /* Vertical scaling disabled */ + viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT3); + } +} + +static void load_lcd_k400_patch_tbl(int set_hres, int set_vres, + int panel_id) +{ + int vmode_index; + int reg_num = 0; + struct io_reg *lcd_patch_reg = NULL; + + if (viaparinfo->lvds_setting_info->iga_path == IGA2) + vmode_index = viafb_get_mode_index(set_hres, set_vres, 1); + else + vmode_index = viafb_get_mode_index(set_hres, set_vres, 0); + switch (panel_id) { + /* LCD 800x600 */ + case LCD_PANEL_ID1_800X600: + switch (vmode_index) { + case VIA_RES_640X400: + case VIA_RES_640X480: + reg_num = NUM_TOTAL_K400_LCD_RES_6X4_8X6; + lcd_patch_reg = K400_LCD_RES_6X4_8X6; + break; + case VIA_RES_720X480: + case VIA_RES_720X576: + reg_num = NUM_TOTAL_K400_LCD_RES_7X4_8X6; + lcd_patch_reg = K400_LCD_RES_7X4_8X6; + break; + } + break; + + /* LCD 1024x768 */ + case LCD_PANEL_ID2_1024X768: + switch (vmode_index) { + case VIA_RES_640X400: + case VIA_RES_640X480: + reg_num = NUM_TOTAL_K400_LCD_RES_6X4_10X7; + lcd_patch_reg = K400_LCD_RES_6X4_10X7; + break; + case VIA_RES_720X480: + case VIA_RES_720X576: + reg_num = NUM_TOTAL_K400_LCD_RES_7X4_10X7; + lcd_patch_reg = K400_LCD_RES_7X4_10X7; + break; + case VIA_RES_800X600: + reg_num = NUM_TOTAL_K400_LCD_RES_8X6_10X7; + lcd_patch_reg = K400_LCD_RES_8X6_10X7; + break; + } + break; + + /* LCD 1280x1024 */ + case LCD_PANEL_ID4_1280X1024: + switch (vmode_index) { + case VIA_RES_640X400: + case VIA_RES_640X480: + reg_num = NUM_TOTAL_K400_LCD_RES_6X4_12X10; + lcd_patch_reg = K400_LCD_RES_6X4_12X10; + break; + case VIA_RES_720X480: + case VIA_RES_720X576: + reg_num = NUM_TOTAL_K400_LCD_RES_7X4_12X10; + lcd_patch_reg = K400_LCD_RES_7X4_12X10; + break; + case VIA_RES_800X600: + reg_num = NUM_TOTAL_K400_LCD_RES_8X6_12X10; + lcd_patch_reg = K400_LCD_RES_8X6_12X10; + break; + case VIA_RES_1024X768: + reg_num = NUM_TOTAL_K400_LCD_RES_10X7_12X10; + lcd_patch_reg = K400_LCD_RES_10X7_12X10; + break; + + } + break; + + /* LCD 1400x1050 */ + case LCD_PANEL_ID5_1400X1050: + switch (vmode_index) { + case VIA_RES_640X480: + reg_num = NUM_TOTAL_K400_LCD_RES_6X4_14X10; + lcd_patch_reg = K400_LCD_RES_6X4_14X10; + break; + case VIA_RES_800X600: + reg_num = NUM_TOTAL_K400_LCD_RES_8X6_14X10; + lcd_patch_reg = K400_LCD_RES_8X6_14X10; + break; + case VIA_RES_1024X768: + reg_num = NUM_TOTAL_K400_LCD_RES_10X7_14X10; + lcd_patch_reg = K400_LCD_RES_10X7_14X10; + break; + case VIA_RES_1280X768: + case VIA_RES_1280X800: + case VIA_RES_1280X960: + case VIA_RES_1280X1024: + reg_num = NUM_TOTAL_K400_LCD_RES_12X10_14X10; + lcd_patch_reg = K400_LCD_RES_12X10_14X10; + break; + } + break; + + /* LCD 1600x1200 */ + case LCD_PANEL_ID6_1600X1200: + switch (vmode_index) { + case VIA_RES_640X400: + case VIA_RES_640X480: + reg_num = NUM_TOTAL_K400_LCD_RES_6X4_16X12; + lcd_patch_reg = K400_LCD_RES_6X4_16X12; + break; + case VIA_RES_720X480: + case VIA_RES_720X576: + reg_num = NUM_TOTAL_K400_LCD_RES_7X4_16X12; + lcd_patch_reg = K400_LCD_RES_7X4_16X12; + break; + case VIA_RES_800X600: + reg_num = NUM_TOTAL_K400_LCD_RES_8X6_16X12; + lcd_patch_reg = K400_LCD_RES_8X6_16X12; + break; + case VIA_RES_1024X768: + reg_num = NUM_TOTAL_K400_LCD_RES_10X7_16X12; + lcd_patch_reg = K400_LCD_RES_10X7_16X12; + break; + case VIA_RES_1280X768: + case VIA_RES_1280X800: + case VIA_RES_1280X960: + case VIA_RES_1280X1024: + reg_num = NUM_TOTAL_K400_LCD_RES_12X10_16X12; + lcd_patch_reg = K400_LCD_RES_12X10_16X12; + break; + } + break; + + /* LCD 1366x768 */ + case LCD_PANEL_ID7_1366X768: + switch (vmode_index) { + case VIA_RES_640X480: + reg_num = NUM_TOTAL_K400_LCD_RES_6X4_1366X7; + lcd_patch_reg = K400_LCD_RES_6X4_1366X7; + break; + case VIA_RES_720X480: + case VIA_RES_720X576: + reg_num = NUM_TOTAL_K400_LCD_RES_7X4_1366X7; + lcd_patch_reg = K400_LCD_RES_7X4_1366X7; + break; + case VIA_RES_800X600: + reg_num = NUM_TOTAL_K400_LCD_RES_8X6_1366X7; + lcd_patch_reg = K400_LCD_RES_8X6_1366X7; + break; + case VIA_RES_1024X768: + reg_num = NUM_TOTAL_K400_LCD_RES_10X7_1366X7; + lcd_patch_reg = K400_LCD_RES_10X7_1366X7; + break; + case VIA_RES_1280X768: + case VIA_RES_1280X800: + case VIA_RES_1280X960: + case VIA_RES_1280X1024: + reg_num = NUM_TOTAL_K400_LCD_RES_12X10_1366X7; + lcd_patch_reg = K400_LCD_RES_12X10_1366X7; + break; + } + break; + + /* LCD 1360x768 */ + case LCD_PANEL_IDB_1360X768: + break; + } + if (reg_num != 0) { + /* H.W. Reset : ON */ + viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7); + + viafb_write_regx(lcd_patch_reg, reg_num); + + /* H.W. Reset : OFF */ + viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7); + + /* Reset PLL */ + viafb_write_reg_mask(SR40, VIASR, 0x02, BIT1); + viafb_write_reg_mask(SR40, VIASR, 0x00, BIT1); + + /* Fire! */ + outb(inb(VIARMisc) | (BIT2 + BIT3), VIAWMisc); + } +} + +static void load_lcd_p880_patch_tbl(int set_hres, int set_vres, + int panel_id) +{ + int vmode_index; + int reg_num = 0; + struct io_reg *lcd_patch_reg = NULL; + + if (viaparinfo->lvds_setting_info->iga_path == IGA2) + vmode_index = viafb_get_mode_index(set_hres, set_vres, 1); + else + vmode_index = viafb_get_mode_index(set_hres, set_vres, 0); + + switch (panel_id) { + case LCD_PANEL_ID5_1400X1050: + switch (vmode_index) { + case VIA_RES_640X480: + reg_num = NUM_TOTAL_P880_LCD_RES_6X4_14X10; + lcd_patch_reg = P880_LCD_RES_6X4_14X10; + break; + case VIA_RES_800X600: + reg_num = NUM_TOTAL_P880_LCD_RES_8X6_14X10; + lcd_patch_reg = P880_LCD_RES_8X6_14X10; + break; + } + break; + case LCD_PANEL_ID6_1600X1200: + switch (vmode_index) { + case VIA_RES_640X400: + case VIA_RES_640X480: + reg_num = NUM_TOTAL_P880_LCD_RES_6X4_16X12; + lcd_patch_reg = P880_LCD_RES_6X4_16X12; + break; + case VIA_RES_720X480: + case VIA_RES_720X576: + reg_num = NUM_TOTAL_P880_LCD_RES_7X4_16X12; + lcd_patch_reg = P880_LCD_RES_7X4_16X12; + break; + case VIA_RES_800X600: + reg_num = NUM_TOTAL_P880_LCD_RES_8X6_16X12; + lcd_patch_reg = P880_LCD_RES_8X6_16X12; + break; + case VIA_RES_1024X768: + reg_num = NUM_TOTAL_P880_LCD_RES_10X7_16X12; + lcd_patch_reg = P880_LCD_RES_10X7_16X12; + break; + case VIA_RES_1280X768: + case VIA_RES_1280X960: + case VIA_RES_1280X1024: + reg_num = NUM_TOTAL_P880_LCD_RES_12X10_16X12; + lcd_patch_reg = P880_LCD_RES_12X10_16X12; + break; + } + break; + + } + if (reg_num != 0) { + /* H.W. Reset : ON */ + viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7); + + viafb_write_regx(lcd_patch_reg, reg_num); + + /* H.W. Reset : OFF */ + viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7); + + /* Reset PLL */ + viafb_write_reg_mask(SR40, VIASR, 0x02, BIT1); + viafb_write_reg_mask(SR40, VIASR, 0x00, BIT1); + + /* Fire! */ + outb(inb(VIARMisc) | (BIT2 + BIT3), VIAWMisc); + } +} + +static void load_lcd_patch_regs(int set_hres, int set_vres, + int panel_id, int set_iga) +{ + int vmode_index; + + if (viaparinfo->lvds_setting_info->iga_path == IGA2) + vmode_index = viafb_get_mode_index(set_hres, set_vres, 1); + else + vmode_index = viafb_get_mode_index(set_hres, set_vres, 0); + + viafb_unlock_crt(); + + /* Patch for simultaneous & Expansion */ + if ((set_iga == IGA1_IGA2) && + (viaparinfo->lvds_setting_info->display_method == + LCD_EXPANDSION)) { + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_CLE266: + case UNICHROME_K400: + load_lcd_k400_patch_tbl(set_hres, set_vres, panel_id); + break; + case UNICHROME_K800: + break; + case UNICHROME_PM800: + case UNICHROME_CN700: + case UNICHROME_CX700: + load_lcd_p880_patch_tbl(set_hres, set_vres, panel_id); + } + } + + viafb_lock_crt(); +} + +static void via_pitch_alignment_patch_lcd( + struct lvds_setting_information *plvds_setting_info, + struct lvds_chip_information + *plvds_chip_info) +{ + unsigned char cr13, cr35, cr65, cr66, cr67; + unsigned long dwScreenPitch = 0; + unsigned long dwPitch; + + dwPitch = plvds_setting_info->h_active * (plvds_setting_info->bpp >> 3); + if (dwPitch & 0x1F) { + dwScreenPitch = ((dwPitch + 31) & ~31) >> 3; + if (plvds_setting_info->iga_path == IGA2) { + if (plvds_setting_info->bpp > 8) { + cr66 = (unsigned char)(dwScreenPitch & 0xFF); + viafb_write_reg(CR66, VIACR, cr66); + cr67 = viafb_read_reg(VIACR, CR67) & 0xFC; + cr67 |= + (unsigned + char)((dwScreenPitch & 0x300) >> 8); + viafb_write_reg(CR67, VIACR, cr67); + } + + /* Fetch Count */ + cr67 = viafb_read_reg(VIACR, CR67) & 0xF3; + cr67 |= (unsigned char)((dwScreenPitch & 0x600) >> 7); + viafb_write_reg(CR67, VIACR, cr67); + cr65 = (unsigned char)((dwScreenPitch >> 1) & 0xFF); + cr65 += 2; + viafb_write_reg(CR65, VIACR, cr65); + } else { + if (plvds_setting_info->bpp > 8) { + cr13 = (unsigned char)(dwScreenPitch & 0xFF); + viafb_write_reg(CR13, VIACR, cr13); + cr35 = viafb_read_reg(VIACR, CR35) & 0x1F; + cr35 |= + (unsigned + char)((dwScreenPitch & 0x700) >> 3); + viafb_write_reg(CR35, VIACR, cr35); + } + } + } +} +static void lcd_patch_skew_dvp0(struct lvds_setting_information + *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info) +{ + if (VT1636_LVDS == plvds_chip_info->lvds_chip_name) { + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_P4M900: + viafb_vt1636_patch_skew_on_vt3364(plvds_setting_info, + plvds_chip_info); + break; + case UNICHROME_P4M890: + viafb_vt1636_patch_skew_on_vt3327(plvds_setting_info, + plvds_chip_info); + break; + } + } +} +static void lcd_patch_skew_dvp1(struct lvds_setting_information + *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info) +{ + if (VT1636_LVDS == plvds_chip_info->lvds_chip_name) { + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_CX700: + viafb_vt1636_patch_skew_on_vt3324(plvds_setting_info, + plvds_chip_info); + break; + } + } +} +static void lcd_patch_skew(struct lvds_setting_information + *plvds_setting_info, struct lvds_chip_information *plvds_chip_info) +{ + DEBUG_MSG(KERN_INFO "lcd_patch_skew\n"); + switch (plvds_chip_info->output_interface) { + case INTERFACE_DVP0: + lcd_patch_skew_dvp0(plvds_setting_info, plvds_chip_info); + break; + case INTERFACE_DVP1: + lcd_patch_skew_dvp1(plvds_setting_info, plvds_chip_info); + break; + case INTERFACE_DFP_LOW: + if (UNICHROME_P4M900 == viaparinfo->chip_info->gfx_chip_name) { + viafb_write_reg_mask(CR99, VIACR, 0x08, + BIT0 + BIT1 + BIT2 + BIT3); + } + break; + } +} + +/* LCD Set Mode */ +void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table, + struct lvds_setting_information *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info) +{ + int video_index = plvds_setting_info->lcd_panel_size; + int set_iga = plvds_setting_info->iga_path; + int mode_bpp = plvds_setting_info->bpp; + int viafb_load_reg_num = 0; + int reg_value = 0; + int set_hres, set_vres; + int panel_hres, panel_vres; + u32 pll_D_N; + int offset; + struct io_register *reg = NULL; + struct display_timing mode_crt_reg, panel_crt_reg; + struct crt_mode_table *panel_crt_table = NULL; + struct VideoModeTable *vmode_tbl = NULL; + + DEBUG_MSG(KERN_INFO "viafb_lcd_set_mode!!\n"); + /* Get mode table */ + mode_crt_reg = mode_crt_table->crtc; + /* Get panel table Pointer */ + vmode_tbl = viafb_get_modetbl_pointer(video_index); + panel_crt_table = vmode_tbl->crtc; + panel_crt_reg = panel_crt_table->crtc; + DEBUG_MSG(KERN_INFO "bellow viafb_lcd_set_mode!!\n"); + set_hres = plvds_setting_info->h_active; + set_vres = plvds_setting_info->v_active; + panel_hres = plvds_setting_info->lcd_panel_hres; + panel_vres = plvds_setting_info->lcd_panel_vres; + if (VT1636_LVDS == plvds_chip_info->lvds_chip_name) + viafb_init_lvds_vt1636(plvds_setting_info, plvds_chip_info); + plvds_setting_info->vclk = panel_crt_table->clk; + if (set_iga == IGA1) { + /* IGA1 doesn't have LCD scaling, so set it as centering. */ + viafb_load_crtc_timing(lcd_centering_timging + (mode_crt_reg, panel_crt_reg), IGA1); + } else { + /* Expansion */ + if ((plvds_setting_info->display_method == + LCD_EXPANDSION) & ((set_hres != panel_hres) + || (set_vres != panel_vres))) { + /* expansion timing IGA2 loaded panel set timing*/ + viafb_load_crtc_timing(panel_crt_reg, IGA2); + DEBUG_MSG(KERN_INFO "viafb_load_crtc_timing!!\n"); + load_lcd_scaling(set_hres, set_vres, panel_hres, + panel_vres); + DEBUG_MSG(KERN_INFO "load_lcd_scaling!!\n"); + } else { /* Centering */ + /* centering timing IGA2 always loaded panel + and mode releative timing */ + viafb_load_crtc_timing(lcd_centering_timging + (mode_crt_reg, panel_crt_reg), IGA2); + viafb_write_reg_mask(CR79, VIACR, 0x00, + BIT0 + BIT1 + BIT2); + /* LCD scaling disabled */ + } + } + + if (set_iga == IGA1_IGA2) { + load_crtc_shadow_timing(mode_crt_reg, panel_crt_reg); + /* Fill shadow registers */ + + switch (plvds_setting_info->lcd_panel_id) { + case LCD_PANEL_ID0_640X480: + offset = 80; + break; + case LCD_PANEL_ID1_800X600: + case LCD_PANEL_IDA_800X480: + offset = 110; + break; + case LCD_PANEL_ID2_1024X768: + offset = 150; + break; + case LCD_PANEL_ID3_1280X768: + case LCD_PANEL_ID4_1280X1024: + case LCD_PANEL_ID5_1400X1050: + case LCD_PANEL_ID9_1280X800: + offset = 190; + break; + case LCD_PANEL_ID6_1600X1200: + offset = 250; + break; + case LCD_PANEL_ID7_1366X768: + case LCD_PANEL_IDB_1360X768: + offset = 212; + break; + default: + offset = 140; + break; + } + + /* Offset for simultaneous */ + reg_value = offset; + viafb_load_reg_num = offset_reg.iga2_offset_reg.reg_num; + reg = offset_reg.iga2_offset_reg.reg; + viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIACR); + DEBUG_MSG(KERN_INFO "viafb_load_reg!!\n"); + viafb_load_fetch_count_reg(set_hres, 4, IGA2); + /* Fetch count for simultaneous */ + } else { /* SAMM */ + /* Offset for IGA2 only */ + viafb_load_offset_reg(set_hres, mode_bpp / 8, set_iga); + /* Fetch count for IGA2 only */ + viafb_load_fetch_count_reg(set_hres, mode_bpp / 8, set_iga); + + if ((viaparinfo->chip_info->gfx_chip_name != UNICHROME_CLE266) + && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400)) + viafb_load_FIFO_reg(set_iga, set_hres, set_vres); + + viafb_set_color_depth(mode_bpp / 8, set_iga); + } + + fill_lcd_format(); + + pll_D_N = viafb_get_clk_value(panel_crt_table[0].clk); + DEBUG_MSG(KERN_INFO "PLL=0x%x", pll_D_N); + viafb_set_vclock(pll_D_N, set_iga); + + viafb_set_output_path(DEVICE_LCD, set_iga, + plvds_chip_info->output_interface); + lcd_patch_skew(plvds_setting_info, plvds_chip_info); + + /* If K8M800, enable LCD Prefetch Mode. */ + if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_K800) + || (UNICHROME_K8M890 == viaparinfo->chip_info->gfx_chip_name)) + viafb_write_reg_mask(CR6A, VIACR, 0x01, BIT0); + + load_lcd_patch_regs(set_hres, set_vres, + plvds_setting_info->lcd_panel_id, set_iga); + + DEBUG_MSG(KERN_INFO "load_lcd_patch_regs!!\n"); + + /* Patch for non 32bit alignment mode */ + via_pitch_alignment_patch_lcd(plvds_setting_info, plvds_chip_info); +} + +static void integrated_lvds_disable(struct lvds_setting_information + *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info) +{ + bool turn_off_first_powersequence = false; + bool turn_off_second_powersequence = false; + if (INTERFACE_LVDS0LVDS1 == plvds_chip_info->output_interface) + turn_off_first_powersequence = true; + if (INTERFACE_LVDS0 == plvds_chip_info->output_interface) + turn_off_first_powersequence = true; + if (INTERFACE_LVDS1 == plvds_chip_info->output_interface) + turn_off_second_powersequence = true; + if (turn_off_second_powersequence) { + /* Use second power sequence control: */ + + /* Turn off power sequence. */ + viafb_write_reg_mask(CRD4, VIACR, 0, BIT1); + + /* Turn off back light. */ + viafb_write_reg_mask(CRD3, VIACR, 0xC0, BIT6 + BIT7); + } + if (turn_off_first_powersequence) { + /* Use first power sequence control: */ + + /* Turn off power sequence. */ + viafb_write_reg_mask(CR6A, VIACR, 0, BIT3); + + /* Turn off back light. */ + viafb_write_reg_mask(CR91, VIACR, 0xC0, BIT6 + BIT7); + } + + /* Turn DFP High/Low Pad off. */ + viafb_write_reg_mask(SR2A, VIASR, 0, BIT0 + BIT1 + BIT2 + BIT3); + + /* Power off LVDS channel. */ + switch (plvds_chip_info->output_interface) { + case INTERFACE_LVDS0: + { + viafb_write_reg_mask(CRD2, VIACR, 0x80, BIT7); + break; + } + + case INTERFACE_LVDS1: + { + viafb_write_reg_mask(CRD2, VIACR, 0x40, BIT6); + break; + } + + case INTERFACE_LVDS0LVDS1: + { + viafb_write_reg_mask(CRD2, VIACR, 0xC0, BIT6 + BIT7); + break; + } + } +} + +static void integrated_lvds_enable(struct lvds_setting_information + *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info) +{ + bool turn_on_first_powersequence = false; + bool turn_on_second_powersequence = false; + + DEBUG_MSG(KERN_INFO "integrated_lvds_enable, out_interface:%d\n", + plvds_chip_info->output_interface); + if (plvds_setting_info->lcd_mode == LCD_SPWG) + viafb_write_reg_mask(CRD2, VIACR, 0x00, BIT0 + BIT1); + else + viafb_write_reg_mask(CRD2, VIACR, 0x03, BIT0 + BIT1); + if (INTERFACE_LVDS0LVDS1 == plvds_chip_info->output_interface) + turn_on_first_powersequence = true; + if (INTERFACE_LVDS0 == plvds_chip_info->output_interface) + turn_on_first_powersequence = true; + if (INTERFACE_LVDS1 == plvds_chip_info->output_interface) + turn_on_second_powersequence = true; + + if (turn_on_second_powersequence) { + /* Use second power sequence control: */ + + /* Use hardware control power sequence. */ + viafb_write_reg_mask(CRD3, VIACR, 0, BIT0); + + /* Turn on back light. */ + viafb_write_reg_mask(CRD3, VIACR, 0, BIT6 + BIT7); + + /* Turn on hardware power sequence. */ + viafb_write_reg_mask(CRD4, VIACR, 0x02, BIT1); + } + if (turn_on_first_powersequence) { + /* Use first power sequence control: */ + + /* Use hardware control power sequence. */ + viafb_write_reg_mask(CR91, VIACR, 0, BIT0); + + /* Turn on back light. */ + viafb_write_reg_mask(CR91, VIACR, 0, BIT6 + BIT7); + + /* Turn on hardware power sequence. */ + viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3); + } + + /* Turn DFP High/Low pad on. */ + viafb_write_reg_mask(SR2A, VIASR, 0x0F, BIT0 + BIT1 + BIT2 + BIT3); + + /* Power on LVDS channel. */ + switch (plvds_chip_info->output_interface) { + case INTERFACE_LVDS0: + { + viafb_write_reg_mask(CRD2, VIACR, 0, BIT7); + break; + } + + case INTERFACE_LVDS1: + { + viafb_write_reg_mask(CRD2, VIACR, 0, BIT6); + break; + } + + case INTERFACE_LVDS0LVDS1: + { + viafb_write_reg_mask(CRD2, VIACR, 0, BIT6 + BIT7); + break; + } + } +} + +void viafb_lcd_disable(void) +{ + + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) { + lcd_powersequence_off(); + /* DI1 pad off */ + viafb_write_reg_mask(SR1E, VIASR, 0x00, 0x30); + } else if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) { + if (viafb_LCD2_ON + && (INTEGRATED_LVDS == + viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name)) + integrated_lvds_disable(viaparinfo->lvds_setting_info, + &viaparinfo->chip_info->lvds_chip_info2); + if (INTEGRATED_LVDS == + viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) + integrated_lvds_disable(viaparinfo->lvds_setting_info, + &viaparinfo->chip_info->lvds_chip_info); + if (VT1636_LVDS == viaparinfo->chip_info-> + lvds_chip_info.lvds_chip_name) + viafb_disable_lvds_vt1636(viaparinfo->lvds_setting_info, + &viaparinfo->chip_info->lvds_chip_info); + } else if (VT1636_LVDS == + viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) { + viafb_disable_lvds_vt1636(viaparinfo->lvds_setting_info, + &viaparinfo->chip_info->lvds_chip_info); + } else { + /* DFP-HL pad off */ + viafb_write_reg_mask(SR2A, VIASR, 0x00, 0x0F); + /* Backlight off */ + viafb_write_reg_mask(SR3D, VIASR, 0x00, 0x20); + /* 24 bit DI data paht off */ + viafb_write_reg_mask(CR91, VIACR, 0x80, 0x80); + /* Simultaneout disabled */ + viafb_write_reg_mask(CR6B, VIACR, 0x00, 0x08); + } + + /* Disable expansion bit */ + viafb_write_reg_mask(CR79, VIACR, 0x00, 0x01); + /* CRT path set to IGA1 */ + viafb_write_reg_mask(SR16, VIASR, 0x00, 0x40); + /* Simultaneout disabled */ + viafb_write_reg_mask(CR6B, VIACR, 0x00, 0x08); + /* IGA2 path disabled */ + viafb_write_reg_mask(CR6A, VIACR, 0x00, 0x80); + +} + +void viafb_lcd_enable(void) +{ + if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266) { + /* DI1 pad on */ + viafb_write_reg_mask(SR1E, VIASR, 0x30, 0x30); + lcd_powersequence_on(); + } else if (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CX700) { + if (viafb_LCD2_ON && (INTEGRATED_LVDS == + viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name)) + integrated_lvds_enable(viaparinfo->lvds_setting_info2, \ + &viaparinfo->chip_info->lvds_chip_info2); + if (INTEGRATED_LVDS == + viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) + integrated_lvds_enable(viaparinfo->lvds_setting_info, + &viaparinfo->chip_info->lvds_chip_info); + if (VT1636_LVDS == viaparinfo->chip_info-> + lvds_chip_info.lvds_chip_name) + viafb_enable_lvds_vt1636(viaparinfo-> + lvds_setting_info, &viaparinfo->chip_info-> + lvds_chip_info); + } else if (VT1636_LVDS == + viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) { + viafb_enable_lvds_vt1636(viaparinfo->lvds_setting_info, + &viaparinfo->chip_info->lvds_chip_info); + } else { + /* DFP-HL pad on */ + viafb_write_reg_mask(SR2A, VIASR, 0x0F, 0x0F); + /* Backlight on */ + viafb_write_reg_mask(SR3D, VIASR, 0x20, 0x20); + /* 24 bit DI data paht on */ + viafb_write_reg_mask(CR91, VIACR, 0x00, 0x80); + + /* Set data source selection bit by iga path */ + if (viaparinfo->lvds_setting_info->iga_path == IGA1) { + /* DFP-H set to IGA1 */ + viafb_write_reg_mask(CR97, VIACR, 0x00, 0x10); + /* DFP-L set to IGA1 */ + viafb_write_reg_mask(CR99, VIACR, 0x00, 0x10); + } else { + /* DFP-H set to IGA2 */ + viafb_write_reg_mask(CR97, VIACR, 0x10, 0x10); + /* DFP-L set to IGA2 */ + viafb_write_reg_mask(CR99, VIACR, 0x10, 0x10); + } + /* LCD enabled */ + viafb_write_reg_mask(CR6A, VIACR, 0x48, 0x48); + } + + if ((viaparinfo->lvds_setting_info->iga_path == IGA1) + || (viaparinfo->lvds_setting_info->iga_path == IGA1_IGA2)) { + /* CRT path set to IGA2 */ + viafb_write_reg_mask(SR16, VIASR, 0x40, 0x40); + /* IGA2 path disabled */ + viafb_write_reg_mask(CR6A, VIACR, 0x00, 0x80); + /* IGA2 path enabled */ + } else { /* IGA2 */ + viafb_write_reg_mask(CR6A, VIACR, 0x80, 0x80); + } + +} + +static void lcd_powersequence_off(void) +{ + int i, mask, data; + + /* Software control power sequence */ + viafb_write_reg_mask(CR91, VIACR, 0x11, 0x11); + + for (i = 0; i < 3; i++) { + mask = PowerSequenceOff[0][i]; + data = PowerSequenceOff[1][i] & mask; + viafb_write_reg_mask(CR91, VIACR, (u8) data, (u8) mask); + udelay(PowerSequenceOff[2][i]); + } + + /* Disable LCD */ + viafb_write_reg_mask(CR6A, VIACR, 0x00, 0x08); +} + +static void lcd_powersequence_on(void) +{ + int i, mask, data; + + /* Software control power sequence */ + viafb_write_reg_mask(CR91, VIACR, 0x11, 0x11); + + /* Enable LCD */ + viafb_write_reg_mask(CR6A, VIACR, 0x08, 0x08); + + for (i = 0; i < 3; i++) { + mask = PowerSequenceOn[0][i]; + data = PowerSequenceOn[1][i] & mask; + viafb_write_reg_mask(CR91, VIACR, (u8) data, (u8) mask); + udelay(PowerSequenceOn[2][i]); + } + + udelay(1); +} + +static void fill_lcd_format(void) +{ + u8 bdithering = 0, bdual = 0; + + if (viaparinfo->lvds_setting_info->device_lcd_dualedge) + bdual = BIT4; + if (viaparinfo->lvds_setting_info->LCDDithering) + bdithering = BIT0; + /* Dual & Dithering */ + viafb_write_reg_mask(CR88, VIACR, (bdithering | bdual), BIT4 + BIT0); +} + +static void check_diport_of_integrated_lvds( + struct lvds_chip_information *plvds_chip_info, + struct lvds_setting_information + *plvds_setting_info) +{ + /* Determine LCD DI Port by hardware layout. */ + switch (viafb_display_hardware_layout) { + case HW_LAYOUT_LCD_ONLY: + { + if (plvds_setting_info->device_lcd_dualedge) { + plvds_chip_info->output_interface = + INTERFACE_LVDS0LVDS1; + } else { + plvds_chip_info->output_interface = + INTERFACE_LVDS0; + } + + break; + } + + case HW_LAYOUT_DVI_ONLY: + { + plvds_chip_info->output_interface = INTERFACE_NONE; + break; + } + + case HW_LAYOUT_LCD1_LCD2: + case HW_LAYOUT_LCD_EXTERNAL_LCD2: + { + plvds_chip_info->output_interface = + INTERFACE_LVDS0LVDS1; + break; + } + + case HW_LAYOUT_LCD_DVI: + { + plvds_chip_info->output_interface = INTERFACE_LVDS1; + break; + } + + default: + { + plvds_chip_info->output_interface = INTERFACE_LVDS1; + break; + } + } + + DEBUG_MSG(KERN_INFO + "Display Hardware Layout: 0x%x, LCD DI Port: 0x%x\n", + viafb_display_hardware_layout, + plvds_chip_info->output_interface); +} + +void viafb_init_lvds_output_interface(struct lvds_chip_information + *plvds_chip_info, + struct lvds_setting_information + *plvds_setting_info) +{ + if (INTERFACE_NONE != plvds_chip_info->output_interface) { + /*Do nothing, lcd port is specified by module parameter */ + return; + } + + switch (plvds_chip_info->lvds_chip_name) { + + case VT1636_LVDS: + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_CX700: + plvds_chip_info->output_interface = INTERFACE_DVP1; + break; + case UNICHROME_CN700: + plvds_chip_info->output_interface = INTERFACE_DFP_LOW; + break; + default: + plvds_chip_info->output_interface = INTERFACE_DVP0; + break; + } + break; + + case INTEGRATED_LVDS: + check_diport_of_integrated_lvds(plvds_chip_info, + plvds_setting_info); + break; + + default: + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_K8M890: + case UNICHROME_P4M900: + case UNICHROME_P4M890: + plvds_chip_info->output_interface = INTERFACE_DFP_LOW; + break; + default: + plvds_chip_info->output_interface = INTERFACE_DFP; + break; + } + break; + } +} + +static struct display_timing lcd_centering_timging(struct display_timing + mode_crt_reg, + struct display_timing panel_crt_reg) +{ + struct display_timing crt_reg; + + crt_reg.hor_total = panel_crt_reg.hor_total; + crt_reg.hor_addr = mode_crt_reg.hor_addr; + crt_reg.hor_blank_start = + (panel_crt_reg.hor_addr - mode_crt_reg.hor_addr) / 2 + + crt_reg.hor_addr; + crt_reg.hor_blank_end = panel_crt_reg.hor_blank_end; + crt_reg.hor_sync_start = + (panel_crt_reg.hor_sync_start - + panel_crt_reg.hor_blank_start) + crt_reg.hor_blank_start; + crt_reg.hor_sync_end = panel_crt_reg.hor_sync_end; + + crt_reg.ver_total = panel_crt_reg.ver_total; + crt_reg.ver_addr = mode_crt_reg.ver_addr; + crt_reg.ver_blank_start = + (panel_crt_reg.ver_addr - mode_crt_reg.ver_addr) / 2 + + crt_reg.ver_addr; + crt_reg.ver_blank_end = panel_crt_reg.ver_blank_end; + crt_reg.ver_sync_start = + (panel_crt_reg.ver_sync_start - + panel_crt_reg.ver_blank_start) + crt_reg.ver_blank_start; + crt_reg.ver_sync_end = panel_crt_reg.ver_sync_end; + + return crt_reg; +} + +static void load_crtc_shadow_timing(struct display_timing mode_timing, + struct display_timing panel_timing) +{ + struct io_register *reg = NULL; + int i; + int viafb_load_reg_Num = 0; + int reg_value = 0; + + if (viaparinfo->lvds_setting_info->display_method == LCD_EXPANDSION) { + /* Expansion */ + for (i = 12; i < 20; i++) { + switch (i) { + case H_TOTAL_SHADOW_INDEX: + reg_value = + IGA2_HOR_TOTAL_SHADOW_FORMULA + (panel_timing.hor_total); + viafb_load_reg_Num = + iga2_shadow_crtc_reg.hor_total_shadow. + reg_num; + reg = iga2_shadow_crtc_reg.hor_total_shadow.reg; + break; + case H_BLANK_END_SHADOW_INDEX: + reg_value = + IGA2_HOR_BLANK_END_SHADOW_FORMULA + (panel_timing.hor_blank_start, + panel_timing.hor_blank_end); + viafb_load_reg_Num = + iga2_shadow_crtc_reg. + hor_blank_end_shadow.reg_num; + reg = + iga2_shadow_crtc_reg. + hor_blank_end_shadow.reg; + break; + case V_TOTAL_SHADOW_INDEX: + reg_value = + IGA2_VER_TOTAL_SHADOW_FORMULA + (panel_timing.ver_total); + viafb_load_reg_Num = + iga2_shadow_crtc_reg.ver_total_shadow. + reg_num; + reg = iga2_shadow_crtc_reg.ver_total_shadow.reg; + break; + case V_ADDR_SHADOW_INDEX: + reg_value = + IGA2_VER_ADDR_SHADOW_FORMULA + (panel_timing.ver_addr); + viafb_load_reg_Num = + iga2_shadow_crtc_reg.ver_addr_shadow. + reg_num; + reg = iga2_shadow_crtc_reg.ver_addr_shadow.reg; + break; + case V_BLANK_SATRT_SHADOW_INDEX: + reg_value = + IGA2_VER_BLANK_START_SHADOW_FORMULA + (panel_timing.ver_blank_start); + viafb_load_reg_Num = + iga2_shadow_crtc_reg. + ver_blank_start_shadow.reg_num; + reg = + iga2_shadow_crtc_reg. + ver_blank_start_shadow.reg; + break; + case V_BLANK_END_SHADOW_INDEX: + reg_value = + IGA2_VER_BLANK_END_SHADOW_FORMULA + (panel_timing.ver_blank_start, + panel_timing.ver_blank_end); + viafb_load_reg_Num = + iga2_shadow_crtc_reg. + ver_blank_end_shadow.reg_num; + reg = + iga2_shadow_crtc_reg. + ver_blank_end_shadow.reg; + break; + case V_SYNC_SATRT_SHADOW_INDEX: + reg_value = + IGA2_VER_SYNC_START_SHADOW_FORMULA + (panel_timing.ver_sync_start); + viafb_load_reg_Num = + iga2_shadow_crtc_reg. + ver_sync_start_shadow.reg_num; + reg = + iga2_shadow_crtc_reg. + ver_sync_start_shadow.reg; + break; + case V_SYNC_END_SHADOW_INDEX: + reg_value = + IGA2_VER_SYNC_END_SHADOW_FORMULA + (panel_timing.ver_sync_start, + panel_timing.ver_sync_end); + viafb_load_reg_Num = + iga2_shadow_crtc_reg. + ver_sync_end_shadow.reg_num; + reg = + iga2_shadow_crtc_reg. + ver_sync_end_shadow.reg; + break; + } + viafb_load_reg(reg_value, + viafb_load_reg_Num, reg, VIACR); + } + } else { /* Centering */ + for (i = 12; i < 20; i++) { + switch (i) { + case H_TOTAL_SHADOW_INDEX: + reg_value = + IGA2_HOR_TOTAL_SHADOW_FORMULA + (panel_timing.hor_total); + viafb_load_reg_Num = + iga2_shadow_crtc_reg.hor_total_shadow. + reg_num; + reg = iga2_shadow_crtc_reg.hor_total_shadow.reg; + break; + case H_BLANK_END_SHADOW_INDEX: + reg_value = + IGA2_HOR_BLANK_END_SHADOW_FORMULA + (panel_timing.hor_blank_start, + panel_timing.hor_blank_end); + viafb_load_reg_Num = + iga2_shadow_crtc_reg. + hor_blank_end_shadow.reg_num; + reg = + iga2_shadow_crtc_reg. + hor_blank_end_shadow.reg; + break; + case V_TOTAL_SHADOW_INDEX: + reg_value = + IGA2_VER_TOTAL_SHADOW_FORMULA + (panel_timing.ver_total); + viafb_load_reg_Num = + iga2_shadow_crtc_reg.ver_total_shadow. + reg_num; + reg = iga2_shadow_crtc_reg.ver_total_shadow.reg; + break; + case V_ADDR_SHADOW_INDEX: + reg_value = + IGA2_VER_ADDR_SHADOW_FORMULA + (mode_timing.ver_addr); + viafb_load_reg_Num = + iga2_shadow_crtc_reg.ver_addr_shadow. + reg_num; + reg = iga2_shadow_crtc_reg.ver_addr_shadow.reg; + break; + case V_BLANK_SATRT_SHADOW_INDEX: + reg_value = + IGA2_VER_BLANK_START_SHADOW_FORMULA + (mode_timing.ver_blank_start); + viafb_load_reg_Num = + iga2_shadow_crtc_reg. + ver_blank_start_shadow.reg_num; + reg = + iga2_shadow_crtc_reg. + ver_blank_start_shadow.reg; + break; + case V_BLANK_END_SHADOW_INDEX: + reg_value = + IGA2_VER_BLANK_END_SHADOW_FORMULA + (panel_timing.ver_blank_start, + panel_timing.ver_blank_end); + viafb_load_reg_Num = + iga2_shadow_crtc_reg. + ver_blank_end_shadow.reg_num; + reg = + iga2_shadow_crtc_reg. + ver_blank_end_shadow.reg; + break; + case V_SYNC_SATRT_SHADOW_INDEX: + reg_value = + IGA2_VER_SYNC_START_SHADOW_FORMULA( + (panel_timing.ver_sync_start - + panel_timing.ver_blank_start) + + (panel_timing.ver_addr - + mode_timing.ver_addr) / 2 + + mode_timing.ver_addr); + viafb_load_reg_Num = + iga2_shadow_crtc_reg.ver_sync_start_shadow. + reg_num; + reg = + iga2_shadow_crtc_reg.ver_sync_start_shadow. + reg; + break; + case V_SYNC_END_SHADOW_INDEX: + reg_value = + IGA2_VER_SYNC_END_SHADOW_FORMULA( + (panel_timing.ver_sync_start - + panel_timing.ver_blank_start) + + (panel_timing.ver_addr - + mode_timing.ver_addr) / 2 + + mode_timing.ver_addr, + panel_timing.ver_sync_end); + viafb_load_reg_Num = + iga2_shadow_crtc_reg.ver_sync_end_shadow. + reg_num; + reg = + iga2_shadow_crtc_reg.ver_sync_end_shadow. + reg; + break; + } + viafb_load_reg(reg_value, + viafb_load_reg_Num, reg, VIACR); + } + } +} + +bool viafb_lcd_get_mobile_state(bool *mobile) +{ + unsigned char *romptr, *tableptr; + u8 core_base; + unsigned char *biosptr; + /* Rom address */ + u32 romaddr = 0x000C0000; + u16 start_pattern = 0; + + biosptr = ioremap(romaddr, 0x10000); + + memcpy(&start_pattern, biosptr, 2); + /* Compare pattern */ + if (start_pattern == 0xAA55) { + /* Get the start of Table */ + /* 0x1B means BIOS offset position */ + romptr = biosptr + 0x1B; + tableptr = biosptr + *((u16 *) romptr); + + /* Get the start of biosver structure */ + /* 18 means BIOS version position. */ + romptr = tableptr + 18; + romptr = biosptr + *((u16 *) romptr); + + /* The offset should be 44, but the + actual image is less three char. */ + /* pRom += 44; */ + romptr += 41; + + core_base = *romptr++; + + if (core_base & 0x8) + *mobile = false; + else + *mobile = true; + /* release memory */ + iounmap(biosptr); + + return true; + } else { + iounmap(biosptr); + return false; + } +} + +static void viafb_load_scaling_factor_for_p4m900(int set_hres, + int set_vres, int panel_hres, int panel_vres) +{ + int h_scaling_factor; + int v_scaling_factor; + u8 cra2 = 0; + u8 cr77 = 0; + u8 cr78 = 0; + u8 cr79 = 0; + u8 cr9f = 0; + /* Check if expansion for horizontal */ + if (set_hres < panel_hres) { + /* Load Horizontal Scaling Factor */ + + /* For VIA_K8M800 or later chipsets. */ + h_scaling_factor = + K800_LCD_HOR_SCF_FORMULA(set_hres, panel_hres); + /* HSCaleFactor[1:0] at CR9F[1:0] */ + cr9f = h_scaling_factor & 0x0003; + /* HSCaleFactor[9:2] at CR77[7:0] */ + cr77 = (h_scaling_factor & 0x03FC) >> 2; + /* HSCaleFactor[11:10] at CR79[5:4] */ + cr79 = (h_scaling_factor & 0x0C00) >> 10; + cr79 <<= 4; + + /* Horizontal scaling enabled */ + cra2 = 0xC0; + + DEBUG_MSG(KERN_INFO "Horizontal Scaling value = %d\n", + h_scaling_factor); + } else { + /* Horizontal scaling disabled */ + cra2 = 0x00; + } + + /* Check if expansion for vertical */ + if (set_vres < panel_vres) { + /* Load Vertical Scaling Factor */ + + /* For VIA_K8M800 or later chipsets. */ + v_scaling_factor = + K800_LCD_VER_SCF_FORMULA(set_vres, panel_vres); + + /* Vertical scaling enabled */ + cra2 |= 0x08; + /* VSCaleFactor[0] at CR79[3] */ + cr79 |= ((v_scaling_factor & 0x0001) << 3); + /* VSCaleFactor[8:1] at CR78[7:0] */ + cr78 |= (v_scaling_factor & 0x01FE) >> 1; + /* VSCaleFactor[10:9] at CR79[7:6] */ + cr79 |= ((v_scaling_factor & 0x0600) >> 9) << 6; + + DEBUG_MSG(KERN_INFO "Vertical Scaling value = %d\n", + v_scaling_factor); + } else { + /* Vertical scaling disabled */ + cra2 |= 0x00; + } + + viafb_write_reg_mask(CRA2, VIACR, cra2, BIT3 + BIT6 + BIT7); + viafb_write_reg_mask(CR77, VIACR, cr77, 0xFF); + viafb_write_reg_mask(CR78, VIACR, cr78, 0xFF); + viafb_write_reg_mask(CR79, VIACR, cr79, 0xF8); + viafb_write_reg_mask(CR9F, VIACR, cr9f, BIT0 + BIT1); +} diff --git a/drivers/video/via/lcd.h b/drivers/video/via/lcd.h new file mode 100644 index 000000000000..071f47cf5be1 --- /dev/null +++ b/drivers/video/via/lcd.h @@ -0,0 +1,94 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ +#ifndef __LCD_H__ +#define __LCD_H__ + +/*Definition TMDS Device ID register*/ +#define VT1631_DEVICE_ID_REG 0x02 +#define VT1631_DEVICE_ID 0x92 + +#define VT3271_DEVICE_ID_REG 0x02 +#define VT3271_DEVICE_ID 0x71 + +#define GET_LCD_SIZE_BY_SYSTEM_BIOS 0x01 +#define GET_LCD_SIZE_BY_VGA_BIOS 0x02 +#define GET_LCD_SZIE_BY_HW_STRAPPING 0x03 +#define GET_LCD_SIZE_BY_USER_SETTING 0x04 + +/* Definition DVI Panel ID*/ +/* Resolution: 640x480, Channel: single, Dithering: Enable */ +#define LCD_PANEL_ID0_640X480 0x00 +/* Resolution: 800x600, Channel: single, Dithering: Enable */ +#define LCD_PANEL_ID1_800X600 0x01 +/* Resolution: 1024x768, Channel: single, Dithering: Enable */ +#define LCD_PANEL_ID2_1024X768 0x02 +/* Resolution: 1280x768, Channel: single, Dithering: Enable */ +#define LCD_PANEL_ID3_1280X768 0x03 +/* Resolution: 1280x1024, Channel: dual, Dithering: Enable */ +#define LCD_PANEL_ID4_1280X1024 0x04 +/* Resolution: 1400x1050, Channel: dual, Dithering: Enable */ +#define LCD_PANEL_ID5_1400X1050 0x05 +/* Resolution: 1600x1200, Channel: dual, Dithering: Enable */ +#define LCD_PANEL_ID6_1600X1200 0x06 +/* Resolution: 1366x768, Channel: single, Dithering: Disable */ +#define LCD_PANEL_ID7_1366X768 0x07 +/* Resolution: 1024x600, Channel: single, Dithering: Enable*/ +#define LCD_PANEL_ID8_1024X600 0x08 +/* Resolution: 1280x800, Channel: single, Dithering: Enable*/ +#define LCD_PANEL_ID9_1280X800 0x09 +/* Resolution: 800x480, Channel: single, Dithering: Enable*/ +#define LCD_PANEL_IDA_800X480 0x0A +/* Resolution: 1360x768, Channel: single, Dithering: Disable*/ +#define LCD_PANEL_IDB_1360X768 0x0B +/* Resolution: 480x640, Channel: single, Dithering: Enable */ +#define LCD_PANEL_IDC_480X640 0x0C + + +extern int viafb_LCD2_ON; +extern int viafb_LCD_ON; +extern int viafb_DVI_ON; + +void viafb_disable_lvds_vt1636(struct lvds_setting_information + *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info); +void viafb_enable_lvds_vt1636(struct lvds_setting_information + *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info); +void viafb_lcd_disable(void); +void viafb_lcd_enable(void); +void viafb_init_lcd_size(void); +void viafb_init_lvds_output_interface(struct lvds_chip_information + *plvds_chip_info, + struct lvds_setting_information + *plvds_setting_info); +void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table, + struct lvds_setting_information *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info); +int viafb_lvds_trasmitter_identify(void); +void viafb_init_lvds_output_interface(struct lvds_chip_information + *plvds_chip_info, + struct lvds_setting_information + *plvds_setting_info); +bool viafb_lcd_get_mobile_state(bool *mobile); +void viafb_load_crtc_timing(struct display_timing device_timing, + int set_iga); + +#endif /* __LCD_H__ */ diff --git a/drivers/video/via/lcdtbl.h b/drivers/video/via/lcdtbl.h new file mode 100644 index 000000000000..6f3dd800be59 --- /dev/null +++ b/drivers/video/via/lcdtbl.h @@ -0,0 +1,591 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ +#ifndef __LCDTBL_H__ +#define __LCDTBL_H__ + +#include "share.h" + +/* CLE266 Software Power Sequence */ +/* {Mask}, {Data}, {Delay} */ +int PowerSequenceOn[3][3] = + { {0x10, 0x08, 0x06}, {0x10, 0x08, 0x06}, {0x19, 0x1FE, 0x01} }; +int PowerSequenceOff[3][3] = + { {0x06, 0x08, 0x10}, {0x00, 0x00, 0x00}, {0xD2, 0x19, 0x01} }; + +/* ++++++ P880 ++++++ */ +/* Panel 1600x1200 */ +struct io_reg P880_LCD_RES_6X4_16X12[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x73}, {VIACR, CR55, 0x0F, 0x08}, + /*IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x73}, {VIACR, CR54, 0x38, 0x00}, + {VIACR, CR5D, 0x40, 0x40}, + /*IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0x5A}, {VIACR, CR71, 0x08, 0x00}, + /*IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0x5E}, + /*IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xD6}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR44, 0xFF, 0x7D}, {VIASR, SR45, 0xFF, 0x8C}, + {VIASR, SR46, 0xFF, 0x02} + +}; + +#define NUM_TOTAL_P880_LCD_RES_6X4_16X12 ARRAY_SIZE(P880_LCD_RES_6X4_16X12) + +struct io_reg P880_LCD_RES_7X4_16X12[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x67}, {VIACR, CR55, 0x0F, 0x08}, + /*IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x67}, {VIACR, CR54, 0x38, 0x00}, + {VIACR, CR5D, 0x40, 0x40}, + /*IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0x74}, {VIACR, CR71, 0x08, 0x00}, + /*IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0x78}, + /*IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xF5}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR44, 0xFF, 0x78}, {VIASR, SR45, 0xFF, 0x8C}, + {VIASR, SR46, 0xFF, 0x01} + +}; + +#define NUM_TOTAL_P880_LCD_RES_7X4_16X12 ARRAY_SIZE(P880_LCD_RES_7X4_16X12) + +struct io_reg P880_LCD_RES_8X6_16X12[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08}, + /*IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x65}, {VIACR, CR54, 0x38, 0x00}, + {VIACR, CR5D, 0x40, 0x40}, + /*IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x00}, + /*IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0x83}, + /*IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xE1}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR44, 0xFF, 0x6D}, {VIASR, SR45, 0xFF, 0x88}, + {VIASR, SR46, 0xFF, 0x03} + +}; + +#define NUM_TOTAL_P880_LCD_RES_8X6_16X12 ARRAY_SIZE(P880_LCD_RES_8X6_16X12) + +struct io_reg P880_LCD_RES_10X7_16X12[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08}, + /*IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x65}, {VIACR, CR54, 0x38, 0x00}, + {VIACR, CR5D, 0x40, 0x40}, + /*IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0xAB}, {VIACR, CR71, 0x08, 0x00}, + /*IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0xAF}, + /*IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xF0}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR44, 0xFF, 0x92}, {VIASR, SR45, 0xFF, 0x88}, + {VIASR, SR46, 0xFF, 0x03} + +}; + +#define NUM_TOTAL_P880_LCD_RES_10X7_16X12 ARRAY_SIZE(P880_LCD_RES_10X7_16X12) + +struct io_reg P880_LCD_RES_12X10_16X12[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x7D}, {VIACR, CR55, 0x0F, 0x08}, + /*IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x7D}, {VIACR, CR54, 0x38, 0x00}, + {VIACR, CR5D, 0x40, 0x40}, + /*IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0xD0}, {VIACR, CR71, 0x08, 0x00}, + /*IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0xD4}, + /*IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xFA}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR44, 0xFF, 0xF6}, {VIASR, SR45, 0xFF, 0x88}, + {VIASR, SR46, 0xFF, 0x05} + +}; + +#define NUM_TOTAL_P880_LCD_RES_12X10_16X12 ARRAY_SIZE(P880_LCD_RES_12X10_16X12) + +/* Panel 1400x1050 */ +struct io_reg P880_LCD_RES_6X4_14X10[] = { + /* 640x480 */ + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56}, + /* IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75}, + {VIACR, CR5D, 0x40, 0x24}, + /* IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0x5F}, {VIACR, CR71, 0x08, 0x44}, + /* IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0x63}, + /* IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xB4}, {VIACR, CR67, 0x03, 0x00}, + /* VCLK */ + {VIASR, SR44, 0xFF, 0xC6}, {VIASR, SR45, 0xFF, 0x8C}, + {VIASR, SR46, 0xFF, 0x05} +}; + +#define NUM_TOTAL_P880_LCD_RES_6X4_14X10 ARRAY_SIZE(P880_LCD_RES_6X4_14X10) + +struct io_reg P880_LCD_RES_8X6_14X10[] = { + /* 800x600 */ + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56}, + /* IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75}, + {VIACR, CR5D, 0x40, 0x24}, + /* IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x44}, + /* IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0x83}, + /* IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x00}, + /* VCLK */ + {VIASR, SR44, 0xFF, 0x06}, {VIASR, SR45, 0xFF, 0x8D}, + {VIASR, SR46, 0xFF, 0x05} +}; + +#define NUM_TOTAL_P880_LCD_RES_8X6_14X10 ARRAY_SIZE(P880_LCD_RES_8X6_14X10) + +/* ++++++ K400 ++++++ */ +/* Panel 1600x1200 */ +struct io_reg K400_LCD_RES_6X4_16X12[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x73}, {VIACR, CR55, 0x0F, 0x08}, + /*IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x73}, {VIACR, CR54, 0x38, 0x00}, + {VIACR, CR5D, 0x40, 0x40}, + /*IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0x5A}, {VIACR, CR71, 0x08, 0x00}, + /*IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0x5E}, + /*IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xDA}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0xC4}, {VIASR, SR47, 0xFF, 0x7F} +}; + +#define NUM_TOTAL_K400_LCD_RES_6X4_16X12 ARRAY_SIZE(K400_LCD_RES_6X4_16X12) + +struct io_reg K400_LCD_RES_7X4_16X12[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x67}, {VIACR, CR55, 0x0F, 0x08}, + /*IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x67}, {VIACR, CR54, 0x38, 0x00}, + {VIACR, CR5D, 0x40, 0x40}, + /*IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0x74}, {VIACR, CR71, 0x08, 0x00}, + /*IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0x78}, + /*IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xF5}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x46}, {VIASR, SR47, 0xFF, 0x3D} +}; + +#define NUM_TOTAL_K400_LCD_RES_7X4_16X12 ARRAY_SIZE(K400_LCD_RES_7X4_16X12) + +struct io_reg K400_LCD_RES_8X6_16X12[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08}, + /*IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x65}, {VIACR, CR54, 0x38, 0x00}, + {VIACR, CR5D, 0x40, 0x40}, + /*IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x00}, + /*IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0x83}, + /*IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xE1}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x85}, {VIASR, SR47, 0xFF, 0x6F} +}; + +#define NUM_TOTAL_K400_LCD_RES_8X6_16X12 ARRAY_SIZE(K400_LCD_RES_8X6_16X12) + +struct io_reg K400_LCD_RES_10X7_16X12[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x65}, {VIACR, CR55, 0x0F, 0x08}, + /*IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x65}, {VIACR, CR54, 0x38, 0x00}, + {VIACR, CR5D, 0x40, 0x40}, + /*IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0xAB}, {VIACR, CR71, 0x08, 0x00}, + /*IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0xAF}, + /*IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xF0}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x45}, {VIASR, SR47, 0xFF, 0x4A} +}; + +#define NUM_TOTAL_K400_LCD_RES_10X7_16X12 ARRAY_SIZE(K400_LCD_RES_10X7_16X12) + +struct io_reg K400_LCD_RES_12X10_16X12[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x7D}, {VIACR, CR55, 0x0F, 0x08}, + /*IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x7D}, {VIACR, CR54, 0x38, 0x00}, + {VIACR, CR5D, 0x40, 0x40}, + /*IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0xD0}, {VIACR, CR71, 0x08, 0x00}, + /*IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0xD4}, + /*IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xFA}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x47}, {VIASR, SR47, 0xFF, 0x7C} +}; + +#define NUM_TOTAL_K400_LCD_RES_12X10_16X12 ARRAY_SIZE(K400_LCD_RES_12X10_16X12) + +/* Panel 1400x1050 */ +struct io_reg K400_LCD_RES_6X4_14X10[] = { + /* 640x400 */ + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56}, + /* IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75}, + {VIACR, CR5D, 0x40, 0x24}, + /* IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0x5F}, {VIACR, CR71, 0x08, 0x44}, + /* IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0x63}, + /* IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xB4}, {VIACR, CR67, 0x03, 0x00}, + /* VCLK */ + {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x19} +}; + +#define NUM_TOTAL_K400_LCD_RES_6X4_14X10 ARRAY_SIZE(K400_LCD_RES_6X4_14X10) + +struct io_reg K400_LCD_RES_8X6_14X10[] = { + /* 800x600 */ + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56}, + /* IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75}, + {VIACR, CR5D, 0x40, 0x24}, + /* IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x44}, + /* IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0x83}, + /* IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x00}, + /* VCLK */ + {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x21} +}; + +#define NUM_TOTAL_K400_LCD_RES_8X6_14X10 ARRAY_SIZE(K400_LCD_RES_8X6_14X10) + +struct io_reg K400_LCD_RES_10X7_14X10[] = { + /* 1024x768 */ + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56}, + /* IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75}, + {VIACR, CR5D, 0x40, 0x24}, + /* IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0xA3}, {VIACR, CR71, 0x08, 0x44}, + /* IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0xA7}, + /* IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xC3}, {VIACR, CR67, 0x03, 0x04}, + /* VCLK */ + {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x1E} +}; + +#define NUM_TOTAL_K400_LCD_RES_10X7_14X10 ARRAY_SIZE(K400_LCD_RES_10X7_14X10) + +struct io_reg K400_LCD_RES_12X10_14X10[] = { + /* 1280x768, 1280x960, 1280x1024 */ + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x97}, {VIACR, CR55, 0x0F, 0x56}, + /* IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x97}, {VIACR, CR54, 0x38, 0x75}, + {VIACR, CR5D, 0x40, 0x24}, + /* IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0xCE}, {VIACR, CR71, 0x08, 0x44}, + /* IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0xD2}, + /* IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xC9}, {VIACR, CR67, 0x03, 0x04}, + /* VCLK */ + {VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0x79} +}; + +#define NUM_TOTAL_K400_LCD_RES_12X10_14X10 ARRAY_SIZE(K400_LCD_RES_12X10_14X10) + +/* ++++++ K400 ++++++ */ +/* Panel 1366x768 */ +struct io_reg K400_LCD_RES_6X4_1366X7[] = { + /* 640x400 */ + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x47}, {VIACR, CR55, 0x0F, 0x35}, + /* IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x47}, {VIACR, CR54, 0x38, 0x2B}, + {VIACR, CR5D, 0x40, 0x13}, + /* IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0x60}, {VIACR, CR71, 0x08, 0x23}, + /* IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0x64}, + /* IGA2 Offset */ + {VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00}, + /* VCLK */ + {VIASR, SR46, 0xFF, 0x87}, {VIASR, SR47, 0xFF, 0x4C} +}; + +#define NUM_TOTAL_K400_LCD_RES_6X4_1366X7 ARRAY_SIZE(K400_LCD_RES_6X4_1366X7) + +struct io_reg K400_LCD_RES_7X4_1366X7[] = { + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x3B}, {VIACR, CR55, 0x0F, 0x35}, + /* IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x3B}, {VIACR, CR54, 0x38, 0x2B}, + {VIACR, CR5D, 0x40, 0x13}, + /* IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0x71}, {VIACR, CR71, 0x08, 0x23}, + /* IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0x75}, + /* IGA2 Offset */ + {VIACR, CR66, 0xFF, 0x96}, {VIACR, CR67, 0x03, 0x00}, + /* VCLK */ + {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x10} +}; + +#define NUM_TOTAL_K400_LCD_RES_7X4_1366X7 ARRAY_SIZE(K400_LCD_RES_7X4_1366X7) + +struct io_reg K400_LCD_RES_8X6_1366X7[] = { + /* 800x600 */ + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x37}, {VIACR, CR55, 0x0F, 0x35}, + /* IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x37}, {VIACR, CR54, 0x38, 0x2B}, + {VIACR, CR5D, 0x40, 0x13}, + /* IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0x7E}, {VIACR, CR71, 0x08, 0x23}, + /* IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0x82}, + /* IGA2 Offset */ + {VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00}, + /* VCLK */ + {VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0xB9} +}; + +#define NUM_TOTAL_K400_LCD_RES_8X6_1366X7 ARRAY_SIZE(K400_LCD_RES_8X6_1366X7) + +struct io_reg K400_LCD_RES_10X7_1366X7[] = { + /* 1024x768 */ + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x56}, + /* IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x75}, + {VIACR, CR5D, 0x40, 0x24}, + /* IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0xA3}, {VIACR, CR71, 0x08, 0x44}, + /* IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0xA7}, + /* IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xC3}, {VIACR, CR67, 0x03, 0x04}, + /* VCLK */ + {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x1E} +}; + +#define NUM_TOTAL_K400_LCD_RES_10X7_1366X7 ARRAY_SIZE(K400_LCD_RES_10X7_1366X7) + +struct io_reg K400_LCD_RES_12X10_1366X7[] = { + /* 1280x768, 1280x960, 1280x1024 */ + /* IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x97}, {VIACR, CR55, 0x0F, 0x56}, + /* IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x97}, {VIACR, CR54, 0x38, 0x75}, + {VIACR, CR5D, 0x40, 0x24}, + /* IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0xCE}, {VIACR, CR71, 0x08, 0x44}, + /* IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0xD2}, + /* IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xC9}, {VIACR, CR67, 0x03, 0x04}, + /* VCLK */ + {VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0x79} +}; + +#define NUM_TOTAL_K400_LCD_RES_12X10_1366X7\ + ARRAY_SIZE(K400_LCD_RES_12X10_1366X7) + +/* ++++++ K400 ++++++ */ +/* Panel 1280x1024 */ +struct io_reg K400_LCD_RES_6X4_12X10[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46}, + /*IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x74}, + {VIACR, CR5D, 0x40, 0x1C}, + /*IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0x5F}, {VIACR, CR71, 0x08, 0x34}, + /*IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0x63}, + /*IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xAA}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x19} +}; + +#define NUM_TOTAL_K400_LCD_RES_6X4_12X10 ARRAY_SIZE(K400_LCD_RES_6X4_12X10) + +struct io_reg K400_LCD_RES_7X4_12X10[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46}, + /*IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x74}, + {VIACR, CR5D, 0x40, 0x1C}, + /*IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0x68}, {VIACR, CR71, 0x08, 0x34}, + /*IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0x6C}, + /*IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xA8}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x87}, {VIASR, SR47, 0xFF, 0xED} +}; + +#define NUM_TOTAL_K400_LCD_RES_7X4_12X10 ARRAY_SIZE(K400_LCD_RES_7X4_12X10) + +struct io_reg K400_LCD_RES_8X6_12X10[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46}, + /*IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x74}, + {VIACR, CR5D, 0x40, 0x1C}, + /*IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x34}, + /*IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0x83}, + /*IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x07}, {VIASR, SR47, 0xFF, 0x21} +}; + +#define NUM_TOTAL_K400_LCD_RES_8X6_12X10 ARRAY_SIZE(K400_LCD_RES_8X6_12X10) + +struct io_reg K400_LCD_RES_10X7_12X10[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x9D}, {VIACR, CR55, 0x0F, 0x46}, + /*IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x9D}, {VIACR, CR54, 0x38, 0x74}, + {VIACR, CR5D, 0x40, 0x1C}, + /*IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0xA3}, {VIACR, CR71, 0x08, 0x34}, + /*IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0xA7}, + /*IGA2 Offset */ + {VIACR, CR66, 0xFF, 0xBE}, {VIACR, CR67, 0x03, 0x04}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x1E} +}; + +#define NUM_TOTAL_K400_LCD_RES_10X7_12X10 ARRAY_SIZE(K400_LCD_RES_10X7_12X10) + +/* ++++++ K400 ++++++ */ +/* Panel 1024x768 */ +struct io_reg K400_LCD_RES_6X4_10X7[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x47}, {VIACR, CR55, 0x0F, 0x35}, + /*IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x47}, {VIACR, CR54, 0x38, 0x2B}, + {VIACR, CR5D, 0x40, 0x13}, + /*IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0x60}, {VIACR, CR71, 0x08, 0x23}, + /*IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0x64}, + /*IGA2 Offset */ + {VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x87}, {VIASR, SR47, 0xFF, 0x4C} +}; + +#define NUM_TOTAL_K400_LCD_RES_6X4_10X7 ARRAY_SIZE(K400_LCD_RES_6X4_10X7) + +struct io_reg K400_LCD_RES_7X4_10X7[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x3B}, {VIACR, CR55, 0x0F, 0x35}, + /*IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x3B}, {VIACR, CR54, 0x38, 0x2B}, + {VIACR, CR5D, 0x40, 0x13}, + /*IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0x71}, {VIACR, CR71, 0x08, 0x23}, + /*IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0x75}, + /*IGA2 Offset */ + {VIACR, CR66, 0xFF, 0x96}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x05}, {VIASR, SR47, 0xFF, 0x10} +}; + +#define NUM_TOTAL_K400_LCD_RES_7X4_10X7 ARRAY_SIZE(K400_LCD_RES_7X4_10X7) + +struct io_reg K400_LCD_RES_8X6_10X7[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x37}, {VIACR, CR55, 0x0F, 0x35}, + /*IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x37}, {VIACR, CR54, 0x38, 0x2B}, + {VIACR, CR5D, 0x40, 0x13}, + /*IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0x7E}, {VIACR, CR71, 0x08, 0x23}, + /*IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0x82}, + /*IGA2 Offset */ + {VIACR, CR66, 0xFF, 0x8C}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x84}, {VIASR, SR47, 0xFF, 0xB9} +}; + +#define NUM_TOTAL_K400_LCD_RES_8X6_10X7 ARRAY_SIZE(K400_LCD_RES_8X6_10X7) + +/* ++++++ K400 ++++++ */ +/* Panel 800x600 */ +struct io_reg K400_LCD_RES_6X4_8X6[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x1A}, {VIACR, CR55, 0x0F, 0x34}, + /*IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x1A}, {VIACR, CR54, 0x38, 0xE3}, + {VIACR, CR5D, 0x40, 0x12}, + /*IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0x5F}, {VIACR, CR71, 0x08, 0x22}, + /*IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0x63}, + /*IGA2 Offset */ + {VIACR, CR66, 0xFF, 0x6E}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0x86}, {VIASR, SR47, 0xFF, 0xB3} +}; + +#define NUM_TOTAL_K400_LCD_RES_6X4_8X6 ARRAY_SIZE(K400_LCD_RES_6X4_8X6) + +struct io_reg K400_LCD_RES_7X4_8X6[] = { + /*IGA2 Horizontal Total */ + {VIACR, CR50, 0xFF, 0x1F}, {VIACR, CR55, 0x0F, 0x34}, + /*IGA2 Horizontal Blank End */ + {VIACR, CR53, 0xFF, 0x1F}, {VIACR, CR54, 0x38, 0xE3}, + {VIACR, CR5D, 0x40, 0x12}, + /*IGA2 Horizontal Total Shadow */ + {VIACR, CR6D, 0xFF, 0x7F}, {VIACR, CR71, 0x08, 0x22}, + /*IGA2 Horizontal Blank End Shadow */ + {VIACR, CR6E, 0xFF, 0x83}, + /*IGA2 Offset */ + {VIACR, CR66, 0xFF, 0x78}, {VIACR, CR67, 0x03, 0x00}, + /*VCLK*/ {VIASR, SR46, 0xFF, 0xC4}, {VIASR, SR47, 0xFF, 0x59} +}; + +#define NUM_TOTAL_K400_LCD_RES_7X4_8X6 ARRAY_SIZE(K400_LCD_RES_7X4_8X6) + +#endif /* __LCDTBL_H__ */ diff --git a/drivers/video/via/share.h b/drivers/video/via/share.h new file mode 100644 index 000000000000..2e1254da9c8c --- /dev/null +++ b/drivers/video/via/share.h @@ -0,0 +1,1105 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef __SHARE_H__ +#define __SHARE_H__ + +/* Define Return Value */ +#define FAIL -1 +#define OK 1 + +#ifndef NULL +#define NULL 0 +#endif + +/* Define Bit Field */ +#define BIT0 0x01 +#define BIT1 0x02 +#define BIT2 0x04 +#define BIT3 0x08 +#define BIT4 0x10 +#define BIT5 0x20 +#define BIT6 0x40 +#define BIT7 0x80 + +/* Video Memory Size */ +#define VIDEO_MEMORY_SIZE_16M 0x1000000 + +/* Definition Mode Index +*/ +#define VIA_RES_640X480 0 +#define VIA_RES_800X600 1 +#define VIA_RES_1024X768 2 +#define VIA_RES_1152X864 3 +#define VIA_RES_1280X1024 4 +#define VIA_RES_1600X1200 5 +#define VIA_RES_1440X1050 6 +#define VIA_RES_1280X768 7 +#define VIA_RES_1280X960 8 +#define VIA_RES_1920X1440 9 +#define VIA_RES_848X480 10 +#define VIA_RES_1400X1050 11 +#define VIA_RES_720X480 12 +#define VIA_RES_720X576 13 +#define VIA_RES_1024X512 14 +#define VIA_RES_856X480 15 +#define VIA_RES_1024X576 16 +#define VIA_RES_640X400 17 +#define VIA_RES_1280X720 18 +#define VIA_RES_1920X1080 19 +#define VIA_RES_800X480 20 +#define VIA_RES_1368X768 21 +#define VIA_RES_1024X600 22 +#define VIA_RES_1280X800 23 +#define VIA_RES_1680X1050 24 +#define VIA_RES_960X600 25 +#define VIA_RES_1000X600 26 +#define VIA_RES_1088X612 27 +#define VIA_RES_1152X720 28 +#define VIA_RES_1200X720 29 +#define VIA_RES_1280X600 30 +#define VIA_RES_1360X768 31 +#define VIA_RES_1366X768 32 +#define VIA_RES_1440X900 33 +#define VIA_RES_1600X900 34 +#define VIA_RES_1600X1024 35 +#define VIA_RES_1792X1344 36 +#define VIA_RES_1856X1392 37 +#define VIA_RES_1920X1200 38 +#define VIA_RES_2048X1536 39 +#define VIA_RES_480X640 40 + +/*Reduce Blanking*/ +#define VIA_RES_1360X768_RB 131 +#define VIA_RES_1440X900_RB 133 +#define VIA_RES_1400X1050_RB 111 +#define VIA_RES_1600X900_RB 134 +#define VIA_RES_1680X1050_RB 124 +#define VIA_RES_1920X1080_RB 119 +#define VIA_RES_1920X1200_RB 138 + +#define VIA_RES_INVALID 255 + +/* standard VGA IO port +*/ +#define VIARMisc 0x3CC +#define VIAWMisc 0x3C2 +#define VIAStatus 0x3DA +#define VIACR 0x3D4 +#define VIASR 0x3C4 +#define VIAGR 0x3CE +#define VIAAR 0x3C0 + +#define StdCR 0x19 +#define StdSR 0x04 +#define StdGR 0x09 +#define StdAR 0x14 + +#define PatchCR 11 + +/* Display path */ +#define IGA1 1 +#define IGA2 2 +#define IGA1_IGA2 3 + +/* Define Color Depth */ +#define MODE_8BPP 1 +#define MODE_16BPP 2 +#define MODE_32BPP 4 + +#define GR20 0x20 +#define GR21 0x21 +#define GR22 0x22 + +/* Sequencer Registers */ +#define SR01 0x01 +#define SR10 0x10 +#define SR12 0x12 +#define SR15 0x15 +#define SR16 0x16 +#define SR17 0x17 +#define SR18 0x18 +#define SR1B 0x1B +#define SR1A 0x1A +#define SR1C 0x1C +#define SR1D 0x1D +#define SR1E 0x1E +#define SR1F 0x1F +#define SR20 0x20 +#define SR21 0x21 +#define SR22 0x22 +#define SR2A 0x2A +#define SR2D 0x2D +#define SR2E 0x2E + +#define SR30 0x30 +#define SR39 0x39 +#define SR3D 0x3D +#define SR3E 0x3E +#define SR3F 0x3F +#define SR40 0x40 +#define SR43 0x43 +#define SR44 0x44 +#define SR45 0x45 +#define SR46 0x46 +#define SR47 0x47 +#define SR48 0x48 +#define SR49 0x49 +#define SR4A 0x4A +#define SR4B 0x4B +#define SR4C 0x4C +#define SR52 0x52 +#define SR5E 0x5E +#define SR65 0x65 + +/* CRT Controller Registers */ +#define CR00 0x00 +#define CR01 0x01 +#define CR02 0x02 +#define CR03 0x03 +#define CR04 0x04 +#define CR05 0x05 +#define CR06 0x06 +#define CR07 0x07 +#define CR08 0x08 +#define CR09 0x09 +#define CR0A 0x0A +#define CR0B 0x0B +#define CR0C 0x0C +#define CR0D 0x0D +#define CR0E 0x0E +#define CR0F 0x0F +#define CR10 0x10 +#define CR11 0x11 +#define CR12 0x12 +#define CR13 0x13 +#define CR14 0x14 +#define CR15 0x15 +#define CR16 0x16 +#define CR17 0x17 +#define CR18 0x18 + +/* Extend CRT Controller Registers */ +#define CR30 0x30 +#define CR31 0x31 +#define CR32 0x32 +#define CR33 0x33 +#define CR34 0x34 +#define CR35 0x35 +#define CR36 0x36 +#define CR37 0x37 +#define CR38 0x38 +#define CR39 0x39 +#define CR3A 0x3A +#define CR3B 0x3B +#define CR3C 0x3C +#define CR3D 0x3D +#define CR3E 0x3E +#define CR3F 0x3F +#define CR40 0x40 +#define CR41 0x41 +#define CR42 0x42 +#define CR43 0x43 +#define CR44 0x44 +#define CR45 0x45 +#define CR46 0x46 +#define CR47 0x47 +#define CR48 0x48 +#define CR49 0x49 +#define CR4A 0x4A +#define CR4B 0x4B +#define CR4C 0x4C +#define CR4D 0x4D +#define CR4E 0x4E +#define CR4F 0x4F +#define CR50 0x50 +#define CR51 0x51 +#define CR52 0x52 +#define CR53 0x53 +#define CR54 0x54 +#define CR55 0x55 +#define CR56 0x56 +#define CR57 0x57 +#define CR58 0x58 +#define CR59 0x59 +#define CR5A 0x5A +#define CR5B 0x5B +#define CR5C 0x5C +#define CR5D 0x5D +#define CR5E 0x5E +#define CR5F 0x5F +#define CR60 0x60 +#define CR61 0x61 +#define CR62 0x62 +#define CR63 0x63 +#define CR64 0x64 +#define CR65 0x65 +#define CR66 0x66 +#define CR67 0x67 +#define CR68 0x68 +#define CR69 0x69 +#define CR6A 0x6A +#define CR6B 0x6B +#define CR6C 0x6C +#define CR6D 0x6D +#define CR6E 0x6E +#define CR6F 0x6F +#define CR70 0x70 +#define CR71 0x71 +#define CR72 0x72 +#define CR73 0x73 +#define CR74 0x74 +#define CR75 0x75 +#define CR76 0x76 +#define CR77 0x77 +#define CR78 0x78 +#define CR79 0x79 +#define CR7A 0x7A +#define CR7B 0x7B +#define CR7C 0x7C +#define CR7D 0x7D +#define CR7E 0x7E +#define CR7F 0x7F +#define CR80 0x80 +#define CR81 0x81 +#define CR82 0x82 +#define CR83 0x83 +#define CR84 0x84 +#define CR85 0x85 +#define CR86 0x86 +#define CR87 0x87 +#define CR88 0x88 +#define CR89 0x89 +#define CR8A 0x8A +#define CR8B 0x8B +#define CR8C 0x8C +#define CR8D 0x8D +#define CR8E 0x8E +#define CR8F 0x8F +#define CR90 0x90 +#define CR91 0x91 +#define CR92 0x92 +#define CR93 0x93 +#define CR94 0x94 +#define CR95 0x95 +#define CR96 0x96 +#define CR97 0x97 +#define CR98 0x98 +#define CR99 0x99 +#define CR9A 0x9A +#define CR9B 0x9B +#define CR9C 0x9C +#define CR9D 0x9D +#define CR9E 0x9E +#define CR9F 0x9F +#define CRA0 0xA0 +#define CRA1 0xA1 +#define CRA2 0xA2 +#define CRA3 0xA3 +#define CRD2 0xD2 +#define CRD3 0xD3 +#define CRD4 0xD4 + +/* LUT Table*/ +#define LUT_DATA 0x3C9 /* DACDATA */ +#define LUT_INDEX_READ 0x3C7 /* DACRX */ +#define LUT_INDEX_WRITE 0x3C8 /* DACWX */ +#define DACMASK 0x3C6 + +/* Definition Device */ +#define DEVICE_CRT 0x01 +#define DEVICE_DVI 0x03 +#define DEVICE_LCD 0x04 + +/* Device output interface */ +#define INTERFACE_NONE 0x00 +#define INTERFACE_ANALOG_RGB 0x01 +#define INTERFACE_DVP0 0x02 +#define INTERFACE_DVP1 0x03 +#define INTERFACE_DFP_HIGH 0x04 +#define INTERFACE_DFP_LOW 0x05 +#define INTERFACE_DFP 0x06 +#define INTERFACE_LVDS0 0x07 +#define INTERFACE_LVDS1 0x08 +#define INTERFACE_LVDS0LVDS1 0x09 +#define INTERFACE_TMDS 0x0A + +#define HW_LAYOUT_LCD_ONLY 0x01 +#define HW_LAYOUT_DVI_ONLY 0x02 +#define HW_LAYOUT_LCD_DVI 0x03 +#define HW_LAYOUT_LCD1_LCD2 0x04 +#define HW_LAYOUT_LCD_EXTERNAL_LCD2 0x10 + +/* Definition Refresh Rate */ +#define REFRESH_50 50 +#define REFRESH_60 60 +#define REFRESH_75 75 +#define REFRESH_85 85 +#define REFRESH_100 100 +#define REFRESH_120 120 + +/* Definition Sync Polarity*/ +#define NEGATIVE 1 +#define POSITIVE 0 + +/*480x640@60 Sync Polarity (GTF) +*/ +#define M480X640_R60_HSP NEGATIVE +#define M480X640_R60_VSP POSITIVE + +/*640x480@60 Sync Polarity (VESA Mode) +*/ +#define M640X480_R60_HSP NEGATIVE +#define M640X480_R60_VSP NEGATIVE + +/*640x480@75 Sync Polarity (VESA Mode) +*/ +#define M640X480_R75_HSP NEGATIVE +#define M640X480_R75_VSP NEGATIVE + +/*640x480@85 Sync Polarity (VESA Mode) +*/ +#define M640X480_R85_HSP NEGATIVE +#define M640X480_R85_VSP NEGATIVE + +/*640x480@100 Sync Polarity (GTF Mode) +*/ +#define M640X480_R100_HSP NEGATIVE +#define M640X480_R100_VSP POSITIVE + +/*640x480@120 Sync Polarity (GTF Mode) +*/ +#define M640X480_R120_HSP NEGATIVE +#define M640X480_R120_VSP POSITIVE + +/*720x480@60 Sync Polarity (GTF Mode) +*/ +#define M720X480_R60_HSP NEGATIVE +#define M720X480_R60_VSP POSITIVE + +/*720x576@60 Sync Polarity (GTF Mode) +*/ +#define M720X576_R60_HSP NEGATIVE +#define M720X576_R60_VSP POSITIVE + +/*800x600@60 Sync Polarity (VESA Mode) +*/ +#define M800X600_R60_HSP POSITIVE +#define M800X600_R60_VSP POSITIVE + +/*800x600@75 Sync Polarity (VESA Mode) +*/ +#define M800X600_R75_HSP POSITIVE +#define M800X600_R75_VSP POSITIVE + +/*800x600@85 Sync Polarity (VESA Mode) +*/ +#define M800X600_R85_HSP POSITIVE +#define M800X600_R85_VSP POSITIVE + +/*800x600@100 Sync Polarity (GTF Mode) +*/ +#define M800X600_R100_HSP NEGATIVE +#define M800X600_R100_VSP POSITIVE + +/*800x600@120 Sync Polarity (GTF Mode) +*/ +#define M800X600_R120_HSP NEGATIVE +#define M800X600_R120_VSP POSITIVE + +/*800x480@60 Sync Polarity (CVT Mode) +*/ +#define M800X480_R60_HSP NEGATIVE +#define M800X480_R60_VSP POSITIVE + +/*848x480@60 Sync Polarity (CVT Mode) +*/ +#define M848X480_R60_HSP NEGATIVE +#define M848X480_R60_VSP POSITIVE + +/*852x480@60 Sync Polarity (GTF Mode) +*/ +#define M852X480_R60_HSP NEGATIVE +#define M852X480_R60_VSP POSITIVE + +/*1024x512@60 Sync Polarity (GTF Mode) +*/ +#define M1024X512_R60_HSP NEGATIVE +#define M1024X512_R60_VSP POSITIVE + +/*1024x600@60 Sync Polarity (GTF Mode) +*/ +#define M1024X600_R60_HSP NEGATIVE +#define M1024X600_R60_VSP POSITIVE + +/*1024x768@60 Sync Polarity (VESA Mode) +*/ +#define M1024X768_R60_HSP NEGATIVE +#define M1024X768_R60_VSP NEGATIVE + +/*1024x768@75 Sync Polarity (VESA Mode) +*/ +#define M1024X768_R75_HSP POSITIVE +#define M1024X768_R75_VSP POSITIVE + +/*1024x768@85 Sync Polarity (VESA Mode) +*/ +#define M1024X768_R85_HSP POSITIVE +#define M1024X768_R85_VSP POSITIVE + +/*1024x768@100 Sync Polarity (GTF Mode) +*/ +#define M1024X768_R100_HSP NEGATIVE +#define M1024X768_R100_VSP POSITIVE + +/*1152x864@75 Sync Polarity (VESA Mode) +*/ +#define M1152X864_R75_HSP POSITIVE +#define M1152X864_R75_VSP POSITIVE + +/*1280x720@60 Sync Polarity (GTF Mode) +*/ +#define M1280X720_R60_HSP NEGATIVE +#define M1280X720_R60_VSP POSITIVE + +/* 1280x768@50 Sync Polarity (GTF Mode) */ +#define M1280X768_R50_HSP NEGATIVE +#define M1280X768_R50_VSP POSITIVE + +/*1280x768@60 Sync Polarity (GTF Mode) +*/ +#define M1280X768_R60_HSP NEGATIVE +#define M1280X768_R60_VSP POSITIVE + +/*1280x800@60 Sync Polarity (CVT Mode) +*/ +#define M1280X800_R60_HSP NEGATIVE +#define M1280X800_R60_VSP POSITIVE + +/*1280x960@60 Sync Polarity (VESA Mode) +*/ +#define M1280X960_R60_HSP POSITIVE +#define M1280X960_R60_VSP POSITIVE + +/*1280x1024@60 Sync Polarity (VESA Mode) +*/ +#define M1280X1024_R60_HSP POSITIVE +#define M1280X1024_R60_VSP POSITIVE + +/* 1360x768@60 Sync Polarity (CVT Mode) */ +#define M1360X768_R60_HSP POSITIVE +#define M1360X768_R60_VSP POSITIVE + +/* 1360x768@60 Sync Polarity (CVT Reduce Blanking Mode) */ +#define M1360X768_RB_R60_HSP POSITIVE +#define M1360X768_RB_R60_VSP NEGATIVE + +/* 1368x768@50 Sync Polarity (GTF Mode) */ +#define M1368X768_R50_HSP NEGATIVE +#define M1368X768_R50_VSP POSITIVE + +/* 1368x768@60 Sync Polarity (VESA Mode) */ +#define M1368X768_R60_HSP NEGATIVE +#define M1368X768_R60_VSP POSITIVE + +/*1280x1024@75 Sync Polarity (VESA Mode) +*/ +#define M1280X1024_R75_HSP POSITIVE +#define M1280X1024_R75_VSP POSITIVE + +/*1280x1024@85 Sync Polarity (VESA Mode) +*/ +#define M1280X1024_R85_HSP POSITIVE +#define M1280X1024_R85_VSP POSITIVE + +/*1440x1050@60 Sync Polarity (GTF Mode) +*/ +#define M1440X1050_R60_HSP NEGATIVE +#define M1440X1050_R60_VSP POSITIVE + +/*1600x1200@60 Sync Polarity (VESA Mode) +*/ +#define M1600X1200_R60_HSP POSITIVE +#define M1600X1200_R60_VSP POSITIVE + +/*1600x1200@75 Sync Polarity (VESA Mode) +*/ +#define M1600X1200_R75_HSP POSITIVE +#define M1600X1200_R75_VSP POSITIVE + +/* 1680x1050@60 Sync Polarity (CVT Mode) */ +#define M1680x1050_R60_HSP NEGATIVE +#define M1680x1050_R60_VSP NEGATIVE + +/* 1680x1050@60 Sync Polarity (CVT Reduce Blanking Mode) */ +#define M1680x1050_RB_R60_HSP POSITIVE +#define M1680x1050_RB_R60_VSP NEGATIVE + +/* 1680x1050@75 Sync Polarity (CVT Mode) */ +#define M1680x1050_R75_HSP NEGATIVE +#define M1680x1050_R75_VSP POSITIVE + +/*1920x1080@60 Sync Polarity (CVT Mode) +*/ +#define M1920X1080_R60_HSP NEGATIVE +#define M1920X1080_R60_VSP POSITIVE + +/* 1920x1080@60 Sync Polarity (CVT Reduce Blanking Mode) */ +#define M1920X1080_RB_R60_HSP POSITIVE +#define M1920X1080_RB_R60_VSP NEGATIVE + +/*1920x1440@60 Sync Polarity (VESA Mode) +*/ +#define M1920X1440_R60_HSP NEGATIVE +#define M1920X1440_R60_VSP POSITIVE + +/*1920x1440@75 Sync Polarity (VESA Mode) +*/ +#define M1920X1440_R75_HSP NEGATIVE +#define M1920X1440_R75_VSP POSITIVE + +#if 0 +/* 1400x1050@60 Sync Polarity (VESA Mode) */ +#define M1400X1050_R60_HSP NEGATIVE +#define M1400X1050_R60_VSP NEGATIVE +#endif + +/* 1400x1050@60 Sync Polarity (CVT Mode) */ +#define M1400X1050_R60_HSP NEGATIVE +#define M1400X1050_R60_VSP POSITIVE + +/* 1400x1050@60 Sync Polarity (CVT Reduce Blanking Mode) */ +#define M1400X1050_RB_R60_HSP POSITIVE +#define M1400X1050_RB_R60_VSP NEGATIVE + +/* 1400x1050@75 Sync Polarity (CVT Mode) */ +#define M1400X1050_R75_HSP NEGATIVE +#define M1400X1050_R75_VSP POSITIVE + +/* 960x600@60 Sync Polarity (CVT Mode) */ +#define M960X600_R60_HSP NEGATIVE +#define M960X600_R60_VSP POSITIVE + +/* 1000x600@60 Sync Polarity (GTF Mode) */ +#define M1000X600_R60_HSP NEGATIVE +#define M1000X600_R60_VSP POSITIVE + +/* 1024x576@60 Sync Polarity (GTF Mode) */ +#define M1024X576_R60_HSP NEGATIVE +#define M1024X576_R60_VSP POSITIVE + +/*1024x600@60 Sync Polarity (GTF Mode)*/ +#define M1024X600_R60_HSP NEGATIVE +#define M1024X600_R60_VSP POSITIVE + +/* 1088x612@60 Sync Polarity (CVT Mode) */ +#define M1088X612_R60_HSP NEGATIVE +#define M1088X612_R60_VSP POSITIVE + +/* 1152x720@60 Sync Polarity (CVT Mode) */ +#define M1152X720_R60_HSP NEGATIVE +#define M1152X720_R60_VSP POSITIVE + +/* 1200x720@60 Sync Polarity (GTF Mode) */ +#define M1200X720_R60_HSP NEGATIVE +#define M1200X720_R60_VSP POSITIVE + +/* 1280x600@60 Sync Polarity (GTF Mode) */ +#define M1280x600_R60_HSP NEGATIVE +#define M1280x600_R60_VSP POSITIVE + +/* 1280x720@50 Sync Polarity (GTF Mode) */ +#define M1280X720_R50_HSP NEGATIVE +#define M1280X720_R50_VSP POSITIVE + +/* 1280x720@60 Sync Polarity (CEA Mode) */ +#define M1280X720_CEA_R60_HSP POSITIVE +#define M1280X720_CEA_R60_VSP POSITIVE + +/* 1440x900@60 Sync Polarity (CVT Mode) */ +#define M1440X900_R60_HSP NEGATIVE +#define M1440X900_R60_VSP POSITIVE + +/* 1440x900@75 Sync Polarity (CVT Mode) */ +#define M1440X900_R75_HSP NEGATIVE +#define M1440X900_R75_VSP POSITIVE + +/* 1440x900@60 Sync Polarity (CVT Reduce Blanking Mode) */ +#define M1440X900_RB_R60_HSP POSITIVE +#define M1440X900_RB_R60_VSP NEGATIVE + +/* 1600x900@60 Sync Polarity (CVT Mode) */ +#define M1600X900_R60_HSP NEGATIVE +#define M1600X900_R60_VSP POSITIVE + +/* 1600x900@60 Sync Polarity (CVT Reduce Blanking Mode) */ +#define M1600X900_RB_R60_HSP POSITIVE +#define M1600X900_RB_R60_VSP NEGATIVE + +/* 1600x1024@60 Sync Polarity (GTF Mode) */ +#define M1600X1024_R60_HSP NEGATIVE +#define M1600X1024_R60_VSP POSITIVE + +/* 1792x1344@60 Sync Polarity (DMT Mode) */ +#define M1792x1344_R60_HSP NEGATIVE +#define M1792x1344_R60_VSP POSITIVE + +/* 1856x1392@60 Sync Polarity (DMT Mode) */ +#define M1856x1392_R60_HSP NEGATIVE +#define M1856x1392_R60_VSP POSITIVE + +/* 1920x1200@60 Sync Polarity (CVT Mode) */ +#define M1920X1200_R60_HSP NEGATIVE +#define M1920X1200_R60_VSP POSITIVE + +/* 1920x1200@60 Sync Polarity (CVT Reduce Blanking Mode) */ +#define M1920X1200_RB_R60_HSP POSITIVE +#define M1920X1200_RB_R60_VSP NEGATIVE + +/* 1920x1080@60 Sync Polarity (CEA Mode) */ +#define M1920X1080_CEA_R60_HSP POSITIVE +#define M1920X1080_CEA_R60_VSP POSITIVE + +/* 2048x1536@60 Sync Polarity (CVT Mode) */ +#define M2048x1536_R60_HSP NEGATIVE +#define M2048x1536_R60_VSP POSITIVE + +/* define PLL index: */ +#define CLK_25_175M 25175000 +#define CLK_26_880M 26880000 +#define CLK_29_581M 29581000 +#define CLK_31_490M 31490000 +#define CLK_31_500M 31500000 +#define CLK_31_728M 31728000 +#define CLK_32_668M 32688000 +#define CLK_36_000M 36000000 +#define CLK_40_000M 40000000 +#define CLK_41_291M 41291000 +#define CLK_43_163M 43163000 +#define CLK_45_250M 45250000 /* 45.46MHz */ +#define CLK_46_000M 46000000 +#define CLK_46_996M 46996000 +#define CLK_48_000M 48000000 +#define CLK_48_875M 48875000 +#define CLK_49_500M 49500000 +#define CLK_52_406M 52406000 +#define CLK_52_977M 52977000 +#define CLK_56_250M 56250000 +#define CLK_60_466M 60466000 +#define CLK_61_500M 61500000 +#define CLK_65_000M 65000000 +#define CLK_65_178M 65178000 +#define CLK_66_750M 66750000 /* 67.116MHz */ +#define CLK_68_179M 68179000 +#define CLK_69_924M 69924000 +#define CLK_70_159M 70159000 +#define CLK_72_000M 72000000 +#define CLK_74_270M 74270000 +#define CLK_78_750M 78750000 +#define CLK_80_136M 80136000 +#define CLK_83_375M 83375000 +#define CLK_83_950M 83950000 +#define CLK_84_750M 84750000 /* 84.537Mhz */ +#define CLK_85_860M 85860000 +#define CLK_88_750M 88750000 +#define CLK_94_500M 94500000 +#define CLK_97_750M 97750000 +#define CLK_101_000M 101000000 +#define CLK_106_500M 106500000 +#define CLK_108_000M 108000000 +#define CLK_113_309M 113309000 +#define CLK_118_840M 118840000 +#define CLK_119_000M 119000000 +#define CLK_121_750M 121750000 /* 121.704MHz */ +#define CLK_125_104M 125104000 +#define CLK_133_308M 133308000 +#define CLK_135_000M 135000000 +#define CLK_136_700M 136700000 +#define CLK_138_400M 138400000 +#define CLK_146_760M 146760000 +#define CLK_148_500M 148500000 + +#define CLK_153_920M 153920000 +#define CLK_156_000M 156000000 +#define CLK_157_500M 157500000 +#define CLK_162_000M 162000000 +#define CLK_187_000M 187000000 +#define CLK_193_295M 193295000 +#define CLK_202_500M 202500000 +#define CLK_204_000M 204000000 +#define CLK_218_500M 218500000 +#define CLK_234_000M 234000000 +#define CLK_267_250M 267250000 +#define CLK_297_500M 297500000 +#define CLK_74_481M 74481000 +#define CLK_172_798M 172798000 +#define CLK_122_614M 122614000 + +/* CLE266 PLL value +*/ +#define CLE266_PLL_25_175M 0x0000C763 +#define CLE266_PLL_26_880M 0x0000440F +#define CLE266_PLL_29_581M 0x00008421 +#define CLE266_PLL_31_490M 0x00004721 +#define CLE266_PLL_31_500M 0x0000C3B5 +#define CLE266_PLL_31_728M 0x0000471F +#define CLE266_PLL_32_668M 0x0000C449 +#define CLE266_PLL_36_000M 0x0000C5E5 +#define CLE266_PLL_40_000M 0x0000C459 +#define CLE266_PLL_41_291M 0x00004417 +#define CLE266_PLL_43_163M 0x0000C579 +#define CLE266_PLL_45_250M 0x0000C57F /* 45.46MHz */ +#define CLE266_PLL_46_000M 0x0000875A +#define CLE266_PLL_46_996M 0x0000C4E9 +#define CLE266_PLL_48_000M 0x00001443 +#define CLE266_PLL_48_875M 0x00001D63 +#define CLE266_PLL_49_500M 0x00008653 +#define CLE266_PLL_52_406M 0x0000C475 +#define CLE266_PLL_52_977M 0x00004525 +#define CLE266_PLL_56_250M 0x000047B7 +#define CLE266_PLL_60_466M 0x0000494C +#define CLE266_PLL_61_500M 0x00001456 +#define CLE266_PLL_65_000M 0x000086ED +#define CLE266_PLL_65_178M 0x0000855B +#define CLE266_PLL_66_750M 0x0000844B /* 67.116MHz */ +#define CLE266_PLL_68_179M 0x00000413 +#define CLE266_PLL_69_924M 0x00001153 +#define CLE266_PLL_70_159M 0x00001462 +#define CLE266_PLL_72_000M 0x00001879 +#define CLE266_PLL_74_270M 0x00004853 +#define CLE266_PLL_78_750M 0x00004321 +#define CLE266_PLL_80_136M 0x0000051C +#define CLE266_PLL_83_375M 0x0000C25D +#define CLE266_PLL_83_950M 0x00000729 +#define CLE266_PLL_84_750M 0x00008576 /* 84.537MHz */ +#define CLE266_PLL_85_860M 0x00004754 +#define CLE266_PLL_88_750M 0x0000051F +#define CLE266_PLL_94_500M 0x00000521 +#define CLE266_PLL_97_750M 0x00004652 +#define CLE266_PLL_101_000M 0x0000497F +#define CLE266_PLL_106_500M 0x00008477 /* 106.491463 MHz */ +#define CLE266_PLL_108_000M 0x00008479 +#define CLE266_PLL_113_309M 0x00000C5F +#define CLE266_PLL_118_840M 0x00004553 +#define CLE266_PLL_119_000M 0x00000D6C +#define CLE266_PLL_121_750M 0x00004555 /* 121.704MHz */ +#define CLE266_PLL_125_104M 0x000006B5 +#define CLE266_PLL_133_308M 0x0000465F +#define CLE266_PLL_135_000M 0x0000455E +#define CLE266_PLL_136_700M 0x00000C73 +#define CLE266_PLL_138_400M 0x00000957 +#define CLE266_PLL_146_760M 0x00004567 +#define CLE266_PLL_148_500M 0x00000853 +#define CLE266_PLL_153_920M 0x00000856 +#define CLE266_PLL_156_000M 0x0000456D +#define CLE266_PLL_157_500M 0x000005B7 +#define CLE266_PLL_162_000M 0x00004571 +#define CLE266_PLL_187_000M 0x00000976 +#define CLE266_PLL_193_295M 0x0000086C +#define CLE266_PLL_202_500M 0x00000763 +#define CLE266_PLL_204_000M 0x00000764 +#define CLE266_PLL_218_500M 0x0000065C +#define CLE266_PLL_234_000M 0x00000662 +#define CLE266_PLL_267_250M 0x00000670 +#define CLE266_PLL_297_500M 0x000005E6 +#define CLE266_PLL_74_481M 0x0000051A +#define CLE266_PLL_172_798M 0x00004579 +#define CLE266_PLL_122_614M 0x0000073C + +/* K800 PLL value +*/ +#define K800_PLL_25_175M 0x00539001 +#define K800_PLL_26_880M 0x001C8C80 +#define K800_PLL_29_581M 0x00409080 +#define K800_PLL_31_490M 0x006F9001 +#define K800_PLL_31_500M 0x008B9002 +#define K800_PLL_31_728M 0x00AF9003 +#define K800_PLL_32_668M 0x00909002 +#define K800_PLL_36_000M 0x009F9002 +#define K800_PLL_40_000M 0x00578C02 +#define K800_PLL_41_291M 0x00438C01 +#define K800_PLL_43_163M 0x00778C03 +#define K800_PLL_45_250M 0x007D8C83 /* 45.46MHz */ +#define K800_PLL_46_000M 0x00658C02 +#define K800_PLL_46_996M 0x00818C83 +#define K800_PLL_48_000M 0x00848C83 +#define K800_PLL_48_875M 0x00508C81 +#define K800_PLL_49_500M 0x00518C01 +#define K800_PLL_52_406M 0x00738C02 +#define K800_PLL_52_977M 0x00928C83 +#define K800_PLL_56_250M 0x007C8C02 +#define K800_PLL_60_466M 0x00A78C83 +#define K800_PLL_61_500M 0x00AA8C83 +#define K800_PLL_65_000M 0x006B8C01 +#define K800_PLL_65_178M 0x00B48C83 +#define K800_PLL_66_750M 0x00948C82 /* 67.116MHz */ +#define K800_PLL_68_179M 0x00708C01 +#define K800_PLL_69_924M 0x00C18C83 +#define K800_PLL_70_159M 0x00C28C83 +#define K800_PLL_72_000M 0x009F8C82 +#define K800_PLL_74_270M 0x00ce0c03 +#define K800_PLL_78_750M 0x00408801 +#define K800_PLL_80_136M 0x00428801 +#define K800_PLL_83_375M 0x005B0882 +#define K800_PLL_83_950M 0x00738803 +#define K800_PLL_84_750M 0x00748883 /* 84.477MHz */ +#define K800_PLL_85_860M 0x00768883 +#define K800_PLL_88_750M 0x007A8883 +#define K800_PLL_94_500M 0x00828803 +#define K800_PLL_97_750M 0x00878883 +#define K800_PLL_101_000M 0x008B8883 +#define K800_PLL_106_500M 0x00758882 /* 106.491463 MHz */ +#define K800_PLL_108_000M 0x00778882 +#define K800_PLL_113_309M 0x005D8881 +#define K800_PLL_118_840M 0x00A48883 +#define K800_PLL_119_000M 0x00838882 +#define K800_PLL_121_750M 0x00A88883 /* 121.704MHz */ +#define K800_PLL_125_104M 0x00688801 +#define K800_PLL_133_308M 0x005D8801 +#define K800_PLL_135_000M 0x001A4081 +#define K800_PLL_136_700M 0x00BD8883 +#define K800_PLL_138_400M 0x00728881 +#define K800_PLL_146_760M 0x00CC8883 +#define K800_PLL_148_500M 0x00ce0803 +#define K800_PLL_153_920M 0x00548482 +#define K800_PLL_156_000M 0x006B8483 +#define K800_PLL_157_500M 0x00142080 +#define K800_PLL_162_000M 0x006F8483 +#define K800_PLL_187_000M 0x00818483 +#define K800_PLL_193_295M 0x004F8481 +#define K800_PLL_202_500M 0x00538481 +#define K800_PLL_204_000M 0x008D8483 +#define K800_PLL_218_500M 0x00978483 +#define K800_PLL_234_000M 0x00608401 +#define K800_PLL_267_250M 0x006E8481 +#define K800_PLL_297_500M 0x00A48402 +#define K800_PLL_74_481M 0x007B8C81 +#define K800_PLL_172_798M 0x00778483 +#define K800_PLL_122_614M 0x00878882 + +/* PLL for VT3324 */ +#define CX700_25_175M 0x008B1003 +#define CX700_26_719M 0x00931003 +#define CX700_26_880M 0x00941003 +#define CX700_29_581M 0x00A49003 +#define CX700_31_490M 0x00AE1003 +#define CX700_31_500M 0x00AE1003 +#define CX700_31_728M 0x00AF1003 +#define CX700_32_668M 0x00B51003 +#define CX700_36_000M 0x00C81003 +#define CX700_40_000M 0x006E0C03 +#define CX700_41_291M 0x00710C03 +#define CX700_43_163M 0x00770C03 +#define CX700_45_250M 0x007D0C03 /* 45.46MHz */ +#define CX700_46_000M 0x007F0C03 +#define CX700_46_996M 0x00818C83 +#define CX700_48_000M 0x00840C03 +#define CX700_48_875M 0x00508C81 +#define CX700_49_500M 0x00880C03 +#define CX700_52_406M 0x00730C02 +#define CX700_52_977M 0x00920C03 +#define CX700_56_250M 0x009B0C03 +#define CX700_60_466M 0x00460C00 +#define CX700_61_500M 0x00AA0C03 +#define CX700_65_000M 0x006B0C01 +#define CX700_65_178M 0x006B0C01 +#define CX700_66_750M 0x00940C02 /*67.116MHz */ +#define CX700_68_179M 0x00BC0C03 +#define CX700_69_924M 0x00C10C03 +#define CX700_70_159M 0x00C20C03 +#define CX700_72_000M 0x009F0C02 +#define CX700_74_270M 0x00CE0C03 +#define CX700_74_481M 0x00CE0C03 +#define CX700_78_750M 0x006C0803 +#define CX700_80_136M 0x006E0803 +#define CX700_83_375M 0x005B0882 +#define CX700_83_950M 0x00730803 +#define CX700_84_750M 0x00740803 /* 84.537Mhz */ +#define CX700_85_860M 0x00760803 +#define CX700_88_750M 0x00AC8885 +#define CX700_94_500M 0x00820803 +#define CX700_97_750M 0x00870803 +#define CX700_101_000M 0x008B0803 +#define CX700_106_500M 0x00750802 +#define CX700_108_000M 0x00950803 +#define CX700_113_309M 0x005D0801 +#define CX700_118_840M 0x00A40803 +#define CX700_119_000M 0x00830802 +#define CX700_121_750M 0x00420800 /* 121.704MHz */ +#define CX700_125_104M 0x00AD0803 +#define CX700_133_308M 0x00930802 +#define CX700_135_000M 0x00950802 +#define CX700_136_700M 0x00BD0803 +#define CX700_138_400M 0x00720801 +#define CX700_146_760M 0x00CC0803 +#define CX700_148_500M 0x00a40802 +#define CX700_153_920M 0x00540402 +#define CX700_156_000M 0x006B0403 +#define CX700_157_500M 0x006C0403 +#define CX700_162_000M 0x006F0403 +#define CX700_172_798M 0x00770403 +#define CX700_187_000M 0x00810403 +#define CX700_193_295M 0x00850403 +#define CX700_202_500M 0x008C0403 +#define CX700_204_000M 0x008D0403 +#define CX700_218_500M 0x00970403 +#define CX700_234_000M 0x00600401 +#define CX700_267_250M 0x00B90403 +#define CX700_297_500M 0x00CE0403 +#define CX700_122_614M 0x00870802 + +/* Definition CRTC Timing Index */ +#define H_TOTAL_INDEX 0 +#define H_ADDR_INDEX 1 +#define H_BLANK_START_INDEX 2 +#define H_BLANK_END_INDEX 3 +#define H_SYNC_START_INDEX 4 +#define H_SYNC_END_INDEX 5 +#define V_TOTAL_INDEX 6 +#define V_ADDR_INDEX 7 +#define V_BLANK_START_INDEX 8 +#define V_BLANK_END_INDEX 9 +#define V_SYNC_START_INDEX 10 +#define V_SYNC_END_INDEX 11 +#define H_TOTAL_SHADOW_INDEX 12 +#define H_BLANK_END_SHADOW_INDEX 13 +#define V_TOTAL_SHADOW_INDEX 14 +#define V_ADDR_SHADOW_INDEX 15 +#define V_BLANK_SATRT_SHADOW_INDEX 16 +#define V_BLANK_END_SHADOW_INDEX 17 +#define V_SYNC_SATRT_SHADOW_INDEX 18 +#define V_SYNC_END_SHADOW_INDEX 19 + +/* Definition Video Mode Pixel Clock (picoseconds) +*/ +#define RES_480X640_60HZ_PIXCLOCK 39722 +#define RES_640X480_60HZ_PIXCLOCK 39722 +#define RES_640X480_75HZ_PIXCLOCK 31747 +#define RES_640X480_85HZ_PIXCLOCK 27777 +#define RES_640X480_100HZ_PIXCLOCK 23168 +#define RES_640X480_120HZ_PIXCLOCK 19081 +#define RES_720X480_60HZ_PIXCLOCK 37020 +#define RES_720X576_60HZ_PIXCLOCK 30611 +#define RES_800X600_60HZ_PIXCLOCK 25000 +#define RES_800X600_75HZ_PIXCLOCK 20203 +#define RES_800X600_85HZ_PIXCLOCK 17777 +#define RES_800X600_100HZ_PIXCLOCK 14667 +#define RES_800X600_120HZ_PIXCLOCK 11912 +#define RES_800X480_60HZ_PIXCLOCK 33805 +#define RES_848X480_60HZ_PIXCLOCK 31756 +#define RES_856X480_60HZ_PIXCLOCK 31518 +#define RES_1024X512_60HZ_PIXCLOCK 24218 +#define RES_1024X600_60HZ_PIXCLOCK 20460 +#define RES_1024X768_60HZ_PIXCLOCK 15385 +#define RES_1024X768_75HZ_PIXCLOCK 12699 +#define RES_1024X768_85HZ_PIXCLOCK 10582 +#define RES_1024X768_100HZ_PIXCLOCK 8825 +#define RES_1152X864_75HZ_PIXCLOCK 9259 +#define RES_1280X768_60HZ_PIXCLOCK 12480 +#define RES_1280X800_60HZ_PIXCLOCK 11994 +#define RES_1280X960_60HZ_PIXCLOCK 9259 +#define RES_1280X1024_60HZ_PIXCLOCK 9260 +#define RES_1280X1024_75HZ_PIXCLOCK 7408 +#define RES_1280X768_85HZ_PIXCLOCK 6349 +#define RES_1440X1050_60HZ_PIXCLOCK 7993 +#define RES_1600X1200_60HZ_PIXCLOCK 6172 +#define RES_1600X1200_75HZ_PIXCLOCK 4938 +#define RES_1280X720_60HZ_PIXCLOCK 13426 +#define RES_1920X1080_60HZ_PIXCLOCK 5787 +#define RES_1400X1050_60HZ_PIXCLOCK 8214 +#define RES_1400X1050_75HZ_PIXCLOCK 6410 +#define RES_1368X768_60HZ_PIXCLOCK 11647 +#define RES_960X600_60HZ_PIXCLOCK 22099 +#define RES_1000X600_60HZ_PIXCLOCK 20834 +#define RES_1024X576_60HZ_PIXCLOCK 21278 +#define RES_1088X612_60HZ_PIXCLOCK 18877 +#define RES_1152X720_60HZ_PIXCLOCK 14981 +#define RES_1200X720_60HZ_PIXCLOCK 14253 +#define RES_1280X600_60HZ_PIXCLOCK 16260 +#define RES_1280X720_50HZ_PIXCLOCK 16538 +#define RES_1280X768_50HZ_PIXCLOCK 15342 +#define RES_1366X768_50HZ_PIXCLOCK 14301 +#define RES_1366X768_60HZ_PIXCLOCK 11646 +#define RES_1360X768_60HZ_PIXCLOCK 11799 +#define RES_1440X900_60HZ_PIXCLOCK 9390 +#define RES_1440X900_75HZ_PIXCLOCK 7315 +#define RES_1600X900_60HZ_PIXCLOCK 8415 +#define RES_1600X1024_60HZ_PIXCLOCK 7315 +#define RES_1680X1050_60HZ_PIXCLOCK 6814 +#define RES_1680X1050_75HZ_PIXCLOCK 5348 +#define RES_1792X1344_60HZ_PIXCLOCK 4902 +#define RES_1856X1392_60HZ_PIXCLOCK 4577 +#define RES_1920X1200_60HZ_PIXCLOCK 5173 +#define RES_1920X1440_60HZ_PIXCLOCK 4274 +#define RES_1920X1440_75HZ_PIXCLOCK 3367 +#define RES_2048X1536_60HZ_PIXCLOCK 3742 + +#define RES_1360X768_RB_60HZ_PIXCLOCK 13889 +#define RES_1400X1050_RB_60HZ_PIXCLOCK 9901 +#define RES_1440X900_RB_60HZ_PIXCLOCK 11268 +#define RES_1600X900_RB_60HZ_PIXCLOCK 10230 +#define RES_1680X1050_RB_60HZ_PIXCLOCK 8403 +#define RES_1920X1080_RB_60HZ_PIXCLOCK 7225 +#define RES_1920X1200_RB_60HZ_PIXCLOCK 6497 + +/* LCD display method +*/ +#define LCD_EXPANDSION 0x00 +#define LCD_CENTERING 0x01 + +/* LCD mode +*/ +#define LCD_OPENLDI 0x00 +#define LCD_SPWG 0x01 + +/* Define display timing +*/ +struct display_timing { + u16 hor_total; + u16 hor_addr; + u16 hor_blank_start; + u16 hor_blank_end; + u16 hor_sync_start; + u16 hor_sync_end; + u16 ver_total; + u16 ver_addr; + u16 ver_blank_start; + u16 ver_blank_end; + u16 ver_sync_start; + u16 ver_sync_end; +}; + +struct crt_mode_table { + int refresh_rate; + unsigned long clk; + int h_sync_polarity; + int v_sync_polarity; + struct display_timing crtc; +}; + +struct io_reg { + int port; + u8 index; + u8 mask; + u8 value; +}; + +#endif /* __SHARE_H__ */ diff --git a/drivers/video/via/tbl1636.c b/drivers/video/via/tbl1636.c new file mode 100644 index 000000000000..2d8453429d4a --- /dev/null +++ b/drivers/video/via/tbl1636.c @@ -0,0 +1,71 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "global.h" +struct IODATA COMMON_INIT_TBL_VT1636[] = { +/* Index, Mask, Value */ + /* Set panel power sequence timing */ + {0x10, 0xC0, 0x00}, + /* T1: VDD on - Data on. Each increment is 1 ms. (50ms = 031h) */ + {0x0B, 0xFF, 0x40}, + /* T2: Data on - Backlight on. Each increment is 2 ms. (210ms = 068h) */ + {0x0C, 0xFF, 0x31}, + /* T3: Backlight off -Data off. Each increment is 2 ms. (210ms = 068h)*/ + {0x0D, 0xFF, 0x31}, + /* T4: Data off - VDD off. Each increment is 1 ms. (50ms = 031h) */ + {0x0E, 0xFF, 0x68}, + /* T5: VDD off - VDD on. Each increment is 100 ms. (500ms = 04h) */ + {0x0F, 0xFF, 0x68}, + /* LVDS output power up */ + {0x09, 0xA0, 0xA0}, + /* turn on back light */ + {0x10, 0x33, 0x13} +}; + +struct IODATA DUAL_CHANNEL_ENABLE_TBL_VT1636[] = { +/* Index, Mask, Value */ + {0x08, 0xF0, 0xE0} /* Input Data Mode Select */ +}; + +struct IODATA SINGLE_CHANNEL_ENABLE_TBL_VT1636[] = { +/* Index, Mask, Value */ + {0x08, 0xF0, 0x00} /* Input Data Mode Select */ +}; + +struct IODATA DITHERING_ENABLE_TBL_VT1636[] = { +/* Index, Mask, Value */ + {0x0A, 0x70, 0x50} +}; + +struct IODATA DITHERING_DISABLE_TBL_VT1636[] = { +/* Index, Mask, Value */ + {0x0A, 0x70, 0x00} +}; + +struct IODATA VDD_ON_TBL_VT1636[] = { +/* Index, Mask, Value */ + {0x10, 0x20, 0x20} +}; + +struct IODATA VDD_OFF_TBL_VT1636[] = { +/* Index, Mask, Value */ + {0x10, 0x20, 0x00} +}; diff --git a/drivers/video/via/tbl1636.h b/drivers/video/via/tbl1636.h new file mode 100644 index 000000000000..d906055f1511 --- /dev/null +++ b/drivers/video/via/tbl1636.h @@ -0,0 +1,34 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef _TBL1636_H_ +#define _TBL1636_H_ +#include "hw.h" + +extern struct IODATA COMMON_INIT_TBL_VT1636[8]; +extern struct IODATA DUAL_CHANNEL_ENABLE_TBL_VT1636[1]; +extern struct IODATA SINGLE_CHANNEL_ENABLE_TBL_VT1636[1]; +extern struct IODATA DITHERING_ENABLE_TBL_VT1636[1]; +extern struct IODATA DITHERING_DISABLE_TBL_VT1636[1]; +extern struct IODATA VDD_ON_TBL_VT1636[1]; +extern struct IODATA VDD_OFF_TBL_VT1636[1]; + +#endif /* _VIA_TBL1636_H_ */ diff --git a/drivers/video/via/tblDPASetting.c b/drivers/video/via/tblDPASetting.c new file mode 100644 index 000000000000..0c4c8cc712f4 --- /dev/null +++ b/drivers/video/via/tblDPASetting.c @@ -0,0 +1,109 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "global.h" +/* For VT3324: */ +struct VT1636_DPA_SETTING VT1636_DPA_SETTING_TBL_VT3324[] = { + /* Panel ID, CLK_SEL_ST1[09], CLK_SEL_ST2[08] */ + {LCD_PANEL_ID0_640X480, 0x00, 0x00}, /* For 640x480 */ + {LCD_PANEL_ID1_800X600, 0x00, 0x00}, /* For 800x600 */ + {LCD_PANEL_ID2_1024X768, 0x00, 0x00}, /* For 1024x768 */ + {LCD_PANEL_ID3_1280X768, 0x00, 0x00}, /* For 1280x768 */ + {LCD_PANEL_ID4_1280X1024, 0x00, 0x00}, /* For 1280x1024 */ + {LCD_PANEL_ID5_1400X1050, 0x00, 0x00}, /* For 1400x1050 */ + {LCD_PANEL_ID6_1600X1200, 0x0B, 0x03} /* For 1600x1200 */ +}; + +struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3324[] = { +/* ClkRange, DVP0, DVP0DataDriving, DVP0ClockDriving, DVP1, + DVP1Driving, DFPHigh, DFPLow */ +/* CR96, SR2A[5], SR1B[1], SR2A[4], SR1E[2], CR9B, + SR65, CR97, CR99 */ + /* LCK/VCK < 30000000 will use this value */ + {DPA_CLK_RANGE_30M, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00}, + /* 30000000 < LCK/VCK < 50000000 will use this value */ + {DPA_CLK_RANGE_30_50M, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00}, + /* 50000000 < LCK/VCK < 70000000 will use this value */ + {DPA_CLK_RANGE_50_70M, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, + 0x00}, + /* 70000000 < LCK/VCK < 100000000 will use this value */ + {DPA_CLK_RANGE_70_100M, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, + 0x00}, + /* 100000000 < LCK/VCK < 15000000 will use this value */ + {DPA_CLK_RANGE_100_150M, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, + 0x00}, + /* 15000000 < LCK/VCK will use this value */ + {DPA_CLK_RANGE_150M, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0E, 0x00, + 0x00}, +}; + +/* For VT3327: */ +struct VT1636_DPA_SETTING VT1636_DPA_SETTING_TBL_VT3327[] = { + /* Panel ID, CLK_SEL_ST1[09], CLK_SEL_ST2[08] */ + {LCD_PANEL_ID0_640X480, 0x00, 0x00}, /* For 640x480 */ + {LCD_PANEL_ID1_800X600, 0x00, 0x00}, /* For 800x600 */ + {LCD_PANEL_ID2_1024X768, 0x00, 0x00}, /* For 1024x768 */ + {LCD_PANEL_ID3_1280X768, 0x00, 0x00}, /* For 1280x768 */ + {LCD_PANEL_ID4_1280X1024, 0x00, 0x00}, /* For 1280x1024 */ + {LCD_PANEL_ID5_1400X1050, 0x00, 0x00}, /* For 1400x1050 */ + {LCD_PANEL_ID6_1600X1200, 0x00, 0x00} /* For 1600x1200 */ +}; + +struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3327[] = { +/* ClkRange,DVP0, DVP0DataDriving, DVP0ClockDriving, DVP1, + DVP1Driving, DFPHigh, DFPLow */ +/* CR96, SR2A[5], SR1B[1], SR2A[4], SR1E[2], CR9B, + SR65, CR97, CR99 */ +/* LCK/VCK < 30000000 will use this value */ +{DPA_CLK_RANGE_30M, 0x07, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x08, 0x01}, +/* 30000000 < LCK/VCK < 50000000 will use this value */ +{DPA_CLK_RANGE_30_50M, 0x07, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x08, 0x01}, +/* 50000000 < LCK/VCK < 70000000 will use this value */ +{DPA_CLK_RANGE_50_70M, 0x06, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x08, 0x01}, +/* 70000000 < LCK/VCK < 100000000 will use this value */ +{DPA_CLK_RANGE_70_100M, 0x03, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x08, 0x03}, +/* 100000000 < LCK/VCK < 15000000 will use this value */ +{DPA_CLK_RANGE_100_150M, 0x03, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x01, 0x02}, +/* 15000000 < LCK/VCK will use this value */ +{DPA_CLK_RANGE_150M, 0x00, 0x20, 0x00, 0x10, 0x00, 0x03, 0x00, 0x0D, 0x03}, +}; + +/* For VT3364: */ +struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3364[] = { +/* ClkRange,DVP0, DVP0DataDriving, DVP0ClockDriving, DVP1, + DVP1Driving, DFPHigh, DFPLow */ +/* CR96, SR2A[5], SR1B[1], SR2A[4], SR1E[2], CR9B, + SR65, CR97, CR99 */ +/* LCK/VCK < 30000000 will use this value */ +{DPA_CLK_RANGE_30M, 0x07, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x08}, +/* 30000000 < LCK/VCK < 50000000 will use this value */ +{DPA_CLK_RANGE_30_50M, 0x07, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x08}, +/* 50000000 < LCK/VCK < 70000000 will use this value */ +{DPA_CLK_RANGE_50_70M, 0x07, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x08}, +/* 70000000 < LCK/VCK < 100000000 will use this value */ +{DPA_CLK_RANGE_70_100M, 0x07, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x08}, +/* 100000000 < LCK/VCK < 15000000 will use this value */ +{DPA_CLK_RANGE_100_150M, 0x03, 0x00, 0x02, 0x00, 0x00, 0x03, 0x00, 0x00, 0x08}, +/* 15000000 < LCK/VCK will use this value */ +{DPA_CLK_RANGE_150M, 0x01, 0x00, 0x02, 0x10, 0x00, 0x03, 0x00, 0x00, 0x08}, +}; diff --git a/drivers/video/via/tblDPASetting.h b/drivers/video/via/tblDPASetting.h new file mode 100644 index 000000000000..b065a83481d3 --- /dev/null +++ b/drivers/video/via/tblDPASetting.h @@ -0,0 +1,47 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef _TBLDPASETTING_H_ +#define _TBLDPASETTING_H_ +#include "global.h" + +#define DPA_CLK_30M 30000000 +#define DPA_CLK_50M 50000000 +#define DPA_CLK_70M 70000000 +#define DPA_CLK_100M 100000000 +#define DPA_CLK_150M 150000000 + +enum DPA_RANGE { + DPA_CLK_RANGE_30M, + DPA_CLK_RANGE_30_50M, + DPA_CLK_RANGE_50_70M, + DPA_CLK_RANGE_70_100M, + DPA_CLK_RANGE_100_150M, + DPA_CLK_RANGE_150M +}; + +extern struct VT1636_DPA_SETTING VT1636_DPA_SETTING_TBL_VT3324[7]; +extern struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3324[6]; +extern struct VT1636_DPA_SETTING VT1636_DPA_SETTING_TBL_VT3327[7]; +extern struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3327[]; +extern struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3364[6]; + +#endif diff --git a/drivers/video/via/via_i2c.c b/drivers/video/via/via_i2c.c new file mode 100644 index 000000000000..0f3ed4eb236d --- /dev/null +++ b/drivers/video/via/via_i2c.c @@ -0,0 +1,177 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "global.h" + +static void via_i2c_setscl(void *data, int state) +{ + u8 val; + struct via_i2c_stuff *via_i2c_chan = (struct via_i2c_stuff *)data; + + val = viafb_read_reg(VIASR, via_i2c_chan->i2c_port) & 0xF0; + if (state) + val |= 0x20; + else + val &= ~0x20; + switch (via_i2c_chan->i2c_port) { + case I2CPORTINDEX: + val |= 0x01; + break; + case GPIOPORTINDEX: + val |= 0x80; + break; + default: + DEBUG_MSG("via_i2c: specify wrong i2c port.\n"); + } + viafb_write_reg(via_i2c_chan->i2c_port, VIASR, val); +} + +static int via_i2c_getscl(void *data) +{ + struct via_i2c_stuff *via_i2c_chan = (struct via_i2c_stuff *)data; + + if (viafb_read_reg(VIASR, via_i2c_chan->i2c_port) & 0x08) + return 1; + return 0; +} + +static int via_i2c_getsda(void *data) +{ + struct via_i2c_stuff *via_i2c_chan = (struct via_i2c_stuff *)data; + + if (viafb_read_reg(VIASR, via_i2c_chan->i2c_port) & 0x04) + return 1; + return 0; +} + +static void via_i2c_setsda(void *data, int state) +{ + u8 val; + struct via_i2c_stuff *via_i2c_chan = (struct via_i2c_stuff *)data; + + val = viafb_read_reg(VIASR, via_i2c_chan->i2c_port) & 0xF0; + if (state) + val |= 0x10; + else + val &= ~0x10; + switch (via_i2c_chan->i2c_port) { + case I2CPORTINDEX: + val |= 0x01; + break; + case GPIOPORTINDEX: + val |= 0x40; + break; + default: + DEBUG_MSG("via_i2c: specify wrong i2c port.\n"); + } + viafb_write_reg(via_i2c_chan->i2c_port, VIASR, val); +} + +int viafb_i2c_readbyte(u8 slave_addr, u8 index, u8 *pdata) +{ + u8 mm1[] = {0x00}; + struct i2c_msg msgs[2]; + + *pdata = 0; + msgs[0].flags = 0; + msgs[1].flags = I2C_M_RD; + msgs[0].addr = msgs[1].addr = slave_addr / 2; + mm1[0] = index; + msgs[0].len = 1; msgs[1].len = 1; + msgs[0].buf = mm1; msgs[1].buf = pdata; + i2c_transfer(&viaparinfo->i2c_stuff.adapter, msgs, 2); + + return 0; +} + +int viafb_i2c_writebyte(u8 slave_addr, u8 index, u8 data) +{ + u8 msg[2] = { index, data }; + struct i2c_msg msgs; + + msgs.flags = 0; + msgs.addr = slave_addr / 2; + msgs.len = 2; + msgs.buf = msg; + return i2c_transfer(&viaparinfo->i2c_stuff.adapter, &msgs, 1); +} + +int viafb_i2c_readbytes(u8 slave_addr, u8 index, u8 *buff, int buff_len) +{ + u8 mm1[] = {0x00}; + struct i2c_msg msgs[2]; + + msgs[0].flags = 0; + msgs[1].flags = I2C_M_RD; + msgs[0].addr = msgs[1].addr = slave_addr / 2; + mm1[0] = index; + msgs[0].len = 1; msgs[1].len = buff_len; + msgs[0].buf = mm1; msgs[1].buf = buff; + i2c_transfer(&viaparinfo->i2c_stuff.adapter, msgs, 2); + return 0; +} + +int viafb_create_i2c_bus(void *viapar) +{ + int ret; + struct viafb_par *par = (struct viafb_par *)viapar; + + strcpy(par->i2c_stuff.adapter.name, "via_i2c"); + par->i2c_stuff.i2c_port = 0x0; + par->i2c_stuff.adapter.owner = THIS_MODULE; + par->i2c_stuff.adapter.id = 0x01FFFF; + par->i2c_stuff.adapter.class = 0; + par->i2c_stuff.adapter.algo_data = &par->i2c_stuff.algo; + par->i2c_stuff.adapter.dev.parent = NULL; + par->i2c_stuff.algo.setsda = via_i2c_setsda; + par->i2c_stuff.algo.setscl = via_i2c_setscl; + par->i2c_stuff.algo.getsda = via_i2c_getsda; + par->i2c_stuff.algo.getscl = via_i2c_getscl; + par->i2c_stuff.algo.udelay = 40; + par->i2c_stuff.algo.timeout = 20; + par->i2c_stuff.algo.data = &par->i2c_stuff; + + i2c_set_adapdata(&par->i2c_stuff.adapter, &par->i2c_stuff); + + /* Raise SCL and SDA */ + par->i2c_stuff.i2c_port = I2CPORTINDEX; + via_i2c_setsda(&par->i2c_stuff, 1); + via_i2c_setscl(&par->i2c_stuff, 1); + + par->i2c_stuff.i2c_port = GPIOPORTINDEX; + via_i2c_setsda(&par->i2c_stuff, 1); + via_i2c_setscl(&par->i2c_stuff, 1); + udelay(20); + + ret = i2c_bit_add_bus(&par->i2c_stuff.adapter); + if (ret == 0) + DEBUG_MSG("I2C bus %s registered.\n", + par->i2c_stuff.adapter.name); + else + DEBUG_MSG("Failed to register I2C bus %s.\n", + par->i2c_stuff.adapter.name); + return ret; +} + +void viafb_delete_i2c_buss(void *par) +{ + i2c_del_adapter(&((struct viafb_par *)par)->i2c_stuff.adapter); +} diff --git a/drivers/video/via/via_i2c.h b/drivers/video/via/via_i2c.h new file mode 100644 index 000000000000..3a13242a3152 --- /dev/null +++ b/drivers/video/via/via_i2c.h @@ -0,0 +1,46 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ +#ifndef __VIA_I2C_H__ +#define __VIA_I2C_H__ + +#include <linux/i2c.h> +#include <linux/i2c-algo-bit.h> + +struct via_i2c_stuff { + u16 i2c_port; /* GPIO or I2C port */ + struct i2c_adapter adapter; + struct i2c_algo_bit_data algo; +}; + +#define I2CPORT 0x3c4 +#define I2CPORTINDEX 0x31 +#define GPIOPORT 0x3C4 +#define GPIOPORTINDEX 0x2C +#define I2C_BUS 1 +#define GPIO_BUS 2 +#define DELAYPORT 0x3C3 + +int viafb_i2c_readbyte(u8 slave_addr, u8 index, u8 *pdata); +int viafb_i2c_writebyte(u8 slave_addr, u8 index, u8 data); +int viafb_i2c_readbytes(u8 slave_addr, u8 index, u8 *buff, int buff_len); +int viafb_create_i2c_bus(void *par); +void viafb_delete_i2c_buss(void *par); +#endif /* __VIA_I2C_H__ */ diff --git a/drivers/video/via/via_utility.c b/drivers/video/via/via_utility.c new file mode 100644 index 000000000000..d53c3d54ed8e --- /dev/null +++ b/drivers/video/via/via_utility.c @@ -0,0 +1,253 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "global.h" + +void viafb_get_device_support_state(u32 *support_state) +{ + *support_state = CRT_Device; + + if (viaparinfo->chip_info->tmds_chip_info.tmds_chip_name == VT1632_TMDS) + *support_state |= DVI_Device; + + if (viaparinfo->chip_info->lvds_chip_info.lvds_chip_name == VT1631_LVDS) + *support_state |= LCD_Device; +} + +void viafb_get_device_connect_state(u32 *connect_state) +{ + bool mobile = false; + + *connect_state = CRT_Device; + + if (viafb_dvi_sense()) + *connect_state |= DVI_Device; + + viafb_lcd_get_mobile_state(&mobile); + if (mobile) + *connect_state |= LCD_Device; +} + +bool viafb_lcd_get_support_expand_state(u32 xres, u32 yres) +{ + unsigned int support_state = 0; + + switch (viafb_lcd_panel_id) { + case LCD_PANEL_ID0_640X480: + if ((xres < 640) && (yres < 480)) + support_state = true; + break; + + case LCD_PANEL_ID1_800X600: + if ((xres < 800) && (yres < 600)) + support_state = true; + break; + + case LCD_PANEL_ID2_1024X768: + if ((xres < 1024) && (yres < 768)) + support_state = true; + break; + + case LCD_PANEL_ID3_1280X768: + if ((xres < 1280) && (yres < 768)) + support_state = true; + break; + + case LCD_PANEL_ID4_1280X1024: + if ((xres < 1280) && (yres < 1024)) + support_state = true; + break; + + case LCD_PANEL_ID5_1400X1050: + if ((xres < 1400) && (yres < 1050)) + support_state = true; + break; + + case LCD_PANEL_ID6_1600X1200: + if ((xres < 1600) && (yres < 1200)) + support_state = true; + break; + + case LCD_PANEL_ID7_1366X768: + if ((xres < 1366) && (yres < 768)) + support_state = true; + break; + + case LCD_PANEL_ID8_1024X600: + if ((xres < 1024) && (yres < 600)) + support_state = true; + break; + + case LCD_PANEL_ID9_1280X800: + if ((xres < 1280) && (yres < 800)) + support_state = true; + break; + + case LCD_PANEL_IDA_800X480: + if ((xres < 800) && (yres < 480)) + support_state = true; + break; + + case LCD_PANEL_IDB_1360X768: + if ((xres < 1360) && (yres < 768)) + support_state = true; + break; + + case LCD_PANEL_IDC_480X640: + if ((xres < 480) && (yres < 640)) + support_state = true; + break; + + default: + support_state = false; + break; + } + + return support_state; +} + +/*====================================================================*/ +/* Gamma Function Implementation*/ +/*====================================================================*/ + +void viafb_set_gamma_table(int bpp, unsigned int *gamma_table) +{ + int i, sr1a; + int active_device_amount = 0; + int device_status = viafb_DeviceStatus; + + for (i = 0; i < sizeof(viafb_DeviceStatus) * 8; i++) { + if (device_status & 1) + active_device_amount++; + device_status >>= 1; + } + + /* 8 bpp mode can't adjust gamma */ + if (bpp == 8) + return ; + + /* Enable Gamma */ + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_CLE266: + case UNICHROME_K400: + viafb_write_reg_mask(SR16, VIASR, 0x80, BIT7); + break; + + case UNICHROME_K800: + case UNICHROME_PM800: + case UNICHROME_CN700: + case UNICHROME_CX700: + case UNICHROME_K8M890: + case UNICHROME_P4M890: + case UNICHROME_P4M900: + viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7); + break; + } + sr1a = (unsigned int)viafb_read_reg(VIASR, SR1A); + viafb_write_reg_mask(SR1A, VIASR, 0x0, BIT0); + + /* Fill IGA1 Gamma Table */ + outb(0, LUT_INDEX_WRITE); + for (i = 0; i < 256; i++) { + outb(gamma_table[i] >> 16, LUT_DATA); + outb(gamma_table[i] >> 8 & 0xFF, LUT_DATA); + outb(gamma_table[i] & 0xFF, LUT_DATA); + } + + /* If adjust Gamma value in SAMM, fill IGA1, + IGA2 Gamma table simultanous. */ + /* Switch to IGA2 Gamma Table */ + if ((active_device_amount > 1) && + !((viaparinfo->chip_info->gfx_chip_name == + UNICHROME_CLE266) && + (viaparinfo->chip_info->gfx_chip_revision < 15))) { + viafb_write_reg_mask(SR1A, VIASR, 0x01, BIT0); + viafb_write_reg_mask(CR6A, VIACR, 0x02, BIT1); + + /* Fill IGA2 Gamma Table */ + outb(0, LUT_INDEX_WRITE); + for (i = 0; i < 256; i++) { + outb(gamma_table[i] >> 16, LUT_DATA); + outb(gamma_table[i] >> 8 & 0xFF, LUT_DATA); + outb(gamma_table[i] & 0xFF, LUT_DATA); + } + } + viafb_write_reg(SR1A, VIASR, sr1a); +} + +void viafb_get_gamma_table(unsigned int *gamma_table) +{ + unsigned char color_r, color_g, color_b; + unsigned char sr1a = 0; + int i; + + /* Enable Gamma */ + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_CLE266: + case UNICHROME_K400: + viafb_write_reg_mask(SR16, VIASR, 0x80, BIT7); + break; + + case UNICHROME_K800: + case UNICHROME_PM800: + case UNICHROME_CN700: + case UNICHROME_CX700: + case UNICHROME_K8M890: + case UNICHROME_P4M890: + case UNICHROME_P4M900: + viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7); + break; + } + sr1a = viafb_read_reg(VIASR, SR1A); + viafb_write_reg_mask(SR1A, VIASR, 0x0, BIT0); + + /* Reading gamma table to get color value */ + outb(0, LUT_INDEX_READ); + for (i = 0; i < 256; i++) { + color_r = inb(LUT_DATA); + color_g = inb(LUT_DATA); + color_b = inb(LUT_DATA); + gamma_table[i] = + ((((u32) color_r) << 16) | + (((u16) color_g) << 8)) | color_b; + } + viafb_write_reg(SR1A, VIASR, sr1a); +} + +void viafb_get_gamma_support_state(int bpp, unsigned int *support_state) +{ + if (bpp == 8) + *support_state = None_Device; + else + *support_state = CRT_Device | DVI_Device | LCD_Device; +} + +int viafb_input_parameter_converter(int parameter_value) +{ + int result; + + if (parameter_value >= 1 && parameter_value <= 9) + result = 1 << (parameter_value - 1); + else + result = 1; + + return result; +} diff --git a/drivers/video/via/via_utility.h b/drivers/video/via/via_utility.h new file mode 100644 index 000000000000..2fd455202ebd --- /dev/null +++ b/drivers/video/via/via_utility.h @@ -0,0 +1,35 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ +#ifndef __VIAUTILITY_H__ +#define __VIAUTILITY_H__ + +/* These functions are used to get infomation about device's state */ +void viafb_get_device_support_state(u32 *support_state); +void viafb_get_device_connect_state(u32 *connect_state); +bool viafb_lcd_get_support_expand_state(u32 xres, u32 yres); + +/* These function are used to access gamma table */ +void viafb_set_gamma_table(int bpp, unsigned int *gamma_table); +void viafb_get_gamma_table(unsigned int *gamma_table); +void viafb_get_gamma_support_state(int bpp, unsigned int *support_state); +int viafb_input_parameter_converter(int parameter_value); + +#endif /* __VIAUTILITY_H__ */ diff --git a/drivers/video/via/viafbdev.c b/drivers/video/via/viafbdev.c new file mode 100644 index 000000000000..0132eae06f55 --- /dev/null +++ b/drivers/video/via/viafbdev.c @@ -0,0 +1,2571 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include <linux/module.h> +#define _MASTER_FILE + +#include "global.h" + +static int MAX_CURS = 32; +static struct fb_var_screeninfo default_var; +static char *viafb_name = "Via"; +static u32 pseudo_pal[17]; + +/* video mode */ +static char *viafb_mode = "640x480"; +static char *viafb_mode1 = "640x480"; +static int viafb_resMode = VIA_RES_640X480; + +/* Added for specifying active devices.*/ +char *viafb_active_dev = ""; + +/* Added for specifying video on devices.*/ +char *viafb_video_dev = ""; + +/*Added for specify lcd output port*/ +char *viafb_lcd_port = ""; +char *viafb_dvi_port = ""; + +static void viafb_set_device(struct device_t active_dev); +static int apply_device_setting(struct viafb_ioctl_setting setting_info, + struct fb_info *info); +static void apply_second_mode_setting(struct fb_var_screeninfo + *sec_var); +static void retrieve_device_setting(struct viafb_ioctl_setting + *setting_info); +static void viafb_set_video_device(u32 video_dev_info); +static void viafb_get_video_device(u32 *video_dev_info); + +/* Mode information */ +static const struct viafb_modeinfo viafb_modentry[] = { + {480, 640, VIA_RES_480X640, "480x640"}, + {640, 480, VIA_RES_640X480, "640x480"}, + {800, 480, VIA_RES_800X480, "800x480"}, + {800, 600, VIA_RES_800X600, "800x600"}, + {1024, 768, VIA_RES_1024X768, "1024x768"}, + {1152, 864, VIA_RES_1152X864, "1152x864"}, + {1280, 1024, VIA_RES_1280X1024, "1280x1024"}, + {1600, 1200, VIA_RES_1600X1200, "1600x1200"}, + {1440, 1050, VIA_RES_1440X1050, "1440x1050"}, + {1280, 768, VIA_RES_1280X768, "1280x768"}, + {1280, 800, VIA_RES_1280X800, "1280x800"}, + {1280, 960, VIA_RES_1280X960, "1280x960"}, + {1920, 1440, VIA_RES_1920X1440, "1920x1440"}, + {848, 480, VIA_RES_848X480, "848x480"}, + {1400, 1050, VIA_RES_1400X1050, "1400x1050"}, + {720, 480, VIA_RES_720X480, "720x480"}, + {720, 576, VIA_RES_720X576, "720x576"}, + {1024, 512, VIA_RES_1024X512, "1024x512"}, + {1024, 576, VIA_RES_1024X576, "1024x576"}, + {1024, 600, VIA_RES_1024X600, "1024x600"}, + {1280, 720, VIA_RES_1280X720, "1280x720"}, + {1920, 1080, VIA_RES_1920X1080, "1920x1080"}, + {1366, 768, VIA_RES_1368X768, "1368x768"}, + {1680, 1050, VIA_RES_1680X1050, "1680x1050"}, + {960, 600, VIA_RES_960X600, "960x600"}, + {1000, 600, VIA_RES_1000X600, "1000x600"}, + {1024, 576, VIA_RES_1024X576, "1024x576"}, + {1024, 600, VIA_RES_1024X600, "1024x600"}, + {1088, 612, VIA_RES_1088X612, "1088x612"}, + {1152, 720, VIA_RES_1152X720, "1152x720"}, + {1200, 720, VIA_RES_1200X720, "1200x720"}, + {1280, 600, VIA_RES_1280X600, "1280x600"}, + {1360, 768, VIA_RES_1360X768, "1360x768"}, + {1440, 900, VIA_RES_1440X900, "1440x900"}, + {1600, 900, VIA_RES_1600X900, "1600x900"}, + {1600, 1024, VIA_RES_1600X1024, "1600x1024"}, + {1792, 1344, VIA_RES_1792X1344, "1792x1344"}, + {1856, 1392, VIA_RES_1856X1392, "1856x1392"}, + {1920, 1200, VIA_RES_1920X1200, "1920x1200"}, + {2048, 1536, VIA_RES_2048X1536, "2048x1536"}, + {0, 0, VIA_RES_INVALID, "640x480"} +}; + +static struct fb_ops viafb_ops; + +static int viafb_update_fix(struct fb_fix_screeninfo *fix, struct fb_info *info) +{ + struct viafb_par *ppar; + ppar = info->par; + + DEBUG_MSG(KERN_INFO "viafb_update_fix!\n"); + + fix->visual = + ppar->bpp == 8 ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR; + fix->line_length = ppar->linelength; + + return 0; +} + + +static void viafb_setup_fixinfo(struct fb_fix_screeninfo *fix, + struct viafb_par *viaparinfo) +{ + memset(fix, 0, sizeof(struct fb_fix_screeninfo)); + strcpy(fix->id, viafb_name); + + fix->smem_start = viaparinfo->fbmem; + fix->smem_len = viaparinfo->fbmem_free; + fix->mmio_start = viaparinfo->mmio_base; + fix->mmio_len = viaparinfo->mmio_len; + + fix->type = FB_TYPE_PACKED_PIXELS; + fix->type_aux = 0; + + fix->xpanstep = fix->ywrapstep = 0; + fix->ypanstep = 1; + + /* Just tell the accel name */ + viafbinfo->fix.accel = FB_ACCEL_VIA_UNICHROME; +} +static int viafb_open(struct fb_info *info, int user) +{ + DEBUG_MSG(KERN_INFO "viafb_open!\n"); + return 0; +} + +static int viafb_release(struct fb_info *info, int user) +{ + DEBUG_MSG(KERN_INFO "viafb_release!\n"); + return 0; +} + +static void viafb_update_viafb_par(struct fb_info *info) +{ + struct viafb_par *ppar; + + ppar = info->par; + ppar->bpp = info->var.bits_per_pixel; + ppar->linelength = ((info->var.xres_virtual + 7) & ~7) * ppar->bpp / 8; + ppar->hres = info->var.xres; + ppar->vres = info->var.yres; + ppar->xoffset = info->var.xoffset; + ppar->yoffset = info->var.yoffset; +} + +static int viafb_check_var(struct fb_var_screeninfo *var, + struct fb_info *info) +{ + int vmode_index, htotal, vtotal; + struct viafb_par *ppar; + u32 long_refresh; + struct viafb_par *p_viafb_par; + ppar = info->par; + + + DEBUG_MSG(KERN_INFO "viafb_check_var!\n"); + /* Sanity check */ + /* HW neither support interlacte nor double-scaned mode */ + if (var->vmode & FB_VMODE_INTERLACED || var->vmode & FB_VMODE_DOUBLE) + return -EINVAL; + + vmode_index = viafb_get_mode_index(var->xres, var->yres, 0); + if (vmode_index == VIA_RES_INVALID) { + DEBUG_MSG(KERN_INFO + "viafb: Mode %dx%dx%d not supported!!\n", + var->xres, var->yres, var->bits_per_pixel); + return -EINVAL; + } + + if (24 == var->bits_per_pixel) + var->bits_per_pixel = 32; + + if (var->bits_per_pixel != 8 && var->bits_per_pixel != 16 && + var->bits_per_pixel != 32) + return -EINVAL; + + if ((var->xres_virtual * (var->bits_per_pixel >> 3)) & 0x1F) + /*32 pixel alignment */ + var->xres_virtual = (var->xres_virtual + 31) & ~31; + if (var->xres_virtual * var->yres_virtual * var->bits_per_pixel / 8 > + ppar->memsize) + return -EINVAL; + + /* Based on var passed in to calculate the refresh, + * because our driver use some modes special. + */ + htotal = var->xres + var->left_margin + + var->right_margin + var->hsync_len; + vtotal = var->yres + var->upper_margin + + var->lower_margin + var->vsync_len; + long_refresh = 1000000000UL / var->pixclock * 1000; + long_refresh /= (htotal * vtotal); + + viafb_refresh = viafb_get_refresh(var->xres, var->yres, long_refresh); + + /* Adjust var according to our driver's own table */ + viafb_fill_var_timing_info(var, viafb_refresh, vmode_index); + + /* This is indeed a patch for VT3353 */ + if (!info->par) + return -1; + p_viafb_par = (struct viafb_par *)info->par; + if (p_viafb_par->chip_info->gfx_chip_name == UNICHROME_VX800) + var->accel_flags = 0; + + return 0; +} + +static int viafb_set_par(struct fb_info *info) +{ + int vmode_index; + int vmode_index1 = 0; + DEBUG_MSG(KERN_INFO "viafb_set_par!\n"); + + viafb_update_device_setting(info->var.xres, info->var.yres, + info->var.bits_per_pixel, viafb_refresh, 0); + + vmode_index = viafb_get_mode_index(info->var.xres, info->var.yres, 0); + + if (viafb_SAMM_ON == 1) { + DEBUG_MSG(KERN_INFO + "viafb_second_xres = %d, viafb_second_yres = %d, bpp = %d\n", + viafb_second_xres, viafb_second_yres, viafb_bpp1); + vmode_index1 = viafb_get_mode_index(viafb_second_xres, + viafb_second_yres, 1); + DEBUG_MSG(KERN_INFO "->viafb_SAMM_ON: index=%d\n", + vmode_index1); + + viafb_update_device_setting(viafb_second_xres, + viafb_second_yres, viafb_bpp1, viafb_refresh1, 1); + } + + if (vmode_index != VIA_RES_INVALID) { + viafb_setmode(vmode_index, info->var.xres, info->var.yres, + info->var.bits_per_pixel, vmode_index1, + viafb_second_xres, viafb_second_yres, viafb_bpp1); + + /*We should set memory offset according virtual_x */ + /*Fix me:put this function into viafb_setmode */ + viafb_memory_pitch_patch(info); + + /* Update ***fb_par information */ + viafb_update_viafb_par(info); + + /* Update other fixed information */ + viafb_update_fix(&info->fix, info); + viafb_bpp = info->var.bits_per_pixel; + /* Update viafb_accel, it is necessary to our 2D accelerate */ + viafb_accel = info->var.accel_flags; + + if (viafb_accel) + viafb_set_2d_color_depth(info->var.bits_per_pixel); + } + + return 0; +} + +/* Set one color register */ +static int viafb_setcolreg(unsigned regno, unsigned red, unsigned green, +unsigned blue, unsigned transp, struct fb_info *info) +{ + u8 sr1a, sr1b, cr67, cr6a, rev = 0, shift = 10; + unsigned cmap_entries = (info->var.bits_per_pixel == 8) ? 256 : 16; + DEBUG_MSG(KERN_INFO "viafb_setcolreg!\n"); + if (regno >= cmap_entries) + return 1; + if (UNICHROME_CLE266 == viaparinfo->chip_info->gfx_chip_name) { + /* + * Read PCI bus 0,dev 0,function 0,index 0xF6 to get chip rev. + */ + outl(0x80000000 | (0xf6 & ~3), (unsigned long)0xCF8); + rev = (inl((unsigned long)0xCFC) >> ((0xf6 & 3) * 8)) & 0xff; + } + switch (info->var.bits_per_pixel) { + case 8: + outb(0x1A, 0x3C4); + sr1a = inb(0x3C5); + outb(0x1B, 0x3C4); + sr1b = inb(0x3C5); + outb(0x67, 0x3D4); + cr67 = inb(0x3D5); + outb(0x6A, 0x3D4); + cr6a = inb(0x3D5); + + /* Map the 3C6/7/8/9 to the IGA2 */ + outb(0x1A, 0x3C4); + outb(sr1a | 0x01, 0x3C5); + /* Second Display Engine colck always on */ + outb(0x1B, 0x3C4); + outb(sr1b | 0x80, 0x3C5); + /* Second Display Color Depth 8 */ + outb(0x67, 0x3D4); + outb(cr67 & 0x3F, 0x3D5); + outb(0x6A, 0x3D4); + /* Second Display Channel Reset CR6A[6]) */ + outb(cr6a & 0xBF, 0x3D5); + /* Second Display Channel Enable CR6A[7] */ + outb(cr6a | 0x80, 0x3D5); + /* Second Display Channel stop reset) */ + outb(cr6a | 0x40, 0x3D5); + + /* Bit mask of palette */ + outb(0xFF, 0x3c6); + /* Write one register of IGA2 */ + outb(regno, 0x3C8); + if (UNICHROME_CLE266 == viaparinfo->chip_info->gfx_chip_name && + rev >= 15) { + shift = 8; + viafb_write_reg_mask(CR6A, VIACR, BIT5, BIT5); + viafb_write_reg_mask(SR15, VIASR, BIT7, BIT7); + } else { + shift = 10; + viafb_write_reg_mask(CR6A, VIACR, 0, BIT5); + viafb_write_reg_mask(SR15, VIASR, 0, BIT7); + } + outb(red >> shift, 0x3C9); + outb(green >> shift, 0x3C9); + outb(blue >> shift, 0x3C9); + + /* Map the 3C6/7/8/9 to the IGA1 */ + outb(0x1A, 0x3C4); + outb(sr1a & 0xFE, 0x3C5); + /* Bit mask of palette */ + outb(0xFF, 0x3c6); + /* Write one register of IGA1 */ + outb(regno, 0x3C8); + outb(red >> shift, 0x3C9); + outb(green >> shift, 0x3C9); + outb(blue >> shift, 0x3C9); + + outb(0x1A, 0x3C4); + outb(sr1a, 0x3C5); + outb(0x1B, 0x3C4); + outb(sr1b, 0x3C5); + outb(0x67, 0x3D4); + outb(cr67, 0x3D5); + outb(0x6A, 0x3D4); + outb(cr6a, 0x3D5); + break; + case 16: + ((u32 *) info->pseudo_palette)[regno] = (red & 0xF800) | + ((green & 0xFC00) >> 5) | ((blue & 0xF800) >> 11); + break; + case 32: + ((u32 *) info->pseudo_palette)[regno] = + ((transp & 0xFF00) << 16) | + ((red & 0xFF00) << 8) | + ((green & 0xFF00)) | ((blue & 0xFF00) >> 8); + break; + } + + return 0; + +} + +/*CALLED BY: fb_set_cmap */ +/* fb_set_var, pass 256 colors */ +/*CALLED BY: fb_set_cmap */ +/* fbcon_set_palette, pass 16 colors */ +static int viafb_setcmap(struct fb_cmap *cmap, struct fb_info *info) +{ + u32 len = cmap->len; + u32 i; + u16 *pred = cmap->red; + u16 *pgreen = cmap->green; + u16 *pblue = cmap->blue; + u16 *ptransp = cmap->transp; + u8 sr1a, sr1b, cr67, cr6a, rev = 0, shift = 10; + if (len > 256) + return 1; + if (UNICHROME_CLE266 == viaparinfo->chip_info->gfx_chip_name) { + /* + * Read PCI bus 0, dev 0, function 0, index 0xF6 to get chip + * rev. + */ + outl(0x80000000 | (0xf6 & ~3), (unsigned long)0xCF8); + rev = (inl((unsigned long)0xCFC) >> ((0xf6 & 3) * 8)) & 0xff; + } + switch (info->var.bits_per_pixel) { + case 8: + outb(0x1A, 0x3C4); + sr1a = inb(0x3C5); + outb(0x1B, 0x3C4); + sr1b = inb(0x3C5); + outb(0x67, 0x3D4); + cr67 = inb(0x3D5); + outb(0x6A, 0x3D4); + cr6a = inb(0x3D5); + /* Map the 3C6/7/8/9 to the IGA2 */ + outb(0x1A, 0x3C4); + outb(sr1a | 0x01, 0x3C5); + outb(0x1B, 0x3C4); + /* Second Display Engine colck always on */ + outb(sr1b | 0x80, 0x3C5); + outb(0x67, 0x3D4); + /* Second Display Color Depth 8 */ + outb(cr67 & 0x3F, 0x3D5); + outb(0x6A, 0x3D4); + /* Second Display Channel Reset CR6A[6]) */ + outb(cr6a & 0xBF, 0x3D5); + /* Second Display Channel Enable CR6A[7] */ + outb(cr6a | 0x80, 0x3D5); + /* Second Display Channel stop reset) */ + outb(cr6a | 0xC0, 0x3D5); + + /* Bit mask of palette */ + outb(0xFF, 0x3c6); + outb(0x00, 0x3C8); + if (UNICHROME_CLE266 == viaparinfo->chip_info->gfx_chip_name && + rev >= 15) { + shift = 8; + viafb_write_reg_mask(CR6A, VIACR, BIT5, BIT5); + viafb_write_reg_mask(SR15, VIASR, BIT7, BIT7); + } else { + shift = 10; + viafb_write_reg_mask(CR6A, VIACR, 0, BIT5); + viafb_write_reg_mask(SR15, VIASR, 0, BIT7); + } + for (i = 0; i < len; i++) { + outb((*(pred + i)) >> shift, 0x3C9); + outb((*(pgreen + i)) >> shift, 0x3C9); + outb((*(pblue + i)) >> shift, 0x3C9); + } + + outb(0x1A, 0x3C4); + /* Map the 3C6/7/8/9 to the IGA1 */ + outb(sr1a & 0xFE, 0x3C5); + /* Bit mask of palette */ + outb(0xFF, 0x3c6); + outb(0x00, 0x3C8); + for (i = 0; i < len; i++) { + outb((*(pred + i)) >> shift, 0x3C9); + outb((*(pgreen + i)) >> shift, 0x3C9); + outb((*(pblue + i)) >> shift, 0x3C9); + } + + outb(0x1A, 0x3C4); + outb(sr1a, 0x3C5); + outb(0x1B, 0x3C4); + outb(sr1b, 0x3C5); + outb(0x67, 0x3D4); + outb(cr67, 0x3D5); + outb(0x6A, 0x3D4); + outb(cr6a, 0x3D5); + break; + case 16: + if (len > 17) + return 0; /* Because static u32 pseudo_pal[17]; */ + for (i = 0; i < len; i++) + ((u32 *) info->pseudo_palette)[i] = + (*(pred + i) & 0xF800) | + ((*(pgreen + i) & 0xFC00) >> 5) | + ((*(pblue + i) & 0xF800) >> 11); + break; + case 32: + if (len > 17) + return 0; + if (ptransp) { + for (i = 0; i < len; i++) + ((u32 *) info->pseudo_palette)[i] = + ((*(ptransp + i) & 0xFF00) << 16) | + ((*(pred + i) & 0xFF00) << 8) | + ((*(pgreen + i) & 0xFF00)) | + ((*(pblue + i) & 0xFF00) >> 8); + } else { + for (i = 0; i < len; i++) + ((u32 *) info->pseudo_palette)[i] = + 0x00000000 | + ((*(pred + i) & 0xFF00) << 8) | + ((*(pgreen + i) & 0xFF00)) | + ((*(pblue + i) & 0xFF00) >> 8); + } + break; + } + return 0; +} + +static int viafb_pan_display(struct fb_var_screeninfo *var, + struct fb_info *info) +{ + unsigned int offset; + + DEBUG_MSG(KERN_INFO "viafb_pan_display!\n"); + + offset = (var->xoffset + (var->yoffset * var->xres_virtual)) * + var->bits_per_pixel / 16; + + DEBUG_MSG(KERN_INFO "\nviafb_pan_display,offset =%d ", offset); + + viafb_write_reg_mask(0x48, 0x3d4, ((offset >> 24) & 0x3), 0x3); + viafb_write_reg_mask(0x34, 0x3d4, ((offset >> 16) & 0xff), 0xff); + viafb_write_reg_mask(0x0c, 0x3d4, ((offset >> 8) & 0xff), 0xff); + viafb_write_reg_mask(0x0d, 0x3d4, (offset & 0xff), 0xff); + + return 0; +} + +static int viafb_blank(int blank_mode, struct fb_info *info) +{ + DEBUG_MSG(KERN_INFO "viafb_blank!\n"); + /* clear DPMS setting */ + + switch (blank_mode) { + case FB_BLANK_UNBLANK: + /* Screen: On, HSync: On, VSync: On */ + /* control CRT monitor power management */ + viafb_write_reg_mask(CR36, VIACR, 0x00, BIT4 + BIT5); + break; + case FB_BLANK_HSYNC_SUSPEND: + /* Screen: Off, HSync: Off, VSync: On */ + /* control CRT monitor power management */ + viafb_write_reg_mask(CR36, VIACR, 0x10, BIT4 + BIT5); + break; + case FB_BLANK_VSYNC_SUSPEND: + /* Screen: Off, HSync: On, VSync: Off */ + /* control CRT monitor power management */ + viafb_write_reg_mask(CR36, VIACR, 0x20, BIT4 + BIT5); + break; + case FB_BLANK_POWERDOWN: + /* Screen: Off, HSync: Off, VSync: Off */ + /* control CRT monitor power management */ + viafb_write_reg_mask(CR36, VIACR, 0x30, BIT4 + BIT5); + break; + } + + return 0; +} + +static int viafb_ioctl(struct fb_info *info, u_int cmd, u_long arg) +{ + struct viafb_ioctl_mode viamode; + struct viafb_ioctl_samm viasamm; + struct viafb_driver_version driver_version; + struct fb_var_screeninfo sec_var; + struct _panel_size_pos_info panel_pos_size_para; + u32 state_info = 0; + u32 viainfo_size = sizeof(struct viafb_ioctl_info); + u32 *viafb_gamma_table; + char driver_name[] = "viafb"; + + u32 __user *argp = (u32 __user *) arg; + u32 gpu32; + u32 video_dev_info = 0; + struct viafb_ioctl_setting viafb_setting = {}; + struct device_t active_dev = {}; + + DEBUG_MSG(KERN_INFO "viafb_ioctl: 0x%X !!\n", cmd); + + switch (cmd) { + case VIAFB_GET_CHIP_INFO: + if (copy_to_user(argp, viaparinfo->chip_info, + sizeof(struct chip_information))) + return -EFAULT; + break; + case VIAFB_GET_INFO_SIZE: + return put_user(viainfo_size, argp); + case VIAFB_GET_INFO: + return viafb_ioctl_get_viafb_info(arg); + case VIAFB_HOTPLUG: + return put_user(viafb_ioctl_hotplug(info->var.xres, + info->var.yres, + info->var.bits_per_pixel), argp); + case VIAFB_SET_HOTPLUG_FLAG: + if (copy_from_user(&gpu32, argp, sizeof(gpu32))) + return -EFAULT; + viafb_hotplug = (gpu32) ? 1 : 0; + break; + case VIAFB_GET_RESOLUTION: + viamode.xres = (u32) viafb_hotplug_Xres; + viamode.yres = (u32) viafb_hotplug_Yres; + viamode.refresh = (u32) viafb_hotplug_refresh; + viamode.bpp = (u32) viafb_hotplug_bpp; + if (viafb_SAMM_ON == 1) { + viamode.xres_sec = viafb_second_xres; + viamode.yres_sec = viafb_second_yres; + viamode.virtual_xres_sec = viafb_second_virtual_xres; + viamode.virtual_yres_sec = viafb_second_virtual_yres; + viamode.refresh_sec = viafb_refresh1; + viamode.bpp_sec = viafb_bpp1; + } else { + viamode.xres_sec = 0; + viamode.yres_sec = 0; + viamode.virtual_xres_sec = 0; + viamode.virtual_yres_sec = 0; + viamode.refresh_sec = 0; + viamode.bpp_sec = 0; + } + if (copy_to_user(argp, &viamode, sizeof(viamode))) + return -EFAULT; + break; + case VIAFB_GET_SAMM_INFO: + viasamm.samm_status = viafb_SAMM_ON; + + if (viafb_SAMM_ON == 1) { + if (viafb_dual_fb) { + viasamm.size_prim = viaparinfo->fbmem_free; + viasamm.size_sec = viaparinfo1->fbmem_free; + } else { + if (viafb_second_size) { + viasamm.size_prim = + viaparinfo->fbmem_free - + viafb_second_size * 1024 * 1024; + viasamm.size_sec = + viafb_second_size * 1024 * 1024; + } else { + viasamm.size_prim = + viaparinfo->fbmem_free >> 1; + viasamm.size_sec = + (viaparinfo->fbmem_free >> 1); + } + } + viasamm.mem_base = viaparinfo->fbmem; + viasamm.offset_sec = viafb_second_offset; + } else { + viasamm.size_prim = + viaparinfo->memsize - viaparinfo->fbmem_used; + viasamm.size_sec = 0; + viasamm.mem_base = viaparinfo->fbmem; + viasamm.offset_sec = 0; + } + + if (copy_to_user(argp, &viasamm, sizeof(viasamm))) + return -EFAULT; + + break; + case VIAFB_TURN_ON_OUTPUT_DEVICE: + if (copy_from_user(&gpu32, argp, sizeof(gpu32))) + return -EFAULT; + if (gpu32 & CRT_Device) + viafb_crt_enable(); + if (gpu32 & DVI_Device) + viafb_dvi_enable(); + if (gpu32 & LCD_Device) + viafb_lcd_enable(); + break; + case VIAFB_TURN_OFF_OUTPUT_DEVICE: + if (copy_from_user(&gpu32, argp, sizeof(gpu32))) + return -EFAULT; + if (gpu32 & CRT_Device) + viafb_crt_disable(); + if (gpu32 & DVI_Device) + viafb_dvi_disable(); + if (gpu32 & LCD_Device) + viafb_lcd_disable(); + break; + case VIAFB_SET_DEVICE: + if (copy_from_user(&active_dev, (void *)argp, + sizeof(active_dev))) + return -EFAULT; + viafb_set_device(active_dev); + viafb_set_par(info); + break; + case VIAFB_GET_DEVICE: + active_dev.crt = viafb_CRT_ON; + active_dev.dvi = viafb_DVI_ON; + active_dev.lcd = viafb_LCD_ON; + active_dev.samm = viafb_SAMM_ON; + active_dev.primary_dev = viafb_primary_dev; + + active_dev.lcd_dsp_cent = viafb_lcd_dsp_method; + active_dev.lcd_panel_id = viafb_lcd_panel_id; + active_dev.lcd_mode = viafb_lcd_mode; + + active_dev.xres = viafb_hotplug_Xres; + active_dev.yres = viafb_hotplug_Yres; + + active_dev.xres1 = viafb_second_xres; + active_dev.yres1 = viafb_second_yres; + + active_dev.bpp = viafb_bpp; + active_dev.bpp1 = viafb_bpp1; + active_dev.refresh = viafb_refresh; + active_dev.refresh1 = viafb_refresh1; + + active_dev.epia_dvi = viafb_platform_epia_dvi; + active_dev.lcd_dual_edge = viafb_device_lcd_dualedge; + active_dev.bus_width = viafb_bus_width; + + if (copy_to_user(argp, &active_dev, sizeof(active_dev))) + return -EFAULT; + break; + + case VIAFB_GET_DRIVER_VERSION: + driver_version.iMajorNum = VERSION_MAJOR; + driver_version.iKernelNum = VERSION_KERNEL; + driver_version.iOSNum = VERSION_OS; + driver_version.iMinorNum = VERSION_MINOR; + + if (copy_to_user(argp, &driver_version, + sizeof(driver_version))) + return -EFAULT; + + break; + + case VIAFB_SET_DEVICE_INFO: + if (copy_from_user(&viafb_setting, + argp, sizeof(viafb_setting))) + return -EFAULT; + if (apply_device_setting(viafb_setting, info) < 0) + return -EINVAL; + + break; + + case VIAFB_SET_SECOND_MODE: + if (copy_from_user(&sec_var, argp, sizeof(sec_var))) + return -EFAULT; + apply_second_mode_setting(&sec_var); + break; + + case VIAFB_GET_DEVICE_INFO: + + retrieve_device_setting(&viafb_setting); + + if (copy_to_user(argp, &viafb_setting, sizeof(viafb_setting))) + return -EFAULT; + + break; + + case VIAFB_GET_DEVICE_SUPPORT: + viafb_get_device_support_state(&state_info); + if (put_user(state_info, argp)) + return -EFAULT; + break; + + case VIAFB_GET_DEVICE_CONNECT: + viafb_get_device_connect_state(&state_info); + if (put_user(state_info, argp)) + return -EFAULT; + break; + + case VIAFB_GET_PANEL_SUPPORT_EXPAND: + state_info = + viafb_lcd_get_support_expand_state(info->var.xres, + info->var.yres); + if (put_user(state_info, argp)) + return -EFAULT; + break; + + case VIAFB_GET_DRIVER_NAME: + if (copy_to_user(argp, driver_name, sizeof(driver_name))) + return -EFAULT; + break; + + case VIAFB_SET_GAMMA_LUT: + viafb_gamma_table = kmalloc(256 * sizeof(u32), GFP_KERNEL); + if (!viafb_gamma_table) + return -ENOMEM; + if (copy_from_user(viafb_gamma_table, argp, + sizeof(viafb_gamma_table))) { + kfree(viafb_gamma_table); + return -EFAULT; + } + viafb_set_gamma_table(viafb_bpp, viafb_gamma_table); + kfree(viafb_gamma_table); + break; + + case VIAFB_GET_GAMMA_LUT: + viafb_gamma_table = kmalloc(256 * sizeof(u32), GFP_KERNEL); + if (!viafb_gamma_table) + return -ENOMEM; + viafb_get_gamma_table(viafb_gamma_table); + if (copy_to_user(argp, viafb_gamma_table, + sizeof(viafb_gamma_table))) { + kfree(viafb_gamma_table); + return -EFAULT; + } + kfree(viafb_gamma_table); + break; + + case VIAFB_GET_GAMMA_SUPPORT_STATE: + viafb_get_gamma_support_state(viafb_bpp, &state_info); + if (put_user(state_info, argp)) + return -EFAULT; + break; + case VIAFB_SET_VIDEO_DEVICE: + get_user(video_dev_info, argp); + viafb_set_video_device(video_dev_info); + break; + case VIAFB_GET_VIDEO_DEVICE: + viafb_get_video_device(&video_dev_info); + if (put_user(video_dev_info, argp)) + return -EFAULT; + break; + case VIAFB_SYNC_SURFACE: + DEBUG_MSG(KERN_INFO "lobo VIAFB_SYNC_SURFACE\n"); + break; + case VIAFB_GET_DRIVER_CAPS: + break; + + case VIAFB_GET_PANEL_MAX_SIZE: + if (copy_from_user + (&panel_pos_size_para, argp, sizeof(panel_pos_size_para))) + return -EFAULT; + panel_pos_size_para.x = panel_pos_size_para.y = 0; + if (copy_to_user(argp, &panel_pos_size_para, + sizeof(panel_pos_size_para))) + return -EFAULT; + break; + case VIAFB_GET_PANEL_MAX_POSITION: + if (copy_from_user + (&panel_pos_size_para, argp, sizeof(panel_pos_size_para))) + return -EFAULT; + panel_pos_size_para.x = panel_pos_size_para.y = 0; + if (copy_to_user(argp, &panel_pos_size_para, + sizeof(panel_pos_size_para))) + return -EFAULT; + break; + + case VIAFB_GET_PANEL_POSITION: + if (copy_from_user + (&panel_pos_size_para, argp, sizeof(panel_pos_size_para))) + return -EFAULT; + panel_pos_size_para.x = panel_pos_size_para.y = 0; + if (copy_to_user(argp, &panel_pos_size_para, + sizeof(panel_pos_size_para))) + return -EFAULT; + break; + case VIAFB_GET_PANEL_SIZE: + if (copy_from_user + (&panel_pos_size_para, argp, sizeof(panel_pos_size_para))) + return -EFAULT; + panel_pos_size_para.x = panel_pos_size_para.y = 0; + if (copy_to_user(argp, &panel_pos_size_para, + sizeof(panel_pos_size_para))) + return -EFAULT; + break; + + case VIAFB_SET_PANEL_POSITION: + if (copy_from_user + (&panel_pos_size_para, argp, sizeof(panel_pos_size_para))) + return -EFAULT; + break; + case VIAFB_SET_PANEL_SIZE: + if (copy_from_user + (&panel_pos_size_para, argp, sizeof(panel_pos_size_para))) + return -EFAULT; + break; + + default: + return -EINVAL; + } + + return 0; +} + +static void viafb_fillrect(struct fb_info *info, + const struct fb_fillrect *rect) +{ + u32 col = 0, rop = 0; + int pitch; + + if (!viafb_accel) + return cfb_fillrect(info, rect); + + if (!rect->width || !rect->height) + return; + + switch (rect->rop) { + case ROP_XOR: + rop = 0x5A; + break; + case ROP_COPY: + default: + rop = 0xF0; + break; + } + + switch (info->var.bits_per_pixel) { + case 8: + col = rect->color; + break; + case 16: + col = ((u32 *) (info->pseudo_palette))[rect->color]; + break; + case 32: + col = ((u32 *) (info->pseudo_palette))[rect->color]; + break; + } + + /* BitBlt Source Address */ + writel(0x0, viaparinfo->io_virt + VIA_REG_SRCPOS); + /* Source Base Address */ + writel(0x0, viaparinfo->io_virt + VIA_REG_SRCBASE); + /* Destination Base Address */ + writel(((unsigned long) (info->screen_base) - + (unsigned long) viafb_FB_MM) >> 3, + viaparinfo->io_virt + VIA_REG_DSTBASE); + /* Pitch */ + pitch = (info->var.xres_virtual + 7) & ~7; + writel(VIA_PITCH_ENABLE | + (((pitch * + info->var.bits_per_pixel >> 3) >> 3) | + (((pitch * info-> + var.bits_per_pixel >> 3) >> 3) << 16)), + viaparinfo->io_virt + VIA_REG_PITCH); + /* BitBlt Destination Address */ + writel(((rect->dy << 16) | rect->dx), + viaparinfo->io_virt + VIA_REG_DSTPOS); + /* Dimension: width & height */ + writel((((rect->height - 1) << 16) | (rect->width - 1)), + viaparinfo->io_virt + VIA_REG_DIMENSION); + /* Forground color or Destination color */ + writel(col, viaparinfo->io_virt + VIA_REG_FGCOLOR); + /* GE Command */ + writel((0x01 | 0x2000 | (rop << 24)), + viaparinfo->io_virt + VIA_REG_GECMD); + +} + +static void viafb_copyarea(struct fb_info *info, + const struct fb_copyarea *area) +{ + u32 dy = area->dy, sy = area->sy, direction = 0x0; + u32 sx = area->sx, dx = area->dx, width = area->width; + int pitch; + + DEBUG_MSG(KERN_INFO "viafb_copyarea!!\n"); + + if (!viafb_accel) + return cfb_copyarea(info, area); + + if (!area->width || !area->height) + return; + + if (sy < dy) { + dy += area->height - 1; + sy += area->height - 1; + direction |= 0x4000; + } + + if (sx < dx) { + dx += width - 1; + sx += width - 1; + direction |= 0x8000; + } + + /* Source Base Address */ + writel(((unsigned long) (info->screen_base) - + (unsigned long) viafb_FB_MM) >> 3, + viaparinfo->io_virt + VIA_REG_SRCBASE); + /* Destination Base Address */ + writel(((unsigned long) (info->screen_base) - + (unsigned long) viafb_FB_MM) >> 3, + viaparinfo->io_virt + VIA_REG_DSTBASE); + /* Pitch */ + pitch = (info->var.xres_virtual + 7) & ~7; + /* VIA_PITCH_ENABLE can be omitted now. */ + writel(VIA_PITCH_ENABLE | + (((pitch * + info->var.bits_per_pixel >> 3) >> 3) | (((pitch * + info->var. + bits_per_pixel + >> 3) >> 3) + << 16)), + viaparinfo->io_virt + VIA_REG_PITCH); + /* BitBlt Source Address */ + writel(((sy << 16) | sx), viaparinfo->io_virt + VIA_REG_SRCPOS); + /* BitBlt Destination Address */ + writel(((dy << 16) | dx), viaparinfo->io_virt + VIA_REG_DSTPOS); + /* Dimension: width & height */ + writel((((area->height - 1) << 16) | (area->width - 1)), + viaparinfo->io_virt + VIA_REG_DIMENSION); + /* GE Command */ + writel((0x01 | direction | (0xCC << 24)), + viaparinfo->io_virt + VIA_REG_GECMD); + +} + +static void viafb_imageblit(struct fb_info *info, + const struct fb_image *image) +{ + u32 size, bg_col = 0, fg_col = 0, *udata; + int i; + int pitch; + + if (!viafb_accel) + return cfb_imageblit(info, image); + + udata = (u32 *) image->data; + + switch (info->var.bits_per_pixel) { + case 8: + bg_col = image->bg_color; + fg_col = image->fg_color; + break; + case 16: + bg_col = ((u32 *) (info->pseudo_palette))[image->bg_color]; + fg_col = ((u32 *) (info->pseudo_palette))[image->fg_color]; + break; + case 32: + bg_col = ((u32 *) (info->pseudo_palette))[image->bg_color]; + fg_col = ((u32 *) (info->pseudo_palette))[image->fg_color]; + break; + } + size = image->width * image->height; + + /* Source Base Address */ + writel(0x0, viaparinfo->io_virt + VIA_REG_SRCBASE); + /* Destination Base Address */ + writel(((unsigned long) (info->screen_base) - + (unsigned long) viafb_FB_MM) >> 3, + viaparinfo->io_virt + VIA_REG_DSTBASE); + /* Pitch */ + pitch = (info->var.xres_virtual + 7) & ~7; + writel(VIA_PITCH_ENABLE | + (((pitch * + info->var.bits_per_pixel >> 3) >> 3) | (((pitch * + info->var. + bits_per_pixel + >> 3) >> 3) + << 16)), + viaparinfo->io_virt + VIA_REG_PITCH); + /* BitBlt Source Address */ + writel(0x0, viaparinfo->io_virt + VIA_REG_SRCPOS); + /* BitBlt Destination Address */ + writel(((image->dy << 16) | image->dx), + viaparinfo->io_virt + VIA_REG_DSTPOS); + /* Dimension: width & height */ + writel((((image->height - 1) << 16) | (image->width - 1)), + viaparinfo->io_virt + VIA_REG_DIMENSION); + /* fb color */ + writel(fg_col, viaparinfo->io_virt + VIA_REG_FGCOLOR); + /* bg color */ + writel(bg_col, viaparinfo->io_virt + VIA_REG_BGCOLOR); + /* GE Command */ + writel(0xCC020142, viaparinfo->io_virt + VIA_REG_GECMD); + + for (i = 0; i < size / 4; i++) { + writel(*udata, viaparinfo->io_virt + VIA_MMIO_BLTBASE); + udata++; + } + +} + +static int viafb_cursor(struct fb_info *info, struct fb_cursor *cursor) +{ + u8 data[CURSOR_SIZE / 8]; + u32 data_bak[CURSOR_SIZE / 32]; + u32 temp, xx, yy, bg_col = 0, fg_col = 0; + int size, i, j = 0; + static int hw_cursor; + struct viafb_par *p_viafb_par; + + if (viafb_accel) + hw_cursor = 1; + + if (!viafb_accel) { + if (hw_cursor) { + viafb_show_hw_cursor(info, HW_Cursor_OFF); + hw_cursor = 0; + } + return -ENODEV; + } + + if ((((struct viafb_par *)(info->par))->iga_path == IGA2) + && (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)) + return -ENODEV; + + /* When duoview and using lcd , use soft cursor */ + if (viafb_LCD_ON || ((struct viafb_par *)(info->par))->duoview) + return -ENODEV; + + viafb_show_hw_cursor(info, HW_Cursor_OFF); + viacursor = *cursor; + + if (cursor->set & FB_CUR_SETHOT) { + viacursor.hot = cursor->hot; + temp = ((viacursor.hot.x) << 16) + viacursor.hot.y; + writel(temp, viaparinfo->io_virt + VIA_REG_CURSOR_ORG); + } + + if (cursor->set & FB_CUR_SETPOS) { + viacursor.image.dx = cursor->image.dx; + viacursor.image.dy = cursor->image.dy; + yy = cursor->image.dy - info->var.yoffset; + xx = cursor->image.dx - info->var.xoffset; + temp = yy & 0xFFFF; + temp |= (xx << 16); + writel(temp, viaparinfo->io_virt + VIA_REG_CURSOR_POS); + } + + if (cursor->set & FB_CUR_SETSIZE) { + temp = readl(viaparinfo->io_virt + VIA_REG_CURSOR_MODE); + + if ((cursor->image.width <= 32) + && (cursor->image.height <= 32)) { + MAX_CURS = 32; + temp |= 0x2; + } else if ((cursor->image.width <= 64) + && (cursor->image.height <= 64)) { + MAX_CURS = 64; + temp &= 0xFFFFFFFD; + } else { + DEBUG_MSG(KERN_INFO + "The cursor image is biger than 64x64 bits...\n"); + return -ENXIO; + } + writel(temp, viaparinfo->io_virt + VIA_REG_CURSOR_MODE); + + viacursor.image.height = cursor->image.height; + viacursor.image.width = cursor->image.width; + } + + if (cursor->set & FB_CUR_SETCMAP) { + viacursor.image.fg_color = cursor->image.fg_color; + viacursor.image.bg_color = cursor->image.bg_color; + + switch (info->var.bits_per_pixel) { + case 8: + case 16: + case 32: + bg_col = + (0xFF << 24) | + (((info->cmap.red)[viacursor.image.bg_color] & + 0xFF00) << 8) | + ((info->cmap.green)[viacursor.image.bg_color] & + 0xFF00) | + (((info->cmap.blue)[viacursor.image.bg_color] & + 0xFF00) >> 8); + fg_col = + (0xFF << 24) | + (((info->cmap.red)[viacursor.image.fg_color] & + 0xFF00) << 8) | + ((info->cmap.green)[viacursor.image.fg_color] & + 0xFF00) | + (((info->cmap.blue)[viacursor.image.fg_color] & + 0xFF00) >> 8); + break; + default: + return 0; + } + + /* This is indeed a patch for VT3324/VT3353 */ + if (!info->par) + return 0; + p_viafb_par = (struct viafb_par *)info->par; + + if ((p_viafb_par->chip_info->gfx_chip_name == + UNICHROME_CX700) || + ((p_viafb_par->chip_info->gfx_chip_name == + UNICHROME_VX800))) { + bg_col = + (((info->cmap.red)[viacursor.image.bg_color] & + 0xFFC0) << 14) | + (((info->cmap.green)[viacursor.image.bg_color] & + 0xFFC0) << 4) | + (((info->cmap.blue)[viacursor.image.bg_color] & + 0xFFC0) >> 6); + fg_col = + (((info->cmap.red)[viacursor.image.fg_color] & + 0xFFC0) << 14) | + (((info->cmap.green)[viacursor.image.fg_color] & + 0xFFC0) << 4) | + (((info->cmap.blue)[viacursor.image.fg_color] & + 0xFFC0) >> 6); + } + + writel(bg_col, viaparinfo->io_virt + VIA_REG_CURSOR_BG); + writel(fg_col, viaparinfo->io_virt + VIA_REG_CURSOR_FG); + } + + if (cursor->set & FB_CUR_SETSHAPE) { + size = + ((viacursor.image.width + 7) >> 3) * + viacursor.image.height; + + if (MAX_CURS == 32) { + for (i = 0; i < (CURSOR_SIZE / 32); i++) { + data_bak[i] = 0x0; + data_bak[i + 1] = 0xFFFFFFFF; + i += 1; + } + } else if (MAX_CURS == 64) { + for (i = 0; i < (CURSOR_SIZE / 32); i++) { + data_bak[i] = 0x0; + data_bak[i + 1] = 0x0; + data_bak[i + 2] = 0xFFFFFFFF; + data_bak[i + 3] = 0xFFFFFFFF; + i += 3; + } + } + + switch (viacursor.rop) { + case ROP_XOR: + for (i = 0; i < size; i++) + data[i] = viacursor.mask[i]; + break; + case ROP_COPY: + + for (i = 0; i < size; i++) + data[i] = viacursor.mask[i]; + break; + default: + break; + } + + if (MAX_CURS == 32) { + for (i = 0; i < size; i++) { + data_bak[j] = (u32) data[i]; + data_bak[j + 1] = ~data_bak[j]; + j += 2; + } + } else if (MAX_CURS == 64) { + for (i = 0; i < size; i++) { + data_bak[j] = (u32) data[i]; + data_bak[j + 1] = 0x0; + data_bak[j + 2] = ~data_bak[j]; + data_bak[j + 3] = ~data_bak[j + 1]; + j += 4; + } + } + + memcpy(((struct viafb_par *)(info->par))->fbmem_virt + + ((struct viafb_par *)(info->par))->cursor_start, + data_bak, CURSOR_SIZE); + } + + if (viacursor.enable) + viafb_show_hw_cursor(info, HW_Cursor_ON); + + return 0; +} + +static int viafb_sync(struct fb_info *info) +{ + if (viafb_accel) + viafb_wait_engine_idle(); + return 0; +} + +int viafb_get_mode_index(int hres, int vres, int flag) +{ + u32 i; + DEBUG_MSG(KERN_INFO "viafb_get_mode_index!\n"); + + for (i = 0; viafb_modentry[i].mode_index != VIA_RES_INVALID; i++) + if (viafb_modentry[i].xres == hres && + viafb_modentry[i].yres == vres) + break; + + viafb_resMode = viafb_modentry[i].mode_index; + if (flag) + viafb_mode1 = viafb_modentry[i].mode_res; + else + viafb_mode = viafb_modentry[i].mode_res; + + return viafb_resMode; +} + +static void check_available_device_to_enable(int device_id) +{ + int device_num = 0; + + /* Initialize: */ + viafb_CRT_ON = STATE_OFF; + viafb_DVI_ON = STATE_OFF; + viafb_LCD_ON = STATE_OFF; + viafb_LCD2_ON = STATE_OFF; + viafb_DeviceStatus = None_Device; + + if ((device_id & CRT_Device) && (device_num < MAX_ACTIVE_DEV_NUM)) { + viafb_CRT_ON = STATE_ON; + device_num++; + viafb_DeviceStatus |= CRT_Device; + } + + if ((device_id & DVI_Device) && (device_num < MAX_ACTIVE_DEV_NUM)) { + viafb_DVI_ON = STATE_ON; + device_num++; + viafb_DeviceStatus |= DVI_Device; + } + + if ((device_id & LCD_Device) && (device_num < MAX_ACTIVE_DEV_NUM)) { + viafb_LCD_ON = STATE_ON; + device_num++; + viafb_DeviceStatus |= LCD_Device; + } + + if ((device_id & LCD2_Device) && (device_num < MAX_ACTIVE_DEV_NUM)) { + viafb_LCD2_ON = STATE_ON; + device_num++; + viafb_DeviceStatus |= LCD2_Device; + } + + if (viafb_DeviceStatus == None_Device) { + /* Use CRT as default active device: */ + viafb_CRT_ON = STATE_ON; + viafb_DeviceStatus = CRT_Device; + } + DEBUG_MSG(KERN_INFO "Device Status:%x", viafb_DeviceStatus); +} + +static void viafb_set_device(struct device_t active_dev) +{ + /* Check available device to enable: */ + int device_id = None_Device; + if (active_dev.crt) + device_id |= CRT_Device; + if (active_dev.dvi) + device_id |= DVI_Device; + if (active_dev.lcd) + device_id |= LCD_Device; + + check_available_device_to_enable(device_id); + + /* Check property of LCD: */ + if (viafb_LCD_ON) { + if (active_dev.lcd_dsp_cent) { + viaparinfo->lvds_setting_info->display_method = + viafb_lcd_dsp_method = LCD_CENTERING; + } else { + viaparinfo->lvds_setting_info->display_method = + viafb_lcd_dsp_method = LCD_EXPANDSION; + } + + if (active_dev.lcd_mode == LCD_SPWG) { + viaparinfo->lvds_setting_info->lcd_mode = + viafb_lcd_mode = LCD_SPWG; + } else { + viaparinfo->lvds_setting_info->lcd_mode = + viafb_lcd_mode = LCD_OPENLDI; + } + + if (active_dev.lcd_panel_id <= LCD_PANEL_ID_MAXIMUM) { + viafb_lcd_panel_id = active_dev.lcd_panel_id; + viafb_init_lcd_size(); + } + } + + /* Check property of mode: */ + if (!active_dev.xres1) + viafb_second_xres = 640; + else + viafb_second_xres = active_dev.xres1; + if (!active_dev.yres1) + viafb_second_yres = 480; + else + viafb_second_yres = active_dev.yres1; + if (active_dev.bpp != 0) + viafb_bpp = active_dev.bpp; + if (active_dev.bpp1 != 0) + viafb_bpp1 = active_dev.bpp1; + if (active_dev.refresh != 0) + viafb_refresh = active_dev.refresh; + if (active_dev.refresh1 != 0) + viafb_refresh1 = active_dev.refresh1; + if ((active_dev.samm == STATE_OFF) || (active_dev.samm == STATE_ON)) + viafb_SAMM_ON = active_dev.samm; + viafb_primary_dev = active_dev.primary_dev; + + viafb_set_start_addr(); + viafb_set_iga_path(); +} + +static void viafb_set_video_device(u32 video_dev_info) +{ + viaparinfo->video_on_crt = STATE_OFF; + viaparinfo->video_on_dvi = STATE_OFF; + viaparinfo->video_on_lcd = STATE_OFF; + + /* Check available device to enable: */ + if ((video_dev_info & CRT_Device) == CRT_Device) + viaparinfo->video_on_crt = STATE_ON; + else if ((video_dev_info & DVI_Device) == DVI_Device) + viaparinfo->video_on_dvi = STATE_ON; + else if ((video_dev_info & LCD_Device) == LCD_Device) + viaparinfo->video_on_lcd = STATE_ON; +} + +static void viafb_get_video_device(u32 *video_dev_info) +{ + *video_dev_info = None_Device; + if (viaparinfo->video_on_crt == STATE_ON) + *video_dev_info |= CRT_Device; + else if (viaparinfo->video_on_dvi == STATE_ON) + *video_dev_info |= DVI_Device; + else if (viaparinfo->video_on_lcd == STATE_ON) + *video_dev_info |= LCD_Device; +} + +static int get_primary_device(void) +{ + int primary_device = 0; + /* Rule: device on iga1 path are the primary device. */ + if (viafb_SAMM_ON) { + if (viafb_CRT_ON) { + if (viaparinfo->crt_setting_info->iga_path == IGA1) { + DEBUG_MSG(KERN_INFO "CRT IGA Path:%d\n", + viaparinfo-> + crt_setting_info->iga_path); + primary_device = CRT_Device; + } + } + if (viafb_DVI_ON) { + if (viaparinfo->tmds_setting_info->iga_path == IGA1) { + DEBUG_MSG(KERN_INFO "DVI IGA Path:%d\n", + viaparinfo-> + tmds_setting_info->iga_path); + primary_device = DVI_Device; + } + } + if (viafb_LCD_ON) { + if (viaparinfo->lvds_setting_info->iga_path == IGA1) { + DEBUG_MSG(KERN_INFO "LCD IGA Path:%d\n", + viaparinfo-> + lvds_setting_info->iga_path); + primary_device = LCD_Device; + } + } + if (viafb_LCD2_ON) { + if (viaparinfo->lvds_setting_info2->iga_path == IGA1) { + DEBUG_MSG(KERN_INFO "LCD2 IGA Path:%d\n", + viaparinfo-> + lvds_setting_info2->iga_path); + primary_device = LCD2_Device; + } + } + } + return primary_device; +} + +static u8 is_duoview(void) +{ + if (0 == viafb_SAMM_ON) { + if (viafb_LCD_ON + viafb_LCD2_ON + + viafb_DVI_ON + viafb_CRT_ON == 2) + return true; + return false; + } else { + return false; + } +} + +static void apply_second_mode_setting(struct fb_var_screeninfo + *sec_var) +{ + u32 htotal, vtotal, long_refresh; + + htotal = sec_var->xres + sec_var->left_margin + + sec_var->right_margin + sec_var->hsync_len; + vtotal = sec_var->yres + sec_var->upper_margin + + sec_var->lower_margin + sec_var->vsync_len; + if ((sec_var->xres_virtual * (sec_var->bits_per_pixel >> 3)) & 0x1F) { + /*Is 32 bytes alignment? */ + /*32 pixel alignment */ + sec_var->xres_virtual = (sec_var->xres_virtual + 31) & ~31; + } + + htotal = sec_var->xres + sec_var->left_margin + + sec_var->right_margin + sec_var->hsync_len; + vtotal = sec_var->yres + sec_var->upper_margin + + sec_var->lower_margin + sec_var->vsync_len; + long_refresh = 1000000000UL / sec_var->pixclock * 1000; + long_refresh /= (htotal * vtotal); + + viafb_second_xres = sec_var->xres; + viafb_second_yres = sec_var->yres; + viafb_second_virtual_xres = sec_var->xres_virtual; + viafb_second_virtual_yres = sec_var->yres_virtual; + viafb_bpp1 = sec_var->bits_per_pixel; + viafb_refresh1 = viafb_get_refresh(sec_var->xres, sec_var->yres, + long_refresh); +} + +static int apply_device_setting(struct viafb_ioctl_setting setting_info, + struct fb_info *info) +{ + int need_set_mode = 0; + DEBUG_MSG(KERN_INFO "apply_device_setting\n"); + + if (setting_info.device_flag) { + need_set_mode = 1; + check_available_device_to_enable(setting_info.device_status); + } + + /* Unlock LCD's operation according to LCD flag + and check if the setting value is valid. */ + /* If the value is valid, apply the new setting value to the device. */ + if (viafb_LCD_ON) { + if (setting_info.lcd_operation_flag & OP_LCD_CENTERING) { + need_set_mode = 1; + if (setting_info.lcd_attributes.display_center) { + /* Centering */ + viaparinfo->lvds_setting_info->display_method = + LCD_CENTERING; + viafb_lcd_dsp_method = LCD_CENTERING; + viaparinfo->lvds_setting_info2->display_method = + viafb_lcd_dsp_method = LCD_CENTERING; + } else { + /* expandsion */ + viaparinfo->lvds_setting_info->display_method = + LCD_EXPANDSION; + viafb_lcd_dsp_method = LCD_EXPANDSION; + viaparinfo->lvds_setting_info2->display_method = + LCD_EXPANDSION; + viafb_lcd_dsp_method = LCD_EXPANDSION; + } + } + + if (setting_info.lcd_operation_flag & OP_LCD_MODE) { + need_set_mode = 1; + if (setting_info.lcd_attributes.lcd_mode == + LCD_SPWG) { + viaparinfo->lvds_setting_info->lcd_mode = + viafb_lcd_mode = LCD_SPWG; + } else { + viaparinfo->lvds_setting_info->lcd_mode = + viafb_lcd_mode = LCD_OPENLDI; + } + viaparinfo->lvds_setting_info2->lcd_mode = + viaparinfo->lvds_setting_info->lcd_mode; + } + + if (setting_info.lcd_operation_flag & OP_LCD_PANEL_ID) { + need_set_mode = 1; + if (setting_info.lcd_attributes.panel_id <= + LCD_PANEL_ID_MAXIMUM) { + viafb_lcd_panel_id = + setting_info.lcd_attributes.panel_id; + viafb_init_lcd_size(); + } + } + } + + if (0 != (setting_info.samm_status & OP_SAMM)) { + setting_info.samm_status = + setting_info.samm_status & (~OP_SAMM); + if (setting_info.samm_status == 0 + || setting_info.samm_status == 1) { + viafb_SAMM_ON = setting_info.samm_status; + + if (viafb_SAMM_ON) + viafb_primary_dev = setting_info.primary_device; + + viafb_set_start_addr(); + viafb_set_iga_path(); + } + need_set_mode = 1; + } + + viaparinfo->duoview = is_duoview(); + + if (!need_set_mode) { + ; + } else { + viafb_set_iga_path(); + viafb_set_par(info); + } + return true; +} + +static void retrieve_device_setting(struct viafb_ioctl_setting + *setting_info) +{ + + /* get device status */ + if (viafb_CRT_ON == 1) + setting_info->device_status = CRT_Device; + if (viafb_DVI_ON == 1) + setting_info->device_status |= DVI_Device; + if (viafb_LCD_ON == 1) + setting_info->device_status |= LCD_Device; + if (viafb_LCD2_ON == 1) + setting_info->device_status |= LCD2_Device; + if ((viaparinfo->video_on_crt == 1) && (viafb_CRT_ON == 1)) { + setting_info->video_device_status = + viaparinfo->crt_setting_info->iga_path; + } else if ((viaparinfo->video_on_dvi == 1) && (viafb_DVI_ON == 1)) { + setting_info->video_device_status = + viaparinfo->tmds_setting_info->iga_path; + } else if ((viaparinfo->video_on_lcd == 1) && (viafb_LCD_ON == 1)) { + setting_info->video_device_status = + viaparinfo->lvds_setting_info->iga_path; + } else { + setting_info->video_device_status = 0; + } + + setting_info->samm_status = viafb_SAMM_ON; + setting_info->primary_device = get_primary_device(); + + setting_info->first_dev_bpp = viafb_bpp; + setting_info->second_dev_bpp = viafb_bpp1; + + setting_info->first_dev_refresh = viafb_refresh; + setting_info->second_dev_refresh = viafb_refresh1; + + setting_info->first_dev_hor_res = viafb_hotplug_Xres; + setting_info->first_dev_ver_res = viafb_hotplug_Yres; + setting_info->second_dev_hor_res = viafb_second_xres; + setting_info->second_dev_ver_res = viafb_second_yres; + + /* Get lcd attributes */ + setting_info->lcd_attributes.display_center = viafb_lcd_dsp_method; + setting_info->lcd_attributes.panel_id = viafb_lcd_panel_id; + setting_info->lcd_attributes.lcd_mode = viafb_lcd_mode; +} + +static void parse_active_dev(void) +{ + viafb_CRT_ON = STATE_OFF; + viafb_DVI_ON = STATE_OFF; + viafb_LCD_ON = STATE_OFF; + viafb_LCD2_ON = STATE_OFF; + /* 1. Modify the active status of devices. */ + /* 2. Keep the order of devices, so we can set corresponding + IGA path to devices in SAMM case. */ + /* Note: The previous of active_dev is primary device, + and the following is secondary device. */ + if (!strncmp(viafb_active_dev, "CRT+DVI", 7)) { + /* CRT+DVI */ + viafb_CRT_ON = STATE_ON; + viafb_DVI_ON = STATE_ON; + viafb_primary_dev = CRT_Device; + } else if (!strncmp(viafb_active_dev, "DVI+CRT", 7)) { + /* DVI+CRT */ + viafb_CRT_ON = STATE_ON; + viafb_DVI_ON = STATE_ON; + viafb_primary_dev = DVI_Device; + } else if (!strncmp(viafb_active_dev, "CRT+LCD", 7)) { + /* CRT+LCD */ + viafb_CRT_ON = STATE_ON; + viafb_LCD_ON = STATE_ON; + viafb_primary_dev = CRT_Device; + } else if (!strncmp(viafb_active_dev, "LCD+CRT", 7)) { + /* LCD+CRT */ + viafb_CRT_ON = STATE_ON; + viafb_LCD_ON = STATE_ON; + viafb_primary_dev = LCD_Device; + } else if (!strncmp(viafb_active_dev, "DVI+LCD", 7)) { + /* DVI+LCD */ + viafb_DVI_ON = STATE_ON; + viafb_LCD_ON = STATE_ON; + viafb_primary_dev = DVI_Device; + } else if (!strncmp(viafb_active_dev, "LCD+DVI", 7)) { + /* LCD+DVI */ + viafb_DVI_ON = STATE_ON; + viafb_LCD_ON = STATE_ON; + viafb_primary_dev = LCD_Device; + } else if (!strncmp(viafb_active_dev, "LCD+LCD2", 8)) { + viafb_LCD_ON = STATE_ON; + viafb_LCD2_ON = STATE_ON; + viafb_primary_dev = LCD_Device; + } else if (!strncmp(viafb_active_dev, "LCD2+LCD", 8)) { + viafb_LCD_ON = STATE_ON; + viafb_LCD2_ON = STATE_ON; + viafb_primary_dev = LCD2_Device; + } else if (!strncmp(viafb_active_dev, "CRT", 3)) { + /* CRT only */ + viafb_CRT_ON = STATE_ON; + viafb_SAMM_ON = STATE_OFF; + } else if (!strncmp(viafb_active_dev, "DVI", 3)) { + /* DVI only */ + viafb_DVI_ON = STATE_ON; + viafb_SAMM_ON = STATE_OFF; + } else if (!strncmp(viafb_active_dev, "LCD", 3)) { + /* LCD only */ + viafb_LCD_ON = STATE_ON; + viafb_SAMM_ON = STATE_OFF; + } else { + viafb_CRT_ON = STATE_ON; + viafb_SAMM_ON = STATE_OFF; + } + viaparinfo->duoview = is_duoview(); +} + +static void parse_video_dev(void) +{ + viaparinfo->video_on_crt = STATE_OFF; + viaparinfo->video_on_dvi = STATE_OFF; + viaparinfo->video_on_lcd = STATE_OFF; + + if (!strncmp(viafb_video_dev, "CRT", 3)) { + /* Video on CRT */ + viaparinfo->video_on_crt = STATE_ON; + } else if (!strncmp(viafb_video_dev, "DVI", 3)) { + /* Video on DVI */ + viaparinfo->video_on_dvi = STATE_ON; + } else if (!strncmp(viafb_video_dev, "LCD", 3)) { + /* Video on LCD */ + viaparinfo->video_on_lcd = STATE_ON; + } +} + +static int parse_port(char *opt_str, int *output_interface) +{ + if (!strncmp(opt_str, "DVP0", 4)) + *output_interface = INTERFACE_DVP0; + else if (!strncmp(opt_str, "DVP1", 4)) + *output_interface = INTERFACE_DVP1; + else if (!strncmp(opt_str, "DFP_HIGHLOW", 11)) + *output_interface = INTERFACE_DFP; + else if (!strncmp(opt_str, "DFP_HIGH", 8)) + *output_interface = INTERFACE_DFP_HIGH; + else if (!strncmp(opt_str, "DFP_LOW", 7)) + *output_interface = INTERFACE_DFP_LOW; + else + *output_interface = INTERFACE_NONE; + return 0; +} + +static void parse_lcd_port(void) +{ + parse_port(viafb_lcd_port, &viaparinfo->chip_info->lvds_chip_info. + output_interface); + /*Initialize to avoid unexpected behavior */ + viaparinfo->chip_info->lvds_chip_info2.output_interface = + INTERFACE_NONE; + + DEBUG_MSG(KERN_INFO "parse_lcd_port: viafb_lcd_port:%s,interface:%d\n", + viafb_lcd_port, viaparinfo->chip_info->lvds_chip_info. + output_interface); +} + +static void parse_dvi_port(void) +{ + parse_port(viafb_dvi_port, &viaparinfo->chip_info->tmds_chip_info. + output_interface); + + DEBUG_MSG(KERN_INFO "parse_dvi_port: viafb_dvi_port:%s,interface:%d\n", + viafb_dvi_port, viaparinfo->chip_info->tmds_chip_info. + output_interface); +} + +/* + * The proc filesystem read/write function, a simple proc implement to + * get/set the value of DPA DVP0, DVP0DataDriving, DVP0ClockDriving, DVP1, + * DVP1Driving, DFPHigh, DFPLow CR96, SR2A[5], SR1B[1], SR2A[4], SR1E[2], + * CR9B, SR65, CR97, CR99 + */ +static int viafb_dvp0_proc_read(char *buf, char **start, off_t offset, +int count, int *eof, void *data) +{ + int len = 0; + u8 dvp0_data_dri = 0, dvp0_clk_dri = 0, dvp0 = 0; + dvp0_data_dri = + (viafb_read_reg(VIASR, SR2A) & BIT5) >> 4 | + (viafb_read_reg(VIASR, SR1B) & BIT1) >> 1; + dvp0_clk_dri = + (viafb_read_reg(VIASR, SR2A) & BIT4) >> 3 | + (viafb_read_reg(VIASR, SR1E) & BIT2) >> 2; + dvp0 = viafb_read_reg(VIACR, CR96) & 0x0f; + len += + sprintf(buf + len, "%x %x %x\n", dvp0, dvp0_data_dri, dvp0_clk_dri); + *eof = 1; /*Inform kernel end of data */ + return len; +} +static int viafb_dvp0_proc_write(struct file *file, + const char __user *buffer, unsigned long count, void *data) +{ + char buf[20], *value, *pbuf; + u8 reg_val = 0; + unsigned long length, i; + if (count < 1) + return -EINVAL; + length = count > 20 ? 20 : count; + if (copy_from_user(&buf[0], buffer, length)) + return -EFAULT; + buf[length - 1] = '\0'; /*Ensure end string */ + pbuf = &buf[0]; + for (i = 0; i < 3; i++) { + value = strsep(&pbuf, " "); + if (value != NULL) { + strict_strtoul(value, 0, (unsigned long *)®_val); + DEBUG_MSG(KERN_INFO "DVP0:reg_val[%l]=:%x\n", i, + reg_val); + switch (i) { + case 0: + viafb_write_reg_mask(CR96, VIACR, + reg_val, 0x0f); + break; + case 1: + viafb_write_reg_mask(SR2A, VIASR, + reg_val << 4, BIT5); + viafb_write_reg_mask(SR1B, VIASR, + reg_val << 1, BIT1); + break; + case 2: + viafb_write_reg_mask(SR2A, VIASR, + reg_val << 3, BIT4); + viafb_write_reg_mask(SR1E, VIASR, + reg_val << 2, BIT2); + break; + default: + break; + } + } else { + break; + } + } + return count; +} +static int viafb_dvp1_proc_read(char *buf, char **start, off_t offset, + int count, int *eof, void *data) +{ + int len = 0; + u8 dvp1 = 0, dvp1_data_dri = 0, dvp1_clk_dri = 0; + dvp1 = viafb_read_reg(VIACR, CR9B) & 0x0f; + dvp1_data_dri = (viafb_read_reg(VIASR, SR65) & 0x0c) >> 2; + dvp1_clk_dri = viafb_read_reg(VIASR, SR65) & 0x03; + len += + sprintf(buf + len, "%x %x %x\n", dvp1, dvp1_data_dri, dvp1_clk_dri); + *eof = 1; /*Inform kernel end of data */ + return len; +} +static int viafb_dvp1_proc_write(struct file *file, + const char __user *buffer, unsigned long count, void *data) +{ + char buf[20], *value, *pbuf; + u8 reg_val = 0; + unsigned long length, i; + if (count < 1) + return -EINVAL; + length = count > 20 ? 20 : count; + if (copy_from_user(&buf[0], buffer, length)) + return -EFAULT; + buf[length - 1] = '\0'; /*Ensure end string */ + pbuf = &buf[0]; + for (i = 0; i < 3; i++) { + value = strsep(&pbuf, " "); + if (value != NULL) { + strict_strtoul(value, 0, (unsigned long *)®_val); + switch (i) { + case 0: + viafb_write_reg_mask(CR9B, VIACR, + reg_val, 0x0f); + break; + case 1: + viafb_write_reg_mask(SR65, VIASR, + reg_val << 2, 0x0c); + break; + case 2: + viafb_write_reg_mask(SR65, VIASR, + reg_val, 0x03); + break; + default: + break; + } + } else { + break; + } + } + return count; +} + +static int viafb_dfph_proc_read(char *buf, char **start, off_t offset, + int count, int *eof, void *data) +{ + int len = 0; + u8 dfp_high = 0; + dfp_high = viafb_read_reg(VIACR, CR97) & 0x0f; + len += sprintf(buf + len, "%x\n", dfp_high); + *eof = 1; /*Inform kernel end of data */ + return len; +} +static int viafb_dfph_proc_write(struct file *file, + const char __user *buffer, unsigned long count, void *data) +{ + char buf[20]; + u8 reg_val = 0; + unsigned long length; + if (count < 1) + return -EINVAL; + length = count > 20 ? 20 : count; + if (copy_from_user(&buf[0], buffer, length)) + return -EFAULT; + buf[length - 1] = '\0'; /*Ensure end string */ + strict_strtoul(&buf[0], 0, (unsigned long *)®_val); + viafb_write_reg_mask(CR97, VIACR, reg_val, 0x0f); + return count; +} +static int viafb_dfpl_proc_read(char *buf, char **start, off_t offset, + int count, int *eof, void *data) +{ + int len = 0; + u8 dfp_low = 0; + dfp_low = viafb_read_reg(VIACR, CR99) & 0x0f; + len += sprintf(buf + len, "%x\n", dfp_low); + *eof = 1; /*Inform kernel end of data */ + return len; +} +static int viafb_dfpl_proc_write(struct file *file, + const char __user *buffer, unsigned long count, void *data) +{ + char buf[20]; + u8 reg_val = 0; + unsigned long length; + if (count < 1) + return -EINVAL; + length = count > 20 ? 20 : count; + if (copy_from_user(&buf[0], buffer, length)) + return -EFAULT; + buf[length - 1] = '\0'; /*Ensure end string */ + strict_strtoul(&buf[0], 0, (unsigned long *)®_val); + viafb_write_reg_mask(CR99, VIACR, reg_val, 0x0f); + return count; +} +static int viafb_vt1636_proc_read(char *buf, char **start, + off_t offset, int count, int *eof, void *data) +{ + int len = 0; + u8 vt1636_08 = 0, vt1636_09 = 0; + switch (viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) { + case VT1636_LVDS: + vt1636_08 = + viafb_gpio_i2c_read_lvds(viaparinfo->lvds_setting_info, + &viaparinfo->chip_info->lvds_chip_info, 0x08) & 0x0f; + vt1636_09 = + viafb_gpio_i2c_read_lvds(viaparinfo->lvds_setting_info, + &viaparinfo->chip_info->lvds_chip_info, 0x09) & 0x1f; + len += sprintf(buf + len, "%x %x\n", vt1636_08, vt1636_09); + break; + default: + break; + } + switch (viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name) { + case VT1636_LVDS: + vt1636_08 = + viafb_gpio_i2c_read_lvds(viaparinfo->lvds_setting_info2, + &viaparinfo->chip_info->lvds_chip_info2, 0x08) & 0x0f; + vt1636_09 = + viafb_gpio_i2c_read_lvds(viaparinfo->lvds_setting_info2, + &viaparinfo->chip_info->lvds_chip_info2, 0x09) & 0x1f; + len += sprintf(buf + len, " %x %x\n", vt1636_08, vt1636_09); + break; + default: + break; + } + *eof = 1; /*Inform kernel end of data */ + return len; +} +static int viafb_vt1636_proc_write(struct file *file, + const char __user *buffer, unsigned long count, void *data) +{ + char buf[30], *value, *pbuf; + struct IODATA reg_val; + unsigned long length, i; + if (count < 1) + return -EINVAL; + length = count > 30 ? 30 : count; + if (copy_from_user(&buf[0], buffer, length)) + return -EFAULT; + buf[length - 1] = '\0'; /*Ensure end string */ + pbuf = &buf[0]; + switch (viaparinfo->chip_info->lvds_chip_info.lvds_chip_name) { + case VT1636_LVDS: + for (i = 0; i < 2; i++) { + value = strsep(&pbuf, " "); + if (value != NULL) { + strict_strtoul(value, 0, + (unsigned long *)®_val.Data); + switch (i) { + case 0: + reg_val.Index = 0x08; + reg_val.Mask = 0x0f; + viafb_gpio_i2c_write_mask_lvds + (viaparinfo->lvds_setting_info, + &viaparinfo-> + chip_info->lvds_chip_info, + reg_val); + break; + case 1: + reg_val.Index = 0x09; + reg_val.Mask = 0x1f; + viafb_gpio_i2c_write_mask_lvds + (viaparinfo->lvds_setting_info, + &viaparinfo-> + chip_info->lvds_chip_info, + reg_val); + break; + default: + break; + } + } else { + break; + } + } + break; + default: + break; + } + switch (viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name) { + case VT1636_LVDS: + for (i = 0; i < 2; i++) { + value = strsep(&pbuf, " "); + if (value != NULL) { + strict_strtoul(value, 0, + (unsigned long *)®_val.Data); + switch (i) { + case 0: + reg_val.Index = 0x08; + reg_val.Mask = 0x0f; + viafb_gpio_i2c_write_mask_lvds + (viaparinfo->lvds_setting_info2, + &viaparinfo-> + chip_info->lvds_chip_info2, + reg_val); + break; + case 1: + reg_val.Index = 0x09; + reg_val.Mask = 0x1f; + viafb_gpio_i2c_write_mask_lvds + (viaparinfo->lvds_setting_info2, + &viaparinfo-> + chip_info->lvds_chip_info2, + reg_val); + break; + default: + break; + } + } else { + break; + } + } + break; + default: + break; + } + return count; +} + +static void viafb_init_proc(struct proc_dir_entry *viafb_entry) +{ + struct proc_dir_entry *entry; + viafb_entry = proc_mkdir("viafb", NULL); + if (viafb_entry) { + entry = create_proc_entry("dvp0", 0, viafb_entry); + if (entry) { + entry->owner = THIS_MODULE; + entry->read_proc = viafb_dvp0_proc_read; + entry->write_proc = viafb_dvp0_proc_write; + } + entry = create_proc_entry("dvp1", 0, viafb_entry); + if (entry) { + entry->owner = THIS_MODULE; + entry->read_proc = viafb_dvp1_proc_read; + entry->write_proc = viafb_dvp1_proc_write; + } + entry = create_proc_entry("dfph", 0, viafb_entry); + if (entry) { + entry->owner = THIS_MODULE; + entry->read_proc = viafb_dfph_proc_read; + entry->write_proc = viafb_dfph_proc_write; + } + entry = create_proc_entry("dfpl", 0, viafb_entry); + if (entry) { + entry->owner = THIS_MODULE; + entry->read_proc = viafb_dfpl_proc_read; + entry->write_proc = viafb_dfpl_proc_write; + } + if (VT1636_LVDS == viaparinfo->chip_info->lvds_chip_info. + lvds_chip_name || VT1636_LVDS == + viaparinfo->chip_info->lvds_chip_info2.lvds_chip_name) { + entry = create_proc_entry("vt1636", 0, viafb_entry); + if (entry) { + entry->owner = THIS_MODULE; + entry->read_proc = viafb_vt1636_proc_read; + entry->write_proc = viafb_vt1636_proc_write; + } + } + + } +} +static void viafb_remove_proc(struct proc_dir_entry *viafb_entry) +{ + /* no problem if it was not registered */ + remove_proc_entry("dvp0", viafb_entry);/* parent dir */ + remove_proc_entry("dvp1", viafb_entry); + remove_proc_entry("dfph", viafb_entry); + remove_proc_entry("dfpl", viafb_entry); + remove_proc_entry("vt1636", viafb_entry); + remove_proc_entry("vt1625", viafb_entry); +} + +static int __devinit via_pci_probe(void) +{ + unsigned int default_xres, default_yres; + char *tmpc, *tmpm; + char *tmpc_sec, *tmpm_sec; + int vmode_index; + u32 tmds_length, lvds_length, crt_length, chip_length, viafb_par_length; + + DEBUG_MSG(KERN_INFO "VIAFB PCI Probe!!\n"); + + viafb_par_length = ALIGN(sizeof(struct viafb_par), BITS_PER_LONG/8); + tmds_length = ALIGN(sizeof(struct tmds_setting_information), + BITS_PER_LONG/8); + lvds_length = ALIGN(sizeof(struct lvds_setting_information), + BITS_PER_LONG/8); + crt_length = ALIGN(sizeof(struct lvds_setting_information), + BITS_PER_LONG/8); + chip_length = ALIGN(sizeof(struct chip_information), BITS_PER_LONG/8); + + /* Allocate fb_info and ***_par here, also including some other needed + * variables + */ + viafbinfo = framebuffer_alloc(viafb_par_length + 2 * lvds_length + + tmds_length + crt_length + chip_length, NULL); + if (!viafbinfo) { + printk(KERN_ERR"Could not allocate memory for viafb_info.\n"); + return -ENODEV; + } + + viaparinfo = (struct viafb_par *)viafbinfo->par; + viaparinfo->tmds_setting_info = (struct tmds_setting_information *) + ((unsigned long)viaparinfo + viafb_par_length); + viaparinfo->lvds_setting_info = (struct lvds_setting_information *) + ((unsigned long)viaparinfo->tmds_setting_info + tmds_length); + viaparinfo->lvds_setting_info2 = (struct lvds_setting_information *) + ((unsigned long)viaparinfo->lvds_setting_info + lvds_length); + viaparinfo->crt_setting_info = (struct crt_setting_information *) + ((unsigned long)viaparinfo->lvds_setting_info2 + lvds_length); + viaparinfo->chip_info = (struct chip_information *) + ((unsigned long)viaparinfo->crt_setting_info + crt_length); + + if (viafb_dual_fb) + viafb_SAMM_ON = 1; + parse_active_dev(); + parse_video_dev(); + parse_lcd_port(); + parse_dvi_port(); + + /* for dual-fb must viafb_SAMM_ON=1 and viafb_dual_fb=1 */ + if (!viafb_SAMM_ON) + viafb_dual_fb = 0; + + /* Set up I2C bus stuff */ + viafb_create_i2c_bus(viaparinfo); + + viafb_init_chip_info(); + viafb_get_fb_info(&viaparinfo->fbmem, &viaparinfo->memsize); + viaparinfo->fbmem_free = viaparinfo->memsize; + viaparinfo->fbmem_used = 0; + viaparinfo->fbmem_virt = ioremap_nocache(viaparinfo->fbmem, + viaparinfo->memsize); + viafbinfo->screen_base = (char *)viaparinfo->fbmem_virt; + + if (!viaparinfo->fbmem_virt) { + printk(KERN_INFO "ioremap failed\n"); + return -1; + } + + viafb_get_mmio_info(&viaparinfo->mmio_base, &viaparinfo->mmio_len); + viaparinfo->io_virt = ioremap_nocache(viaparinfo->mmio_base, + viaparinfo->mmio_len); + + viafbinfo->node = 0; + viafbinfo->fbops = &viafb_ops; + viafbinfo->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; + + viafbinfo->pseudo_palette = pseudo_pal; + if (viafb_accel) { + viafb_init_accel(); + viafb_init_2d_engine(); + viafb_hw_cursor_init(); + } + + if (viafb_second_size && (viafb_second_size < 8)) { + viafb_second_offset = viaparinfo->fbmem_free - + viafb_second_size * 1024 * 1024; + } else { + viafb_second_size = 8; + viafb_second_offset = viaparinfo->fbmem_free - + viafb_second_size * 1024 * 1024; + } + + viafb_FB_MM = viaparinfo->fbmem_virt; + tmpm = viafb_mode; + tmpc = strsep(&tmpm, "x"); + strict_strtoul(tmpc, 0, (unsigned long *)&default_xres); + strict_strtoul(tmpm, 0, (unsigned long *)&default_yres); + + vmode_index = viafb_get_mode_index(default_xres, default_yres, 0); + DEBUG_MSG(KERN_INFO "0->index=%d\n", vmode_index); + + if (viafb_SAMM_ON == 1) { + if (strcmp(viafb_mode, viafb_mode1)) { + tmpm_sec = viafb_mode1; + tmpc_sec = strsep(&tmpm_sec, "x"); + strict_strtoul(tmpc_sec, 0, + (unsigned long *)&viafb_second_xres); + strict_strtoul(tmpm_sec, 0, + (unsigned long *)&viafb_second_yres); + } else { + viafb_second_xres = default_xres; + viafb_second_yres = default_yres; + } + if (0 == viafb_second_virtual_xres) { + switch (viafb_second_xres) { + case 1400: + viafb_second_virtual_xres = 1408; + break; + default: + viafb_second_virtual_xres = viafb_second_xres; + break; + } + } + if (0 == viafb_second_virtual_yres) + viafb_second_virtual_yres = viafb_second_yres; + } + + switch (viafb_bpp) { + case 0 ... 8: + viafb_bpp = 8; + break; + case 9 ... 16: + viafb_bpp = 16; + break; + case 17 ... 32: + viafb_bpp = 32; + break; + default: + viafb_bpp = 8; + } + default_var.xres = default_xres; + default_var.yres = default_yres; + switch (default_xres) { + case 1400: + default_var.xres_virtual = 1408; + break; + default: + default_var.xres_virtual = default_xres; + break; + } + default_var.yres_virtual = default_yres; + default_var.bits_per_pixel = viafb_bpp; + if (default_var.bits_per_pixel == 15) + default_var.bits_per_pixel = 16; + default_var.pixclock = + viafb_get_pixclock(default_xres, default_yres, viafb_refresh); + default_var.left_margin = (default_xres >> 3) & 0xf8; + default_var.right_margin = 32; + default_var.upper_margin = 16; + default_var.lower_margin = 4; + default_var.hsync_len = default_var.left_margin; + default_var.vsync_len = 4; + default_var.accel_flags = 0; + + if (viafb_accel) { + viafbinfo->flags |= + (FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT | + FBINFO_HWACCEL_IMAGEBLIT); + default_var.accel_flags |= FB_ACCELF_TEXT; + } else + viafbinfo->flags |= FBINFO_HWACCEL_DISABLED; + + if (viafb_dual_fb) { + viafbinfo1 = framebuffer_alloc(viafb_par_length, NULL); + if (!viafbinfo1) { + printk(KERN_ERR + "allocate the second framebuffer struct error\n"); + framebuffer_release(viafbinfo); + return -ENOMEM; + } + viaparinfo1 = viafbinfo1->par; + memcpy(viaparinfo1, viaparinfo, viafb_par_length); + viaparinfo1->memsize = viaparinfo->memsize - + viafb_second_offset; + viaparinfo->memsize = viafb_second_offset; + viaparinfo1->fbmem_virt = viaparinfo->fbmem_virt + + viafb_second_offset; + viaparinfo1->fbmem = viaparinfo->fbmem + viafb_second_offset; + + viaparinfo1->fbmem_used = viaparinfo->fbmem_used; + viaparinfo1->fbmem_free = viaparinfo1->memsize - + viaparinfo1->fbmem_used; + viaparinfo->fbmem_free = viaparinfo->memsize; + viaparinfo->fbmem_used = 0; + if (viafb_accel) { + viaparinfo1->cursor_start = + viaparinfo->cursor_start - viafb_second_offset; + viaparinfo1->VQ_start = viaparinfo->VQ_start - + viafb_second_offset; + viaparinfo1->VQ_end = viaparinfo->VQ_end - + viafb_second_offset; + } + + memcpy(viafbinfo1, viafbinfo, sizeof(struct fb_info)); + viafbinfo1->screen_base = viafbinfo->screen_base + + viafb_second_offset; + viafbinfo1->fix.smem_start = viaparinfo1->fbmem; + viafbinfo1->fix.smem_len = viaparinfo1->fbmem_free; + + default_var.xres = viafb_second_xres; + default_var.yres = viafb_second_yres; + default_var.xres_virtual = viafb_second_virtual_xres; + default_var.yres_virtual = viafb_second_virtual_yres; + if (viafb_bpp1 != viafb_bpp) + viafb_bpp1 = viafb_bpp; + default_var.bits_per_pixel = viafb_bpp1; + default_var.pixclock = + viafb_get_pixclock(viafb_second_xres, viafb_second_yres, + viafb_refresh); + default_var.left_margin = (viafb_second_xres >> 3) & 0xf8; + default_var.right_margin = 32; + default_var.upper_margin = 16; + default_var.lower_margin = 4; + default_var.hsync_len = default_var.left_margin; + default_var.vsync_len = 4; + + viafb_setup_fixinfo(&viafbinfo1->fix, viaparinfo1); + viafb_check_var(&default_var, viafbinfo1); + viafbinfo1->var = default_var; + viafb_update_viafb_par(viafbinfo); + viafb_update_fix(&viafbinfo1->fix, viafbinfo1); + } + + viafb_setup_fixinfo(&viafbinfo->fix, viaparinfo); + viafb_check_var(&default_var, viafbinfo); + viafbinfo->var = default_var; + viafb_update_viafb_par(viafbinfo); + viafb_update_fix(&viafbinfo->fix, viafbinfo); + default_var.activate = FB_ACTIVATE_NOW; + fb_alloc_cmap(&viafbinfo->cmap, 256, 0); + + if (viafb_dual_fb && (viafb_primary_dev == LCD_Device) + && (viaparinfo->chip_info->gfx_chip_name == UNICHROME_CLE266)) { + if (register_framebuffer(viafbinfo1) < 0) + return -EINVAL; + } + if (register_framebuffer(viafbinfo) < 0) + return -EINVAL; + + if (viafb_dual_fb && ((viafb_primary_dev != LCD_Device) + || (viaparinfo->chip_info->gfx_chip_name != + UNICHROME_CLE266))) { + if (register_framebuffer(viafbinfo1) < 0) + return -EINVAL; + } + DEBUG_MSG(KERN_INFO "fb%d: %s frame buffer device %dx%d-%dbpp\n", + viafbinfo->node, viafbinfo->fix.id, default_var.xres, + default_var.yres, default_var.bits_per_pixel); + + viafb_init_proc(viaparinfo->proc_entry); + viafb_init_dac(IGA2); + return 0; +} + +static void __devexit via_pci_remove(void) +{ + DEBUG_MSG(KERN_INFO "via_pci_remove!\n"); + fb_dealloc_cmap(&viafbinfo->cmap); + unregister_framebuffer(viafbinfo); + if (viafb_dual_fb) + unregister_framebuffer(viafbinfo1); + iounmap((void *)viaparinfo->fbmem_virt); + iounmap(viaparinfo->io_virt); + + viafb_delete_i2c_buss(viaparinfo); + + framebuffer_release(viafbinfo); + if (viafb_dual_fb) + framebuffer_release(viafbinfo1); + + viafb_remove_proc(viaparinfo->proc_entry); +} + +#ifndef MODULE +static int __init viafb_setup(char *options) +{ + char *this_opt; + DEBUG_MSG(KERN_INFO "viafb_setup!\n"); + + if (!options || !*options) + return 0; + + while ((this_opt = strsep(&options, ",")) != NULL) { + if (!*this_opt) + continue; + + if (!strncmp(this_opt, "viafb_mode1=", 12)) + viafb_mode1 = kstrdup(this_opt + 12, GFP_KERNEL); + else if (!strncmp(this_opt, "viafb_mode=", 11)) + viafb_mode = kstrdup(this_opt + 11, GFP_KERNEL); + else if (!strncmp(this_opt, "viafb_bpp1=", 11)) + strict_strtoul(this_opt + 11, 0, + (unsigned long *)&viafb_bpp1); + else if (!strncmp(this_opt, "viafb_bpp=", 10)) + strict_strtoul(this_opt + 10, 0, + (unsigned long *)&viafb_bpp); + else if (!strncmp(this_opt, "viafb_refresh1=", 15)) + strict_strtoul(this_opt + 15, 0, + (unsigned long *)&viafb_refresh1); + else if (!strncmp(this_opt, "viafb_refresh=", 14)) + strict_strtoul(this_opt + 14, 0, + (unsigned long *)&viafb_refresh); + else if (!strncmp(this_opt, "viafb_lcd_dsp_method=", 21)) + strict_strtoul(this_opt + 21, 0, + (unsigned long *)&viafb_lcd_dsp_method); + else if (!strncmp(this_opt, "viafb_lcd_panel_id=", 19)) + strict_strtoul(this_opt + 19, 0, + (unsigned long *)&viafb_lcd_panel_id); + else if (!strncmp(this_opt, "viafb_accel=", 12)) + strict_strtoul(this_opt + 12, 0, + (unsigned long *)&viafb_accel); + else if (!strncmp(this_opt, "viafb_SAMM_ON=", 14)) + strict_strtoul(this_opt + 14, 0, + (unsigned long *)&viafb_SAMM_ON); + else if (!strncmp(this_opt, "viafb_active_dev=", 17)) + viafb_active_dev = kstrdup(this_opt + 17, GFP_KERNEL); + else if (!strncmp(this_opt, + "viafb_display_hardware_layout=", 30)) + strict_strtoul(this_opt + 30, 0, + (unsigned long *)&viafb_display_hardware_layout); + else if (!strncmp(this_opt, "viafb_second_size=", 18)) + strict_strtoul(this_opt + 18, 0, + (unsigned long *)&viafb_second_size); + else if (!strncmp(this_opt, + "viafb_platform_epia_dvi=", 24)) + strict_strtoul(this_opt + 24, 0, + (unsigned long *)&viafb_platform_epia_dvi); + else if (!strncmp(this_opt, + "viafb_device_lcd_dualedge=", 26)) + strict_strtoul(this_opt + 26, 0, + (unsigned long *)&viafb_device_lcd_dualedge); + else if (!strncmp(this_opt, "viafb_bus_width=", 16)) + strict_strtoul(this_opt + 16, 0, + (unsigned long *)&viafb_bus_width); + else if (!strncmp(this_opt, "viafb_lcd_mode=", 15)) + strict_strtoul(this_opt + 15, 0, + (unsigned long *)&viafb_lcd_mode); + else if (!strncmp(this_opt, "viafb_video_dev=", 16)) + viafb_video_dev = kstrdup(this_opt + 16, GFP_KERNEL); + else if (!strncmp(this_opt, "viafb_lcd_port=", 15)) + viafb_lcd_port = kstrdup(this_opt + 15, GFP_KERNEL); + else if (!strncmp(this_opt, "viafb_dvi_port=", 15)) + viafb_dvi_port = kstrdup(this_opt + 15, GFP_KERNEL); + } + return 0; +} +#endif + +static int __init viafb_init(void) +{ +#ifndef MODULE + char *option = NULL; + if (fb_get_options("viafb", &option)) + return -ENODEV; + viafb_setup(option); +#endif + printk(KERN_INFO + "VIA Graphics Intergration Chipset framebuffer %d.%d initializing\n", + VERSION_MAJOR, VERSION_MINOR); + return via_pci_probe(); +} + +static void __exit viafb_exit(void) +{ + DEBUG_MSG(KERN_INFO "viafb_exit!\n"); + via_pci_remove(); +} + +static struct fb_ops viafb_ops = { + .owner = THIS_MODULE, + .fb_open = viafb_open, + .fb_release = viafb_release, + .fb_check_var = viafb_check_var, + .fb_set_par = viafb_set_par, + .fb_setcolreg = viafb_setcolreg, + .fb_pan_display = viafb_pan_display, + .fb_blank = viafb_blank, + .fb_fillrect = viafb_fillrect, + .fb_copyarea = viafb_copyarea, + .fb_imageblit = viafb_imageblit, + .fb_cursor = viafb_cursor, + .fb_ioctl = viafb_ioctl, + .fb_sync = viafb_sync, + .fb_setcmap = viafb_setcmap, +}; + +module_init(viafb_init); +module_exit(viafb_exit); + +#ifdef MODULE +module_param(viafb_memsize, int, 0); + +module_param(viafb_mode, charp, 0); +MODULE_PARM_DESC(viafb_mode, "Set resolution (default=640x480)"); + +module_param(viafb_mode1, charp, 0); +MODULE_PARM_DESC(viafb_mode1, "Set resolution (default=640x480)"); + +module_param(viafb_bpp, int, 0); +MODULE_PARM_DESC(viafb_bpp, "Set color depth (default=32bpp)"); + +module_param(viafb_bpp1, int, 0); +MODULE_PARM_DESC(viafb_bpp1, "Set color depth (default=32bpp)"); + +module_param(viafb_refresh, int, 0); +MODULE_PARM_DESC(viafb_refresh, + "Set CRT viafb_refresh rate (default = 60)"); + +module_param(viafb_refresh1, int, 0); +MODULE_PARM_DESC(viafb_refresh1, + "Set CRT refresh rate (default = 60)"); + +module_param(viafb_lcd_panel_id, int, 0); +MODULE_PARM_DESC(viafb_lcd_panel_id, + "Set Flat Panel type(Default=1024x768)"); + +module_param(viafb_lcd_dsp_method, int, 0); +MODULE_PARM_DESC(viafb_lcd_dsp_method, + "Set Flat Panel display scaling method.(Default=Expandsion)"); + +module_param(viafb_SAMM_ON, int, 0); +MODULE_PARM_DESC(viafb_SAMM_ON, + "Turn on/off flag of SAMM(Default=OFF)"); + +module_param(viafb_accel, int, 0); +MODULE_PARM_DESC(viafb_accel, + "Set 2D Hardware Acceleration.(Default = OFF)"); + +module_param(viafb_active_dev, charp, 0); +MODULE_PARM_DESC(viafb_active_dev, "Specify active devices."); + +module_param(viafb_display_hardware_layout, int, 0); +MODULE_PARM_DESC(viafb_display_hardware_layout, + "Display Hardware Layout (LCD Only, DVI Only...,etc)"); + +module_param(viafb_second_size, int, 0); +MODULE_PARM_DESC(viafb_second_size, + "Set secondary device memory size"); + +module_param(viafb_dual_fb, int, 0); +MODULE_PARM_DESC(viafb_dual_fb, + "Turn on/off flag of dual framebuffer devices.(Default = OFF)"); + +module_param(viafb_platform_epia_dvi, int, 0); +MODULE_PARM_DESC(viafb_platform_epia_dvi, + "Turn on/off flag of DVI devices on EPIA board.(Default = OFF)"); + +module_param(viafb_device_lcd_dualedge, int, 0); +MODULE_PARM_DESC(viafb_device_lcd_dualedge, + "Turn on/off flag of dual edge panel.(Default = OFF)"); + +module_param(viafb_bus_width, int, 0); +MODULE_PARM_DESC(viafb_bus_width, + "Set bus width of panel.(Default = 12)"); + +module_param(viafb_lcd_mode, int, 0); +MODULE_PARM_DESC(viafb_lcd_mode, + "Set Flat Panel mode(Default=OPENLDI)"); + +module_param(viafb_video_dev, charp, 0); +MODULE_PARM_DESC(viafb_video_dev, "Specify video devices."); + +module_param(viafb_lcd_port, charp, 0); +MODULE_PARM_DESC(viafb_lcd_port, "Specify LCD output port."); + +module_param(viafb_dvi_port, charp, 0); +MODULE_PARM_DESC(viafb_dvi_port, "Specify DVI output port."); + +MODULE_LICENSE("GPL"); +#endif diff --git a/drivers/video/via/viafbdev.h b/drivers/video/via/viafbdev.h new file mode 100644 index 000000000000..a4158e872878 --- /dev/null +++ b/drivers/video/via/viafbdev.h @@ -0,0 +1,112 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef __VIAFBDEV_H__ +#define __VIAFBDEV_H__ + +#include <linux/proc_fs.h> +#include <linux/fb.h> + +#include "ioctl.h" +#include "share.h" +#include "chip.h" +#include "hw.h" +#include "via_i2c.h" + +#define VERSION_MAJOR 2 +#define VERSION_KERNEL 6 /* For kernel 2.6 */ + +#define VERSION_OS 0 /* 0: for 32 bits OS, 1: for 64 bits OS */ +#define VERSION_MINOR 4 + +struct viafb_par { + int bpp; + int hres; + int vres; + int linelength; + u32 xoffset; + u32 yoffset; + + void __iomem *fbmem_virt; /*framebuffer virtual memory address */ + void __iomem *io_virt; /*iospace virtual memory address */ + unsigned int fbmem; /*framebuffer physical memory address */ + unsigned int memsize; /*size of fbmem */ + unsigned int io; /*io space address */ + unsigned long mmio_base; /*mmio base address */ + unsigned long mmio_len; /*mmio base length */ + u32 fbmem_free; /* Free FB memory */ + u32 fbmem_used; /* Use FB memory size */ + u32 cursor_start; /* Cursor Start Address */ + u32 VQ_start; /* Virtual Queue Start Address */ + u32 VQ_end; /* Virtual Queue End Address */ + u32 iga_path; + struct proc_dir_entry *proc_entry; /*viafb proc entry */ + u8 duoview; /*Is working in duoview mode? */ + + /* I2C stuff */ + struct via_i2c_stuff i2c_stuff; + + /* All the information will be needed to set engine */ + struct tmds_setting_information *tmds_setting_info; + struct crt_setting_information *crt_setting_info; + struct lvds_setting_information *lvds_setting_info; + struct lvds_setting_information *lvds_setting_info2; + struct chip_information *chip_info; + + /* some information related to video playing */ + int video_on_crt; + int video_on_dvi; + int video_on_lcd; + +}; +struct viafb_modeinfo { + u32 xres; + u32 yres; + int mode_index; + char *mode_res; +}; +extern unsigned int viafb_second_virtual_yres; +extern unsigned int viafb_second_virtual_xres; +extern unsigned int viafb_second_offset; +extern int viafb_second_size; +extern int viafb_SAMM_ON; +extern int viafb_dual_fb; +extern int viafb_LCD2_ON; +extern int viafb_LCD_ON; +extern int viafb_DVI_ON; +extern int viafb_accel; +extern int viafb_hotplug; +extern int viafb_memsize; + +extern int strict_strtoul(const char *cp, unsigned int base, + unsigned long *res); + +void viafb_memory_pitch_patch(struct fb_info *info); +void viafb_fill_var_timing_info(struct fb_var_screeninfo *var, int refresh, + int mode_index); +int viafb_get_mode_index(int hres, int vres, int flag); +u8 viafb_gpio_i2c_read_lvds(struct lvds_setting_information + *plvds_setting_info, struct lvds_chip_information + *plvds_chip_info, u8 index); +void viafb_gpio_i2c_write_mask_lvds(struct lvds_setting_information + *plvds_setting_info, struct lvds_chip_information + *plvds_chip_info, struct IODATA io_data); +#endif /* __VIAFBDEV_H__ */ diff --git a/drivers/video/via/viamode.c b/drivers/video/via/viamode.c new file mode 100644 index 000000000000..6dcf583a837d --- /dev/null +++ b/drivers/video/via/viamode.c @@ -0,0 +1,1086 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "global.h" +struct res_map_refresh res_map_refresh_tbl[] = { +/*hres, vres, vclock, vmode_refresh*/ + {480, 640, RES_480X640_60HZ_PIXCLOCK, 60}, + {640, 480, RES_640X480_60HZ_PIXCLOCK, 60}, + {640, 480, RES_640X480_75HZ_PIXCLOCK, 75}, + {640, 480, RES_640X480_85HZ_PIXCLOCK, 85}, + {640, 480, RES_640X480_100HZ_PIXCLOCK, 100}, + {640, 480, RES_640X480_120HZ_PIXCLOCK, 120}, + {720, 480, RES_720X480_60HZ_PIXCLOCK, 60}, + {720, 576, RES_720X576_60HZ_PIXCLOCK, 60}, + {800, 480, RES_800X480_60HZ_PIXCLOCK, 60}, + {800, 600, RES_800X600_60HZ_PIXCLOCK, 60}, + {800, 600, RES_800X600_75HZ_PIXCLOCK, 75}, + {800, 600, RES_800X600_85HZ_PIXCLOCK, 85}, + {800, 600, RES_800X600_100HZ_PIXCLOCK, 100}, + {800, 600, RES_800X600_120HZ_PIXCLOCK, 120}, + {848, 480, RES_848X480_60HZ_PIXCLOCK, 60}, + {856, 480, RES_856X480_60HZ_PIXCLOCK, 60}, + {1024, 512, RES_1024X512_60HZ_PIXCLOCK, 60}, + {1024, 600, RES_1024X600_60HZ_PIXCLOCK, 60}, + {1024, 768, RES_1024X768_60HZ_PIXCLOCK, 60}, + {1024, 768, RES_1024X768_75HZ_PIXCLOCK, 75}, + {1024, 768, RES_1024X768_85HZ_PIXCLOCK, 85}, + {1024, 768, RES_1024X768_100HZ_PIXCLOCK, 100}, +/* {1152,864, RES_1152X864_70HZ_PIXCLOCK, 70},*/ + {1152, 864, RES_1152X864_75HZ_PIXCLOCK, 75}, + {1280, 768, RES_1280X768_60HZ_PIXCLOCK, 60}, + {1280, 800, RES_1280X800_60HZ_PIXCLOCK, 60}, + {1280, 960, RES_1280X960_60HZ_PIXCLOCK, 60}, + {1280, 1024, RES_1280X1024_60HZ_PIXCLOCK, 60}, + {1280, 1024, RES_1280X1024_75HZ_PIXCLOCK, 75}, + {1280, 1024, RES_1280X768_85HZ_PIXCLOCK, 85}, + {1440, 1050, RES_1440X1050_60HZ_PIXCLOCK, 60}, + {1600, 1200, RES_1600X1200_60HZ_PIXCLOCK, 60}, + {1600, 1200, RES_1600X1200_75HZ_PIXCLOCK, 75}, + {1280, 720, RES_1280X720_60HZ_PIXCLOCK, 60}, + {1920, 1080, RES_1920X1080_60HZ_PIXCLOCK, 60}, + {1400, 1050, RES_1400X1050_60HZ_PIXCLOCK, 60}, + {1400, 1050, RES_1400X1050_75HZ_PIXCLOCK, 75}, + {1368, 768, RES_1368X768_60HZ_PIXCLOCK, 60}, + {960, 600, RES_960X600_60HZ_PIXCLOCK, 60}, + {1000, 600, RES_1000X600_60HZ_PIXCLOCK, 60}, + {1024, 576, RES_1024X576_60HZ_PIXCLOCK, 60}, + {1088, 612, RES_1088X612_60HZ_PIXCLOCK, 60}, + {1152, 720, RES_1152X720_60HZ_PIXCLOCK, 60}, + {1200, 720, RES_1200X720_60HZ_PIXCLOCK, 60}, + {1280, 600, RES_1280X600_60HZ_PIXCLOCK, 60}, + {1280, 720, RES_1280X720_50HZ_PIXCLOCK, 50}, + {1280, 768, RES_1280X768_50HZ_PIXCLOCK, 50}, + {1360, 768, RES_1360X768_60HZ_PIXCLOCK, 60}, + {1366, 768, RES_1366X768_50HZ_PIXCLOCK, 50}, + {1366, 768, RES_1366X768_60HZ_PIXCLOCK, 60}, + {1440, 900, RES_1440X900_60HZ_PIXCLOCK, 60}, + {1440, 900, RES_1440X900_75HZ_PIXCLOCK, 75}, + {1600, 900, RES_1600X900_60HZ_PIXCLOCK, 60}, + {1600, 1024, RES_1600X1024_60HZ_PIXCLOCK, 60}, + {1680, 1050, RES_1680X1050_60HZ_PIXCLOCK, 60}, + {1680, 1050, RES_1680X1050_75HZ_PIXCLOCK, 75}, + {1792, 1344, RES_1792X1344_60HZ_PIXCLOCK, 60}, + {1856, 1392, RES_1856X1392_60HZ_PIXCLOCK, 60}, + {1920, 1200, RES_1920X1200_60HZ_PIXCLOCK, 60}, + {1920, 1440, RES_1920X1440_60HZ_PIXCLOCK, 60}, + {1920, 1440, RES_1920X1440_75HZ_PIXCLOCK, 75}, + {2048, 1536, RES_2048X1536_60HZ_PIXCLOCK, 60} +}; + +struct io_reg CN400_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, +{VIASR, SR15, 0x02, 0x02}, +{VIASR, SR16, 0xBF, 0x08}, +{VIASR, SR17, 0xFF, 0x1F}, +{VIASR, SR18, 0xFF, 0x4E}, +{VIASR, SR1A, 0xFB, 0x08}, +{VIASR, SR1E, 0x0F, 0x01}, +{VIASR, SR2A, 0xFF, 0x00}, +{VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */ +{VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */ +{VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */ +{VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */ +{VIACR, CR32, 0xFF, 0x00}, +{VIACR, CR33, 0xFF, 0x00}, +{VIACR, CR34, 0xFF, 0x00}, +{VIACR, CR35, 0xFF, 0x00}, +{VIACR, CR36, 0x08, 0x00}, +{VIACR, CR62, 0xFF, 0x00}, /* Secondary Display Starting Address */ +{VIACR, CR63, 0xFF, 0x00}, /* Secondary Display Starting Address */ +{VIACR, CR64, 0xFF, 0x00}, /* Secondary Display Starting Address */ +{VIACR, CR69, 0xFF, 0x00}, +{VIACR, CR6A, 0xFF, 0x40}, +{VIACR, CR6B, 0xFF, 0x00}, +{VIACR, CR6C, 0xFF, 0x00}, +{VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */ +{VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */ +{VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */ +{VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */ +{VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */ +{VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */ +{VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */ +{VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */ +{VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */ +{VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */ +{VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */ +{VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */ +{VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */ +{VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */ +{VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */ +{VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */ +{VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */ +{VIACR, CR8B, 0xFF, 0x69}, /* LCD Power Sequence Control 0 */ +{VIACR, CR8C, 0xFF, 0x57}, /* LCD Power Sequence Control 1 */ +{VIACR, CR8D, 0xFF, 0x00}, /* LCD Power Sequence Control 2 */ +{VIACR, CR8E, 0xFF, 0x7B}, /* LCD Power Sequence Control 3 */ +{VIACR, CR8F, 0xFF, 0x03}, /* LCD Power Sequence Control 4 */ +{VIACR, CR90, 0xFF, 0x30}, /* LCD Power Sequence Control 5 */ +{VIACR, CR91, 0xFF, 0xA0}, /* 24/12 bit LVDS Data off */ +{VIACR, CR96, 0xFF, 0x00}, +{VIACR, CR97, 0xFF, 0x00}, +{VIACR, CR99, 0xFF, 0x00}, +{VIACR, CR9B, 0xFF, 0x00} +}; + +/* Video Mode Table for VT3314 chipset*/ +/* Common Setting for Video Mode */ +struct io_reg CN700_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, +{VIASR, SR15, 0x02, 0x02}, +{VIASR, SR16, 0xBF, 0x08}, +{VIASR, SR17, 0xFF, 0x1F}, +{VIASR, SR18, 0xFF, 0x4E}, +{VIASR, SR1A, 0xFB, 0x82}, +{VIASR, SR1B, 0xFF, 0xF0}, +{VIASR, SR1F, 0xFF, 0x00}, +{VIASR, SR1E, 0xFF, 0x01}, +{VIASR, SR22, 0xFF, 0x1F}, +{VIASR, SR2A, 0x0F, 0x00}, +{VIASR, SR2E, 0xFF, 0xFF}, +{VIASR, SR3F, 0xFF, 0xFF}, +{VIASR, SR40, 0xF7, 0x00}, +{VIASR, CR30, 0xFF, 0x04}, +{VIACR, CR32, 0xFF, 0x00}, +{VIACR, CR33, 0x7F, 0x00}, +{VIACR, CR34, 0xFF, 0x00}, +{VIACR, CR35, 0xFF, 0x00}, +{VIACR, CR36, 0xFF, 0x31}, +{VIACR, CR41, 0xFF, 0x80}, +{VIACR, CR42, 0xFF, 0x00}, +{VIACR, CR55, 0x80, 0x00}, +{VIACR, CR5D, 0x80, 0x00}, /*Horizontal Retrace Start bit[11] should be 0*/ +{VIACR, CR62, 0xFF, 0x00}, /* Secondary Display Starting Address */ +{VIACR, CR63, 0xFF, 0x00}, /* Secondary Display Starting Address */ +{VIACR, CR64, 0xFF, 0x00}, /* Secondary Display Starting Address */ +{VIACR, CR68, 0xFF, 0x67}, /* Default FIFO For IGA2 */ +{VIACR, CR69, 0xFF, 0x00}, +{VIACR, CR6A, 0xFD, 0x40}, +{VIACR, CR6B, 0xFF, 0x00}, +{VIACR, CR6C, 0xFF, 0x00}, +{VIACR, CR77, 0xFF, 0x00}, /* LCD scaling Factor */ +{VIACR, CR78, 0xFF, 0x00}, /* LCD scaling Factor */ +{VIACR, CR79, 0xFF, 0x00}, /* LCD scaling Factor */ +{VIACR, CR9F, 0x03, 0x00}, /* LCD scaling Factor */ +{VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */ +{VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */ +{VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */ +{VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */ +{VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */ +{VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */ +{VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */ +{VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */ +{VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */ +{VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */ +{VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */ +{VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */ +{VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */ +{VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */ +{VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */ +{VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */ +{VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */ +{VIACR, CR8B, 0xFF, 0x5D}, /* LCD Power Sequence Control 0 */ +{VIACR, CR8C, 0xFF, 0x2B}, /* LCD Power Sequence Control 1 */ +{VIACR, CR8D, 0xFF, 0x6F}, /* LCD Power Sequence Control 2 */ +{VIACR, CR8E, 0xFF, 0x2B}, /* LCD Power Sequence Control 3 */ +{VIACR, CR8F, 0xFF, 0x01}, /* LCD Power Sequence Control 4 */ +{VIACR, CR90, 0xFF, 0x01}, /* LCD Power Sequence Control 5 */ +{VIACR, CR91, 0xFF, 0xA0}, /* 24/12 bit LVDS Data off */ +{VIACR, CR96, 0xFF, 0x00}, +{VIACR, CR97, 0xFF, 0x00}, +{VIACR, CR99, 0xFF, 0x00}, +{VIACR, CR9B, 0xFF, 0x00}, +{VIACR, CR9D, 0xFF, 0x80}, +{VIACR, CR9E, 0xFF, 0x80} +}; + +struct io_reg KM400_ModeXregs[] = { + {VIASR, SR10, 0xFF, 0x01}, /* Unlock Register */ + {VIASR, SR16, 0xFF, 0x08}, /* Display FIFO threshold Control */ + {VIASR, SR17, 0xFF, 0x1F}, /* Display FIFO Control */ + {VIASR, SR18, 0xFF, 0x4E}, /* GFX PREQ threshold */ + {VIASR, SR1A, 0xFF, 0x0a}, /* GFX PREQ threshold */ + {VIASR, SR1F, 0xFF, 0x00}, /* Memory Control 0 */ + {VIASR, SR1B, 0xFF, 0xF0}, /* Power Management Control 0 */ + {VIASR, SR1E, 0xFF, 0x01}, /* Power Management Control */ + {VIASR, SR20, 0xFF, 0x00}, /* Sequencer Arbiter Control 0 */ + {VIASR, SR21, 0xFF, 0x00}, /* Sequencer Arbiter Control 1 */ + {VIASR, SR22, 0xFF, 0x1F}, /* Display Arbiter Control 1 */ + {VIASR, SR2A, 0xFF, 0x00}, /* Power Management Control 5 */ + {VIASR, SR2D, 0xFF, 0xFF}, /* Power Management Control 1 */ + {VIASR, SR2E, 0xFF, 0xFF}, /* Power Management Control 2 */ + {VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */ + {VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */ + {VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */ + {VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */ + {VIACR, CR33, 0xFF, 0x00}, + {VIACR, CR55, 0x80, 0x00}, + {VIACR, CR5D, 0x80, 0x00}, + {VIACR, CR36, 0xFF, 0x01}, /* Power Mangement 3 */ + {VIACR, CR62, 0xFF, 0x00}, /* Secondary Display Starting Address */ + {VIACR, CR63, 0xFF, 0x00}, /* Secondary Display Starting Address */ + {VIACR, CR64, 0xFF, 0x00}, /* Secondary Display Starting Address */ + {VIACR, CR68, 0xFF, 0x67}, /* Default FIFO For IGA2 */ + {VIACR, CR6A, 0x20, 0x20}, /* Extended FIFO On */ + {VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */ + {VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */ + {VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */ + {VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */ + {VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */ + {VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */ + {VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */ + {VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */ + {VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */ + {VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */ + {VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */ + {VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */ + {VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */ + {VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */ + {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */ + {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */ + {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */ + {VIACR, CR8B, 0xFF, 0x2D}, /* LCD Power Sequence Control 0 */ + {VIACR, CR8C, 0xFF, 0x2D}, /* LCD Power Sequence Control 1 */ + {VIACR, CR8D, 0xFF, 0xC8}, /* LCD Power Sequence Control 2 */ + {VIACR, CR8E, 0xFF, 0x36}, /* LCD Power Sequence Control 3 */ + {VIACR, CR8F, 0xFF, 0x00}, /* LCD Power Sequence Control 4 */ + {VIACR, CR90, 0xFF, 0x10}, /* LCD Power Sequence Control 5 */ + {VIACR, CR91, 0xFF, 0xA0}, /* 24/12 bit LVDS Data off */ + {VIACR, CR96, 0xFF, 0x03}, /* DVP0 ; DVP0 Clock Skew */ + {VIACR, CR97, 0xFF, 0x03}, /* DFP high ; DFPH Clock Skew */ + {VIACR, CR99, 0xFF, 0x03}, /* DFP low ; DFPL Clock Skew*/ + {VIACR, CR9B, 0xFF, 0x07} /* DVI on DVP1 ; DVP1 Clock Skew*/ +}; + +/* For VT3324: Common Setting for Video Mode */ +struct io_reg CX700_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, +{VIASR, SR15, 0x02, 0x02}, +{VIASR, SR16, 0xBF, 0x08}, +{VIASR, SR17, 0xFF, 0x1F}, +{VIASR, SR18, 0xFF, 0x4E}, +{VIASR, SR1A, 0xFB, 0x08}, +{VIASR, SR1B, 0xFF, 0xF0}, +{VIASR, SR1E, 0xFF, 0x01}, +{VIASR, SR2A, 0xFF, 0x00}, +{VIASR, SR2D, 0xFF, 0xFF}, /* VCK and LCK PLL power on. */ +{VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */ +{VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */ +{VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */ +{VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */ +{VIACR, CR32, 0xFF, 0x00}, +{VIACR, CR33, 0xFF, 0x00}, +{VIACR, CR34, 0xFF, 0x00}, +{VIACR, CR35, 0xFF, 0x00}, +{VIACR, CR36, 0x08, 0x00}, +{VIACR, CR47, 0xC8, 0x00}, /* Clear VCK Plus. */ +{VIACR, CR62, 0xFF, 0x00}, /* Secondary Display Starting Address */ +{VIACR, CR63, 0xFF, 0x00}, /* Secondary Display Starting Address */ +{VIACR, CR64, 0xFF, 0x00}, /* Secondary Display Starting Address */ +{VIACR, CRA3, 0xFF, 0x00}, /* Secondary Display Starting Address */ +{VIACR, CR69, 0xFF, 0x00}, +{VIACR, CR6A, 0xFF, 0x40}, +{VIACR, CR6B, 0xFF, 0x00}, +{VIACR, CR6C, 0xFF, 0x00}, +{VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */ +{VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */ +{VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */ +{VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */ +{VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */ +{VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */ +{VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */ +{VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */ +{VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */ +{VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */ +{VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */ +{VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */ +{VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */ +{VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */ +{VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */ +{VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */ +{VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */ +{VIACR, CRD4, 0xFF, 0x81}, /* Second power sequence control */ +{VIACR, CR8B, 0xFF, 0x5D}, /* LCD Power Sequence Control 0 */ +{VIACR, CR8C, 0xFF, 0x2B}, /* LCD Power Sequence Control 1 */ +{VIACR, CR8D, 0xFF, 0x6F}, /* LCD Power Sequence Control 2 */ +{VIACR, CR8E, 0xFF, 0x2B}, /* LCD Power Sequence Control 3 */ +{VIACR, CR8F, 0xFF, 0x01}, /* LCD Power Sequence Control 4 */ +{VIACR, CR90, 0xFF, 0x01}, /* LCD Power Sequence Control 5 */ +{VIACR, CR91, 0xFF, 0x80}, /* 24/12 bit LVDS Data off */ +{VIACR, CR96, 0xFF, 0x00}, +{VIACR, CR97, 0xFF, 0x00}, +{VIACR, CR99, 0xFF, 0x00}, +{VIACR, CR9B, 0xFF, 0x00}, +{VIACR, CRD2, 0xFF, 0xFF} /* TMDS/LVDS control register. */ +}; + +/* For VT3353: Common Setting for Video Mode */ +struct io_reg VX800_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, +{VIASR, SR15, 0x02, 0x02}, +{VIASR, SR16, 0xBF, 0x08}, +{VIASR, SR17, 0xFF, 0x1F}, +{VIASR, SR18, 0xFF, 0x4E}, +{VIASR, SR1A, 0xFB, 0x08}, +{VIASR, SR1B, 0xFF, 0xF0}, +{VIASR, SR1E, 0xFF, 0x01}, +{VIASR, SR2A, 0xFF, 0x00}, +{VIASR, SR2D, 0xFF, 0xFF}, /* VCK and LCK PLL power on. */ +{VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */ +{VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */ +{VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */ +{VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */ +{VIACR, CR32, 0xFF, 0x00}, +{VIACR, CR33, 0xFF, 0x00}, +{VIACR, CR34, 0xFF, 0x00}, +{VIACR, CR35, 0xFF, 0x00}, +{VIACR, CR36, 0x08, 0x00}, +{VIACR, CR47, 0xC8, 0x00}, /* Clear VCK Plus. */ +{VIACR, CR62, 0xFF, 0x00}, /* Secondary Display Starting Address */ +{VIACR, CR63, 0xFF, 0x00}, /* Secondary Display Starting Address */ +{VIACR, CR64, 0xFF, 0x00}, /* Secondary Display Starting Address */ +{VIACR, CRA3, 0xFF, 0x00}, /* Secondary Display Starting Address */ +{VIACR, CR69, 0xFF, 0x00}, +{VIACR, CR6A, 0xFF, 0x40}, +{VIACR, CR6B, 0xFF, 0x00}, +{VIACR, CR6C, 0xFF, 0x00}, +{VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */ +{VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */ +{VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */ +{VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */ +{VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */ +{VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */ +{VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */ +{VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */ +{VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */ +{VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */ +{VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */ +{VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */ +{VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */ +{VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */ +{VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */ +{VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */ +{VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */ +{VIACR, CRD4, 0xFF, 0x81}, /* Second power sequence control */ +{VIACR, CR8B, 0xFF, 0x5D}, /* LCD Power Sequence Control 0 */ +{VIACR, CR8C, 0xFF, 0x2B}, /* LCD Power Sequence Control 1 */ +{VIACR, CR8D, 0xFF, 0x6F}, /* LCD Power Sequence Control 2 */ +{VIACR, CR8E, 0xFF, 0x2B}, /* LCD Power Sequence Control 3 */ +{VIACR, CR8F, 0xFF, 0x01}, /* LCD Power Sequence Control 4 */ +{VIACR, CR90, 0xFF, 0x01}, /* LCD Power Sequence Control 5 */ +{VIACR, CR91, 0xFF, 0x80}, /* 24/12 bit LVDS Data off */ +{VIACR, CR96, 0xFF, 0x00}, +{VIACR, CR97, 0xFF, 0x00}, +{VIACR, CR99, 0xFF, 0x00}, +{VIACR, CR9B, 0xFF, 0x00}, +{VIACR, CRD2, 0xFF, 0xFF} /* TMDS/LVDS control register. */ +}; + +/* Video Mode Table */ +/* Common Setting for Video Mode */ +struct io_reg CLE266_ModeXregs[] = { {VIASR, SR1E, 0xF0, 0x00}, +{VIASR, SR2A, 0x0F, 0x00}, +{VIASR, SR15, 0x02, 0x02}, +{VIASR, SR16, 0xBF, 0x08}, +{VIASR, SR17, 0xFF, 0x1F}, +{VIASR, SR18, 0xFF, 0x4E}, +{VIASR, SR1A, 0xFB, 0x08}, + +{VIACR, CR32, 0xFF, 0x00}, +{VIACR, CR34, 0xFF, 0x00}, +{VIACR, CR35, 0xFF, 0x00}, +{VIACR, CR36, 0x08, 0x00}, +{VIACR, CR6A, 0xFF, 0x80}, +{VIACR, CR6A, 0xFF, 0xC0}, + +{VIACR, CR55, 0x80, 0x00}, +{VIACR, CR5D, 0x80, 0x00}, + +{VIAGR, GR20, 0xFF, 0x00}, +{VIAGR, GR21, 0xFF, 0x00}, +{VIAGR, GR22, 0xFF, 0x00}, + /* LCD Parameters */ +{VIACR, CR7A, 0xFF, 0x01}, /* LCD Parameter 1 */ +{VIACR, CR7B, 0xFF, 0x02}, /* LCD Parameter 2 */ +{VIACR, CR7C, 0xFF, 0x03}, /* LCD Parameter 3 */ +{VIACR, CR7D, 0xFF, 0x04}, /* LCD Parameter 4 */ +{VIACR, CR7E, 0xFF, 0x07}, /* LCD Parameter 5 */ +{VIACR, CR7F, 0xFF, 0x0A}, /* LCD Parameter 6 */ +{VIACR, CR80, 0xFF, 0x0D}, /* LCD Parameter 7 */ +{VIACR, CR81, 0xFF, 0x13}, /* LCD Parameter 8 */ +{VIACR, CR82, 0xFF, 0x16}, /* LCD Parameter 9 */ +{VIACR, CR83, 0xFF, 0x19}, /* LCD Parameter 10 */ +{VIACR, CR84, 0xFF, 0x1C}, /* LCD Parameter 11 */ +{VIACR, CR85, 0xFF, 0x1D}, /* LCD Parameter 12 */ +{VIACR, CR86, 0xFF, 0x1E}, /* LCD Parameter 13 */ +{VIACR, CR87, 0xFF, 0x1F}, /* LCD Parameter 14 */ + +}; + +/* Mode:1024X768 */ +struct io_reg PM1024x768[] = { {VIASR, 0x16, 0xBF, 0x0C}, +{VIASR, 0x18, 0xFF, 0x4C} +}; + +struct patch_table res_patch_table[] = { + {VIA_RES_1024X768, ARRAY_SIZE(PM1024x768), PM1024x768} +}; + +/* struct VPITTable { + unsigned char Misc; + unsigned char SR[StdSR]; + unsigned char CR[StdCR]; + unsigned char GR[StdGR]; + unsigned char AR[StdAR]; + };*/ + +struct VPITTable VPIT = { + /* Msic */ + 0xC7, + /* Sequencer */ + {0x01, 0x0F, 0x00, 0x0E}, + /* Graphic Controller */ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0F, 0xFF}, + /* Attribute Controller */ + {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, + 0x01, 0x00, 0x0F, 0x00} +}; + +/********************/ +/* Mode Table */ +/********************/ + +/* 480x640 */ +struct crt_mode_table CRTM480x640[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_25_175M, M480X640_R60_HSP, M480X640_R60_VSP, + {624, 480, 480, 144, 504, 48, 663, 640, 640, 23, 641, 3} } /* GTF*/ +}; + +/* 640x480*/ +struct crt_mode_table CRTM640x480[] = { + /*r_rate,vclk,hsp,vsp */ + /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_25_175M, M640X480_R60_HSP, M640X480_R60_VSP, + {800, 640, 648, 144, 656, 96, 525, 480, 480, 45, 490, 2} }, + {REFRESH_75, CLK_31_500M, M640X480_R75_HSP, M640X480_R75_VSP, + {840, 640, 640, 200, 656, 64, 500, 480, 480, 20, 481, 3} }, + {REFRESH_85, CLK_36_000M, M640X480_R85_HSP, M640X480_R85_VSP, + {832, 640, 640, 192, 696, 56, 509, 480, 480, 29, 481, 3} }, + {REFRESH_100, CLK_43_163M, M640X480_R100_HSP, M640X480_R100_VSP, + {848, 640, 640, 208, 680, 64, 509, 480, 480, 29, 481, 3} }, /*GTF*/ + {REFRESH_120, CLK_52_406M, M640X480_R120_HSP, + M640X480_R120_VSP, + {848, 640, 640, 208, 680, 64, 515, 480, 480, 35, 481, + 3} } /*GTF*/ +}; + +/*720x480 (GTF)*/ +struct crt_mode_table CRTM720x480[] = { + /*r_rate,vclk,hsp,vsp */ + /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_26_880M, M720X480_R60_HSP, M720X480_R60_VSP, + {896, 720, 720, 176, 736, 72, 497, 480, 480, 17, 481, 3} } + +}; + +/*720x576 (GTF)*/ +struct crt_mode_table CRTM720x576[] = { + /*r_rate,vclk,hsp,vsp */ + /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_32_668M, M720X576_R60_HSP, M720X576_R60_VSP, + {912, 720, 720, 192, 744, 72, 597, 576, 576, 21, 577, 3} } +}; + +/* 800x480 (CVT) */ +struct crt_mode_table CRTM800x480[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_29_581M, M800X480_R60_HSP, M800X480_R60_VSP, + {992, 800, 800, 192, 824, 72, 500, 480, 480, 20, 483, 7} } +}; + +/* 800x600*/ +struct crt_mode_table CRTM800x600[] = { + /*r_rate,vclk,hsp,vsp */ + /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_40_000M, M800X600_R60_HSP, M800X600_R60_VSP, + {1056, 800, 800, 256, 840, 128, 628, 600, 600, 28, 601, 4} }, + {REFRESH_75, CLK_49_500M, M800X600_R75_HSP, M800X600_R75_VSP, + {1056, 800, 800, 256, 816, 80, 625, 600, 600, 25, 601, 3} }, + {REFRESH_85, CLK_56_250M, M800X600_R85_HSP, M800X600_R85_VSP, + {1048, 800, 800, 248, 832, 64, 631, 600, 600, 31, 601, 3} }, + {REFRESH_100, CLK_68_179M, M800X600_R100_HSP, M800X600_R100_VSP, + {1072, 800, 800, 272, 848, 88, 636, 600, 600, 36, 601, 3} }, + {REFRESH_120, CLK_83_950M, M800X600_R120_HSP, + M800X600_R120_VSP, + {1088, 800, 800, 288, 856, 88, 643, 600, 600, 43, 601, + 3} } +}; + +/* 848x480 (CVT) */ +struct crt_mode_table CRTM848x480[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_31_500M, M848X480_R60_HSP, M848X480_R60_VSP, + {1056, 848, 848, 208, 872, 80, 500, 480, 480, 20, 483, 5} } +}; + +/*856x480 (GTF) convert to 852x480*/ +struct crt_mode_table CRTM852x480[] = { + /*r_rate,vclk,hsp,vsp */ + /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_31_728M, M852X480_R60_HSP, M852X480_R60_VSP, + {1064, 856, 856, 208, 872, 88, 497, 480, 480, 17, 481, 3} } +}; + +/*1024x512 (GTF)*/ +struct crt_mode_table CRTM1024x512[] = { + /*r_rate,vclk,hsp,vsp */ + /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_41_291M, M1024X512_R60_HSP, M1024X512_R60_VSP, + {1296, 1024, 1024, 272, 1056, 104, 531, 512, 512, 19, 513, 3} } + +}; + +/* 1024x600*/ +struct crt_mode_table CRTM1024x600[] = { + /*r_rate,vclk,hsp,vsp */ + /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_48_875M, M1024X600_R60_HSP, M1024X600_R60_VSP, + {1312, 1024, 1024, 288, 1064, 104, 622, 600, 600, 22, 601, 3} }, +}; + +/* 1024x768*/ +struct crt_mode_table CRTM1024x768[] = { + /*r_rate,vclk,hsp,vsp */ + /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_65_000M, M1024X768_R60_HSP, M1024X768_R60_VSP, + {1344, 1024, 1024, 320, 1048, 136, 806, 768, 768, 38, 771, 6} }, + {REFRESH_75, CLK_78_750M, M1024X768_R75_HSP, M1024X768_R75_VSP, + {1312, 1024, 1024, 288, 1040, 96, 800, 768, 768, 32, 769, 3} }, + {REFRESH_85, CLK_94_500M, M1024X768_R85_HSP, M1024X768_R85_VSP, + {1376, 1024, 1024, 352, 1072, 96, 808, 768, 768, 40, 769, 3} }, + {REFRESH_100, CLK_113_309M, M1024X768_R100_HSP, M1024X768_R100_VSP, + {1392, 1024, 1024, 368, 1096, 112, 814, 768, 768, 46, 769, 3} } +}; + +/* 1152x864*/ +struct crt_mode_table CRTM1152x864[] = { + /*r_rate,vclk,hsp,vsp */ + /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_75, CLK_108_000M, M1152X864_R75_HSP, M1152X864_R75_VSP, + {1600, 1152, 1152, 448, 1216, 128, 900, 864, 864, 36, 865, 3} } + +}; + +/* 1280x720 (HDMI 720P)*/ +struct crt_mode_table CRTM1280x720[] = { + /*r_rate,vclk,hsp,vsp */ + /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_74_481M, M1280X720_R60_HSP, M1280X720_R60_VSP, + {1648, 1280, 1280, 368, 1392, 40, 750, 720, 720, 30, 725, 5} }, + {REFRESH_50, CLK_60_466M, M1280X720_R50_HSP, M1280X720_R50_VSP, + {1632, 1280, 1280, 352, 1328, 128, 741, 720, 720, 21, 721, 3} } +}; + +/*1280x768 (GTF)*/ +struct crt_mode_table CRTM1280x768[] = { + /*r_rate,vclk,hsp,vsp */ + /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_80_136M, M1280X768_R60_HSP, M1280X768_R60_VSP, + {1680, 1280, 1280, 400, 1344, 136, 795, 768, 768, 27, 769, 3} }, + {REFRESH_50, CLK_65_178M, M1280X768_R50_HSP, M1280X768_R50_VSP, + {1648, 1280, 1280, 368, 1336, 128, 791, 768, 768, 23, 769, 3} } +}; + +/* 1280x800 (CVT) */ +struct crt_mode_table CRTM1280x800[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_83_375M, M1280X800_R60_HSP, M1280X800_R60_VSP, + {1680, 1280, 1280, 400, 1352, 128, 831, 800, 800, 31, 803, 6} } +}; + +/*1280x960*/ +struct crt_mode_table CRTM1280x960[] = { + /*r_rate,vclk,hsp,vsp */ + /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_108_000M, M1280X960_R60_HSP, M1280X960_R60_VSP, + {1800, 1280, 1280, 520, 1376, 112, 1000, 960, 960, 40, 961, 3} } +}; + +/* 1280x1024*/ +struct crt_mode_table CRTM1280x1024[] = { + /*r_rate,vclk,,hsp,vsp */ + /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_108_000M, M1280X1024_R60_HSP, M1280X1024_R60_VSP, + {1688, 1280, 1280, 408, 1328, 112, 1066, 1024, 1024, 42, 1025, + 3} }, + {REFRESH_75, CLK_135_000M, M1280X1024_R75_HSP, M1280X1024_R75_VSP, + {1688, 1280, 1280, 408, 1296, 144, 1066, 1024, 1024, 42, 1025, + 3} }, + {REFRESH_85, CLK_157_500M, M1280X1024_R85_HSP, M1280X1024_R85_VSP, + {1728, 1280, 1280, 448, 1344, 160, 1072, 1024, 1024, 48, 1025, 3} } +}; + +/* 1368x768 (GTF) */ +struct crt_mode_table CRTM1368x768[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_85_860M, M1368X768_R60_HSP, M1368X768_R60_VSP, + {1800, 1368, 1368, 432, 1440, 144, 795, 768, 768, 27, 769, 3} } +}; + +/*1440x1050 (GTF)*/ +struct crt_mode_table CRTM1440x1050[] = { + /*r_rate,vclk,hsp,vsp */ + /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_125_104M, M1440X1050_R60_HSP, M1440X1050_R60_VSP, + {1936, 1440, 1440, 496, 1536, 152, 1077, 1040, 1040, 37, 1041, 3} } +}; + +/* 1600x1200*/ +struct crt_mode_table CRTM1600x1200[] = { + /*r_rate,vclk,hsp,vsp */ + /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_162_000M, M1600X1200_R60_HSP, M1600X1200_R60_VSP, + {2160, 1600, 1600, 560, 1664, 192, 1250, 1200, 1200, 50, 1201, + 3} }, + {REFRESH_75, CLK_202_500M, M1600X1200_R75_HSP, M1600X1200_R75_VSP, + {2160, 1600, 1600, 560, 1664, 192, 1250, 1200, 1200, 50, 1201, 3} } + +}; + +/* 1680x1050 (CVT) */ +struct crt_mode_table CRTM1680x1050[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_146_760M, M1680x1050_R60_HSP, M1680x1050_R60_VSP, + {2240, 1680, 1680, 560, 1784, 176, 1089, 1050, 1050, 39, 1053, + 6} }, + {REFRESH_75, CLK_187_000M, M1680x1050_R75_HSP, M1680x1050_R75_VSP, + {2272, 1680, 1680, 592, 1800, 176, 1099, 1050, 1050, 49, 1053, 6} } +}; + +/* 1680x1050 (CVT Reduce Blanking) */ +struct crt_mode_table CRTM1680x1050_RB[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_119_000M, M1680x1050_RB_R60_HSP, + M1680x1050_RB_R60_VSP, + {1840, 1680, 1680, 160, 1728, 32, 1080, 1050, 1050, 30, 1053, 6} } +}; + +/* 1920x1080 (CVT)*/ +struct crt_mode_table CRTM1920x1080[] = { + /*r_rate,vclk,hsp,vsp */ + /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_172_798M, M1920X1080_R60_HSP, M1920X1080_R60_VSP, + {2576, 1920, 1920, 656, 2048, 200, 1120, 1080, 1080, 40, 1083, 5} } +}; + +/* 1920x1080 (CVT with Reduce Blanking) */ +struct crt_mode_table CRTM1920x1080_RB[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_138_400M, M1920X1080_RB_R60_HSP, + M1920X1080_RB_R60_VSP, + {2080, 1920, 1920, 160, 1968, 32, 1111, 1080, 1080, 31, 1083, 5} } +}; + +/* 1920x1440*/ +struct crt_mode_table CRTM1920x1440[] = { + /*r_rate,vclk,hsp,vsp */ + /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_234_000M, M1920X1440_R60_HSP, M1920X1440_R60_VSP, + {2600, 1920, 1920, 680, 2048, 208, 1500, 1440, 1440, 60, 1441, + 3} }, + {REFRESH_75, CLK_297_500M, M1920X1440_R75_HSP, M1920X1440_R75_VSP, + {2640, 1920, 1920, 720, 2064, 224, 1500, 1440, 1440, 60, 1441, 3} } +}; + +/* 1400x1050 (CVT) */ +struct crt_mode_table CRTM1400x1050[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_121_750M, M1400X1050_R60_HSP, M1400X1050_R60_VSP, + {1864, 1400, 1400, 464, 1488, 144, 1089, 1050, 1050, 39, 1053, + 4} }, + {REFRESH_75, CLK_156_000M, M1400X1050_R75_HSP, M1400X1050_R75_VSP, + {1896, 1400, 1400, 496, 1504, 144, 1099, 1050, 1050, 49, 1053, 4} } +}; + +/* 1400x1050 (CVT Reduce Blanking) */ +struct crt_mode_table CRTM1400x1050_RB[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_101_000M, M1400X1050_RB_R60_HSP, + M1400X1050_RB_R60_VSP, + {1560, 1400, 1400, 160, 1448, 32, 1080, 1050, 1050, 30, 1053, 4} } +}; + +/* 960x600 (CVT) */ +struct crt_mode_table CRTM960x600[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_45_250M, M960X600_R60_HSP, M960X600_R60_VSP, + {1216, 960, 960, 256, 992, 96, 624, 600, 600, 24, 603, 6} } +}; + +/* 1000x600 (GTF) */ +struct crt_mode_table CRTM1000x600[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_48_000M, M1000X600_R60_HSP, M1000X600_R60_VSP, + {1288, 1000, 1000, 288, 1040, 104, 622, 600, 600, 22, 601, 3} } +}; + +/* 1024x576 (GTF) */ +struct crt_mode_table CRTM1024x576[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_46_996M, M1024X576_R60_HSP, M1024X576_R60_VSP, + {1312, 1024, 1024, 288, 1064, 104, 597, 576, 576, 21, 577, 3} } +}; + +/* 1088x612 (CVT) */ +struct crt_mode_table CRTM1088x612[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_52_977M, M1088X612_R60_HSP, M1088X612_R60_VSP, + {1392, 1088, 1088, 304, 1136, 104, 636, 612, 612, 24, 615, 5} } +}; + +/* 1152x720 (CVT) */ +struct crt_mode_table CRTM1152x720[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_66_750M, M1152X720_R60_HSP, M1152X720_R60_VSP, + {1488, 1152, 1152, 336, 1208, 112, 748, 720, 720, 28, 723, 6} } +}; + +/* 1200x720 (GTF) */ +struct crt_mode_table CRTM1200x720[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_70_159M, M1200X720_R60_HSP, M1200X720_R60_VSP, + {1568, 1200, 1200, 368, 1256, 128, 746, 720, 720, 26, 721, 3} } +}; + +/* 1280x600 (GTF) */ +struct crt_mode_table CRTM1280x600[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_61_500M, M1280x600_R60_HSP, M1280x600_R60_VSP, + {1648, 1280, 1280, 368, 1336, 128, 622, 600, 600, 22, 601, 3} } +}; + +/* 1360x768 (CVT) */ +struct crt_mode_table CRTM1360x768[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_84_750M, M1360X768_R60_HSP, M1360X768_R60_VSP, + {1776, 1360, 1360, 416, 1432, 136, 798, 768, 768, 30, 771, 5} } +}; + +/* 1360x768 (CVT Reduce Blanking) */ +struct crt_mode_table CRTM1360x768_RB[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_72_000M, M1360X768_RB_R60_HSP, + M1360X768_RB_R60_VSP, + {1520, 1360, 1360, 160, 1408, 32, 790, 768, 768, 22, 771, 5} } +}; + +/* 1366x768 (GTF) */ +struct crt_mode_table CRTM1366x768[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_85_860M, M1368X768_R60_HSP, M1368X768_R60_VSP, + {1800, 1368, 1368, 432, 1440, 144, 795, 768, 768, 27, 769, 3} }, + {REFRESH_50, CLK_69_924M, M1368X768_R50_HSP, M1368X768_R50_VSP, + {1768, 1368, 1368, 400, 1424, 144, 791, 768, 768, 23, 769, 3} } +}; + +/* 1440x900 (CVT) */ +struct crt_mode_table CRTM1440x900[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_106_500M, M1440X900_R60_HSP, M1440X900_R60_VSP, + {1904, 1440, 1440, 464, 1520, 152, 934, 900, 900, 34, 903, 6} }, + {REFRESH_75, CLK_136_700M, M1440X900_R75_HSP, M1440X900_R75_VSP, + {1936, 1440, 1440, 496, 1536, 152, 942, 900, 900, 42, 903, 6} } +}; + +/* 1440x900 (CVT Reduce Blanking) */ +struct crt_mode_table CRTM1440x900_RB[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_88_750M, M1440X900_RB_R60_HSP, + M1440X900_RB_R60_VSP, + {1600, 1440, 1440, 160, 1488, 32, 926, 900, 900, 26, 903, 6} } +}; + +/* 1600x900 (CVT) */ +struct crt_mode_table CRTM1600x900[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_118_840M, M1600X900_R60_HSP, M1600X900_R60_VSP, + {2112, 1600, 1600, 512, 1688, 168, 934, 900, 900, 34, 903, 5} } +}; + +/* 1600x900 (CVT Reduce Blanking) */ +struct crt_mode_table CRTM1600x900_RB[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_97_750M, M1600X900_RB_R60_HSP, + M1600X900_RB_R60_VSP, + {1760, 1600, 1600, 160, 1648, 32, 926, 900, 900, 26, 903, 5} } +}; + +/* 1600x1024 (GTF) */ +struct crt_mode_table CRTM1600x1024[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_136_700M, M1600X1024_R60_HSP, M1600X1024_R60_VSP, + {2144, 1600, 1600, 544, 1704, 168, 1060, 1024, 1024, 36, 1025, 3} } +}; + +/* 1792x1344 (DMT) */ +struct crt_mode_table CRTM1792x1344[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_204_000M, M1792x1344_R60_HSP, M1792x1344_R60_VSP, + {2448, 1792, 1792, 656, 1920, 200, 1394, 1344, 1344, 50, 1345, 3} } +}; + +/* 1856x1392 (DMT) */ +struct crt_mode_table CRTM1856x1392[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_218_500M, M1856x1392_R60_HSP, M1856x1392_R60_VSP, + {2528, 1856, 1856, 672, 1952, 224, 1439, 1392, 1392, 47, 1393, 3} } +}; + +/* 1920x1200 (CVT) */ +struct crt_mode_table CRTM1920x1200[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_193_295M, M1920X1200_R60_HSP, M1920X1200_R60_VSP, + {2592, 1920, 1920, 672, 2056, 200, 1245, 1200, 1200, 45, 1203, 6} } +}; + +/* 1920x1200 (CVT with Reduce Blanking) */ +struct crt_mode_table CRTM1920x1200_RB[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_153_920M, M1920X1200_RB_R60_HSP, + M1920X1200_RB_R60_VSP, + {2080, 1920, 1920, 160, 1968, 32, 1235, 1200, 1200, 35, 1203, 6} } +}; + +/* 2048x1536 (CVT) */ +struct crt_mode_table CRTM2048x1536[] = { + /* r_rate, vclk, hsp, vsp */ + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {REFRESH_60, CLK_267_250M, M2048x1536_R60_HSP, M2048x1536_R60_VSP, + {2800, 2048, 2048, 752, 2200, 224, 1592, 1536, 1536, 56, 1539, 4} } +}; + +/* Video Mode Table */ +/* struct VideoModeTable {*/ +/* int ModeIndex;*/ +/* struct crt_mode_table *crtc;*/ +/* int mode_array;*/ +/* };*/ +struct VideoModeTable CLE266Modes[] = { + /* Display : 480x640 (GTF) */ + {VIA_RES_480X640, CRTM480x640, ARRAY_SIZE(CRTM480x640)}, + + /* Display : 640x480 */ + {VIA_RES_640X480, CRTM640x480, ARRAY_SIZE(CRTM640x480)}, + + /* Display : 720x480 (GTF) */ + {VIA_RES_720X480, CRTM720x480, ARRAY_SIZE(CRTM720x480)}, + + /* Display : 720x576 (GTF) */ + {VIA_RES_720X576, CRTM720x576, ARRAY_SIZE(CRTM720x576)}, + + /* Display : 800x600 */ + {VIA_RES_800X600, CRTM800x600, ARRAY_SIZE(CRTM800x600)}, + + /* Display : 800x480 (CVT) */ + {VIA_RES_800X480, CRTM800x480, ARRAY_SIZE(CRTM800x480)}, + + /* Display : 848x480 (CVT) */ + {VIA_RES_848X480, CRTM848x480, ARRAY_SIZE(CRTM848x480)}, + + /* Display : 852x480 (GTF) */ + {VIA_RES_856X480, CRTM852x480, ARRAY_SIZE(CRTM852x480)}, + + /* Display : 1024x512 (GTF) */ + {VIA_RES_1024X512, CRTM1024x512, ARRAY_SIZE(CRTM1024x512)}, + + /* Display : 1024x600 */ + {VIA_RES_1024X600, CRTM1024x600, ARRAY_SIZE(CRTM1024x600)}, + + /* Display : 1024x576 (GTF) */ + /*{ VIA_RES_1024X576, CRTM1024x576, ARRAY_SIZE(CRTM1024x576)}, */ + + /* Display : 1024x768 */ + {VIA_RES_1024X768, CRTM1024x768, ARRAY_SIZE(CRTM1024x768)}, + + /* Display : 1152x864 */ + {VIA_RES_1152X864, CRTM1152x864, ARRAY_SIZE(CRTM1152x864)}, + + /* Display : 1280x768 (GTF) */ + {VIA_RES_1280X768, CRTM1280x768, ARRAY_SIZE(CRTM1280x768)}, + + /* Display : 960x600 (CVT) */ + {VIA_RES_960X600, CRTM960x600, ARRAY_SIZE(CRTM960x600)}, + + /* Display : 1000x600 (GTF) */ + {VIA_RES_1000X600, CRTM1000x600, ARRAY_SIZE(CRTM1000x600)}, + + /* Display : 1024x576 (GTF) */ + {VIA_RES_1024X576, CRTM1024x576, ARRAY_SIZE(CRTM1024x576)}, + + /* Display : 1088x612 (GTF) */ + {VIA_RES_1088X612, CRTM1088x612, ARRAY_SIZE(CRTM1088x612)}, + + /* Display : 1152x720 (CVT) */ + {VIA_RES_1152X720, CRTM1152x720, ARRAY_SIZE(CRTM1152x720)}, + + /* Display : 1200x720 (GTF) */ + {VIA_RES_1200X720, CRTM1200x720, ARRAY_SIZE(CRTM1200x720)}, + + /* Display : 1280x600 (GTF) */ + {VIA_RES_1280X600, CRTM1280x600, ARRAY_SIZE(CRTM1280x600)}, + + /* Display : 1280x800 (CVT) */ + {VIA_RES_1280X800, CRTM1280x800, ARRAY_SIZE(CRTM1280x800)}, + + /* Display : 1280x800 (GTF) */ + /*{ M1280x800, CRTM1280x800, ARRAY_SIZE(CRTM1280x800)}, */ + + /* Display : 1280x960 */ + {VIA_RES_1280X960, CRTM1280x960, ARRAY_SIZE(CRTM1280x960)}, + + /* Display : 1280x1024 */ + {VIA_RES_1280X1024, CRTM1280x1024, ARRAY_SIZE(CRTM1280x1024)}, + + /* Display : 1360x768 (CVT) */ + {VIA_RES_1360X768, CRTM1360x768, ARRAY_SIZE(CRTM1360x768)}, + + /* Display : 1360x768 (CVT Reduce Blanking) */ + {VIA_RES_1360X768_RB, CRTM1360x768_RB, + ARRAY_SIZE(CRTM1360x768_RB)}, + + /* Display : 1366x768 */ + {VIA_RES_1366X768, CRTM1366x768, ARRAY_SIZE(CRTM1366x768)}, + + /* Display : 1368x768 (GTF) */ + /*{ M1368x768,CRTM1368x768,ARRAY_SIZE(CRTM1368x768)}, */ + /* Display : 1368x768 (GTF) */ + {VIA_RES_1368X768, CRTM1368x768, ARRAY_SIZE(CRTM1368x768)}, + + /* Display : 1440x900 (CVT) */ + {VIA_RES_1440X900, CRTM1440x900, ARRAY_SIZE(CRTM1440x900)}, + + /* Display : 1440x900 (CVT Reduce Blanking) */ + {VIA_RES_1440X900_RB, CRTM1440x900_RB, + ARRAY_SIZE(CRTM1440x900_RB)}, + + /* Display : 1440x1050 (GTF) */ + {VIA_RES_1440X1050, CRTM1440x1050, ARRAY_SIZE(CRTM1440x1050)}, + + /* Display : 1400x1050 (CVT Reduce Blanking) */ + {VIA_RES_1400X1050_RB, CRTM1400x1050_RB, + ARRAY_SIZE(CRTM1400x1050_RB)}, + + /* Display : 1600x900 (CVT) */ + {VIA_RES_1600X900, CRTM1600x900, ARRAY_SIZE(CRTM1600x900)}, + + /* Display : 1600x900 (CVT Reduce Blanking) */ + {VIA_RES_1600X900_RB, CRTM1600x900_RB, + ARRAY_SIZE(CRTM1600x900_RB)}, + + /* Display : 1600x1024 (GTF) */ + {VIA_RES_1600X1024, CRTM1600x1024, ARRAY_SIZE(CRTM1600x1024)}, + + /* Display : 1600x1200 */ + {VIA_RES_1600X1200, CRTM1600x1200, ARRAY_SIZE(CRTM1600x1200)}, + + /* Display : 1680x1050 (CVT) */ + {VIA_RES_1680X1050, CRTM1680x1050, ARRAY_SIZE(CRTM1680x1050)}, + + /* Display : 1680x1050 (CVT Reduce Blanking) */ + {VIA_RES_1680X1050_RB, CRTM1680x1050_RB, + ARRAY_SIZE(CRTM1680x1050_RB)}, + + /* Display : 1792x1344 (DMT) */ + {VIA_RES_1792X1344, CRTM1792x1344, ARRAY_SIZE(CRTM1792x1344)}, + + /* Display : 1856x1392 (DMT) */ + {VIA_RES_1856X1392, CRTM1856x1392, ARRAY_SIZE(CRTM1856x1392)}, + + /* Display : 1920x1440 */ + {VIA_RES_1920X1440, CRTM1920x1440, ARRAY_SIZE(CRTM1920x1440)}, + + /* Display : 2048x1536 */ + {VIA_RES_2048X1536, CRTM2048x1536, ARRAY_SIZE(CRTM2048x1536)}, + + /* Display : 1280x720 */ + {VIA_RES_1280X720, CRTM1280x720, ARRAY_SIZE(CRTM1280x720)}, + + /* Display : 1920x1080 (CVT) */ + {VIA_RES_1920X1080, CRTM1920x1080, ARRAY_SIZE(CRTM1920x1080)}, + + /* Display : 1920x1080 (CVT Reduce Blanking) */ + {VIA_RES_1920X1080_RB, CRTM1920x1080_RB, + ARRAY_SIZE(CRTM1920x1080_RB)}, + + /* Display : 1920x1200 (CVT) */ + {VIA_RES_1920X1200, CRTM1920x1200, ARRAY_SIZE(CRTM1920x1200)}, + + /* Display : 1920x1200 (CVT Reduce Blanking) */ + {VIA_RES_1920X1200_RB, CRTM1920x1200_RB, + ARRAY_SIZE(CRTM1920x1200_RB)}, + + /* Display : 1400x1050 (CVT) */ + {VIA_RES_1400X1050, CRTM1400x1050, ARRAY_SIZE(CRTM1400x1050)} +}; +struct crt_mode_table CEAM1280x720[] = { + {REFRESH_60, CLK_74_270M, M1280X720_CEA_R60_HSP, + M1280X720_CEA_R60_VSP, + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {1650, 1280, 1280, 370, 1390, 40, 750, 720, 720, 30, 725, 5} } +}; +struct crt_mode_table CEAM1920x1080[] = { + {REFRESH_60, CLK_148_500M, M1920X1080_CEA_R60_HSP, + M1920X1080_CEA_R60_VSP, + /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ + {2200, 1920, 1920, 300, 2008, 44, 1125, 1080, 1080, 45, 1084, 5} } +}; +struct VideoModeTable CEA_HDMI_Modes[] = { + /* Display : 1280x720 */ + {VIA_RES_1280X720, CEAM1280x720, ARRAY_SIZE(CEAM1280x720)}, + {VIA_RES_1920X1080, CEAM1920x1080, ARRAY_SIZE(CEAM1920x1080)} +}; diff --git a/drivers/video/via/viamode.h b/drivers/video/via/viamode.h new file mode 100644 index 000000000000..1a5de50a23a2 --- /dev/null +++ b/drivers/video/via/viamode.h @@ -0,0 +1,177 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef __VIAMODE_H__ +#define __VIAMODE_H__ + +#include "global.h" + +struct VPITTable { + unsigned char Misc; + unsigned char SR[StdSR]; + unsigned char GR[StdGR]; + unsigned char AR[StdAR]; +}; + +struct VideoModeTable { + int ModeIndex; + struct crt_mode_table *crtc; + int mode_array; +}; + +struct patch_table { + int mode_index; + int table_length; + struct io_reg *io_reg_table; +}; + +struct res_map_refresh { + int hres; + int vres; + int pixclock; + int vmode_refresh; +}; + +#define NUM_TOTAL_RES_MAP_REFRESH ARRAY_SIZE(res_map_refresh_tbl) +#define NUM_TOTAL_CEA_MODES ARRAY_SIZE(CEA_HDMI_Modes) +#define NUM_TOTAL_CN400_ModeXregs ARRAY_SIZE(CN400_ModeXregs) +#define NUM_TOTAL_CN700_ModeXregs ARRAY_SIZE(CN700_ModeXregs) +#define NUM_TOTAL_KM400_ModeXregs ARRAY_SIZE(KM400_ModeXregs) +#define NUM_TOTAL_CX700_ModeXregs ARRAY_SIZE(CX700_ModeXregs) +#define NUM_TOTAL_VX800_ModeXregs ARRAY_SIZE(VX800_ModeXregs) +#define NUM_TOTAL_CLE266_ModeXregs ARRAY_SIZE(CLE266_ModeXregs) +#define NUM_TOTAL_PATCH_MODE ARRAY_SIZE(res_patch_table) +#define NUM_TOTAL_MODETABLE ARRAY_SIZE(CLE266Modes) + +/********************/ +/* Mode Table */ +/********************/ + +/* 480x640 */ +extern struct crt_mode_table CRTM480x640[1]; +/* 640x480*/ +extern struct crt_mode_table CRTM640x480[5]; +/*720x480 (GTF)*/ +extern struct crt_mode_table CRTM720x480[1]; +/*720x576 (GTF)*/ +extern struct crt_mode_table CRTM720x576[1]; +/* 800x480 (CVT) */ +extern struct crt_mode_table CRTM800x480[1]; +/* 800x600*/ +extern struct crt_mode_table CRTM800x600[5]; +/* 848x480 (CVT) */ +extern struct crt_mode_table CRTM848x480[1]; +/*856x480 (GTF) convert to 852x480*/ +extern struct crt_mode_table CRTM852x480[1]; +/*1024x512 (GTF)*/ +extern struct crt_mode_table CRTM1024x512[1]; +/* 1024x600*/ +extern struct crt_mode_table CRTM1024x600[1]; +/* 1024x768*/ +extern struct crt_mode_table CRTM1024x768[4]; +/* 1152x864*/ +extern struct crt_mode_table CRTM1152x864[1]; +/* 1280x720 (HDMI 720P)*/ +extern struct crt_mode_table CRTM1280x720[2]; +/*1280x768 (GTF)*/ +extern struct crt_mode_table CRTM1280x768[2]; +/* 1280x800 (CVT) */ +extern struct crt_mode_table CRTM1280x800[1]; +/*1280x960*/ +extern struct crt_mode_table CRTM1280x960[1]; +/* 1280x1024*/ +extern struct crt_mode_table CRTM1280x1024[3]; +/* 1368x768 (GTF) */ +extern struct crt_mode_table CRTM1368x768[1]; +/*1440x1050 (GTF)*/ +extern struct crt_mode_table CRTM1440x1050[1]; +/* 1600x1200*/ +extern struct crt_mode_table CRTM1600x1200[2]; +/* 1680x1050 (CVT) */ +extern struct crt_mode_table CRTM1680x1050[2]; +/* 1680x1050 (CVT Reduce Blanking) */ +extern struct crt_mode_table CRTM1680x1050_RB[1]; +/* 1920x1080 (CVT)*/ +extern struct crt_mode_table CRTM1920x1080[1]; +/* 1920x1080 (CVT with Reduce Blanking) */ +extern struct crt_mode_table CRTM1920x1080_RB[1]; +/* 1920x1440*/ +extern struct crt_mode_table CRTM1920x1440[2]; +/* 1400x1050 (CVT) */ +extern struct crt_mode_table CRTM1400x1050[2]; +/* 1400x1050 (CVT Reduce Blanking) */ +extern struct crt_mode_table CRTM1400x1050_RB[1]; +/* 960x600 (CVT) */ +extern struct crt_mode_table CRTM960x600[1]; +/* 1000x600 (GTF) */ +extern struct crt_mode_table CRTM1000x600[1]; +/* 1024x576 (GTF) */ +extern struct crt_mode_table CRTM1024x576[1]; +/* 1088x612 (CVT) */ +extern struct crt_mode_table CRTM1088x612[1]; +/* 1152x720 (CVT) */ +extern struct crt_mode_table CRTM1152x720[1]; +/* 1200x720 (GTF) */ +extern struct crt_mode_table CRTM1200x720[1]; +/* 1280x600 (GTF) */ +extern struct crt_mode_table CRTM1280x600[1]; +/* 1360x768 (CVT) */ +extern struct crt_mode_table CRTM1360x768[1]; +/* 1360x768 (CVT Reduce Blanking) */ +extern struct crt_mode_table CRTM1360x768_RB[1]; +/* 1366x768 (GTF) */ +extern struct crt_mode_table CRTM1366x768[2]; +/* 1440x900 (CVT) */ +extern struct crt_mode_table CRTM1440x900[2]; +/* 1440x900 (CVT Reduce Blanking) */ +extern struct crt_mode_table CRTM1440x900_RB[1]; +/* 1600x900 (CVT) */ +extern struct crt_mode_table CRTM1600x900[1]; +/* 1600x900 (CVT Reduce Blanking) */ +extern struct crt_mode_table CRTM1600x900_RB[1]; +/* 1600x1024 (GTF) */ +extern struct crt_mode_table CRTM1600x1024[1]; +/* 1792x1344 (DMT) */ +extern struct crt_mode_table CRTM1792x1344[1]; +/* 1856x1392 (DMT) */ +extern struct crt_mode_table CRTM1856x1392[1]; +/* 1920x1200 (CVT) */ +extern struct crt_mode_table CRTM1920x1200[1]; +/* 1920x1200 (CVT with Reduce Blanking) */ +extern struct crt_mode_table CRTM1920x1200_RB[1]; +/* 2048x1536 (CVT) */ +extern struct crt_mode_table CRTM2048x1536[1]; +extern struct VideoModeTable CLE266Modes[47]; +extern struct crt_mode_table CEAM1280x720[1]; +extern struct crt_mode_table CEAM1920x1080[1]; +extern struct VideoModeTable CEA_HDMI_Modes[2]; + +extern struct res_map_refresh res_map_refresh_tbl[61]; +extern struct io_reg CN400_ModeXregs[52]; +extern struct io_reg CN700_ModeXregs[66]; +extern struct io_reg KM400_ModeXregs[55]; +extern struct io_reg CX700_ModeXregs[58]; +extern struct io_reg VX800_ModeXregs[58]; +extern struct io_reg CLE266_ModeXregs[32]; +extern struct io_reg PM1024x768[2]; +extern struct patch_table res_patch_table[1]; +extern struct VPITTable VPIT; +#endif /* __VIAMODE_H__ */ diff --git a/drivers/video/via/vt1636.c b/drivers/video/via/vt1636.c new file mode 100644 index 000000000000..322a9f993550 --- /dev/null +++ b/drivers/video/via/vt1636.c @@ -0,0 +1,306 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "global.h" + +u8 viafb_gpio_i2c_read_lvds(struct lvds_setting_information + *plvds_setting_info, struct lvds_chip_information *plvds_chip_info, + u8 index) +{ + u8 data; + + viaparinfo->i2c_stuff.i2c_port = plvds_chip_info->i2c_port; + viafb_i2c_readbyte(plvds_chip_info->lvds_chip_slave_addr, index, &data); + + return data; +} + +void viafb_gpio_i2c_write_mask_lvds(struct lvds_setting_information + *plvds_setting_info, struct lvds_chip_information + *plvds_chip_info, struct IODATA io_data) +{ + int index, data; + + viaparinfo->i2c_stuff.i2c_port = plvds_chip_info->i2c_port; + + index = io_data.Index; + data = viafb_gpio_i2c_read_lvds(plvds_setting_info, plvds_chip_info, + index); + data = (data & (~io_data.Mask)) | io_data.Data; + + viafb_i2c_writebyte(plvds_chip_info->lvds_chip_slave_addr, index, data); +} + +void viafb_init_lvds_vt1636(struct lvds_setting_information + *plvds_setting_info, struct lvds_chip_information *plvds_chip_info) +{ + int reg_num, i; + + /* Common settings: */ + reg_num = ARRAY_SIZE(COMMON_INIT_TBL_VT1636); + + for (i = 0; i < reg_num; i++) { + viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, + plvds_chip_info, + COMMON_INIT_TBL_VT1636[i]); + } + + /* Input Data Mode Select */ + if (plvds_setting_info->device_lcd_dualedge) { + viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, + plvds_chip_info, + DUAL_CHANNEL_ENABLE_TBL_VT1636[0]); + } else { + viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, + plvds_chip_info, + SINGLE_CHANNEL_ENABLE_TBL_VT1636[0]); + } + + if (plvds_setting_info->LCDDithering) { + viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, + plvds_chip_info, + DITHERING_ENABLE_TBL_VT1636[0]); + } else { + viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, + plvds_chip_info, + DITHERING_DISABLE_TBL_VT1636[0]); + } +} + +void viafb_enable_lvds_vt1636(struct lvds_setting_information + *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info) +{ + + viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info, + VDD_ON_TBL_VT1636[0]); + + /* Pad on: */ + switch (plvds_chip_info->output_interface) { + case INTERFACE_DVP0: + { + viafb_write_reg_mask(SR1E, VIASR, 0xC0, 0xC0); + break; + } + + case INTERFACE_DVP1: + { + viafb_write_reg_mask(SR1E, VIASR, 0x30, 0x30); + break; + } + + case INTERFACE_DFP_LOW: + { + viafb_write_reg_mask(SR2A, VIASR, 0x03, 0x03); + break; + } + + case INTERFACE_DFP_HIGH: + { + viafb_write_reg_mask(SR2A, VIASR, 0x03, 0x0C); + break; + } + + } +} + +void viafb_disable_lvds_vt1636(struct lvds_setting_information + *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info) +{ + + viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info, + VDD_OFF_TBL_VT1636[0]); + + /* Pad off: */ + switch (plvds_chip_info->output_interface) { + case INTERFACE_DVP0: + { + viafb_write_reg_mask(SR1E, VIASR, 0x00, 0xC0); + break; + } + + case INTERFACE_DVP1: + { + viafb_write_reg_mask(SR1E, VIASR, 0x00, 0x30); + break; + } + + case INTERFACE_DFP_LOW: + { + viafb_write_reg_mask(SR2A, VIASR, 0x00, 0x03); + break; + } + + case INTERFACE_DFP_HIGH: + { + viafb_write_reg_mask(SR2A, VIASR, 0x00, 0x0C); + break; + } + + } +} + +bool viafb_lvds_identify_vt1636(void) +{ + u8 Buffer[2]; + + DEBUG_MSG(KERN_INFO "viafb_lvds_identify_vt1636.\n"); + + /* Sense VT1636 LVDS Transmiter */ + viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr = + VT1636_LVDS_I2C_ADDR; + + /* Check vendor ID first: */ + viafb_i2c_readbyte((u8) viaparinfo->chip_info->lvds_chip_info. + lvds_chip_slave_addr, + 0x00, &Buffer[0]); + viafb_i2c_readbyte((u8) viaparinfo->chip_info->lvds_chip_info. + lvds_chip_slave_addr, + 0x01, &Buffer[1]); + + if (!((Buffer[0] == 0x06) && (Buffer[1] == 0x11))) + return false; + + /* Check Chip ID: */ + viafb_i2c_readbyte((u8) viaparinfo->chip_info->lvds_chip_info. + lvds_chip_slave_addr, + 0x02, &Buffer[0]); + viafb_i2c_readbyte((u8) viaparinfo->chip_info->lvds_chip_info. + lvds_chip_slave_addr, + 0x03, &Buffer[1]); + if ((Buffer[0] == 0x45) && (Buffer[1] == 0x33)) { + viaparinfo->chip_info->lvds_chip_info.lvds_chip_name = + VT1636_LVDS; + return true; + } + + return false; +} + +static int get_clk_range_index(u32 Clk) +{ + if (Clk < DPA_CLK_30M) + return DPA_CLK_RANGE_30M; + else if (Clk < DPA_CLK_50M) + return DPA_CLK_RANGE_30_50M; + else if (Clk < DPA_CLK_70M) + return DPA_CLK_RANGE_50_70M; + else if (Clk < DPA_CLK_100M) + return DPA_CLK_RANGE_70_100M; + else if (Clk < DPA_CLK_150M) + return DPA_CLK_RANGE_100_150M; + else + return DPA_CLK_RANGE_150M; +} + +static int get_lvds_dpa_setting_index(int panel_size_id, + struct VT1636_DPA_SETTING *p_vt1636_dpasetting_tbl, + int tbl_size) +{ + int i; + + for (i = 0; i < tbl_size; i++) { + if (panel_size_id == p_vt1636_dpasetting_tbl->PanelSizeID) + return i; + + p_vt1636_dpasetting_tbl++; + } + + return 0; +} + +static void set_dpa_vt1636(struct lvds_setting_information + *plvds_setting_info, struct lvds_chip_information *plvds_chip_info, + struct VT1636_DPA_SETTING *p_vt1636_dpa_setting) +{ + struct IODATA io_data; + + io_data.Index = 0x09; + io_data.Mask = 0x1F; + io_data.Data = p_vt1636_dpa_setting->CLK_SEL_ST1; + viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, + plvds_chip_info, io_data); + + io_data.Index = 0x08; + io_data.Mask = 0x0F; + io_data.Data = p_vt1636_dpa_setting->CLK_SEL_ST2; + viafb_gpio_i2c_write_mask_lvds(plvds_setting_info, plvds_chip_info, + io_data); +} + +void viafb_vt1636_patch_skew_on_vt3324( + struct lvds_setting_information *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info) +{ + int index, size; + + DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3324.\n"); + + /* Graphics DPA settings: */ + index = get_clk_range_index(plvds_setting_info->vclk); + viafb_set_dpa_gfx(plvds_chip_info->output_interface, + &GFX_DPA_SETTING_TBL_VT3324[index]); + + /* LVDS Transmitter DPA settings: */ + size = ARRAY_SIZE(VT1636_DPA_SETTING_TBL_VT3324); + index = + get_lvds_dpa_setting_index(plvds_setting_info->lcd_panel_id, + VT1636_DPA_SETTING_TBL_VT3324, size); + set_dpa_vt1636(plvds_setting_info, plvds_chip_info, + &VT1636_DPA_SETTING_TBL_VT3324[index]); +} + +void viafb_vt1636_patch_skew_on_vt3327( + struct lvds_setting_information *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info) +{ + int index, size; + + DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3327.\n"); + + /* Graphics DPA settings: */ + index = get_clk_range_index(plvds_setting_info->vclk); + viafb_set_dpa_gfx(plvds_chip_info->output_interface, + &GFX_DPA_SETTING_TBL_VT3327[index]); + + /* LVDS Transmitter DPA settings: */ + size = ARRAY_SIZE(VT1636_DPA_SETTING_TBL_VT3327); + index = + get_lvds_dpa_setting_index(plvds_setting_info->lcd_panel_id, + VT1636_DPA_SETTING_TBL_VT3327, size); + set_dpa_vt1636(plvds_setting_info, plvds_chip_info, + &VT1636_DPA_SETTING_TBL_VT3327[index]); +} + +void viafb_vt1636_patch_skew_on_vt3364( + struct lvds_setting_information *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info) +{ + int index; + + DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3364.\n"); + + /* Graphics DPA settings: */ + index = get_clk_range_index(plvds_setting_info->vclk); + viafb_set_dpa_gfx(plvds_chip_info->output_interface, + &GFX_DPA_SETTING_TBL_VT3364[index]); +} diff --git a/drivers/video/via/vt1636.h b/drivers/video/via/vt1636.h new file mode 100644 index 000000000000..2a150c58c7ed --- /dev/null +++ b/drivers/video/via/vt1636.h @@ -0,0 +1,44 @@ +/* + * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved. + + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License as published by the Free Software Foundation; + * either version 2, or (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even + * the implied warranty of MERCHANTABILITY or FITNESS FOR + * A PARTICULAR PURPOSE.See the GNU General Public License + * for more details. + + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef _VT1636_H_ +#define _VT1636_H_ +#include "chip.h" +bool viafb_lvds_identify_vt1636(void); +void viafb_init_lvds_vt1636(struct lvds_setting_information + *plvds_setting_info, struct lvds_chip_information *plvds_chip_info); +void viafb_enable_lvds_vt1636(struct lvds_setting_information + *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info); +void viafb_disable_lvds_vt1636(struct lvds_setting_information + *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info); +void viafb_vt1636_patch_skew_on_vt3324( + struct lvds_setting_information *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info); +void viafb_vt1636_patch_skew_on_vt3327( + struct lvds_setting_information *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info); +void viafb_vt1636_patch_skew_on_vt3364( + struct lvds_setting_information *plvds_setting_info, + struct lvds_chip_information *plvds_chip_info); + +#endif diff --git a/drivers/w1/masters/ds1wm.c b/drivers/w1/masters/ds1wm.c index 10211e493001..29e144f81cbe 100644 --- a/drivers/w1/masters/ds1wm.c +++ b/drivers/w1/masters/ds1wm.c @@ -160,8 +160,10 @@ static int ds1wm_reset(struct ds1wm_data *ds1wm_data) * 625 us - 60 us - 240 us - 100 ns = 324.9 us * * We'll wait a bit longer just to be sure. + * Was udelay(500), but if it is going to busywait the cpu that long, + * might as well come back later. */ - udelay(500); + msleep(1); ds1wm_write_register(ds1wm_data, DS1WM_INT_EN, DS1WM_INTEN_ERBF | DS1WM_INTEN_ETMT | DS1WM_INTEN_EPD | @@ -274,8 +276,8 @@ static u8 ds1wm_reset_bus(void *data) return 0; } -static void ds1wm_search(void *data, u8 search_type, - w1_slave_found_callback slave_found) +static void ds1wm_search(void *data, struct w1_master *master_dev, + u8 search_type, w1_slave_found_callback slave_found) { struct ds1wm_data *ds1wm_data = data; int i; @@ -313,7 +315,7 @@ static void ds1wm_search(void *data, u8 search_type, ds1wm_write_register(ds1wm_data, DS1WM_CMD, ~DS1WM_CMD_SRA); ds1wm_reset(ds1wm_data); - slave_found(ds1wm_data, rom_id); + slave_found(master_dev, rom_id); } /* --------------------------------------------------------------------- */ diff --git a/drivers/w1/masters/ds2490.c b/drivers/w1/masters/ds2490.c index b63b5e044a4c..59ad6e95af8f 100644 --- a/drivers/w1/masters/ds2490.c +++ b/drivers/w1/masters/ds2490.c @@ -88,7 +88,7 @@ #define COMM_DT 0x2000 #define COMM_SPU 0x1000 #define COMM_F 0x0800 -#define COMM_NTP 0x0400 +#define COMM_NTF 0x0400 #define COMM_ICP 0x0200 #define COMM_RST 0x0100 @@ -98,11 +98,6 @@ #define BRANCH_MAIN 0xCC #define BRANCH_AUX 0x33 -/* - * Duration of the strong pull-up pulse in milliseconds. - */ -#define PULLUP_PULSE_DURATION 750 - /* Status flags */ #define ST_SPUA 0x01 /* Strong Pull-up is active */ #define ST_PRGA 0x02 /* 12V programming pulse is being generated */ @@ -112,6 +107,17 @@ #define ST_IDLE 0x20 /* DS2490 is currently idle */ #define ST_EPOF 0x80 +/* Result Register flags */ +#define RR_DETECT 0xA5 /* New device detected */ +#define RR_NRS 0x01 /* Reset no presence or ... */ +#define RR_SH 0x02 /* short on reset or set path */ +#define RR_APP 0x04 /* alarming presence on reset */ +#define RR_VPP 0x08 /* 12V expected not seen */ +#define RR_CMP 0x10 /* compare error */ +#define RR_CRC 0x20 /* CRC error detected */ +#define RR_RDP 0x40 /* redirected page */ +#define RR_EOS 0x80 /* end of search error */ + #define SPEED_NORMAL 0x00 #define SPEED_FLEXIBLE 0x01 #define SPEED_OVERDRIVE 0x02 @@ -131,6 +137,15 @@ struct ds_device int ep[NUM_EP]; + /* Strong PullUp + * 0: pullup not active, else duration in milliseconds + */ + int spu_sleep; + /* spu_bit contains COMM_SPU or 0 depending on if the strong pullup + * should be active or not for writes. + */ + u16 spu_bit; + struct w1_bus_master master; }; @@ -164,7 +179,6 @@ MODULE_DEVICE_TABLE(usb, ds_id_table); static int ds_probe(struct usb_interface *, const struct usb_device_id *); static void ds_disconnect(struct usb_interface *); -static inline void ds_dump_status(unsigned char *, unsigned char *, int); static int ds_send_control(struct ds_device *, u16, u16); static int ds_send_control_cmd(struct ds_device *, u16, u16); @@ -192,7 +206,7 @@ static int ds_send_control_cmd(struct ds_device *dev, u16 value, u16 index) return err; } -#if 0 + static int ds_send_control_mode(struct ds_device *dev, u16 value, u16 index) { int err; @@ -207,7 +221,7 @@ static int ds_send_control_mode(struct ds_device *dev, u16 value, u16 index) return err; } -#endif + static int ds_send_control(struct ds_device *dev, u16 value, u16 index) { int err; @@ -223,11 +237,6 @@ static int ds_send_control(struct ds_device *dev, u16 value, u16 index) return err; } -static inline void ds_dump_status(unsigned char *buf, unsigned char *str, int off) -{ - printk("%45s: %8x\n", str, buf[off]); -} - static int ds_recv_status_nodump(struct ds_device *dev, struct ds_status *st, unsigned char *buf, int size) { @@ -248,62 +257,81 @@ static int ds_recv_status_nodump(struct ds_device *dev, struct ds_status *st, return count; } -static int ds_recv_status(struct ds_device *dev, struct ds_status *st) +static inline void ds_print_msg(unsigned char *buf, unsigned char *str, int off) { - unsigned char buf[64]; - int count, err = 0, i; - - memcpy(st, buf, sizeof(*st)); + printk(KERN_INFO "%45s: %8x\n", str, buf[off]); +} - count = ds_recv_status_nodump(dev, st, buf, sizeof(buf)); - if (count < 0) - return err; +static void ds_dump_status(struct ds_device *dev, unsigned char *buf, int count) +{ + int i; - printk("0x%x: count=%d, status: ", dev->ep[EP_STATUS], count); + printk(KERN_INFO "0x%x: count=%d, status: ", dev->ep[EP_STATUS], count); for (i=0; i<count; ++i) printk("%02x ", buf[i]); - printk("\n"); + printk(KERN_INFO "\n"); if (count >= 16) { - ds_dump_status(buf, "enable flag", 0); - ds_dump_status(buf, "1-wire speed", 1); - ds_dump_status(buf, "strong pullup duration", 2); - ds_dump_status(buf, "programming pulse duration", 3); - ds_dump_status(buf, "pulldown slew rate control", 4); - ds_dump_status(buf, "write-1 low time", 5); - ds_dump_status(buf, "data sample offset/write-0 recovery time", 6); - ds_dump_status(buf, "reserved (test register)", 7); - ds_dump_status(buf, "device status flags", 8); - ds_dump_status(buf, "communication command byte 1", 9); - ds_dump_status(buf, "communication command byte 2", 10); - ds_dump_status(buf, "communication command buffer status", 11); - ds_dump_status(buf, "1-wire data output buffer status", 12); - ds_dump_status(buf, "1-wire data input buffer status", 13); - ds_dump_status(buf, "reserved", 14); - ds_dump_status(buf, "reserved", 15); + ds_print_msg(buf, "enable flag", 0); + ds_print_msg(buf, "1-wire speed", 1); + ds_print_msg(buf, "strong pullup duration", 2); + ds_print_msg(buf, "programming pulse duration", 3); + ds_print_msg(buf, "pulldown slew rate control", 4); + ds_print_msg(buf, "write-1 low time", 5); + ds_print_msg(buf, "data sample offset/write-0 recovery time", + 6); + ds_print_msg(buf, "reserved (test register)", 7); + ds_print_msg(buf, "device status flags", 8); + ds_print_msg(buf, "communication command byte 1", 9); + ds_print_msg(buf, "communication command byte 2", 10); + ds_print_msg(buf, "communication command buffer status", 11); + ds_print_msg(buf, "1-wire data output buffer status", 12); + ds_print_msg(buf, "1-wire data input buffer status", 13); + ds_print_msg(buf, "reserved", 14); + ds_print_msg(buf, "reserved", 15); } - - memcpy(st, buf, sizeof(*st)); - - if (st->status & ST_EPOF) { - printk(KERN_INFO "Resetting device after ST_EPOF.\n"); - err = ds_send_control_cmd(dev, CTL_RESET_DEVICE, 0); - if (err) - return err; - count = ds_recv_status_nodump(dev, st, buf, sizeof(buf)); - if (count < 0) - return err; - } -#if 0 - if (st->status & ST_IDLE) { - printk(KERN_INFO "Resetting pulse after ST_IDLE.\n"); - err = ds_start_pulse(dev, PULLUP_PULSE_DURATION); - if (err) - return err; + for (i = 16; i < count; ++i) { + if (buf[i] == RR_DETECT) { + ds_print_msg(buf, "new device detect", i); + continue; + } + ds_print_msg(buf, "Result Register Value: ", i); + if (buf[i] & RR_NRS) + printk(KERN_INFO "NRS: Reset no presence or ...\n"); + if (buf[i] & RR_SH) + printk(KERN_INFO "SH: short on reset or set path\n"); + if (buf[i] & RR_APP) + printk(KERN_INFO "APP: alarming presence on reset\n"); + if (buf[i] & RR_VPP) + printk(KERN_INFO "VPP: 12V expected not seen\n"); + if (buf[i] & RR_CMP) + printk(KERN_INFO "CMP: compare error\n"); + if (buf[i] & RR_CRC) + printk(KERN_INFO "CRC: CRC error detected\n"); + if (buf[i] & RR_RDP) + printk(KERN_INFO "RDP: redirected page\n"); + if (buf[i] & RR_EOS) + printk(KERN_INFO "EOS: end of search error\n"); } -#endif +} - return err; +static void ds_reset_device(struct ds_device *dev) +{ + ds_send_control_cmd(dev, CTL_RESET_DEVICE, 0); + /* Always allow strong pullup which allow individual writes to use + * the strong pullup. + */ + if (ds_send_control_mode(dev, MOD_PULSE_EN, PULSE_SPUE)) + printk(KERN_ERR "ds_reset_device: " + "Error allowing strong pullup\n"); + /* Chip strong pullup time was cleared. */ + if (dev->spu_sleep) { + /* lower 4 bits are 0, see ds_set_pullup */ + u8 del = dev->spu_sleep>>4; + if (ds_send_control(dev, COMM_SET_DURATION | COMM_IM, del)) + printk(KERN_ERR "ds_reset_device: " + "Error setting duration\n"); + } } static int ds_recv_data(struct ds_device *dev, unsigned char *buf, int size) @@ -311,13 +339,27 @@ static int ds_recv_data(struct ds_device *dev, unsigned char *buf, int size) int count, err; struct ds_status st; + /* Careful on size. If size is less than what is available in + * the input buffer, the device fails the bulk transfer and + * clears the input buffer. It could read the maximum size of + * the data buffer, but then do you return the first, last, or + * some set of the middle size bytes? As long as the rest of + * the code is correct there will be size bytes waiting. A + * call to ds_wait_status will wait until the device is idle + * and any data to be received would have been available. + */ count = 0; err = usb_bulk_msg(dev->udev, usb_rcvbulkpipe(dev->udev, dev->ep[EP_DATA_IN]), buf, size, &count, 1000); if (err < 0) { + u8 buf[0x20]; + int count; + printk(KERN_INFO "Clearing ep0x%x.\n", dev->ep[EP_DATA_IN]); usb_clear_halt(dev->udev, usb_rcvbulkpipe(dev->udev, dev->ep[EP_DATA_IN])); - ds_recv_status(dev, &st); + + count = ds_recv_status_nodump(dev, &st, buf, sizeof(buf)); + ds_dump_status(dev, buf, count); return err; } @@ -341,7 +383,8 @@ static int ds_send_data(struct ds_device *dev, unsigned char *buf, int len) count = 0; err = usb_bulk_msg(dev->udev, usb_sndbulkpipe(dev->udev, dev->ep[EP_DATA_OUT]), buf, len, &count, 1000); if (err < 0) { - printk(KERN_ERR "Failed to read 1-wire data from 0x02: err=%d.\n", err); + printk(KERN_ERR "Failed to write 1-wire data to ep0x%x: " + "err=%d.\n", dev->ep[EP_DATA_OUT], err); return err; } @@ -397,7 +440,7 @@ int ds_detect(struct ds_device *dev, struct ds_status *st) if (err) return err; - err = ds_recv_status(dev, st); + err = ds_dump_status(dev, st); return err; } @@ -420,33 +463,49 @@ static int ds_wait_status(struct ds_device *dev, struct ds_status *st) printk("\n"); } #endif - } while(!(buf[0x08] & 0x20) && !(err < 0) && ++count < 100); + } while (!(buf[0x08] & ST_IDLE) && !(err < 0) && ++count < 100); + + if (err >= 16 && st->status & ST_EPOF) { + printk(KERN_INFO "Resetting device after ST_EPOF.\n"); + ds_reset_device(dev); + /* Always dump the device status. */ + count = 101; + } + /* Dump the status for errors or if there is extended return data. + * The extended status includes new device detection (maybe someone + * can do something with it). + */ + if (err > 16 || count >= 100 || err < 0) + ds_dump_status(dev, buf, err); - if (((err > 16) && (buf[0x10] & 0x01)) || count >= 100 || err < 0) { - ds_recv_status(dev, st); + /* Extended data isn't an error. Well, a short is, but the dump + * would have already told the user that and we can't do anything + * about it in software anyway. + */ + if (count >= 100 || err < 0) return -1; - } else + else return 0; } -static int ds_reset(struct ds_device *dev, struct ds_status *st) +static int ds_reset(struct ds_device *dev) { int err; - //err = ds_send_control(dev, COMM_1_WIRE_RESET | COMM_F | COMM_IM | COMM_SE, SPEED_FLEXIBLE); - err = ds_send_control(dev, 0x43, SPEED_NORMAL); + /* Other potentionally interesting flags for reset. + * + * COMM_NTF: Return result register feedback. This could be used to + * detect some conditions such as short, alarming presence, or + * detect if a new device was detected. + * + * COMM_SE which allows SPEED_NORMAL, SPEED_FLEXIBLE, SPEED_OVERDRIVE: + * Select the data transfer rate. + */ + err = ds_send_control(dev, COMM_1_WIRE_RESET | COMM_IM, SPEED_NORMAL); if (err) return err; - ds_wait_status(dev, st); -#if 0 - if (st->command_buffer_status) { - printk(KERN_INFO "Short circuit.\n"); - return -EIO; - } -#endif - return 0; } @@ -471,60 +530,43 @@ static int ds_set_speed(struct ds_device *dev, int speed) } #endif /* 0 */ -static int ds_start_pulse(struct ds_device *dev, int delay) +static int ds_set_pullup(struct ds_device *dev, int delay) { - int err; + int err = 0; u8 del = 1 + (u8)(delay >> 4); - struct ds_status st; - -#if 0 - err = ds_stop_pulse(dev, 10); - if (err) + /* Just storing delay would not get the trunication and roundup. */ + int ms = del<<4; + + /* Enable spu_bit if a delay is set. */ + dev->spu_bit = delay ? COMM_SPU : 0; + /* If delay is zero, it has already been disabled, if the time is + * the same as the hardware was last programmed to, there is also + * nothing more to do. Compare with the recalculated value ms + * rather than del or delay which can have a different value. + */ + if (delay == 0 || ms == dev->spu_sleep) return err; - err = ds_send_control_mode(dev, MOD_PULSE_EN, PULSE_SPUE); - if (err) - return err; -#endif err = ds_send_control(dev, COMM_SET_DURATION | COMM_IM, del); if (err) return err; - err = ds_send_control(dev, COMM_PULSE | COMM_IM | COMM_F, 0); - if (err) - return err; - - mdelay(delay); - - ds_wait_status(dev, &st); + dev->spu_sleep = ms; return err; } static int ds_touch_bit(struct ds_device *dev, u8 bit, u8 *tbit) { - int err, count; + int err; struct ds_status st; - u16 value = (COMM_BIT_IO | COMM_IM) | ((bit) ? COMM_D : 0); - u16 cmd; - err = ds_send_control(dev, value, 0); + err = ds_send_control(dev, COMM_BIT_IO | COMM_IM | (bit ? COMM_D : 0), + 0); if (err) return err; - count = 0; - do { - err = ds_wait_status(dev, &st); - if (err) - return err; - - cmd = st.command0 | (st.command1 << 8); - } while (cmd != value && ++count < 10); - - if (err < 0 || count >= 10) { - printk(KERN_ERR "Failed to obtain status.\n"); - return -EINVAL; - } + ds_wait_status(dev, &st); err = ds_recv_data(dev, tbit, sizeof(*tbit)); if (err < 0) @@ -533,12 +575,18 @@ static int ds_touch_bit(struct ds_device *dev, u8 bit, u8 *tbit) return 0; } +#if 0 static int ds_write_bit(struct ds_device *dev, u8 bit) { int err; struct ds_status st; - err = ds_send_control(dev, COMM_BIT_IO | COMM_IM | (bit) ? COMM_D : 0, 0); + /* Set COMM_ICP to write without a readback. Note, this will + * produce one time slot, a down followed by an up with COMM_D + * only determing the timing. + */ + err = ds_send_control(dev, COMM_BIT_IO | COMM_IM | COMM_ICP | + (bit ? COMM_D : 0), 0); if (err) return err; @@ -546,6 +594,7 @@ static int ds_write_bit(struct ds_device *dev, u8 bit) return 0; } +#endif static int ds_write_byte(struct ds_device *dev, u8 byte) { @@ -553,10 +602,13 @@ static int ds_write_byte(struct ds_device *dev, u8 byte) struct ds_status st; u8 rbyte; - err = ds_send_control(dev, COMM_BYTE_IO | COMM_IM | COMM_SPU, byte); + err = ds_send_control(dev, COMM_BYTE_IO | COMM_IM | dev->spu_bit, byte); if (err) return err; + if (dev->spu_bit) + msleep(dev->spu_sleep); + err = ds_wait_status(dev, &st); if (err) return err; @@ -565,8 +617,6 @@ static int ds_write_byte(struct ds_device *dev, u8 byte) if (err < 0) return err; - ds_start_pulse(dev, PULLUP_PULSE_DURATION); - return !(byte == rbyte); } @@ -602,7 +652,7 @@ static int ds_read_block(struct ds_device *dev, u8 *buf, int len) if (err < 0) return err; - err = ds_send_control(dev, COMM_BLOCK_IO | COMM_IM | COMM_SPU, len); + err = ds_send_control(dev, COMM_BLOCK_IO | COMM_IM, len); if (err) return err; @@ -623,20 +673,19 @@ static int ds_write_block(struct ds_device *dev, u8 *buf, int len) if (err < 0) return err; - ds_wait_status(dev, &st); - - err = ds_send_control(dev, COMM_BLOCK_IO | COMM_IM | COMM_SPU, len); + err = ds_send_control(dev, COMM_BLOCK_IO | COMM_IM | dev->spu_bit, len); if (err) return err; + if (dev->spu_bit) + msleep(dev->spu_sleep); + ds_wait_status(dev, &st); err = ds_recv_data(dev, buf, len); if (err < 0) return err; - ds_start_pulse(dev, PULLUP_PULSE_DURATION); - return !(err == len); } @@ -728,6 +777,7 @@ static u8 ds9490r_touch_bit(void *data, u8 bit) return ret; } +#if 0 static void ds9490r_write_bit(void *data, u8 bit) { struct ds_device *dev = data; @@ -735,13 +785,6 @@ static void ds9490r_write_bit(void *data, u8 bit) ds_write_bit(dev, bit); } -static void ds9490r_write_byte(void *data, u8 byte) -{ - struct ds_device *dev = data; - - ds_write_byte(dev, byte); -} - static u8 ds9490r_read_bit(void *data) { struct ds_device *dev = data; @@ -754,6 +797,14 @@ static u8 ds9490r_read_bit(void *data) return bit & 1; } +#endif + +static void ds9490r_write_byte(void *data, u8 byte) +{ + struct ds_device *dev = data; + + ds_write_byte(dev, byte); +} static u8 ds9490r_read_byte(void *data) { @@ -790,31 +841,58 @@ static u8 ds9490r_read_block(void *data, u8 *buf, int len) static u8 ds9490r_reset(void *data) { struct ds_device *dev = data; - struct ds_status st; int err; - memset(&st, 0, sizeof(st)); - - err = ds_reset(dev, &st); + err = ds_reset(dev); if (err) return 1; return 0; } +static u8 ds9490r_set_pullup(void *data, int delay) +{ + struct ds_device *dev = data; + + if (ds_set_pullup(dev, delay)) + return 1; + + return 0; +} + static int ds_w1_init(struct ds_device *dev) { memset(&dev->master, 0, sizeof(struct w1_bus_master)); + /* Reset the device as it can be in a bad state. + * This is necessary because a block write will wait for data + * to be placed in the output buffer and block any later + * commands which will keep accumulating and the device will + * not be idle. Another case is removing the ds2490 module + * while a bus search is in progress, somehow a few commands + * get through, but the input transfers fail leaving data in + * the input buffer. This will cause the next read to fail + * see the note in ds_recv_data. + */ + ds_reset_device(dev); + dev->master.data = dev; dev->master.touch_bit = &ds9490r_touch_bit; + /* read_bit and write_bit in w1_bus_master are expected to set and + * sample the line level. For write_bit that means it is expected to + * set it to that value and leave it there. ds2490 only supports an + * individual time slot at the lowest level. The requirement from + * pulling the bus state down to reading the state is 15us, something + * that isn't realistic on the USB bus anyway. dev->master.read_bit = &ds9490r_read_bit; dev->master.write_bit = &ds9490r_write_bit; + */ dev->master.read_byte = &ds9490r_read_byte; dev->master.write_byte = &ds9490r_write_byte; dev->master.read_block = &ds9490r_read_block; dev->master.write_block = &ds9490r_write_block; dev->master.reset_bus = &ds9490r_reset; + dev->master.set_pullup = &ds9490r_set_pullup; return w1_add_master_device(&dev->master); } @@ -838,6 +916,8 @@ static int ds_probe(struct usb_interface *intf, printk(KERN_INFO "Failed to allocate new DS9490R structure.\n"); return -ENOMEM; } + dev->spu_sleep = 0; + dev->spu_bit = 0; dev->udev = usb_get_dev(udev); if (!dev->udev) { err = -ENOMEM; diff --git a/drivers/w1/slaves/w1_ds2431.c b/drivers/w1/slaves/w1_ds2431.c new file mode 100644 index 000000000000..2c6c0cf6a20f --- /dev/null +++ b/drivers/w1/slaves/w1_ds2431.c @@ -0,0 +1,312 @@ +/* + * w1_ds2431.c - w1 family 2d (DS2431) driver + * + * Copyright (c) 2008 Bernhard Weirich <bernhard.weirich@riedel.net> + * + * Heavily inspired by w1_DS2433 driver from Ben Gardner <bgardner@wabtec.com> + * + * This source code is licensed under the GNU General Public License, + * Version 2. See the file COPYING for more details. + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/device.h> +#include <linux/types.h> +#include <linux/delay.h> + +#include "../w1.h" +#include "../w1_int.h" +#include "../w1_family.h" + +#define W1_F2D_EEPROM_SIZE 128 +#define W1_F2D_PAGE_COUNT 4 +#define W1_F2D_PAGE_BITS 5 +#define W1_F2D_PAGE_SIZE (1<<W1_F2D_PAGE_BITS) +#define W1_F2D_PAGE_MASK 0x1F + +#define W1_F2D_SCRATCH_BITS 3 +#define W1_F2D_SCRATCH_SIZE (1<<W1_F2D_SCRATCH_BITS) +#define W1_F2D_SCRATCH_MASK (W1_F2D_SCRATCH_SIZE-1) + +#define W1_F2D_READ_EEPROM 0xF0 +#define W1_F2D_WRITE_SCRATCH 0x0F +#define W1_F2D_READ_SCRATCH 0xAA +#define W1_F2D_COPY_SCRATCH 0x55 + + +#define W1_F2D_TPROG_MS 11 + +#define W1_F2D_READ_RETRIES 10 +#define W1_F2D_READ_MAXLEN 8 + +/* + * Check the file size bounds and adjusts count as needed. + * This would not be needed if the file size didn't reset to 0 after a write. + */ +static inline size_t w1_f2d_fix_count(loff_t off, size_t count, size_t size) +{ + if (off > size) + return 0; + + if ((off + count) > size) + return size - off; + + return count; +} + +/* + * Read a block from W1 ROM two times and compares the results. + * If they are equal they are returned, otherwise the read + * is repeated W1_F2D_READ_RETRIES times. + * + * count must not exceed W1_F2D_READ_MAXLEN. + */ +static int w1_f2d_readblock(struct w1_slave *sl, int off, int count, char *buf) +{ + u8 wrbuf[3]; + u8 cmp[W1_F2D_READ_MAXLEN]; + int tries = W1_F2D_READ_RETRIES; + + do { + wrbuf[0] = W1_F2D_READ_EEPROM; + wrbuf[1] = off & 0xff; + wrbuf[2] = off >> 8; + + if (w1_reset_select_slave(sl)) + return -1; + + w1_write_block(sl->master, wrbuf, 3); + w1_read_block(sl->master, buf, count); + + if (w1_reset_select_slave(sl)) + return -1; + + w1_write_block(sl->master, wrbuf, 3); + w1_read_block(sl->master, cmp, count); + + if (!memcmp(cmp, buf, count)) + return 0; + } while (--tries); + + dev_err(&sl->dev, "proof reading failed %d times\n", + W1_F2D_READ_RETRIES); + + return -1; +} + +static ssize_t w1_f2d_read_bin(struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct w1_slave *sl = kobj_to_w1_slave(kobj); + int todo = count; + + count = w1_f2d_fix_count(off, count, W1_F2D_EEPROM_SIZE); + if (count == 0) + return 0; + + mutex_lock(&sl->master->mutex); + + /* read directly from the EEPROM in chunks of W1_F2D_READ_MAXLEN */ + while (todo > 0) { + int block_read; + + if (todo >= W1_F2D_READ_MAXLEN) + block_read = W1_F2D_READ_MAXLEN; + else + block_read = todo; + + if (w1_f2d_readblock(sl, off, block_read, buf) < 0) + count = -EIO; + + todo -= W1_F2D_READ_MAXLEN; + buf += W1_F2D_READ_MAXLEN; + off += W1_F2D_READ_MAXLEN; + } + + mutex_unlock(&sl->master->mutex); + + return count; +} + +/* + * Writes to the scratchpad and reads it back for verification. + * Then copies the scratchpad to EEPROM. + * The data must be aligned at W1_F2D_SCRATCH_SIZE bytes and + * must be W1_F2D_SCRATCH_SIZE bytes long. + * The master must be locked. + * + * @param sl The slave structure + * @param addr Address for the write + * @param len length must be <= (W1_F2D_PAGE_SIZE - (addr & W1_F2D_PAGE_MASK)) + * @param data The data to write + * @return 0=Success -1=failure + */ +static int w1_f2d_write(struct w1_slave *sl, int addr, int len, const u8 *data) +{ + int tries = W1_F2D_READ_RETRIES; + u8 wrbuf[4]; + u8 rdbuf[W1_F2D_SCRATCH_SIZE + 3]; + u8 es = (addr + len - 1) % W1_F2D_SCRATCH_SIZE; + +retry: + + /* Write the data to the scratchpad */ + if (w1_reset_select_slave(sl)) + return -1; + + wrbuf[0] = W1_F2D_WRITE_SCRATCH; + wrbuf[1] = addr & 0xff; + wrbuf[2] = addr >> 8; + + w1_write_block(sl->master, wrbuf, 3); + w1_write_block(sl->master, data, len); + + /* Read the scratchpad and verify */ + if (w1_reset_select_slave(sl)) + return -1; + + w1_write_8(sl->master, W1_F2D_READ_SCRATCH); + w1_read_block(sl->master, rdbuf, len + 3); + + /* Compare what was read against the data written */ + if ((rdbuf[0] != wrbuf[1]) || (rdbuf[1] != wrbuf[2]) || + (rdbuf[2] != es) || (memcmp(data, &rdbuf[3], len) != 0)) { + + if (--tries) + goto retry; + + dev_err(&sl->dev, + "could not write to eeprom, scratchpad compare failed %d times\n", + W1_F2D_READ_RETRIES); + + return -1; + } + + /* Copy the scratchpad to EEPROM */ + if (w1_reset_select_slave(sl)) + return -1; + + wrbuf[0] = W1_F2D_COPY_SCRATCH; + wrbuf[3] = es; + w1_write_block(sl->master, wrbuf, 4); + + /* Sleep for tprog ms to wait for the write to complete */ + msleep(W1_F2D_TPROG_MS); + + /* Reset the bus to wake up the EEPROM */ + w1_reset_bus(sl->master); + + return 0; +} + +static ssize_t w1_f2d_write_bin(struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct w1_slave *sl = kobj_to_w1_slave(kobj); + int addr, len; + int copy; + + count = w1_f2d_fix_count(off, count, W1_F2D_EEPROM_SIZE); + if (count == 0) + return 0; + + mutex_lock(&sl->master->mutex); + + /* Can only write data in blocks of the size of the scratchpad */ + addr = off; + len = count; + while (len > 0) { + + /* if len too short or addr not aligned */ + if (len < W1_F2D_SCRATCH_SIZE || addr & W1_F2D_SCRATCH_MASK) { + char tmp[W1_F2D_SCRATCH_SIZE]; + + /* read the block and update the parts to be written */ + if (w1_f2d_readblock(sl, addr & ~W1_F2D_SCRATCH_MASK, + W1_F2D_SCRATCH_SIZE, tmp)) { + count = -EIO; + goto out_up; + } + + /* copy at most to the boundary of the PAGE or len */ + copy = W1_F2D_SCRATCH_SIZE - + (addr & W1_F2D_SCRATCH_MASK); + + if (copy > len) + copy = len; + + memcpy(&tmp[addr & W1_F2D_SCRATCH_MASK], buf, copy); + if (w1_f2d_write(sl, addr & ~W1_F2D_SCRATCH_MASK, + W1_F2D_SCRATCH_SIZE, tmp) < 0) { + count = -EIO; + goto out_up; + } + } else { + + copy = W1_F2D_SCRATCH_SIZE; + if (w1_f2d_write(sl, addr, copy, buf) < 0) { + count = -EIO; + goto out_up; + } + } + buf += copy; + addr += copy; + len -= copy; + } + +out_up: + mutex_unlock(&sl->master->mutex); + + return count; +} + +static struct bin_attribute w1_f2d_bin_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUSR, + }, + .size = W1_F2D_EEPROM_SIZE, + .read = w1_f2d_read_bin, + .write = w1_f2d_write_bin, +}; + +static int w1_f2d_add_slave(struct w1_slave *sl) +{ + return sysfs_create_bin_file(&sl->dev.kobj, &w1_f2d_bin_attr); +} + +static void w1_f2d_remove_slave(struct w1_slave *sl) +{ + sysfs_remove_bin_file(&sl->dev.kobj, &w1_f2d_bin_attr); +} + +static struct w1_family_ops w1_f2d_fops = { + .add_slave = w1_f2d_add_slave, + .remove_slave = w1_f2d_remove_slave, +}; + +static struct w1_family w1_family_2d = { + .fid = W1_EEPROM_DS2431, + .fops = &w1_f2d_fops, +}; + +static int __init w1_f2d_init(void) +{ + return w1_register_family(&w1_family_2d); +} + +static void __exit w1_f2d_fini(void) +{ + w1_unregister_family(&w1_family_2d); +} + +module_init(w1_f2d_init); +module_exit(w1_f2d_fini); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Bernhard Weirich <bernhard.weirich@riedel.net>"); +MODULE_DESCRIPTION("w1 family 2d driver for DS2431, 1kb EEPROM"); diff --git a/drivers/w1/slaves/w1_therm.c b/drivers/w1/slaves/w1_therm.c index fb28acaeed6c..2c8dff9f77da 100644 --- a/drivers/w1/slaves/w1_therm.c +++ b/drivers/w1/slaves/w1_therm.c @@ -37,31 +37,33 @@ MODULE_LICENSE("GPL"); MODULE_AUTHOR("Evgeniy Polyakov <johnpol@2ka.mipt.ru>"); MODULE_DESCRIPTION("Driver for 1-wire Dallas network protocol, temperature family."); +/* Allow the strong pullup to be disabled, but default to enabled. + * If it was disabled a parasite powered device might not get the require + * current to do a temperature conversion. If it is enabled parasite powered + * devices have a better chance of getting the current required. + */ +static int w1_strong_pullup = 1; +module_param_named(strong_pullup, w1_strong_pullup, int, 0); + static u8 bad_roms[][9] = { {0xaa, 0x00, 0x4b, 0x46, 0xff, 0xff, 0x0c, 0x10, 0x87}, {} }; -static ssize_t w1_therm_read_bin(struct kobject *, struct bin_attribute *, - char *, loff_t, size_t); +static ssize_t w1_therm_read(struct device *device, + struct device_attribute *attr, char *buf); -static struct bin_attribute w1_therm_bin_attr = { - .attr = { - .name = "w1_slave", - .mode = S_IRUGO, - }, - .size = W1_SLAVE_DATA_SIZE, - .read = w1_therm_read_bin, -}; +static struct device_attribute w1_therm_attr = + __ATTR(w1_slave, S_IRUGO, w1_therm_read, NULL); static int w1_therm_add_slave(struct w1_slave *sl) { - return sysfs_create_bin_file(&sl->dev.kobj, &w1_therm_bin_attr); + return device_create_file(&sl->dev, &w1_therm_attr); } static void w1_therm_remove_slave(struct w1_slave *sl) { - sysfs_remove_bin_file(&sl->dev.kobj, &w1_therm_bin_attr); + device_remove_file(&sl->dev, &w1_therm_attr); } static struct w1_family_ops w1_therm_fops = { @@ -160,30 +162,19 @@ static int w1_therm_check_rom(u8 rom[9]) return 0; } -static ssize_t w1_therm_read_bin(struct kobject *kobj, - struct bin_attribute *bin_attr, - char *buf, loff_t off, size_t count) +static ssize_t w1_therm_read(struct device *device, + struct device_attribute *attr, char *buf) { - struct w1_slave *sl = kobj_to_w1_slave(kobj); + struct w1_slave *sl = dev_to_w1_slave(device); struct w1_master *dev = sl->master; u8 rom[9], crc, verdict; int i, max_trying = 10; + ssize_t c = PAGE_SIZE; - mutex_lock(&sl->master->mutex); + mutex_lock(&dev->mutex); - if (off > W1_SLAVE_DATA_SIZE) { - count = 0; - goto out; - } - if (off + count > W1_SLAVE_DATA_SIZE) { - count = 0; - goto out; - } - - memset(buf, 0, count); memset(rom, 0, sizeof(rom)); - count = 0; verdict = 0; crc = 0; @@ -192,15 +183,20 @@ static ssize_t w1_therm_read_bin(struct kobject *kobj, int count = 0; unsigned int tm = 750; + /* 750ms strong pullup (or delay) after the convert */ + if (w1_strong_pullup) + w1_next_pullup(dev, tm); w1_write_8(dev, W1_CONVERT_TEMP); - - msleep(tm); + if (!w1_strong_pullup) + msleep(tm); if (!w1_reset_select_slave(sl)) { w1_write_8(dev, W1_READ_SCRATCHPAD); if ((count = w1_read_block(dev, rom, 9)) != 9) { - dev_warn(&dev->dev, "w1_read_block() returned %d instead of 9.\n", count); + dev_warn(device, "w1_read_block() " + "returned %u instead of 9.\n", + count); } crc = w1_calc_crc8(rom, 8); @@ -215,22 +211,22 @@ static ssize_t w1_therm_read_bin(struct kobject *kobj, } for (i = 0; i < 9; ++i) - count += sprintf(buf + count, "%02x ", rom[i]); - count += sprintf(buf + count, ": crc=%02x %s\n", + c -= snprintf(buf + PAGE_SIZE - c, c, "%02x ", rom[i]); + c -= snprintf(buf + PAGE_SIZE - c, c, ": crc=%02x %s\n", crc, (verdict) ? "YES" : "NO"); if (verdict) memcpy(sl->rom, rom, sizeof(sl->rom)); else - dev_warn(&dev->dev, "18S20 doesn't respond to CONVERT_TEMP.\n"); + dev_warn(device, "18S20 doesn't respond to CONVERT_TEMP.\n"); for (i = 0; i < 9; ++i) - count += sprintf(buf + count, "%02x ", sl->rom[i]); + c -= snprintf(buf + PAGE_SIZE - c, c, "%02x ", sl->rom[i]); - count += sprintf(buf + count, "t=%d\n", w1_convert_temp(rom, sl->family->fid)); -out: + c -= snprintf(buf + PAGE_SIZE - c, c, "t=%d\n", + w1_convert_temp(rom, sl->family->fid)); mutex_unlock(&dev->mutex); - return count; + return PAGE_SIZE - c; } static int __init w1_therm_init(void) diff --git a/drivers/w1/w1.c b/drivers/w1/w1.c index 7293c9b11f91..3b615d4022ee 100644 --- a/drivers/w1/w1.c +++ b/drivers/w1/w1.c @@ -46,19 +46,17 @@ MODULE_AUTHOR("Evgeniy Polyakov <johnpol@2ka.mipt.ru>"); MODULE_DESCRIPTION("Driver for 1-wire Dallas network protocol."); static int w1_timeout = 10; -static int w1_control_timeout = 1; int w1_max_slave_count = 10; int w1_max_slave_ttl = 10; module_param_named(timeout, w1_timeout, int, 0); -module_param_named(control_timeout, w1_control_timeout, int, 0); module_param_named(max_slave_count, w1_max_slave_count, int, 0); module_param_named(slave_ttl, w1_max_slave_ttl, int, 0); DEFINE_MUTEX(w1_mlock); LIST_HEAD(w1_masters); -static struct task_struct *w1_control_thread; +static int w1_attach_slave_device(struct w1_master *dev, struct w1_reg_num *rn); static int w1_master_match(struct device *dev, struct device_driver *drv) { @@ -83,10 +81,10 @@ static void w1_slave_release(struct device *dev) { struct w1_slave *sl = dev_to_w1_slave(dev); - printk("%s: Releasing %s.\n", __func__, sl->name); + dev_dbg(dev, "%s: Releasing %s.\n", __func__, sl->name); while (atomic_read(&sl->refcnt)) { - printk("Waiting for %s to become free: refcnt=%d.\n", + dev_dbg(dev, "Waiting for %s to become free: refcnt=%d.\n", sl->name, atomic_read(&sl->refcnt)); if (msleep_interruptible(1000)) flush_signals(current); @@ -105,35 +103,20 @@ static ssize_t w1_slave_read_name(struct device *dev, struct device_attribute *a return sprintf(buf, "%s\n", sl->name); } -static ssize_t w1_slave_read_id(struct kobject *kobj, - struct bin_attribute *bin_attr, - char *buf, loff_t off, size_t count) +static ssize_t w1_slave_read_id(struct device *dev, + struct device_attribute *attr, char *buf) { - struct w1_slave *sl = kobj_to_w1_slave(kobj); - - if (off > 8) { - count = 0; - } else { - if (off + count > 8) - count = 8 - off; - - memcpy(buf, (u8 *)&sl->reg_num, count); - } + struct w1_slave *sl = dev_to_w1_slave(dev); + ssize_t count = sizeof(sl->reg_num); + memcpy(buf, (u8 *)&sl->reg_num, count); return count; } static struct device_attribute w1_slave_attr_name = __ATTR(name, S_IRUGO, w1_slave_read_name, NULL); - -static struct bin_attribute w1_slave_attr_bin_id = { - .attr = { - .name = "id", - .mode = S_IRUGO, - }, - .size = 8, - .read = w1_slave_read_id, -}; +static struct device_attribute w1_slave_attr_id = + __ATTR(id, S_IRUGO, w1_slave_read_id, NULL); /* Default family */ @@ -250,11 +233,16 @@ static ssize_t w1_master_attribute_store_search(struct device * dev, struct device_attribute *attr, const char * buf, size_t count) { + long tmp; struct w1_master *md = dev_to_w1_master(dev); + if (strict_strtol(buf, 0, &tmp) == -EINVAL) + return -EINVAL; + mutex_lock(&md->mutex); - md->search_count = simple_strtol(buf, NULL, 0); + md->search_count = tmp; mutex_unlock(&md->mutex); + wake_up_process(md->thread); return count; } @@ -273,6 +261,38 @@ static ssize_t w1_master_attribute_show_search(struct device *dev, return count; } +static ssize_t w1_master_attribute_store_pullup(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + long tmp; + struct w1_master *md = dev_to_w1_master(dev); + + if (strict_strtol(buf, 0, &tmp) == -EINVAL) + return -EINVAL; + + mutex_lock(&md->mutex); + md->enable_pullup = tmp; + mutex_unlock(&md->mutex); + wake_up_process(md->thread); + + return count; +} + +static ssize_t w1_master_attribute_show_pullup(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct w1_master *md = dev_to_w1_master(dev); + ssize_t count; + + mutex_lock(&md->mutex); + count = sprintf(buf, "%d\n", md->enable_pullup); + mutex_unlock(&md->mutex); + + return count; +} + static ssize_t w1_master_attribute_show_pointer(struct device *dev, struct device_attribute *attr, char *buf) { struct w1_master *md = dev_to_w1_master(dev); @@ -324,7 +344,8 @@ static ssize_t w1_master_attribute_show_slave_count(struct device *dev, struct d return count; } -static ssize_t w1_master_attribute_show_slaves(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t w1_master_attribute_show_slaves(struct device *dev, + struct device_attribute *attr, char *buf) { struct w1_master *md = dev_to_w1_master(dev); int c = PAGE_SIZE; @@ -349,6 +370,135 @@ static ssize_t w1_master_attribute_show_slaves(struct device *dev, struct device return PAGE_SIZE - c; } +static ssize_t w1_master_attribute_show_add(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int c = PAGE_SIZE; + c -= snprintf(buf+PAGE_SIZE - c, c, + "write device id xx-xxxxxxxxxxxx to add slave\n"); + return PAGE_SIZE - c; +} + +static int w1_atoreg_num(struct device *dev, const char *buf, size_t count, + struct w1_reg_num *rn) +{ + unsigned int family; + unsigned long long id; + int i; + u64 rn64_le; + + /* The CRC value isn't read from the user because the sysfs directory + * doesn't include it and most messages from the bus search don't + * print it either. It would be unreasonable for the user to then + * provide it. + */ + const char *error_msg = "bad slave string format, expecting " + "ff-dddddddddddd\n"; + + if (buf[2] != '-') { + dev_err(dev, "%s", error_msg); + return -EINVAL; + } + i = sscanf(buf, "%02x-%012llx", &family, &id); + if (i != 2) { + dev_err(dev, "%s", error_msg); + return -EINVAL; + } + rn->family = family; + rn->id = id; + + rn64_le = cpu_to_le64(*(u64 *)rn); + rn->crc = w1_calc_crc8((u8 *)&rn64_le, 7); + +#if 0 + dev_info(dev, "With CRC device is %02x.%012llx.%02x.\n", + rn->family, (unsigned long long)rn->id, rn->crc); +#endif + + return 0; +} + +/* Searches the slaves in the w1_master and returns a pointer or NULL. + * Note: must hold the mutex + */ +static struct w1_slave *w1_slave_search_device(struct w1_master *dev, + struct w1_reg_num *rn) +{ + struct w1_slave *sl; + list_for_each_entry(sl, &dev->slist, w1_slave_entry) { + if (sl->reg_num.family == rn->family && + sl->reg_num.id == rn->id && + sl->reg_num.crc == rn->crc) { + return sl; + } + } + return NULL; +} + +static ssize_t w1_master_attribute_store_add(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct w1_master *md = dev_to_w1_master(dev); + struct w1_reg_num rn; + struct w1_slave *sl; + ssize_t result = count; + + if (w1_atoreg_num(dev, buf, count, &rn)) + return -EINVAL; + + mutex_lock(&md->mutex); + sl = w1_slave_search_device(md, &rn); + /* It would be nice to do a targeted search one the one-wire bus + * for the new device to see if it is out there or not. But the + * current search doesn't support that. + */ + if (sl) { + dev_info(dev, "Device %s already exists\n", sl->name); + result = -EINVAL; + } else { + w1_attach_slave_device(md, &rn); + } + mutex_unlock(&md->mutex); + + return result; +} + +static ssize_t w1_master_attribute_show_remove(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int c = PAGE_SIZE; + c -= snprintf(buf+PAGE_SIZE - c, c, + "write device id xx-xxxxxxxxxxxx to remove slave\n"); + return PAGE_SIZE - c; +} + +static ssize_t w1_master_attribute_store_remove(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct w1_master *md = dev_to_w1_master(dev); + struct w1_reg_num rn; + struct w1_slave *sl; + ssize_t result = count; + + if (w1_atoreg_num(dev, buf, count, &rn)) + return -EINVAL; + + mutex_lock(&md->mutex); + sl = w1_slave_search_device(md, &rn); + if (sl) { + w1_slave_detach(sl); + } else { + dev_info(dev, "Device %02x-%012llx doesn't exists\n", rn.family, + (unsigned long long)rn.id); + result = -EINVAL; + } + mutex_unlock(&md->mutex); + + return result; +} + #define W1_MASTER_ATTR_RO(_name, _mode) \ struct device_attribute w1_master_attribute_##_name = \ __ATTR(w1_master_##_name, _mode, \ @@ -368,6 +518,9 @@ static W1_MASTER_ATTR_RO(attempts, S_IRUGO); static W1_MASTER_ATTR_RO(timeout, S_IRUGO); static W1_MASTER_ATTR_RO(pointer, S_IRUGO); static W1_MASTER_ATTR_RW(search, S_IRUGO | S_IWUGO); +static W1_MASTER_ATTR_RW(pullup, S_IRUGO | S_IWUGO); +static W1_MASTER_ATTR_RW(add, S_IRUGO | S_IWUGO); +static W1_MASTER_ATTR_RW(remove, S_IRUGO | S_IWUGO); static struct attribute *w1_master_default_attrs[] = { &w1_master_attribute_name.attr, @@ -378,6 +531,9 @@ static struct attribute *w1_master_default_attrs[] = { &w1_master_attribute_timeout.attr, &w1_master_attribute_pointer.attr, &w1_master_attribute_search.attr, + &w1_master_attribute_pullup.attr, + &w1_master_attribute_add.attr, + &w1_master_attribute_remove.attr, NULL }; @@ -390,7 +546,7 @@ int w1_create_master_attributes(struct w1_master *master) return sysfs_create_group(&master->dev.kobj, &w1_master_defattr_group); } -static void w1_destroy_master_attributes(struct w1_master *master) +void w1_destroy_master_attributes(struct w1_master *master) { sysfs_remove_group(&master->dev.kobj, &w1_master_defattr_group); } @@ -479,7 +635,7 @@ static int __w1_attach_slave_device(struct w1_slave *sl) } /* Create "id" entry */ - err = sysfs_create_bin_file(&sl->dev.kobj, &w1_slave_attr_bin_id); + err = device_create_file(&sl->dev, &w1_slave_attr_id); if (err < 0) { dev_err(&sl->dev, "sysfs file creation for [%s] failed. err=%d\n", @@ -501,7 +657,7 @@ static int __w1_attach_slave_device(struct w1_slave *sl) return 0; out_rem2: - sysfs_remove_bin_file(&sl->dev.kobj, &w1_slave_attr_bin_id); + device_remove_file(&sl->dev, &w1_slave_attr_id); out_rem1: device_remove_file(&sl->dev, &w1_slave_attr_name); out_unreg: @@ -567,7 +723,7 @@ static int w1_attach_slave_device(struct w1_master *dev, struct w1_reg_num *rn) return 0; } -static void w1_slave_detach(struct w1_slave *sl) +void w1_slave_detach(struct w1_slave *sl) { struct w1_netlink_msg msg; @@ -583,7 +739,7 @@ static void w1_slave_detach(struct w1_slave *sl) msg.type = W1_SLAVE_REMOVE; w1_netlink_send(sl->master, &msg); - sysfs_remove_bin_file(&sl->dev.kobj, &w1_slave_attr_bin_id); + device_remove_file(&sl->dev, &w1_slave_attr_id); device_remove_file(&sl->dev, &w1_slave_attr_name); device_unregister(&sl->dev); @@ -591,24 +747,6 @@ static void w1_slave_detach(struct w1_slave *sl) kfree(sl); } -static struct w1_master *w1_search_master(void *data) -{ - struct w1_master *dev; - int found = 0; - - mutex_lock(&w1_mlock); - list_for_each_entry(dev, &w1_masters, w1_master_entry) { - if (dev->bus_master->data == data) { - found = 1; - atomic_inc(&dev->refcnt); - break; - } - } - mutex_unlock(&w1_mlock); - - return (found)?dev:NULL; -} - struct w1_master *w1_search_master_id(u32 id) { struct w1_master *dev; @@ -656,55 +794,56 @@ struct w1_slave *w1_search_slave(struct w1_reg_num *id) return (found)?sl:NULL; } -void w1_reconnect_slaves(struct w1_family *f) +void w1_reconnect_slaves(struct w1_family *f, int attach) { + struct w1_slave *sl, *sln; struct w1_master *dev; mutex_lock(&w1_mlock); list_for_each_entry(dev, &w1_masters, w1_master_entry) { - dev_dbg(&dev->dev, "Reconnecting slaves in %s into new family %02x.\n", - dev->name, f->fid); - set_bit(W1_MASTER_NEED_RECONNECT, &dev->flags); + dev_dbg(&dev->dev, "Reconnecting slaves in device %s " + "for family %02x.\n", dev->name, f->fid); + mutex_lock(&dev->mutex); + list_for_each_entry_safe(sl, sln, &dev->slist, w1_slave_entry) { + /* If it is a new family, slaves with the default + * family driver and are that family will be + * connected. If the family is going away, devices + * matching that family are reconneced. + */ + if ((attach && sl->family->fid == W1_FAMILY_DEFAULT + && sl->reg_num.family == f->fid) || + (!attach && sl->family->fid == f->fid)) { + struct w1_reg_num rn; + + memcpy(&rn, &sl->reg_num, sizeof(rn)); + w1_slave_detach(sl); + + w1_attach_slave_device(dev, &rn); + } + } + dev_dbg(&dev->dev, "Reconnecting slaves in device %s " + "has been finished.\n", dev->name); + mutex_unlock(&dev->mutex); } mutex_unlock(&w1_mlock); } -static void w1_slave_found(void *data, u64 rn) +static void w1_slave_found(struct w1_master *dev, u64 rn) { - int slave_count; struct w1_slave *sl; - struct list_head *ent; struct w1_reg_num *tmp; - struct w1_master *dev; u64 rn_le = cpu_to_le64(rn); - dev = w1_search_master(data); - if (!dev) { - printk(KERN_ERR "Failed to find w1 master device for data %p, " - "it is impossible.\n", data); - return; - } + atomic_inc(&dev->refcnt); tmp = (struct w1_reg_num *) &rn; - slave_count = 0; - list_for_each(ent, &dev->slist) { - - sl = list_entry(ent, struct w1_slave, w1_slave_entry); - - if (sl->reg_num.family == tmp->family && - sl->reg_num.id == tmp->id && - sl->reg_num.crc == tmp->crc) { - set_bit(W1_SLAVE_ACTIVE, (long *)&sl->flags); - break; - } - - slave_count++; - } - - if (slave_count == dev->slave_count && - rn && ((rn >> 56) & 0xff) == w1_calc_crc8((u8 *)&rn_le, 7)) { - w1_attach_slave_device(dev, tmp); + sl = w1_slave_search_device(dev, tmp); + if (sl) { + set_bit(W1_SLAVE_ACTIVE, (long *)&sl->flags); + } else { + if (rn && tmp->crc == w1_calc_crc8((u8 *)&rn_le, 7)) + w1_attach_slave_device(dev, tmp); } atomic_dec(&dev->refcnt); @@ -779,80 +918,20 @@ void w1_search(struct w1_master *dev, u8 search_type, w1_slave_found_callback cb /* extract the direction taken & update the device number */ tmp64 = (triplet_ret >> 2); rn |= (tmp64 << i); + + if (kthread_should_stop()) { + dev_dbg(&dev->dev, "Abort w1_search\n"); + return; + } } if ( (triplet_ret & 0x03) != 0x03 ) { if ( (desc_bit == last_zero) || (last_zero < 0)) last_device = 1; desc_bit = last_zero; - cb(dev->bus_master->data, rn); - } - } -} - -static int w1_control(void *data) -{ - struct w1_slave *sl, *sln; - struct w1_master *dev, *n; - int have_to_wait = 0; - - set_freezable(); - while (!kthread_should_stop() || have_to_wait) { - have_to_wait = 0; - - try_to_freeze(); - msleep_interruptible(w1_control_timeout * 1000); - - list_for_each_entry_safe(dev, n, &w1_masters, w1_master_entry) { - if (!kthread_should_stop() && !dev->flags) - continue; - /* - * Little race: we can create thread but not set the flag. - * Get a chance for external process to set flag up. - */ - if (!dev->initialized) { - have_to_wait = 1; - continue; - } - - if (kthread_should_stop() || test_bit(W1_MASTER_NEED_EXIT, &dev->flags)) { - set_bit(W1_MASTER_NEED_EXIT, &dev->flags); - - mutex_lock(&w1_mlock); - list_del(&dev->w1_master_entry); - mutex_unlock(&w1_mlock); - - mutex_lock(&dev->mutex); - list_for_each_entry_safe(sl, sln, &dev->slist, w1_slave_entry) { - w1_slave_detach(sl); - } - w1_destroy_master_attributes(dev); - mutex_unlock(&dev->mutex); - atomic_dec(&dev->refcnt); - continue; - } - - if (test_bit(W1_MASTER_NEED_RECONNECT, &dev->flags)) { - dev_dbg(&dev->dev, "Reconnecting slaves in device %s.\n", dev->name); - mutex_lock(&dev->mutex); - list_for_each_entry_safe(sl, sln, &dev->slist, w1_slave_entry) { - if (sl->family->fid == W1_FAMILY_DEFAULT) { - struct w1_reg_num rn; - - memcpy(&rn, &sl->reg_num, sizeof(rn)); - w1_slave_detach(sl); - - w1_attach_slave_device(dev, &rn); - } - } - dev_dbg(&dev->dev, "Reconnecting slaves in device %s has been finished.\n", dev->name); - clear_bit(W1_MASTER_NEED_RECONNECT, &dev->flags); - mutex_unlock(&dev->mutex); - } + cb(dev, rn); } } - - return 0; } void w1_search_process(struct w1_master *dev, u8 search_type) @@ -878,23 +957,29 @@ void w1_search_process(struct w1_master *dev, u8 search_type) int w1_process(void *data) { struct w1_master *dev = (struct w1_master *) data; + /* As long as w1_timeout is only set by a module parameter the sleep + * time can be calculated in jiffies once. + */ + const unsigned long jtime = msecs_to_jiffies(w1_timeout * 1000); + + while (!kthread_should_stop()) { + if (dev->search_count) { + mutex_lock(&dev->mutex); + w1_search_process(dev, W1_SEARCH); + mutex_unlock(&dev->mutex); + } - while (!kthread_should_stop() && !test_bit(W1_MASTER_NEED_EXIT, &dev->flags)) { try_to_freeze(); - msleep_interruptible(w1_timeout * 1000); + __set_current_state(TASK_INTERRUPTIBLE); - if (kthread_should_stop() || test_bit(W1_MASTER_NEED_EXIT, &dev->flags)) + if (kthread_should_stop()) break; - if (!dev->initialized) - continue; - - if (dev->search_count == 0) - continue; - - mutex_lock(&dev->mutex); - w1_search_process(dev, W1_SEARCH); - mutex_unlock(&dev->mutex); + /* Only sleep when the search is active. */ + if (dev->search_count) + schedule_timeout(jtime); + else + schedule(); } atomic_dec(&dev->refcnt); @@ -932,18 +1017,13 @@ static int w1_init(void) goto err_out_master_unregister; } - w1_control_thread = kthread_run(w1_control, NULL, "w1_control"); - if (IS_ERR(w1_control_thread)) { - retval = PTR_ERR(w1_control_thread); - printk(KERN_ERR "Failed to create control thread. err=%d\n", - retval); - goto err_out_slave_unregister; - } - return 0; +#if 0 +/* For undoing the slave register if there was a step after it. */ err_out_slave_unregister: driver_unregister(&w1_slave_driver); +#endif err_out_master_unregister: driver_unregister(&w1_master_driver); @@ -959,13 +1039,12 @@ static void w1_fini(void) { struct w1_master *dev; + /* Set netlink removal messages and some cleanup */ list_for_each_entry(dev, &w1_masters, w1_master_entry) __w1_remove_master_device(dev); w1_fini_netlink(); - kthread_stop(w1_control_thread); - driver_unregister(&w1_slave_driver); driver_unregister(&w1_master_driver); bus_unregister(&w1_bus_type); diff --git a/drivers/w1/w1.h b/drivers/w1/w1.h index f1df5343f4ad..cdaa6fffbfc7 100644 --- a/drivers/w1/w1.h +++ b/drivers/w1/w1.h @@ -46,7 +46,6 @@ struct w1_reg_num #include "w1_family.h" #define W1_MAXNAMELEN 32 -#define W1_SLAVE_DATA_SIZE 128 #define W1_SEARCH 0xF0 #define W1_ALARM_SEARCH 0xEC @@ -77,7 +76,7 @@ struct w1_slave struct completion released; }; -typedef void (* w1_slave_found_callback)(void *, u64); +typedef void (*w1_slave_found_callback)(struct w1_master *, u64); /** @@ -142,12 +141,18 @@ struct w1_bus_master */ u8 (*reset_bus)(void *); - /** Really nice hardware can handles the different types of ROM search */ - void (*search)(void *, u8, w1_slave_found_callback); -}; + /** + * Put out a strong pull-up pulse of the specified duration. + * @return -1=Error, 0=completed + */ + u8 (*set_pullup)(void *, int); -#define W1_MASTER_NEED_EXIT 0 -#define W1_MASTER_NEED_RECONNECT 1 + /** Really nice hardware can handles the different types of ROM search + * w1_master* is passed to the slave found callback. + */ + void (*search)(void *, struct w1_master *, + u8, w1_slave_found_callback); +}; struct w1_master { @@ -167,7 +172,10 @@ struct w1_master void *priv; int priv_size; - long flags; + /** 5V strong pullup enabled flag, 1 enabled, zero disabled. */ + int enable_pullup; + /** 5V strong pullup duration in milliseconds, zero disabled. */ + int pullup_duration; struct task_struct *thread; struct mutex mutex; @@ -181,12 +189,21 @@ struct w1_master }; int w1_create_master_attributes(struct w1_master *); +void w1_destroy_master_attributes(struct w1_master *master); void w1_search(struct w1_master *dev, u8 search_type, w1_slave_found_callback cb); void w1_search_devices(struct w1_master *dev, u8 search_type, w1_slave_found_callback cb); struct w1_slave *w1_search_slave(struct w1_reg_num *id); void w1_search_process(struct w1_master *dev, u8 search_type); struct w1_master *w1_search_master_id(u32 id); +/* Disconnect and reconnect devices in the given family. Used for finding + * unclaimed devices after a family has been registered or releasing devices + * after a family has been unregistered. Set attach to 1 when a new family + * has just been registered, to 0 when it has been unregistered. + */ +void w1_reconnect_slaves(struct w1_family *f, int attach); +void w1_slave_detach(struct w1_slave *sl); + u8 w1_triplet(struct w1_master *dev, int bdir); void w1_write_8(struct w1_master *, u8); int w1_reset_bus(struct w1_master *); @@ -194,6 +211,7 @@ u8 w1_calc_crc8(u8 *, int); void w1_write_block(struct w1_master *, const u8 *, int); u8 w1_read_block(struct w1_master *, u8 *, int); int w1_reset_select_slave(struct w1_slave *sl); +void w1_next_pullup(struct w1_master *, int); static inline struct w1_slave* dev_to_w1_slave(struct device *dev) { diff --git a/drivers/w1/w1_family.c b/drivers/w1/w1_family.c index a3c95bd6890a..4a099041f28a 100644 --- a/drivers/w1/w1_family.c +++ b/drivers/w1/w1_family.c @@ -48,12 +48,12 @@ int w1_register_family(struct w1_family *newf) if (!ret) { atomic_set(&newf->refcnt, 0); - newf->need_exit = 0; list_add_tail(&newf->family_entry, &w1_families); } spin_unlock(&w1_flock); - w1_reconnect_slaves(newf); + /* check default devices against the new set of drivers */ + w1_reconnect_slaves(newf, 1); return ret; } @@ -72,11 +72,11 @@ void w1_unregister_family(struct w1_family *fent) break; } } - - fent->need_exit = 1; - spin_unlock(&w1_flock); + /* deatch devices using this family code */ + w1_reconnect_slaves(fent, 0); + while (atomic_read(&fent->refcnt)) { printk(KERN_INFO "Waiting for family %u to become free: refcnt=%d.\n", fent->fid, atomic_read(&fent->refcnt)); @@ -109,8 +109,7 @@ struct w1_family * w1_family_registered(u8 fid) static void __w1_family_put(struct w1_family *f) { - if (atomic_dec_and_test(&f->refcnt)) - f->need_exit = 1; + atomic_dec(&f->refcnt); } void w1_family_put(struct w1_family *f) diff --git a/drivers/w1/w1_family.h b/drivers/w1/w1_family.h index ef1e1dafa19a..3ca1b9298f21 100644 --- a/drivers/w1/w1_family.h +++ b/drivers/w1/w1_family.h @@ -33,6 +33,7 @@ #define W1_THERM_DS1822 0x22 #define W1_EEPROM_DS2433 0x23 #define W1_THERM_DS18B20 0x28 +#define W1_EEPROM_DS2431 0x2D #define W1_FAMILY_DS2760 0x30 #define MAXNAMELEN 32 @@ -53,7 +54,6 @@ struct w1_family struct w1_family_ops *fops; atomic_t refcnt; - u8 need_exit; }; extern spinlock_t w1_flock; @@ -63,6 +63,5 @@ void __w1_family_get(struct w1_family *); struct w1_family * w1_family_registered(u8); void w1_unregister_family(struct w1_family *); int w1_register_family(struct w1_family *); -void w1_reconnect_slaves(struct w1_family *f); #endif /* __W1_FAMILY_H */ diff --git a/drivers/w1/w1_int.c b/drivers/w1/w1_int.c index 6840dfebe4d4..a3a54567bfba 100644 --- a/drivers/w1/w1_int.c +++ b/drivers/w1/w1_int.c @@ -29,7 +29,11 @@ #include "w1_netlink.h" #include "w1_int.h" -static u32 w1_ids = 1; +static int w1_search_count = -1; /* Default is continual scan */ +module_param_named(search_count, w1_search_count, int, 0); + +static int w1_enable_pullup = 1; +module_param_named(enable_pullup, w1_enable_pullup, int, 0); static struct w1_master * w1_alloc_dev(u32 id, int slave_count, int slave_ttl, struct device_driver *driver, @@ -59,8 +63,12 @@ static struct w1_master * w1_alloc_dev(u32 id, int slave_count, int slave_ttl, dev->initialized = 0; dev->id = id; dev->slave_ttl = slave_ttl; - dev->search_count = -1; /* continual scan */ + dev->search_count = w1_search_count; + dev->enable_pullup = w1_enable_pullup; + /* 1 for w1_process to decrement + * 1 for __w1_remove_master_device to decrement + */ atomic_set(&dev->refcnt, 2); INIT_LIST_HEAD(&dev->slist); @@ -93,9 +101,10 @@ static void w1_free_dev(struct w1_master *dev) int w1_add_master_device(struct w1_bus_master *master) { - struct w1_master *dev; + struct w1_master *dev, *entry; int retval = 0; struct w1_netlink_msg msg; + int id, found; /* validate minimum functionality */ if (!(master->touch_bit && master->reset_bus) && @@ -104,10 +113,50 @@ int w1_add_master_device(struct w1_bus_master *master) printk(KERN_ERR "w1_add_master_device: invalid function set\n"); return(-EINVAL); } + /* While it would be electrically possible to make a device that + * generated a strong pullup in bit bang mode, only hardare that + * controls 1-wire time frames are even expected to support a strong + * pullup. w1_io.c would need to support calling set_pullup before + * the last write_bit operation of a w1_write_8 which it currently + * doesn't. + */ + if (!master->write_byte && !master->touch_bit && master->set_pullup) { + printk(KERN_ERR "w1_add_master_device: set_pullup requires " + "write_byte or touch_bit, disabling\n"); + master->set_pullup = NULL; + } + + /* Lock until the device is added (or not) to w1_masters. */ + mutex_lock(&w1_mlock); + /* Search for the first available id (starting at 1). */ + id = 0; + do { + ++id; + found = 0; + list_for_each_entry(entry, &w1_masters, w1_master_entry) { + if (entry->id == id) { + found = 1; + break; + } + } + } while (found); - dev = w1_alloc_dev(w1_ids++, w1_max_slave_count, w1_max_slave_ttl, &w1_master_driver, &w1_master_device); - if (!dev) + dev = w1_alloc_dev(id, w1_max_slave_count, w1_max_slave_ttl, + &w1_master_driver, &w1_master_device); + if (!dev) { + mutex_unlock(&w1_mlock); return -ENOMEM; + } + + retval = w1_create_master_attributes(dev); + if (retval) { + mutex_unlock(&w1_mlock); + goto err_out_free_dev; + } + + memcpy(dev->bus_master, master, sizeof(struct w1_bus_master)); + + dev->initialized = 1; dev->thread = kthread_run(&w1_process, dev, "%s", dev->name); if (IS_ERR(dev->thread)) { @@ -115,18 +164,10 @@ int w1_add_master_device(struct w1_bus_master *master) dev_err(&dev->dev, "Failed to create new kernel thread. err=%d\n", retval); - goto err_out_free_dev; + mutex_unlock(&w1_mlock); + goto err_out_rm_attr; } - retval = w1_create_master_attributes(dev); - if (retval) - goto err_out_kill_thread; - - memcpy(dev->bus_master, master, sizeof(struct w1_bus_master)); - - dev->initialized = 1; - - mutex_lock(&w1_mlock); list_add(&dev->w1_master_entry, &w1_masters); mutex_unlock(&w1_mlock); @@ -137,8 +178,12 @@ int w1_add_master_device(struct w1_bus_master *master) return 0; +#if 0 /* Thread cleanup code, not required currently. */ err_out_kill_thread: kthread_stop(dev->thread); +#endif +err_out_rm_attr: + w1_destroy_master_attributes(dev); err_out_free_dev: w1_free_dev(dev); @@ -148,10 +193,21 @@ err_out_free_dev: void __w1_remove_master_device(struct w1_master *dev) { struct w1_netlink_msg msg; + struct w1_slave *sl, *sln; - set_bit(W1_MASTER_NEED_EXIT, &dev->flags); kthread_stop(dev->thread); + mutex_lock(&w1_mlock); + list_del(&dev->w1_master_entry); + mutex_unlock(&w1_mlock); + + mutex_lock(&dev->mutex); + list_for_each_entry_safe(sl, sln, &dev->slist, w1_slave_entry) + w1_slave_detach(sl); + w1_destroy_master_attributes(dev); + mutex_unlock(&dev->mutex); + atomic_dec(&dev->refcnt); + while (atomic_read(&dev->refcnt)) { dev_info(&dev->dev, "Waiting for %s to become free: refcnt=%d.\n", dev->name, atomic_read(&dev->refcnt)); diff --git a/drivers/w1/w1_io.c b/drivers/w1/w1_io.c index 30b6fbf83bd4..f4f82f1f486e 100644 --- a/drivers/w1/w1_io.c +++ b/drivers/w1/w1_io.c @@ -93,6 +93,40 @@ static void w1_write_bit(struct w1_master *dev, int bit) } /** + * Pre-write operation, currently only supporting strong pullups. + * Program the hardware for a strong pullup, if one has been requested and + * the hardware supports it. + * + * @param dev the master device + */ +static void w1_pre_write(struct w1_master *dev) +{ + if (dev->pullup_duration && + dev->enable_pullup && dev->bus_master->set_pullup) { + dev->bus_master->set_pullup(dev->bus_master->data, + dev->pullup_duration); + } +} + +/** + * Post-write operation, currently only supporting strong pullups. + * If a strong pullup was requested, clear it if the hardware supports + * them, or execute the delay otherwise, in either case clear the request. + * + * @param dev the master device + */ +static void w1_post_write(struct w1_master *dev) +{ + if (dev->pullup_duration) { + if (dev->enable_pullup && dev->bus_master->set_pullup) + dev->bus_master->set_pullup(dev->bus_master->data, 0); + else + msleep(dev->pullup_duration); + dev->pullup_duration = 0; + } +} + +/** * Writes 8 bits. * * @param dev the master device @@ -102,11 +136,17 @@ void w1_write_8(struct w1_master *dev, u8 byte) { int i; - if (dev->bus_master->write_byte) + if (dev->bus_master->write_byte) { + w1_pre_write(dev); dev->bus_master->write_byte(dev->bus_master->data, byte); + } else - for (i = 0; i < 8; ++i) + for (i = 0; i < 8; ++i) { + if (i == 7) + w1_pre_write(dev); w1_touch_bit(dev, (byte >> i) & 0x1); + } + w1_post_write(dev); } EXPORT_SYMBOL_GPL(w1_write_8); @@ -203,11 +243,14 @@ void w1_write_block(struct w1_master *dev, const u8 *buf, int len) { int i; - if (dev->bus_master->write_block) + if (dev->bus_master->write_block) { + w1_pre_write(dev); dev->bus_master->write_block(dev->bus_master->data, buf, len); + } else for (i = 0; i < len; ++i) - w1_write_8(dev, buf[i]); + w1_write_8(dev, buf[i]); /* calls w1_pre_write */ + w1_post_write(dev); } EXPORT_SYMBOL_GPL(w1_write_block); @@ -250,12 +293,24 @@ int w1_reset_bus(struct w1_master *dev) result = dev->bus_master->reset_bus(dev->bus_master->data) & 0x1; else { dev->bus_master->write_bit(dev->bus_master->data, 0); + /* minimum 480, max ? us + * be nice and sleep, except 18b20 spec lists 960us maximum, + * so until we can sleep with microsecond accuracy, spin. + * Feel free to come up with some other way to give up the + * cpu for such a short amount of time AND get it back in + * the maximum amount of time. + */ w1_delay(480); dev->bus_master->write_bit(dev->bus_master->data, 1); w1_delay(70); result = dev->bus_master->read_bit(dev->bus_master->data) & 0x1; - w1_delay(410); + /* minmum 70 (above) + 410 = 480 us + * There aren't any timing requirements between a reset and + * the following transactions. Sleeping is safe here. + */ + /* w1_delay(410); min required time */ + msleep(1); } return result; @@ -277,7 +332,8 @@ void w1_search_devices(struct w1_master *dev, u8 search_type, w1_slave_found_cal { dev->attempts++; if (dev->bus_master->search) - dev->bus_master->search(dev->bus_master->data, search_type, cb); + dev->bus_master->search(dev->bus_master->data, dev, + search_type, cb); else w1_search(dev, search_type, cb); } @@ -305,3 +361,20 @@ int w1_reset_select_slave(struct w1_slave *sl) return 0; } EXPORT_SYMBOL_GPL(w1_reset_select_slave); + +/** + * Put out a strong pull-up of the specified duration after the next write + * operation. Not all hardware supports strong pullups. Hardware that + * doesn't support strong pullups will sleep for the given time after the + * write operation without a strong pullup. This is a one shot request for + * the next write, specifying zero will clear a previous request. + * The w1 master lock must be held. + * + * @param delay time in milliseconds + * @return 0=success, anything else=error + */ +void w1_next_pullup(struct w1_master *dev, int delay) +{ + dev->pullup_duration = delay; +} +EXPORT_SYMBOL_GPL(w1_next_pullup); diff --git a/fs/Kconfig.binfmt b/fs/Kconfig.binfmt index 17c9c5ec14c5..801db1341811 100644 --- a/fs/Kconfig.binfmt +++ b/fs/Kconfig.binfmt @@ -25,7 +25,7 @@ config BINFMT_ELF config COMPAT_BINFMT_ELF bool - depends on COMPAT && MMU + depends on COMPAT && BINFMT_ELF config BINFMT_ELF_FDPIC bool "Kernel support for FDPIC ELF binaries" diff --git a/fs/Makefile b/fs/Makefile index b6f27dc26b72..d0c69f57e5bf 100644 --- a/fs/Makefile +++ b/fs/Makefile @@ -8,7 +8,7 @@ obj-y := open.o read_write.o file_table.o super.o \ char_dev.o stat.o exec.o pipe.o namei.o fcntl.o \ ioctl.o readdir.o select.o fifo.o dcache.o inode.o \ - attr.o bad_inode.o file.o filesystems.o namespace.o aio.o \ + attr.o bad_inode.o file.o filesystems.o namespace.o \ seq_file.o xattr.o libfs.o fs-writeback.o \ pnode.o drop_caches.o splice.o sync.o utimes.o \ stack.o @@ -27,6 +27,7 @@ obj-$(CONFIG_ANON_INODES) += anon_inodes.o obj-$(CONFIG_SIGNALFD) += signalfd.o obj-$(CONFIG_TIMERFD) += timerfd.o obj-$(CONFIG_EVENTFD) += eventfd.o +obj-$(CONFIG_AIO) += aio.o obj-$(CONFIG_FILE_LOCKING) += locks.o obj-$(CONFIG_COMPAT) += compat.o compat_ioctl.o diff --git a/fs/afs/file.c b/fs/afs/file.c index 525f7c56e068..a3901769a96c 100644 --- a/fs/afs/file.c +++ b/fs/afs/file.c @@ -50,8 +50,8 @@ const struct address_space_operations afs_fs_aops = { .launder_page = afs_launder_page, .releasepage = afs_releasepage, .invalidatepage = afs_invalidatepage, - .prepare_write = afs_prepare_write, - .commit_write = afs_commit_write, + .write_begin = afs_write_begin, + .write_end = afs_write_end, .writepage = afs_writepage, .writepages = afs_writepages, }; diff --git a/fs/afs/internal.h b/fs/afs/internal.h index 3cb6920ff30b..67f259d99cd6 100644 --- a/fs/afs/internal.h +++ b/fs/afs/internal.h @@ -728,8 +728,12 @@ extern int afs_volume_release_fileserver(struct afs_vnode *, */ extern int afs_set_page_dirty(struct page *); extern void afs_put_writeback(struct afs_writeback *); -extern int afs_prepare_write(struct file *, struct page *, unsigned, unsigned); -extern int afs_commit_write(struct file *, struct page *, unsigned, unsigned); +extern int afs_write_begin(struct file *file, struct address_space *mapping, + loff_t pos, unsigned len, unsigned flags, + struct page **pagep, void **fsdata); +extern int afs_write_end(struct file *file, struct address_space *mapping, + loff_t pos, unsigned len, unsigned copied, + struct page *page, void *fsdata); extern int afs_writepage(struct page *, struct writeback_control *); extern int afs_writepages(struct address_space *, struct writeback_control *); extern int afs_write_inode(struct inode *, int); diff --git a/fs/afs/write.c b/fs/afs/write.c index 065b4e10681a..d6b85dab35fc 100644 --- a/fs/afs/write.c +++ b/fs/afs/write.c @@ -84,15 +84,23 @@ void afs_put_writeback(struct afs_writeback *wb) * partly or wholly fill a page that's under preparation for writing */ static int afs_fill_page(struct afs_vnode *vnode, struct key *key, - unsigned start, unsigned len, struct page *page) + loff_t pos, unsigned len, struct page *page) { + loff_t i_size; + unsigned eof; int ret; - _enter(",,%u,%u", start, len); + _enter(",,%llu,%u", (unsigned long long)pos, len); - ASSERTCMP(start + len, <=, PAGE_SIZE); + ASSERTCMP(len, <=, PAGE_CACHE_SIZE); - ret = afs_vnode_fetch_data(vnode, key, start, len, page); + i_size = i_size_read(&vnode->vfs_inode); + if (pos + len > i_size) + eof = i_size; + else + eof = PAGE_CACHE_SIZE; + + ret = afs_vnode_fetch_data(vnode, key, 0, eof, page); if (ret < 0) { if (ret == -ENOENT) { _debug("got NOENT from server" @@ -107,109 +115,55 @@ static int afs_fill_page(struct afs_vnode *vnode, struct key *key, } /* - * prepare a page for being written to - */ -static int afs_prepare_page(struct afs_vnode *vnode, struct page *page, - struct key *key, unsigned offset, unsigned to) -{ - unsigned eof, tail, start, stop, len; - loff_t i_size, pos; - void *p; - int ret; - - _enter(""); - - if (offset == 0 && to == PAGE_SIZE) - return 0; - - p = kmap_atomic(page, KM_USER0); - - i_size = i_size_read(&vnode->vfs_inode); - pos = (loff_t) page->index << PAGE_SHIFT; - if (pos >= i_size) { - /* partial write, page beyond EOF */ - _debug("beyond"); - if (offset > 0) - memset(p, 0, offset); - if (to < PAGE_SIZE) - memset(p + to, 0, PAGE_SIZE - to); - kunmap_atomic(p, KM_USER0); - return 0; - } - - if (i_size - pos >= PAGE_SIZE) { - /* partial write, page entirely before EOF */ - _debug("before"); - tail = eof = PAGE_SIZE; - } else { - /* partial write, page overlaps EOF */ - eof = i_size - pos; - _debug("overlap %u", eof); - tail = max(eof, to); - if (tail < PAGE_SIZE) - memset(p + tail, 0, PAGE_SIZE - tail); - if (offset > eof) - memset(p + eof, 0, PAGE_SIZE - eof); - } - - kunmap_atomic(p, KM_USER0); - - ret = 0; - if (offset > 0 || eof > to) { - /* need to fill one or two bits that aren't going to be written - * (cover both fillers in one read if there are two) */ - start = (offset > 0) ? 0 : to; - stop = (eof > to) ? eof : offset; - len = stop - start; - _debug("wr=%u-%u av=0-%u rd=%u@%u", - offset, to, eof, start, len); - ret = afs_fill_page(vnode, key, start, len, page); - } - - _leave(" = %d", ret); - return ret; -} - -/* * prepare to perform part of a write to a page - * - the caller holds the page locked, preventing it from being written out or - * modified by anyone else */ -int afs_prepare_write(struct file *file, struct page *page, - unsigned offset, unsigned to) +int afs_write_begin(struct file *file, struct address_space *mapping, + loff_t pos, unsigned len, unsigned flags, + struct page **pagep, void **fsdata) { struct afs_writeback *candidate, *wb; struct afs_vnode *vnode = AFS_FS_I(file->f_dentry->d_inode); + struct page *page; struct key *key = file->private_data; - pgoff_t index; + unsigned from = pos & (PAGE_CACHE_SIZE - 1); + unsigned to = from + len; + pgoff_t index = pos >> PAGE_CACHE_SHIFT; int ret; _enter("{%x:%u},{%lx},%u,%u", - vnode->fid.vid, vnode->fid.vnode, page->index, offset, to); + vnode->fid.vid, vnode->fid.vnode, index, from, to); candidate = kzalloc(sizeof(*candidate), GFP_KERNEL); if (!candidate) return -ENOMEM; candidate->vnode = vnode; - candidate->first = candidate->last = page->index; - candidate->offset_first = offset; + candidate->first = candidate->last = index; + candidate->offset_first = from; candidate->to_last = to; candidate->usage = 1; candidate->state = AFS_WBACK_PENDING; init_waitqueue_head(&candidate->waitq); + page = __grab_cache_page(mapping, index); + if (!page) { + kfree(candidate); + return -ENOMEM; + } + *pagep = page; + /* page won't leak in error case: it eventually gets cleaned off LRU */ + if (!PageUptodate(page)) { _debug("not up to date"); - ret = afs_prepare_page(vnode, page, key, offset, to); + ret = afs_fill_page(vnode, key, pos, len, page); if (ret < 0) { kfree(candidate); _leave(" = %d [prep]", ret); return ret; } + SetPageUptodate(page); } try_again: - index = page->index; spin_lock(&vnode->writeback_lock); /* see if this page is already pending a writeback under a suitable key @@ -242,8 +196,8 @@ try_again: subsume_in_current_wb: _debug("subsume"); ASSERTRANGE(wb->first, <=, index, <=, wb->last); - if (index == wb->first && offset < wb->offset_first) - wb->offset_first = offset; + if (index == wb->first && from < wb->offset_first) + wb->offset_first = from; if (index == wb->last && to > wb->to_last) wb->to_last = to; spin_unlock(&vnode->writeback_lock); @@ -289,17 +243,17 @@ flush_conflicting_wb: /* * finalise part of a write to a page */ -int afs_commit_write(struct file *file, struct page *page, - unsigned offset, unsigned to) +int afs_write_end(struct file *file, struct address_space *mapping, + loff_t pos, unsigned len, unsigned copied, + struct page *page, void *fsdata) { struct afs_vnode *vnode = AFS_FS_I(file->f_dentry->d_inode); loff_t i_size, maybe_i_size; - _enter("{%x:%u},{%lx},%u,%u", - vnode->fid.vid, vnode->fid.vnode, page->index, offset, to); + _enter("{%x:%u},{%lx}", + vnode->fid.vid, vnode->fid.vnode, page->index); - maybe_i_size = (loff_t) page->index << PAGE_SHIFT; - maybe_i_size += to; + maybe_i_size = pos + copied; i_size = i_size_read(&vnode->vfs_inode); if (maybe_i_size > i_size) { @@ -310,12 +264,13 @@ int afs_commit_write(struct file *file, struct page *page, spin_unlock(&vnode->writeback_lock); } - SetPageUptodate(page); set_page_dirty(page); if (PageDirty(page)) _debug("dirtied"); + unlock_page(page); + page_cache_release(page); - return 0; + return copied; } /* diff --git a/fs/autofs4/Makefile b/fs/autofs4/Makefile index f2c3b79e94d2..a811c1f7d9ab 100644 --- a/fs/autofs4/Makefile +++ b/fs/autofs4/Makefile @@ -4,4 +4,4 @@ obj-$(CONFIG_AUTOFS4_FS) += autofs4.o -autofs4-objs := init.o inode.o root.o symlink.o waitq.o expire.o +autofs4-objs := init.o inode.o root.o symlink.o waitq.o expire.o dev-ioctl.o diff --git a/fs/autofs4/autofs_i.h b/fs/autofs4/autofs_i.h index 69a2f5c92319..e0f16da00e54 100644 --- a/fs/autofs4/autofs_i.h +++ b/fs/autofs4/autofs_i.h @@ -14,6 +14,7 @@ /* Internal header file for autofs */ #include <linux/auto_fs4.h> +#include <linux/auto_dev-ioctl.h> #include <linux/mutex.h> #include <linux/list.h> @@ -21,6 +22,11 @@ #define AUTOFS_IOC_FIRST AUTOFS_IOC_READY #define AUTOFS_IOC_COUNT 32 +#define AUTOFS_DEV_IOCTL_IOC_FIRST (AUTOFS_DEV_IOCTL_VERSION) +#define AUTOFS_DEV_IOCTL_IOC_COUNT (AUTOFS_IOC_COUNT - 11) + +#define AUTOFS_TYPE_TRIGGER (AUTOFS_TYPE_DIRECT|AUTOFS_TYPE_OFFSET) + #include <linux/kernel.h> #include <linux/slab.h> #include <linux/time.h> @@ -35,11 +41,27 @@ /* #define DEBUG */ #ifdef DEBUG -#define DPRINTK(fmt,args...) do { printk(KERN_DEBUG "pid %d: %s: " fmt "\n" , current->pid , __func__ , ##args); } while(0) +#define DPRINTK(fmt, args...) \ +do { \ + printk(KERN_DEBUG "pid %d: %s: " fmt "\n", \ + current->pid, __func__, ##args); \ +} while (0) #else -#define DPRINTK(fmt,args...) do {} while(0) +#define DPRINTK(fmt, args...) do {} while (0) #endif +#define AUTOFS_WARN(fmt, args...) \ +do { \ + printk(KERN_WARNING "pid %d: %s: " fmt "\n", \ + current->pid, __func__, ##args); \ +} while (0) + +#define AUTOFS_ERROR(fmt, args...) \ +do { \ + printk(KERN_ERR "pid %d: %s: " fmt "\n", \ + current->pid, __func__, ##args); \ +} while (0) + /* Unified info structure. This is pointed to by both the dentry and inode structures. Each file in the filesystem has an instance of this structure. It holds a reference to the dentry, so dentries are never @@ -61,6 +83,9 @@ struct autofs_info { unsigned long last_used; atomic_t count; + uid_t uid; + gid_t gid; + mode_t mode; size_t size; @@ -92,10 +117,6 @@ struct autofs_wait_queue { #define AUTOFS_SBI_MAGIC 0x6d4a556d -#define AUTOFS_TYPE_INDIRECT 0x0001 -#define AUTOFS_TYPE_DIRECT 0x0002 -#define AUTOFS_TYPE_OFFSET 0x0004 - struct autofs_sb_info { u32 magic; int pipefd; @@ -169,6 +190,17 @@ int autofs4_expire_run(struct super_block *, struct vfsmount *, struct autofs_packet_expire __user *); int autofs4_expire_multi(struct super_block *, struct vfsmount *, struct autofs_sb_info *, int __user *); +struct dentry *autofs4_expire_direct(struct super_block *sb, + struct vfsmount *mnt, + struct autofs_sb_info *sbi, int how); +struct dentry *autofs4_expire_indirect(struct super_block *sb, + struct vfsmount *mnt, + struct autofs_sb_info *sbi, int how); + +/* Device node initialization */ + +int autofs_dev_ioctl_init(void); +void autofs_dev_ioctl_exit(void); /* Operations structures */ diff --git a/fs/autofs4/dev-ioctl.c b/fs/autofs4/dev-ioctl.c new file mode 100644 index 000000000000..625abf5422e2 --- /dev/null +++ b/fs/autofs4/dev-ioctl.c @@ -0,0 +1,863 @@ +/* + * Copyright 2008 Red Hat, Inc. All rights reserved. + * Copyright 2008 Ian Kent <raven@themaw.net> + * + * This file is part of the Linux kernel and is made available under + * the terms of the GNU General Public License, version 2, or at your + * option, any later version, incorporated herein by reference. + */ + +#include <linux/module.h> +#include <linux/vmalloc.h> +#include <linux/miscdevice.h> +#include <linux/init.h> +#include <linux/wait.h> +#include <linux/namei.h> +#include <linux/fcntl.h> +#include <linux/file.h> +#include <linux/fdtable.h> +#include <linux/sched.h> +#include <linux/compat.h> +#include <linux/syscalls.h> +#include <linux/smp_lock.h> +#include <linux/magic.h> +#include <linux/dcache.h> +#include <linux/uaccess.h> + +#include "autofs_i.h" + +/* + * This module implements an interface for routing autofs ioctl control + * commands via a miscellaneous device file. + * + * The alternate interface is needed because we need to be able open + * an ioctl file descriptor on an autofs mount that may be covered by + * another mount. This situation arises when starting automount(8) + * or other user space daemon which uses direct mounts or offset + * mounts (used for autofs lazy mount/umount of nested mount trees), + * which have been left busy at at service shutdown. + */ + +#define AUTOFS_DEV_IOCTL_SIZE sizeof(struct autofs_dev_ioctl) + +typedef int (*ioctl_fn)(struct file *, struct autofs_sb_info *, + struct autofs_dev_ioctl *); + +static int check_name(const char *name) +{ + if (!strchr(name, '/')) + return -EINVAL; + return 0; +} + +/* + * Check a string doesn't overrun the chunk of + * memory we copied from user land. + */ +static int invalid_str(char *str, void *end) +{ + while ((void *) str <= end) + if (!*str++) + return 0; + return -EINVAL; +} + +/* + * Check that the user compiled against correct version of autofs + * misc device code. + * + * As well as checking the version compatibility this always copies + * the kernel interface version out. + */ +static int check_dev_ioctl_version(int cmd, struct autofs_dev_ioctl *param) +{ + int err = 0; + + if ((AUTOFS_DEV_IOCTL_VERSION_MAJOR != param->ver_major) || + (AUTOFS_DEV_IOCTL_VERSION_MINOR < param->ver_minor)) { + AUTOFS_WARN("ioctl control interface version mismatch: " + "kernel(%u.%u), user(%u.%u), cmd(%d)", + AUTOFS_DEV_IOCTL_VERSION_MAJOR, + AUTOFS_DEV_IOCTL_VERSION_MINOR, + param->ver_major, param->ver_minor, cmd); + err = -EINVAL; + } + + /* Fill in the kernel version. */ + param->ver_major = AUTOFS_DEV_IOCTL_VERSION_MAJOR; + param->ver_minor = AUTOFS_DEV_IOCTL_VERSION_MINOR; + + return err; +} + +/* + * Copy parameter control struct, including a possible path allocated + * at the end of the struct. + */ +static struct autofs_dev_ioctl *copy_dev_ioctl(struct autofs_dev_ioctl __user *in) +{ + struct autofs_dev_ioctl tmp, *ads; + + if (copy_from_user(&tmp, in, sizeof(tmp))) + return ERR_PTR(-EFAULT); + + if (tmp.size < sizeof(tmp)) + return ERR_PTR(-EINVAL); + + ads = kmalloc(tmp.size, GFP_KERNEL); + if (!ads) + return ERR_PTR(-ENOMEM); + + if (copy_from_user(ads, in, tmp.size)) { + kfree(ads); + return ERR_PTR(-EFAULT); + } + + return ads; +} + +static inline void free_dev_ioctl(struct autofs_dev_ioctl *param) +{ + kfree(param); + return; +} + +/* + * Check sanity of parameter control fields and if a path is present + * check that it has a "/" and is terminated. + */ +static int validate_dev_ioctl(int cmd, struct autofs_dev_ioctl *param) +{ + int err = -EINVAL; + + if (check_dev_ioctl_version(cmd, param)) { + AUTOFS_WARN("invalid device control module version " + "supplied for cmd(0x%08x)", cmd); + goto out; + } + + if (param->size > sizeof(*param)) { + err = check_name(param->path); + if (err) { + AUTOFS_WARN("invalid path supplied for cmd(0x%08x)", + cmd); + goto out; + } + + err = invalid_str(param->path, + (void *) ((size_t) param + param->size)); + if (err) { + AUTOFS_WARN("invalid path supplied for cmd(0x%08x)", + cmd); + goto out; + } + } + + err = 0; +out: + return err; +} + +/* + * Get the autofs super block info struct from the file opened on + * the autofs mount point. + */ +static struct autofs_sb_info *autofs_dev_ioctl_sbi(struct file *f) +{ + struct autofs_sb_info *sbi = NULL; + struct inode *inode; + + if (f) { + inode = f->f_path.dentry->d_inode; + sbi = autofs4_sbi(inode->i_sb); + } + return sbi; +} + +/* Return autofs module protocol version */ +static int autofs_dev_ioctl_protover(struct file *fp, + struct autofs_sb_info *sbi, + struct autofs_dev_ioctl *param) +{ + param->arg1 = sbi->version; + return 0; +} + +/* Return autofs module protocol sub version */ +static int autofs_dev_ioctl_protosubver(struct file *fp, + struct autofs_sb_info *sbi, + struct autofs_dev_ioctl *param) +{ + param->arg1 = sbi->sub_version; + return 0; +} + +/* + * Walk down the mount stack looking for an autofs mount that + * has the requested device number (aka. new_encode_dev(sb->s_dev). + */ +static int autofs_dev_ioctl_find_super(struct nameidata *nd, dev_t devno) +{ + struct dentry *dentry; + struct inode *inode; + struct super_block *sb; + dev_t s_dev; + unsigned int err; + + err = -ENOENT; + + /* Lookup the dentry name at the base of our mount point */ + dentry = d_lookup(nd->path.dentry, &nd->last); + if (!dentry) + goto out; + + dput(nd->path.dentry); + nd->path.dentry = dentry; + + /* And follow the mount stack looking for our autofs mount */ + while (follow_down(&nd->path.mnt, &nd->path.dentry)) { + inode = nd->path.dentry->d_inode; + if (!inode) + break; + + sb = inode->i_sb; + s_dev = new_encode_dev(sb->s_dev); + if (devno == s_dev) { + if (sb->s_magic == AUTOFS_SUPER_MAGIC) { + err = 0; + break; + } + } + } +out: + return err; +} + +/* + * Walk down the mount stack looking for an autofs mount that + * has the requested mount type (ie. indirect, direct or offset). + */ +static int autofs_dev_ioctl_find_sbi_type(struct nameidata *nd, unsigned int type) +{ + struct dentry *dentry; + struct autofs_info *ino; + unsigned int err; + + err = -ENOENT; + + /* Lookup the dentry name at the base of our mount point */ + dentry = d_lookup(nd->path.dentry, &nd->last); + if (!dentry) + goto out; + + dput(nd->path.dentry); + nd->path.dentry = dentry; + + /* And follow the mount stack looking for our autofs mount */ + while (follow_down(&nd->path.mnt, &nd->path.dentry)) { + ino = autofs4_dentry_ino(nd->path.dentry); + if (ino && ino->sbi->type & type) { + err = 0; + break; + } + } +out: + return err; +} + +static void autofs_dev_ioctl_fd_install(unsigned int fd, struct file *file) +{ + struct files_struct *files = current->files; + struct fdtable *fdt; + + spin_lock(&files->file_lock); + fdt = files_fdtable(files); + BUG_ON(fdt->fd[fd] != NULL); + rcu_assign_pointer(fdt->fd[fd], file); + FD_SET(fd, fdt->close_on_exec); + spin_unlock(&files->file_lock); +} + + +/* + * Open a file descriptor on the autofs mount point corresponding + * to the given path and device number (aka. new_encode_dev(sb->s_dev)). + */ +static int autofs_dev_ioctl_open_mountpoint(const char *path, dev_t devid) +{ + struct file *filp; + struct nameidata nd; + int err, fd; + + fd = get_unused_fd(); + if (likely(fd >= 0)) { + /* Get nameidata of the parent directory */ + err = path_lookup(path, LOOKUP_PARENT, &nd); + if (err) + goto out; + + /* + * Search down, within the parent, looking for an + * autofs super block that has the device number + * corresponding to the autofs fs we want to open. + */ + err = autofs_dev_ioctl_find_super(&nd, devid); + if (err) { + path_put(&nd.path); + goto out; + } + + filp = dentry_open(nd.path.dentry, nd.path.mnt, O_RDONLY); + if (IS_ERR(filp)) { + err = PTR_ERR(filp); + goto out; + } + + autofs_dev_ioctl_fd_install(fd, filp); + } + + return fd; + +out: + put_unused_fd(fd); + return err; +} + +/* Open a file descriptor on an autofs mount point */ +static int autofs_dev_ioctl_openmount(struct file *fp, + struct autofs_sb_info *sbi, + struct autofs_dev_ioctl *param) +{ + const char *path; + dev_t devid; + int err, fd; + + /* param->path has already been checked */ + if (!param->arg1) + return -EINVAL; + + param->ioctlfd = -1; + + path = param->path; + devid = param->arg1; + + err = 0; + fd = autofs_dev_ioctl_open_mountpoint(path, devid); + if (unlikely(fd < 0)) { + err = fd; + goto out; + } + + param->ioctlfd = fd; +out: + return err; +} + +/* Close file descriptor allocated above (user can also use close(2)). */ +static int autofs_dev_ioctl_closemount(struct file *fp, + struct autofs_sb_info *sbi, + struct autofs_dev_ioctl *param) +{ + return sys_close(param->ioctlfd); +} + +/* + * Send "ready" status for an existing wait (either a mount or an expire + * request). + */ +static int autofs_dev_ioctl_ready(struct file *fp, + struct autofs_sb_info *sbi, + struct autofs_dev_ioctl *param) +{ + autofs_wqt_t token; + + token = (autofs_wqt_t) param->arg1; + return autofs4_wait_release(sbi, token, 0); +} + +/* + * Send "fail" status for an existing wait (either a mount or an expire + * request). + */ +static int autofs_dev_ioctl_fail(struct file *fp, + struct autofs_sb_info *sbi, + struct autofs_dev_ioctl *param) +{ + autofs_wqt_t token; + int status; + + token = (autofs_wqt_t) param->arg1; + status = param->arg2 ? param->arg2 : -ENOENT; + return autofs4_wait_release(sbi, token, status); +} + +/* + * Set the pipe fd for kernel communication to the daemon. + * + * Normally this is set at mount using an option but if we + * are reconnecting to a busy mount then we need to use this + * to tell the autofs mount about the new kernel pipe fd. In + * order to protect mounts against incorrectly setting the + * pipefd we also require that the autofs mount be catatonic. + * + * This also sets the process group id used to identify the + * controlling process (eg. the owning automount(8) daemon). + */ +static int autofs_dev_ioctl_setpipefd(struct file *fp, + struct autofs_sb_info *sbi, + struct autofs_dev_ioctl *param) +{ + int pipefd; + int err = 0; + + if (param->arg1 == -1) + return -EINVAL; + + pipefd = param->arg1; + + mutex_lock(&sbi->wq_mutex); + if (!sbi->catatonic) { + mutex_unlock(&sbi->wq_mutex); + return -EBUSY; + } else { + struct file *pipe = fget(pipefd); + if (!pipe->f_op || !pipe->f_op->write) { + err = -EPIPE; + fput(pipe); + goto out; + } + sbi->oz_pgrp = task_pgrp_nr(current); + sbi->pipefd = pipefd; + sbi->pipe = pipe; + sbi->catatonic = 0; + } +out: + mutex_unlock(&sbi->wq_mutex); + return err; +} + +/* + * Make the autofs mount point catatonic, no longer responsive to + * mount requests. Also closes the kernel pipe file descriptor. + */ +static int autofs_dev_ioctl_catatonic(struct file *fp, + struct autofs_sb_info *sbi, + struct autofs_dev_ioctl *param) +{ + autofs4_catatonic_mode(sbi); + return 0; +} + +/* Set the autofs mount timeout */ +static int autofs_dev_ioctl_timeout(struct file *fp, + struct autofs_sb_info *sbi, + struct autofs_dev_ioctl *param) +{ + unsigned long timeout; + + timeout = param->arg1; + param->arg1 = sbi->exp_timeout / HZ; + sbi->exp_timeout = timeout * HZ; + return 0; +} + +/* + * Return the uid and gid of the last request for the mount + * + * When reconstructing an autofs mount tree with active mounts + * we need to re-connect to mounts that may have used the original + * process uid and gid (or string variations of them) for mount + * lookups within the map entry. + */ +static int autofs_dev_ioctl_requester(struct file *fp, + struct autofs_sb_info *sbi, + struct autofs_dev_ioctl *param) +{ + struct autofs_info *ino; + struct nameidata nd; + const char *path; + dev_t devid; + int err = -ENOENT; + + if (param->size <= sizeof(*param)) { + err = -EINVAL; + goto out; + } + + path = param->path; + devid = sbi->sb->s_dev; + + param->arg1 = param->arg2 = -1; + + /* Get nameidata of the parent directory */ + err = path_lookup(path, LOOKUP_PARENT, &nd); + if (err) + goto out; + + err = autofs_dev_ioctl_find_super(&nd, devid); + if (err) + goto out_release; + + ino = autofs4_dentry_ino(nd.path.dentry); + if (ino) { + err = 0; + autofs4_expire_wait(nd.path.dentry); + spin_lock(&sbi->fs_lock); + param->arg1 = ino->uid; + param->arg2 = ino->gid; + spin_unlock(&sbi->fs_lock); + } + +out_release: + path_put(&nd.path); +out: + return err; +} + +/* + * Call repeatedly until it returns -EAGAIN, meaning there's nothing + * more that can be done. + */ +static int autofs_dev_ioctl_expire(struct file *fp, + struct autofs_sb_info *sbi, + struct autofs_dev_ioctl *param) +{ + struct dentry *dentry; + struct vfsmount *mnt; + int err = -EAGAIN; + int how; + + how = param->arg1; + mnt = fp->f_path.mnt; + + if (sbi->type & AUTOFS_TYPE_TRIGGER) + dentry = autofs4_expire_direct(sbi->sb, mnt, sbi, how); + else + dentry = autofs4_expire_indirect(sbi->sb, mnt, sbi, how); + + if (dentry) { + struct autofs_info *ino = autofs4_dentry_ino(dentry); + + /* + * This is synchronous because it makes the daemon a + * little easier + */ + err = autofs4_wait(sbi, dentry, NFY_EXPIRE); + + spin_lock(&sbi->fs_lock); + if (ino->flags & AUTOFS_INF_MOUNTPOINT) { + ino->flags &= ~AUTOFS_INF_MOUNTPOINT; + sbi->sb->s_root->d_mounted++; + } + ino->flags &= ~AUTOFS_INF_EXPIRING; + complete_all(&ino->expire_complete); + spin_unlock(&sbi->fs_lock); + dput(dentry); + } + + return err; +} + +/* Check if autofs mount point is in use */ +static int autofs_dev_ioctl_askumount(struct file *fp, + struct autofs_sb_info *sbi, + struct autofs_dev_ioctl *param) +{ + param->arg1 = 0; + if (may_umount(fp->f_path.mnt)) + param->arg1 = 1; + return 0; +} + +/* + * Check if the given path is a mountpoint. + * + * If we are supplied with the file descriptor of an autofs + * mount we're looking for a specific mount. In this case + * the path is considered a mountpoint if it is itself a + * mountpoint or contains a mount, such as a multi-mount + * without a root mount. In this case we return 1 if the + * path is a mount point and the super magic of the covering + * mount if there is one or 0 if it isn't a mountpoint. + * + * If we aren't supplied with a file descriptor then we + * lookup the nameidata of the path and check if it is the + * root of a mount. If a type is given we are looking for + * a particular autofs mount and if we don't find a match + * we return fail. If the located nameidata path is the + * root of a mount we return 1 along with the super magic + * of the mount or 0 otherwise. + * + * In both cases the the device number (as returned by + * new_encode_dev()) is also returned. + */ +static int autofs_dev_ioctl_ismountpoint(struct file *fp, + struct autofs_sb_info *sbi, + struct autofs_dev_ioctl *param) +{ + struct nameidata nd; + const char *path; + unsigned int type; + int err = -ENOENT; + + if (param->size <= sizeof(*param)) { + err = -EINVAL; + goto out; + } + + path = param->path; + type = param->arg1; + + param->arg1 = 0; + param->arg2 = 0; + + if (!fp || param->ioctlfd == -1) { + if (type == AUTOFS_TYPE_ANY) { + struct super_block *sb; + + err = path_lookup(path, LOOKUP_FOLLOW, &nd); + if (err) + goto out; + + sb = nd.path.dentry->d_sb; + param->arg1 = new_encode_dev(sb->s_dev); + } else { + struct autofs_info *ino; + + err = path_lookup(path, LOOKUP_PARENT, &nd); + if (err) + goto out; + + err = autofs_dev_ioctl_find_sbi_type(&nd, type); + if (err) + goto out_release; + + ino = autofs4_dentry_ino(nd.path.dentry); + param->arg1 = autofs4_get_dev(ino->sbi); + } + + err = 0; + if (nd.path.dentry->d_inode && + nd.path.mnt->mnt_root == nd.path.dentry) { + err = 1; + param->arg2 = nd.path.dentry->d_inode->i_sb->s_magic; + } + } else { + dev_t devid = new_encode_dev(sbi->sb->s_dev); + + err = path_lookup(path, LOOKUP_PARENT, &nd); + if (err) + goto out; + + err = autofs_dev_ioctl_find_super(&nd, devid); + if (err) + goto out_release; + + param->arg1 = autofs4_get_dev(sbi); + + err = have_submounts(nd.path.dentry); + + if (nd.path.mnt->mnt_mountpoint != nd.path.mnt->mnt_root) { + if (follow_down(&nd.path.mnt, &nd.path.dentry)) { + struct inode *inode = nd.path.dentry->d_inode; + param->arg2 = inode->i_sb->s_magic; + } + } + } + +out_release: + path_put(&nd.path); +out: + return err; +} + +/* + * Our range of ioctl numbers isn't 0 based so we need to shift + * the array index by _IOC_NR(AUTOFS_CTL_IOC_FIRST) for the table + * lookup. + */ +#define cmd_idx(cmd) (cmd - _IOC_NR(AUTOFS_DEV_IOCTL_IOC_FIRST)) + +static ioctl_fn lookup_dev_ioctl(unsigned int cmd) +{ + static struct { + int cmd; + ioctl_fn fn; + } _ioctls[] = { + {cmd_idx(AUTOFS_DEV_IOCTL_VERSION_CMD), NULL}, + {cmd_idx(AUTOFS_DEV_IOCTL_PROTOVER_CMD), + autofs_dev_ioctl_protover}, + {cmd_idx(AUTOFS_DEV_IOCTL_PROTOSUBVER_CMD), + autofs_dev_ioctl_protosubver}, + {cmd_idx(AUTOFS_DEV_IOCTL_OPENMOUNT_CMD), + autofs_dev_ioctl_openmount}, + {cmd_idx(AUTOFS_DEV_IOCTL_CLOSEMOUNT_CMD), + autofs_dev_ioctl_closemount}, + {cmd_idx(AUTOFS_DEV_IOCTL_READY_CMD), + autofs_dev_ioctl_ready}, + {cmd_idx(AUTOFS_DEV_IOCTL_FAIL_CMD), + autofs_dev_ioctl_fail}, + {cmd_idx(AUTOFS_DEV_IOCTL_SETPIPEFD_CMD), + autofs_dev_ioctl_setpipefd}, + {cmd_idx(AUTOFS_DEV_IOCTL_CATATONIC_CMD), + autofs_dev_ioctl_catatonic}, + {cmd_idx(AUTOFS_DEV_IOCTL_TIMEOUT_CMD), + autofs_dev_ioctl_timeout}, + {cmd_idx(AUTOFS_DEV_IOCTL_REQUESTER_CMD), + autofs_dev_ioctl_requester}, + {cmd_idx(AUTOFS_DEV_IOCTL_EXPIRE_CMD), + autofs_dev_ioctl_expire}, + {cmd_idx(AUTOFS_DEV_IOCTL_ASKUMOUNT_CMD), + autofs_dev_ioctl_askumount}, + {cmd_idx(AUTOFS_DEV_IOCTL_ISMOUNTPOINT_CMD), + autofs_dev_ioctl_ismountpoint} + }; + unsigned int idx = cmd_idx(cmd); + + return (idx >= ARRAY_SIZE(_ioctls)) ? NULL : _ioctls[idx].fn; +} + +/* ioctl dispatcher */ +static int _autofs_dev_ioctl(unsigned int command, struct autofs_dev_ioctl __user *user) +{ + struct autofs_dev_ioctl *param; + struct file *fp; + struct autofs_sb_info *sbi; + unsigned int cmd_first, cmd; + ioctl_fn fn = NULL; + int err = 0; + + /* only root can play with this */ + if (!capable(CAP_SYS_ADMIN)) + return -EPERM; + + cmd_first = _IOC_NR(AUTOFS_DEV_IOCTL_IOC_FIRST); + cmd = _IOC_NR(command); + + if (_IOC_TYPE(command) != _IOC_TYPE(AUTOFS_DEV_IOCTL_IOC_FIRST) || + cmd - cmd_first >= AUTOFS_DEV_IOCTL_IOC_COUNT) { + return -ENOTTY; + } + + /* Copy the parameters into kernel space. */ + param = copy_dev_ioctl(user); + if (IS_ERR(param)) + return PTR_ERR(param); + + err = validate_dev_ioctl(command, param); + if (err) + goto out; + + /* The validate routine above always sets the version */ + if (cmd == AUTOFS_DEV_IOCTL_VERSION_CMD) + goto done; + + fn = lookup_dev_ioctl(cmd); + if (!fn) { + AUTOFS_WARN("unknown command 0x%08x", command); + return -ENOTTY; + } + + fp = NULL; + sbi = NULL; + + /* + * For obvious reasons the openmount can't have a file + * descriptor yet. We don't take a reference to the + * file during close to allow for immediate release. + */ + if (cmd != AUTOFS_DEV_IOCTL_OPENMOUNT_CMD && + cmd != AUTOFS_DEV_IOCTL_CLOSEMOUNT_CMD) { + fp = fget(param->ioctlfd); + if (!fp) { + if (cmd == AUTOFS_DEV_IOCTL_ISMOUNTPOINT_CMD) + goto cont; + err = -EBADF; + goto out; + } + + if (!fp->f_op) { + err = -ENOTTY; + fput(fp); + goto out; + } + + sbi = autofs_dev_ioctl_sbi(fp); + if (!sbi || sbi->magic != AUTOFS_SBI_MAGIC) { + err = -EINVAL; + fput(fp); + goto out; + } + + /* + * Admin needs to be able to set the mount catatonic in + * order to be able to perform the re-open. + */ + if (!autofs4_oz_mode(sbi) && + cmd != AUTOFS_DEV_IOCTL_CATATONIC_CMD) { + err = -EACCES; + fput(fp); + goto out; + } + } +cont: + err = fn(fp, sbi, param); + + if (fp) + fput(fp); +done: + if (err >= 0 && copy_to_user(user, param, AUTOFS_DEV_IOCTL_SIZE)) + err = -EFAULT; +out: + free_dev_ioctl(param); + return err; +} + +static long autofs_dev_ioctl(struct file *file, uint command, ulong u) +{ + int err; + err = _autofs_dev_ioctl(command, (struct autofs_dev_ioctl __user *) u); + return (long) err; +} + +#ifdef CONFIG_COMPAT +static long autofs_dev_ioctl_compat(struct file *file, uint command, ulong u) +{ + return (long) autofs_dev_ioctl(file, command, (ulong) compat_ptr(u)); +} +#else +#define autofs_dev_ioctl_compat NULL +#endif + +static const struct file_operations _dev_ioctl_fops = { + .unlocked_ioctl = autofs_dev_ioctl, + .compat_ioctl = autofs_dev_ioctl_compat, + .owner = THIS_MODULE, +}; + +static struct miscdevice _autofs_dev_ioctl_misc = { + .minor = MISC_DYNAMIC_MINOR, + .name = AUTOFS_DEVICE_NAME, + .fops = &_dev_ioctl_fops +}; + +/* Register/deregister misc character device */ +int autofs_dev_ioctl_init(void) +{ + int r; + + r = misc_register(&_autofs_dev_ioctl_misc); + if (r) { + AUTOFS_ERROR("misc_register failed for control device"); + return r; + } + + return 0; +} + +void autofs_dev_ioctl_exit(void) +{ + misc_deregister(&_autofs_dev_ioctl_misc); + return; +} + diff --git a/fs/autofs4/expire.c b/fs/autofs4/expire.c index cdabb796ff01..cde2f8e8935a 100644 --- a/fs/autofs4/expire.c +++ b/fs/autofs4/expire.c @@ -244,10 +244,10 @@ cont: } /* Check if we can expire a direct mount (possibly a tree) */ -static struct dentry *autofs4_expire_direct(struct super_block *sb, - struct vfsmount *mnt, - struct autofs_sb_info *sbi, - int how) +struct dentry *autofs4_expire_direct(struct super_block *sb, + struct vfsmount *mnt, + struct autofs_sb_info *sbi, + int how) { unsigned long timeout; struct dentry *root = dget(sb->s_root); @@ -283,10 +283,10 @@ static struct dentry *autofs4_expire_direct(struct super_block *sb, * - it is unused by any user process * - it has been unused for exp_timeout time */ -static struct dentry *autofs4_expire_indirect(struct super_block *sb, - struct vfsmount *mnt, - struct autofs_sb_info *sbi, - int how) +struct dentry *autofs4_expire_indirect(struct super_block *sb, + struct vfsmount *mnt, + struct autofs_sb_info *sbi, + int how) { unsigned long timeout; struct dentry *root = sb->s_root; @@ -479,7 +479,7 @@ int autofs4_expire_multi(struct super_block *sb, struct vfsmount *mnt, if (arg && get_user(do_now, arg)) return -EFAULT; - if (sbi->type & AUTOFS_TYPE_DIRECT) + if (sbi->type & AUTOFS_TYPE_TRIGGER) dentry = autofs4_expire_direct(sb, mnt, sbi, do_now); else dentry = autofs4_expire_indirect(sb, mnt, sbi, do_now); diff --git a/fs/autofs4/init.c b/fs/autofs4/init.c index 723a1c5e361b..9722e4bd8957 100644 --- a/fs/autofs4/init.c +++ b/fs/autofs4/init.c @@ -29,11 +29,20 @@ static struct file_system_type autofs_fs_type = { static int __init init_autofs4_fs(void) { - return register_filesystem(&autofs_fs_type); + int err; + + err = register_filesystem(&autofs_fs_type); + if (err) + return err; + + autofs_dev_ioctl_init(); + + return err; } static void __exit exit_autofs4_fs(void) { + autofs_dev_ioctl_exit(); unregister_filesystem(&autofs_fs_type); } diff --git a/fs/autofs4/inode.c b/fs/autofs4/inode.c index 45d55819203d..c7e65bb30ba0 100644 --- a/fs/autofs4/inode.c +++ b/fs/autofs4/inode.c @@ -53,6 +53,8 @@ struct autofs_info *autofs4_init_ino(struct autofs_info *ino, atomic_set(&ino->count, 0); } + ino->uid = 0; + ino->gid = 0; ino->mode = mode; ino->last_used = jiffies; @@ -288,7 +290,7 @@ static int parse_options(char *options, int *pipefd, uid_t *uid, gid_t *gid, *type = AUTOFS_TYPE_DIRECT; break; case Opt_offset: - *type = AUTOFS_TYPE_DIRECT | AUTOFS_TYPE_OFFSET; + *type = AUTOFS_TYPE_OFFSET; break; default: return 1; @@ -336,7 +338,7 @@ int autofs4_fill_super(struct super_block *s, void *data, int silent) sbi->sb = s; sbi->version = 0; sbi->sub_version = 0; - sbi->type = 0; + sbi->type = AUTOFS_TYPE_INDIRECT; sbi->min_proto = 0; sbi->max_proto = 0; mutex_init(&sbi->wq_mutex); @@ -378,7 +380,7 @@ int autofs4_fill_super(struct super_block *s, void *data, int silent) } root_inode->i_fop = &autofs4_root_operations; - root_inode->i_op = sbi->type & AUTOFS_TYPE_DIRECT ? + root_inode->i_op = sbi->type & AUTOFS_TYPE_TRIGGER ? &autofs4_direct_root_inode_operations : &autofs4_indirect_root_inode_operations; diff --git a/fs/autofs4/waitq.c b/fs/autofs4/waitq.c index 35216d18d8b5..4b67c2a2d77c 100644 --- a/fs/autofs4/waitq.c +++ b/fs/autofs4/waitq.c @@ -337,7 +337,7 @@ int autofs4_wait(struct autofs_sb_info *sbi, struct dentry *dentry, * is very similar for indirect mounts except only dentrys * in the root of the autofs file system may be negative. */ - if (sbi->type & (AUTOFS_TYPE_DIRECT|AUTOFS_TYPE_OFFSET)) + if (sbi->type & AUTOFS_TYPE_TRIGGER) return -ENOENT; else if (!IS_ROOT(dentry->d_parent)) return -ENOENT; @@ -348,7 +348,7 @@ int autofs4_wait(struct autofs_sb_info *sbi, struct dentry *dentry, return -ENOMEM; /* If this is a direct mount request create a dummy name */ - if (IS_ROOT(dentry) && (sbi->type & AUTOFS_TYPE_DIRECT)) + if (IS_ROOT(dentry) && sbi->type & AUTOFS_TYPE_TRIGGER) qstr.len = sprintf(name, "%p", dentry); else { qstr.len = autofs4_getpath(sbi, dentry, &name); @@ -406,11 +406,11 @@ int autofs4_wait(struct autofs_sb_info *sbi, struct dentry *dentry, type = autofs_ptype_expire_multi; } else { if (notify == NFY_MOUNT) - type = (sbi->type & AUTOFS_TYPE_DIRECT) ? + type = (sbi->type & AUTOFS_TYPE_TRIGGER) ? autofs_ptype_missing_direct : autofs_ptype_missing_indirect; else - type = (sbi->type & AUTOFS_TYPE_DIRECT) ? + type = (sbi->type & AUTOFS_TYPE_TRIGGER) ? autofs_ptype_expire_direct : autofs_ptype_expire_indirect; } @@ -457,6 +457,40 @@ int autofs4_wait(struct autofs_sb_info *sbi, struct dentry *dentry, status = wq->status; + /* + * For direct and offset mounts we need to track the requester's + * uid and gid in the dentry info struct. This is so it can be + * supplied, on request, by the misc device ioctl interface. + * This is needed during daemon resatart when reconnecting + * to existing, active, autofs mounts. The uid and gid (and + * related string values) may be used for macro substitution + * in autofs mount maps. + */ + if (!status) { + struct autofs_info *ino; + struct dentry *de = NULL; + + /* direct mount or browsable map */ + ino = autofs4_dentry_ino(dentry); + if (!ino) { + /* If not lookup actual dentry used */ + de = d_lookup(dentry->d_parent, &dentry->d_name); + if (de) + ino = autofs4_dentry_ino(de); + } + + /* Set mount requester */ + if (ino) { + spin_lock(&sbi->fs_lock); + ino->uid = wq->uid; + ino->gid = wq->gid; + spin_unlock(&sbi->fs_lock); + } + + if (de) + dput(de); + } + /* Are we the last process to need status? */ mutex_lock(&sbi->wq_mutex); if (!--wq->wait_ctr) diff --git a/fs/befs/befs_fs_types.h b/fs/befs/befs_fs_types.h index e2595c2c403a..7893eaa1e58c 100644 --- a/fs/befs/befs_fs_types.h +++ b/fs/befs/befs_fs_types.h @@ -55,8 +55,12 @@ enum super_flags { }; #define BEFS_BYTEORDER_NATIVE 0x42494745 +#define BEFS_BYTEORDER_NATIVE_LE (__force fs32)cpu_to_le32(BEFS_BYTEORDER_NATIVE) +#define BEFS_BYTEORDER_NATIVE_BE (__force fs32)cpu_to_be32(BEFS_BYTEORDER_NATIVE) #define BEFS_SUPER_MAGIC BEFS_SUPER_MAGIC1 +#define BEFS_SUPER_MAGIC1_LE (__force fs32)cpu_to_le32(BEFS_SUPER_MAGIC1) +#define BEFS_SUPER_MAGIC1_BE (__force fs32)cpu_to_be32(BEFS_SUPER_MAGIC1) /* * Flags of inode diff --git a/fs/befs/linuxvfs.c b/fs/befs/linuxvfs.c index 9286b2af893a..b6dfee37c7b7 100644 --- a/fs/befs/linuxvfs.c +++ b/fs/befs/linuxvfs.c @@ -809,8 +809,8 @@ befs_fill_super(struct super_block *sb, void *data, int silent) /* account for offset of super block on x86 */ disk_sb = (befs_super_block *) bh->b_data; - if ((le32_to_cpu(disk_sb->magic1) == BEFS_SUPER_MAGIC1) || - (be32_to_cpu(disk_sb->magic1) == BEFS_SUPER_MAGIC1)) { + if ((disk_sb->magic1 == BEFS_SUPER_MAGIC1_LE) || + (disk_sb->magic1 == BEFS_SUPER_MAGIC1_BE)) { befs_debug(sb, "Using PPC superblock location"); } else { befs_debug(sb, "Using x86 superblock location"); diff --git a/fs/befs/super.c b/fs/befs/super.c index 8c3401ff6d6a..41f2b4d0093e 100644 --- a/fs/befs/super.c +++ b/fs/befs/super.c @@ -26,10 +26,10 @@ befs_load_sb(struct super_block *sb, befs_super_block * disk_sb) befs_sb_info *befs_sb = BEFS_SB(sb); /* Check the byte order of the filesystem */ - if (le32_to_cpu(disk_sb->fs_byte_order) == BEFS_BYTEORDER_NATIVE) + if (disk_sb->fs_byte_order == BEFS_BYTEORDER_NATIVE_LE) befs_sb->byte_order = BEFS_BYTESEX_LE; - else if (be32_to_cpu(disk_sb->fs_byte_order) == BEFS_BYTEORDER_NATIVE) - befs_sb->byte_order = BEFS_BYTESEX_BE; + else if (disk_sb->fs_byte_order == BEFS_BYTEORDER_NATIVE_BE) + befs_sb->byte_order = BEFS_BYTESEX_BE; befs_sb->magic1 = fs32_to_cpu(sb, disk_sb->magic1); befs_sb->magic2 = fs32_to_cpu(sb, disk_sb->magic2); diff --git a/fs/binfmt_elf_fdpic.c b/fs/binfmt_elf_fdpic.c index 80c1f952ef78..0e8367c54624 100644 --- a/fs/binfmt_elf_fdpic.c +++ b/fs/binfmt_elf_fdpic.c @@ -25,6 +25,7 @@ #include <linux/fcntl.h> #include <linux/slab.h> #include <linux/pagemap.h> +#include <linux/security.h> #include <linux/highmem.h> #include <linux/highuid.h> #include <linux/personality.h> @@ -455,8 +456,19 @@ error_kill: } /*****************************************************************************/ + +#ifndef ELF_BASE_PLATFORM /* - * present useful information to the program + * AT_BASE_PLATFORM indicates the "real" hardware/microarchitecture. + * If the arch defines ELF_BASE_PLATFORM (in asm/elf.h), the value + * will be copied to the user stack in the same manner as AT_PLATFORM. + */ +#define ELF_BASE_PLATFORM NULL +#endif + +/* + * present useful information to the program by shovelling it onto the new + * process's stack */ static int create_elf_fdpic_tables(struct linux_binprm *bprm, struct mm_struct *mm, @@ -466,15 +478,19 @@ static int create_elf_fdpic_tables(struct linux_binprm *bprm, unsigned long sp, csp, nitems; elf_caddr_t __user *argv, *envp; size_t platform_len = 0, len; - char *k_platform; - char __user *u_platform, *p; + char *k_platform, *k_base_platform; + char __user *u_platform, *u_base_platform, *p; long hwcap; int loop; int nr; /* reset for each csp adjustment */ - /* we're going to shovel a whole load of stuff onto the stack */ #ifdef CONFIG_MMU - sp = bprm->p; + /* In some cases (e.g. Hyper-Threading), we want to avoid L1 evictions + * by the processes running on the same package. One thing we can do is + * to shuffle the initial stack for them, so we give the architecture + * an opportunity to do so here. + */ + sp = arch_align_stack(bprm->p); #else sp = mm->start_stack; @@ -483,11 +499,14 @@ static int create_elf_fdpic_tables(struct linux_binprm *bprm, return -EFAULT; #endif - /* get hold of platform and hardware capabilities masks for the machine - * we are running on. In some cases (Sparc), this info is impossible - * to get, in others (i386) it is merely difficult. - */ hwcap = ELF_HWCAP; + + /* + * If this architecture has a platform capability string, copy it + * to userspace. In some cases (Sparc), this info is impossible + * for userspace to get any other way, in others (i386) it is + * merely difficult. + */ k_platform = ELF_PLATFORM; u_platform = NULL; @@ -499,19 +518,20 @@ static int create_elf_fdpic_tables(struct linux_binprm *bprm, return -EFAULT; } -#if defined(__i386__) && defined(CONFIG_SMP) - /* in some cases (e.g. Hyper-Threading), we want to avoid L1 evictions - * by the processes running on the same package. One thing we can do is - * to shuffle the initial stack for them. - * - * the conditionals here are unneeded, but kept in to make the code - * behaviour the same as pre change unless we have hyperthreaded - * processors. This keeps Mr Marcelo Person happier but should be - * removed for 2.5 + /* + * If this architecture has a "base" platform capability + * string, copy it to userspace. */ - if (smp_num_siblings > 1) - sp = sp - ((current->pid % 64) << 7); -#endif + k_base_platform = ELF_BASE_PLATFORM; + u_base_platform = NULL; + + if (k_base_platform) { + platform_len = strlen(k_base_platform) + 1; + sp -= platform_len; + u_base_platform = (char __user *) sp; + if (__copy_to_user(u_base_platform, k_base_platform, platform_len) != 0) + return -EFAULT; + } sp &= ~7UL; @@ -541,9 +561,13 @@ static int create_elf_fdpic_tables(struct linux_binprm *bprm, } /* force 16 byte _final_ alignment here for generality */ -#define DLINFO_ITEMS 13 +#define DLINFO_ITEMS 15 + + nitems = 1 + DLINFO_ITEMS + (k_platform ? 1 : 0) + + (k_base_platform ? 1 : 0) + AT_VECTOR_SIZE_ARCH; - nitems = 1 + DLINFO_ITEMS + (k_platform ? 1 : 0) + AT_VECTOR_SIZE_ARCH; + if (bprm->interp_flags & BINPRM_FLAGS_EXECFD) + nitems++; csp = sp; sp -= nitems * 2 * sizeof(unsigned long); @@ -575,6 +599,19 @@ static int create_elf_fdpic_tables(struct linux_binprm *bprm, (elf_addr_t) (unsigned long) u_platform); } + if (k_base_platform) { + nr = 0; + csp -= 2 * sizeof(unsigned long); + NEW_AUX_ENT(AT_BASE_PLATFORM, + (elf_addr_t) (unsigned long) u_base_platform); + } + + if (bprm->interp_flags & BINPRM_FLAGS_EXECFD) { + nr = 0; + csp -= 2 * sizeof(unsigned long); + NEW_AUX_ENT(AT_EXECFD, bprm->interp_data); + } + nr = 0; csp -= DLINFO_ITEMS * 2 * sizeof(unsigned long); NEW_AUX_ENT(AT_HWCAP, hwcap); @@ -590,6 +627,8 @@ static int create_elf_fdpic_tables(struct linux_binprm *bprm, NEW_AUX_ENT(AT_EUID, (elf_addr_t) current->euid); NEW_AUX_ENT(AT_GID, (elf_addr_t) current->gid); NEW_AUX_ENT(AT_EGID, (elf_addr_t) current->egid); + NEW_AUX_ENT(AT_SECURE, security_bprm_secureexec(bprm)); + NEW_AUX_ENT(AT_EXECFN, bprm->exec); #ifdef ARCH_DLINFO nr = 0; diff --git a/fs/binfmt_em86.c b/fs/binfmt_em86.c index f9c88d0c8ced..32fb00b52cd0 100644 --- a/fs/binfmt_em86.c +++ b/fs/binfmt_em86.c @@ -43,7 +43,7 @@ static int load_em86(struct linux_binprm *bprm,struct pt_regs *regs) return -ENOEXEC; } - bprm->sh_bang = 1; /* Well, the bang-shell is implicit... */ + bprm->recursion_depth++; /* Well, the bang-shell is implicit... */ allow_write_access(bprm->file); fput(bprm->file); bprm->file = NULL; diff --git a/fs/binfmt_flat.c b/fs/binfmt_flat.c index dfc0197905ca..ccb781a6a804 100644 --- a/fs/binfmt_flat.c +++ b/fs/binfmt_flat.c @@ -229,13 +229,13 @@ static int decompress_exec( ret = 10; if (buf[3] & EXTRA_FIELD) { ret += 2 + buf[10] + (buf[11] << 8); - if (unlikely(LBUFSIZE == ret)) { + if (unlikely(LBUFSIZE <= ret)) { DBG_FLT("binfmt_flat: buffer overflow (EXTRA)?\n"); goto out_free_buf; } } if (buf[3] & ORIG_NAME) { - for (; ret < LBUFSIZE && (buf[ret] != 0); ret++) + while (ret < LBUFSIZE && buf[ret++] != 0) ; if (unlikely(LBUFSIZE == ret)) { DBG_FLT("binfmt_flat: buffer overflow (ORIG_NAME)?\n"); @@ -243,7 +243,7 @@ static int decompress_exec( } } if (buf[3] & COMMENT) { - for (; ret < LBUFSIZE && (buf[ret] != 0); ret++) + while (ret < LBUFSIZE && buf[ret++] != 0) ; if (unlikely(LBUFSIZE == ret)) { DBG_FLT("binfmt_flat: buffer overflow (COMMENT)?\n"); diff --git a/fs/binfmt_misc.c b/fs/binfmt_misc.c index 8d7e88e02e0f..f2744ab4e5b3 100644 --- a/fs/binfmt_misc.c +++ b/fs/binfmt_misc.c @@ -117,7 +117,7 @@ static int load_misc_binary(struct linux_binprm *bprm, struct pt_regs *regs) goto _ret; retval = -ENOEXEC; - if (bprm->misc_bang) + if (bprm->recursion_depth > BINPRM_MAX_RECURSION) goto _ret; /* to keep locking time low, we copy the interpreter string */ @@ -197,7 +197,7 @@ static int load_misc_binary(struct linux_binprm *bprm, struct pt_regs *regs) if (retval < 0) goto _error; - bprm->misc_bang = 1; + bprm->recursion_depth++; retval = search_binary_handler (bprm, regs); if (retval < 0) diff --git a/fs/binfmt_script.c b/fs/binfmt_script.c index 9e3963f7ebf1..08343505e184 100644 --- a/fs/binfmt_script.c +++ b/fs/binfmt_script.c @@ -22,14 +22,15 @@ static int load_script(struct linux_binprm *bprm,struct pt_regs *regs) char interp[BINPRM_BUF_SIZE]; int retval; - if ((bprm->buf[0] != '#') || (bprm->buf[1] != '!') || (bprm->sh_bang)) + if ((bprm->buf[0] != '#') || (bprm->buf[1] != '!') || + (bprm->recursion_depth > BINPRM_MAX_RECURSION)) return -ENOEXEC; /* * This section does the #! interpretation. * Sorta complicated, but hopefully it will work. -TYT */ - bprm->sh_bang = 1; + bprm->recursion_depth++; allow_write_access(bprm->file); fput(bprm->file); bprm->file = NULL; diff --git a/fs/binfmt_som.c b/fs/binfmt_som.c index 68be580ba289..74e587a52796 100644 --- a/fs/binfmt_som.c +++ b/fs/binfmt_som.c @@ -306,3 +306,5 @@ static void __exit exit_som_binfmt(void) core_initcall(init_som_binfmt); module_exit(exit_som_binfmt); + +MODULE_LICENSE("GPL"); diff --git a/fs/compat.c b/fs/compat.c index 075d0509970d..5f9ec449c799 100644 --- a/fs/compat.c +++ b/fs/compat.c @@ -137,6 +137,45 @@ asmlinkage long compat_sys_utimes(char __user *filename, struct compat_timeval _ return compat_sys_futimesat(AT_FDCWD, filename, t); } +static int cp_compat_stat(struct kstat *stat, struct compat_stat __user *ubuf) +{ + compat_ino_t ino = stat->ino; + typeof(ubuf->st_uid) uid = 0; + typeof(ubuf->st_gid) gid = 0; + int err; + + SET_UID(uid, stat->uid); + SET_GID(gid, stat->gid); + + if ((u64) stat->size > MAX_NON_LFS || + !old_valid_dev(stat->dev) || + !old_valid_dev(stat->rdev)) + return -EOVERFLOW; + if (sizeof(ino) < sizeof(stat->ino) && ino != stat->ino) + return -EOVERFLOW; + + if (clear_user(ubuf, sizeof(*ubuf))) + return -EFAULT; + + err = __put_user(old_encode_dev(stat->dev), &ubuf->st_dev); + err |= __put_user(ino, &ubuf->st_ino); + err |= __put_user(stat->mode, &ubuf->st_mode); + err |= __put_user(stat->nlink, &ubuf->st_nlink); + err |= __put_user(uid, &ubuf->st_uid); + err |= __put_user(gid, &ubuf->st_gid); + err |= __put_user(old_encode_dev(stat->rdev), &ubuf->st_rdev); + err |= __put_user(stat->size, &ubuf->st_size); + err |= __put_user(stat->atime.tv_sec, &ubuf->st_atime); + err |= __put_user(stat->atime.tv_nsec, &ubuf->st_atime_nsec); + err |= __put_user(stat->mtime.tv_sec, &ubuf->st_mtime); + err |= __put_user(stat->mtime.tv_nsec, &ubuf->st_mtime_nsec); + err |= __put_user(stat->ctime.tv_sec, &ubuf->st_ctime); + err |= __put_user(stat->ctime.tv_nsec, &ubuf->st_ctime_nsec); + err |= __put_user(stat->blksize, &ubuf->st_blksize); + err |= __put_user(stat->blocks, &ubuf->st_blocks); + return err; +} + asmlinkage long compat_sys_newstat(char __user * filename, struct compat_stat __user *statbuf) { @@ -1239,7 +1278,7 @@ static int compat_count(compat_uptr_t __user *argv, int max) if (!p) break; argv++; - if(++i > max) + if (i++ >= max) return -E2BIG; } } diff --git a/fs/direct-io.c b/fs/direct-io.c index 9606ee848fd8..af0558dbe8b7 100644 --- a/fs/direct-io.c +++ b/fs/direct-io.c @@ -5,11 +5,11 @@ * * O_DIRECT * - * 04Jul2002 akpm@zip.com.au + * 04Jul2002 Andrew Morton * Initial version * 11Sep2002 janetinc@us.ibm.com * added readv/writev support. - * 29Oct2002 akpm@zip.com.au + * 29Oct2002 Andrew Morton * rewrote bio_add_page() support. * 30Oct2002 pbadari@us.ibm.com * added support for non-aligned IO. diff --git a/fs/dquot.c b/fs/dquot.c index ad7e59003e04..da30a27f2242 100644 --- a/fs/dquot.c +++ b/fs/dquot.c @@ -9,8 +9,6 @@ * implementation is based on one of the several variants of the LINUX * inode-subsystem with added complexity of the diskquota system. * - * Version: $Id: dquot.c,v 6.3 1996/11/17 18:35:34 mvw Exp mvw $ - * * Author: Marco van Wieringen <mvw@planets.elm.net> * * Fixes: Dmitry Gorodchanin <pgmdsg@ibi.com>, 11 Feb 96 diff --git a/fs/ecryptfs/Makefile b/fs/ecryptfs/Makefile index b4755a85996e..2cc9ee4ad2eb 100644 --- a/fs/ecryptfs/Makefile +++ b/fs/ecryptfs/Makefile @@ -4,4 +4,4 @@ obj-$(CONFIG_ECRYPT_FS) += ecryptfs.o -ecryptfs-objs := dentry.o file.o inode.o main.o super.o mmap.o read_write.o crypto.o keystore.o messaging.o netlink.o miscdev.o kthread.o debug.o +ecryptfs-objs := dentry.o file.o inode.o main.o super.o mmap.o read_write.o crypto.o keystore.o messaging.o miscdev.o kthread.o debug.o diff --git a/fs/ecryptfs/ecryptfs_kernel.h b/fs/ecryptfs/ecryptfs_kernel.h index b73fb752c5f8..3504cf9df358 100644 --- a/fs/ecryptfs/ecryptfs_kernel.h +++ b/fs/ecryptfs/ecryptfs_kernel.h @@ -79,11 +79,6 @@ #define ECRYPTFS_MAX_PKI_NAME_BYTES 16 #define ECRYPTFS_DEFAULT_NUM_USERS 4 #define ECRYPTFS_MAX_NUM_USERS 32768 -#define ECRYPTFS_TRANSPORT_NETLINK 0 -#define ECRYPTFS_TRANSPORT_CONNECTOR 1 -#define ECRYPTFS_TRANSPORT_RELAYFS 2 -#define ECRYPTFS_TRANSPORT_MISCDEV 3 -#define ECRYPTFS_DEFAULT_TRANSPORT ECRYPTFS_TRANSPORT_MISCDEV #define ECRYPTFS_XATTR_NAME "user.ecryptfs" #define RFC2440_CIPHER_DES3_EDE 0x02 @@ -400,8 +395,6 @@ struct ecryptfs_msg_ctx { struct mutex mux; }; -extern unsigned int ecryptfs_transport; - struct ecryptfs_daemon; struct ecryptfs_daemon { @@ -627,31 +620,20 @@ int ecryptfs_setxattr(struct dentry *dentry, const char *name, const void *value, size_t size, int flags); int ecryptfs_read_xattr_region(char *page_virt, struct inode *ecryptfs_inode); -int ecryptfs_process_helo(unsigned int transport, uid_t euid, - struct user_namespace *user_ns, struct pid *pid); +int ecryptfs_process_helo(uid_t euid, struct user_namespace *user_ns, + struct pid *pid); int ecryptfs_process_quit(uid_t euid, struct user_namespace *user_ns, struct pid *pid); int ecryptfs_process_response(struct ecryptfs_message *msg, uid_t euid, struct user_namespace *user_ns, struct pid *pid, u32 seq); -int ecryptfs_send_message(unsigned int transport, char *data, int data_len, +int ecryptfs_send_message(char *data, int data_len, struct ecryptfs_msg_ctx **msg_ctx); int ecryptfs_wait_for_response(struct ecryptfs_msg_ctx *msg_ctx, struct ecryptfs_message **emsg); -int ecryptfs_init_messaging(unsigned int transport); -void ecryptfs_release_messaging(unsigned int transport); +int ecryptfs_init_messaging(void); +void ecryptfs_release_messaging(void); -int ecryptfs_send_netlink(char *data, int data_len, - struct ecryptfs_msg_ctx *msg_ctx, u8 msg_type, - u16 msg_flags, struct pid *daemon_pid); -int ecryptfs_init_netlink(void); -void ecryptfs_release_netlink(void); - -int ecryptfs_send_connector(char *data, int data_len, - struct ecryptfs_msg_ctx *msg_ctx, u8 msg_type, - u16 msg_flags, struct pid *daemon_pid); -int ecryptfs_init_connector(void); -void ecryptfs_release_connector(void); void ecryptfs_write_header_metadata(char *virt, struct ecryptfs_crypt_stat *crypt_stat, diff --git a/fs/ecryptfs/file.c b/fs/ecryptfs/file.c index 9244d653743e..eb3dc4c7ac06 100644 --- a/fs/ecryptfs/file.c +++ b/fs/ecryptfs/file.c @@ -71,12 +71,11 @@ struct ecryptfs_getdents_callback { void *dirent; struct dentry *dentry; filldir_t filldir; - int err; int filldir_called; int entries_written; }; -/* Inspired by generic filldir in fs/readir.c */ +/* Inspired by generic filldir in fs/readdir.c */ static int ecryptfs_filldir(void *dirent, const char *name, int namelen, loff_t offset, u64 ino, unsigned int d_type) @@ -125,18 +124,18 @@ static int ecryptfs_readdir(struct file *file, void *dirent, filldir_t filldir) buf.dirent = dirent; buf.dentry = file->f_path.dentry; buf.filldir = filldir; -retry: buf.filldir_called = 0; buf.entries_written = 0; - buf.err = 0; rc = vfs_readdir(lower_file, ecryptfs_filldir, (void *)&buf); - if (buf.err) - rc = buf.err; - if (buf.filldir_called && !buf.entries_written) - goto retry; file->f_pos = lower_file->f_pos; + if (rc < 0) + goto out; + if (buf.filldir_called && !buf.entries_written) + goto out; if (rc >= 0) - fsstack_copy_attr_atime(inode, lower_file->f_path.dentry->d_inode); + fsstack_copy_attr_atime(inode, + lower_file->f_path.dentry->d_inode); +out: return rc; } diff --git a/fs/ecryptfs/keystore.c b/fs/ecryptfs/keystore.c index f5b76a331b9c..e22bc3961345 100644 --- a/fs/ecryptfs/keystore.c +++ b/fs/ecryptfs/keystore.c @@ -234,8 +234,8 @@ parse_tag_65_packet(struct ecryptfs_session_key *session_key, u8 *cipher_code, } i += data_len; if (message_len < (i + m_size)) { - ecryptfs_printk(KERN_ERR, "The received netlink message is " - "shorter than expected\n"); + ecryptfs_printk(KERN_ERR, "The message received from ecryptfsd " + "is shorter than expected\n"); rc = -EIO; goto out; } @@ -438,8 +438,8 @@ decrypt_pki_encrypted_session_key(struct ecryptfs_auth_tok *auth_tok, struct ecryptfs_msg_ctx *msg_ctx; struct ecryptfs_message *msg = NULL; char *auth_tok_sig; - char *netlink_message; - size_t netlink_message_length; + char *payload; + size_t payload_len; int rc; rc = ecryptfs_get_auth_tok_sig(&auth_tok_sig, auth_tok); @@ -449,15 +449,15 @@ decrypt_pki_encrypted_session_key(struct ecryptfs_auth_tok *auth_tok, goto out; } rc = write_tag_64_packet(auth_tok_sig, &(auth_tok->session_key), - &netlink_message, &netlink_message_length); + &payload, &payload_len); if (rc) { ecryptfs_printk(KERN_ERR, "Failed to write tag 64 packet\n"); goto out; } - rc = ecryptfs_send_message(ecryptfs_transport, netlink_message, - netlink_message_length, &msg_ctx); + rc = ecryptfs_send_message(payload, payload_len, &msg_ctx); if (rc) { - ecryptfs_printk(KERN_ERR, "Error sending netlink message\n"); + ecryptfs_printk(KERN_ERR, "Error sending message to " + "ecryptfsd\n"); goto out; } rc = ecryptfs_wait_for_response(msg_ctx, &msg); @@ -1333,23 +1333,22 @@ pki_encrypt_session_key(struct ecryptfs_auth_tok *auth_tok, struct ecryptfs_key_record *key_rec) { struct ecryptfs_msg_ctx *msg_ctx = NULL; - char *netlink_payload; - size_t netlink_payload_length; + char *payload = NULL; + size_t payload_len; struct ecryptfs_message *msg; int rc; rc = write_tag_66_packet(auth_tok->token.private_key.signature, ecryptfs_code_for_cipher_string(crypt_stat), - crypt_stat, &netlink_payload, - &netlink_payload_length); + crypt_stat, &payload, &payload_len); if (rc) { ecryptfs_printk(KERN_ERR, "Error generating tag 66 packet\n"); goto out; } - rc = ecryptfs_send_message(ecryptfs_transport, netlink_payload, - netlink_payload_length, &msg_ctx); + rc = ecryptfs_send_message(payload, payload_len, &msg_ctx); if (rc) { - ecryptfs_printk(KERN_ERR, "Error sending netlink message\n"); + ecryptfs_printk(KERN_ERR, "Error sending message to " + "ecryptfsd\n"); goto out; } rc = ecryptfs_wait_for_response(msg_ctx, &msg); @@ -1364,8 +1363,7 @@ pki_encrypt_session_key(struct ecryptfs_auth_tok *auth_tok, ecryptfs_printk(KERN_ERR, "Error parsing tag 67 packet\n"); kfree(msg); out: - if (netlink_payload) - kfree(netlink_payload); + kfree(payload); return rc; } /** diff --git a/fs/ecryptfs/main.c b/fs/ecryptfs/main.c index 8ebe9a5d1d99..046e027a4cb1 100644 --- a/fs/ecryptfs/main.c +++ b/fs/ecryptfs/main.c @@ -30,7 +30,6 @@ #include <linux/namei.h> #include <linux/skbuff.h> #include <linux/crypto.h> -#include <linux/netlink.h> #include <linux/mount.h> #include <linux/pagemap.h> #include <linux/key.h> @@ -49,8 +48,7 @@ MODULE_PARM_DESC(ecryptfs_verbosity, "0, which is Quiet)"); /** - * Module parameter that defines the number of netlink message buffer - * elements + * Module parameter that defines the number of message buffer elements */ unsigned int ecryptfs_message_buf_len = ECRYPTFS_DEFAULT_MSG_CTX_ELEMS; @@ -60,9 +58,9 @@ MODULE_PARM_DESC(ecryptfs_message_buf_len, /** * Module parameter that defines the maximum guaranteed amount of time to wait - * for a response through netlink. The actual sleep time will be, more than + * for a response from ecryptfsd. The actual sleep time will be, more than * likely, a small amount greater than this specified value, but only less if - * the netlink message successfully arrives. + * the message successfully arrives. */ signed long ecryptfs_message_wait_timeout = ECRYPTFS_MAX_MSG_CTX_TTL / HZ; @@ -83,8 +81,6 @@ module_param(ecryptfs_number_of_users, uint, 0); MODULE_PARM_DESC(ecryptfs_number_of_users, "An estimate of the number of " "concurrent users of eCryptfs"); -unsigned int ecryptfs_transport = ECRYPTFS_DEFAULT_TRANSPORT; - void __ecryptfs_printk(const char *fmt, ...) { va_list args; @@ -779,10 +775,11 @@ static int __init ecryptfs_init(void) "rc = [%d]\n", __func__, rc); goto out_do_sysfs_unregistration; } - rc = ecryptfs_init_messaging(ecryptfs_transport); + rc = ecryptfs_init_messaging(); if (rc) { printk(KERN_ERR "Failure occured while attempting to " - "initialize the eCryptfs netlink socket\n"); + "initialize the communications channel to " + "ecryptfsd\n"); goto out_destroy_kthread; } rc = ecryptfs_init_crypto(); @@ -797,7 +794,7 @@ static int __init ecryptfs_init(void) goto out; out_release_messaging: - ecryptfs_release_messaging(ecryptfs_transport); + ecryptfs_release_messaging(); out_destroy_kthread: ecryptfs_destroy_kthread(); out_do_sysfs_unregistration: @@ -818,7 +815,7 @@ static void __exit ecryptfs_exit(void) if (rc) printk(KERN_ERR "Failure whilst attempting to destroy crypto; " "rc = [%d]\n", rc); - ecryptfs_release_messaging(ecryptfs_transport); + ecryptfs_release_messaging(); ecryptfs_destroy_kthread(); do_sysfs_unregistration(); unregister_filesystem(&ecryptfs_fs_type); diff --git a/fs/ecryptfs/messaging.c b/fs/ecryptfs/messaging.c index 1b5c20058acb..c6983978a31e 100644 --- a/fs/ecryptfs/messaging.c +++ b/fs/ecryptfs/messaging.c @@ -134,12 +134,11 @@ out: } static int -ecryptfs_send_message_locked(unsigned int transport, char *data, int data_len, - u8 msg_type, struct ecryptfs_msg_ctx **msg_ctx); +ecryptfs_send_message_locked(char *data, int data_len, u8 msg_type, + struct ecryptfs_msg_ctx **msg_ctx); /** * ecryptfs_send_raw_message - * @transport: Transport type * @msg_type: Message type * @daemon: Daemon struct for recipient of message * @@ -150,38 +149,25 @@ ecryptfs_send_message_locked(unsigned int transport, char *data, int data_len, * * Returns zero on success; non-zero otherwise */ -static int ecryptfs_send_raw_message(unsigned int transport, u8 msg_type, +static int ecryptfs_send_raw_message(u8 msg_type, struct ecryptfs_daemon *daemon) { struct ecryptfs_msg_ctx *msg_ctx; int rc; - switch(transport) { - case ECRYPTFS_TRANSPORT_NETLINK: - rc = ecryptfs_send_netlink(NULL, 0, NULL, msg_type, 0, - daemon->pid); - break; - case ECRYPTFS_TRANSPORT_MISCDEV: - rc = ecryptfs_send_message_locked(transport, NULL, 0, msg_type, - &msg_ctx); - if (rc) { - printk(KERN_ERR "%s: Error whilst attempting to send " - "message via procfs; rc = [%d]\n", __func__, rc); - goto out; - } - /* Raw messages are logically context-free (e.g., no - * reply is expected), so we set the state of the - * ecryptfs_msg_ctx object to indicate that it should - * be freed as soon as the transport sends out the message. */ - mutex_lock(&msg_ctx->mux); - msg_ctx->state = ECRYPTFS_MSG_CTX_STATE_NO_REPLY; - mutex_unlock(&msg_ctx->mux); - break; - case ECRYPTFS_TRANSPORT_CONNECTOR: - case ECRYPTFS_TRANSPORT_RELAYFS: - default: - rc = -ENOSYS; + rc = ecryptfs_send_message_locked(NULL, 0, msg_type, &msg_ctx); + if (rc) { + printk(KERN_ERR "%s: Error whilst attempting to send " + "message to ecryptfsd; rc = [%d]\n", __func__, rc); + goto out; } + /* Raw messages are logically context-free (e.g., no + * reply is expected), so we set the state of the + * ecryptfs_msg_ctx object to indicate that it should + * be freed as soon as the message is sent. */ + mutex_lock(&msg_ctx->mux); + msg_ctx->state = ECRYPTFS_MSG_CTX_STATE_NO_REPLY; + mutex_unlock(&msg_ctx->mux); out: return rc; } @@ -227,7 +213,6 @@ out: /** * ecryptfs_process_helo - * @transport: The underlying transport (netlink, etc.) * @euid: The user ID owner of the message * @user_ns: The namespace in which @euid applies * @pid: The process ID for the userspace program that sent the @@ -239,8 +224,8 @@ out: * Returns zero after adding a new daemon to the hash list; * non-zero otherwise. */ -int ecryptfs_process_helo(unsigned int transport, uid_t euid, - struct user_namespace *user_ns, struct pid *pid) +int ecryptfs_process_helo(uid_t euid, struct user_namespace *user_ns, + struct pid *pid) { struct ecryptfs_daemon *new_daemon; struct ecryptfs_daemon *old_daemon; @@ -252,8 +237,7 @@ int ecryptfs_process_helo(unsigned int transport, uid_t euid, printk(KERN_WARNING "Received request from user [%d] " "to register daemon [0x%p]; unregistering daemon " "[0x%p]\n", euid, pid, old_daemon->pid); - rc = ecryptfs_send_raw_message(transport, ECRYPTFS_MSG_QUIT, - old_daemon); + rc = ecryptfs_send_raw_message(ECRYPTFS_MSG_QUIT, old_daemon); if (rc) printk(KERN_WARNING "Failed to send QUIT " "message to daemon [0x%p]; rc = [%d]\n", @@ -467,8 +451,6 @@ out: /** * ecryptfs_send_message_locked - * @transport: The transport over which to send the message (i.e., - * netlink) * @data: The data to send * @data_len: The length of data * @msg_ctx: The message context allocated for the send @@ -478,8 +460,8 @@ out: * Returns zero on success; non-zero otherwise */ static int -ecryptfs_send_message_locked(unsigned int transport, char *data, int data_len, - u8 msg_type, struct ecryptfs_msg_ctx **msg_ctx) +ecryptfs_send_message_locked(char *data, int data_len, u8 msg_type, + struct ecryptfs_msg_ctx **msg_ctx) { struct ecryptfs_daemon *daemon; int rc; @@ -503,20 +485,8 @@ ecryptfs_send_message_locked(unsigned int transport, char *data, int data_len, ecryptfs_msg_ctx_free_to_alloc(*msg_ctx); mutex_unlock(&(*msg_ctx)->mux); mutex_unlock(&ecryptfs_msg_ctx_lists_mux); - switch (transport) { - case ECRYPTFS_TRANSPORT_NETLINK: - rc = ecryptfs_send_netlink(data, data_len, *msg_ctx, msg_type, - 0, daemon->pid); - break; - case ECRYPTFS_TRANSPORT_MISCDEV: - rc = ecryptfs_send_miscdev(data, data_len, *msg_ctx, msg_type, - 0, daemon); - break; - case ECRYPTFS_TRANSPORT_CONNECTOR: - case ECRYPTFS_TRANSPORT_RELAYFS: - default: - rc = -ENOSYS; - } + rc = ecryptfs_send_miscdev(data, data_len, *msg_ctx, msg_type, 0, + daemon); if (rc) printk(KERN_ERR "%s: Error attempting to send message to " "userspace daemon; rc = [%d]\n", __func__, rc); @@ -526,8 +496,6 @@ out: /** * ecryptfs_send_message - * @transport: The transport over which to send the message (i.e., - * netlink) * @data: The data to send * @data_len: The length of data * @msg_ctx: The message context allocated for the send @@ -536,14 +504,14 @@ out: * * Returns zero on success; non-zero otherwise */ -int ecryptfs_send_message(unsigned int transport, char *data, int data_len, +int ecryptfs_send_message(char *data, int data_len, struct ecryptfs_msg_ctx **msg_ctx) { int rc; mutex_lock(&ecryptfs_daemon_hash_mux); - rc = ecryptfs_send_message_locked(transport, data, data_len, - ECRYPTFS_MSG_REQUEST, msg_ctx); + rc = ecryptfs_send_message_locked(data, data_len, ECRYPTFS_MSG_REQUEST, + msg_ctx); mutex_unlock(&ecryptfs_daemon_hash_mux); return rc; } @@ -586,7 +554,7 @@ sleep: return rc; } -int ecryptfs_init_messaging(unsigned int transport) +int ecryptfs_init_messaging(void) { int i; int rc = 0; @@ -639,27 +607,14 @@ int ecryptfs_init_messaging(unsigned int transport) mutex_unlock(&ecryptfs_msg_ctx_arr[i].mux); } mutex_unlock(&ecryptfs_msg_ctx_lists_mux); - switch(transport) { - case ECRYPTFS_TRANSPORT_NETLINK: - rc = ecryptfs_init_netlink(); - if (rc) - ecryptfs_release_messaging(transport); - break; - case ECRYPTFS_TRANSPORT_MISCDEV: - rc = ecryptfs_init_ecryptfs_miscdev(); - if (rc) - ecryptfs_release_messaging(transport); - break; - case ECRYPTFS_TRANSPORT_CONNECTOR: - case ECRYPTFS_TRANSPORT_RELAYFS: - default: - rc = -ENOSYS; - } + rc = ecryptfs_init_ecryptfs_miscdev(); + if (rc) + ecryptfs_release_messaging(); out: return rc; } -void ecryptfs_release_messaging(unsigned int transport) +void ecryptfs_release_messaging(void) { if (ecryptfs_msg_ctx_arr) { int i; @@ -698,17 +653,6 @@ void ecryptfs_release_messaging(unsigned int transport) kfree(ecryptfs_daemon_hash); mutex_unlock(&ecryptfs_daemon_hash_mux); } - switch(transport) { - case ECRYPTFS_TRANSPORT_NETLINK: - ecryptfs_release_netlink(); - break; - case ECRYPTFS_TRANSPORT_MISCDEV: - ecryptfs_destroy_ecryptfs_miscdev(); - break; - case ECRYPTFS_TRANSPORT_CONNECTOR: - case ECRYPTFS_TRANSPORT_RELAYFS: - default: - break; - } + ecryptfs_destroy_ecryptfs_miscdev(); return; } diff --git a/fs/ecryptfs/mmap.c b/fs/ecryptfs/mmap.c index 245c2dc02d5c..04d7b3fa1ac6 100644 --- a/fs/ecryptfs/mmap.c +++ b/fs/ecryptfs/mmap.c @@ -265,22 +265,34 @@ out: } /** - * ecryptfs_prepare_write + * ecryptfs_write_begin * @file: The eCryptfs file - * @page: The eCryptfs page - * @from: The start byte from which we will write - * @to: The end byte to which we will write + * @mapping: The eCryptfs object + * @pos: The file offset at which to start writing + * @len: Length of the write + * @flags: Various flags + * @pagep: Pointer to return the page + * @fsdata: Pointer to return fs data (unused) * * This function must zero any hole we create * * Returns zero on success; non-zero otherwise */ -static int ecryptfs_prepare_write(struct file *file, struct page *page, - unsigned from, unsigned to) +static int ecryptfs_write_begin(struct file *file, + struct address_space *mapping, + loff_t pos, unsigned len, unsigned flags, + struct page **pagep, void **fsdata) { + pgoff_t index = pos >> PAGE_CACHE_SHIFT; + struct page *page; loff_t prev_page_end_size; int rc = 0; + page = __grab_cache_page(mapping, index); + if (!page) + return -ENOMEM; + *pagep = page; + if (!PageUptodate(page)) { struct ecryptfs_crypt_stat *crypt_stat = &ecryptfs_inode_to_private( @@ -289,8 +301,7 @@ static int ecryptfs_prepare_write(struct file *file, struct page *page, if (!(crypt_stat->flags & ECRYPTFS_ENCRYPTED) || (crypt_stat->flags & ECRYPTFS_NEW_FILE)) { rc = ecryptfs_read_lower_page_segment( - page, page->index, 0, PAGE_CACHE_SIZE, - page->mapping->host); + page, index, 0, PAGE_CACHE_SIZE, mapping->host); if (rc) { printk(KERN_ERR "%s: Error attemping to read " "lower page segment; rc = [%d]\n", @@ -316,8 +327,8 @@ static int ecryptfs_prepare_write(struct file *file, struct page *page, SetPageUptodate(page); } else { rc = ecryptfs_read_lower_page_segment( - page, page->index, 0, PAGE_CACHE_SIZE, - page->mapping->host); + page, index, 0, PAGE_CACHE_SIZE, + mapping->host); if (rc) { printk(KERN_ERR "%s: Error reading " "page; rc = [%d]\n", @@ -339,10 +350,10 @@ static int ecryptfs_prepare_write(struct file *file, struct page *page, SetPageUptodate(page); } } - prev_page_end_size = ((loff_t)page->index << PAGE_CACHE_SHIFT); + prev_page_end_size = ((loff_t)index << PAGE_CACHE_SHIFT); /* If creating a page or more of holes, zero them out via truncate. * Note, this will increase i_size. */ - if (page->index != 0) { + if (index != 0) { if (prev_page_end_size > i_size_read(page->mapping->host)) { rc = ecryptfs_truncate(file->f_path.dentry, prev_page_end_size); @@ -357,8 +368,8 @@ static int ecryptfs_prepare_write(struct file *file, struct page *page, } /* Writing to a new page, and creating a small hole from start * of page? Zero it out. */ - if ((i_size_read(page->mapping->host) == prev_page_end_size) - && (from != 0)) + if ((i_size_read(mapping->host) == prev_page_end_size) + && (pos != 0)) zero_user(page, 0, PAGE_CACHE_SIZE); out: return rc; @@ -445,21 +456,28 @@ int ecryptfs_write_inode_size_to_metadata(struct inode *ecryptfs_inode) } /** - * ecryptfs_commit_write + * ecryptfs_write_end * @file: The eCryptfs file object + * @mapping: The eCryptfs object + * @pos: The file position + * @len: The length of the data (unused) + * @copied: The amount of data copied * @page: The eCryptfs page - * @from: Ignored (we rotate the page IV on each write) - * @to: Ignored + * @fsdata: The fsdata (unused) * * This is where we encrypt the data and pass the encrypted data to * the lower filesystem. In OpenPGP-compatible mode, we operate on * entire underlying packets. */ -static int ecryptfs_commit_write(struct file *file, struct page *page, - unsigned from, unsigned to) +static int ecryptfs_write_end(struct file *file, + struct address_space *mapping, + loff_t pos, unsigned len, unsigned copied, + struct page *page, void *fsdata) { - loff_t pos; - struct inode *ecryptfs_inode = page->mapping->host; + pgoff_t index = pos >> PAGE_CACHE_SHIFT; + unsigned from = pos & (PAGE_CACHE_SIZE - 1); + unsigned to = from + copied; + struct inode *ecryptfs_inode = mapping->host; struct ecryptfs_crypt_stat *crypt_stat = &ecryptfs_inode_to_private(file->f_path.dentry->d_inode)->crypt_stat; int rc; @@ -471,25 +489,22 @@ static int ecryptfs_commit_write(struct file *file, struct page *page, } else ecryptfs_printk(KERN_DEBUG, "Not a new file\n"); ecryptfs_printk(KERN_DEBUG, "Calling fill_zeros_to_end_of_page" - "(page w/ index = [0x%.16x], to = [%d])\n", page->index, - to); + "(page w/ index = [0x%.16x], to = [%d])\n", index, to); /* Fills in zeros if 'to' goes beyond inode size */ rc = fill_zeros_to_end_of_page(page, to); if (rc) { ecryptfs_printk(KERN_WARNING, "Error attempting to fill " - "zeros in page with index = [0x%.16x]\n", - page->index); + "zeros in page with index = [0x%.16x]\n", index); goto out; } rc = ecryptfs_encrypt_page(page); if (rc) { ecryptfs_printk(KERN_WARNING, "Error encrypting page (upper " - "index [0x%.16x])\n", page->index); + "index [0x%.16x])\n", index); goto out; } - pos = (((loff_t)page->index) << PAGE_CACHE_SHIFT) + to; - if (pos > i_size_read(ecryptfs_inode)) { - i_size_write(ecryptfs_inode, pos); + if (pos + copied > i_size_read(ecryptfs_inode)) { + i_size_write(ecryptfs_inode, pos + copied); ecryptfs_printk(KERN_DEBUG, "Expanded file size to " "[0x%.16x]\n", i_size_read(ecryptfs_inode)); } @@ -497,7 +512,11 @@ static int ecryptfs_commit_write(struct file *file, struct page *page, if (rc) printk(KERN_ERR "Error writing inode size to metadata; " "rc = [%d]\n", rc); + else + rc = copied; out: + unlock_page(page); + page_cache_release(page); return rc; } @@ -518,7 +537,7 @@ static sector_t ecryptfs_bmap(struct address_space *mapping, sector_t block) struct address_space_operations ecryptfs_aops = { .writepage = ecryptfs_writepage, .readpage = ecryptfs_readpage, - .prepare_write = ecryptfs_prepare_write, - .commit_write = ecryptfs_commit_write, + .write_begin = ecryptfs_write_begin, + .write_end = ecryptfs_write_end, .bmap = ecryptfs_bmap, }; diff --git a/fs/ecryptfs/netlink.c b/fs/ecryptfs/netlink.c deleted file mode 100644 index e0abad62b395..000000000000 --- a/fs/ecryptfs/netlink.c +++ /dev/null @@ -1,249 +0,0 @@ -/** - * eCryptfs: Linux filesystem encryption layer - * - * Copyright (C) 2004-2006 International Business Machines Corp. - * Author(s): Michael A. Halcrow <mhalcrow@us.ibm.com> - * Tyler Hicks <tyhicks@ou.edu> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License version - * 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA - * 02111-1307, USA. - */ - -#include <net/sock.h> -#include <linux/hash.h> -#include <linux/random.h> -#include "ecryptfs_kernel.h" - -static struct sock *ecryptfs_nl_sock; - -/** - * ecryptfs_send_netlink - * @data: The data to include as the payload - * @data_len: The byte count of the data - * @msg_ctx: The netlink context that will be used to handle the - * response message - * @msg_type: The type of netlink message to send - * @msg_flags: The flags to include in the netlink header - * @daemon_pid: The process id of the daemon to send the message to - * - * Sends the data to the specified daemon pid and uses the netlink - * context element to store the data needed for validation upon - * receiving the response. The data and the netlink context can be - * null if just sending a netlink header is sufficient. Returns zero - * upon sending the message; non-zero upon error. - */ -int ecryptfs_send_netlink(char *data, int data_len, - struct ecryptfs_msg_ctx *msg_ctx, u8 msg_type, - u16 msg_flags, struct pid *daemon_pid) -{ - struct sk_buff *skb; - struct nlmsghdr *nlh; - struct ecryptfs_message *msg; - size_t payload_len; - int rc; - - payload_len = ((data && data_len) ? (sizeof(*msg) + data_len) : 0); - skb = alloc_skb(NLMSG_SPACE(payload_len), GFP_KERNEL); - if (!skb) { - rc = -ENOMEM; - ecryptfs_printk(KERN_ERR, "Failed to allocate socket buffer\n"); - goto out; - } - nlh = NLMSG_PUT(skb, pid_nr(daemon_pid), msg_ctx ? msg_ctx->counter : 0, - msg_type, payload_len); - nlh->nlmsg_flags = msg_flags; - if (msg_ctx && payload_len) { - msg = (struct ecryptfs_message *)NLMSG_DATA(nlh); - msg->index = msg_ctx->index; - msg->data_len = data_len; - memcpy(msg->data, data, data_len); - } - rc = netlink_unicast(ecryptfs_nl_sock, skb, pid_nr(daemon_pid), 0); - if (rc < 0) { - ecryptfs_printk(KERN_ERR, "Failed to send eCryptfs netlink " - "message; rc = [%d]\n", rc); - goto out; - } - rc = 0; - goto out; -nlmsg_failure: - rc = -EMSGSIZE; - kfree_skb(skb); -out: - return rc; -} - -/** - * ecryptfs_process_nl_reponse - * @skb: The socket buffer containing the netlink message of state - * RESPONSE - * - * Processes a response message after sending a operation request to - * userspace. Attempts to assign the msg to a netlink context element - * at the index specified in the msg. The sk_buff and nlmsghdr must - * be validated before this function. Returns zero upon delivery to - * desired context element; non-zero upon delivery failure or error. - */ -static int ecryptfs_process_nl_response(struct sk_buff *skb) -{ - struct nlmsghdr *nlh = nlmsg_hdr(skb); - struct ecryptfs_message *msg = NLMSG_DATA(nlh); - struct pid *pid; - int rc; - - if (skb->len - NLMSG_HDRLEN - sizeof(*msg) != msg->data_len) { - rc = -EINVAL; - ecryptfs_printk(KERN_ERR, "Received netlink message with " - "incorrectly specified data length\n"); - goto out; - } - pid = find_get_pid(NETLINK_CREDS(skb)->pid); - rc = ecryptfs_process_response(msg, NETLINK_CREDS(skb)->uid, NULL, - pid, nlh->nlmsg_seq); - put_pid(pid); - if (rc) - printk(KERN_ERR - "Error processing response message; rc = [%d]\n", rc); -out: - return rc; -} - -/** - * ecryptfs_process_nl_helo - * @skb: The socket buffer containing the nlmsghdr in HELO state - * - * Gets uid and pid of the skb and adds the values to the daemon id - * hash. Returns zero after adding a new daemon id to the hash list; - * non-zero otherwise. - */ -static int ecryptfs_process_nl_helo(struct sk_buff *skb) -{ - struct pid *pid; - int rc; - - pid = find_get_pid(NETLINK_CREDS(skb)->pid); - rc = ecryptfs_process_helo(ECRYPTFS_TRANSPORT_NETLINK, - NETLINK_CREDS(skb)->uid, NULL, pid); - put_pid(pid); - if (rc) - printk(KERN_WARNING "Error processing HELO; rc = [%d]\n", rc); - return rc; -} - -/** - * ecryptfs_process_nl_quit - * @skb: The socket buffer containing the nlmsghdr in QUIT state - * - * Gets uid and pid of the skb and deletes the corresponding daemon - * id, if it is the registered that is requesting the - * deletion. Returns zero after deleting the desired daemon id; - * non-zero otherwise. - */ -static int ecryptfs_process_nl_quit(struct sk_buff *skb) -{ - struct pid *pid; - int rc; - - pid = find_get_pid(NETLINK_CREDS(skb)->pid); - rc = ecryptfs_process_quit(NETLINK_CREDS(skb)->uid, NULL, pid); - put_pid(pid); - if (rc) - printk(KERN_WARNING - "Error processing QUIT message; rc = [%d]\n", rc); - return rc; -} - -/** - * ecryptfs_receive_nl_message - * - * Callback function called by netlink system when a message arrives. - * If the message looks to be valid, then an attempt is made to assign - * it to its desired netlink context element and wake up the process - * that is waiting for a response. - */ -static void ecryptfs_receive_nl_message(struct sk_buff *skb) -{ - struct nlmsghdr *nlh; - - nlh = nlmsg_hdr(skb); - if (!NLMSG_OK(nlh, skb->len)) { - ecryptfs_printk(KERN_ERR, "Received corrupt netlink " - "message\n"); - goto free; - } - switch (nlh->nlmsg_type) { - case ECRYPTFS_MSG_RESPONSE: - if (ecryptfs_process_nl_response(skb)) { - ecryptfs_printk(KERN_WARNING, "Failed to " - "deliver netlink response to " - "requesting operation\n"); - } - break; - case ECRYPTFS_MSG_HELO: - if (ecryptfs_process_nl_helo(skb)) { - ecryptfs_printk(KERN_WARNING, "Failed to " - "fulfill HELO request\n"); - } - break; - case ECRYPTFS_MSG_QUIT: - if (ecryptfs_process_nl_quit(skb)) { - ecryptfs_printk(KERN_WARNING, "Failed to " - "fulfill QUIT request\n"); - } - break; - default: - ecryptfs_printk(KERN_WARNING, "Dropping netlink " - "message of unrecognized type [%d]\n", - nlh->nlmsg_type); - break; - } -free: - kfree_skb(skb); -} - -/** - * ecryptfs_init_netlink - * - * Initializes the daemon id hash list, netlink context array, and - * necessary locks. Returns zero upon success; non-zero upon error. - */ -int ecryptfs_init_netlink(void) -{ - int rc; - - ecryptfs_nl_sock = netlink_kernel_create(&init_net, NETLINK_ECRYPTFS, 0, - ecryptfs_receive_nl_message, - NULL, THIS_MODULE); - if (!ecryptfs_nl_sock) { - rc = -EIO; - ecryptfs_printk(KERN_ERR, "Failed to create netlink socket\n"); - goto out; - } - ecryptfs_nl_sock->sk_sndtimeo = ECRYPTFS_DEFAULT_SEND_TIMEOUT; - rc = 0; -out: - return rc; -} - -/** - * ecryptfs_release_netlink - * - * Frees all memory used by the netlink context array and releases the - * netlink socket. - */ -void ecryptfs_release_netlink(void) -{ - netlink_kernel_release(ecryptfs_nl_sock); - ecryptfs_nl_sock = NULL; -} diff --git a/fs/eventpoll.c b/fs/eventpoll.c index 7cc0eb756b55..99368bda0261 100644 --- a/fs/eventpoll.c +++ b/fs/eventpoll.c @@ -927,14 +927,11 @@ errxit: /* * During the time we spent in the loop above, some other events * might have been queued by the poll callback. We re-insert them - * here (in case they are not already queued, or they're one-shot). + * inside the main ready-list here. */ for (nepi = ep->ovflist; (epi = nepi) != NULL; - nepi = epi->next, epi->next = EP_UNACTIVE_PTR) { - if (!ep_is_linked(&epi->rdllink) && - (epi->event.events & ~EP_PRIVATE_BITS)) - list_add_tail(&epi->rdllink, &ep->rdllist); - } + nepi = epi->next, epi->next = EP_UNACTIVE_PTR) + list_add_tail(&epi->rdllink, &ep->rdllist); /* * We need to set back ep->ovflist to EP_UNACTIVE_PTR, so that after * releasing the lock, events will be queued in the normal way inside diff --git a/fs/exec.c b/fs/exec.c index cecee501ce78..cfb5656b2cdc 100644 --- a/fs/exec.c +++ b/fs/exec.c @@ -391,7 +391,7 @@ static int count(char __user * __user * argv, int max) if (!p) break; argv++; - if(++i > max) + if (i++ >= max) return -E2BIG; cond_resched(); } @@ -825,8 +825,6 @@ static int de_thread(struct task_struct *tsk) schedule(); } - if (unlikely(task_child_reaper(tsk) == leader)) - task_active_pid_ns(tsk)->child_reaper = tsk; /* * The only record we have of the real-time age of a * process, regardless of execs it's done, is start_time. @@ -1189,7 +1187,7 @@ int search_binary_handler(struct linux_binprm *bprm,struct pt_regs *regs) return retval; /* Remember if the application is TASO. */ - bprm->sh_bang = eh->ah.entry < 0x100000000UL; + bprm->taso = eh->ah.entry < 0x100000000UL; bprm->file = file; bprm->loader = loader; diff --git a/fs/ext2/balloc.c b/fs/ext2/balloc.c index 10bb02c3f25c..6dac7ba2d22d 100644 --- a/fs/ext2/balloc.c +++ b/fs/ext2/balloc.c @@ -1295,6 +1295,7 @@ retry_alloc: * turn off reservation for this allocation */ if (my_rsv && (free_blocks < windowsz) + && (free_blocks > 0) && (rsv_is_empty(&my_rsv->rsv_window))) my_rsv = NULL; @@ -1332,7 +1333,7 @@ retry_alloc: * free blocks is less than half of the reservation * window size. */ - if (free_blocks <= (windowsz/2)) + if (my_rsv && (free_blocks <= (windowsz/2))) continue; brelse(bitmap_bh); diff --git a/fs/ext2/dir.c b/fs/ext2/dir.c index a78c6b4af060..11a49ce84392 100644 --- a/fs/ext2/dir.c +++ b/fs/ext2/dir.c @@ -103,7 +103,7 @@ static int ext2_commit_chunk(struct page *page, loff_t pos, unsigned len) return err; } -static void ext2_check_page(struct page *page) +static void ext2_check_page(struct page *page, int quiet) { struct inode *dir = page->mapping->host; struct super_block *sb = dir->i_sb; @@ -146,10 +146,10 @@ out: /* Too bad, we had an error */ Ebadsize: - ext2_error(sb, "ext2_check_page", - "size of directory #%lu is not a multiple of chunk size", - dir->i_ino - ); + if (!quiet) + ext2_error(sb, __func__, + "size of directory #%lu is not a multiple " + "of chunk size", dir->i_ino); goto fail; Eshort: error = "rec_len is smaller than minimal"; @@ -166,32 +166,36 @@ Espan: Einumber: error = "inode out of bounds"; bad_entry: - ext2_error (sb, "ext2_check_page", "bad entry in directory #%lu: %s - " - "offset=%lu, inode=%lu, rec_len=%d, name_len=%d", - dir->i_ino, error, (page->index<<PAGE_CACHE_SHIFT)+offs, - (unsigned long) le32_to_cpu(p->inode), - rec_len, p->name_len); + if (!quiet) + ext2_error(sb, __func__, "bad entry in directory #%lu: : %s - " + "offset=%lu, inode=%lu, rec_len=%d, name_len=%d", + dir->i_ino, error, (page->index<<PAGE_CACHE_SHIFT)+offs, + (unsigned long) le32_to_cpu(p->inode), + rec_len, p->name_len); goto fail; Eend: - p = (ext2_dirent *)(kaddr + offs); - ext2_error (sb, "ext2_check_page", - "entry in directory #%lu spans the page boundary" - "offset=%lu, inode=%lu", - dir->i_ino, (page->index<<PAGE_CACHE_SHIFT)+offs, - (unsigned long) le32_to_cpu(p->inode)); + if (!quiet) { + p = (ext2_dirent *)(kaddr + offs); + ext2_error(sb, "ext2_check_page", + "entry in directory #%lu spans the page boundary" + "offset=%lu, inode=%lu", + dir->i_ino, (page->index<<PAGE_CACHE_SHIFT)+offs, + (unsigned long) le32_to_cpu(p->inode)); + } fail: SetPageChecked(page); SetPageError(page); } -static struct page * ext2_get_page(struct inode *dir, unsigned long n) +static struct page * ext2_get_page(struct inode *dir, unsigned long n, + int quiet) { struct address_space *mapping = dir->i_mapping; struct page *page = read_mapping_page(mapping, n, NULL); if (!IS_ERR(page)) { kmap(page); if (!PageChecked(page)) - ext2_check_page(page); + ext2_check_page(page, quiet); if (PageError(page)) goto fail; } @@ -292,7 +296,7 @@ ext2_readdir (struct file * filp, void * dirent, filldir_t filldir) for ( ; n < npages; n++, offset = 0) { char *kaddr, *limit; ext2_dirent *de; - struct page *page = ext2_get_page(inode, n); + struct page *page = ext2_get_page(inode, n, 0); if (IS_ERR(page)) { ext2_error(sb, __func__, @@ -361,6 +365,7 @@ struct ext2_dir_entry_2 * ext2_find_entry (struct inode * dir, struct page *page = NULL; struct ext2_inode_info *ei = EXT2_I(dir); ext2_dirent * de; + int dir_has_error = 0; if (npages == 0) goto out; @@ -374,7 +379,7 @@ struct ext2_dir_entry_2 * ext2_find_entry (struct inode * dir, n = start; do { char *kaddr; - page = ext2_get_page(dir, n); + page = ext2_get_page(dir, n, dir_has_error); if (!IS_ERR(page)) { kaddr = page_address(page); de = (ext2_dirent *) kaddr; @@ -391,7 +396,9 @@ struct ext2_dir_entry_2 * ext2_find_entry (struct inode * dir, de = ext2_next_entry(de); } ext2_put_page(page); - } + } else + dir_has_error = 1; + if (++n >= npages) n = 0; /* next page is past the blocks we've got */ @@ -414,7 +421,7 @@ found: struct ext2_dir_entry_2 * ext2_dotdot (struct inode *dir, struct page **p) { - struct page *page = ext2_get_page(dir, 0); + struct page *page = ext2_get_page(dir, 0, 0); ext2_dirent *de = NULL; if (!IS_ERR(page)) { @@ -487,7 +494,7 @@ int ext2_add_link (struct dentry *dentry, struct inode *inode) for (n = 0; n <= npages; n++) { char *dir_end; - page = ext2_get_page(dir, n); + page = ext2_get_page(dir, n, 0); err = PTR_ERR(page); if (IS_ERR(page)) goto out; @@ -655,14 +662,17 @@ int ext2_empty_dir (struct inode * inode) { struct page *page = NULL; unsigned long i, npages = dir_pages(inode); + int dir_has_error = 0; for (i = 0; i < npages; i++) { char *kaddr; ext2_dirent * de; - page = ext2_get_page(inode, i); + page = ext2_get_page(inode, i, dir_has_error); - if (IS_ERR(page)) + if (IS_ERR(page)) { + dir_has_error = 1; continue; + } kaddr = page_address(page); de = (ext2_dirent *)kaddr; diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c index 25adfc3c693a..d0ff0b8cf309 100644 --- a/fs/fs-writeback.c +++ b/fs/fs-writeback.c @@ -8,7 +8,7 @@ * pages against inodes. ie: data writeback. Writeout of the * inode itself is not handled here. * - * 10Apr2002 akpm@zip.com.au + * 10Apr2002 Andrew Morton * Split out of fs/inode.c * Additions for address_space-based writeback */ diff --git a/fs/hfs/catalog.c b/fs/hfs/catalog.c index ba851576ebb1..6d98f116ca03 100644 --- a/fs/hfs/catalog.c +++ b/fs/hfs/catalog.c @@ -190,6 +190,10 @@ int hfs_cat_find_brec(struct super_block *sb, u32 cnid, fd->search_key->cat.ParID = rec.thread.ParID; len = fd->search_key->cat.CName.len = rec.thread.CName.len; + if (len > HFS_NAMELEN) { + printk(KERN_ERR "hfs: bad catalog namelength\n"); + return -EIO; + } memcpy(fd->search_key->cat.CName.name, rec.thread.CName.name, len); return hfs_brec_find(fd); } diff --git a/fs/hfsplus/bitmap.c b/fs/hfsplus/bitmap.c index d128a25b74d2..ea30afc2a03c 100644 --- a/fs/hfsplus/bitmap.c +++ b/fs/hfsplus/bitmap.c @@ -32,6 +32,10 @@ int hfsplus_block_allocate(struct super_block *sb, u32 size, u32 offset, u32 *ma mutex_lock(&HFSPLUS_SB(sb).alloc_file->i_mutex); mapping = HFSPLUS_SB(sb).alloc_file->i_mapping; page = read_mapping_page(mapping, offset / PAGE_CACHE_BITS, NULL); + if (IS_ERR(page)) { + start = size; + goto out; + } pptr = kmap(page); curr = pptr + (offset & (PAGE_CACHE_BITS - 1)) / 32; i = offset % 32; @@ -73,6 +77,10 @@ int hfsplus_block_allocate(struct super_block *sb, u32 size, u32 offset, u32 *ma break; page = read_mapping_page(mapping, offset / PAGE_CACHE_BITS, NULL); + if (IS_ERR(page)) { + start = size; + goto out; + } curr = pptr = kmap(page); if ((size ^ offset) / PAGE_CACHE_BITS) end = pptr + PAGE_CACHE_BITS / 32; @@ -120,6 +128,10 @@ found: offset += PAGE_CACHE_BITS; page = read_mapping_page(mapping, offset / PAGE_CACHE_BITS, NULL); + if (IS_ERR(page)) { + start = size; + goto out; + } pptr = kmap(page); curr = pptr; end = pptr + PAGE_CACHE_BITS / 32; diff --git a/fs/hfsplus/catalog.c b/fs/hfsplus/catalog.c index ba117c445e78..f6874acb2cf2 100644 --- a/fs/hfsplus/catalog.c +++ b/fs/hfsplus/catalog.c @@ -168,6 +168,11 @@ int hfsplus_find_cat(struct super_block *sb, u32 cnid, return -EIO; } + if (be16_to_cpu(tmp.thread.nodeName.length) > 255) { + printk(KERN_ERR "hfs: catalog name length corrupted\n"); + return -EIO; + } + hfsplus_cat_build_key_uni(fd->search_key, be32_to_cpu(tmp.thread.parentID), &tmp.thread.nodeName); return hfs_brec_find(fd); diff --git a/fs/hfsplus/super.c b/fs/hfsplus/super.c index e834e578c93f..eb74531a0a8e 100644 --- a/fs/hfsplus/super.c +++ b/fs/hfsplus/super.c @@ -356,7 +356,7 @@ static int hfsplus_fill_super(struct super_block *sb, void *data, int silent) } else if (vhdr->attributes & cpu_to_be32(HFSPLUS_VOL_SOFTLOCK)) { printk(KERN_WARNING "hfs: Filesystem is marked locked, mounting read-only.\n"); sb->s_flags |= MS_RDONLY; - } else if (vhdr->attributes & cpu_to_be32(HFSPLUS_VOL_JOURNALED)) { + } else if ((vhdr->attributes & cpu_to_be32(HFSPLUS_VOL_JOURNALED)) && !(sb->s_flags & MS_RDONLY)) { printk(KERN_WARNING "hfs: write access to a journaled filesystem is not supported, " "use the force option at your own risk, mounting read-only.\n"); sb->s_flags |= MS_RDONLY; diff --git a/fs/mpage.c b/fs/mpage.c index dbcc7af76a15..552b80b3facc 100644 --- a/fs/mpage.c +++ b/fs/mpage.c @@ -6,7 +6,7 @@ * Contains functions related to preparing and submitting BIOs which contain * multiple pagecache pages. * - * 15May2002 akpm@zip.com.au + * 15May2002 Andrew Morton * Initial version * 27Jun2002 axboe@suse.de * use bio_add_page() to build bio's just the right size diff --git a/fs/partitions/acorn.c b/fs/partitions/acorn.c index 3d3e16631472..a97b477ac0fc 100644 --- a/fs/partitions/acorn.c +++ b/fs/partitions/acorn.c @@ -275,16 +275,6 @@ adfspart_check_ADFS(struct parsed_partitions *state, struct block_device *bdev) id = data[0x1fc] & 15; put_dev_sector(sect); -#ifdef CONFIG_BLK_DEV_MFM - if (MAJOR(bdev->bd_dev) == MFM_ACORN_MAJOR) { - extern void xd_set_geometry(struct block_device *, - unsigned char, unsigned char, unsigned int); - xd_set_geometry(bdev, dr->secspertrack, heads, 1); - invalidate_bh_lrus(); - truncate_inode_pages(bdev->bd_inode->i_mapping, 0); - } -#endif - /* * Work out start of non-adfs partition. */ diff --git a/fs/partitions/check.c b/fs/partitions/check.c index 7408227c49c9..fbeb2f372a93 100644 --- a/fs/partitions/check.c +++ b/fs/partitions/check.c @@ -538,10 +538,23 @@ int rescan_partitions(struct gendisk *disk, struct block_device *bdev) sector_t from = state->parts[p].from; if (!size) continue; + if (from >= get_capacity(disk)) { + printk(KERN_WARNING + "%s: p%d ignored, start %llu is behind the end of the disk\n", + disk->disk_name, p, (unsigned long long) from); + continue; + } if (from + size > get_capacity(disk)) { + /* + * we can not ignore partitions of broken tables + * created by for example camera firmware, but we + * limit them to the end of the disk to avoid + * creating invalid block devices + */ printk(KERN_WARNING - "%s: p%d exceeds device capacity\n", - disk->disk_name, p); + "%s: p%d size %llu limited to end of disk\n", + disk->disk_name, p, (unsigned long long) size); + size = get_capacity(disk) - from; } res = add_partition(disk, p, from, size, state->parts[p].flags); if (res) { diff --git a/fs/proc/proc_misc.c b/fs/proc/proc_misc.c index b675a49c1823..59ea42e1ef03 100644 --- a/fs/proc/proc_misc.c +++ b/fs/proc/proc_misc.c @@ -45,7 +45,6 @@ #include <linux/blkdev.h> #include <linux/hugetlb.h> #include <linux/jiffies.h> -#include <linux/sysrq.h> #include <linux/vmalloc.h> #include <linux/crash_dump.h> #include <linux/pid_namespace.h> @@ -704,28 +703,6 @@ static int execdomains_read_proc(char *page, char **start, off_t off, return proc_calc_metrics(page, start, off, count, eof, len); } -#ifdef CONFIG_MAGIC_SYSRQ -/* - * writing 'C' to /proc/sysrq-trigger is like sysrq-C - */ -static ssize_t write_sysrq_trigger(struct file *file, const char __user *buf, - size_t count, loff_t *ppos) -{ - if (count) { - char c; - - if (get_user(c, buf)) - return -EFAULT; - __handle_sysrq(c, NULL, 0); - } - return count; -} - -static const struct file_operations proc_sysrq_trigger_operations = { - .write = write_sysrq_trigger, -}; -#endif - #ifdef CONFIG_PROC_PAGE_MONITOR #define KPMSIZE sizeof(u64) #define KPMMASK (KPMSIZE - 1) @@ -934,7 +911,4 @@ void __init proc_misc_init(void) #ifdef CONFIG_PROC_VMCORE proc_vmcore = proc_create("vmcore", S_IRUSR, NULL, &proc_vmcore_operations); #endif -#ifdef CONFIG_MAGIC_SYSRQ - proc_create("sysrq-trigger", S_IWUSR, NULL, &proc_sysrq_trigger_operations); -#endif } diff --git a/fs/reiserfs/procfs.c b/fs/reiserfs/procfs.c index b9dbeeca7049..37173fa07d15 100644 --- a/fs/reiserfs/procfs.c +++ b/fs/reiserfs/procfs.c @@ -8,8 +8,6 @@ /* proc info support a la one created by Sizif@Botik.RU for PGC */ -/* $Id: procfs.c,v 1.1.8.2 2001/07/15 17:08:42 god Exp $ */ - #include <linux/module.h> #include <linux/time.h> #include <linux/seq_file.h> @@ -621,7 +619,6 @@ int reiserfs_global_version_in_proc(char *buffer, char **start, #endif /* - * $Log: procfs.c,v $ * Revision 1.1.8.2 2001/07/15 17:08:42 god * . use get_super() in procfs.c * . remove remove_save_link() from reiserfs_do_truncate() diff --git a/fs/reiserfs/xattr.c b/fs/reiserfs/xattr.c index bb3cb5b7cdb2..ad92461cbfc3 100644 --- a/fs/reiserfs/xattr.c +++ b/fs/reiserfs/xattr.c @@ -155,7 +155,7 @@ static struct dentry *get_xa_file_dentry(const struct inode *inode, xadir = open_xa_dir(inode, flags); if (IS_ERR(xadir)) { return ERR_CAST(xadir); - } else if (xadir && !xadir->d_inode) { + } else if (!xadir->d_inode) { dput(xadir); return ERR_PTR(-ENODATA); } diff --git a/include/acpi/acmacros.h b/include/acpi/acmacros.h index 57ab9e9d7593..74a9617776a8 100644 --- a/include/acpi/acmacros.h +++ b/include/acpi/acmacros.h @@ -467,7 +467,7 @@ struct acpi_integer_overlay { /* * If ACPI_GET_FUNCTION_NAME was not defined in the compiler-dependent header, * define it now. This is the case where there the compiler does not support - * a __FUNCTION__ macro or equivalent. + * a __func__ macro or equivalent. */ #ifndef ACPI_GET_FUNCTION_NAME #define ACPI_GET_FUNCTION_NAME _acpi_function_name @@ -475,12 +475,12 @@ struct acpi_integer_overlay { * The Name parameter should be the procedure name as a quoted string. * The function name is also used by the function exit macros below. * Note: (const char) is used to be compatible with the debug interfaces - * and macros such as __FUNCTION__. + * and macros such as __func__. */ #define ACPI_FUNCTION_NAME(name) static const char _acpi_function_name[] = #name; #else -/* Compiler supports __FUNCTION__ (or equivalent) -- Ignore this macro */ +/* Compiler supports __func__ (or equivalent) -- Ignore this macro */ #define ACPI_FUNCTION_NAME(name) #endif diff --git a/include/acpi/platform/acgcc.h b/include/acpi/platform/acgcc.h index 8996dba90cd9..8e2cdc57b197 100644 --- a/include/acpi/platform/acgcc.h +++ b/include/acpi/platform/acgcc.h @@ -46,7 +46,7 @@ /* Function name is used for debug output. Non-ANSI, compiler-dependent */ -#define ACPI_GET_FUNCTION_NAME __FUNCTION__ +#define ACPI_GET_FUNCTION_NAME __func__ /* * This macro is used to tag functions as "printf-like" because diff --git a/include/asm-generic/bug.h b/include/asm-generic/bug.h index edc6ba82e090..0f6dabd4b517 100644 --- a/include/asm-generic/bug.h +++ b/include/asm-generic/bug.h @@ -22,7 +22,7 @@ struct bug_entry { #ifndef HAVE_ARCH_BUG #define BUG() do { \ - printk("BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __FUNCTION__); \ + printk("BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \ panic("BUG!"); \ } while (0) #endif diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h index 0f99ad38b012..81797ec9ab29 100644 --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h @@ -35,11 +35,17 @@ struct module; * @label: for diagnostics * @dev: optional device providing the GPIOs * @owner: helps prevent removal of modules exporting active GPIOs + * @request: optional hook for chip-specific activation, such as + * enabling module power and clock; may sleep + * @free: optional hook for chip-specific deactivation, such as + * disabling module power and clock; may sleep * @direction_input: configures signal "offset" as input, or returns error * @get: returns value for signal "offset"; for output signals this * returns either the value actually sensed, or zero * @direction_output: configures signal "offset" as output, or returns error * @set: assigns output value for signal "offset" + * @to_irq: optional hook supporting non-static gpio_to_irq() mappings; + * implementation may not sleep * @dbg_show: optional routine to show contents in debugfs; default code * will be used when this is omitted, but custom code can show extra * state (such as pullup/pulldown configuration). @@ -61,10 +67,15 @@ struct module; * is calculated by subtracting @base from the gpio number. */ struct gpio_chip { - char *label; + const char *label; struct device *dev; struct module *owner; + int (*request)(struct gpio_chip *chip, + unsigned offset); + void (*free)(struct gpio_chip *chip, + unsigned offset); + int (*direction_input)(struct gpio_chip *chip, unsigned offset); int (*get)(struct gpio_chip *chip, @@ -73,6 +84,10 @@ struct gpio_chip { unsigned offset, int value); void (*set)(struct gpio_chip *chip, unsigned offset, int value); + + int (*to_irq)(struct gpio_chip *chip, + unsigned offset); + void (*dbg_show)(struct seq_file *s, struct gpio_chip *chip); int base; @@ -112,6 +127,7 @@ extern void __gpio_set_value(unsigned gpio, int value); extern int __gpio_cansleep(unsigned gpio); +extern int __gpio_to_irq(unsigned gpio); #ifdef CONFIG_GPIO_SYSFS diff --git a/include/asm-h8300/timer.h b/include/asm-h8300/timer.h new file mode 100644 index 000000000000..def80464d38f --- /dev/null +++ b/include/asm-h8300/timer.h @@ -0,0 +1,25 @@ +#ifndef __H8300_TIMER_H +#define __H8300_TIMER_H + +void h8300_timer_tick(void); +void h8300_timer_setup(void); +void h8300_gettod(unsigned int *year, unsigned int *mon, unsigned int *day, + unsigned int *hour, unsigned int *min, unsigned int *sec); + +#define TIMER_FREQ (CONFIG_CPU_CLOCK*10000) /* Timer input freq. */ + +#define calc_param(cnt, div, rate, limit) \ +do { \ + cnt = TIMER_FREQ / HZ; \ + for (div = 0; div < ARRAY_SIZE(divide_rate); div++) { \ + if (rate[div] == 0) \ + continue; \ + if ((cnt / rate[div]) > limit) \ + break; \ + } \ + if (div == ARRAY_SIZE(divide_rate)) \ + panic("Timer counter overflow"); \ + cnt /= divide_rate[div]; \ +} while(0) + +#endif diff --git a/include/asm-x86/es7000/apic.h b/include/asm-x86/es7000/apic.h index bd2c44d1f7ac..aae50c2fb303 100644 --- a/include/asm-x86/es7000/apic.h +++ b/include/asm-x86/es7000/apic.h @@ -171,7 +171,7 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) int new_apicid = cpu_to_logical_apicid(cpu); if (apicid_cluster(apicid) != apicid_cluster(new_apicid)){ - printk ("%s: Not a valid mask!\n",__FUNCTION__); + printk ("%s: Not a valid mask!\n", __func__); #if defined CONFIG_ES7000_CLUSTERED_APIC return 0xFF; #else diff --git a/include/asm-x86/iommu.h b/include/asm-x86/iommu.h index 546ad3110fea..961e746da977 100644 --- a/include/asm-x86/iommu.h +++ b/include/asm-x86/iommu.h @@ -8,7 +8,7 @@ extern int force_iommu, no_iommu; extern int iommu_detected; extern int dmar_disabled; -extern unsigned long iommu_num_pages(unsigned long addr, unsigned long len); +extern unsigned long iommu_nr_pages(unsigned long addr, unsigned long len); #ifdef CONFIG_GART_IOMMU extern int gart_iommu_aperture; diff --git a/include/asm-x86/summit/apic.h b/include/asm-x86/summit/apic.h index c5b2e4b10358..394b00bb5e72 100644 --- a/include/asm-x86/summit/apic.h +++ b/include/asm-x86/summit/apic.h @@ -160,7 +160,7 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) int new_apicid = cpu_to_logical_apicid(cpu); if (apicid_cluster(apicid) != apicid_cluster(new_apicid)){ - printk ("%s: Not a valid mask!\n",__FUNCTION__); + printk ("%s: Not a valid mask!\n", __func__); return 0xFF; } apicid = apicid | new_apicid; diff --git a/include/linux/Kbuild b/include/linux/Kbuild index 282a504bd1db..bf9aca548f14 100644 --- a/include/linux/Kbuild +++ b/include/linux/Kbuild @@ -107,6 +107,7 @@ header-y += keyctl.h header-y += limits.h header-y += magic.h header-y += major.h +header-y += map_to_7segment.h header-y += matroxfb.h header-y += meye.h header-y += minix_fs.h diff --git a/include/linux/aio.h b/include/linux/aio.h index 09b276c35227..f6b8cf99b596 100644 --- a/include/linux/aio.h +++ b/include/linux/aio.h @@ -204,12 +204,21 @@ struct kioctx { /* prototypes */ extern unsigned aio_max_size; +#ifdef CONFIG_AIO extern ssize_t wait_on_sync_kiocb(struct kiocb *iocb); extern int aio_put_req(struct kiocb *iocb); extern void kick_iocb(struct kiocb *iocb); extern int aio_complete(struct kiocb *iocb, long res, long res2); struct mm_struct; extern void exit_aio(struct mm_struct *mm); +#else +static inline ssize_t wait_on_sync_kiocb(struct kiocb *iocb) { return 0; } +static inline int aio_put_req(struct kiocb *iocb) { return 0; } +static inline void kick_iocb(struct kiocb *iocb) { } +static inline int aio_complete(struct kiocb *iocb, long res, long res2) { return 0; } +struct mm_struct; +static inline void exit_aio(struct mm_struct *mm) { } +#endif /* CONFIG_AIO */ #define io_wait_to_kiocb(wait) container_of(wait, struct kiocb, ki_wait) diff --git a/include/linux/auto_dev-ioctl.h b/include/linux/auto_dev-ioctl.h new file mode 100644 index 000000000000..f4d05ccd731f --- /dev/null +++ b/include/linux/auto_dev-ioctl.h @@ -0,0 +1,157 @@ +/* + * Copyright 2008 Red Hat, Inc. All rights reserved. + * Copyright 2008 Ian Kent <raven@themaw.net> + * + * This file is part of the Linux kernel and is made available under + * the terms of the GNU General Public License, version 2, or at your + * option, any later version, incorporated herein by reference. + */ + +#ifndef _LINUX_AUTO_DEV_IOCTL_H +#define _LINUX_AUTO_DEV_IOCTL_H + +#include <linux/types.h> + +#define AUTOFS_DEVICE_NAME "autofs" + +#define AUTOFS_DEV_IOCTL_VERSION_MAJOR 1 +#define AUTOFS_DEV_IOCTL_VERSION_MINOR 0 + +#define AUTOFS_DEVID_LEN 16 + +#define AUTOFS_DEV_IOCTL_SIZE sizeof(struct autofs_dev_ioctl) + +/* + * An ioctl interface for autofs mount point control. + */ + +/* + * All the ioctls use this structure. + * When sending a path size must account for the total length + * of the chunk of memory otherwise is is the size of the + * structure. + */ + +struct autofs_dev_ioctl { + __u32 ver_major; + __u32 ver_minor; + __u32 size; /* total size of data passed in + * including this struct */ + __s32 ioctlfd; /* automount command fd */ + + __u32 arg1; /* Command parameters */ + __u32 arg2; + + char path[0]; +}; + +static inline void init_autofs_dev_ioctl(struct autofs_dev_ioctl *in) +{ + in->ver_major = AUTOFS_DEV_IOCTL_VERSION_MAJOR; + in->ver_minor = AUTOFS_DEV_IOCTL_VERSION_MINOR; + in->size = sizeof(struct autofs_dev_ioctl); + in->ioctlfd = -1; + in->arg1 = 0; + in->arg2 = 0; + return; +} + +/* + * If you change this make sure you make the corresponding change + * to autofs-dev-ioctl.c:lookup_ioctl() + */ +enum { + /* Get various version info */ + AUTOFS_DEV_IOCTL_VERSION_CMD = 0x71, + AUTOFS_DEV_IOCTL_PROTOVER_CMD, + AUTOFS_DEV_IOCTL_PROTOSUBVER_CMD, + + /* Open mount ioctl fd */ + AUTOFS_DEV_IOCTL_OPENMOUNT_CMD, + + /* Close mount ioctl fd */ + AUTOFS_DEV_IOCTL_CLOSEMOUNT_CMD, + + /* Mount/expire status returns */ + AUTOFS_DEV_IOCTL_READY_CMD, + AUTOFS_DEV_IOCTL_FAIL_CMD, + + /* Activate/deactivate autofs mount */ + AUTOFS_DEV_IOCTL_SETPIPEFD_CMD, + AUTOFS_DEV_IOCTL_CATATONIC_CMD, + + /* Expiry timeout */ + AUTOFS_DEV_IOCTL_TIMEOUT_CMD, + + /* Get mount last requesting uid and gid */ + AUTOFS_DEV_IOCTL_REQUESTER_CMD, + + /* Check for eligible expire candidates */ + AUTOFS_DEV_IOCTL_EXPIRE_CMD, + + /* Request busy status */ + AUTOFS_DEV_IOCTL_ASKUMOUNT_CMD, + + /* Check if path is a mountpoint */ + AUTOFS_DEV_IOCTL_ISMOUNTPOINT_CMD, +}; + +#define AUTOFS_IOCTL 0x93 + +#define AUTOFS_DEV_IOCTL_VERSION \ + _IOWR(AUTOFS_IOCTL, \ + AUTOFS_DEV_IOCTL_VERSION_CMD, struct autofs_dev_ioctl) + +#define AUTOFS_DEV_IOCTL_PROTOVER \ + _IOWR(AUTOFS_IOCTL, \ + AUTOFS_DEV_IOCTL_PROTOVER_CMD, struct autofs_dev_ioctl) + +#define AUTOFS_DEV_IOCTL_PROTOSUBVER \ + _IOWR(AUTOFS_IOCTL, \ + AUTOFS_DEV_IOCTL_PROTOSUBVER_CMD, struct autofs_dev_ioctl) + +#define AUTOFS_DEV_IOCTL_OPENMOUNT \ + _IOWR(AUTOFS_IOCTL, \ + AUTOFS_DEV_IOCTL_OPENMOUNT_CMD, struct autofs_dev_ioctl) + +#define AUTOFS_DEV_IOCTL_CLOSEMOUNT \ + _IOWR(AUTOFS_IOCTL, \ + AUTOFS_DEV_IOCTL_CLOSEMOUNT_CMD, struct autofs_dev_ioctl) + +#define AUTOFS_DEV_IOCTL_READY \ + _IOWR(AUTOFS_IOCTL, \ + AUTOFS_DEV_IOCTL_READY_CMD, struct autofs_dev_ioctl) + +#define AUTOFS_DEV_IOCTL_FAIL \ + _IOWR(AUTOFS_IOCTL, \ + AUTOFS_DEV_IOCTL_FAIL_CMD, struct autofs_dev_ioctl) + +#define AUTOFS_DEV_IOCTL_SETPIPEFD \ + _IOWR(AUTOFS_IOCTL, \ + AUTOFS_DEV_IOCTL_SETPIPEFD_CMD, struct autofs_dev_ioctl) + +#define AUTOFS_DEV_IOCTL_CATATONIC \ + _IOWR(AUTOFS_IOCTL, \ + AUTOFS_DEV_IOCTL_CATATONIC_CMD, struct autofs_dev_ioctl) + +#define AUTOFS_DEV_IOCTL_TIMEOUT \ + _IOWR(AUTOFS_IOCTL, \ + AUTOFS_DEV_IOCTL_TIMEOUT_CMD, struct autofs_dev_ioctl) + +#define AUTOFS_DEV_IOCTL_REQUESTER \ + _IOWR(AUTOFS_IOCTL, \ + AUTOFS_DEV_IOCTL_REQUESTER_CMD, struct autofs_dev_ioctl) + +#define AUTOFS_DEV_IOCTL_EXPIRE \ + _IOWR(AUTOFS_IOCTL, \ + AUTOFS_DEV_IOCTL_EXPIRE_CMD, struct autofs_dev_ioctl) + +#define AUTOFS_DEV_IOCTL_ASKUMOUNT \ + _IOWR(AUTOFS_IOCTL, \ + AUTOFS_DEV_IOCTL_ASKUMOUNT_CMD, struct autofs_dev_ioctl) + +#define AUTOFS_DEV_IOCTL_ISMOUNTPOINT \ + _IOWR(AUTOFS_IOCTL, \ + AUTOFS_DEV_IOCTL_ISMOUNTPOINT_CMD, struct autofs_dev_ioctl) + +#endif /* _LINUX_AUTO_DEV_IOCTL_H */ diff --git a/include/linux/auto_fs4.h b/include/linux/auto_fs4.h index b785c6f8644d..2253716d4b92 100644 --- a/include/linux/auto_fs4.h +++ b/include/linux/auto_fs4.h @@ -23,12 +23,17 @@ #define AUTOFS_MIN_PROTO_VERSION 3 #define AUTOFS_MAX_PROTO_VERSION 5 -#define AUTOFS_PROTO_SUBVERSION 0 +#define AUTOFS_PROTO_SUBVERSION 1 /* Mask for expire behaviour */ #define AUTOFS_EXP_IMMEDIATE 1 #define AUTOFS_EXP_LEAVES 2 +#define AUTOFS_TYPE_ANY 0x0000 +#define AUTOFS_TYPE_INDIRECT 0x0001 +#define AUTOFS_TYPE_DIRECT 0x0002 +#define AUTOFS_TYPE_OFFSET 0x0004 + /* Daemon notification packet types */ enum autofs_notify { NFY_NONE, diff --git a/include/linux/binfmts.h b/include/linux/binfmts.h index 826f62350805..7394b5b349ff 100644 --- a/include/linux/binfmts.h +++ b/include/linux/binfmts.h @@ -36,6 +36,10 @@ struct linux_binprm{ unsigned long p; /* current top of mem */ unsigned int sh_bang:1, misc_bang:1; +#ifdef __alpha__ + unsigned int taso:1; +#endif + unsigned int recursion_depth; struct file * file; int e_uid, e_gid; kernel_cap_t cap_post_exec_permitted; @@ -58,6 +62,7 @@ struct linux_binprm{ #define BINPRM_FLAGS_EXECFD_BIT 1 #define BINPRM_FLAGS_EXECFD (1 << BINPRM_FLAGS_EXECFD_BIT) +#define BINPRM_MAX_RECURSION 4 /* * This structure defines the functions that are used to load the binary formats that diff --git a/include/linux/cgroup.h b/include/linux/cgroup.h index c98dd7cb7076..30934e4bfaab 100644 --- a/include/linux/cgroup.h +++ b/include/linux/cgroup.h @@ -326,7 +326,8 @@ struct cgroup_subsys { */ void (*mm_owner_changed)(struct cgroup_subsys *ss, struct cgroup *old, - struct cgroup *new); + struct cgroup *new, + struct task_struct *p); int subsys_id; int active; int disabled; diff --git a/include/linux/clk.h b/include/linux/clk.h index 5ca8c6fddb56..778777316ea4 100644 --- a/include/linux/clk.h +++ b/include/linux/clk.h @@ -35,6 +35,8 @@ struct clk; * clk_get may return different clock producers depending on @dev.) * * Drivers must assume that the clock source is not enabled. + * + * clk_get should not be called from within interrupt context. */ struct clk *clk_get(struct device *dev, const char *id); @@ -76,6 +78,8 @@ unsigned long clk_get_rate(struct clk *clk); * Note: drivers must ensure that all clk_enable calls made on this * clock source are balanced by clk_disable calls prior to calling * this function. + * + * clk_put should not be called from within interrupt context. */ void clk_put(struct clk *clk); diff --git a/include/linux/compat.h b/include/linux/compat.h index cf8d11cad5ae..f061a1ea1b74 100644 --- a/include/linux/compat.h +++ b/include/linux/compat.h @@ -78,7 +78,6 @@ typedef struct { compat_sigset_word sig[_COMPAT_NSIG_WORDS]; } compat_sigset_t; -extern int cp_compat_stat(struct kstat *, struct compat_stat __user *); extern int get_compat_timespec(struct timespec *, const struct compat_timespec __user *); extern int put_compat_timespec(const struct timespec *, struct compat_timespec __user *); @@ -235,6 +234,11 @@ extern int get_compat_itimerspec(struct itimerspec *dst, extern int put_compat_itimerspec(struct compat_itimerspec __user *dst, const struct itimerspec *src); +asmlinkage long compat_sys_gettimeofday(struct compat_timeval __user *tv, + struct timezone __user *tz); +asmlinkage long compat_sys_settimeofday(struct compat_timeval __user *tv, + struct timezone __user *tz); + asmlinkage long compat_sys_adjtimex(struct compat_timex __user *utp); extern int compat_printk(const char *fmt, ...); diff --git a/include/linux/ext2_fs.h b/include/linux/ext2_fs.h index 2efe7b863cff..78c775a83f7c 100644 --- a/include/linux/ext2_fs.h +++ b/include/linux/ext2_fs.h @@ -47,7 +47,7 @@ #ifdef EXT2FS_DEBUG # define ext2_debug(f, a...) { \ printk ("EXT2-fs DEBUG (%s, %d): %s:", \ - __FILE__, __LINE__, __FUNCTION__); \ + __FILE__, __LINE__, __func__); \ printk (f, ## a); \ } #else diff --git a/include/linux/ext3_fs.h b/include/linux/ext3_fs.h index 8120fa1bc235..159d9b476cd7 100644 --- a/include/linux/ext3_fs.h +++ b/include/linux/ext3_fs.h @@ -43,7 +43,7 @@ #define ext3_debug(f, a...) \ do { \ printk (KERN_DEBUG "EXT3-fs DEBUG (%s, %d): %s:", \ - __FILE__, __LINE__, __FUNCTION__); \ + __FILE__, __LINE__, __func__); \ printk (KERN_DEBUG f, ## a); \ } while (0) #else @@ -871,7 +871,7 @@ extern void ext3_update_dynamic_rev (struct super_block *sb); #define ext3_std_error(sb, errno) \ do { \ if ((errno)) \ - __ext3_std_error((sb), __FUNCTION__, (errno)); \ + __ext3_std_error((sb), __func__, (errno)); \ } while (0) /* diff --git a/include/linux/ext3_jbd.h b/include/linux/ext3_jbd.h index 8c43b13a02fe..cf82d519be40 100644 --- a/include/linux/ext3_jbd.h +++ b/include/linux/ext3_jbd.h @@ -137,17 +137,17 @@ int __ext3_journal_dirty_metadata(const char *where, handle_t *handle, struct buffer_head *bh); #define ext3_journal_get_undo_access(handle, bh) \ - __ext3_journal_get_undo_access(__FUNCTION__, (handle), (bh)) + __ext3_journal_get_undo_access(__func__, (handle), (bh)) #define ext3_journal_get_write_access(handle, bh) \ - __ext3_journal_get_write_access(__FUNCTION__, (handle), (bh)) + __ext3_journal_get_write_access(__func__, (handle), (bh)) #define ext3_journal_revoke(handle, blocknr, bh) \ - __ext3_journal_revoke(__FUNCTION__, (handle), (blocknr), (bh)) + __ext3_journal_revoke(__func__, (handle), (blocknr), (bh)) #define ext3_journal_get_create_access(handle, bh) \ - __ext3_journal_get_create_access(__FUNCTION__, (handle), (bh)) + __ext3_journal_get_create_access(__func__, (handle), (bh)) #define ext3_journal_dirty_metadata(handle, bh) \ - __ext3_journal_dirty_metadata(__FUNCTION__, (handle), (bh)) + __ext3_journal_dirty_metadata(__func__, (handle), (bh)) #define ext3_journal_forget(handle, bh) \ - __ext3_journal_forget(__FUNCTION__, (handle), (bh)) + __ext3_journal_forget(__func__, (handle), (bh)) int ext3_journal_dirty_data(handle_t *handle, struct buffer_head *bh); @@ -160,7 +160,7 @@ static inline handle_t *ext3_journal_start(struct inode *inode, int nblocks) } #define ext3_journal_stop(handle) \ - __ext3_journal_stop(__FUNCTION__, (handle)) + __ext3_journal_stop(__func__, (handle)) static inline handle_t *ext3_journal_current_handle(void) { diff --git a/include/linux/gameport.h b/include/linux/gameport.h index f64e29c0ef3f..0cd825f7363a 100644 --- a/include/linux/gameport.h +++ b/include/linux/gameport.h @@ -146,10 +146,11 @@ static inline void gameport_unpin_driver(struct gameport *gameport) mutex_unlock(&gameport->drv_mutex); } -void __gameport_register_driver(struct gameport_driver *drv, struct module *owner); -static inline void gameport_register_driver(struct gameport_driver *drv) +int __gameport_register_driver(struct gameport_driver *drv, + struct module *owner, const char *mod_name); +static inline int __must_check gameport_register_driver(struct gameport_driver *drv) { - __gameport_register_driver(drv, THIS_MODULE); + return __gameport_register_driver(drv, THIS_MODULE, KBUILD_MODNAME); } void gameport_unregister_driver(struct gameport_driver *drv); diff --git a/include/linux/gpio.h b/include/linux/gpio.h index 730a20b83576..e10c49a5b96e 100644 --- a/include/linux/gpio.h +++ b/include/linux/gpio.h @@ -8,6 +8,7 @@ #else +#include <linux/kernel.h> #include <linux/types.h> #include <linux/errno.h> @@ -32,6 +33,8 @@ static inline int gpio_request(unsigned gpio, const char *label) static inline void gpio_free(unsigned gpio) { + might_sleep(); + /* GPIO can never have been requested */ WARN_ON(1); } diff --git a/include/linux/i2o.h b/include/linux/i2o.h index 75ae6d8aba4f..4c4e57d1f19d 100644 --- a/include/linux/i2o.h +++ b/include/linux/i2o.h @@ -570,7 +570,6 @@ struct i2o_controller { #endif spinlock_t lock; /* lock for controller configuration */ - void *driver_data[I2O_MAX_DRIVERS]; /* storage for drivers */ }; @@ -691,289 +690,22 @@ static inline u32 i2o_dma_high(dma_addr_t dma_addr) }; #endif -/** - * i2o_sg_tablesize - Calculate the maximum number of elements in a SGL - * @c: I2O controller for which the calculation should be done - * @body_size: maximum body size used for message in 32-bit words. - * - * Return the maximum number of SG elements in a SG list. - */ -static inline u16 i2o_sg_tablesize(struct i2o_controller *c, u16 body_size) -{ - i2o_status_block *sb = c->status_block.virt; - u16 sg_count = - (sb->inbound_frame_size - sizeof(struct i2o_message) / 4) - - body_size; - - if (c->pae_support) { - /* - * for 64-bit a SG attribute element must be added and each - * SG element needs 12 bytes instead of 8. - */ - sg_count -= 2; - sg_count /= 3; - } else - sg_count /= 2; - - if (c->short_req && (sg_count > 8)) - sg_count = 8; - - return sg_count; -}; - -/** - * i2o_dma_map_single - Map pointer to controller and fill in I2O message. - * @c: I2O controller - * @ptr: pointer to the data which should be mapped - * @size: size of data in bytes - * @direction: DMA_TO_DEVICE / DMA_FROM_DEVICE - * @sg_ptr: pointer to the SG list inside the I2O message - * - * This function does all necessary DMA handling and also writes the I2O - * SGL elements into the I2O message. For details on DMA handling see also - * dma_map_single(). The pointer sg_ptr will only be set to the end of the - * SG list if the allocation was successful. - * - * Returns DMA address which must be checked for failures using - * dma_mapping_error(). - */ -static inline dma_addr_t i2o_dma_map_single(struct i2o_controller *c, void *ptr, +extern u16 i2o_sg_tablesize(struct i2o_controller *c, u16 body_size); +extern dma_addr_t i2o_dma_map_single(struct i2o_controller *c, void *ptr, size_t size, enum dma_data_direction direction, - u32 ** sg_ptr) -{ - u32 sg_flags; - u32 *mptr = *sg_ptr; - dma_addr_t dma_addr; - - switch (direction) { - case DMA_TO_DEVICE: - sg_flags = 0xd4000000; - break; - case DMA_FROM_DEVICE: - sg_flags = 0xd0000000; - break; - default: - return 0; - } - - dma_addr = dma_map_single(&c->pdev->dev, ptr, size, direction); - if (!dma_mapping_error(&c->pdev->dev, dma_addr)) { -#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64 - if ((sizeof(dma_addr_t) > 4) && c->pae_support) { - *mptr++ = cpu_to_le32(0x7C020002); - *mptr++ = cpu_to_le32(PAGE_SIZE); - } -#endif - - *mptr++ = cpu_to_le32(sg_flags | size); - *mptr++ = cpu_to_le32(i2o_dma_low(dma_addr)); -#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64 - if ((sizeof(dma_addr_t) > 4) && c->pae_support) - *mptr++ = cpu_to_le32(i2o_dma_high(dma_addr)); -#endif - *sg_ptr = mptr; - } - return dma_addr; -}; - -/** - * i2o_dma_map_sg - Map a SG List to controller and fill in I2O message. - * @c: I2O controller - * @sg: SG list to be mapped - * @sg_count: number of elements in the SG list - * @direction: DMA_TO_DEVICE / DMA_FROM_DEVICE - * @sg_ptr: pointer to the SG list inside the I2O message - * - * This function does all necessary DMA handling and also writes the I2O - * SGL elements into the I2O message. For details on DMA handling see also - * dma_map_sg(). The pointer sg_ptr will only be set to the end of the SG - * list if the allocation was successful. - * - * Returns 0 on failure or 1 on success. - */ -static inline int i2o_dma_map_sg(struct i2o_controller *c, + u32 ** sg_ptr); +extern int i2o_dma_map_sg(struct i2o_controller *c, struct scatterlist *sg, int sg_count, enum dma_data_direction direction, - u32 ** sg_ptr) -{ - u32 sg_flags; - u32 *mptr = *sg_ptr; - - switch (direction) { - case DMA_TO_DEVICE: - sg_flags = 0x14000000; - break; - case DMA_FROM_DEVICE: - sg_flags = 0x10000000; - break; - default: - return 0; - } - - sg_count = dma_map_sg(&c->pdev->dev, sg, sg_count, direction); - if (!sg_count) - return 0; - -#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64 - if ((sizeof(dma_addr_t) > 4) && c->pae_support) { - *mptr++ = cpu_to_le32(0x7C020002); - *mptr++ = cpu_to_le32(PAGE_SIZE); - } -#endif - - while (sg_count-- > 0) { - if (!sg_count) - sg_flags |= 0xC0000000; - *mptr++ = cpu_to_le32(sg_flags | sg_dma_len(sg)); - *mptr++ = cpu_to_le32(i2o_dma_low(sg_dma_address(sg))); -#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64 - if ((sizeof(dma_addr_t) > 4) && c->pae_support) - *mptr++ = cpu_to_le32(i2o_dma_high(sg_dma_address(sg))); -#endif - sg = sg_next(sg); - } - *sg_ptr = mptr; - - return 1; -}; - -/** - * i2o_dma_alloc - Allocate DMA memory - * @dev: struct device pointer to the PCI device of the I2O controller - * @addr: i2o_dma struct which should get the DMA buffer - * @len: length of the new DMA memory - * @gfp_mask: GFP mask - * - * Allocate a coherent DMA memory and write the pointers into addr. - * - * Returns 0 on success or -ENOMEM on failure. - */ -static inline int i2o_dma_alloc(struct device *dev, struct i2o_dma *addr, - size_t len, gfp_t gfp_mask) -{ - struct pci_dev *pdev = to_pci_dev(dev); - int dma_64 = 0; - - if ((sizeof(dma_addr_t) > 4) && (pdev->dma_mask == DMA_64BIT_MASK)) { - dma_64 = 1; - if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) - return -ENOMEM; - } - - addr->virt = dma_alloc_coherent(dev, len, &addr->phys, gfp_mask); - - if ((sizeof(dma_addr_t) > 4) && dma_64) - if (pci_set_dma_mask(pdev, DMA_64BIT_MASK)) - printk(KERN_WARNING "i2o: unable to set 64-bit DMA"); - - if (!addr->virt) - return -ENOMEM; - - memset(addr->virt, 0, len); - addr->len = len; - - return 0; -}; - -/** - * i2o_dma_free - Free DMA memory - * @dev: struct device pointer to the PCI device of the I2O controller - * @addr: i2o_dma struct which contains the DMA buffer - * - * Free a coherent DMA memory and set virtual address of addr to NULL. - */ -static inline void i2o_dma_free(struct device *dev, struct i2o_dma *addr) -{ - if (addr->virt) { - if (addr->phys) - dma_free_coherent(dev, addr->len, addr->virt, - addr->phys); - else - kfree(addr->virt); - addr->virt = NULL; - } -}; - -/** - * i2o_dma_realloc - Realloc DMA memory - * @dev: struct device pointer to the PCI device of the I2O controller - * @addr: pointer to a i2o_dma struct DMA buffer - * @len: new length of memory - * @gfp_mask: GFP mask - * - * If there was something allocated in the addr, free it first. If len > 0 - * than try to allocate it and write the addresses back to the addr - * structure. If len == 0 set the virtual address to NULL. - * - * Returns the 0 on success or negative error code on failure. - */ -static inline int i2o_dma_realloc(struct device *dev, struct i2o_dma *addr, - size_t len, gfp_t gfp_mask) -{ - i2o_dma_free(dev, addr); - - if (len) - return i2o_dma_alloc(dev, addr, len, gfp_mask); - - return 0; -}; - -/* - * i2o_pool_alloc - Allocate an slab cache and mempool - * @mempool: pointer to struct i2o_pool to write data into. - * @name: name which is used to identify cache - * @size: size of each object - * @min_nr: minimum number of objects - * - * First allocates a slab cache with name and size. Then allocates a - * mempool which uses the slab cache for allocation and freeing. - * - * Returns 0 on success or negative error code on failure. - */ -static inline int i2o_pool_alloc(struct i2o_pool *pool, const char *name, - size_t size, int min_nr) -{ - pool->name = kmalloc(strlen(name) + 1, GFP_KERNEL); - if (!pool->name) - goto exit; - strcpy(pool->name, name); - - pool->slab = - kmem_cache_create(pool->name, size, 0, SLAB_HWCACHE_ALIGN, NULL); - if (!pool->slab) - goto free_name; - - pool->mempool = mempool_create_slab_pool(min_nr, pool->slab); - if (!pool->mempool) - goto free_slab; - - return 0; - - free_slab: - kmem_cache_destroy(pool->slab); - - free_name: - kfree(pool->name); - - exit: - return -ENOMEM; -}; - -/* - * i2o_pool_free - Free slab cache and mempool again - * @mempool: pointer to struct i2o_pool which should be freed - * - * Note that you have to return all objects to the mempool again before - * calling i2o_pool_free(). - */ -static inline void i2o_pool_free(struct i2o_pool *pool) -{ - mempool_destroy(pool->mempool); - kmem_cache_destroy(pool->slab); - kfree(pool->name); -}; - + u32 ** sg_ptr); +extern int i2o_dma_alloc(struct device *dev, struct i2o_dma *addr, size_t len); +extern void i2o_dma_free(struct device *dev, struct i2o_dma *addr); +extern int i2o_dma_realloc(struct device *dev, struct i2o_dma *addr, + size_t len); +extern int i2o_pool_alloc(struct i2o_pool *pool, const char *name, + size_t size, int min_nr); +extern void i2o_pool_free(struct i2o_pool *pool); /* I2O driver (OSM) functions */ extern int i2o_driver_register(struct i2o_driver *); extern void i2o_driver_unregister(struct i2o_driver *); diff --git a/include/linux/icmpv6.h b/include/linux/icmpv6.h index 03067443198a..a93a8dd33118 100644 --- a/include/linux/icmpv6.h +++ b/include/linux/icmpv6.h @@ -40,16 +40,18 @@ struct icmp6hdr { struct icmpv6_nd_ra { __u8 hop_limit; #if defined(__LITTLE_ENDIAN_BITFIELD) - __u8 reserved:4, + __u8 reserved:3, router_pref:2, + home_agent:1, other:1, managed:1; #elif defined(__BIG_ENDIAN_BITFIELD) __u8 managed:1, other:1, + home_agent:1, router_pref:2, - reserved:4; + reserved:3; #else #error "Please fix <asm/byteorder.h>" #endif diff --git a/include/linux/init.h b/include/linux/init.h index 93538b696e3d..ad63824460e3 100644 --- a/include/linux/init.h +++ b/include/linux/init.h @@ -233,9 +233,6 @@ struct obs_kernel_param { __attribute__((aligned((sizeof(long))))) \ = { __setup_str_##unique_id, fn, early } -#define __setup_null_param(str, unique_id) \ - __setup_param(str, unique_id, NULL, 0) - #define __setup(str, fn) \ __setup_param(str, fn, fn, 0) @@ -296,7 +293,6 @@ void __init parse_early_param(void); void cleanup_module(void) __attribute__((alias(#exitfn))); #define __setup_param(str, unique_id, fn) /* nothing */ -#define __setup_null_param(str, unique_id) /* nothing */ #define __setup(str, func) /* nothing */ #endif diff --git a/include/linux/input.h b/include/linux/input.h index a5802c9c81a4..b86fb5581ce6 100644 --- a/include/linux/input.h +++ b/include/linux/input.h @@ -577,9 +577,22 @@ struct input_absinfo { #define KEY_BRL_DOT9 0x1f9 #define KEY_BRL_DOT10 0x1fa +#define KEY_NUMERIC_0 0x200 /* used by phones, remote controls, */ +#define KEY_NUMERIC_1 0x201 /* and other keypads */ +#define KEY_NUMERIC_2 0x202 +#define KEY_NUMERIC_3 0x203 +#define KEY_NUMERIC_4 0x204 +#define KEY_NUMERIC_5 0x205 +#define KEY_NUMERIC_6 0x206 +#define KEY_NUMERIC_7 0x207 +#define KEY_NUMERIC_8 0x208 +#define KEY_NUMERIC_9 0x209 +#define KEY_NUMERIC_STAR 0x20a +#define KEY_NUMERIC_POUND 0x20b + /* We avoid low common keys in module aliases so they don't get huge. */ #define KEY_MIN_INTERESTING KEY_MUTE -#define KEY_MAX 0x1ff +#define KEY_MAX 0x2ff #define KEY_CNT (KEY_MAX+1) /* diff --git a/include/linux/iommu-helper.h b/include/linux/iommu-helper.h index a6d0586e2bf7..3b068e5b5671 100644 --- a/include/linux/iommu-helper.h +++ b/include/linux/iommu-helper.h @@ -23,4 +23,7 @@ extern unsigned long iommu_area_alloc(unsigned long *map, unsigned long size, extern void iommu_area_free(unsigned long *map, unsigned long start, unsigned int nr); +extern unsigned long iommu_num_pages(unsigned long addr, unsigned long len, + unsigned long io_page_size); + #endif diff --git a/include/linux/ioport.h b/include/linux/ioport.h index ee9bcc6f32b6..0dde77272d7a 100644 --- a/include/linux/ioport.h +++ b/include/linux/ioport.h @@ -34,7 +34,8 @@ struct resource_list { */ #define IORESOURCE_BITS 0x000000ff /* Bus-specific bits */ -#define IORESOURCE_IO 0x00000100 /* Resource type */ +#define IORESOURCE_TYPE_BITS 0x00000f00 /* Resource type */ +#define IORESOURCE_IO 0x00000100 #define IORESOURCE_MEM 0x00000200 #define IORESOURCE_IRQ 0x00000400 #define IORESOURCE_DMA 0x00000800 @@ -126,6 +127,10 @@ static inline resource_size_t resource_size(struct resource *res) { return res->end - res->start + 1; } +static inline unsigned long resource_type(struct resource *res) +{ + return res->flags & IORESOURCE_TYPE_BITS; +} /* Convenience shorthand with allocation */ #define request_region(start,n,name) __request_region(&ioport_resource, (start), (n), (name)) diff --git a/include/linux/jbd.h b/include/linux/jbd.h index 07a9b52a2654..7ebbcb1c9ba4 100644 --- a/include/linux/jbd.h +++ b/include/linux/jbd.h @@ -61,7 +61,7 @@ extern u8 journal_enable_debug; do { \ if ((n) <= journal_enable_debug) { \ printk (KERN_DEBUG "(%s, %d): %s: ", \ - __FILE__, __LINE__, __FUNCTION__); \ + __FILE__, __LINE__, __func__); \ printk (f, ## a); \ } \ } while (0) @@ -984,7 +984,7 @@ extern int cleanup_journal_tail(journal_t *); #define jbd_ENOSYS() \ do { \ - printk (KERN_ERR "JBD unimplemented function %s\n", __FUNCTION__); \ + printk (KERN_ERR "JBD unimplemented function %s\n", __func__); \ current->state = TASK_UNINTERRUPTIBLE; \ schedule(); \ } while (1) diff --git a/include/linux/jbd2.h b/include/linux/jbd2.h index d2e91ea998fd..463d6f10b64f 100644 --- a/include/linux/jbd2.h +++ b/include/linux/jbd2.h @@ -61,7 +61,7 @@ extern u8 jbd2_journal_enable_debug; do { \ if ((n) <= jbd2_journal_enable_debug) { \ printk (KERN_DEBUG "(%s, %d): %s: ", \ - __FILE__, __LINE__, __FUNCTION__); \ + __FILE__, __LINE__, __func__); \ printk (f, ## a); \ } \ } while (0) @@ -1143,7 +1143,7 @@ extern int jbd2_cleanup_journal_tail(journal_t *); #define jbd_ENOSYS() \ do { \ - printk (KERN_ERR "JBD unimplemented function %s\n", __FUNCTION__); \ + printk (KERN_ERR "JBD unimplemented function %s\n", __func__); \ current->state = TASK_UNINTERRUPTIBLE; \ schedule(); \ } while (1) diff --git a/include/linux/journal-head.h b/include/linux/journal-head.h index 8a62d1e84b9b..bb70ebb6a2d5 100644 --- a/include/linux/journal-head.h +++ b/include/linux/journal-head.h @@ -3,7 +3,7 @@ * * buffer_head fields for JBD * - * 27 May 2001 Andrew Morton <akpm@digeo.com> + * 27 May 2001 Andrew Morton * Created - pulled out of fs.h */ diff --git a/include/linux/kallsyms.h b/include/linux/kallsyms.h index b96144887444..f3fe34391d8e 100644 --- a/include/linux/kallsyms.h +++ b/include/linux/kallsyms.h @@ -93,12 +93,10 @@ static inline void print_symbol(const char *fmt, unsigned long addr) } /* - * Pretty-print a function pointer. - * - * ia64 and ppc64 function pointers are really function descriptors, - * which contain a pointer the real address. + * Pretty-print a function pointer. This function is deprecated. + * Please use the "%pF" vsprintf format instead. */ -static inline void print_fn_descriptor_symbol(const char *fmt, void *addr) +static inline void __deprecated print_fn_descriptor_symbol(const char *fmt, void *addr) { #if defined(CONFIG_IA64) || defined(CONFIG_PPC64) addr = *(void **)addr; diff --git a/include/linux/kernel.h b/include/linux/kernel.h index 75d81f157d2e..e971c55f45ac 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -235,9 +235,10 @@ extern int oops_in_progress; /* If set, an oops, panic(), BUG() or die() is in extern int panic_timeout; extern int panic_on_oops; extern int panic_on_unrecovered_nmi; -extern int tainted; extern const char *print_tainted(void); -extern void add_taint(unsigned); +extern void add_taint(unsigned flag); +extern int test_taint(unsigned flag); +extern unsigned long get_taint(void); extern int root_mountflags; /* Values used for system_state */ @@ -250,16 +251,16 @@ extern enum system_states { SYSTEM_SUSPEND_DISK, } system_state; -#define TAINT_PROPRIETARY_MODULE (1<<0) -#define TAINT_FORCED_MODULE (1<<1) -#define TAINT_UNSAFE_SMP (1<<2) -#define TAINT_FORCED_RMMOD (1<<3) -#define TAINT_MACHINE_CHECK (1<<4) -#define TAINT_BAD_PAGE (1<<5) -#define TAINT_USER (1<<6) -#define TAINT_DIE (1<<7) -#define TAINT_OVERRIDDEN_ACPI_TABLE (1<<8) -#define TAINT_WARN (1<<9) +#define TAINT_PROPRIETARY_MODULE 0 +#define TAINT_FORCED_MODULE 1 +#define TAINT_UNSAFE_SMP 2 +#define TAINT_FORCED_RMMOD 3 +#define TAINT_MACHINE_CHECK 4 +#define TAINT_BAD_PAGE 5 +#define TAINT_USER 6 +#define TAINT_DIE 7 +#define TAINT_OVERRIDDEN_ACPI_TABLE 8 +#define TAINT_WARN 9 extern void dump_stack(void) __cold; diff --git a/include/linux/kmod.h b/include/linux/kmod.h index a1a91577813c..92213a9194e1 100644 --- a/include/linux/kmod.h +++ b/include/linux/kmod.h @@ -99,4 +99,7 @@ struct file; extern int call_usermodehelper_pipe(char *path, char *argv[], char *envp[], struct file **filp); +extern int usermodehelper_disable(void); +extern void usermodehelper_enable(void); + #endif /* __LINUX_KMOD_H__ */ diff --git a/drivers/input/misc/map_to_7segment.h b/include/linux/map_to_7segment.h index a424094d9fe2..7df8432c4402 100644 --- a/drivers/input/misc/map_to_7segment.h +++ b/include/linux/map_to_7segment.h @@ -1,6 +1,4 @@ /* - * drivers/usb/input/map_to_7segment.h - * * Copyright (c) 2005 Henk Vergonet <Henk.Vergonet@gmail.com> * * This program is free software; you can redistribute it and/or @@ -36,7 +34,7 @@ * Usage: * * Register a map variable, and fill it with a character set: - * static SEG7_DEFAULT_MAP(map_seg7); + * static SEG7_DEFAULT_MAP(map_seg7); * * * Then use for conversion: diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h index ec612e66391c..516d955ab8a1 100644 --- a/include/linux/mfd/tmio.h +++ b/include/linux/mfd/tmio.h @@ -1,6 +1,8 @@ #ifndef MFD_TMIO_H #define MFD_TMIO_H +#include <linux/fb.h> + #define tmio_ioread8(addr) readb(addr) #define tmio_ioread16(addr) readw(addr) #define tmio_ioread16_rep(r, b, l) readsw(r, b, l) @@ -25,4 +27,21 @@ struct tmio_nand_data { unsigned int num_partitions; }; +#define FBIO_TMIO_ACC_WRITE 0x7C639300 +#define FBIO_TMIO_ACC_SYNC 0x7C639301 + +struct tmio_fb_data { + int (*lcd_set_power)(struct platform_device *fb_dev, + bool on); + int (*lcd_mode)(struct platform_device *fb_dev, + const struct fb_videomode *mode); + int num_modes; + struct fb_videomode *modes; + + /* in mm: size of screen */ + int height; + int width; +}; + + #endif diff --git a/include/linux/mod_devicetable.h b/include/linux/mod_devicetable.h index d6a3f47e95cb..eb71b45fdf5a 100644 --- a/include/linux/mod_devicetable.h +++ b/include/linux/mod_devicetable.h @@ -284,7 +284,7 @@ struct pcmcia_device_id { /* Input */ #define INPUT_DEVICE_ID_EV_MAX 0x1f #define INPUT_DEVICE_ID_KEY_MIN_INTERESTING 0x71 -#define INPUT_DEVICE_ID_KEY_MAX 0x1ff +#define INPUT_DEVICE_ID_KEY_MAX 0x2ff #define INPUT_DEVICE_ID_REL_MAX 0x0f #define INPUT_DEVICE_ID_ABS_MAX 0x3f #define INPUT_DEVICE_ID_MSC_MAX 0x07 diff --git a/include/linux/mount.h b/include/linux/mount.h index 30a1d63b6fb5..cab2a85e2ee8 100644 --- a/include/linux/mount.h +++ b/include/linux/mount.h @@ -5,8 +5,6 @@ * * Author: Marco van Wieringen <mvw@planets.elm.net> * - * Version: $Id: mount.h,v 2.0 1996/11/17 16:48:14 mvw Exp mvw $ - * */ #ifndef _LINUX_MOUNT_H #define _LINUX_MOUNT_H diff --git a/include/linux/netfilter/nfnetlink.h b/include/linux/netfilter/nfnetlink.h index 0d8424f76899..7d8e0455ccac 100644 --- a/include/linux/netfilter/nfnetlink.h +++ b/include/linux/netfilter/nfnetlink.h @@ -78,6 +78,9 @@ extern int nfnetlink_send(struct sk_buff *skb, u32 pid, unsigned group, int echo); extern int nfnetlink_unicast(struct sk_buff *skb, u_int32_t pid, int flags); +extern void nfnl_lock(void); +extern void nfnl_unlock(void); + #define MODULE_ALIAS_NFNL_SUBSYS(subsys) \ MODULE_ALIAS("nfnetlink-subsys-" __stringify(subsys)) diff --git a/include/linux/parport.h b/include/linux/parport.h index 6a0d7cdb5774..e1f83c5065c5 100644 --- a/include/linux/parport.h +++ b/include/linux/parport.h @@ -1,5 +1,3 @@ -/* $Id: parport.h,v 1.1 1998/05/17 10:57:52 andrea Exp andrea $ */ - /* * Any part of this program may be used in documents licensed under * the GNU Free Documentation License, Version 1.1 or any later version diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 1176f1f177e2..8edddc240e4f 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -587,6 +587,7 @@ #define PCI_DEVICE_ID_MATROX_G200_PCI 0x0520 #define PCI_DEVICE_ID_MATROX_G200_AGP 0x0521 #define PCI_DEVICE_ID_MATROX_G400 0x0525 +#define PCI_DEVICE_ID_MATROX_G200EV_PCI 0x0530 #define PCI_DEVICE_ID_MATROX_G550 0x2527 #define PCI_DEVICE_ID_MATROX_VIA 0x4536 diff --git a/include/linux/pid_namespace.h b/include/linux/pid_namespace.h index 1af82c4e17d4..d82fe825d62f 100644 --- a/include/linux/pid_namespace.h +++ b/include/linux/pid_namespace.h @@ -84,12 +84,6 @@ static inline struct pid_namespace *task_active_pid_ns(struct task_struct *tsk) return tsk->nsproxy->pid_ns; } -static inline struct task_struct *task_child_reaper(struct task_struct *tsk) -{ - BUG_ON(tsk != current); - return tsk->nsproxy->pid_ns->child_reaper; -} - void pidhash_init(void); void pidmap_init(void); diff --git a/include/linux/pm.h b/include/linux/pm.h index 4dcce54b6d76..42de4003c4ee 100644 --- a/include/linux/pm.h +++ b/include/linux/pm.h @@ -419,7 +419,7 @@ extern void __suspend_report_result(const char *function, void *fn, int ret); #define suspend_report_result(fn, ret) \ do { \ - __suspend_report_result(__FUNCTION__, fn, ret); \ + __suspend_report_result(__func__, fn, ret); \ } while (0) #else /* !CONFIG_PM_SLEEP */ diff --git a/include/linux/pnp.h b/include/linux/pnp.h index be764e514e35..53b70fd1d9a5 100644 --- a/include/linux/pnp.h +++ b/include/linux/pnp.h @@ -22,9 +22,11 @@ struct pnp_dev; * Resource Management */ #ifdef CONFIG_PNP -struct resource *pnp_get_resource(struct pnp_dev *, unsigned int, unsigned int); +struct resource *pnp_get_resource(struct pnp_dev *dev, unsigned long type, + unsigned int num); #else -static inline struct resource *pnp_get_resource(struct pnp_dev *dev, unsigned int type, unsigned int num) +static inline struct resource *pnp_get_resource(struct pnp_dev *dev, + unsigned long type, unsigned int num) { return NULL; } diff --git a/include/linux/profile.h b/include/linux/profile.h index 7e7087239af5..570045053ce9 100644 --- a/include/linux/profile.h +++ b/include/linux/profile.h @@ -35,7 +35,9 @@ enum profile_type { extern int prof_on __read_mostly; /* init basic kernel profiler */ -void __init profile_init(void); +int profile_init(void); +int profile_setup(char *str); +int create_proc_profile(void); void profile_tick(int type); /* @@ -84,9 +86,9 @@ struct pt_regs; #define prof_on 0 -static inline void profile_init(void) +static inline int profile_init(void) { - return; + return 0; } static inline void profile_tick(int type) diff --git a/include/linux/quota.h b/include/linux/quota.h index 376a05048bc5..40401b554484 100644 --- a/include/linux/quota.h +++ b/include/linux/quota.h @@ -28,8 +28,6 @@ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. - * - * Version: $Id: quota.h,v 2.0 1996/11/17 16:48:14 mvw Exp mvw $ */ #ifndef _LINUX_QUOTA_ diff --git a/include/linux/quotaops.h b/include/linux/quotaops.h index ca6b9b5c8d52..a558a4c1d35a 100644 --- a/include/linux/quotaops.h +++ b/include/linux/quotaops.h @@ -3,9 +3,6 @@ * macros expand to the right source-code. * * Author: Marco van Wieringen <mvw@planets.elm.net> - * - * Version: $Id: quotaops.h,v 1.2 1998/01/15 16:22:26 ecd Exp $ - * */ #ifndef _LINUX_QUOTAOPS_ #define _LINUX_QUOTAOPS_ diff --git a/include/linux/raid/linear.h b/include/linux/raid/linear.h index 7e375111d007..f38b9c586afb 100644 --- a/include/linux/raid/linear.h +++ b/include/linux/raid/linear.h @@ -5,8 +5,8 @@ struct dev_info { mdk_rdev_t *rdev; - sector_t size; - sector_t offset; + sector_t num_sectors; + sector_t start_sector; }; typedef struct dev_info dev_info_t; @@ -15,9 +15,11 @@ struct linear_private_data { struct linear_private_data *prev; /* earlier version */ dev_info_t **hash_table; - sector_t hash_spacing; + sector_t spacing; sector_t array_sectors; - int preshift; /* shift before dividing by hash_spacing */ + int sector_shift; /* shift before dividing + * by spacing + */ dev_info_t disks[0]; }; diff --git a/include/linux/raid/md.h b/include/linux/raid/md.h index dc0e3fcb9f28..82bea14cae1a 100644 --- a/include/linux/raid/md.h +++ b/include/linux/raid/md.h @@ -19,27 +19,7 @@ #define _MD_H #include <linux/blkdev.h> -#include <linux/major.h> -#include <linux/ioctl.h> -#include <linux/types.h> -#include <linux/bitops.h> -#include <linux/module.h> -#include <linux/hdreg.h> -#include <linux/proc_fs.h> #include <linux/seq_file.h> -#include <linux/smp_lock.h> -#include <linux/delay.h> -#include <net/checksum.h> -#include <linux/random.h> -#include <linux/kernel_stat.h> -#include <asm/io.h> -#include <linux/completion.h> -#include <linux/mempool.h> -#include <linux/list.h> -#include <linux/reboot.h> -#include <linux/vmalloc.h> -#include <linux/blkpg.h> -#include <linux/bio.h> /* * 'md_p.h' holds the 'physical' layout of RAID devices @@ -74,19 +54,17 @@ extern int mdp_major; -extern int register_md_personality (struct mdk_personality *p); -extern int unregister_md_personality (struct mdk_personality *p); -extern mdk_thread_t * md_register_thread (void (*run) (mddev_t *mddev), +extern int register_md_personality(struct mdk_personality *p); +extern int unregister_md_personality(struct mdk_personality *p); +extern mdk_thread_t * md_register_thread(void (*run) (mddev_t *mddev), mddev_t *mddev, const char *name); -extern void md_unregister_thread (mdk_thread_t *thread); +extern void md_unregister_thread(mdk_thread_t *thread); extern void md_wakeup_thread(mdk_thread_t *thread); extern void md_check_recovery(mddev_t *mddev); extern void md_write_start(mddev_t *mddev, struct bio *bi); extern void md_write_end(mddev_t *mddev); -extern void md_handle_safemode(mddev_t *mddev); extern void md_done_sync(mddev_t *mddev, int blocks, int ok); -extern void md_error (mddev_t *mddev, mdk_rdev_t *rdev); -extern void md_unplug_mddev(mddev_t *mddev); +extern void md_error(mddev_t *mddev, mdk_rdev_t *rdev); extern void md_super_write(mddev_t *mddev, mdk_rdev_t *rdev, sector_t sector, int size, struct page *page); diff --git a/include/linux/reiserfs_fs.h b/include/linux/reiserfs_fs.h index e9963af16cda..bc5114d35e99 100644 --- a/include/linux/reiserfs_fs.h +++ b/include/linux/reiserfs_fs.h @@ -87,7 +87,7 @@ void reiserfs_warning(struct super_block *s, const char *fmt, ...); if( !( cond ) ) \ reiserfs_panic( NULL, "reiserfs[%i]: assertion " scond " failed at " \ __FILE__ ":%i:%s: " format "\n", \ - in_interrupt() ? -1 : task_pid_nr(current), __LINE__ , __FUNCTION__ , ##args ) + in_interrupt() ? -1 : task_pid_nr(current), __LINE__ , __func__ , ##args ) #define RASSERT(cond, format, args...) __RASSERT(cond, #cond, format, ##args) diff --git a/include/linux/rtmutex.h b/include/linux/rtmutex.h index 382bb7951166..f19b00b7d530 100644 --- a/include/linux/rtmutex.h +++ b/include/linux/rtmutex.h @@ -54,7 +54,7 @@ struct hrtimer_sleeper; #ifdef CONFIG_DEBUG_RT_MUTEXES # define __DEBUG_RT_MUTEX_INITIALIZER(mutexname) \ , .name = #mutexname, .file = __FILE__, .line = __LINE__ -# define rt_mutex_init(mutex) __rt_mutex_init(mutex, __FUNCTION__) +# define rt_mutex_init(mutex) __rt_mutex_init(mutex, __func__) extern void rt_mutex_debug_task_free(struct task_struct *tsk); #else # define __DEBUG_RT_MUTEX_INITIALIZER(mutexname) diff --git a/include/linux/spi/orion_spi.h b/include/linux/spi/orion_spi.h index b4d9fa6f797c..decf6d8c77b7 100644 --- a/include/linux/spi/orion_spi.h +++ b/include/linux/spi/orion_spi.h @@ -11,6 +11,7 @@ struct orion_spi_info { u32 tclk; /* no <linux/clk.h> support yet */ + u32 enable_clock_fix; }; diff --git a/include/linux/swiotlb.h b/include/linux/swiotlb.h new file mode 100644 index 000000000000..b18ec5533e8c --- /dev/null +++ b/include/linux/swiotlb.h @@ -0,0 +1,83 @@ +#ifndef __LINUX_SWIOTLB_H +#define __LINUX_SWIOTLB_H + +#include <linux/types.h> + +struct device; +struct dma_attrs; +struct scatterlist; + +extern void +swiotlb_init(void); + +extern void +*swiotlb_alloc_coherent(struct device *hwdev, size_t size, + dma_addr_t *dma_handle, gfp_t flags); + +extern void +swiotlb_free_coherent(struct device *hwdev, size_t size, + void *vaddr, dma_addr_t dma_handle); + +extern dma_addr_t +swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir); + +extern void +swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, + size_t size, int dir); + +extern dma_addr_t +swiotlb_map_single_attrs(struct device *hwdev, void *ptr, size_t size, + int dir, struct dma_attrs *attrs); + +extern void +swiotlb_unmap_single_attrs(struct device *hwdev, dma_addr_t dev_addr, + size_t size, int dir, struct dma_attrs *attrs); + +extern int +swiotlb_map_sg(struct device *hwdev, struct scatterlist *sg, int nents, + int direction); + +extern void +swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nents, + int direction); + +extern int +swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems, + int dir, struct dma_attrs *attrs); + +extern void +swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, + int nelems, int dir, struct dma_attrs *attrs); + +extern void +swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, + size_t size, int dir); + +extern void +swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, + int nelems, int dir); + +extern void +swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, + size_t size, int dir); + +extern void +swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, + int nelems, int dir); + +extern void +swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr, + unsigned long offset, size_t size, int dir); + +extern void +swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr, + unsigned long offset, size_t size, + int dir); + +extern int +swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr); + +extern int +swiotlb_dma_supported(struct device *hwdev, u64 mask); + +#endif /* __LINUX_SWIOTLB_H */ diff --git a/include/linux/sysctl.h b/include/linux/sysctl.h index d0437f36921f..39d471d1163b 100644 --- a/include/linux/sysctl.h +++ b/include/linux/sysctl.h @@ -972,7 +972,7 @@ extern int sysctl_perm(struct ctl_table_root *root, typedef struct ctl_table ctl_table; -typedef int ctl_handler (struct ctl_table *table, int __user *name, int nlen, +typedef int ctl_handler (struct ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen); diff --git a/include/linux/task_io_accounting.h b/include/linux/task_io_accounting.h index 5e88afc9a2fb..bdf855c2856f 100644 --- a/include/linux/task_io_accounting.h +++ b/include/linux/task_io_accounting.h @@ -5,7 +5,7 @@ * Don't include this header file directly - it is designed to be dragged in via * sched.h. * - * Blame akpm@osdl.org for all this. + * Blame Andrew Morton for all this. */ struct task_io_accounting { diff --git a/include/linux/telephony.h b/include/linux/telephony.h index 0d0cf2a1e7bc..5b2b6261f193 100644 --- a/include/linux/telephony.h +++ b/include/linux/telephony.h @@ -28,10 +28,6 @@ * ON AN "AS IS" BASIS, AND QUICKNET TECHNOLOGIES, INC. HAS NO OBLIGATION * TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS. * - * Version: $Revision: 4.2 $ - * - * $Id: telephony.h,v 4.2 2001/08/06 07:09:43 craigs Exp $ - * *****************************************************************************/ #ifndef TELEPHONY_H diff --git a/include/linux/time.h b/include/linux/time.h index e15206a7e82e..51e883df0fa5 100644 --- a/include/linux/time.h +++ b/include/linux/time.h @@ -29,6 +29,8 @@ struct timezone { #ifdef __KERNEL__ +extern struct timezone sys_tz; + /* Parameters used to convert the timespec values: */ #define MSEC_PER_SEC 1000L #define USEC_PER_MSEC 1000L diff --git a/include/linux/wait.h b/include/linux/wait.h index 0081147a9fe8..ef609f842fac 100644 --- a/include/linux/wait.h +++ b/include/linux/wait.h @@ -108,15 +108,6 @@ static inline int waitqueue_active(wait_queue_head_t *q) return !list_empty(&q->task_list); } -/* - * Used to distinguish between sync and async io wait context: - * sync i/o typically specifies a NULL wait queue entry or a wait - * queue entry bound to a task (current task) to wake up. - * aio specifies a wait queue entry with an async notification - * callback routine, not associated with any task. - */ -#define is_sync_wait(wait) (!(wait) || ((wait)->private)) - extern void add_wait_queue(wait_queue_head_t *q, wait_queue_t *wait); extern void add_wait_queue_exclusive(wait_queue_head_t *q, wait_queue_t *wait); extern void remove_wait_queue(wait_queue_head_t *q, wait_queue_t *wait); diff --git a/include/media/saa7146.h b/include/media/saa7146.h index 64a2ec746a3e..c5a6e22a4b37 100644 --- a/include/media/saa7146.h +++ b/include/media/saa7146.h @@ -24,7 +24,7 @@ extern unsigned int saa7146_debug; -//#define DEBUG_PROLOG printk("(0x%08x)(0x%08x) %s: %s(): ",(dev==0?-1:(dev->mem==0?-1:saa7146_read(dev,RPS_ADDR0))),(dev==0?-1:(dev->mem==0?-1:saa7146_read(dev,IER))),KBUILD_MODNAME,__FUNCTION__) +//#define DEBUG_PROLOG printk("(0x%08x)(0x%08x) %s: %s(): ",(dev==0?-1:(dev->mem==0?-1:saa7146_read(dev,RPS_ADDR0))),(dev==0?-1:(dev->mem==0?-1:saa7146_read(dev,IER))),KBUILD_MODNAME,__func__) #ifndef DEBUG_VARIABLE #define DEBUG_VARIABLE saa7146_debug diff --git a/include/net/9p/9p.h b/include/net/9p/9p.h index c3626c0ba9d3..fb163e2e0de6 100644 --- a/include/net/9p/9p.h +++ b/include/net/9p/9p.h @@ -61,7 +61,7 @@ extern unsigned int p9_debug_level; do { \ if ((p9_debug_level & level) == level) \ printk(KERN_NOTICE "-- %s (%d): " \ - format , __FUNCTION__, task_pid_nr(current) , ## arg); \ + format , __func__, task_pid_nr(current) , ## arg); \ } while (0) #define PRINT_FCALL_ERROR(s, fcall) P9_DPRINTK(P9_DEBUG_ERROR, \ @@ -76,7 +76,7 @@ do { \ #define P9_EPRINTK(level, format, arg...) \ do { \ printk(level "9p: %s (%d): " \ - format , __FUNCTION__, task_pid_nr(current), ## arg); \ + format , __func__, task_pid_nr(current), ## arg); \ } while (0) /** diff --git a/include/net/bluetooth/bluetooth.h b/include/net/bluetooth/bluetooth.h index 6f8418bf4241..996d12df7594 100644 --- a/include/net/bluetooth/bluetooth.h +++ b/include/net/bluetooth/bluetooth.h @@ -54,8 +54,8 @@ #define SOL_RFCOMM 18 #define BT_INFO(fmt, arg...) printk(KERN_INFO "Bluetooth: " fmt "\n" , ## arg) -#define BT_DBG(fmt, arg...) printk(KERN_INFO "%s: " fmt "\n" , __FUNCTION__ , ## arg) -#define BT_ERR(fmt, arg...) printk(KERN_ERR "%s: " fmt "\n" , __FUNCTION__ , ## arg) +#define BT_DBG(fmt, arg...) printk(KERN_INFO "%s: " fmt "\n" , __func__ , ## arg) +#define BT_ERR(fmt, arg...) printk(KERN_ERR "%s: " fmt "\n" , __func__ , ## arg) /* Connection and socket states */ enum { diff --git a/include/net/ieee80211.h b/include/net/ieee80211.h index 6048579d0b24..93a56de3594b 100644 --- a/include/net/ieee80211.h +++ b/include/net/ieee80211.h @@ -114,7 +114,7 @@ extern u32 ieee80211_debug_level; #define IEEE80211_DEBUG(level, fmt, args...) \ do { if (ieee80211_debug_level & (level)) \ printk(KERN_DEBUG "ieee80211: %c %s " fmt, \ - in_interrupt() ? 'I' : 'U', __FUNCTION__ , ## args); } while (0) + in_interrupt() ? 'I' : 'U', __func__ , ## args); } while (0) static inline bool ieee80211_ratelimit_debug(u32 level) { return (ieee80211_debug_level & level) && net_ratelimit(); diff --git a/include/net/ip.h b/include/net/ip.h index 1cbccaf0de3f..bc026ecb513f 100644 --- a/include/net/ip.h +++ b/include/net/ip.h @@ -396,7 +396,7 @@ extern void ip_local_error(struct sock *sk, int err, __be32 daddr, __be16 dport, int ipv4_doint_and_flush(ctl_table *ctl, int write, struct file* filp, void __user *buffer, size_t *lenp, loff_t *ppos); -int ipv4_doint_and_flush_strategy(ctl_table *table, int __user *name, int nlen, +int ipv4_doint_and_flush_strategy(ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen); #ifdef CONFIG_PROC_FS diff --git a/include/net/ip_vs.h b/include/net/ip_vs.h index 0b2071d9326d..fe9fcf73c85e 100644 --- a/include/net/ip_vs.h +++ b/include/net/ip_vs.h @@ -165,13 +165,13 @@ static inline const char *ip_vs_dbg_addr(int af, char *buf, size_t buf_len, do { \ if (level <= ip_vs_get_debug_level()) \ printk(KERN_DEBUG "Enter: %s, %s line %i\n", \ - __FUNCTION__, __FILE__, __LINE__); \ + __func__, __FILE__, __LINE__); \ } while (0) #define LeaveFunction(level) \ do { \ if (level <= ip_vs_get_debug_level()) \ printk(KERN_DEBUG "Leave: %s, %s line %i\n", \ - __FUNCTION__, __FILE__, __LINE__); \ + __func__, __FILE__, __LINE__); \ } while (0) #else #define EnterFunction(level) do {} while (0) diff --git a/include/net/irda/irda.h b/include/net/irda/irda.h index 08387553b57e..7e582061b230 100644 --- a/include/net/irda/irda.h +++ b/include/net/irda/irda.h @@ -72,7 +72,7 @@ do { if (irda_debug >= (n)) \ #define IRDA_ASSERT(expr, func) \ do { if(!(expr)) { \ printk( "Assertion failed! %s:%s:%d %s\n", \ - __FILE__,__FUNCTION__,__LINE__,(#expr) ); \ + __FILE__,__func__,__LINE__,(#expr) ); \ func } } while (0) #define IRDA_ASSERT_LABEL(label) label #else diff --git a/include/net/mac80211.h b/include/net/mac80211.h index 5617a1613c91..d861197f83c7 100644 --- a/include/net/mac80211.h +++ b/include/net/mac80211.h @@ -645,7 +645,8 @@ enum ieee80211_key_flags { * - Temporal Encryption Key (128 bits) * - Temporal Authenticator Tx MIC Key (64 bits) * - Temporal Authenticator Rx MIC Key (64 bits) - * + * @icv_len: FIXME + * @iv_len: FIXME */ struct ieee80211_key_conf { enum ieee80211_key_alg alg; diff --git a/include/net/ndisc.h b/include/net/ndisc.h index a01b7c4dc763..11dd0137c6a5 100644 --- a/include/net/ndisc.h +++ b/include/net/ndisc.h @@ -129,9 +129,8 @@ extern int ndisc_ifinfo_sysctl_change(struct ctl_table *ctl, void __user *buffer, size_t *lenp, loff_t *ppos); -int ndisc_ifinfo_sysctl_strategy(ctl_table *ctl, int __user *name, - int nlen, void __user *oldval, - size_t __user *oldlenp, +int ndisc_ifinfo_sysctl_strategy(ctl_table *ctl, + void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen); #endif diff --git a/include/net/netfilter/nf_nat_core.h b/include/net/netfilter/nf_nat_core.h index f29eeb9777e0..58684066388c 100644 --- a/include/net/netfilter/nf_nat_core.h +++ b/include/net/netfilter/nf_nat_core.h @@ -25,4 +25,12 @@ static inline int nf_nat_initialized(struct nf_conn *ct, else return test_bit(IPS_DST_NAT_DONE_BIT, &ct->status); } + +struct nlattr; + +extern int +(*nfnetlink_parse_nat_setup_hook)(struct nf_conn *ct, + enum nf_nat_manip_type manip, + struct nlattr *attr); + #endif /* _NF_NAT_CORE_H */ diff --git a/include/net/sctp/sctp.h b/include/net/sctp/sctp.h index 703305d00365..ed71b110edf7 100644 --- a/include/net/sctp/sctp.h +++ b/include/net/sctp/sctp.h @@ -303,7 +303,7 @@ extern int sctp_debug_flag; #define SCTP_ASSERT(expr, str, func) \ if (!(expr)) { \ SCTP_DEBUG_PRINTK("Assertion Failed: %s(%s) at %s:%s:%d\n", \ - str, (#expr), __FILE__, __FUNCTION__, __LINE__); \ + str, (#expr), __FILE__, __func__, __LINE__); \ func; \ } diff --git a/include/video/cyblafb.h b/include/video/cyblafb.h index 717440575380..d3c1d4e2c8e3 100644 --- a/include/video/cyblafb.h +++ b/include/video/cyblafb.h @@ -4,7 +4,7 @@ #endif #if CYBLAFB_DEBUG -#define debug(f,a...) printk("%s:" f, __FUNCTION__ , ## a); +#define debug(f,a...) printk("%s:" f, __func__ , ## a); #else #define debug(f,a...) #endif diff --git a/include/video/neomagic.h b/include/video/neomagic.h index 38910da0ae59..08b663782956 100644 --- a/include/video/neomagic.h +++ b/include/video/neomagic.h @@ -123,7 +123,6 @@ typedef volatile struct { struct neofb_par { struct vgastate state; - struct mutex open_lock; unsigned int ref_count; unsigned char MiscOutReg; /* Misc */ diff --git a/include/video/radeon.h b/include/video/radeon.h index 099ffa5e5bee..d5dcaf154ba4 100644 --- a/include/video/radeon.h +++ b/include/video/radeon.h @@ -386,7 +386,7 @@ #define SC_BOTTOM_RIGHT 0x16F0 #define SRC_SC_BOTTOM_RIGHT 0x16F4 #define RB2D_DSTCACHE_MODE 0x3428 -#define RB2D_DSTCACHE_CTLSTAT 0x342C +#define RB2D_DSTCACHE_CTLSTAT_broken 0x342C /* do not use */ #define LVDS_GEN_CNTL 0x02d0 #define LVDS_PLL_CNTL 0x02d4 #define FP2_GEN_CNTL 0x0288 @@ -525,6 +525,9 @@ #define CRTC_DISPLAY_DIS (1 << 10) #define CRTC_CRT_ON (1 << 15) +/* DSTCACHE_MODE bits constants */ +#define RB2D_DC_AUTOFLUSH_ENABLE (1 << 8) +#define RB2D_DC_DC_DISABLE_IGNORE_PE (1 << 17) /* DSTCACHE_CTLSTAT bit constants */ #define RB2D_DC_FLUSH_2D (1 << 0) @@ -532,6 +535,9 @@ #define RB2D_DC_FLUSH_ALL (RB2D_DC_FLUSH_2D | RB2D_DC_FREE_2D) #define RB2D_DC_BUSY (1 << 31) +/* DSTCACHE_MODE bits constants */ +#define RB2D_DC_AUTOFLUSH_ENABLE (1 << 8) +#define RB2D_DC_DC_DISABLE_IGNORE_PE (1 << 17) /* CRTC_GEN_CNTL bit constants */ #define CRTC_DBL_SCAN_EN 0x00000001 @@ -863,15 +869,10 @@ #define GMC_DST_16BPP_YVYU422 0x00000c00 #define GMC_DST_32BPP_AYUV444 0x00000e00 #define GMC_DST_16BPP_ARGB4444 0x00000f00 -#define GMC_SRC_MONO 0x00000000 -#define GMC_SRC_MONO_LBKGD 0x00001000 -#define GMC_SRC_DSTCOLOR 0x00003000 #define GMC_BYTE_ORDER_MSB_TO_LSB 0x00000000 #define GMC_BYTE_ORDER_LSB_TO_MSB 0x00004000 #define GMC_DP_CONVERSION_TEMP_9300 0x00008000 #define GMC_DP_CONVERSION_TEMP_6500 0x00000000 -#define GMC_DP_SRC_RECT 0x02000000 -#define GMC_DP_SRC_HOST 0x03000000 #define GMC_DP_SRC_HOST_BYTEALIGN 0x04000000 #define GMC_3D_FCN_EN_CLR 0x00000000 #define GMC_3D_FCN_EN_SET 0x08000000 @@ -882,6 +883,9 @@ #define GMC_WRITE_MASK_LEAVE 0x00000000 #define GMC_WRITE_MASK_SET 0x40000000 #define GMC_CLR_CMP_CNTL_DIS (1 << 28) +#define GMC_SRC_DATATYPE_MASK (3 << 12) +#define GMC_SRC_DATATYPE_MONO_FG_BG (0 << 12) +#define GMC_SRC_DATATYPE_MONO_FG_LA (1 << 12) #define GMC_SRC_DATATYPE_COLOR (3 << 12) #define ROP3_S 0x00cc0000 #define ROP3_SRCCOPY 0x00cc0000 @@ -890,6 +894,7 @@ #define DP_SRC_SOURCE_MASK (7 << 24) #define GMC_BRUSH_NONE (15 << 4) #define DP_SRC_SOURCE_MEMORY (2 << 24) +#define DP_SRC_SOURCE_HOST_DATA (3 << 24) #define GMC_BRUSH_SOLIDCOLOR 0x000000d0 /* DP_MIX bit constants */ @@ -975,6 +980,12 @@ #define DISP_PWR_MAN_TV_ENABLE_RST (1 << 25) #define DISP_PWR_MAN_AUTO_PWRUP_EN (1 << 26) +/* RBBM_GUICNTL constants */ +#define RBBM_GUICNTL_HOST_DATA_SWAP_NONE (0 << 0) +#define RBBM_GUICNTL_HOST_DATA_SWAP_16BIT (1 << 0) +#define RBBM_GUICNTL_HOST_DATA_SWAP_32BIT (2 << 0) +#define RBBM_GUICNTL_HOST_DATA_SWAP_HDW (3 << 0) + /* masks */ #define CONFIG_MEMSIZE_MASK 0x1f000000 diff --git a/include/video/s1d13xxxfb.h b/include/video/s1d13xxxfb.h index c99d261df8f7..fe41b8407946 100644 --- a/include/video/s1d13xxxfb.h +++ b/include/video/s1d13xxxfb.h @@ -14,7 +14,8 @@ #define S1D13XXXFB_H #define S1D_PALETTE_SIZE 256 -#define S1D_CHIP_REV 7 /* expected chip revision number for s1d13806 */ +#define S1D13506_CHIP_REV 4 /* expected chip revision number for s1d13506 */ +#define S1D13806_CHIP_REV 7 /* expected chip revision number for s1d13806 */ #define S1D_FBID "S1D13806" #define S1D_DEVICENAME "s1d13806fb" diff --git a/init/Kconfig b/init/Kconfig index 8a8e2d00c40e..5ceff3249a2d 100644 --- a/init/Kconfig +++ b/init/Kconfig @@ -713,6 +713,14 @@ config SHMEM option replaces shmem and tmpfs with the much simpler ramfs code, which may be appropriate on small systems without swap. +config AIO + bool "Enable AIO support" if EMBEDDED + default y + help + This option enables POSIX asynchronous I/O which may by used + by some high performance threaded applications. Disabling + this option saves about 7k. + config VM_EVENT_COUNTERS default y bool "Enable VM event counters for /proc/vmstat" if EMBEDDED diff --git a/init/do_mounts_rd.c b/init/do_mounts_rd.c index fedef93b586f..a7c748fa977a 100644 --- a/init/do_mounts_rd.c +++ b/init/do_mounts_rd.c @@ -71,7 +71,7 @@ identify_ramdisk_image(int fd, int start_block) sys_read(fd, buf, size); /* - * If it matches the gzip magic numbers, return -1 + * If it matches the gzip magic numbers, return 0 */ if (buf[0] == 037 && ((buf[1] == 0213) || (buf[1] == 0236))) { printk(KERN_NOTICE diff --git a/init/initramfs.c b/init/initramfs.c index 644fc01ad5f0..4f5ba75aaa7c 100644 --- a/init/initramfs.c +++ b/init/initramfs.c @@ -6,6 +6,7 @@ #include <linux/delay.h> #include <linux/string.h> #include <linux/syscalls.h> +#include <linux/utime.h> static __initdata char *message; static void __init error(char *x) @@ -72,6 +73,49 @@ static void __init free_hash(void) } } +static long __init do_utime(char __user *filename, time_t mtime) +{ + struct timespec t[2]; + + t[0].tv_sec = mtime; + t[0].tv_nsec = 0; + t[1].tv_sec = mtime; + t[1].tv_nsec = 0; + + return do_utimes(AT_FDCWD, filename, t, AT_SYMLINK_NOFOLLOW); +} + +static __initdata LIST_HEAD(dir_list); +struct dir_entry { + struct list_head list; + char *name; + time_t mtime; +}; + +static void __init dir_add(const char *name, time_t mtime) +{ + struct dir_entry *de = kmalloc(sizeof(struct dir_entry), GFP_KERNEL); + if (!de) + panic("can't allocate dir_entry buffer"); + INIT_LIST_HEAD(&de->list); + de->name = kstrdup(name, GFP_KERNEL); + de->mtime = mtime; + list_add(&de->list, &dir_list); +} + +static void __init dir_utime(void) +{ + struct dir_entry *de, *tmp; + list_for_each_entry_safe(de, tmp, &dir_list, list) { + list_del(&de->list); + do_utime(de->name, de->mtime); + kfree(de->name); + kfree(de); + } +} + +static __initdata time_t mtime; + /* cpio header parsing */ static __initdata unsigned long ino, major, minor, nlink; @@ -97,6 +141,7 @@ static void __init parse_header(char *s) uid = parsed[2]; gid = parsed[3]; nlink = parsed[4]; + mtime = parsed[5]; body_len = parsed[6]; major = parsed[7]; minor = parsed[8]; @@ -130,6 +175,7 @@ static inline void __init eat(unsigned n) count -= n; } +static __initdata char *vcollected; static __initdata char *collected; static __initdata int remains; static __initdata char *collect; @@ -271,6 +317,7 @@ static int __init do_name(void) if (wfd >= 0) { sys_fchown(wfd, uid, gid); sys_fchmod(wfd, mode); + vcollected = kstrdup(collected, GFP_KERNEL); state = CopyFile; } } @@ -278,12 +325,14 @@ static int __init do_name(void) sys_mkdir(collected, mode); sys_chown(collected, uid, gid); sys_chmod(collected, mode); + dir_add(collected, mtime); } else if (S_ISBLK(mode) || S_ISCHR(mode) || S_ISFIFO(mode) || S_ISSOCK(mode)) { if (maybe_link() == 0) { sys_mknod(collected, mode, rdev); sys_chown(collected, uid, gid); sys_chmod(collected, mode); + do_utime(collected, mtime); } } return 0; @@ -294,6 +343,8 @@ static int __init do_copy(void) if (count >= body_len) { sys_write(wfd, victim, body_len); sys_close(wfd); + do_utime(vcollected, mtime); + kfree(vcollected); eat(body_len); state = SkipIt; return 0; @@ -311,6 +362,7 @@ static int __init do_symlink(void) clean_path(collected, 0); sys_symlink(collected + N_ALIGN(name_len), collected); sys_lchown(collected, uid, gid); + do_utime(collected, mtime); state = SkipIt; next_state = Reset; return 0; @@ -466,6 +518,7 @@ static char * __init unpack_to_rootfs(char *buf, unsigned len, int check_only) buf += inptr; len -= inptr; } + dir_utime(); kfree(window); kfree(name_buf); kfree(symlink_buf); diff --git a/ipc/ipc_sysctl.c b/ipc/ipc_sysctl.c index 69bc85978ba0..0dfebc509426 100644 --- a/ipc/ipc_sysctl.c +++ b/ipc/ipc_sysctl.c @@ -131,7 +131,7 @@ static int proc_ipcauto_dointvec_minmax(ctl_table *table, int write, #ifdef CONFIG_SYSCTL_SYSCALL /* The generic sysctl ipc data routine. */ -static int sysctl_ipc_data(ctl_table *table, int __user *name, int nlen, +static int sysctl_ipc_data(ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { @@ -169,14 +169,13 @@ static int sysctl_ipc_data(ctl_table *table, int __user *name, int nlen, return 1; } -static int sysctl_ipc_registered_data(ctl_table *table, int __user *name, - int nlen, void __user *oldval, size_t __user *oldlenp, +static int sysctl_ipc_registered_data(ctl_table *table, + void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { int rc; - rc = sysctl_ipc_data(table, name, nlen, oldval, oldlenp, newval, - newlen); + rc = sysctl_ipc_data(table, oldval, oldlenp, newval, newlen); if (newval && newlen && rc > 0) /* diff --git a/ipc/sem.c b/ipc/sem.c index bf1bc36cb7ee..082122469b17 100644 --- a/ipc/sem.c +++ b/ipc/sem.c @@ -504,7 +504,7 @@ static int count_semzcnt (struct sem_array * sma, ushort semnum) return semzcnt; } -void free_un(struct rcu_head *head) +static void free_un(struct rcu_head *head) { struct sem_undo *un = container_of(head, struct sem_undo, rcu); kfree(un); diff --git a/kernel/cgroup.c b/kernel/cgroup.c index a0123d75ec9a..8c6e1c17e6d3 100644 --- a/kernel/cgroup.c +++ b/kernel/cgroup.c @@ -2735,6 +2735,8 @@ void cgroup_fork_callbacks(struct task_struct *child) * Called on every change to mm->owner. mm_init_owner() does not * invoke this routine, since it assigns the mm->owner the first time * and does not change it. + * + * The callbacks are invoked with mmap_sem held in read mode. */ void cgroup_mm_owner_callbacks(struct task_struct *old, struct task_struct *new) { @@ -2750,7 +2752,7 @@ void cgroup_mm_owner_callbacks(struct task_struct *old, struct task_struct *new) if (oldcgrp == newcgrp) continue; if (ss->mm_owner_changed) - ss->mm_owner_changed(ss, oldcgrp, newcgrp); + ss->mm_owner_changed(ss, oldcgrp, newcgrp, new); } } } diff --git a/kernel/compat.c b/kernel/compat.c index 32c254a8ab9a..143990e48cb9 100644 --- a/kernel/compat.c +++ b/kernel/compat.c @@ -26,6 +26,64 @@ #include <asm/uaccess.h> +/* + * Note that the native side is already converted to a timespec, because + * that's what we want anyway. + */ +static int compat_get_timeval(struct timespec *o, + struct compat_timeval __user *i) +{ + long usec; + + if (get_user(o->tv_sec, &i->tv_sec) || + get_user(usec, &i->tv_usec)) + return -EFAULT; + o->tv_nsec = usec * 1000; + return 0; +} + +static int compat_put_timeval(struct compat_timeval __user *o, + struct timeval *i) +{ + return (put_user(i->tv_sec, &o->tv_sec) || + put_user(i->tv_usec, &o->tv_usec)) ? -EFAULT : 0; +} + +asmlinkage long compat_sys_gettimeofday(struct compat_timeval __user *tv, + struct timezone __user *tz) +{ + if (tv) { + struct timeval ktv; + do_gettimeofday(&ktv); + if (compat_put_timeval(tv, &ktv)) + return -EFAULT; + } + if (tz) { + if (copy_to_user(tz, &sys_tz, sizeof(sys_tz))) + return -EFAULT; + } + + return 0; +} + +asmlinkage long compat_sys_settimeofday(struct compat_timeval __user *tv, + struct timezone __user *tz) +{ + struct timespec kts; + struct timezone ktz; + + if (tv) { + if (compat_get_timeval(&kts, tv)) + return -EFAULT; + } + if (tz) { + if (copy_from_user(&ktz, tz, sizeof(ktz))) + return -EFAULT; + } + + return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL); +} + int get_compat_timespec(struct timespec *ts, const struct compat_timespec __user *cts) { return (!access_ok(VERIFY_READ, cts, sizeof(*cts)) || diff --git a/kernel/dma.c b/kernel/dma.c index d2c60a822790..f903189c5304 100644 --- a/kernel/dma.c +++ b/kernel/dma.c @@ -1,4 +1,4 @@ -/* $Id: dma.c,v 1.7 1994/12/28 03:35:33 root Exp root $ +/* * linux/kernel/dma.c: A DMA channel allocator. Inspired by linux/kernel/irq.c. * * Written by Hennus Bergman, 1992. diff --git a/kernel/exit.c b/kernel/exit.c index 85a83c831856..0ef4673e351b 100644 --- a/kernel/exit.c +++ b/kernel/exit.c @@ -640,24 +640,23 @@ retry: assign_new_owner: BUG_ON(c == p); get_task_struct(c); + read_unlock(&tasklist_lock); + down_write(&mm->mmap_sem); /* * The task_lock protects c->mm from changing. * We always want mm->owner->mm == mm */ task_lock(c); - /* - * Delay read_unlock() till we have the task_lock() - * to ensure that c does not slip away underneath us - */ - read_unlock(&tasklist_lock); if (c->mm != mm) { task_unlock(c); + up_write(&mm->mmap_sem); put_task_struct(c); goto retry; } cgroup_mm_owner_callbacks(mm->owner, c); mm->owner = c; task_unlock(c); + up_write(&mm->mmap_sem); put_task_struct(c); } #endif /* CONFIG_MM_OWNER */ diff --git a/kernel/kallsyms.c b/kernel/kallsyms.c index 38fc10ac7541..5072cf1685a2 100644 --- a/kernel/kallsyms.c +++ b/kernel/kallsyms.c @@ -260,7 +260,6 @@ const char *kallsyms_lookup(unsigned long addr, /* see if it's in a module */ return module_address_lookup(addr, symbolsize, offset, modname, namebuf); - return NULL; } int lookup_symbol_name(unsigned long addr, char *symname) diff --git a/kernel/kmod.c b/kernel/kmod.c index 2456d1a0befb..ab7dd08472fc 100644 --- a/kernel/kmod.c +++ b/kernel/kmod.c @@ -265,7 +265,7 @@ static void __call_usermodehelper(struct work_struct *work) } } -#ifdef CONFIG_PM +#ifdef CONFIG_PM_SLEEP /* * If set, call_usermodehelper_exec() will exit immediately returning -EBUSY * (used for preventing user land processes from being created after the user @@ -288,39 +288,37 @@ static DECLARE_WAIT_QUEUE_HEAD(running_helpers_waitq); */ #define RUNNING_HELPERS_TIMEOUT (5 * HZ) -static int usermodehelper_pm_callback(struct notifier_block *nfb, - unsigned long action, - void *ignored) +/** + * usermodehelper_disable - prevent new helpers from being started + */ +int usermodehelper_disable(void) { long retval; - switch (action) { - case PM_HIBERNATION_PREPARE: - case PM_SUSPEND_PREPARE: - usermodehelper_disabled = 1; - smp_mb(); - /* - * From now on call_usermodehelper_exec() won't start any new - * helpers, so it is sufficient if running_helpers turns out to - * be zero at one point (it may be increased later, but that - * doesn't matter). - */ - retval = wait_event_timeout(running_helpers_waitq, + usermodehelper_disabled = 1; + smp_mb(); + /* + * From now on call_usermodehelper_exec() won't start any new + * helpers, so it is sufficient if running_helpers turns out to + * be zero at one point (it may be increased later, but that + * doesn't matter). + */ + retval = wait_event_timeout(running_helpers_waitq, atomic_read(&running_helpers) == 0, RUNNING_HELPERS_TIMEOUT); - if (retval) { - return NOTIFY_OK; - } else { - usermodehelper_disabled = 0; - return NOTIFY_BAD; - } - case PM_POST_HIBERNATION: - case PM_POST_SUSPEND: - usermodehelper_disabled = 0; - return NOTIFY_OK; - } + if (retval) + return 0; - return NOTIFY_DONE; + usermodehelper_disabled = 0; + return -EAGAIN; +} + +/** + * usermodehelper_enable - allow new helpers to be started again + */ +void usermodehelper_enable(void) +{ + usermodehelper_disabled = 0; } static void helper_lock(void) @@ -334,18 +332,12 @@ static void helper_unlock(void) if (atomic_dec_and_test(&running_helpers)) wake_up(&running_helpers_waitq); } - -static void register_pm_notifier_callback(void) -{ - pm_notifier(usermodehelper_pm_callback, 0); -} -#else /* CONFIG_PM */ +#else /* CONFIG_PM_SLEEP */ #define usermodehelper_disabled 0 static inline void helper_lock(void) {} static inline void helper_unlock(void) {} -static inline void register_pm_notifier_callback(void) {} -#endif /* CONFIG_PM */ +#endif /* CONFIG_PM_SLEEP */ /** * call_usermodehelper_setup - prepare to call a usermode helper @@ -515,5 +507,4 @@ void __init usermodehelper_init(void) { khelper_wq = create_singlethread_workqueue("khelper"); BUG_ON(!khelper_wq); - register_pm_notifier_callback(); } diff --git a/kernel/kprobes.c b/kernel/kprobes.c index 75bc2cd9ebc6..8b57a2597f21 100644 --- a/kernel/kprobes.c +++ b/kernel/kprobes.c @@ -404,7 +404,7 @@ void kretprobe_hash_lock(struct task_struct *tsk, spin_lock_irqsave(hlist_lock, *flags); } -void kretprobe_table_lock(unsigned long hash, unsigned long *flags) +static void kretprobe_table_lock(unsigned long hash, unsigned long *flags) { spinlock_t *hlist_lock = kretprobe_table_lock_ptr(hash); spin_lock_irqsave(hlist_lock, *flags); diff --git a/kernel/ksysfs.c b/kernel/ksysfs.c index e53bc30e9ba5..08dd8ed86c77 100644 --- a/kernel/ksysfs.c +++ b/kernel/ksysfs.c @@ -14,6 +14,7 @@ #include <linux/module.h> #include <linux/init.h> #include <linux/kexec.h> +#include <linux/profile.h> #include <linux/sched.h> #define KERNEL_ATTR_RO(_name) \ @@ -53,6 +54,37 @@ static ssize_t uevent_helper_store(struct kobject *kobj, KERNEL_ATTR_RW(uevent_helper); #endif +#ifdef CONFIG_PROFILING +static ssize_t profiling_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return sprintf(buf, "%d\n", prof_on); +} +static ssize_t profiling_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t count) +{ + int ret; + + if (prof_on) + return -EEXIST; + /* + * This eventually calls into get_option() which + * has a ton of callers and is not const. It is + * easiest to cast it away here. + */ + profile_setup((char *)buf); + ret = profile_init(); + if (ret) + return ret; + ret = create_proc_profile(); + if (ret) + return ret; + return count; +} +KERNEL_ATTR_RW(profiling); +#endif + #ifdef CONFIG_KEXEC static ssize_t kexec_loaded_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf) @@ -109,6 +141,9 @@ static struct attribute * kernel_attrs[] = { &uevent_seqnum_attr.attr, &uevent_helper_attr.attr, #endif +#ifdef CONFIG_PROFILING + &profiling_attr.attr, +#endif #ifdef CONFIG_KEXEC &kexec_loaded_attr.attr, &kexec_crash_loaded_attr.attr, diff --git a/kernel/module.c b/kernel/module.c index 9db11911e04b..dd9ac6ad5cb9 100644 --- a/kernel/module.c +++ b/kernel/module.c @@ -100,7 +100,7 @@ static inline int strong_try_module_get(struct module *mod) static inline void add_taint_module(struct module *mod, unsigned flag) { add_taint(flag); - mod->taints |= flag; + mod->taints |= (1U << flag); } /* @@ -923,7 +923,7 @@ static const char vermagic[] = VERMAGIC_STRING; static int try_to_force_load(struct module *mod, const char *symname) { #ifdef CONFIG_MODULE_FORCE_LOAD - if (!(tainted & TAINT_FORCED_MODULE)) + if (!test_taint(TAINT_FORCED_MODULE)) printk("%s: no version for \"%s\" found: kernel tainted.\n", mod->name, symname); add_taint_module(mod, TAINT_FORCED_MODULE); @@ -1033,7 +1033,7 @@ static unsigned long resolve_symbol(Elf_Shdr *sechdrs, const unsigned long *crc; ret = find_symbol(name, &owner, &crc, - !(mod->taints & TAINT_PROPRIETARY_MODULE), true); + !(mod->taints & (1 << TAINT_PROPRIETARY_MODULE)), true); if (!IS_ERR_VALUE(ret)) { /* use_module can fail due to OOM, or module initialization or unloading */ @@ -1634,7 +1634,7 @@ static void set_license(struct module *mod, const char *license) license = "unspecified"; if (!license_is_gpl_compatible(license)) { - if (!(tainted & TAINT_PROPRIETARY_MODULE)) + if (!test_taint(TAINT_PROPRIETARY_MODULE)) printk(KERN_WARNING "%s: module license '%s' taints " "kernel.\n", mod->name, license); add_taint_module(mod, TAINT_PROPRIETARY_MODULE); @@ -2552,9 +2552,9 @@ static char *module_flags(struct module *mod, char *buf) mod->state == MODULE_STATE_GOING || mod->state == MODULE_STATE_COMING) { buf[bx++] = '('; - if (mod->taints & TAINT_PROPRIETARY_MODULE) + if (mod->taints & (1 << TAINT_PROPRIETARY_MODULE)) buf[bx++] = 'P'; - if (mod->taints & TAINT_FORCED_MODULE) + if (mod->taints & (1 << TAINT_FORCED_MODULE)) buf[bx++] = 'F'; /* * TAINT_FORCED_RMMOD: could be added. diff --git a/kernel/panic.c b/kernel/panic.c index 12c5a0a6c89b..f290e8e866f6 100644 --- a/kernel/panic.c +++ b/kernel/panic.c @@ -23,7 +23,7 @@ #include <linux/kallsyms.h> int panic_on_oops; -int tainted; +static unsigned long tainted_mask; static int pause_on_oops; static int pause_on_oops_flag; static DEFINE_SPINLOCK(pause_on_oops_lock); @@ -143,6 +143,26 @@ NORET_TYPE void panic(const char * fmt, ...) EXPORT_SYMBOL(panic); + +struct tnt { + u8 bit; + char true; + char false; +}; + +static const struct tnt tnts[] = { + { TAINT_PROPRIETARY_MODULE, 'P', 'G' }, + { TAINT_FORCED_MODULE, 'F', ' ' }, + { TAINT_UNSAFE_SMP, 'S', ' ' }, + { TAINT_FORCED_RMMOD, 'R', ' ' }, + { TAINT_MACHINE_CHECK, 'M', ' ' }, + { TAINT_BAD_PAGE, 'B', ' ' }, + { TAINT_USER, 'U', ' ' }, + { TAINT_DIE, 'D', ' ' }, + { TAINT_OVERRIDDEN_ACPI_TABLE, 'A', ' ' }, + { TAINT_WARN, 'W', ' ' }, +}; + /** * print_tainted - return a string to represent the kernel taint state. * @@ -158,32 +178,41 @@ EXPORT_SYMBOL(panic); * * The string is overwritten by the next call to print_taint(). */ - const char *print_tainted(void) { - static char buf[20]; - if (tainted) { - snprintf(buf, sizeof(buf), "Tainted: %c%c%c%c%c%c%c%c%c%c", - tainted & TAINT_PROPRIETARY_MODULE ? 'P' : 'G', - tainted & TAINT_FORCED_MODULE ? 'F' : ' ', - tainted & TAINT_UNSAFE_SMP ? 'S' : ' ', - tainted & TAINT_FORCED_RMMOD ? 'R' : ' ', - tainted & TAINT_MACHINE_CHECK ? 'M' : ' ', - tainted & TAINT_BAD_PAGE ? 'B' : ' ', - tainted & TAINT_USER ? 'U' : ' ', - tainted & TAINT_DIE ? 'D' : ' ', - tainted & TAINT_OVERRIDDEN_ACPI_TABLE ? 'A' : ' ', - tainted & TAINT_WARN ? 'W' : ' '); - } - else + static char buf[ARRAY_SIZE(tnts) + sizeof("Tainted: ") + 1]; + + if (tainted_mask) { + char *s; + int i; + + s = buf + sprintf(buf, "Tainted: "); + for (i = 0; i < ARRAY_SIZE(tnts); i++) { + const struct tnt *t = &tnts[i]; + *s++ = test_bit(t->bit, &tainted_mask) ? + t->true : t->false; + } + *s = 0; + } else snprintf(buf, sizeof(buf), "Not tainted"); return(buf); } +int test_taint(unsigned flag) +{ + return test_bit(flag, &tainted_mask); +} +EXPORT_SYMBOL(test_taint); + +unsigned long get_taint(void) +{ + return tainted_mask; +} + void add_taint(unsigned flag) { debug_locks = 0; /* can't trust the integrity of the kernel anymore */ - tainted |= flag; + set_bit(flag, &tainted_mask); } EXPORT_SYMBOL(add_taint); diff --git a/kernel/power/disk.c b/kernel/power/disk.c index bbd85c60f741..331f9836383f 100644 --- a/kernel/power/disk.c +++ b/kernel/power/disk.c @@ -14,6 +14,7 @@ #include <linux/reboot.h> #include <linux/string.h> #include <linux/device.h> +#include <linux/kmod.h> #include <linux/delay.h> #include <linux/fs.h> #include <linux/mount.h> @@ -520,6 +521,10 @@ int hibernate(void) if (error) goto Exit; + error = usermodehelper_disable(); + if (error) + goto Exit; + /* Allocate memory management structures */ error = create_basic_memory_bitmaps(); if (error) @@ -558,6 +563,7 @@ int hibernate(void) thaw_processes(); Finish: free_basic_memory_bitmaps(); + usermodehelper_enable(); Exit: pm_notifier_call_chain(PM_POST_HIBERNATION); pm_restore_console(); @@ -634,6 +640,10 @@ static int software_resume(void) if (error) goto Finish; + error = usermodehelper_disable(); + if (error) + goto Finish; + error = create_basic_memory_bitmaps(); if (error) goto Finish; @@ -656,6 +666,7 @@ static int software_resume(void) thaw_processes(); Done: free_basic_memory_bitmaps(); + usermodehelper_enable(); Finish: pm_notifier_call_chain(PM_POST_RESTORE); pm_restore_console(); diff --git a/kernel/power/main.c b/kernel/power/main.c index 540b16b68565..19122cf6d827 100644 --- a/kernel/power/main.c +++ b/kernel/power/main.c @@ -14,6 +14,7 @@ #include <linux/string.h> #include <linux/delay.h> #include <linux/errno.h> +#include <linux/kmod.h> #include <linux/init.h> #include <linux/console.h> #include <linux/cpu.h> @@ -237,6 +238,10 @@ static int suspend_prepare(void) if (error) goto Finish; + error = usermodehelper_disable(); + if (error) + goto Finish; + if (suspend_freeze_processes()) { error = -EAGAIN; goto Thaw; @@ -256,6 +261,7 @@ static int suspend_prepare(void) Thaw: suspend_thaw_processes(); + usermodehelper_enable(); Finish: pm_notifier_call_chain(PM_POST_SUSPEND); pm_restore_console(); @@ -376,6 +382,7 @@ int suspend_devices_and_enter(suspend_state_t state) static void suspend_finish(void) { suspend_thaw_processes(); + usermodehelper_enable(); pm_notifier_call_chain(PM_POST_SUSPEND); pm_restore_console(); } diff --git a/kernel/power/user.c b/kernel/power/user.c index a6332a313262..005b93d839ba 100644 --- a/kernel/power/user.c +++ b/kernel/power/user.c @@ -212,13 +212,20 @@ static long snapshot_ioctl(struct file *filp, unsigned int cmd, case SNAPSHOT_FREEZE: if (data->frozen) break; + printk("Syncing filesystems ... "); sys_sync(); printk("done.\n"); - error = freeze_processes(); + error = usermodehelper_disable(); if (error) + break; + + error = freeze_processes(); + if (error) { thaw_processes(); + usermodehelper_enable(); + } if (!error) data->frozen = 1; break; @@ -227,6 +234,7 @@ static long snapshot_ioctl(struct file *filp, unsigned int cmd, if (!data->frozen || data->ready) break; thaw_processes(); + usermodehelper_enable(); data->frozen = 0; break; diff --git a/kernel/printk.c b/kernel/printk.c index a430fd04008b..fbd94bdaa74f 100644 --- a/kernel/printk.c +++ b/kernel/printk.c @@ -13,7 +13,7 @@ * Fixed SMP synchronization, 08/08/99, Manfred Spraul * manfred@colorfullife.com * Rewrote bits to get rid of console_lock - * 01Mar01 Andrew Morton <andrewm@uow.edu.au> + * 01Mar01 Andrew Morton */ #include <linux/kernel.h> @@ -593,6 +593,8 @@ static int have_callable_console(void) * * See also: * printf(3) + * + * See the vsnprintf() documentation for format string extensions over C99. */ asmlinkage int printk(const char *fmt, ...) diff --git a/kernel/profile.c b/kernel/profile.c index cd26bed4cc26..a9e422df6bf6 100644 --- a/kernel/profile.c +++ b/kernel/profile.c @@ -22,6 +22,8 @@ #include <linux/cpu.h> #include <linux/highmem.h> #include <linux/mutex.h> +#include <linux/slab.h> +#include <linux/vmalloc.h> #include <asm/sections.h> #include <asm/irq_regs.h> #include <asm/ptrace.h> @@ -50,11 +52,11 @@ static DEFINE_PER_CPU(int, cpu_profile_flip); static DEFINE_MUTEX(profile_flip_mutex); #endif /* CONFIG_SMP */ -static int __init profile_setup(char *str) +int profile_setup(char *str) { - static char __initdata schedstr[] = "schedule"; - static char __initdata sleepstr[] = "sleep"; - static char __initdata kvmstr[] = "kvm"; + static char schedstr[] = "schedule"; + static char sleepstr[] = "sleep"; + static char kvmstr[] = "kvm"; int par; if (!strncmp(str, sleepstr, strlen(sleepstr))) { @@ -100,14 +102,33 @@ static int __init profile_setup(char *str) __setup("profile=", profile_setup); -void __init profile_init(void) +int profile_init(void) { + int buffer_bytes; if (!prof_on) - return; + return 0; /* only text is profiled */ prof_len = (_etext - _stext) >> prof_shift; - prof_buffer = alloc_bootmem(prof_len*sizeof(atomic_t)); + buffer_bytes = prof_len*sizeof(atomic_t); + if (!slab_is_available()) { + prof_buffer = alloc_bootmem(buffer_bytes); + return 0; + } + + prof_buffer = kzalloc(buffer_bytes, GFP_KERNEL); + if (prof_buffer) + return 0; + + prof_buffer = alloc_pages_exact(buffer_bytes, GFP_KERNEL|__GFP_ZERO); + if (prof_buffer) + return 0; + + prof_buffer = vmalloc(buffer_bytes); + if (prof_buffer) + return 0; + + return -ENOMEM; } /* Profile event notifications */ @@ -527,7 +548,7 @@ static void __init profile_nop(void *unused) { } -static int __init create_hash_tables(void) +static int create_hash_tables(void) { int cpu; @@ -575,14 +596,14 @@ out_cleanup: #define create_hash_tables() ({ 0; }) #endif -static int __init create_proc_profile(void) +int create_proc_profile(void) { struct proc_dir_entry *entry; if (!prof_on) return 0; if (create_hash_tables()) - return -1; + return -ENOMEM; entry = proc_create("profile", S_IWUSR | S_IRUGO, NULL, &proc_profile_operations); if (!entry) diff --git a/kernel/resource.c b/kernel/resource.c index 414d6fc9131e..f193d6e3ded2 100644 --- a/kernel/resource.c +++ b/kernel/resource.c @@ -630,33 +630,34 @@ struct resource * __request_region(struct resource *parent, { struct resource *res = kzalloc(sizeof(*res), GFP_KERNEL); - if (res) { - res->name = name; - res->start = start; - res->end = start + n - 1; - res->flags = IORESOURCE_BUSY; + if (!res) + return NULL; - write_lock(&resource_lock); + res->name = name; + res->start = start; + res->end = start + n - 1; + res->flags = IORESOURCE_BUSY; - for (;;) { - struct resource *conflict; + write_lock(&resource_lock); - conflict = __request_resource(parent, res); - if (!conflict) - break; - if (conflict != parent) { - parent = conflict; - if (!(conflict->flags & IORESOURCE_BUSY)) - continue; - } + for (;;) { + struct resource *conflict; - /* Uhhuh, that didn't work out.. */ - kfree(res); - res = NULL; + conflict = __request_resource(parent, res); + if (!conflict) break; + if (conflict != parent) { + parent = conflict; + if (!(conflict->flags & IORESOURCE_BUSY)) + continue; } - write_unlock(&resource_lock); + + /* Uhhuh, that didn't work out.. */ + kfree(res); + res = NULL; + break; } + write_unlock(&resource_lock); return res; } EXPORT_SYMBOL(__request_region); diff --git a/kernel/softlockup.c b/kernel/softlockup.c index cb838ee93a82..3953e4aed733 100644 --- a/kernel/softlockup.c +++ b/kernel/softlockup.c @@ -226,7 +226,7 @@ static void check_hung_uninterruptible_tasks(int this_cpu) * If the system crashed already then all bets are off, * do not report extra hung tasks: */ - if ((tainted & TAINT_DIE) || did_panic) + if (test_taint(TAINT_DIE) || did_panic) return; read_lock(&tasklist_lock); diff --git a/kernel/sys.c b/kernel/sys.c index 234d9454294e..0bc8fa3c2288 100644 --- a/kernel/sys.c +++ b/kernel/sys.c @@ -1349,8 +1349,10 @@ asmlinkage long sys_sethostname(char __user *name, int len) down_write(&uts_sem); errno = -EFAULT; if (!copy_from_user(tmp, name, len)) { - memcpy(utsname()->nodename, tmp, len); - utsname()->nodename[len] = 0; + struct new_utsname *u = utsname(); + + memcpy(u->nodename, tmp, len); + memset(u->nodename + len, 0, sizeof(u->nodename) - len); errno = 0; } up_write(&uts_sem); @@ -1362,15 +1364,17 @@ asmlinkage long sys_sethostname(char __user *name, int len) asmlinkage long sys_gethostname(char __user *name, int len) { int i, errno; + struct new_utsname *u; if (len < 0) return -EINVAL; down_read(&uts_sem); - i = 1 + strlen(utsname()->nodename); + u = utsname(); + i = 1 + strlen(u->nodename); if (i > len) i = len; errno = 0; - if (copy_to_user(name, utsname()->nodename, i)) + if (copy_to_user(name, u->nodename, i)) errno = -EFAULT; up_read(&uts_sem); return errno; @@ -1395,8 +1399,10 @@ asmlinkage long sys_setdomainname(char __user *name, int len) down_write(&uts_sem); errno = -EFAULT; if (!copy_from_user(tmp, name, len)) { - memcpy(utsname()->domainname, tmp, len); - utsname()->domainname[len] = 0; + struct new_utsname *u = utsname(); + + memcpy(u->domainname, tmp, len); + memset(u->domainname + len, 0, sizeof(u->domainname) - len); errno = 0; } up_write(&uts_sem); @@ -1450,14 +1456,22 @@ asmlinkage long sys_setrlimit(unsigned int resource, struct rlimit __user *rlim) return -EINVAL; if (copy_from_user(&new_rlim, rlim, sizeof(*rlim))) return -EFAULT; - if (new_rlim.rlim_cur > new_rlim.rlim_max) - return -EINVAL; old_rlim = current->signal->rlim + resource; if ((new_rlim.rlim_max > old_rlim->rlim_max) && !capable(CAP_SYS_RESOURCE)) return -EPERM; - if (resource == RLIMIT_NOFILE && new_rlim.rlim_max > sysctl_nr_open) - return -EPERM; + + if (resource == RLIMIT_NOFILE) { + if (new_rlim.rlim_max == RLIM_INFINITY) + new_rlim.rlim_max = sysctl_nr_open; + if (new_rlim.rlim_cur == RLIM_INFINITY) + new_rlim.rlim_cur = sysctl_nr_open; + if (new_rlim.rlim_max > sysctl_nr_open) + return -EPERM; + } + + if (new_rlim.rlim_cur > new_rlim.rlim_max) + return -EINVAL; retval = security_task_setrlimit(resource, &new_rlim); if (retval) diff --git a/kernel/sys_ni.c b/kernel/sys_ni.c index 503d8d4eb80a..a77b27b11b04 100644 --- a/kernel/sys_ni.c +++ b/kernel/sys_ni.c @@ -126,6 +126,11 @@ cond_syscall(sys_vm86); cond_syscall(compat_sys_ipc); cond_syscall(compat_sys_sysctl); cond_syscall(sys_flock); +cond_syscall(sys_io_setup); +cond_syscall(sys_io_destroy); +cond_syscall(sys_io_submit); +cond_syscall(sys_io_cancel); +cond_syscall(sys_io_getevents); /* arch-specific weak syscall entries */ cond_syscall(sys_pciconfig_read); diff --git a/kernel/sysctl.c b/kernel/sysctl.c index cfc5295f1e82..617d41e4d6a0 100644 --- a/kernel/sysctl.c +++ b/kernel/sysctl.c @@ -149,7 +149,7 @@ extern int max_lock_depth; #ifdef CONFIG_PROC_SYSCTL static int proc_do_cad_pid(struct ctl_table *table, int write, struct file *filp, void __user *buffer, size_t *lenp, loff_t *ppos); -static int proc_dointvec_taint(struct ctl_table *table, int write, struct file *filp, +static int proc_taint(struct ctl_table *table, int write, struct file *filp, void __user *buffer, size_t *lenp, loff_t *ppos); #endif @@ -379,10 +379,9 @@ static struct ctl_table kern_table[] = { #ifdef CONFIG_PROC_SYSCTL { .procname = "tainted", - .data = &tainted, - .maxlen = sizeof(int), + .maxlen = sizeof(long), .mode = 0644, - .proc_handler = &proc_dointvec_taint, + .proc_handler = &proc_taint, }, #endif #ifdef CONFIG_LATENCYTOP @@ -1282,6 +1281,7 @@ static struct ctl_table fs_table[] = { .extra2 = &two, }, #endif +#ifdef CONFIG_AIO { .procname = "aio-nr", .data = &aio_nr, @@ -1296,6 +1296,7 @@ static struct ctl_table fs_table[] = { .mode = 0644, .proc_handler = &proc_doulongvec_minmax, }, +#endif /* CONFIG_AIO */ #ifdef CONFIG_INOTIFY_USER { .ctl_name = FS_INOTIFY, @@ -1501,7 +1502,6 @@ void register_sysctl_root(struct ctl_table_root *root) /* Perform the actual read/write of a sysctl table entry. */ static int do_sysctl_strategy(struct ctl_table_root *root, struct ctl_table *table, - int __user *name, int nlen, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { @@ -1515,8 +1515,7 @@ static int do_sysctl_strategy(struct ctl_table_root *root, return -EPERM; if (table->strategy) { - rc = table->strategy(table, name, nlen, oldval, oldlenp, - newval, newlen); + rc = table->strategy(table, oldval, oldlenp, newval, newlen); if (rc < 0) return rc; if (rc > 0) @@ -1526,8 +1525,7 @@ static int do_sysctl_strategy(struct ctl_table_root *root, /* If there is no strategy routine, or if the strategy returns * zero, proceed with automatic r/w */ if (table->data && table->maxlen) { - rc = sysctl_data(table, name, nlen, oldval, oldlenp, - newval, newlen); + rc = sysctl_data(table, oldval, oldlenp, newval, newlen); if (rc < 0) return rc; } @@ -1559,7 +1557,7 @@ repeat: table = table->child; goto repeat; } - error = do_sysctl_strategy(root, table, name, nlen, + error = do_sysctl_strategy(root, table, oldval, oldlenp, newval, newlen); return error; @@ -2228,49 +2226,39 @@ int proc_dointvec(struct ctl_table *table, int write, struct file *filp, NULL,NULL); } -#define OP_SET 0 -#define OP_AND 1 -#define OP_OR 2 - -static int do_proc_dointvec_bset_conv(int *negp, unsigned long *lvalp, - int *valp, - int write, void *data) -{ - int op = *(int *)data; - if (write) { - int val = *negp ? -*lvalp : *lvalp; - switch(op) { - case OP_SET: *valp = val; break; - case OP_AND: *valp &= val; break; - case OP_OR: *valp |= val; break; - } - } else { - int val = *valp; - if (val < 0) { - *negp = -1; - *lvalp = (unsigned long)-val; - } else { - *negp = 0; - *lvalp = (unsigned long)val; - } - } - return 0; -} - /* - * Taint values can only be increased + * Taint values can only be increased + * This means we can safely use a temporary. */ -static int proc_dointvec_taint(struct ctl_table *table, int write, struct file *filp, +static int proc_taint(struct ctl_table *table, int write, struct file *filp, void __user *buffer, size_t *lenp, loff_t *ppos) { - int op; + struct ctl_table t; + unsigned long tmptaint = get_taint(); + int err; if (write && !capable(CAP_SYS_ADMIN)) return -EPERM; - op = OP_OR; - return do_proc_dointvec(table,write,filp,buffer,lenp,ppos, - do_proc_dointvec_bset_conv,&op); + t = *table; + t.data = &tmptaint; + err = proc_doulongvec_minmax(&t, write, filp, buffer, lenp, ppos); + if (err < 0) + return err; + + if (write) { + /* + * Poor man's atomic or. Not worth adding a primitive + * to everyone's atomic.h for this + */ + int i; + for (i = 0; i < BITS_PER_LONG && tmptaint >> i; i++) { + if ((tmptaint >> i) & 1) + add_taint(i); + } + } + + return err; } struct do_proc_dointvec_minmax_conv_param { @@ -2718,7 +2706,7 @@ int proc_doulongvec_ms_jiffies_minmax(struct ctl_table *table, int write, */ /* The generic sysctl data routine (used if no strategy routine supplied) */ -int sysctl_data(struct ctl_table *table, int __user *name, int nlen, +int sysctl_data(struct ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { @@ -2752,7 +2740,7 @@ int sysctl_data(struct ctl_table *table, int __user *name, int nlen, } /* The generic string strategy routine: */ -int sysctl_string(struct ctl_table *table, int __user *name, int nlen, +int sysctl_string(struct ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { @@ -2798,7 +2786,7 @@ int sysctl_string(struct ctl_table *table, int __user *name, int nlen, * are between the minimum and maximum values given in the arrays * table->extra1 and table->extra2, respectively. */ -int sysctl_intvec(struct ctl_table *table, int __user *name, int nlen, +int sysctl_intvec(struct ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { @@ -2834,7 +2822,7 @@ int sysctl_intvec(struct ctl_table *table, int __user *name, int nlen, } /* Strategy function to convert jiffies to seconds */ -int sysctl_jiffies(struct ctl_table *table, int __user *name, int nlen, +int sysctl_jiffies(struct ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { @@ -2868,7 +2856,7 @@ int sysctl_jiffies(struct ctl_table *table, int __user *name, int nlen, } /* Strategy function to convert jiffies to seconds */ -int sysctl_ms_jiffies(struct ctl_table *table, int __user *name, int nlen, +int sysctl_ms_jiffies(struct ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { @@ -2923,35 +2911,35 @@ asmlinkage long sys_sysctl(struct __sysctl_args __user *args) return error; } -int sysctl_data(struct ctl_table *table, int __user *name, int nlen, +int sysctl_data(struct ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { return -ENOSYS; } -int sysctl_string(struct ctl_table *table, int __user *name, int nlen, +int sysctl_string(struct ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { return -ENOSYS; } -int sysctl_intvec(struct ctl_table *table, int __user *name, int nlen, +int sysctl_intvec(struct ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { return -ENOSYS; } -int sysctl_jiffies(struct ctl_table *table, int __user *name, int nlen, +int sysctl_jiffies(struct ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { return -ENOSYS; } -int sysctl_ms_jiffies(struct ctl_table *table, int __user *name, int nlen, +int sysctl_ms_jiffies(struct ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { diff --git a/kernel/time/Kconfig b/kernel/time/Kconfig index 8d53106a0a92..95ed42951e0a 100644 --- a/kernel/time/Kconfig +++ b/kernel/time/Kconfig @@ -3,7 +3,6 @@ # config TICK_ONESHOT bool - default n config NO_HZ bool "Tickless System (Dynamic Ticks)" diff --git a/kernel/utsname_sysctl.c b/kernel/utsname_sysctl.c index 4ab9659d269e..3b34b3545936 100644 --- a/kernel/utsname_sysctl.c +++ b/kernel/utsname_sysctl.c @@ -60,7 +60,7 @@ static int proc_do_uts_string(ctl_table *table, int write, struct file *filp, #ifdef CONFIG_SYSCTL_SYSCALL /* The generic string strategy routine: */ -static int sysctl_uts_string(ctl_table *table, int __user *name, int nlen, +static int sysctl_uts_string(ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { @@ -69,8 +69,7 @@ static int sysctl_uts_string(ctl_table *table, int __user *name, int nlen, write = newval && newlen; memcpy(&uts_table, table, sizeof(uts_table)); uts_table.data = get_uts(table, write); - r = sysctl_string(&uts_table, name, nlen, - oldval, oldlenp, newval, newlen); + r = sysctl_string(&uts_table, oldval, oldlenp, newval, newlen); put_uts(table, write, uts_table.data); return r; } diff --git a/kernel/wait.c b/kernel/wait.c index c275c56cf2d3..cd87131f2fc2 100644 --- a/kernel/wait.c +++ b/kernel/wait.c @@ -72,12 +72,7 @@ prepare_to_wait(wait_queue_head_t *q, wait_queue_t *wait, int state) spin_lock_irqsave(&q->lock, flags); if (list_empty(&wait->task_list)) __add_wait_queue(q, wait); - /* - * don't alter the task state if this is just going to - * queue an async wait queue callback - */ - if (is_sync_wait(wait)) - set_current_state(state); + set_current_state(state); spin_unlock_irqrestore(&q->lock, flags); } EXPORT_SYMBOL(prepare_to_wait); @@ -91,12 +86,7 @@ prepare_to_wait_exclusive(wait_queue_head_t *q, wait_queue_t *wait, int state) spin_lock_irqsave(&q->lock, flags); if (list_empty(&wait->task_list)) __add_wait_queue_tail(q, wait); - /* - * don't alter the task state if this is just going to - * queue an async wait queue callback - */ - if (is_sync_wait(wait)) - set_current_state(state); + set_current_state(state); spin_unlock_irqrestore(&q->lock, flags); } EXPORT_SYMBOL(prepare_to_wait_exclusive); diff --git a/kernel/workqueue.c b/kernel/workqueue.c index 4048e92aa04f..714afad46539 100644 --- a/kernel/workqueue.c +++ b/kernel/workqueue.c @@ -9,7 +9,7 @@ * Derived from the taskqueue/keventd code by: * * David Woodhouse <dwmw2@infradead.org> - * Andrew Morton <andrewm@uow.edu.au> + * Andrew Morton * Kai Petzke <wpp@marie.physik.tu-berlin.de> * Theodore Ts'o <tytso@mit.edu> * diff --git a/lib/Kconfig b/lib/Kconfig index c7ad7a5b3535..85cf7ea978aa 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -8,10 +8,10 @@ config BITREVERSE tristate config GENERIC_FIND_FIRST_BIT - def_bool n + bool config GENERIC_FIND_NEXT_BIT - def_bool n + bool config CRC_CCITT tristate "CRC-CCITT functions" diff --git a/lib/iommu-helper.c b/lib/iommu-helper.c index 5d90074dca75..75dbda03f4fb 100644 --- a/lib/iommu-helper.c +++ b/lib/iommu-helper.c @@ -79,3 +79,12 @@ void iommu_area_free(unsigned long *map, unsigned long start, unsigned int nr) } } EXPORT_SYMBOL(iommu_area_free); + +unsigned long iommu_num_pages(unsigned long addr, unsigned long len, + unsigned long io_page_size) +{ + unsigned long size = (addr & (io_page_size - 1)) + len; + + return DIV_ROUND_UP(size, io_page_size); +} +EXPORT_SYMBOL(iommu_num_pages); diff --git a/lib/vsprintf.c b/lib/vsprintf.c index c399bc1093cb..4c6674a41ed9 100644 --- a/lib/vsprintf.c +++ b/lib/vsprintf.c @@ -565,6 +565,10 @@ static char *pointer(const char *fmt, char *buf, char *end, void *ptr, int field * @fmt: The format string to use * @args: Arguments for the format string * + * This function follows C99 vsnprintf, but has some extensions: + * %pS output the name of a text symbol + * %pF output the name of a function pointer + * * The return value is the number of characters which would * be generated for the given input, excluding the trailing * '\0', as per ISO C99. If you want to have the exact @@ -806,6 +810,8 @@ EXPORT_SYMBOL(vsnprintf); * * Call this function if you are already dealing with a va_list. * You probably want scnprintf() instead. + * + * See the vsnprintf() documentation for format string extensions over C99. */ int vscnprintf(char *buf, size_t size, const char *fmt, va_list args) { @@ -828,6 +834,8 @@ EXPORT_SYMBOL(vscnprintf); * generated for the given input, excluding the trailing null, * as per ISO C99. If the return is greater than or equal to * @size, the resulting string is truncated. + * + * See the vsnprintf() documentation for format string extensions over C99. */ int snprintf(char * buf, size_t size, const char *fmt, ...) { @@ -877,6 +885,8 @@ EXPORT_SYMBOL(scnprintf); * * Call this function if you are already dealing with a va_list. * You probably want sprintf() instead. + * + * See the vsnprintf() documentation for format string extensions over C99. */ int vsprintf(char *buf, const char *fmt, va_list args) { @@ -894,6 +904,8 @@ EXPORT_SYMBOL(vsprintf); * The function returns the number of characters written * into @buf. Use snprintf() or scnprintf() in order to avoid * buffer overflows. + * + * See the vsnprintf() documentation for format string extensions over C99. */ int sprintf(char * buf, const char *fmt, ...) { diff --git a/mm/Kconfig b/mm/Kconfig index 0bd9c2dbb2a0..5585f1293593 100644 --- a/mm/Kconfig +++ b/mm/Kconfig @@ -101,7 +101,7 @@ config HAVE_MEMORY_PRESENT # with gcc 3.4 and later. # config SPARSEMEM_STATIC - def_bool n + bool # # Architecture platforms which require a two level mem_section in SPARSEMEM @@ -113,7 +113,7 @@ config SPARSEMEM_EXTREME depends on SPARSEMEM && !SPARSEMEM_STATIC config SPARSEMEM_VMEMMAP_ENABLE - def_bool n + bool config SPARSEMEM_VMEMMAP bool "Sparse Memory virtual memmap" diff --git a/mm/bootmem.c b/mm/bootmem.c index ad8eec6e44a8..ac5a891f142a 100644 --- a/mm/bootmem.c +++ b/mm/bootmem.c @@ -48,7 +48,7 @@ early_param("bootmem_debug", bootmem_debug_setup); if (unlikely(bootmem_debug)) \ printk(KERN_INFO \ "bootmem::%s " fmt, \ - __FUNCTION__, ## args); \ + __func__, ## args); \ }) static unsigned long __init bootmap_bytes(unsigned long pages) diff --git a/mm/fadvise.c b/mm/fadvise.c index 343cfdfebd9e..a1da969bd980 100644 --- a/mm/fadvise.c +++ b/mm/fadvise.c @@ -3,7 +3,7 @@ * * Copyright (C) 2002, Linus Torvalds * - * 11Jan2003 akpm@digeo.com + * 11Jan2003 Andrew Morton * Initial version. */ diff --git a/mm/filemap.c b/mm/filemap.c index 876bc595d0f8..bf8f9c0c7a83 100644 --- a/mm/filemap.c +++ b/mm/filemap.c @@ -1186,8 +1186,7 @@ out: ra->prev_pos |= prev_offset; *ppos = ((loff_t)index << PAGE_CACHE_SHIFT) + offset; - if (filp) - file_accessed(filp); + file_accessed(filp); } int file_read_actor(read_descriptor_t *desc, struct page *page, diff --git a/mm/hugetlb.c b/mm/hugetlb.c index 67a71191136e..38633864a93e 100644 --- a/mm/hugetlb.c +++ b/mm/hugetlb.c @@ -2008,7 +2008,7 @@ int hugetlb_fault(struct mm_struct *mm, struct vm_area_struct *vma, entry = huge_ptep_get(ptep); if (huge_pte_none(entry)) { ret = hugetlb_no_page(mm, vma, address, ptep, write_access); - goto out_unlock; + goto out_mutex; } ret = 0; @@ -2024,7 +2024,7 @@ int hugetlb_fault(struct mm_struct *mm, struct vm_area_struct *vma, if (write_access && !pte_write(entry)) { if (vma_needs_reservation(h, vma, address) < 0) { ret = VM_FAULT_OOM; - goto out_unlock; + goto out_mutex; } if (!(vma->vm_flags & VM_SHARED)) @@ -2034,10 +2034,23 @@ int hugetlb_fault(struct mm_struct *mm, struct vm_area_struct *vma, spin_lock(&mm->page_table_lock); /* Check for a racing update before calling hugetlb_cow */ - if (likely(pte_same(entry, huge_ptep_get(ptep)))) - if (write_access && !pte_write(entry)) + if (unlikely(!pte_same(entry, huge_ptep_get(ptep)))) + goto out_page_table_lock; + + + if (write_access) { + if (!pte_write(entry)) { ret = hugetlb_cow(mm, vma, address, ptep, entry, pagecache_page); + goto out_page_table_lock; + } + entry = pte_mkdirty(entry); + } + entry = pte_mkyoung(entry); + if (huge_ptep_set_access_flags(vma, address, ptep, entry, write_access)) + update_mmu_cache(vma, address, entry); + +out_page_table_lock: spin_unlock(&mm->page_table_lock); if (pagecache_page) { @@ -2045,7 +2058,7 @@ int hugetlb_fault(struct mm_struct *mm, struct vm_area_struct *vma, put_page(pagecache_page); } -out_unlock: +out_mutex: mutex_unlock(&hugetlb_instantiation_mutex); return ret; diff --git a/mm/page-writeback.c b/mm/page-writeback.c index 24de8b65fdbd..c130a137c129 100644 --- a/mm/page-writeback.c +++ b/mm/page-writeback.c @@ -7,7 +7,7 @@ * Contains functions related to writing back dirty pages at the * address_space level. * - * 10Apr2002 akpm@zip.com.au + * 10Apr2002 Andrew Morton * Initial version */ diff --git a/mm/page_alloc.c b/mm/page_alloc.c index 27b8681139fd..9eb9eb928285 100644 --- a/mm/page_alloc.c +++ b/mm/page_alloc.c @@ -3952,7 +3952,7 @@ static void check_for_regular_memory(pg_data_t *pgdat) void __init free_area_init_nodes(unsigned long *max_zone_pfn) { unsigned long nid; - enum zone_type i; + int i; /* Sort early_node_map as initialisation assumes it is sorted */ sort_node_map(); diff --git a/mm/pdflush.c b/mm/pdflush.c index 0cbe0c60c6bf..a0a14c4d5072 100644 --- a/mm/pdflush.c +++ b/mm/pdflush.c @@ -3,7 +3,7 @@ * * Copyright (C) 2002, Linus Torvalds. * - * 09Apr2002 akpm@zip.com.au + * 09Apr2002 Andrew Morton * Initial version * 29Feb2004 kaos@sgi.com * Move worker thread creation to kthread to avoid chewing diff --git a/mm/readahead.c b/mm/readahead.c index 77e8ddf945e9..6cbd9a72fde2 100644 --- a/mm/readahead.c +++ b/mm/readahead.c @@ -3,7 +3,7 @@ * * Copyright (C) 2002, Linus Torvalds * - * 09Apr2002 akpm@zip.com.au + * 09Apr2002 Andrew Morton * Initial version. */ diff --git a/mm/truncate.c b/mm/truncate.c index 6650c1d878b4..e83e4b114ef1 100644 --- a/mm/truncate.c +++ b/mm/truncate.c @@ -3,7 +3,7 @@ * * Copyright (C) 2002, Linus Torvalds * - * 10Sep2002 akpm@zip.com.au + * 10Sep2002 Andrew Morton * Initial version. */ diff --git a/net/802/fc.c b/net/802/fc.c index cb3475ea6fda..34cf1ee014b8 100644 --- a/net/802/fc.c +++ b/net/802/fc.c @@ -82,13 +82,13 @@ static int fc_header(struct sk_buff *skb, struct net_device *dev, static int fc_rebuild_header(struct sk_buff *skb) { +#ifdef CONFIG_INET struct fch_hdr *fch=(struct fch_hdr *)skb->data; struct fcllc *fcllc=(struct fcllc *)(skb->data+sizeof(struct fch_hdr)); if(fcllc->ethertype != htons(ETH_P_IP)) { printk("fc_rebuild_header: Don't know how to resolve type %04X addresses ?\n", ntohs(fcllc->ethertype)); return 0; } -#ifdef CONFIG_INET return arp_find(fch->daddr, skb); #else return 0; diff --git a/net/bridge/netfilter/Kconfig b/net/bridge/netfilter/Kconfig index 366d3e9d51f8..ba6f73eb06c6 100644 --- a/net/bridge/netfilter/Kconfig +++ b/net/bridge/netfilter/Kconfig @@ -4,6 +4,7 @@ menuconfig BRIDGE_NF_EBTABLES tristate "Ethernet Bridge tables (ebtables) support" + depends on BRIDGE && BRIDGE_NETFILTER select NETFILTER_XTABLES help ebtables is a general, extensible frame/packet identification diff --git a/net/core/net_namespace.c b/net/core/net_namespace.c index b0dc818a91d7..f1d07b5c1e17 100644 --- a/net/core/net_namespace.c +++ b/net/core/net_namespace.c @@ -96,7 +96,7 @@ static void net_free(struct net *net) return; } #endif - + kfree(net->gen); kmem_cache_free(net_cachep, net); } diff --git a/net/decnet/dn_dev.c b/net/decnet/dn_dev.c index 2f0ac3c3eb71..8008c8613027 100644 --- a/net/decnet/dn_dev.c +++ b/net/decnet/dn_dev.c @@ -152,7 +152,7 @@ static struct dn_dev_parms dn_dev_list[] = { #define DN_DEV_LIST_SIZE ARRAY_SIZE(dn_dev_list) -#define DN_DEV_PARMS_OFFSET(x) ((int) ((char *) &((struct dn_dev_parms *)0)->x)) +#define DN_DEV_PARMS_OFFSET(x) offsetof(struct dn_dev_parms, x) #ifdef CONFIG_SYSCTL @@ -166,7 +166,7 @@ static int max_priority[] = { 127 }; /* From DECnet spec */ static int dn_forwarding_proc(ctl_table *, int, struct file *, void __user *, size_t *, loff_t *); -static int dn_forwarding_sysctl(ctl_table *table, int __user *name, int nlen, +static int dn_forwarding_sysctl(ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen); @@ -318,7 +318,7 @@ static int dn_forwarding_proc(ctl_table *table, int write, #endif } -static int dn_forwarding_sysctl(ctl_table *table, int __user *name, int nlen, +static int dn_forwarding_sysctl(ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { diff --git a/net/decnet/sysctl_net_decnet.c b/net/decnet/sysctl_net_decnet.c index 228067c571ba..36400b266896 100644 --- a/net/decnet/sysctl_net_decnet.c +++ b/net/decnet/sysctl_net_decnet.c @@ -132,7 +132,7 @@ static int parse_addr(__le16 *addr, char *str) } -static int dn_node_address_strategy(ctl_table *table, int __user *name, int nlen, +static int dn_node_address_strategy(ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { @@ -217,7 +217,7 @@ static int dn_node_address_handler(ctl_table *table, int write, } -static int dn_def_dev_strategy(ctl_table *table, int __user *name, int nlen, +static int dn_def_dev_strategy(ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { diff --git a/net/ipv4/devinet.c b/net/ipv4/devinet.c index b12dae2b0b2d..5154e729cf16 100644 --- a/net/ipv4/devinet.c +++ b/net/ipv4/devinet.c @@ -1283,7 +1283,7 @@ static int devinet_conf_proc(ctl_table *ctl, int write, return ret; } -static int devinet_conf_sysctl(ctl_table *table, int __user *name, int nlen, +static int devinet_conf_sysctl(ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { @@ -1379,12 +1379,11 @@ int ipv4_doint_and_flush(ctl_table *ctl, int write, return ret; } -int ipv4_doint_and_flush_strategy(ctl_table *table, int __user *name, int nlen, +int ipv4_doint_and_flush_strategy(ctl_table *table, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { - int ret = devinet_conf_sysctl(table, name, nlen, oldval, oldlenp, - newval, newlen); + int ret = devinet_conf_sysctl(table, oldval, oldlenp, newval, newlen); struct net *net = table->extra2; if (ret == 1) diff --git a/net/ipv4/netfilter/nf_defrag_ipv4.c b/net/ipv4/netfilter/nf_defrag_ipv4.c index aa2c50a180f7..fa2d6b6fc3e5 100644 --- a/net/ipv4/netfilter/nf_defrag_ipv4.c +++ b/net/ipv4/netfilter/nf_defrag_ipv4.c @@ -41,12 +41,13 @@ static unsigned int ipv4_conntrack_defrag(unsigned int hooknum, int (*okfn)(struct sk_buff *)) { #if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) +#if !defined(CONFIG_NF_NAT) && !defined(CONFIG_NF_NAT_MODULE) /* Previously seen (loopback)? Ignore. Do this before fragment check. */ if (skb->nfct) return NF_ACCEPT; #endif - +#endif /* Gather fragments. */ if (ip_hdr(skb)->frag_off & htons(IP_MF | IP_OFFSET)) { if (nf_ct_ipv4_gather_frags(skb, diff --git a/net/ipv4/netfilter/nf_nat_core.c b/net/ipv4/netfilter/nf_nat_core.c index 2ac9eaf1a8c9..a65cf692359f 100644 --- a/net/ipv4/netfilter/nf_nat_core.c +++ b/net/ipv4/netfilter/nf_nat_core.c @@ -584,6 +584,98 @@ static struct nf_ct_ext_type nat_extend __read_mostly = { .flags = NF_CT_EXT_F_PREALLOC, }; +#if defined(CONFIG_NF_CT_NETLINK) || defined(CONFIG_NF_CT_NETLINK_MODULE) + +#include <linux/netfilter/nfnetlink.h> +#include <linux/netfilter/nfnetlink_conntrack.h> + +static const struct nla_policy protonat_nla_policy[CTA_PROTONAT_MAX+1] = { + [CTA_PROTONAT_PORT_MIN] = { .type = NLA_U16 }, + [CTA_PROTONAT_PORT_MAX] = { .type = NLA_U16 }, +}; + +static int nfnetlink_parse_nat_proto(struct nlattr *attr, + const struct nf_conn *ct, + struct nf_nat_range *range) +{ + struct nlattr *tb[CTA_PROTONAT_MAX+1]; + const struct nf_nat_protocol *npt; + int err; + + err = nla_parse_nested(tb, CTA_PROTONAT_MAX, attr, protonat_nla_policy); + if (err < 0) + return err; + + npt = nf_nat_proto_find_get(nf_ct_protonum(ct)); + if (npt->nlattr_to_range) + err = npt->nlattr_to_range(tb, range); + nf_nat_proto_put(npt); + return err; +} + +static const struct nla_policy nat_nla_policy[CTA_NAT_MAX+1] = { + [CTA_NAT_MINIP] = { .type = NLA_U32 }, + [CTA_NAT_MAXIP] = { .type = NLA_U32 }, +}; + +static int +nfnetlink_parse_nat(struct nlattr *nat, + const struct nf_conn *ct, struct nf_nat_range *range) +{ + struct nlattr *tb[CTA_NAT_MAX+1]; + int err; + + memset(range, 0, sizeof(*range)); + + err = nla_parse_nested(tb, CTA_NAT_MAX, nat, nat_nla_policy); + if (err < 0) + return err; + + if (tb[CTA_NAT_MINIP]) + range->min_ip = nla_get_be32(tb[CTA_NAT_MINIP]); + + if (!tb[CTA_NAT_MAXIP]) + range->max_ip = range->min_ip; + else + range->max_ip = nla_get_be32(tb[CTA_NAT_MAXIP]); + + if (range->min_ip) + range->flags |= IP_NAT_RANGE_MAP_IPS; + + if (!tb[CTA_NAT_PROTO]) + return 0; + + err = nfnetlink_parse_nat_proto(tb[CTA_NAT_PROTO], ct, range); + if (err < 0) + return err; + + return 0; +} + +static int +nfnetlink_parse_nat_setup(struct nf_conn *ct, + enum nf_nat_manip_type manip, + struct nlattr *attr) +{ + struct nf_nat_range range; + + if (nfnetlink_parse_nat(attr, ct, &range) < 0) + return -EINVAL; + if (nf_nat_initialized(ct, manip)) + return -EEXIST; + + return nf_nat_setup_info(ct, &range, manip); +} +#else +static int +nfnetlink_parse_nat_setup(struct nf_conn *ct, + enum nf_nat_manip_type manip, + struct nlattr *attr) +{ + return -EOPNOTSUPP; +} +#endif + static int __net_init nf_nat_net_init(struct net *net) { net->ipv4.nat_bysource = nf_ct_alloc_hashtable(&nf_nat_htable_size, @@ -654,6 +746,9 @@ static int __init nf_nat_init(void) BUG_ON(nf_nat_seq_adjust_hook != NULL); rcu_assign_pointer(nf_nat_seq_adjust_hook, nf_nat_seq_adjust); + BUG_ON(nfnetlink_parse_nat_setup_hook != NULL); + rcu_assign_pointer(nfnetlink_parse_nat_setup_hook, + nfnetlink_parse_nat_setup); return 0; cleanup_extend: @@ -667,10 +762,12 @@ static void __exit nf_nat_cleanup(void) nf_ct_l3proto_put(l3proto); nf_ct_extend_unregister(&nat_extend); rcu_assign_pointer(nf_nat_seq_adjust_hook, NULL); + rcu_assign_pointer(nfnetlink_parse_nat_setup_hook, NULL); synchronize_net(); } MODULE_LICENSE("GPL"); +MODULE_ALIAS("nf-nat-ipv4"); module_init(nf_nat_init); module_exit(nf_nat_cleanup); diff --git a/net/ipv4/route.c b/net/ipv4/route.c index a6d7c584f53b..942be04e7955 100644 --- a/net/ipv4/route.c +++ b/net/ipv4/route.c @@ -2908,8 +2908,6 @@ static int ipv4_sysctl_rtcache_flush(ctl_table *__ctl, int write, } static int ipv4_sysctl_rtcache_flush_strategy(ctl_table *table, - int __user *name, - int nlen, void __user *oldval, size_t __user *oldlenp, void __user *newval, @@ -2972,16 +2970,13 @@ static int ipv4_sysctl_rt_secret_interval(ctl_table *ctl, int write, } static int ipv4_sysctl_rt_secret_interval_strategy(ctl_table *table, - int __user *name, - int nlen, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { int old = ip_rt_secret_interval; - int ret = sysctl_jiffies(table, name, nlen, oldval, oldlenp, newval, - newlen); + int ret = sysctl_jiffies(table, oldval, oldlenp, newval, newlen); rt_secret_reschedule(old); diff --git a/net/ipv4/sysctl_net_ipv4.c b/net/ipv4/sysctl_net_ipv4.c index 276d047fb85a..1bb10df8ce7d 100644 --- a/net/ipv4/sysctl_net_ipv4.c +++ b/net/ipv4/sysctl_net_ipv4.c @@ -64,8 +64,8 @@ static int ipv4_local_port_range(ctl_table *table, int write, struct file *filp, } /* Validate changes from sysctl interface. */ -static int ipv4_sysctl_local_port_range(ctl_table *table, int __user *name, - int nlen, void __user *oldval, +static int ipv4_sysctl_local_port_range(ctl_table *table, + void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { @@ -80,7 +80,7 @@ static int ipv4_sysctl_local_port_range(ctl_table *table, int __user *name, }; inet_get_local_port_range(range, range + 1); - ret = sysctl_intvec(&tmp, name, nlen, oldval, oldlenp, newval, newlen); + ret = sysctl_intvec(&tmp, oldval, oldlenp, newval, newlen); if (ret == 0 && newval && newlen) { if (range[1] < range[0]) ret = -EINVAL; @@ -109,8 +109,8 @@ static int proc_tcp_congestion_control(ctl_table *ctl, int write, struct file * return ret; } -static int sysctl_tcp_congestion_control(ctl_table *table, int __user *name, - int nlen, void __user *oldval, +static int sysctl_tcp_congestion_control(ctl_table *table, + void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { @@ -122,7 +122,7 @@ static int sysctl_tcp_congestion_control(ctl_table *table, int __user *name, int ret; tcp_get_default_congestion_control(val); - ret = sysctl_string(&tbl, name, nlen, oldval, oldlenp, newval, newlen); + ret = sysctl_string(&tbl, oldval, oldlenp, newval, newlen); if (ret == 1 && newval && newlen) ret = tcp_set_default_congestion_control(val); return ret; @@ -165,8 +165,8 @@ static int proc_allowed_congestion_control(ctl_table *ctl, return ret; } -static int strategy_allowed_congestion_control(ctl_table *table, int __user *name, - int nlen, void __user *oldval, +static int strategy_allowed_congestion_control(ctl_table *table, + void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) @@ -179,7 +179,7 @@ static int strategy_allowed_congestion_control(ctl_table *table, int __user *nam return -ENOMEM; tcp_get_available_congestion_control(tbl.data, tbl.maxlen); - ret = sysctl_string(&tbl, name, nlen, oldval, oldlenp, newval, newlen); + ret = sysctl_string(&tbl, oldval, oldlenp, newval, newlen); if (ret == 1 && newval && newlen) ret = tcp_set_allowed_congestion_control(tbl.data); kfree(tbl.data); diff --git a/net/ipv6/addrconf.c b/net/ipv6/addrconf.c index 7b6a584b62dd..eea9542728ca 100644 --- a/net/ipv6/addrconf.c +++ b/net/ipv6/addrconf.c @@ -3982,7 +3982,6 @@ int addrconf_sysctl_forward(ctl_table *ctl, int write, struct file * filp, } static int addrconf_sysctl_forward_strategy(ctl_table *table, - int __user *name, int nlen, void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) diff --git a/net/ipv6/ndisc.c b/net/ipv6/ndisc.c index 840b15780a36..172438320eec 100644 --- a/net/ipv6/ndisc.c +++ b/net/ipv6/ndisc.c @@ -1199,7 +1199,7 @@ static void ndisc_router_discovery(struct sk_buff *skb) } neigh->flags |= NTF_ROUTER; } else if (rt) { - rt->rt6i_flags |= (rt->rt6i_flags & ~RTF_PREF_MASK) | RTF_PREF(pref); + rt->rt6i_flags = (rt->rt6i_flags & ~RTF_PREF_MASK) | RTF_PREF(pref); } if (rt) @@ -1730,9 +1730,8 @@ int ndisc_ifinfo_sysctl_change(struct ctl_table *ctl, int write, struct file * f return ret; } -int ndisc_ifinfo_sysctl_strategy(ctl_table *ctl, int __user *name, - int nlen, void __user *oldval, - size_t __user *oldlenp, +int ndisc_ifinfo_sysctl_strategy(ctl_table *ctl, + void __user *oldval, size_t __user *oldlenp, void __user *newval, size_t newlen) { struct net_device *dev = ctl->extra1; @@ -1745,13 +1744,11 @@ int ndisc_ifinfo_sysctl_strategy(ctl_table *ctl, int __user *name, switch (ctl->ctl_name) { case NET_NEIGH_REACHABLE_TIME: - ret = sysctl_jiffies(ctl, name, nlen, - oldval, oldlenp, newval, newlen); + ret = sysctl_jiffies(ctl, oldval, oldlenp, newval, newlen); break; case NET_NEIGH_RETRANS_TIME_MS: case NET_NEIGH_REACHABLE_TIME_MS: - ret = sysctl_ms_jiffies(ctl, name, nlen, - oldval, oldlenp, newval, newlen); + ret = sysctl_ms_jiffies(ctl, oldval, oldlenp, newval, newlen); break; default: ret = 0; diff --git a/net/ipv6/netfilter.c b/net/ipv6/netfilter.c index 6b29b03925f1..fd5b3a4e3329 100644 --- a/net/ipv6/netfilter.c +++ b/net/ipv6/netfilter.c @@ -12,6 +12,7 @@ int ip6_route_me_harder(struct sk_buff *skb) { + struct net *net = dev_net(skb->dst->dev); struct ipv6hdr *iph = ipv6_hdr(skb); struct dst_entry *dst; struct flowi fl = { @@ -23,7 +24,7 @@ int ip6_route_me_harder(struct sk_buff *skb) .saddr = iph->saddr, } }, }; - dst = ip6_route_output(dev_net(skb->dst->dev), skb->sk, &fl); + dst = ip6_route_output(net, skb->sk, &fl); #ifdef CONFIG_XFRM if (!(IP6CB(skb)->flags & IP6SKB_XFRM_TRANSFORMED) && @@ -33,8 +34,7 @@ int ip6_route_me_harder(struct sk_buff *skb) #endif if (dst->error) { - IP6_INC_STATS(&init_net, ip6_dst_idev(dst), - IPSTATS_MIB_OUTNOROUTES); + IP6_INC_STATS(net, ip6_dst_idev(dst), IPSTATS_MIB_OUTNOROUTES); LIMIT_NETDEBUG(KERN_DEBUG "ip6_route_me_harder: No more route.\n"); dst_release(dst); return -EINVAL; diff --git a/net/mac80211/debugfs_netdev.c b/net/mac80211/debugfs_netdev.c index 2a4515623776..2ad504fc3414 100644 --- a/net/mac80211/debugfs_netdev.c +++ b/net/mac80211/debugfs_netdev.c @@ -545,8 +545,12 @@ static int netdev_notify(struct notifier_block *nb, sdata = IEEE80211_DEV_TO_SUB_IF(dev); - sprintf(buf, "netdev:%s", dev->name); dir = sdata->debugfsdir; + + if (!dir) + return 0; + + sprintf(buf, "netdev:%s", dev->name); if (!debugfs_rename(dir->d_parent, dir, dir->d_parent, buf)) printk(KERN_ERR "mac80211: debugfs: failed to rename debugfs " "dir to %s\n", buf); diff --git a/net/mac80211/debugfs_sta.c b/net/mac80211/debugfs_sta.c index b9902e425f09..189d0bafa91a 100644 --- a/net/mac80211/debugfs_sta.c +++ b/net/mac80211/debugfs_sta.c @@ -249,11 +249,22 @@ void ieee80211_sta_debugfs_add(struct sta_info *sta) DECLARE_MAC_BUF(mbuf); u8 *mac; + sta->debugfs.add_has_run = true; + if (!stations_dir) return; mac = print_mac(mbuf, sta->sta.addr); + /* + * This might fail due to a race condition: + * When mac80211 unlinks a station, the debugfs entries + * remain, but it is already possible to link a new + * station with the same address which triggers adding + * it to debugfs; therefore, if the old station isn't + * destroyed quickly enough the old station's debugfs + * dir might still be around. + */ sta->debugfs.dir = debugfs_create_dir(mac, stations_dir); if (!sta->debugfs.dir) return; diff --git a/net/mac80211/ieee80211_i.h b/net/mac80211/ieee80211_i.h index 8025b294588b..156e42a003ae 100644 --- a/net/mac80211/ieee80211_i.h +++ b/net/mac80211/ieee80211_i.h @@ -816,8 +816,8 @@ struct ieee802_11_elems { u8 *ext_supp_rates; u8 *wmm_info; u8 *wmm_param; - u8 *ht_cap_elem; - u8 *ht_info_elem; + struct ieee80211_ht_cap *ht_cap_elem; + struct ieee80211_ht_addt_info *ht_info_elem; u8 *mesh_config; u8 *mesh_id; u8 *peer_link; @@ -844,8 +844,6 @@ struct ieee802_11_elems { u8 ext_supp_rates_len; u8 wmm_info_len; u8 wmm_param_len; - u8 ht_cap_elem_len; - u8 ht_info_elem_len; u8 mesh_config_len; u8 mesh_id_len; u8 peer_link_len; diff --git a/net/mac80211/mlme.c b/net/mac80211/mlme.c index 49f86fa56bff..87665d7bb4f9 100644 --- a/net/mac80211/mlme.c +++ b/net/mac80211/mlme.c @@ -1348,10 +1348,8 @@ static void ieee80211_rx_mgmt_assoc_resp(struct ieee80211_sub_if_data *sdata, (ifsta->flags & IEEE80211_STA_WMM_ENABLED)) { struct ieee80211_ht_bss_info bss_info; ieee80211_ht_cap_ie_to_ht_info( - (struct ieee80211_ht_cap *) elems.ht_cap_elem, &sta->sta.ht_info); ieee80211_ht_addt_info_ie_to_ht_bss_info( - (struct ieee80211_ht_addt_info *) elems.ht_info_elem, &bss_info); ieee80211_handle_ht(local, 1, &sta->sta.ht_info, &bss_info); } @@ -1709,7 +1707,6 @@ static void ieee80211_rx_mgmt_beacon(struct ieee80211_sub_if_data *sdata, struct ieee80211_ht_bss_info bss_info; ieee80211_ht_addt_info_ie_to_ht_bss_info( - (struct ieee80211_ht_addt_info *) elems.ht_info_elem, &bss_info); changed |= ieee80211_handle_ht(local, 1, &conf->ht_conf, &bss_info); diff --git a/net/mac80211/scan.c b/net/mac80211/scan.c index 8e6685e7ae85..416bb41099f3 100644 --- a/net/mac80211/scan.c +++ b/net/mac80211/scan.c @@ -388,7 +388,8 @@ ieee80211_scan_rx(struct ieee80211_sub_if_data *sdata, struct sk_buff *skb, bss = ieee80211_bss_info_update(sdata->local, rx_status, mgmt, skb->len, &elems, freq, beacon); - ieee80211_rx_bss_put(sdata->local, bss); + if (bss) + ieee80211_rx_bss_put(sdata->local, bss); dev_kfree_skb(skb); return RX_QUEUED; diff --git a/net/mac80211/sta_info.c b/net/mac80211/sta_info.c index 9b72d15bc8dc..7fef8ea1f5ec 100644 --- a/net/mac80211/sta_info.c +++ b/net/mac80211/sta_info.c @@ -635,7 +635,12 @@ static void sta_info_debugfs_add_work(struct work_struct *work) spin_lock_irqsave(&local->sta_lock, flags); list_for_each_entry(tmp, &local->sta_list, list) { - if (!tmp->debugfs.dir) { + /* + * debugfs.add_has_run will be set by + * ieee80211_sta_debugfs_add regardless + * of what else it does. + */ + if (!tmp->debugfs.add_has_run) { sta = tmp; __sta_info_pin(sta); break; diff --git a/net/mac80211/sta_info.h b/net/mac80211/sta_info.h index a6b51862a89d..168a39a298bd 100644 --- a/net/mac80211/sta_info.h +++ b/net/mac80211/sta_info.h @@ -300,6 +300,7 @@ struct sta_info { struct dentry *inactive_ms; struct dentry *last_seq_ctrl; struct dentry *agg_status; + bool add_has_run; } debugfs; #endif diff --git a/net/mac80211/util.c b/net/mac80211/util.c index f32561ec224c..cee4884b9d06 100644 --- a/net/mac80211/util.c +++ b/net/mac80211/util.c @@ -529,12 +529,12 @@ void ieee802_11_parse_elems(u8 *start, size_t len, elems->ext_supp_rates_len = elen; break; case WLAN_EID_HT_CAPABILITY: - elems->ht_cap_elem = pos; - elems->ht_cap_elem_len = elen; + if (elen >= sizeof(struct ieee80211_ht_cap)) + elems->ht_cap_elem = (void *)pos; break; case WLAN_EID_HT_EXTRA_INFO: - elems->ht_info_elem = pos; - elems->ht_info_elem_len = elen; + if (elen >= sizeof(struct ieee80211_ht_addt_info)) + elems->ht_info_elem = (void *)pos; break; case WLAN_EID_MESH_ID: elems->mesh_id = pos; diff --git a/net/mac80211/wext.c b/net/mac80211/wext.c index 7e0d53abde24..742f811ca416 100644 --- a/net/mac80211/wext.c +++ b/net/mac80211/wext.c @@ -775,7 +775,7 @@ static int ieee80211_ioctl_siwfrag(struct net_device *dev, * configure it here */ if (local->ops->set_frag_threshold) - local->ops->set_frag_threshold( + return local->ops->set_frag_threshold( local_to_hw(local), local->fragmentation_threshold); diff --git a/net/netfilter/nf_conntrack_acct.c b/net/netfilter/nf_conntrack_acct.c index 03591d37b9cc..b92df5c1dfcf 100644 --- a/net/netfilter/nf_conntrack_acct.c +++ b/net/netfilter/nf_conntrack_acct.c @@ -115,7 +115,7 @@ int nf_conntrack_acct_init(struct net *net) if (net_eq(net, &init_net)) { #ifdef CONFIG_NF_CT_ACCT - printk(KERN_WARNING "CONFIG_NF_CT_ACCT is deprecated and will be removed soon. Plase use\n"); + printk(KERN_WARNING "CONFIG_NF_CT_ACCT is deprecated and will be removed soon. Please use\n"); printk(KERN_WARNING "nf_conntrack.acct=1 kernel paramater, acct=1 nf_conntrack module option or\n"); printk(KERN_WARNING "sysctl net.netfilter.nf_conntrack_acct=1 to enable it.\n"); #endif diff --git a/net/netfilter/nf_conntrack_core.c b/net/netfilter/nf_conntrack_core.c index 27de3c7b006e..622d7c671cb7 100644 --- a/net/netfilter/nf_conntrack_core.c +++ b/net/netfilter/nf_conntrack_core.c @@ -38,9 +38,16 @@ #include <net/netfilter/nf_conntrack_core.h> #include <net/netfilter/nf_conntrack_extend.h> #include <net/netfilter/nf_conntrack_acct.h> +#include <net/netfilter/nf_nat.h> #define NF_CONNTRACK_VERSION "0.5.0" +unsigned int +(*nfnetlink_parse_nat_setup_hook)(struct nf_conn *ct, + enum nf_nat_manip_type manip, + struct nlattr *attr) __read_mostly; +EXPORT_SYMBOL_GPL(nfnetlink_parse_nat_setup_hook); + DEFINE_SPINLOCK(nf_conntrack_lock); EXPORT_SYMBOL_GPL(nf_conntrack_lock); diff --git a/net/netfilter/nf_conntrack_netlink.c b/net/netfilter/nf_conntrack_netlink.c index cadfd15b44f6..08e82d64eb6f 100644 --- a/net/netfilter/nf_conntrack_netlink.c +++ b/net/netfilter/nf_conntrack_netlink.c @@ -689,71 +689,6 @@ ctnetlink_parse_tuple(struct nlattr *cda[], struct nf_conntrack_tuple *tuple, return 0; } -#ifdef CONFIG_NF_NAT_NEEDED -static const struct nla_policy protonat_nla_policy[CTA_PROTONAT_MAX+1] = { - [CTA_PROTONAT_PORT_MIN] = { .type = NLA_U16 }, - [CTA_PROTONAT_PORT_MAX] = { .type = NLA_U16 }, -}; - -static int nfnetlink_parse_nat_proto(struct nlattr *attr, - const struct nf_conn *ct, - struct nf_nat_range *range) -{ - struct nlattr *tb[CTA_PROTONAT_MAX+1]; - const struct nf_nat_protocol *npt; - int err; - - err = nla_parse_nested(tb, CTA_PROTONAT_MAX, attr, protonat_nla_policy); - if (err < 0) - return err; - - npt = nf_nat_proto_find_get(nf_ct_protonum(ct)); - if (npt->nlattr_to_range) - err = npt->nlattr_to_range(tb, range); - nf_nat_proto_put(npt); - return err; -} - -static const struct nla_policy nat_nla_policy[CTA_NAT_MAX+1] = { - [CTA_NAT_MINIP] = { .type = NLA_U32 }, - [CTA_NAT_MAXIP] = { .type = NLA_U32 }, -}; - -static inline int -nfnetlink_parse_nat(struct nlattr *nat, - const struct nf_conn *ct, struct nf_nat_range *range) -{ - struct nlattr *tb[CTA_NAT_MAX+1]; - int err; - - memset(range, 0, sizeof(*range)); - - err = nla_parse_nested(tb, CTA_NAT_MAX, nat, nat_nla_policy); - if (err < 0) - return err; - - if (tb[CTA_NAT_MINIP]) - range->min_ip = nla_get_be32(tb[CTA_NAT_MINIP]); - - if (!tb[CTA_NAT_MAXIP]) - range->max_ip = range->min_ip; - else - range->max_ip = nla_get_be32(tb[CTA_NAT_MAXIP]); - - if (range->min_ip) - range->flags |= IP_NAT_RANGE_MAP_IPS; - - if (!tb[CTA_NAT_PROTO]) - return 0; - - err = nfnetlink_parse_nat_proto(tb[CTA_NAT_PROTO], ct, range); - if (err < 0) - return err; - - return 0; -} -#endif - static inline int ctnetlink_parse_help(struct nlattr *attr, char **helper_name) { @@ -879,6 +814,34 @@ out: } static int +ctnetlink_parse_nat_setup(struct nf_conn *ct, + enum nf_nat_manip_type manip, + struct nlattr *attr) +{ + typeof(nfnetlink_parse_nat_setup_hook) parse_nat_setup; + + parse_nat_setup = rcu_dereference(nfnetlink_parse_nat_setup_hook); + if (!parse_nat_setup) { +#ifdef CONFIG_KMOD + rcu_read_unlock(); + nfnl_unlock(); + if (request_module("nf-nat-ipv4") < 0) { + nfnl_lock(); + rcu_read_lock(); + return -EOPNOTSUPP; + } + nfnl_lock(); + rcu_read_lock(); + if (nfnetlink_parse_nat_setup_hook) + return -EAGAIN; +#endif + return -EOPNOTSUPP; + } + + return parse_nat_setup(ct, manip, attr); +} + +static int ctnetlink_change_status(struct nf_conn *ct, struct nlattr *cda[]) { unsigned long d; @@ -897,31 +860,6 @@ ctnetlink_change_status(struct nf_conn *ct, struct nlattr *cda[]) /* ASSURED bit can only be set */ return -EBUSY; - if (cda[CTA_NAT_SRC] || cda[CTA_NAT_DST]) { -#ifndef CONFIG_NF_NAT_NEEDED - return -EOPNOTSUPP; -#else - struct nf_nat_range range; - - if (cda[CTA_NAT_DST]) { - if (nfnetlink_parse_nat(cda[CTA_NAT_DST], ct, - &range) < 0) - return -EINVAL; - if (nf_nat_initialized(ct, IP_NAT_MANIP_DST)) - return -EEXIST; - nf_nat_setup_info(ct, &range, IP_NAT_MANIP_DST); - } - if (cda[CTA_NAT_SRC]) { - if (nfnetlink_parse_nat(cda[CTA_NAT_SRC], ct, - &range) < 0) - return -EINVAL; - if (nf_nat_initialized(ct, IP_NAT_MANIP_SRC)) - return -EEXIST; - nf_nat_setup_info(ct, &range, IP_NAT_MANIP_SRC); - } -#endif - } - /* Be careful here, modifying NAT bits can screw up things, * so don't let users modify them directly if they don't pass * nf_nat_range. */ @@ -929,6 +867,31 @@ ctnetlink_change_status(struct nf_conn *ct, struct nlattr *cda[]) return 0; } +static int +ctnetlink_change_nat(struct nf_conn *ct, struct nlattr *cda[]) +{ +#ifdef CONFIG_NF_NAT_NEEDED + int ret; + + if (cda[CTA_NAT_DST]) { + ret = ctnetlink_parse_nat_setup(ct, + IP_NAT_MANIP_DST, + cda[CTA_NAT_DST]); + if (ret < 0) + return ret; + } + if (cda[CTA_NAT_SRC]) { + ret = ctnetlink_parse_nat_setup(ct, + IP_NAT_MANIP_SRC, + cda[CTA_NAT_SRC]); + if (ret < 0) + return ret; + } + return 0; +#else + return -EOPNOTSUPP; +#endif +} static inline int ctnetlink_change_helper(struct nf_conn *ct, struct nlattr *cda[]) @@ -1157,6 +1120,14 @@ ctnetlink_create_conntrack(struct nlattr *cda[], } } + if (cda[CTA_NAT_SRC] || cda[CTA_NAT_DST]) { + err = ctnetlink_change_nat(ct, cda); + if (err < 0) { + rcu_read_unlock(); + goto err; + } + } + if (cda[CTA_PROTOINFO]) { err = ctnetlink_change_protoinfo(ct, cda); if (err < 0) { diff --git a/net/netfilter/nfnetlink.c b/net/netfilter/nfnetlink.c index b75c9c4a995d..4739f9f961d8 100644 --- a/net/netfilter/nfnetlink.c +++ b/net/netfilter/nfnetlink.c @@ -44,15 +44,17 @@ static struct sock *nfnl = NULL; static const struct nfnetlink_subsystem *subsys_table[NFNL_SUBSYS_COUNT]; static DEFINE_MUTEX(nfnl_mutex); -static inline void nfnl_lock(void) +void nfnl_lock(void) { mutex_lock(&nfnl_mutex); } +EXPORT_SYMBOL_GPL(nfnl_lock); -static inline void nfnl_unlock(void) +void nfnl_unlock(void) { mutex_unlock(&nfnl_mutex); } +EXPORT_SYMBOL_GPL(nfnl_unlock); int nfnetlink_subsys_register(const struct nfnetlink_subsystem *n) { @@ -132,6 +134,7 @@ static int nfnetlink_rcv_msg(struct sk_buff *skb, struct nlmsghdr *nlh) return 0; type = nlh->nlmsg_type; +replay: ss = nfnetlink_get_subsys(type); if (!ss) { #ifdef CONFIG_KMOD @@ -165,7 +168,10 @@ static int nfnetlink_rcv_msg(struct sk_buff *skb, struct nlmsghdr *nlh) } else return -EINVAL; - return nc->call(nfnl, skb, nlh, cda); + err = nc->call(nfnl, skb, nlh, cda); + if (err == -EAGAIN) + goto replay; + return err; } } diff --git a/net/wireless/core.c b/net/wireless/core.c index 24fdd4cd22cb..5031db7b275b 100644 --- a/net/wireless/core.c +++ b/net/wireless/core.c @@ -184,7 +184,8 @@ int cfg80211_dev_rename(struct cfg80211_registered_device *rdev, if (result) goto out_unlock; - if (!debugfs_rename(rdev->wiphy.debugfsdir->d_parent, + if (rdev->wiphy.debugfsdir && + !debugfs_rename(rdev->wiphy.debugfsdir->d_parent, rdev->wiphy.debugfsdir, rdev->wiphy.debugfsdir->d_parent, newname)) @@ -317,6 +318,8 @@ int wiphy_register(struct wiphy *wiphy) drv->wiphy.debugfsdir = debugfs_create_dir(wiphy_name(&drv->wiphy), ieee80211_debugfs_dir); + if (IS_ERR(drv->wiphy.debugfsdir)) + drv->wiphy.debugfsdir = NULL; res = 0; out_unlock: diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index bc6779398229..e30bac141b21 100755 --- a/scripts/checkpatch.pl +++ b/scripts/checkpatch.pl @@ -9,7 +9,7 @@ use strict; my $P = $0; $P =~ s@.*/@@g; -my $V = '0.21'; +my $V = '0.24'; use Getopt::Long qw(:config no_auto_abbrev); @@ -66,6 +66,7 @@ if ($#ARGV < 0) { my $dbg_values = 0; my $dbg_possible = 0; my $dbg_type = 0; +my $dbg_attr = 0; for my $key (keys %debug) { eval "\${dbg_$key} = '$debug{$key}';" } @@ -112,7 +113,10 @@ our $Attribute = qr{ const| __read_mostly| __kprobes| - __(?:mem|cpu|dev|)(?:initdata|init) + __(?:mem|cpu|dev|)(?:initdata|init)| + ____cacheline_aligned| + ____cacheline_aligned_in_smp| + ____cacheline_internodealigned_in_smp }x; our $Modifier; our $Inline = qr{inline|__always_inline|noinline}; @@ -142,6 +146,11 @@ our $UTF8 = qr { | \xF4[\x80-\x8F][\x80-\xBF]{2} # plane 16 }x; +our $typeTypedefs = qr{(?x: + (?:__)?(?:u|s|be|le)(?:\d|\d\d)| + atomic_t +)}; + our @typeList = ( qr{void}, qr{(?:unsigned\s+)?char}, @@ -155,7 +164,6 @@ our @typeList = ( qr{float}, qr{double}, qr{bool}, - qr{(?:__)?(?:u|s|be|le)(?:8|16|32|64)}, qr{struct\s+$Ident}, qr{union\s+$Ident}, qr{enum\s+$Ident}, @@ -175,6 +183,7 @@ sub build_types { (?:$Modifier\s+|const\s+)* (?: (?:typeof|__typeof__)\s*\(\s*\**\s*$Ident\s*\)| + (?:$typeTypedefs\b)| (?:${all}\b) ) (?:\s+$Modifier|\s+const)* @@ -331,7 +340,7 @@ sub sanitise_line { $off++; next; } - if (substr($line, $off, 2) eq '*/') { + if ($sanitise_quote eq '*/' && substr($line, $off, 2) eq '*/') { $sanitise_quote = ''; substr($res, $off, 2, "$;$;"); $off++; @@ -404,6 +413,7 @@ sub ctx_statement_block { # context. if ($off >= $len) { for (; $remain > 0; $line++) { + last if (!defined $lines[$line]); next if ($lines[$line] =~ /^-/); $remain--; $loff = $len; @@ -669,6 +679,22 @@ sub ctx_has_comment { return ($cmt ne ''); } +sub raw_line { + my ($linenr, $cnt) = @_; + + my $offset = $linenr - 1; + $cnt++; + + my $line; + while ($cnt) { + $line = $rawlines[$offset++]; + next if (defined($line) && $line =~ /^-/); + $cnt--; + } + + return $line; +} + sub cat_vet { my ($vet) = @_; my ($res, $coded); @@ -782,9 +808,9 @@ sub annotate_values { } $type = 'N'; - } elsif ($cur =~ /^(if|while|typeof|__typeof__|for)\b/o) { + } elsif ($cur =~ /^(if|while|for)\b/o) { print "COND($1)\n" if ($dbg_values > 1); - $av_pending = 'N'; + $av_pending = 'E'; $type = 'N'; } elsif ($cur =~/^(case)/o) { @@ -792,7 +818,7 @@ sub annotate_values { $av_pend_colon = 'C'; $type = 'N'; - } elsif ($cur =~/^(return|else|goto)/o) { + } elsif ($cur =~/^(return|else|goto|typeof|__typeof__)\b/o) { print "KEYWORD($1)\n" if ($dbg_values > 1); $type = 'N'; @@ -858,7 +884,7 @@ sub annotate_values { print "CLOSE($1)\n" if ($dbg_values > 1); $type = 'N'; - } elsif ($cur =~ /^(-(?![->])|\+(?!\+)|\*|\&(?!\&))/o) { + } elsif ($cur =~ /^(-(?![->])|\+(?!\+)|\*|\&\&|\&)/o) { my $variant; print "OPV($1)\n" if ($dbg_values > 1); @@ -892,12 +918,22 @@ sub annotate_values { sub possible { my ($possible, $line) = @_; - print "CHECK<$possible> ($line)\n" if ($dbg_possible > 1); - if ($possible !~ /^(?:$Modifier|$Storage|$Type|DEFINE_\S+)$/ && - $possible ne 'goto' && $possible ne 'return' && - $possible ne 'case' && $possible ne 'else' && - $possible ne 'asm' && $possible ne '__asm__' && - $possible !~ /^(typedef|struct|enum)\b/) { + print "CHECK<$possible> ($line)\n" if ($dbg_possible > 2); + if ($possible !~ /(?: + ^(?: + $Modifier| + $Storage| + $Type| + DEFINE_\S+| + goto| + return| + case| + else| + asm|__asm__| + do + )$| + ^(?:typedef|struct|enum)\b + )/x) { # Check for modifiers. $possible =~ s/\s*$Storage\s*//g; $possible =~ s/\s*$Sparse\s*//g; @@ -915,6 +951,8 @@ sub possible { push(@typeList, $possible); } build_types(); + } else { + warn "NOTPOSS: $possible ($line)\n" if ($dbg_possible > 1); } } @@ -954,6 +992,33 @@ sub CHK { } } +sub check_absolute_file { + my ($absolute, $herecurr) = @_; + my $file = $absolute; + + ##print "absolute<$absolute>\n"; + + # See if any suffix of this path is a path within the tree. + while ($file =~ s@^[^/]*/@@) { + if (-f "$root/$file") { + ##print "file<$file>\n"; + last; + } + } + if (! -f _) { + return 0; + } + + # It is, so see if the prefix is acceptable. + my $prefix = $absolute; + substr($prefix, -length($file)) = ''; + + ##print "prefix<$prefix>\n"; + if ($prefix ne ".../") { + WARN("use relative pathname instead of absolute in changelog text\n" . $herecurr); + } +} + sub process { my $filename = shift; @@ -991,6 +1056,7 @@ sub process { # suppression flags my %suppress_ifbraces; + my %suppress_whiletrailers; # Pre-scan the patch sanitizing the lines. # Pre-scan the patch looking for any __setup documentation. @@ -1025,9 +1091,14 @@ sub process { # edge is a close comment then we must be in a comment # at context start. my $edge; - for (my $ln = $linenr + 1; $ln < ($linenr + $realcnt); $ln++) { - next if ($line =~ /^-/); - ($edge) = ($rawlines[$ln - 1] =~ m@(/\*|\*/)@); + my $cnt = $realcnt; + for (my $ln = $linenr + 1; $cnt > 0; $ln++) { + next if (defined $rawlines[$ln - 1] && + $rawlines[$ln - 1] =~ /^-/); + $cnt--; + #print "RAW<$rawlines[$ln - 1]>\n"; + ($edge) = (defined $rawlines[$ln - 1] && + $rawlines[$ln - 1] =~ m@(/\*|\*/)@); last if (defined $edge); } if (defined $edge && $edge eq '*/') { @@ -1075,6 +1146,7 @@ sub process { $linenr++; my $rawline = $rawlines[$linenr - 1]; + my $hunk_line = ($realcnt != 0); #extract the line range in the file after the patch is applied if ($line=~/^\@\@ -\d+(?:,\d+)? \+(\d+)(,(\d+))? \@\@/) { @@ -1090,6 +1162,7 @@ sub process { $prev_values = 'E'; %suppress_ifbraces = (); + %suppress_whiletrailers = (); next; # track the line number as we move through the hunk, note that @@ -1125,7 +1198,7 @@ sub process { $realfile = $1; $realfile =~ s@^[^/]*/@@; - if ($realfile =~ m@include/asm/@) { + if ($realfile =~ m@^include/asm/@) { ERROR("do not modify files in include/asm, change architecture specific files in include/asm-<architecture>\n" . "$here$rawline\n"); } next; @@ -1159,6 +1232,20 @@ sub process { $herecurr) if (!$emitted_corrupt++); } +# Check for absolute kernel paths. + if ($tree) { + while ($line =~ m{(?:^|\s)(/\S*)}g) { + my $file = $1; + + if ($file =~ m{^(.*?)(?::\d+)+:?$} && + check_absolute_file($1, $herecurr)) { + # + } else { + check_absolute_file($file, $herecurr); + } + } + } + # UTF-8 regex found at http://www.w3.org/International/questions/qa-forms-utf-8.en.php if (($realfile =~ /^$/ || $line =~ /^\+/) && $rawline !~ m/^$UTF8*$/) { @@ -1171,11 +1258,8 @@ sub process { ERROR("Invalid UTF-8, patch and commit message should be encoded in UTF-8\n" . $hereptr); } -#ignore lines being removed - if ($line=~/^-/) {next;} - -# check we are in a valid source file if not then ignore this hunk - next if ($realfile !~ /\.(h|c|s|S|pl|sh)$/); +# ignore non-hunk lines and lines being removed + next if (!$hunk_line || $line =~ /^-/); #trailing whitespace if ($line =~ /^\+.*\015/) { @@ -1186,6 +1270,10 @@ sub process { my $herevet = "$here\n" . cat_vet($rawline) . "\n"; ERROR("trailing whitespace\n" . $herevet); } + +# check we are in a valid source file if not then ignore this hunk + next if ($realfile !~ /\.(h|c|s|S|pl|sh)$/); + #80 column limit if ($line =~ /^\+/ && $prevrawline !~ /\/\*\*/ && $rawline !~ /^.\s*\*\s*\@$Ident\s/ && @@ -1200,8 +1288,8 @@ sub process { WARN("adding a line without newline at end of file\n" . $herecurr); } -# check we are in a valid source file *.[hc] if not then ignore this hunk - next if ($realfile !~ /\.[hc]$/); +# check we are in a valid source file C or perl if not then ignore this hunk + next if ($realfile !~ /\.(h|c|pl)$/); # at the beginning of a line any tabs must come first and anything # more than 8 must use tabs. @@ -1211,15 +1299,18 @@ sub process { ERROR("code indent should use tabs where possible\n" . $herevet); } +# check we are in a valid C source file if not then ignore this hunk + next if ($realfile !~ /\.(h|c)$/); + # check for RCS/CVS revision markers if ($rawline =~ /^\+.*\$(Revision|Log|Id)(?:\$|)/) { WARN("CVS style keyword markers, these will _not_ be updated\n". $herecurr); } # Check for potential 'bare' types - my ($stat, $cond, $line_nr_next, $remain_next); + my ($stat, $cond, $line_nr_next, $remain_next, $off_next); if ($realcnt && $line =~ /.\s*\S/) { - ($stat, $cond, $line_nr_next, $remain_next) = + ($stat, $cond, $line_nr_next, $remain_next, $off_next) = ctx_statement_block($linenr, $realcnt, 0); $stat =~ s/\n./\n /g; $cond =~ s/\n./\n /g; @@ -1240,7 +1331,7 @@ sub process { possible($type, "A:" . $s); # definitions in global scope can only start with types - } elsif ($s =~ /^.(?:$Storage\s+)?(?:$Inline\s+)?(?:const\s+)?($Ident)\b/s) { + } elsif ($s =~ /^.(?:$Storage\s+)?(?:$Inline\s+)?(?:const\s+)?($Ident)\b\s*(?!:)/s) { possible($1, "B:" . $s); } @@ -1294,10 +1385,6 @@ sub process { ERROR("switch and case should be at the same indent\n$hereline$err"); } } - if ($line =~ /^.\s*(?:case\s*.*|default\s*):/g && - $line !~ /\G(?:\s*{)?(?:\s*$;*)(?:\s*\\)?\s*$/g) { - ERROR("trailing statements should be on next line\n" . $herecurr); - } # if/while/etc brace do not go on next line, unless defining a do while loop, # or if that brace on the next line is for something else @@ -1338,6 +1425,91 @@ sub process { } } +# Check relative indent for conditionals and blocks. + if ($line =~ /\b(?:(?:if|while|for)\s*\(|do\b)/ && $line !~ /^.\s*#/ && $line !~ /\}\s*while\s*/) { + my ($s, $c) = ($stat, $cond); + + substr($s, 0, length($c), ''); + + # Make sure we remove the line prefixes as we have + # none on the first line, and are going to readd them + # where necessary. + $s =~ s/\n./\n/gs; + + # Find out how long the conditional actually is. + my @newlines = ($c =~ /\n/gs); + my $cond_lines = 1 + $#newlines; + + # We want to check the first line inside the block + # starting at the end of the conditional, so remove: + # 1) any blank line termination + # 2) any opening brace { on end of the line + # 3) any do (...) { + my $continuation = 0; + my $check = 0; + $s =~ s/^.*\bdo\b//; + $s =~ s/^\s*{//; + if ($s =~ s/^\s*\\//) { + $continuation = 1; + } + if ($s =~ s/^\s*?\n//) { + $check = 1; + $cond_lines++; + } + + # Also ignore a loop construct at the end of a + # preprocessor statement. + if (($prevline =~ /^.\s*#\s*define\s/ || + $prevline =~ /\\\s*$/) && $continuation == 0) { + $check = 0; + } + + my $cond_ptr = -1; + $continuation = 0; + while ($cond_ptr != $cond_lines) { + $cond_ptr = $cond_lines; + + # If we see an #else/#elif then the code + # is not linear. + if ($s =~ /^\s*\#\s*(?:else|elif)/) { + $check = 0; + } + + # Ignore: + # 1) blank lines, they should be at 0, + # 2) preprocessor lines, and + # 3) labels. + if ($continuation || + $s =~ /^\s*?\n/ || + $s =~ /^\s*#\s*?/ || + $s =~ /^\s*$Ident\s*:/) { + $continuation = ($s =~ /^.*?\\\n/) ? 1 : 0; + $s =~ s/^.*?\n//; + $cond_lines++; + } + } + + my (undef, $sindent) = line_stats("+" . $s); + my $stat_real = raw_line($linenr, $cond_lines); + + # Check if either of these lines are modified, else + # this is not this patch's fault. + if (!defined($stat_real) || + $stat !~ /^\+/ && $stat_real !~ /^\+/) { + $check = 0; + } + if (defined($stat_real) && $cond_lines > 1) { + $stat_real = "[...]\n$stat_real"; + } + + #print "line<$line> prevline<$prevline> indent<$indent> sindent<$sindent> check<$check> continuation<$continuation> s<$s> cond_lines<$cond_lines> stat_real<$stat_real> stat<$stat>\n"; + + if ($check && (($sindent % 8) != 0 || + ($sindent <= $indent && $s ne ''))) { + WARN("suspect code indent for conditional statements ($indent, $sindent)\n" . $herecurr . "$stat_real\n"); + } + } + # Track the 'values' across context and added lines. my $opline = $line; $opline =~ s/^./ /; my ($curr_values, $curr_vars) = @@ -1363,6 +1535,15 @@ sub process { } next; } +# TEST: allow direct testing of the attribute matcher. + if ($dbg_attr) { + if ($line =~ /^.\s*$Attribute\s*$/) { + ERROR("TEST: is attr\n" . $herecurr); + } elsif ($dbg_attr > 1 && $line =~ /^.+($Attribute)/) { + ERROR("TEST: is not attr ($1 is)\n". $herecurr); + } + next; + } # check for initialisation to aggregates open brace on the next line if ($prevline =~ /$Declare\s*$Ident\s*=\s*$/ && @@ -1395,13 +1576,14 @@ sub process { if (($line =~ /EXPORT_SYMBOL.*\((.*)\)/) || ($line =~ /EXPORT_UNUSED_SYMBOL.*\((.*)\)/)) { my $name = $1; - if (($prevline !~ /^}/) && - ($prevline !~ /^\+}/) && - ($prevline !~ /^ }/) && - ($prevline !~ /^.DECLARE_$Ident\(\Q$name\E\)/) && - ($prevline !~ /^.LIST_HEAD\(\Q$name\E\)/) && - ($prevline !~ /^.$Type\s*\(\s*\*\s*\Q$name\E\s*\)\s*\(/) && - ($prevline !~ /\b\Q$name\E(?:\s+$Attribute)?\s*(?:;|=|\[)/)) { + if ($prevline !~ /(?: + ^.}| + ^.DEFINE_$Ident\(\Q$name\E\)| + ^.DECLARE_$Ident\(\Q$name\E\)| + ^.LIST_HEAD\(\Q$name\E\)| + ^.$Type\s*\(\s*\*\s*\Q$name\E\s*\)\s*\(| + \b\Q$name\E(?:\s+$Attribute)?\s*(?:;|=|\[) + )/x) { WARN("EXPORT_SYMBOL(foo); should immediately follow its function/variable\n" . $herecurr); } } @@ -1422,6 +1604,7 @@ sub process { if ($line =~ /\btypedef\s/ && $line !~ /\btypedef\s+$Type\s+\(\s*\*?$Ident\s*\)\s*\(/ && $line !~ /\btypedef\s+$Type\s+$Ident\s*\(/ && + $line !~ /\b$typeTypedefs\b/ && $line !~ /\b__bitwise(?:__|)\b/) { WARN("do not add new typedefs\n" . $herecurr); } @@ -1493,11 +1676,13 @@ sub process { # check for spacing round square brackets; allowed: # 1. with a type on the left -- int [] a; -# 2. at the beginning of a line for slice initialisers -- [0..10] = 5, +# 2. at the beginning of a line for slice initialisers -- [0...10] = 5, +# 3. inside a curly brace -- = { [0...10] = 5 } while ($line =~ /(.*?\s)\[/g) { my ($where, $prefix) = ($-[1], $1); if ($prefix !~ /$Type\s+$/ && - ($where != 0 || $prefix !~ /^.\s+$/)) { + ($where != 0 || $prefix !~ /^.\s+$/) && + $prefix !~ /{\s+$/) { ERROR("space prohibited before open square bracket '['\n" . $herecurr); } } @@ -1632,7 +1817,7 @@ sub process { # unary operator, or a cast } elsif ($op eq '!' || $op eq '~' || $opv eq '*U' || $opv eq '-U' || - $opv eq '&U') { + $opv eq '&U' || $opv eq '&&U') { if ($ctx !~ /[WEBC]x./ && $ca !~ /(?:\)|!|~|\*|-|\&|\||\+\+|\-\-|\{)$/) { ERROR("space required before that '$op' $at\n" . $hereptr); } @@ -1785,7 +1970,26 @@ sub process { # Check for illegal assignment in if conditional -- and check for trailing # statements after the conditional. - if ($line =~ /\b(?:if|while|for)\s*\(/ && $line !~ /^.\s*#/) { + if ($line =~ /do\s*(?!{)/) { + my ($stat_next) = ctx_statement_block($line_nr_next, + $remain_next, $off_next); + $stat_next =~ s/\n./\n /g; + ##print "stat<$stat> stat_next<$stat_next>\n"; + + if ($stat_next =~ /^\s*while\b/) { + # If the statement carries leading newlines, + # then count those as offsets. + my ($whitespace) = + ($stat_next =~ /^((?:\s*\n[+-])*\s*)/s); + my $offset = + statement_rawlines($whitespace) - 1; + + $suppress_whiletrailers{$line_nr_next + + $offset} = 1; + } + } + if (!defined $suppress_whiletrailers{$linenr} && + $line =~ /\b(?:if|while|for)\s*\(/ && $line !~ /^.\s*#/) { my ($s, $c) = ($stat, $cond); if ($c =~ /\bif\s*\(.*[^<>!=]=[^=].*/) { @@ -1800,57 +2004,16 @@ sub process { if (length($c) && $s !~ /^\s*{?\s*\\*\s*$/ && $c !~ /}\s*while\s*/) { - ERROR("trailing statements should be on next line\n" . $herecurr); - } - } - -# Check relative indent for conditionals and blocks. - if ($line =~ /\b(?:(?:if|while|for)\s*\(|do\b)/ && $line !~ /^.\s*#/ && $line !~ /\}\s*while\s*/) { - my ($s, $c) = ($stat, $cond); - - substr($s, 0, length($c), ''); + # Find out how long the conditional actually is. + my @newlines = ($c =~ /\n/gs); + my $cond_lines = 1 + $#newlines; - # Make sure we remove the line prefixes as we have - # none on the first line, and are going to readd them - # where necessary. - $s =~ s/\n./\n/gs; - - # We want to check the first line inside the block - # starting at the end of the conditional, so remove: - # 1) any blank line termination - # 2) any opening brace { on end of the line - # 3) any do (...) { - my $continuation = 0; - my $check = 0; - $s =~ s/^.*\bdo\b//; - $s =~ s/^\s*{//; - if ($s =~ s/^\s*\\//) { - $continuation = 1; - } - if ($s =~ s/^\s*\n//) { - $check = 1; - } - - # Also ignore a loop construct at the end of a - # preprocessor statement. - if (($prevline =~ /^.\s*#\s*define\s/ || - $prevline =~ /\\\s*$/) && $continuation == 0) { - $check = 0; - } - - # Ignore the current line if its is a preprocessor - # line. - if ($s =~ /^\s*#\s*/) { - $check = 0; - } - - my (undef, $sindent) = line_stats("+" . $s); - - ##print "line<$line> prevline<$prevline> indent<$indent> sindent<$sindent> check<$check> continuation<$continuation> s<$s>\n"; + my $stat_real = raw_line($linenr, $cond_lines); + if (defined($stat_real) && $cond_lines > 1) { + $stat_real = "[...]\n$stat_real"; + } - if ($check && (($sindent % 8) != 0 || - ($sindent <= $indent && $s ne ''))) { - WARN("suspect code indent for conditional statements\n" . $herecurr); + ERROR("trailing statements should be on next line\n" . $herecurr . $stat_real); } } @@ -1877,6 +2040,15 @@ sub process { ERROR("trailing statements should be on next line\n" . $herecurr); } } +# case and default should not have general statements after them + if ($line =~ /^.\s*(?:case\s*.*|default\s*):/g && + $line !~ /\G(?: + (?:\s*$;*)(?:\s*{)?(?:\s*$;*)(?:\s*\\)?\s*$| + \s*return\s+ + )/xg) + { + ERROR("trailing statements should be on next line\n" . $herecurr); + } # Check for }<nl>else {, these must be at the same # indent level to be relevant to each other. @@ -1913,12 +2085,17 @@ sub process { #warn if <asm/foo.h> is #included and <linux/foo.h> is available (uses RAW line) if ($tree && $rawline =~ m{^.\s*\#\s*include\s*\<asm\/(.*)\.h\>}) { - my $checkfile = "include/linux/$1.h"; - if (-f "$root/$checkfile" && $realfile ne $checkfile && + my $file = "$1.h"; + my $checkfile = "include/linux/$file"; + if (-f "$root/$checkfile" && + $realfile ne $checkfile && $1 ne 'irq') { - WARN("Use #include <linux/$1.h> instead of <asm/$1.h>\n" . - $herecurr); + if ($realfile =~ m{^arch/}) { + CHK("Consider using #include <linux/$file> instead of <asm/$file>\n" . $herecurr); + } else { + WARN("Use #include <linux/$file> instead of <asm/$file>\n" . $herecurr); + } } } @@ -1953,8 +2130,8 @@ sub process { # Extract the remainder of the define (if any) and # rip off surrounding spaces, and trailing \'s. $rest = ''; - while ($off != 0 || ($cnt > 0 && $rest =~ /(?:^|\\)\s*$/)) { - #print "ADDING $off <" . substr($lines[$ln - 1], $off) . ">\n"; + while ($off != 0 || ($cnt > 0 && $rest =~ /\\\s*$/)) { + #print "ADDING cnt<$cnt> $off <" . substr($lines[$ln - 1], $off) . "> rest<$rest>\n"; if ($off != 0 || $lines[$ln - 1] !~ /^-/) { $rest .= substr($lines[$ln - 1], $off) . "\n"; $cnt--; @@ -1978,9 +2155,10 @@ sub process { $dstat =~ s/\s*$//s; # Flatten any parentheses and braces - while ($dstat =~ s/\([^\(\)]*\)/1/) { - } - while ($dstat =~ s/\{[^\{\}]*\}/1/) { + while ($dstat =~ s/\([^\(\)]*\)/1/ || + $dstat =~ s/\{[^\{\}]*\}/1/ || + $dstat =~ s/\[[^\{\}]*\]/1/) + { } my $exceptions = qr{ @@ -2003,6 +2181,7 @@ sub process { if ($dstat ne '' && $dstat !~ /^(?:$Ident|-?$Constant)$/ && $dstat !~ /$exceptions/ && + $dstat !~ /^\.$Ident\s*=/ && $dstat =~ /$Operators/) { ERROR("Macros with complex values should be enclosed in parenthesis\n" . "$here\n$ctx\n"); @@ -2103,10 +2282,10 @@ sub process { } if ($level == 0 && $block =~ /^\s*\{/ && !$allowed) { my $herectx = $here . "\n";; - my $end = $linenr + statement_rawlines($block) - 1; + my $cnt = statement_rawlines($block); - for (my $ln = $linenr - 1; $ln < $end; $ln++) { - $herectx .= $rawlines[$ln] . "\n";; + for (my $n = 0; $n < $cnt; $n++) { + $herectx .= raw_line($linenr, $n) . "\n";; } WARN("braces {} are not necessary for single statement blocks\n" . $herectx); @@ -2281,6 +2460,7 @@ sub process { my $string; while ($line =~ /(?:^|")([X\t]*)(?:"|$)/g) { $string = substr($rawline, $-[1], $+[1] - $-[1]); + $string =~ s/%%/__/g; if ($string =~ /(?<!%)%L[udi]/) { WARN("\%Ld/%Lu are not-standard C, use %lld/%llu\n" . $herecurr); last; |
