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authorDean Nelson <dcn@sgi.com>2007-07-11 10:22:16 -0500
committerTony Luck <tony.luck@intel.com>2007-07-11 11:34:21 -0700
commit9e121327b37b751ef66e6f57e2d02dd568955148 (patch)
tree5322e12a6baf3dc206a01912adee87e856d4e5b5 /include
parentc6255e9865a07d5313d6162482792f7bec9160db (diff)
downloadblackbird-op-linux-9e121327b37b751ef66e6f57e2d02dd568955148.tar.gz
blackbird-op-linux-9e121327b37b751ef66e6f57e2d02dd568955148.zip
[IA64] add sn_register_pmi_handler oemcall
Add wrapper function to make SN_SAL_REGISTER_PMI_HANDLER ia64_sal_oemcall. Signed-off-by: Dean Nelson <dcn@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'include')
-rw-r--r--include/asm-ia64/sn/sn_sal.h20
1 files changed, 20 insertions, 0 deletions
diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h
index d3566a298fa4..676b31a08c61 100644
--- a/include/asm-ia64/sn/sn_sal.h
+++ b/include/asm-ia64/sn/sn_sal.h
@@ -32,6 +32,7 @@
#define SN_SAL_NO_FAULT_ZONE_VIRTUAL 0x02000010
#define SN_SAL_NO_FAULT_ZONE_PHYSICAL 0x02000011
#define SN_SAL_PRINT_ERROR 0x02000012
+#define SN_SAL_REGISTER_PMI_HANDLER 0x02000014
#define SN_SAL_SET_ERROR_HANDLING_FEATURES 0x0200001a // reentrant
#define SN_SAL_GET_FIT_COMPT 0x0200001b // reentrant
#define SN_SAL_GET_SAPIC_INFO 0x0200001d
@@ -680,6 +681,25 @@ sn_register_nofault_code(u64 start_addr, u64 end_addr, u64 return_addr,
}
/*
+ * Register or unregister a function to handle a PMI received by a CPU.
+ * Before calling the registered handler, SAL sets r1 to the value that
+ * was passed in as the global_pointer.
+ *
+ * If the handler pointer is NULL, then the currently registered handler
+ * will be unregistered.
+ *
+ * Returns 0 on success, or a negative value if an error occurred.
+ */
+static inline int
+sn_register_pmi_handler(u64 handler, u64 global_pointer)
+{
+ struct ia64_sal_retval ret_stuff;
+ ia64_sal_oemcall(&ret_stuff, SN_SAL_REGISTER_PMI_HANDLER, handler,
+ global_pointer, 0, 0, 0, 0, 0);
+ return ret_stuff.status;
+}
+
+/*
* Change or query the coherence domain for this partition. Each cpu-based
* nasid is represented by a bit in an array of 64-bit words:
* 0 = not in this partition's coherency domain
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