diff options
author | Hanumath Prasad <hanumath.prasad@stericsson.com> | 2010-09-30 17:37:23 -0400 |
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committer | Chris Ball <cjb@laptop.org> | 2010-10-23 21:11:16 +0800 |
commit | dfc13e8402c75e7c2e0a52e123c0500a3259866b (patch) | |
tree | 29a0f5daeb300da027bb0ed9c042fffd214b078f /include/linux/mmc/mmc.h | |
parent | 99fc5131018cbdc3cf42ce09fb394a4e8b053c74 (diff) | |
download | blackbird-op-linux-dfc13e8402c75e7c2e0a52e123c0500a3259866b.tar.gz blackbird-op-linux-dfc13e8402c75e7c2e0a52e123c0500a3259866b.zip |
mmc: MMC 4.4 DDR support
Add support for Dual Data Rate MMC cards as defined in the 4.4
specification.
Signed-off-by: Hanumath Prasad <hanumath.prasad@stericsson.com>
Cc: linux-mmc@vger.kernel.org
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Tested-by Zhangfei Gao <zhangfei.gao@marvell.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'include/linux/mmc/mmc.h')
-rw-r--r-- | include/linux/mmc/mmc.h | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h index dd11ae51fb68..956fbd877692 100644 --- a/include/linux/mmc/mmc.h +++ b/include/linux/mmc/mmc.h @@ -277,11 +277,19 @@ struct _mmc_csd { #define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */ #define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */ -#define EXT_CSD_CARD_TYPE_MASK 0x3 /* Mask out reserved and DDR bits */ +#define EXT_CSD_CARD_TYPE_MASK 0xF /* Mask out reserved bits */ +#define EXT_CSD_CARD_TYPE_DDR_1_8V (1<<2) /* Card can run at 52MHz */ + /* DDR mode @1.8V or 3V I/O */ +#define EXT_CSD_CARD_TYPE_DDR_1_2V (1<<3) /* Card can run at 52MHz */ + /* DDR mode @1.2V I/O */ +#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \ + | EXT_CSD_CARD_TYPE_DDR_1_2V) #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ +#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */ +#define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */ #define EXT_CSD_SEC_ER_EN BIT(0) #define EXT_CSD_SEC_BD_BLK_EN BIT(2) |