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| author | André Goddard Rosa <andre.goddard@gmail.com> | 2009-11-14 13:09:05 -0200 |
|---|---|---|
| committer | Jiri Kosina <jkosina@suse.cz> | 2009-12-04 15:39:55 +0100 |
| commit | af901ca181d92aac3a7dc265144a9081a86d8f39 (patch) | |
| tree | 380054af22521144fbe1364c3bcd55ad24c9bde4 /include/linux/mfd | |
| parent | 972b94ffb90ea6d20c589d9a47215df103388ddd (diff) | |
| download | blackbird-op-linux-af901ca181d92aac3a7dc265144a9081a86d8f39.tar.gz blackbird-op-linux-af901ca181d92aac3a7dc265144a9081a86d8f39.zip | |
tree-wide: fix assorted typos all over the place
That is "success", "unknown", "through", "performance", "[re|un]mapping"
, "access", "default", "reasonable", "[con]currently", "temperature"
, "channel", "[un]used", "application", "example","hierarchy", "therefore"
, "[over|under]flow", "contiguous", "threshold", "enough" and others.
Signed-off-by: André Goddard Rosa <andre.goddard@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'include/linux/mfd')
| -rw-r--r-- | include/linux/mfd/ezx-pcap.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/linux/mfd/ezx-pcap.h b/include/linux/mfd/ezx-pcap.h index e5124ceea769..3402042ddc31 100644 --- a/include/linux/mfd/ezx-pcap.h +++ b/include/linux/mfd/ezx-pcap.h @@ -45,7 +45,7 @@ void pcap_set_ts_bits(struct pcap_chip *, u32); #define PCAP_CLEAR_INTERRUPT_REGISTER 0x01ffffff #define PCAP_MASK_ALL_INTERRUPT 0x01ffffff -/* registers acessible by both pcap ports */ +/* registers accessible by both pcap ports */ #define PCAP_REG_ISR 0x0 /* Interrupt Status */ #define PCAP_REG_MSR 0x1 /* Interrupt Mask */ #define PCAP_REG_PSTAT 0x2 /* Processor Status */ @@ -67,7 +67,7 @@ void pcap_set_ts_bits(struct pcap_chip *, u32); #define PCAP_REG_VENDOR_TEST1 0x1e #define PCAP_REG_VENDOR_TEST2 0x1f -/* registers acessible by pcap port 1 only (a1200, e2 & e6) */ +/* registers accessible by pcap port 1 only (a1200, e2 & e6) */ #define PCAP_REG_INT_SEL 0x3 /* Interrupt Select */ #define PCAP_REG_SWCTRL 0x4 /* Switching Regulator Control */ #define PCAP_REG_VREG1 0x5 /* Regulator Bank 1 Control */ |
