summaryrefslogtreecommitdiffstats
path: root/include/linux/clk-private.h
diff options
context:
space:
mode:
authorRajendra Nayak <rnayak@ti.com>2012-06-29 19:06:32 +0530
committerMike Turquette <mturquette@linaro.org>2012-07-11 15:36:42 -0700
commit357c3f0a6c7613f7230fcaf1eb16190ed2a4b0af (patch)
treeab2067f4d31b734a0e5e01bbcd32fad190e0baea /include/linux/clk-private.h
parent6d9252bd9a4bb1dadc1f199fd276e3464a251085 (diff)
downloadblackbird-op-linux-357c3f0a6c7613f7230fcaf1eb16190ed2a4b0af.tar.gz
blackbird-op-linux-357c3f0a6c7613f7230fcaf1eb16190ed2a4b0af.zip
clk: Add support for rate table based dividers
Some divider clks do not have any obvious relationship between the divider and the value programmed in the register. For instance, say a value of 1 could signify divide by 6 and a value of 2 could signify divide by 4 etc. Also there are dividers where not all values possible based on the bitfield width are valid. For instance a 3 bit wide bitfield can be used to program a value from 0 to 7. However its possible that only 0 to 4 are valid values. All these cases need the platform code to pass a simple table of divider/value tuple, so the framework knows the exact value to be written based on the divider calculation and can also do better error checking. This patch adds support for such rate table based dividers and as part of the support adds a new registration function 'clk_register_divider_table()' and a new macro for static definition 'DEFINE_CLK_DIVIDER_TABLE'. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'include/linux/clk-private.h')
-rw-r--r--include/linux/clk-private.h20
1 files changed, 18 insertions, 2 deletions
diff --git a/include/linux/clk-private.h b/include/linux/clk-private.h
index eb3f84bc5325..cc9972d1429c 100644
--- a/include/linux/clk-private.h
+++ b/include/linux/clk-private.h
@@ -103,9 +103,9 @@ struct clk {
DEFINE_CLK(_name, clk_gate_ops, _flags, \
_name##_parent_names, _name##_parents);
-#define DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \
+#define _DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \
_flags, _reg, _shift, _width, \
- _divider_flags, _lock) \
+ _divider_flags, _table, _lock) \
static struct clk _name; \
static const char *_name##_parent_names[] = { \
_parent_name, \
@@ -121,11 +121,27 @@ struct clk {
.shift = _shift, \
.width = _width, \
.flags = _divider_flags, \
+ .table = _table, \
.lock = _lock, \
}; \
DEFINE_CLK(_name, clk_divider_ops, _flags, \
_name##_parent_names, _name##_parents);
+#define DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \
+ _flags, _reg, _shift, _width, \
+ _divider_flags, _lock) \
+ _DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \
+ _flags, _reg, _shift, _width, \
+ _divider_flags, NULL, _lock)
+
+#define DEFINE_CLK_DIVIDER_TABLE(_name, _parent_name, \
+ _parent_ptr, _flags, _reg, \
+ _shift, _width, _divider_flags, \
+ _table, _lock) \
+ _DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \
+ _flags, _reg, _shift, _width, \
+ _divider_flags, _table, _lock) \
+
#define DEFINE_CLK_MUX(_name, _parent_names, _parents, _flags, \
_reg, _shift, _width, \
_mux_flags, _lock) \
OpenPOWER on IntegriCloud