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authorAndrzej Hajda <a.hajda@samsung.com>2015-10-20 11:22:33 +0200
committerSylwester Nawrocki <s.nawrocki@samsung.com>2016-02-03 11:03:50 +0100
commit02ed910cb4e1c3d03ef70efa94c08f5f580c7ff8 (patch)
treed3af3d76bd81191ab8c88fcf5a7e99a6f139bdf7 /include/dt-bindings
parent68b2206a57c22d5b7c5bb16308a4afafe04d416d (diff)
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clk/samsung: exynos5433: add pclk_decon clock
This undocumented gate clock is used by DECON IP. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/exynos5433.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/exynos5433.h b/include/dt-bindings/clock/exynos5433.h
index 4f0d5667ee9d..5c2636cb9576 100644
--- a/include/dt-bindings/clock/exynos5433.h
+++ b/include/dt-bindings/clock/exynos5433.h
@@ -768,7 +768,9 @@
#define CLK_PHYCLK_HDMIPHY_PIXEL_CLKO_PHY 111
#define CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY 112
-#define DISP_NR_CLK 113
+#define CLK_PCLK_DECON 113
+
+#define DISP_NR_CLK 114
/* CMU_AUD */
#define CLK_MOUT_AUD_PLL_USER 1
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