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authorTejun Heo <htejun@gmail.com>2005-11-18 14:09:05 +0900
committerJeff Garzik <jgarzik@pobox.com>2005-11-18 13:11:39 -0500
commit7d1ce682d08625258524d23ef5eb9e7ae261c1d0 (patch)
treec089afbea310f50e0e869610573125bbe3377300 /include/asm-xtensa/shmparam.h
parentfc71fe40d2bedcc57d3406bf2050481f8b3441b6 (diff)
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[PATCH] sil24: add sil24_restart_controller
When an error condition is raised by device via D2H FIS or SDB. sil24 controller should be restarted by setting PORT_CS_INIT and waiting until PORT_CS_RDY is asserted instead of resetting the controller. This patch implements sil24_restart_controller for those cases. This patch also makes sure that PORT_CS_RDY is asserted on sil24_reset_controller completion. Signed-off-by: Tejun Heo <htejun@gmail.com> -- Jeff, delay is reduced to 1us and cnt increased to 10k. My sil3124 turns on PORT_CS_RDY on the second iteration even without any delay. I think 10k * 1us should be more than enough. I tried to convert both restart and reset to use msleep's with work queue, but if we do that, host_set lock should be released after initiating restart or reset, leading to race condition among reset/restart, other interrupts and timeout. Implementing synchronization among those in low-level driver doesn't seem right. Well, reduced timeout should work for the time being. Thanks. Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Diffstat (limited to 'include/asm-xtensa/shmparam.h')
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