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| author | Chris Zankel <czankel@tensilica.com> | 2006-12-10 02:18:48 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-10 09:55:39 -0800 |
| commit | 173d6681380aa1d60dfc35ed7178bd7811ba2784 (patch) | |
| tree | 9d6d4d2c6dd791499ebab558647efb67ac88ae3a /include/asm-xtensa/pgtable.h | |
| parent | fd43fe19b830d6cd0eba08a6c6a5f71a6bd9c1b0 (diff) | |
| download | blackbird-op-linux-173d6681380aa1d60dfc35ed7178bd7811ba2784.tar.gz blackbird-op-linux-173d6681380aa1d60dfc35ed7178bd7811ba2784.zip | |
[PATCH] xtensa: remove extra header files
The Xtensa port contained many header files that were never needed. This
rather lengthy patch removes all those files. Unfortunately, there were
many dependencies that needed to be updated, so this patch touches quite a
few source files.
Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-xtensa/pgtable.h')
| -rw-r--r-- | include/asm-xtensa/pgtable.h | 41 |
1 files changed, 1 insertions, 40 deletions
diff --git a/include/asm-xtensa/pgtable.h b/include/asm-xtensa/pgtable.h index b4318934b10d..2d4b5db6ea63 100644 --- a/include/asm-xtensa/pgtable.h +++ b/include/asm-xtensa/pgtable.h @@ -14,45 +14,6 @@ #include <asm-generic/pgtable-nopmd.h> #include <asm/page.h> -/* Assertions. */ - -#ifdef CONFIG_MMU - - -#if (XCHAL_MMU_RINGS < 2) -# error Linux build assumes at least 2 ring levels. -#endif - -#if (XCHAL_MMU_CA_BITS != 4) -# error We assume exactly four bits for CA. -#endif - -#if (XCHAL_MMU_SR_BITS != 0) -# error We have no room for SR bits. -#endif - -/* - * Use the first min-wired way for mapping page-table pages. - * Page coloring requires a second min-wired way. - */ - -#if (XCHAL_DTLB_MINWIRED_SETS == 0) -# error Need a min-wired way for mapping page-table pages -#endif - -#define DTLB_WAY_PGTABLE XCHAL_DTLB_SET(XCHAL_DTLB_MINWIRED_SET0, WAY) - -#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK -# if XCHAL_DTLB_SET(XCHAL_DTLB_MINWIRED_SET0, WAYS) >= 2 -# define DTLB_WAY_DCACHE_ALIAS0 (DTLB_WAY_PGTABLE + 1) -# define DTLB_WAY_DCACHE_ALIAS1 (DTLB_WAY_PGTABLE + 2) -# else -# error Page coloring requires its own wired dtlb way! -# endif -#endif - -#endif /* CONFIG_MMU */ - /* * We only use two ring levels, user and kernel space. */ @@ -97,7 +58,7 @@ #define PGD_ORDER 0 #define PMD_ORDER 0 #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) -#define FIRST_USER_ADDRESS XCHAL_SEG_MAPPABLE_VADDR +#define FIRST_USER_ADDRESS 0 #define FIRST_USER_PGD_NR (FIRST_USER_ADDRESS >> PGDIR_SHIFT) /* virtual memory area. We keep a distance to other memory regions to be |
