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| author | Stuart Menefy <stuart.menefy@st.com> | 2007-11-30 17:06:36 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2008-01-28 13:18:59 +0900 |
| commit | cbaa118ecfd99fc5ed7adbd9c34a30e1c05e3c93 (patch) | |
| tree | e60db5c0f3573558c97f39cfab78732220a72e6d /include/asm-sh/system_32.h | |
| parent | 325df7f20467da07901c4f2b006d3457bba0adec (diff) | |
| download | blackbird-op-linux-cbaa118ecfd99fc5ed7adbd9c34a30e1c05e3c93.tar.gz blackbird-op-linux-cbaa118ecfd99fc5ed7adbd9c34a30e1c05e3c93.zip | |
sh: Preparation for uncached jumps through PMB.
Presently most of the 29-bit physical parts do P1/P2 segmentation
with a 1:1 cached/uncached mapping, jumping between the two to
control the caching behaviour. This provides the basic infrastructure
to maintain this behaviour on 32-bit physical parts that don't map
P1/P2 at all, using a shiny new linker section and corresponding
fixmap entry.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh/system_32.h')
| -rw-r--r-- | include/asm-sh/system_32.h | 36 |
1 files changed, 19 insertions, 17 deletions
diff --git a/include/asm-sh/system_32.h b/include/asm-sh/system_32.h index ad37e8d5f31e..e918bacd5ecf 100644 --- a/include/asm-sh/system_32.h +++ b/include/asm-sh/system_32.h @@ -58,29 +58,31 @@ do { \ last = __last; \ } while (0) +#define __uses_jump_to_uncached __attribute__ ((__section__ (".uncached.text"))) + /* - * Jump to P2 area. - * When handling TLB or caches, we need to do it from P2 area. + * Jump to uncached area. + * When handling TLB or caches, we need to do it from an uncached area. */ -#define jump_to_P2() \ -do { \ - unsigned long __dummy; \ - __asm__ __volatile__( \ - "mov.l 1f, %0\n\t" \ - "or %1, %0\n\t" \ - "jmp @%0\n\t" \ - " nop\n\t" \ - ".balign 4\n" \ - "1: .long 2f\n" \ - "2:" \ - : "=&r" (__dummy) \ - : "r" (0x20000000)); \ +#define jump_to_uncached() \ +do { \ + unsigned long __dummy; \ + \ + __asm__ __volatile__( \ + "mova 1f, %0\n\t" \ + "add %1, %0\n\t" \ + "jmp @%0\n\t" \ + " nop\n\t" \ + ".balign 4\n" \ + "1:" \ + : "=&z" (__dummy) \ + : "r" (cached_to_uncached)); \ } while (0) /* - * Back to P1 area. + * Back to cached area. */ -#define back_to_P1() \ +#define back_to_cached() \ do { \ unsigned long __dummy; \ ctrl_barrier(); \ |
