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authorH. J. Lu <hjl@lucon.org>2005-09-06 15:16:49 -0700
committerLinus Torvalds <torvalds@g5.osdl.org>2005-09-07 16:57:21 -0700
commit36d57ac4a818cb4aa3edbdf63ad2ebc31106f925 (patch)
tree445eda00ee5974a65e21152cd240fb604c6d112d /include/asm-ppc64
parent32605a18152b246df483fadc1c23854addde8755 (diff)
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[PATCH] auxiliary vector cleanups
The size of auxiliary vector is fixed at 42 in linux/sched.h. But it isn't very obvious when looking at linux/elf.h. This patch adds AT_VECTOR_SIZE so that we can change it if necessary when a new vector is added. Because of include file ordering problems, doing this necessitated the extraction of the AT_* symbols into a standalone header file. Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-ppc64')
-rw-r--r--include/asm-ppc64/auxvec.h19
-rw-r--r--include/asm-ppc64/elf.h16
2 files changed, 20 insertions, 15 deletions
diff --git a/include/asm-ppc64/auxvec.h b/include/asm-ppc64/auxvec.h
new file mode 100644
index 000000000000..ac6381a106e1
--- /dev/null
+++ b/include/asm-ppc64/auxvec.h
@@ -0,0 +1,19 @@
+#ifndef __PPC64_AUXVEC_H
+#define __PPC64_AUXVEC_H
+
+/*
+ * We need to put in some extra aux table entries to tell glibc what
+ * the cache block size is, so it can use the dcbz instruction safely.
+ */
+#define AT_DCACHEBSIZE 19
+#define AT_ICACHEBSIZE 20
+#define AT_UCACHEBSIZE 21
+/* A special ignored type value for PPC, for glibc compatibility. */
+#define AT_IGNOREPPC 22
+
+/* The vDSO location. We have to use the same value as x86 for glibc's
+ * sake :-)
+ */
+#define AT_SYSINFO_EHDR 33
+
+#endif /* __PPC64_AUXVEC_H */
diff --git a/include/asm-ppc64/elf.h b/include/asm-ppc64/elf.h
index 085eedb956fe..c919a89343db 100644
--- a/include/asm-ppc64/elf.h
+++ b/include/asm-ppc64/elf.h
@@ -4,6 +4,7 @@
#include <asm/types.h>
#include <asm/ptrace.h>
#include <asm/cputable.h>
+#include <asm/auxvec.h>
/* PowerPC relocations defined by the ABIs */
#define R_PPC_NONE 0
@@ -237,21 +238,6 @@ do { \
#endif
-/*
- * We need to put in some extra aux table entries to tell glibc what
- * the cache block size is, so it can use the dcbz instruction safely.
- */
-#define AT_DCACHEBSIZE 19
-#define AT_ICACHEBSIZE 20
-#define AT_UCACHEBSIZE 21
-/* A special ignored type value for PPC, for glibc compatibility. */
-#define AT_IGNOREPPC 22
-
-/* The vDSO location. We have to use the same value as x86 for glibc's
- * sake :-)
- */
-#define AT_SYSINFO_EHDR 33
-
extern int dcache_bsize;
extern int icache_bsize;
extern int ucache_bsize;
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