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author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2006-02-17 01:36:24 +0900 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2006-03-21 13:27:45 +0000 |
commit | a8433137ea9143bb3a2bc18a3407b5a130fdb868 (patch) | |
tree | ff40223bf542173015c070a988a4f3b0554f89ea /include/asm-mips | |
parent | c1449c8fa40859eb269025a7db85b34115205f5b (diff) | |
download | blackbird-op-linux-a8433137ea9143bb3a2bc18a3407b5a130fdb868.tar.gz blackbird-op-linux-a8433137ea9143bb3a2bc18a3407b5a130fdb868.zip |
[MIPS] Make I/O helpers more customizable
1. Move ioswab*() and __mem_ioswab*() to mangle-port.h. This gets rid
of CONFIG_SGI_IP22 from include/asm-mips/io.h.
2. Pass a virtual address to *ioswab*(). Then we can provide
mach-specific *ioswab*() and can do every evil thing based on its
argument. It could be useful on machines which have regions with
different endian conversion scheme.
3. Call __swizzle_addr*() _after_ adding mips_io_port_base. This
unifies the meaning of the argument of __swizzle_addr*() (always
virtual address). Then mach-specific __swizzle_addr*() can do every
evil thing based on the argument.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips')
-rw-r--r-- | include/asm-mips/io.h | 69 | ||||
-rw-r--r-- | include/asm-mips/mach-generic/mangle-port.h | 36 | ||||
-rw-r--r-- | include/asm-mips/mach-ip27/mangle-port.h | 9 | ||||
-rw-r--r-- | include/asm-mips/mach-ip32/mangle-port.h | 9 |
4 files changed, 66 insertions, 57 deletions
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index ba1d7bbc15d2..546a17e56a9b 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h @@ -40,56 +40,13 @@ * hardware. An example use would be for flash memory that's used for * execute in place. */ -# define __raw_ioswabb(x) (x) -# define __raw_ioswabw(x) (x) -# define __raw_ioswabl(x) (x) -# define __raw_ioswabq(x) (x) -# define ____raw_ioswabq(x) (x) +# define __raw_ioswabb(a,x) (x) +# define __raw_ioswabw(a,x) (x) +# define __raw_ioswabl(a,x) (x) +# define __raw_ioswabq(a,x) (x) +# define ____raw_ioswabq(a,x) (x) -/* - * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware; - * less sane hardware forces software to fiddle with this... - * - * Regardless, if the host bus endianness mismatches that of PCI/ISA, then - * you can't have the numerical value of data and byte addresses within - * multibyte quantities both preserved at the same time. Hence two - * variations of functions: non-prefixed ones that preserve the value - * and prefixed ones that preserve byte addresses. The latters are - * typically used for moving raw data between a peripheral and memory (cf. - * string I/O functions), hence the "__mem_" prefix. - */ -#if defined(CONFIG_SWAP_IO_SPACE) - -# define ioswabb(x) (x) -# define __mem_ioswabb(x) (x) -# ifdef CONFIG_SGI_IP22 -/* - * IP22 seems braindead enough to swap 16bits values in hardware, but - * not 32bits. Go figure... Can't tell without documentation. - */ -# define ioswabw(x) (x) -# define __mem_ioswabw(x) le16_to_cpu(x) -# else -# define ioswabw(x) le16_to_cpu(x) -# define __mem_ioswabw(x) (x) -# endif -# define ioswabl(x) le32_to_cpu(x) -# define __mem_ioswabl(x) (x) -# define ioswabq(x) le64_to_cpu(x) -# define __mem_ioswabq(x) (x) - -#else - -# define ioswabb(x) (x) -# define __mem_ioswabb(x) (x) -# define ioswabw(x) (x) -# define __mem_ioswabw(x) cpu_to_le16(x) -# define ioswabl(x) (x) -# define __mem_ioswabl(x) cpu_to_le32(x) -# define ioswabq(x) (x) -# define __mem_ioswabq(x) cpu_to_le32(x) - -#endif +/* ioswab[bwlq], __mem_ioswab[bwlq] are defined in mangle-port.h */ #define IO_SPACE_LIMIT 0xffff @@ -346,7 +303,7 @@ static inline void pfx##write##bwlq(type val, \ \ __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); \ \ - __val = pfx##ioswab##bwlq(val); \ + __val = pfx##ioswab##bwlq(__mem, val); \ \ if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) \ *__mem = __val; \ @@ -401,7 +358,7 @@ static inline type pfx##read##bwlq(const volatile void __iomem *mem) \ BUG(); \ } \ \ - return pfx##ioswab##bwlq(__val); \ + return pfx##ioswab##bwlq(__mem, __val); \ } #define __BUILD_IOPORT_SINGLE(pfx, bwlq, type, p, slow) \ @@ -411,10 +368,9 @@ static inline void pfx##out##bwlq##p(type val, unsigned long port) \ volatile type *__addr; \ type __val; \ \ - port = __swizzle_addr_##bwlq(port); \ - __addr = (void *)(mips_io_port_base + port); \ + __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); \ \ - __val = pfx##ioswab##bwlq(val); \ + __val = pfx##ioswab##bwlq(__addr, val); \ \ /* Really, we want this to be atomic */ \ BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ @@ -428,15 +384,14 @@ static inline type pfx##in##bwlq##p(unsigned long port) \ volatile type *__addr; \ type __val; \ \ - port = __swizzle_addr_##bwlq(port); \ - __addr = (void *)(mips_io_port_base + port); \ + __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); \ \ BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ \ __val = *__addr; \ slow; \ \ - return pfx##ioswab##bwlq(__val); \ + return pfx##ioswab##bwlq(__addr, __val); \ } #define __BUILD_MEMORY_PFX(bus, bwlq, type) \ diff --git a/include/asm-mips/mach-generic/mangle-port.h b/include/asm-mips/mach-generic/mangle-port.h index 4a98d83b8ec7..6e1b0c075de7 100644 --- a/include/asm-mips/mach-generic/mangle-port.h +++ b/include/asm-mips/mach-generic/mangle-port.h @@ -13,4 +13,40 @@ #define __swizzle_addr_l(port) (port) #define __swizzle_addr_q(port) (port) +/* + * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware; + * less sane hardware forces software to fiddle with this... + * + * Regardless, if the host bus endianness mismatches that of PCI/ISA, then + * you can't have the numerical value of data and byte addresses within + * multibyte quantities both preserved at the same time. Hence two + * variations of functions: non-prefixed ones that preserve the value + * and prefixed ones that preserve byte addresses. The latters are + * typically used for moving raw data between a peripheral and memory (cf. + * string I/O functions), hence the "__mem_" prefix. + */ +#if defined(CONFIG_SWAP_IO_SPACE) + +# define ioswabb(a,x) (x) +# define __mem_ioswabb(a,x) (x) +# define ioswabw(a,x) le16_to_cpu(x) +# define __mem_ioswabw(a,x) (x) +# define ioswabl(a,x) le32_to_cpu(x) +# define __mem_ioswabl(a,x) (x) +# define ioswabq(a,x) le64_to_cpu(x) +# define __mem_ioswabq(a,x) (x) + +#else + +# define ioswabb(a,x) (x) +# define __mem_ioswabb(a,x) (x) +# define ioswabw(a,x) (x) +# define __mem_ioswabw(a,x) cpu_to_le16(x) +# define ioswabl(a,x) (x) +# define __mem_ioswabl(a,x) cpu_to_le32(x) +# define ioswabq(a,x) (x) +# define __mem_ioswabq(a,x) cpu_to_le32(x) + +#endif + #endif /* __ASM_MACH_GENERIC_MANGLE_PORT_H */ diff --git a/include/asm-mips/mach-ip27/mangle-port.h b/include/asm-mips/mach-ip27/mangle-port.h index f76c44880451..d615312a451a 100644 --- a/include/asm-mips/mach-ip27/mangle-port.h +++ b/include/asm-mips/mach-ip27/mangle-port.h @@ -13,4 +13,13 @@ #define __swizzle_addr_l(port) (port) #define __swizzle_addr_q(port) (port) +# define ioswabb(a,x) (x) +# define __mem_ioswabb(a,x) (x) +# define ioswabw(a,x) (x) +# define __mem_ioswabw(a,x) cpu_to_le16(x) +# define ioswabl(a,x) (x) +# define __mem_ioswabl(a,x) cpu_to_le32(x) +# define ioswabq(a,x) (x) +# define __mem_ioswabq(a,x) cpu_to_le32(x) + #endif /* __ASM_MACH_IP27_MANGLE_PORT_H */ diff --git a/include/asm-mips/mach-ip32/mangle-port.h b/include/asm-mips/mach-ip32/mangle-port.h index 6e25b52ed8f2..81320eb55324 100644 --- a/include/asm-mips/mach-ip32/mangle-port.h +++ b/include/asm-mips/mach-ip32/mangle-port.h @@ -14,4 +14,13 @@ #define __swizzle_addr_l(port) (port) #define __swizzle_addr_q(port) (port) +# define ioswabb(a,x) (x) +# define __mem_ioswabb(a,x) (x) +# define ioswabw(a,x) (x) +# define __mem_ioswabw(a,x) cpu_to_le16(x) +# define ioswabl(a,x) (x) +# define __mem_ioswabl(a,x) cpu_to_le32(x) +# define ioswabq(a,x) (x) +# define __mem_ioswabq(a,x) cpu_to_le32(x) + #endif /* __ASM_MACH_IP32_MANGLE_PORT_H */ |