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| author | Ingo Molnar <mingo@elte.hu> | 2008-06-25 12:30:33 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-06-25 12:30:33 +0200 |
| commit | 48cf937f48f68bd1e61f37c6357dbff5adb95532 (patch) | |
| tree | d9e2368a419adc2c11691be2842c66213bec5a42 /include/asm-mips/cpu-info.h | |
| parent | fce39665abb71d01d74ac74eb13dd69a799dfc2f (diff) | |
| parent | 543cf4cb3fe6f6cae3651ba918b9c56200b257d0 (diff) | |
| download | blackbird-op-linux-48cf937f48f68bd1e61f37c6357dbff5adb95532.tar.gz blackbird-op-linux-48cf937f48f68bd1e61f37c6357dbff5adb95532.zip | |
Merge branch 'linus' into x86/i8259
Diffstat (limited to 'include/asm-mips/cpu-info.h')
| -rw-r--r-- | include/asm-mips/cpu-info.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-mips/cpu-info.h b/include/asm-mips/cpu-info.h index 0c5a358863f3..2de73dbb2e9e 100644 --- a/include/asm-mips/cpu-info.h +++ b/include/asm-mips/cpu-info.h @@ -56,7 +56,7 @@ struct cpuinfo_mips { struct cache_desc tcache; /* Tertiary/split secondary cache */ int srsets; /* Shadow register sets */ int core; /* physical core number */ -#if defined(CONFIG_MIPS_MT_SMTC) +#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC) /* * In the MIPS MT "SMTC" model, each TC is considered * to be a "CPU" for the purposes of scheduling, but @@ -64,7 +64,7 @@ struct cpuinfo_mips { * to all TCs within the same VPE. */ int vpe_id; /* Virtual Processor number */ -#endif /* CONFIG_MIPS_MT */ +#endif #ifdef CONFIG_MIPS_MT_SMTC int tc_id; /* Thread Context number */ #endif |
