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authorRalf Baechle <ralf@linux-mips.org>2005-07-14 07:34:18 +0000
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 19:31:51 +0100
commit8f40611d2b184ca5d525075d273854929cf8d1d0 (patch)
tree962ef8dfa515cee330f506dc4ceac83670d0f84e /include/asm-mips/cpu-features.h
parent699dbc90e8c7baecae197fb331773f505a46a1eb (diff)
downloadblackbird-op-linux-8f40611d2b184ca5d525075d273854929cf8d1d0.tar.gz
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Detect the MIPS R2 vectored interrupt, external interrupt controller
options and the precense of the MT ASE. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/cpu-features.h')
-rw-r--r--include/asm-mips/cpu-features.h24
1 files changed, 24 insertions, 0 deletions
diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h
index bb2212cf460a..698c21125a5c 100644
--- a/include/asm-mips/cpu-features.h
+++ b/include/asm-mips/cpu-features.h
@@ -109,6 +109,14 @@
#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP)
#endif
+#ifdef CONFIG_MIPS_MT
+#ifndef cpu_has_mipsmt
+# define cpu_has_mipsmt (cpu_data[0].ases & MIPS_ASE_MIPSMT)
+#endif
+#else
+# define cpu_has_mipsmt 0
+#endif
+
#ifdef CONFIG_32BIT
# ifndef cpu_has_nofpuex
# define cpu_has_nofpuex (cpu_data[0].options & MIPS_CPU_NOFPUEX)
@@ -145,6 +153,22 @@
# endif
#endif
+#ifdef CONFIG_CPU_MIPSR2
+# if defined(CONFIG_CPU_MIPSR2_IRQ_VI) && !defined(cpu_has_vint)
+# define cpu_has_vint (cpu_data[0].options & MIPS_CPU_VINT)
+# else
+# define cpu_has_vint 0
+# endif
+# if defined(CONFIG_CPU_MIPSR2_IRQ_EI) && !defined(cpu_has_veic)
+# define cpu_has_veic (cpu_data[0].options & MIPS_CPU_VEIC)
+# else
+# define cpu_has_veic 0
+# endif
+#else
+# define cpu_has_vint 0
+# define cpu_has_veic 0
+#endif
+
#ifndef cpu_has_subset_pcaches
#define cpu_has_subset_pcaches (cpu_data[0].options & MIPS_CPU_SUBSET_CACHES)
#endif
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