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authorHirokazu Takata <takata@linux-m32r.org>2006-01-06 00:18:42 -0800
committerLinus Torvalds <torvalds@g5.osdl.org>2006-01-06 08:33:43 -0800
commit1b5b776aa5730cbda9cba84ba0f8ccd53a775797 (patch)
tree60b661ac7cceba108dd07062a54e7fb724a19e72 /include/asm-m32r/unistd.h
parent9287d95ea194abf32fab24c6909f8ea55ab0292f (diff)
downloadblackbird-op-linux-1b5b776aa5730cbda9cba84ba0f8ccd53a775797.tar.gz
blackbird-op-linux-1b5b776aa5730cbda9cba84ba0f8ccd53a775797.zip
[PATCH] m32r: Update syscall macros for MMU-less targets
This patch is for updating m32r's MMU-less support. Some legacy MMU-less m32r chips cannot return from a trap handler to the right-hand side 16-bit halfword code of a 32-bit instrucion code pair, because a "trap" instruction specification was expanded in M32R-II ISA. This modification forces "trap" instructions to be placed in word alignment location with a parallel "nop" code. Signed-off-by: Kazuhiro Inaoka <inaoka@linux-m32r.org> Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-m32r/unistd.h')
-rw-r--r--include/asm-m32r/unistd.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/include/asm-m32r/unistd.h b/include/asm-m32r/unistd.h
index ac399e1f7bc0..39be87ca2a5a 100644
--- a/include/asm-m32r/unistd.h
+++ b/include/asm-m32r/unistd.h
@@ -319,7 +319,7 @@ type name(void) \
register long __scno __asm__ ("r7") = __NR_##name; \
register long __res __asm__("r0"); \
__asm__ __volatile__ (\
- "trap #" SYSCALL_VECTOR \
+ "trap #" SYSCALL_VECTOR "|| nop"\
: "=r" (__res) \
: "r" (__scno) \
: "memory"); \
@@ -332,7 +332,7 @@ type name(type1 arg1) \
register long __scno __asm__ ("r7") = __NR_##name; \
register long __res __asm__ ("r0") = (long)(arg1); \
__asm__ __volatile__ (\
- "trap #" SYSCALL_VECTOR \
+ "trap #" SYSCALL_VECTOR "|| nop"\
: "=r" (__res) \
: "r" (__scno), "0" (__res) \
: "memory"); \
@@ -346,7 +346,7 @@ register long __scno __asm__ ("r7") = __NR_##name; \
register long __arg2 __asm__ ("r1") = (long)(arg2); \
register long __res __asm__ ("r0") = (long)(arg1); \
__asm__ __volatile__ (\
- "trap #" SYSCALL_VECTOR \
+ "trap #" SYSCALL_VECTOR "|| nop"\
: "=r" (__res) \
: "r" (__scno), "0" (__res), "r" (__arg2) \
: "memory"); \
@@ -361,7 +361,7 @@ register long __arg3 __asm__ ("r2") = (long)(arg3); \
register long __arg2 __asm__ ("r1") = (long)(arg2); \
register long __res __asm__ ("r0") = (long)(arg1); \
__asm__ __volatile__ (\
- "trap #" SYSCALL_VECTOR \
+ "trap #" SYSCALL_VECTOR "|| nop"\
: "=r" (__res) \
: "r" (__scno), "0" (__res), "r" (__arg2), \
"r" (__arg3) \
@@ -378,7 +378,7 @@ register long __arg3 __asm__ ("r2") = (long)(arg3); \
register long __arg2 __asm__ ("r1") = (long)(arg2); \
register long __res __asm__ ("r0") = (long)(arg1); \
__asm__ __volatile__ (\
- "trap #" SYSCALL_VECTOR \
+ "trap #" SYSCALL_VECTOR "|| nop"\
: "=r" (__res) \
: "r" (__scno), "0" (__res), "r" (__arg2), \
"r" (__arg3), "r" (__arg4) \
@@ -397,7 +397,7 @@ register long __arg3 __asm__ ("r2") = (long)(arg3); \
register long __arg2 __asm__ ("r1") = (long)(arg2); \
register long __res __asm__ ("r0") = (long)(arg1); \
__asm__ __volatile__ (\
- "trap #" SYSCALL_VECTOR \
+ "trap #" SYSCALL_VECTOR "|| nop"\
: "=r" (__res) \
: "r" (__scno), "0" (__res), "r" (__arg2), \
"r" (__arg3), "r" (__arg4), "r" (__arg5) \
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