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authorDmitry Torokhov <dtor@insightbb.com>2007-05-08 01:31:11 -0400
committerDmitry Torokhov <dtor@insightbb.com>2007-05-08 01:31:11 -0400
commit334d0dd8b660557608142f0f77abc6812b48f08b (patch)
tree9393a9aa099d7d42deda5f9f5054796c0c769be7 /include/asm-blackfin/mach-bf537/dma.h
parent3f07d8796262f6aee135c8dd9a91210da9f888e4 (diff)
parent5b94f675f57e4ff16c8fda09088d7480a84dcd91 (diff)
downloadblackbird-op-linux-334d0dd8b660557608142f0f77abc6812b48f08b.tar.gz
blackbird-op-linux-334d0dd8b660557608142f0f77abc6812b48f08b.zip
Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'include/asm-blackfin/mach-bf537/dma.h')
-rw-r--r--include/asm-blackfin/mach-bf537/dma.h55
1 files changed, 55 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf537/dma.h b/include/asm-blackfin/mach-bf537/dma.h
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+++ b/include/asm-blackfin/mach-bf537/dma.h
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+/*
+ * file: include/asm-blackfin/mach-bf537/dma.h
+ * based on:
+ * author:
+ *
+ * created:
+ * description:
+ * system mmr register map
+ * rev:
+ *
+ * modified:
+ *
+ *
+ * bugs: enter bugs at http://blackfin.uclinux.org/
+ *
+ * this program is free software; you can redistribute it and/or modify
+ * it under the terms of the gnu general public license as published by
+ * the free software foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * this program is distributed in the hope that it will be useful,
+ * but without any warranty; without even the implied warranty of
+ * merchantability or fitness for a particular purpose. see the
+ * gnu general public license for more details.
+ *
+ * you should have received a copy of the gnu general public license
+ * along with this program; see the file copying.
+ * if not, write to the free software foundation,
+ * 59 temple place - suite 330, boston, ma 02111-1307, usa.
+ */
+
+#ifndef _MACH_DMA_H_
+#define _MACH_DMA_H_
+
+#define MAX_BLACKFIN_DMA_CHANNEL 16
+
+#define CH_PPI 0
+#define CH_EMAC_RX 1
+#define CH_EMAC_TX 2
+#define CH_SPORT0_RX 3
+#define CH_SPORT0_TX 4
+#define CH_SPORT1_RX 5
+#define CH_SPORT1_TX 6
+#define CH_SPI 7
+#define CH_UART0_RX 8
+#define CH_UART0_TX 9
+#define CH_UART1_RX 10
+#define CH_UART1_TX 11
+
+#define CH_MEM_STREAM0_DEST 12 /* TX */
+#define CH_MEM_STREAM0_SRC 13 /* RX */
+#define CH_MEM_STREAM1_DEST 14 /* TX */
+#define CH_MEM_STREAM1_SRC 15 /* RX */
+
+#endif
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