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authorBryan Wu <cooloney@kernel.org>2008-08-27 10:51:02 +0800
committerBryan Wu <cooloney@kernel.org>2008-08-27 10:51:02 +0800
commit639f6571458948b5112be2cf00c0c2c04db2897d (patch)
treea4dd7af33d0e92c935ba1e904f6fb7e923ac825e /include/asm-blackfin/cache.h
parent3d9b7a5ce534f3963afcf8f4777267e5899fe007 (diff)
downloadblackbird-op-linux-639f6571458948b5112be2cf00c0c2c04db2897d.tar.gz
blackbird-op-linux-639f6571458948b5112be2cf00c0c2c04db2897d.zip
Blackfin arch: move include/asm-blackfin header files to arch/blackfin
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'include/asm-blackfin/cache.h')
-rw-r--r--include/asm-blackfin/cache.h29
1 files changed, 0 insertions, 29 deletions
diff --git a/include/asm-blackfin/cache.h b/include/asm-blackfin/cache.h
deleted file mode 100644
index 023d72133b5a..000000000000
--- a/include/asm-blackfin/cache.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * include/asm-blackfin/cache.h
- */
-#ifndef __ARCH_BLACKFIN_CACHE_H
-#define __ARCH_BLACKFIN_CACHE_H
-
-/*
- * Bytes per L1 cache line
- * Blackfin loads 32 bytes for cache
- */
-#define L1_CACHE_SHIFT 5
-#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
-#define SMP_CACHE_BYTES L1_CACHE_BYTES
-
-/*
- * Put cacheline_aliged data to L1 data memory
- */
-#ifdef CONFIG_CACHELINE_ALIGNED_L1
-#define __cacheline_aligned \
- __attribute__((__aligned__(L1_CACHE_BYTES), \
- __section__(".data_l1.cacheline_aligned")))
-#endif
-
-/*
- * largest L1 which this arch supports
- */
-#define L1_CACHE_SHIFT_MAX 5
-
-#endif
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