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author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 15:20:36 -0700 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 15:20:36 -0700 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-arm26/cacheflush.h | |
download | blackbird-op-linux-1da177e4c3f41524e886b7f1b8a0c1fc7321cac2.tar.gz blackbird-op-linux-1da177e4c3f41524e886b7f1b8a0c1fc7321cac2.zip |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'include/asm-arm26/cacheflush.h')
-rw-r--r-- | include/asm-arm26/cacheflush.h | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/include/asm-arm26/cacheflush.h b/include/asm-arm26/cacheflush.h new file mode 100644 index 000000000000..9c1b9c7f2ebd --- /dev/null +++ b/include/asm-arm26/cacheflush.h @@ -0,0 +1,52 @@ +/* + * linux/include/asm-arm/cacheflush.h + * + * Copyright (C) 2000-2002 Russell King + * Copyright (C) 2003 Ian Molton + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * ARM26 cache 'functions' + * + */ + +#ifndef _ASMARM_CACHEFLUSH_H +#define _ASMARM_CACHEFLUSH_H + +#if 1 //FIXME - BAD INCLUDES!!! +#include <linux/sched.h> +#include <linux/mm.h> +#endif + +#define flush_cache_all() do { } while (0) +#define flush_cache_mm(mm) do { } while (0) +#define flush_cache_range(vma,start,end) do { } while (0) +#define flush_cache_page(vma,vmaddr,pfn) do { } while (0) +#define flush_cache_vmap(start, end) do { } while (0) +#define flush_cache_vunmap(start, end) do { } while (0) + +#define invalidate_dcache_range(start,end) do { } while (0) +#define clean_dcache_range(start,end) do { } while (0) +#define flush_dcache_range(start,end) do { } while (0) +#define flush_dcache_page(page) do { } while (0) +#define flush_dcache_mmap_lock(mapping) do { } while (0) +#define flush_dcache_mmap_unlock(mapping) do { } while (0) +#define clean_dcache_entry(_s) do { } while (0) +#define clean_cache_entry(_start) do { } while (0) + +#define flush_icache_user_range(start,end, bob, fred) do { } while (0) +#define flush_icache_range(start,end) do { } while (0) +#define flush_icache_page(vma,page) do { } while (0) + +#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ + memcpy(dst, src, len) +#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ + memcpy(dst, src, len) + +/* DAG: ARM3 will flush cache on MEMC updates anyway? so don't bother */ +/* IM : Yes, it will, but only if setup to do so (we do this). */ +#define clean_cache_area(_start,_size) do { } while (0) + +#endif |