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author | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-07 15:40:39 -0800 |
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committer | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-07 15:40:39 -0800 |
commit | ea14fad0d416354a4e9bb1a04f32acba706f9548 (patch) | |
tree | 2c8acc5331f189aef1d40ddce3f40d6be9314e77 /include/asm-arm/elf.h | |
parent | 6ee7e78e7c78d871409ad4df30551c9355be7d0e (diff) | |
parent | 6705cda24fad1cb0ac82ac4f312df8ec735b39b0 (diff) | |
download | blackbird-op-linux-ea14fad0d416354a4e9bb1a04f32acba706f9548.tar.gz blackbird-op-linux-ea14fad0d416354a4e9bb1a04f32acba706f9548.zip |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (76 commits)
[ARM] 4002/1: S3C24XX: leave parent IRQs unmasked
[ARM] 4001/1: S3C24XX: shorten reboot time
[ARM] 3983/2: remove unused argument to __bug()
[ARM] 4000/1: Osiris: add third serial port in
[ARM] 3999/1: RX3715: suspend to RAM support
[ARM] 3998/1: VR1000: LED platform devices
[ARM] 3995/1: iop13xx: add iop13xx support
[ARM] 3968/1: iop13xx: add iop13xx_defconfig
[ARM] Update mach-types
[ARM] Allow gcc to optimise arm_add_memory a little more
[ARM] 3991/1: i.MX/MX1 high resolution time source
[ARM] 3990/1: i.MX/MX1 more precise PLL decode
[ARM] 3986/1: H1940: suspend to RAM support
[ARM] 3985/1: ixp4xx clocksource cleanup
[ARM] 3984/1: ixp4xx/nslu2: Fix disk LED numbering (take 2)
[ARM] 3994/1: ixp23xx: fix handling of pci master aborts
[ARM] 3981/1: sched_clock for PXA2xx
[ARM] 3980/1: extend the ARM Versatile sched_clock implementation from 32 to 63 bit
[ARM] 3979/1: extend the SA11x0 sched_clock implementation from 32 to 63 bit period
[ARM] 3978/1: macro to provide a 63-bit value from a 32-bit hardware counter
...
Diffstat (limited to 'include/asm-arm/elf.h')
-rw-r--r-- | include/asm-arm/elf.h | 150 |
1 files changed, 76 insertions, 74 deletions
diff --git a/include/asm-arm/elf.h b/include/asm-arm/elf.h index 17f0c656d272..642382d2c9f0 100644 --- a/include/asm-arm/elf.h +++ b/include/asm-arm/elf.h @@ -1,17 +1,22 @@ #ifndef __ASMARM_ELF_H #define __ASMARM_ELF_H - +#ifndef __ASSEMBLY__ /* * ELF register definitions.. */ - #include <asm/ptrace.h> #include <asm/user.h> typedef unsigned long elf_greg_t; typedef unsigned long elf_freg_t[3]; +#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) +typedef elf_greg_t elf_gregset_t[ELF_NGREG]; + +typedef struct user_fp elf_fpregset_t; +#endif + #define EM_ARM 40 #define EF_ARM_APCS26 0x08 #define EF_ARM_SOFT_FLOAT 0x200 @@ -23,11 +28,6 @@ typedef unsigned long elf_freg_t[3]; #define R_ARM_CALL 28 #define R_ARM_JUMP24 29 -#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) -typedef elf_greg_t elf_gregset_t[ELF_NGREG]; - -typedef struct user_fp elf_fpregset_t; - /* * These are used to set parameters in the core dumps. */ @@ -39,97 +39,99 @@ typedef struct user_fp elf_fpregset_t; #endif #define ELF_ARCH EM_ARM -#ifdef __KERNEL__ -#include <asm/procinfo.h> - /* - * This is used to ensure we don't load something for the wrong architecture. + * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP */ -#define elf_check_arch(x) ( ((x)->e_machine == EM_ARM) && (ELF_PROC_OK((x))) ) - -#define USE_ELF_CORE_DUMP -#define ELF_EXEC_PAGESIZE 4096 - -/* This is the location that an ET_DYN program is loaded if exec'ed. Typical - use of this is to invoke "./ld.so someprog" to test out a new version of - the loader. We need to make sure that it is out of the way of the program - that it will "exec", and that there is sufficient room for the brk. */ - -#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3) - -/* When the program starts, a1 contains a pointer to a function to be - registered with atexit, as per the SVR4 ABI. A value of 0 means we - have no such handler. */ -#define ELF_PLAT_INIT(_r, load_addr) (_r)->ARM_r0 = 0 - -/* This yields a mask that user programs can use to figure out what - instruction set this cpu supports. */ +#define HWCAP_SWP 1 +#define HWCAP_HALF 2 +#define HWCAP_THUMB 4 +#define HWCAP_26BIT 8 /* Play it safe */ +#define HWCAP_FAST_MULT 16 +#define HWCAP_FPA 32 +#define HWCAP_VFP 64 +#define HWCAP_EDSP 128 +#define HWCAP_JAVA 256 +#define HWCAP_IWMMXT 512 +#ifdef __KERNEL__ +#ifndef __ASSEMBLY__ +/* + * This yields a mask that user programs can use to figure out what + * instruction set this cpu supports. + */ #define ELF_HWCAP (elf_hwcap) +extern unsigned int elf_hwcap; -/* This yields a string that ld.so will use to load implementation - specific libraries for optimization. This is more specific in - intent than poking at uname or /proc/cpuinfo. */ - -/* For now we just provide a fairly general string that describes the - processor family. This could be made more specific later if someone - implemented optimisations that require it. 26-bit CPUs give you - "v1l" for ARM2 (no SWP) and "v2l" for anything else (ARM1 isn't - supported). 32-bit CPUs give you "v3[lb]" for anything based on an - ARM6 or ARM7 core and "armv4[lb]" for anything based on a StrongARM-1 - core. */ - +/* + * This yields a string that ld.so will use to load implementation + * specific libraries for optimization. This is more specific in + * intent than poking at uname or /proc/cpuinfo. + * + * For now we just provide a fairly general string that describes the + * processor family. This could be made more specific later if someone + * implemented optimisations that require it. 26-bit CPUs give you + * "v1l" for ARM2 (no SWP) and "v2l" for anything else (ARM1 isn't + * supported). 32-bit CPUs give you "v3[lb]" for anything based on an + * ARM6 or ARM7 core and "armv4[lb]" for anything based on a StrongARM-1 + * core. + */ #define ELF_PLATFORM_SIZE 8 -extern char elf_platform[]; #define ELF_PLATFORM (elf_platform) +extern char elf_platform[]; +#endif + +/* + * This is used to ensure we don't load something for the wrong architecture. + */ +#define elf_check_arch(x) ((x)->e_machine == EM_ARM && ELF_PROC_OK(x)) + /* * 32-bit code is always OK. Some cpus can do 26-bit, some can't. */ #define ELF_PROC_OK(x) (ELF_THUMB_OK(x) && ELF_26BIT_OK(x)) #define ELF_THUMB_OK(x) \ - (( (elf_hwcap & HWCAP_THUMB) && ((x)->e_entry & 1) == 1) || \ + ((elf_hwcap & HWCAP_THUMB && ((x)->e_entry & 1) == 1) || \ ((x)->e_entry & 3) == 0) #define ELF_26BIT_OK(x) \ - (( (elf_hwcap & HWCAP_26BIT) && (x)->e_flags & EF_ARM_APCS26) || \ + ((elf_hwcap & HWCAP_26BIT && (x)->e_flags & EF_ARM_APCS26) || \ ((x)->e_flags & EF_ARM_APCS26) == 0) -#ifndef CONFIG_IWMMXT +#define USE_ELF_CORE_DUMP +#define ELF_EXEC_PAGESIZE 4096 -/* Old NetWinder binaries were compiled in such a way that the iBCS - heuristic always trips on them. Until these binaries become uncommon - enough not to care, don't trust the `ibcs' flag here. In any case - there is no other ELF system currently supported by iBCS. - @@ Could print a warning message to encourage users to upgrade. */ -#define SET_PERSONALITY(ex,ibcs2) \ - set_personality(((ex).e_flags&EF_ARM_APCS26 ?PER_LINUX :PER_LINUX_32BIT)) +/* This is the location that an ET_DYN program is loaded if exec'ed. Typical + use of this is to invoke "./ld.so someprog" to test out a new version of + the loader. We need to make sure that it is out of the way of the program + that it will "exec", and that there is sufficient room for the brk. */ -#else +#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3) + +/* When the program starts, a1 contains a pointer to a function to be + registered with atexit, as per the SVR4 ABI. A value of 0 means we + have no such handler. */ +#define ELF_PLAT_INIT(_r, load_addr) (_r)->ARM_r0 = 0 /* - * All iWMMXt capable CPUs don't support 26-bit mode. Yet they can run - * legacy binaries which used to contain FPA11 floating point instructions - * that have always been emulated by the kernel. PFA11 and iWMMXt overlap - * on coprocessor 1 space though. We therefore must decide if given task - * is allowed to use CP 0 and 1 for iWMMXt, or if they should be blocked - * at all times for the prefetch exception handler to catch FPA11 opcodes - * and emulate them. The best indication to discriminate those two cases - * is the SOFT_FLOAT flag in the ELF header. + * Since the FPA coprocessor uses CP1 and CP2, and iWMMXt uses CP0 + * and CP1, we only enable access to the iWMMXt coprocessor if the + * binary is EABI or softfloat (and thus, guaranteed not to use + * FPA instructions.) */ - -#define SET_PERSONALITY(ex,ibcs2) \ -do { \ - set_personality(PER_LINUX_32BIT); \ - if (((ex).e_flags & EF_ARM_EABI_MASK) || \ - ((ex).e_flags & EF_ARM_SOFT_FLOAT)) \ - set_thread_flag(TIF_USING_IWMMXT); \ - else \ - clear_thread_flag(TIF_USING_IWMMXT); \ -} while (0) - -#endif +#define SET_PERSONALITY(ex, ibcs2) \ + do { \ + if ((ex).e_flags & EF_ARM_APCS26) { \ + set_personality(PER_LINUX); \ + } else { \ + set_personality(PER_LINUX_32BIT); \ + if (elf_hwcap & HWCAP_IWMMXT && (ex).e_flags & (EF_ARM_EABI_MASK | EF_ARM_SOFT_FLOAT)) \ + set_thread_flag(TIF_USING_IWMMXT); \ + else \ + clear_thread_flag(TIF_USING_IWMMXT); \ + } \ + } while (0) #endif |