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author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 15:20:36 -0700 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 15:20:36 -0700 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-arm/arch-ixp4xx/coyote.h | |
download | blackbird-op-linux-1da177e4c3f41524e886b7f1b8a0c1fc7321cac2.tar.gz blackbird-op-linux-1da177e4c3f41524e886b7f1b8a0c1fc7321cac2.zip |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'include/asm-arm/arch-ixp4xx/coyote.h')
-rw-r--r-- | include/asm-arm/arch-ixp4xx/coyote.h | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/include/asm-arm/arch-ixp4xx/coyote.h b/include/asm-arm/arch-ixp4xx/coyote.h new file mode 100644 index 000000000000..dd0c2d2d8503 --- /dev/null +++ b/include/asm-arm/arch-ixp4xx/coyote.h @@ -0,0 +1,36 @@ +/* + * include/asm-arm/arch-ixp4xx/coyote.h + * + * ADI Engineering platform specific definitions + * + * Author: Deepak Saxena <dsaxena@plexity.net> + * + * Copyright 2004 (c) MontaVista, Software, Inc. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_HARDWARE_H__ +#error "Do not include this directly, instead #include <asm/hardware.h>" +#endif + +#define COYOTE_FLASH_BASE IXP4XX_EXP_BUS_CS0_BASE_PHYS +#define COYOTE_FLASH_SIZE IXP4XX_EXP_BUS_CSX_REGION_SIZE * 2 + +/* PCI controller GPIO to IRQ pin mappings */ +#define COYOTE_PCI_SLOT0_PIN 6 +#define COYOTE_PCI_SLOT1_PIN 11 + +#define COYOTE_PCI_SLOT0_DEVID 14 +#define COYOTE_PCI_SLOT1_DEVID 15 + +#define COYOTE_IDE_BASE_PHYS IXP4XX_EXP_BUS_CS3_BASE_PHYS +#define COYOTE_IDE_BASE_VIRT 0xFFFE1000 +#define COYOTE_IDE_REGION_SIZE 0x1000 + +#define COYOTE_IDE_DATA_PORT 0xFFFE10E0 +#define COYOTE_IDE_CTRL_PORT 0xFFFE10FC +#define COYOTE_IDE_ERROR_PORT 0xFFFE10E2 + |