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authorMike Frysinger <vapier@gentoo.org>2011-06-26 23:11:19 -0400
committerMike Frysinger <vapier@gentoo.org>2011-07-23 01:18:29 -0400
commiteed7b8365807549c67613ea7d9a451262050ba3e (patch)
tree784d91e216a393904d5bb74bfcb00a878c159d10 /firmware/isci/isci_firmware.bin.ihex
parentd7228e7eb9bd9d65ddb5338fc9574f34ea6d53e1 (diff)
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Blackfin: dpmc: optimize hibernate/resume path
The current save logic used in hibernation is to do a MMR load (base + offset) into a register, and then push that onto the stack. Then when restoring, pop off the stack into a register followed by a MMR store (base + offset). These use plenty of 32bit insns rather than 16bit, are pretty long winded, and full of pipeline bubbles. So, by taking advantage of MMRs that are contiguous, the multi-register push/pop insn, and register abuse, we can shrink this code considerably. When saving, the new logic does a lot of loads into the data and pointer registers before executing a single multi-register push insn. Then when restoring, we do a single multi-register pop insn followed by a lot of stores. Overall, this allows us to cut the insn count by ~30%, the code size by ~45%, and drastically reduce the register hazards that trigger bubbles in the pipeline. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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