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authorJeff Ohlstein <johlstei@codeaurora.org>2010-12-02 12:05:12 -0800
committerDavid Brown <davidb@codeaurora.org>2011-01-07 15:54:44 -0800
commit94790ec25fdd51dc4126cc176f2e104f80f87fcb (patch)
tree6df4ba7d9e71459817b3a4d39b9094ac63698f6c /firmware/advansys
parent7b181446c68768e2f3231a0885095ee41261dcde (diff)
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msm: timer: SMP timer support for msm
The msm provides timer hardware that is private to each core. Each timer has separate counter and match registers, so we create separate clock_event_devices for each core. For the global clocksource, use cpu 0's counter. Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
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