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authorArchit Taneja <archit@ti.com>2012-06-21 09:33:55 +0530
committerTomi Valkeinen <tomi.valkeinen@ti.com>2012-06-29 10:10:03 +0300
commit6d523e7b0e25e360ab55c283d9f8d49ce843c565 (patch)
treeb6a34ff556b5257f8d0b62e4bd8dd6359f9b1016 /drivers/video/omap2/dss/dispc.c
parent3a5383a2373fd5bc5ebdd781c8ac89ab5d0cb8a4 (diff)
downloadblackbird-op-linux-6d523e7b0e25e360ab55c283d9f8d49ce843c565.tar.gz
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OMAPDSS: Remove passive matrix LCD support (part 1)
Remove clock constraints related to passive matrix displays. There is a constraint (pcd_min should be 3) for passive matrix displays. Remove this constraint in clock divider calculations as we won't support passive matrix displays any more. This cleans up the functions which calculate the clock dividers with DSI's PLL or DSS_FCLK as the clock source. Signed-off-by: Archit Taneja <archit@ti.com>
Diffstat (limited to 'drivers/video/omap2/dss/dispc.c')
-rw-r--r--drivers/video/omap2/dss/dispc.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index e48d1c10a3cf..6e25624b3faf 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -3167,7 +3167,7 @@ void dispc_mgr_set_pol_freq(enum omap_channel channel,
}
/* with fck as input clock rate, find dispc dividers that produce req_pck */
-void dispc_find_clk_divs(bool is_tft, unsigned long req_pck, unsigned long fck,
+void dispc_find_clk_divs(unsigned long req_pck, unsigned long fck,
struct dispc_clock_info *cinfo)
{
u16 pcd_min, pcd_max;
@@ -3178,9 +3178,6 @@ void dispc_find_clk_divs(bool is_tft, unsigned long req_pck, unsigned long fck,
pcd_min = dss_feat_get_param_min(FEAT_PARAM_DSS_PCD);
pcd_max = dss_feat_get_param_max(FEAT_PARAM_DSS_PCD);
- if (!is_tft)
- pcd_min = 3;
-
best_pck = 0;
best_ld = 0;
best_pd = 0;
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